Updated Bus memory interfaces to match CPU memory interfaces

This commit is contained in:
Jeff Parsons 2015-01-25 15:27:38 -08:00 committed by jeffpar
commit 58bd2b14d0
2 changed files with 98 additions and 0 deletions

View file

@ -609,6 +609,7 @@ if (TYPEDARRAYS) {
Memory.prototype = {
constructor: Memory,
parent: null,
/**
* save()
*