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Detabification

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This commit is contained in:
Jeff Parsons 2016-02-16 12:31:35 -08:00
commit 58a6f9ce3f
7 changed files with 45 additions and 41 deletions
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10
docs/x86/README.md
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@ -9,9 +9,9 @@ Placeholder for future x86 documentation.
x86 Instructions x86 Instructions
--- ---
[AAA](/docs/x86/ops/aaa/) [AAA](ops/AAA/)
AAD [AAD](ops/AAD/)
AAM [AAM](ops/AAM/)
AAS AAS
ADC ADC
ADD ADD
@ -31,6 +31,7 @@ DEC
DIV DIV
ESC ESC
HLT HLT
[ICEBP](ops/ICEBP/)
IDIV IDIV
IMUL IMUL
IN IN
@ -45,6 +46,7 @@ LAHF
LDS LDS
LEA LEA
LES LES
[LOADALL](ops/LOADALL/)
LOCK LOCK
LODS LODS
LOOP LOOP
@ -72,6 +74,7 @@ ROL
ROR ROR
SAHF SAHF
SAL SAL
[SALC](ops/SALC/)
SAR SAR
SBB SBB
SCAS SCAS
@ -83,6 +86,7 @@ STI
STOS STOS
SUB SUB
TEST TEST
[UMOV](ops/UMOV/)
WAIT WAIT
XCHG XCHG
XLAT XLAT

4
docs/x86/ops/AAD/README.md
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@ -12,8 +12,8 @@ AAD (0xD5)
From [http://www.rcollins.org/secrets/opcodes/AAD.html](http://www.rcollins.org/secrets/opcodes/AAD.html): From [http://www.rcollins.org/secrets/opcodes/AAD.html](http://www.rcollins.org/secrets/opcodes/AAD.html):
Undocumented: Available to all Intel x86 processors Undocumented: Available to all Intel x86 processors
Useful in production source code. Useful in production source code.
AAD AAD
Flags: ASCII Adjust before Division Flags: ASCII Adjust before Division
+-+-+-+-+-+-+-+-+-+ +----------+----------+ +-+-+-+-+-+-+-+-+-+ +----------+----------+
|O|D|I|T|S|Z|A|P|C| | 11010101 | DATA | |O|D|I|T|S|Z|A|P|C| | 11010101 | DATA |

4
docs/x86/ops/AAM/README.md
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@ -12,8 +12,8 @@ AAD (0xD4)
From [http://www.rcollins.org/secrets/opcodes/AAM.html](http://www.rcollins.org/secrets/opcodes/AAM.html): From [http://www.rcollins.org/secrets/opcodes/AAM.html](http://www.rcollins.org/secrets/opcodes/AAM.html):
Undocumented: Available to all Intel x86 processors. Undocumented: Available to all Intel x86 processors.
Useful in production source code. Useful in production source code.
AAM AAM
Flags: ASCII Adjust after Multiply Flags: ASCII Adjust after Multiply
+-+-+-+-+-+-+-+-+-+ +----------+----------+ +-+-+-+-+-+-+-+-+-+ +----------+----------+
|O|D|I|T|S|Z|A|P|C| | 11010100 | DATA | |O|D|I|T|S|Z|A|P|C| | 11010100 | DATA |

14
docs/x86/ops/ICEBP/README.md
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@ -22,13 +22,13 @@ From [http://www.rcollins.org/secrets/opcodes/UMOV.html](http://www.rcollins.org
All of these problems are eliminated, simply by using this instruction -- provided you know its caveats. All of these problems are eliminated, simply by using this instruction -- provided you know its caveats.
Undocumented: Available to all 80386-class (and above) Undocumented: Available to all 80386-class (and above)
processors as described herein. processors as described herein.
May be available to 80286 processors, but May be available to 80286 processors, but
implemented in a different manner. implemented in a different manner.
Useful to BONDOUT (ICE) processors. Useful to BONDOUT (ICE) processors.
Especially useful during ICE debugging. Especially useful during ICE debugging.
Useful in production source code. Useful in production source code.
ICEBP ICEBP
Flags: ICE Break Point Flags: ICE Break Point
+-+-+-+-+-+-+-+-+-+ +----------+ +-+-+-+-+-+-+-+-+-+ +----------+
|O|D|I|T|S|Z|A|P|C| | 11110001 | |O|D|I|T|S|Z|A|P|C| | 11110001 |

38
docs/x86/ops/LOADALL/README.md
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@ -18,19 +18,19 @@ From [http://www.rcollins.org/secrets/opcodes/LOADALL.html](http://www.rcollins.
Read LOADALL magazine article and download LOADALL demo source code. Read LOADALL magazine article and download LOADALL demo source code.
Undocumented: Available on all 80386 processors. Undocumented: Available on all 80386 processors.
Useful for diagnostics purposes on production Useful for diagnostics purposes on production
CPU's. CPU's.
Useful for ICE BONDOUT CPU's to return the Useful for ICE BONDOUT CPU's to return the
processor to EMUlation state. processor to EMUlation state.
LOADALL LOADALL
Flags: Loads the entire CPU state Flags: Loads the entire CPU state
All flags set according to +----------+----------+ All flags set according to +----------+----------+
the LOADALL flags image. | 00001111 | 00000111 | the LOADALL flags image. | 00001111 | 00000111 |
+----------+----------+ +----------+----------+
| 0F | 07 | | 0F | 07 |
+----------+----------+ +----------+----------+
Input: ES:EDI points to the Clocks: 122 Input: ES:EDI points to the Clocks: 122
LOADALL register image. Bus Cycles: 51 LOADALL register image. Bus Cycles: 51
LOADALL loads the entire CPU state from a table pointed to by LOADALL loads the entire CPU state from a table pointed to by
ES:EDI. At the completion of LOADALL, the CPU state is defined ES:EDI. At the completion of LOADALL, the CPU state is defined
according to this table. No protection checks are performed according to this table. No protection checks are performed
@ -44,18 +44,18 @@ From [http://www.rcollins.org/secrets/opcodes/LOADALL.html](http://www.rcollins.
3) 96-bit segment descriptor cache entries. 3) 96-bit segment descriptor cache entries.
The segment register entries have the following format: The segment register entries have the following format:
SREG STRUC SREG STRUC
REG_VAL DW ? ; low 16-bits defined REG_VAL DW ? ; low 16-bits defined
DW 0 ; high 16-bits=0 DW 0 ; high 16-bits=0
ENDS ENDS
The segment descriptor cache entires have the following format: The segment descriptor cache entires have the following format:
DESC_CACHE STRUC DESC_CACHE STRUC
DB 0 ; b[00-07] not used DB 0 ; b[00-07] not used
S_USE DB ? ; b[14] operand size S_USE DB ? ; b[14] operand size
S_Access DB ? ; b[16-23] Access Rights S_Access DB ? ; b[16-23] Access Rights
DB 0 ; b[24-31] not used DB 0 ; b[24-31] not used
S_Addr DD ? ; Segment Address in memory S_Addr DD ? ; Segment Address in memory
S_Limit DD ? ; Segment size limit S_Limit DD ? ; Segment size limit
ENDS ENDS
The LOADALL tables is organized as follows: The LOADALL tables is organized as follows:
;---------------------------------------------------------------- ;----------------------------------------------------------------
; LOADALL table pointed to by ES:EDI ; LOADALL table pointed to by ES:EDI

4
docs/x86/ops/SALC/README.md
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@ -16,8 +16,8 @@ From [http://www.rcollins.org/secrets/opcodes/SALC.html](http://www.rcollins.org
language. language.
Undocumented: Available to all Intel x86 processors Undocumented: Available to all Intel x86 processors
Useful in production source code. Useful in production source code.
SALC SALC
Flags: SET Carry flag to AL Flags: SET Carry flag to AL
+-+-+-+-+-+-+-+-+-+ +----------+ +-+-+-+-+-+-+-+-+-+ +----------+
|O|D|I|T|S|Z|A|P|C| | 11010110 | |O|D|I|T|S|Z|A|P|C| | 11010110 |

12
docs/x86/ops/UMOV/README.md
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@ -14,8 +14,8 @@ From [http://www.rcollins.org/secrets/opcodes/UMOV.html](http://www.rcollins.org
An undocumented op code used by ICE host software to perform memory cycles to the target system during HALT mode. An undocumented op code used by ICE host software to perform memory cycles to the target system during HALT mode.
Undocumented: Available on all 80386/80486 processors. Undocumented: Available on all 80386/80486 processors.
Useful only to BONDOUT (ICE) processors. Useful only to BONDOUT (ICE) processors.
UMOV UMOV
Flags: User MOVE data Flags: User MOVE data
+-+-+-+-+-+-+-+-+-+ +----------+----------+-------------+ +-+-+-+-+-+-+-+-+-+ +----------+----------+-------------+
|O|D|I|T|S|Z|A|P|C| | 00001111 | 000100dw | mod,reg,r/m | |O|D|I|T|S|Z|A|P|C| | 00001111 | 000100dw | mod,reg,r/m |
@ -40,8 +40,8 @@ From [http://www.rcollins.org/secrets/opcodes/UMOV.html](http://www.rcollins.org
The field operands to UMOV are exactly the same as the MOV The field operands to UMOV are exactly the same as the MOV
instruction. For example: instruction. For example:
d Direction. If set (d=1), do memory to register, or register d Direction. If set (d=1), do memory to register, or register
to register; the reg field is the destination. If cleared to register; the reg field is the destination. If cleared
(d=0), do register to memory; the reg field is the source. (d=0), do register to memory; the reg field is the source.
w Width. Selects the default data width. W=1 selects w Width. Selects the default data width. W=1 selects
word width, according to the appropriate CPU operating mode, word width, according to the appropriate CPU operating mode,
and/or size prefix override. W=0 selects 8-bit operands. and/or size prefix override. W=0 selects 8-bit operands.