Detabification
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@ -18,19 +18,19 @@ From [http://www.rcollins.org/secrets/opcodes/LOADALL.html](http://www.rcollins.
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Read LOADALL magazine article and download LOADALL demo source code.
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Undocumented: Available on all 80386 processors.
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Useful for diagnostics purposes on production
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CPU's.
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Useful for ICE BONDOUT CPU's to return the
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processor to EMUlation state.
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LOADALL
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Useful for diagnostics purposes on production
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CPU's.
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Useful for ICE BONDOUT CPU's to return the
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processor to EMUlation state.
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LOADALL
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Flags: Loads the entire CPU state
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All flags set according to +----------+----------+
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the LOADALL flags image. | 00001111 | 00000111 |
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+----------+----------+
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| 0F | 07 |
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+----------+----------+
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+----------+----------+
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| 0F | 07 |
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+----------+----------+
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Input: ES:EDI points to the Clocks: 122
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LOADALL register image. Bus Cycles: 51
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LOADALL register image. Bus Cycles: 51
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LOADALL loads the entire CPU state from a table pointed to by
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ES:EDI. At the completion of LOADALL, the CPU state is defined
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according to this table. No protection checks are performed
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@ -44,18 +44,18 @@ From [http://www.rcollins.org/secrets/opcodes/LOADALL.html](http://www.rcollins.
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3) 96-bit segment descriptor cache entries.
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The segment register entries have the following format:
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SREG STRUC
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REG_VAL DW ? ; low 16-bits defined
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DW 0 ; high 16-bits=0
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ENDS
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REG_VAL DW ? ; low 16-bits defined
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DW 0 ; high 16-bits=0
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ENDS
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The segment descriptor cache entires have the following format:
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DESC_CACHE STRUC
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DB 0 ; b[00-07] not used
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S_USE DB ? ; b[14] operand size
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S_Access DB ? ; b[16-23] Access Rights
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DB 0 ; b[24-31] not used
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S_Addr DD ? ; Segment Address in memory
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S_Limit DD ? ; Segment size limit
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ENDS
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DB 0 ; b[00-07] not used
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S_USE DB ? ; b[14] operand size
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S_Access DB ? ; b[16-23] Access Rights
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DB 0 ; b[24-31] not used
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S_Addr DD ? ; Segment Address in memory
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S_Limit DD ? ; Segment size limit
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ENDS
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The LOADALL tables is organized as follows:
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;----------------------------------------------------------------
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; LOADALL table pointed to by ES:EDI
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