Support for 80386 register dumps
This commit is contained in:
Jeff Parsons
jeffpar
parent
eb196c3048
commit
5303d2fe20
12 changed files with 384 additions and 124 deletions
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@ -83,8 +83,11 @@ function Debugger(parmsDbg)
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this.cInstructions = -1;
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/*
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* Default number of hex chars in a physical address (ie, for real-mode); updated by initBus().
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* Default number of hex chars in a register and a physical address (ie, for real-mode);
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* updated by initBus().
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*/
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this.cchReg = 4;
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this.maskReg = 0xffff;
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this.cchAddr = 5;
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/*
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@ -1186,9 +1189,15 @@ if (DEBUGGER) {
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this.aaOpDescs[0x0F] = Debugger.aOpDescUndefined;
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if (this.cpu.model >= X86.MODEL_80286) {
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this.aaOpDescs[0x0F] = Debugger.aOpDesc0F;
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if (this.cpu.model >= X86.MODEL_80386) {
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this.cchReg = 8;
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this.maskReg = 0xffffffff|0;
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}
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}
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}
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this.selectRegs();
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this.messageDump(Messages.DESC, function onDumpDesc(s) { dbg.dumpDesc(s); });
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this.messageDump(Messages.TSS, function onDumpTSS(s) { dbg.dumpTSS(s); });
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this.messageDump(Messages.DOS, function onDumpDOS(s) { dbg.dumpDOS(s); });
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@ -1301,6 +1310,43 @@ if (DEBUGGER) {
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return false;
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};
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/**
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* selectRegs()
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*
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* @this {Debugger}
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*/
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Debugger.prototype.selectRegs = function()
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{
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if (this.cchReg <= 4) {
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this.regs = {
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AX: "AX",
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BX: "BX",
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CX: "CX",
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DX: "DX",
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SP: "SP",
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BP: "BP",
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SI: "SI",
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DI: "DI",
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IP: "IP",
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MS: "MS"
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}
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} else {
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this.regs = {
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AX: "EAX",
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BX: "EBX",
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CX: "ECX",
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DX: "EDX",
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SP: "ESP",
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BP: "EBP",
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SI: "ESI",
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DI: "EDI",
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IP: "EIP",
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MS: "CR0"
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}
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}
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this.regs.PS = "PS";
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};
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/**
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* setFocus()
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*
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@ -1339,7 +1385,7 @@ if (DEBUGGER) {
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var wPID = this.getShort(aAddr, 2);
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var wParas = this.getShort(aAddr, 5);
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if (bSig != 0x4D && bSig != 0x5A) break;
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this.println(str.toHexAddr(0, seg) + ": '" + String.fromCharCode(bSig) + "' PID=" + str.toHexWord(wPID) + " LEN=" + str.toHexWord(wParas) + ' "' + this.dumpSZ(aAddr, 8) + '"');
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this.println(this.hexOffset(0, seg) + ": '" + String.fromCharCode(bSig) + "' PID=" + str.toHexWord(wPID) + " LEN=" + str.toHexWord(wParas) + ' "' + this.dumpSZ(aAddr, 8) + '"');
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seg += 1 + wParas;
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}
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};
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@ -1593,7 +1639,7 @@ if (DEBUGGER) {
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Debugger.prototype.message = function(sMessage, fAddress)
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{
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if (fAddress) {
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sMessage += " @" + str.toHexAddr(this.cpu.getIP(), this.cpu.getCS());
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sMessage += " @" + this.hexOffset(this.cpu.getIP(), this.cpu.getCS());
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}
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if (this.sMessagePrev && sMessage == this.sMessagePrev) return;
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@ -1659,7 +1705,7 @@ if (DEBUGGER) {
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* at the moment. If that changes, then this will have to change as well.
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*/
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addr -= 2;
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this.message("INT 0x" + str.toHexByte(nInt) + ": AH=" + str.toHexByte(AH) + " @" + str.toHexAddr(addr - this.cpu.segCS.base, this.cpu.getCS()) + sFunc);
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this.message("INT 0x" + str.toHexByte(nInt) + ": AH=" + str.toHexByte(AH) + " @" + this.hexOffset(addr - this.cpu.segCS.base, this.cpu.getCS()) + sFunc);
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}
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return fMessage;
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};
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@ -1699,7 +1745,7 @@ if (DEBUGGER) {
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segFrom = this.cpu.getCS();
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addrFrom -= this.cpu.segCS.base;
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}
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this.message(component.idComponent + "." + (bOut != null? "outPort" : "inPort") + "(0x" + str.toHexWord(port) + "," + (name? name : "unknown") + (bOut != null? ",0x" + str.toHexByte(bOut) : "") + ")" + (bIn != null? (": 0x" + str.toHexByte(bIn)) : "") + (addrFrom != null? (" @" + str.toHexAddr(addrFrom, segFrom)) : ""));
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this.message(component.idComponent + "." + (bOut != null? "outPort" : "inPort") + "(0x" + str.toHexWord(port) + "," + (name? name : "unknown") + (bOut != null? ",0x" + str.toHexByte(bOut) : "") + ")" + (bIn != null? (": 0x" + str.toHexByte(bIn)) : "") + (addrFrom != null? (" @" + this.hexOffset(addrFrom, segFrom)) : ""));
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}
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};
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@ -1737,7 +1783,7 @@ if (DEBUGGER) {
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if (this.traceEnabled !== undefined && this.traceEnabled[prop]) {
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var trace = Debugger.TRACE[prop];
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var len = (trace.size >> 2);
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var s = str.toHexAddr(this.cpu.opLIP - this.cpu.segCS.base, this.cpu.getCS()) + " " + Debugger.asIns[trace.ins] + "(" + str.toHex(dst, len) + "," + str.toHex(src, len) + "," + (flagsIn === null? "-" : str.toHexWord(flagsIn)) + ") " + str.toHex(result, len) + "," + (flagsOut === null? "-" : str.toHexWord(flagsOut));
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var s = this.hexOffset(this.cpu.opLIP - this.cpu.segCS.base, this.cpu.getCS()) + " " + Debugger.asIns[trace.ins] + "(" + str.toHex(dst, len) + "," + str.toHex(src, len) + "," + (flagsIn === null? "-" : str.toHexWord(flagsIn)) + ") " + str.toHex(result, len) + "," + (flagsOut === null? "-" : str.toHexWord(flagsOut));
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if (!this.aTraceBuffer.length) this.aTraceBuffer = new Array(Debugger.TRACE_LIMIT);
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this.aTraceBuffer[this.iTraceBuffer++] = s;
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if (this.iTraceBuffer >= this.aTraceBuffer.length) {
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@ -2416,7 +2462,23 @@ if (DEBUGGER) {
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*/
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Debugger.prototype.hexAddr = function(aAddr)
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{
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return aAddr[1] == null? ("%" + str.toHex(aAddr[2])) : str.toHexAddr(aAddr[0], aAddr[1]);
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return aAddr[1] == null? ("%" + str.toHex(aAddr[2])) : this.hexOffset(aAddr[0], aAddr[1]);
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};
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/**
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* hexOffset(off, sel)
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*
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* @this {Debugger}
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* @param {number} off
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* @param {number} [sel]
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* @return {string} the hex representation of off (or sel:off)
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*/
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Debugger.prototype.hexOffset = function(off, sel)
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{
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if (sel !== undefined) {
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return str.toHexWord(sel) + ":" + str.toHex(off, this.cchAddr < 8? 4 : 8);
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}
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return str.toHex(off);
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};
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/**
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@ -2434,11 +2496,10 @@ if (DEBUGGER) {
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}
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if (aAddr[1] != null) {
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aAddr[0] += inc;
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/*
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* TODO: Shouldn't we be using the segment (aAddr[1]) limit instead of 0xffff?
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*/
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if (aAddr[0] != (aAddr[0] & 0xffff)) {
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aAddr[0] = aAddr[0] & 0xffff;
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var limit = this.getSegment(aAddr[1]).limit;
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if (aAddr[0] > limit) {
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this.assert(false);
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aAddr[0] = 0;
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aAddr[2] = null;
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}
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}
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@ -2995,7 +3056,20 @@ if (DEBUGGER) {
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b = 0;
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break;
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}
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return " " + sFlag + (b? "1" : "0");
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return sFlag + (b? '1' : '0') + ' ';
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};
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/**
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* getRegStr(sName, reg)
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*
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* @this {Debugger}
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* @param {string} sName
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* @param {number} reg
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* @return {string}
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*/
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Debugger.prototype.getRegStr = function(sName, reg)
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{
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return sName + '=' + str.toHex(reg, this.cchReg) + ' ';
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};
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/**
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@ -3027,38 +3101,90 @@ if (DEBUGGER) {
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};
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/**
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* getRegStr(fProt)
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* getRegDump(fProt)
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*
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* Example of 8086 and 80286 real-mode register dump:
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*
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* AX=0000 BX=0000 CX=0000 DX=0000 SP=0000 BP=0000 SI=0000 DI=0000
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* SS=0000 DS=0000 ES=0000 PS=0002 V0 D0 I0 T0 S0 Z0 A0 P0 C0
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* F000:FFF0 EA5BE000F0 JMP F000:E05B
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*
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* Example of 80386 real-mode register dump:
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*
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* EAX=00000000 EBX=00000000 ECX=00000000 EDX=00000000
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* ESP=00000000 EBP=00000000 ESI=00000000 EDI=00000000
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* SS=0000 DS=0000 ES=0000 PS=00000002 V0 D0 I0 T0 S0 Z0 A0 P0 C0
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* F000:0000FFF0 EA05F900F0 JMP F000:0000F905
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*
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* Example of 80286 protected-mode register dump:
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*
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* AX=0000 BX=0000 CX=0000 DX=0000 SP=0000 BP=0000 SI=0000 DI=0000
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* SS=0000[000000,FFFF] DS=0000[000000,FFFF] ES=0000[000000,FFFF] A20=ON
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* CS=F000[FF0000,FFFF] LD=0000[000000,FFFF] GD=[000000,FFFF] ID=[000000,03FF]
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* TR=0000 MS=FFF0 PS=0002 V0 D0 I0 T0 S0 Z0 A0 P0 C0
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* F000:FFF0 EA5BE000F0 JMP F000:E05B
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*
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* Example of 80386 protected-mode register dump:
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*
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* EAX=00000000 EBX=00000000 ECX=00000000 EDX=00000000
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* ESP=00000000 EBP=00000000 ESI=00000000 EDI=00000000
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* SS=0000[00000000,FFFF] DS=0000[00000000,FFFF] ES=0000[00000000,FFFF]
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* CS=F000[FFFF0000,FFFF] FS=0000[00000000,FFFF] GS=0000[00000000,FFFF]
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* LD=0000[00000000,FFFF] GD=[00000000,FFFF] ID=[00000000,03FF] TR=0000 A20=ON
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* CR0=00000010 CR2=00000000 CR3=00000000 PS=00000002 V0 D0 I0 T0 S0 Z0 A0 P0 C0
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* F000:0000FFF0 EA05F900F0 JMP F000:0000F905
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*
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* We no longer include CS in real-mode (or EIP in any mode), because that information can be obtained from the
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* first line of disassembly, which an "r" or "rp" command will also display.
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*
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* Note that even when the processor is in real mode, you can always use the "rp" command to force a protected-mode
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* dump, in case you need to verify any selector base or limit values, since those do affect real-mode operation.
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*
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* @this {Debugger}
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* @param {boolean} [fProt]
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* @return {string}
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*/
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Debugger.prototype.getRegStr = function(fProt)
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Debugger.prototype.getRegDump = function(fProt)
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{
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if (fProt === undefined) {
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fProt = !!(this.cpu.regCR0 & X86.CR0.MSW.PE);
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}
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var s = "AX=" + str.toHexWord(this.cpu.regEAX) +
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" BX=" + str.toHexWord(this.cpu.regEBX) +
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" CX=" + str.toHexWord(this.cpu.regECX) +
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" DX=" + str.toHexWord(this.cpu.regEDX) +
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" SP=" + str.toHexWord(this.cpu.getSP()) +
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" BP=" + str.toHexWord(this.cpu.regEBP) +
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" SI=" + str.toHexWord(this.cpu.regESI) +
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" DI=" + str.toHexWord(this.cpu.regEDI) + '\n';
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s += this.getSegStr(this.cpu.segDS, fProt) + ' ' + this.getSegStr(this.cpu.segES, fProt) + ' ' + this.getSegStr(this.cpu.segSS, fProt);
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s += (fProt? '\n' : ' ');
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s += this.getSegStr(this.cpu.segCS, fProt) + " IP=" + str.toHexWord(this.cpu.getIP()) +
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this.getFlagStr("V") + this.getFlagStr("D") + this.getFlagStr("I") + this.getFlagStr("T") +
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this.getFlagStr("S") + this.getFlagStr("Z") + this.getFlagStr("A") + this.getFlagStr("P") + this.getFlagStr("C") +
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" PS=" + str.toHexWord(this.cpu.getPS());
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var s = this.getRegStr(this.regs.AX, this.cpu.regEAX) +
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this.getRegStr(this.regs.BX, this.cpu.regEBX) +
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this.getRegStr(this.regs.CX, this.cpu.regECX) +
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this.getRegStr(this.regs.DX, this.cpu.regEDX) + (this.cchReg > 4? '\n' : '') +
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this.getRegStr(this.regs.SP, this.cpu.getSP()) +
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this.getRegStr(this.regs.BP, this.cpu.regEBP) +
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this.getRegStr(this.regs.SI, this.cpu.regESI) +
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this.getRegStr(this.regs.DI, this.cpu.regEDI) + '\n';
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s += this.getSegStr(this.cpu.segSS, fProt) + ' ' +
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this.getSegStr(this.cpu.segDS, fProt) + ' ' +
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this.getSegStr(this.cpu.segES, fProt) + ' ';
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if (fProt) {
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s += " MS=" + str.toHexWord(this.cpu.regCR0) + '\n' +
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this.getDTRStr("LD", this.cpu.segLDT.sel, this.cpu.segLDT.base, this.cpu.segLDT.base + this.cpu.segLDT.limit) + ' ' +
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this.getDTRStr("GD", null, this.cpu.addrGDT, this.cpu.addrGDTLimit) + ' ' +
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this.getDTRStr("ID", null, this.cpu.addrIDT, this.cpu.addrIDTLimit) + " TR=" + str.toHexWord(this.cpu.segTSS.sel) +
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" A20=" + (this.bus.getA20()? "ON" : "OFF");
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var sTR = "TR=" + str.toHexWord(this.cpu.segTSS.sel);
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var sA20 = "A20=" + (this.bus.getA20()? "ON " : "OFF ");
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if (this.cpu.model < X86.MODEL_80386) {
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sTR = '\n' + sTR;
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s += sA20; sA20 = '';
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}
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s += '\n' + this.getSegStr(this.cpu.segCS, fProt) + ' ';
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if (this.cpu.model >= X86.MODEL_80386) {
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sA20 += '\n';
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s += this.getSegStr(this.cpu.segFS, fProt) + ' ' +
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this.getSegStr(this.cpu.segGS, fProt) + '\n';
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}
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s += this.getDTRStr("LD", this.cpu.segLDT.sel, this.cpu.segLDT.base, this.cpu.segLDT.base + this.cpu.segLDT.limit) + ' ' +
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this.getDTRStr("GD", null, this.cpu.addrGDT, this.cpu.addrGDTLimit) + ' ' +
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this.getDTRStr("ID", null, this.cpu.addrIDT, this.cpu.addrIDTLimit) + ' ';
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s += sTR + ' ' + sA20;
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s += this.getRegStr(this.regs.MS, this.cpu.regCR0);
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if (this.cpu.model >= X86.MODEL_80386) {
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s += this.getRegStr("CR2", this.cpu.regCR2) + this.getRegStr("CR3", this.cpu.regCR3);
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}
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}
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s += this.getRegStr(this.regs.PS, this.cpu.getPS()) +
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this.getFlagStr("V") + this.getFlagStr("D") + this.getFlagStr("I") + this.getFlagStr("T") +
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this.getFlagStr("S") + this.getFlagStr("Z") + this.getFlagStr("A") + this.getFlagStr("P") + this.getFlagStr("C");
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return s;
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};
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@ -3139,27 +3265,51 @@ if (DEBUGGER) {
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sValue = sValue.toUpperCase();
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switch (sValue) {
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case "AX":
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value = this.cpu.regEAX & 0xffff;
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break;
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case "EAX":
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value = this.cpu.regEAX;
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break;
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case "BX":
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value = this.cpu.regEBX & 0xffff;
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break;
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case "EBX":
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value = this.cpu.regEBX;
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break;
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case "CX":
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value = this.cpu.regECX & 0xffff;
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break;
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case "ECX":
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value = this.cpu.regECX;
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break;
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case "DX":
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value = this.cpu.regEDX & 0xffff;
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break;
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case "EDX":
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value = this.cpu.regEDX;
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break;
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case "SI":
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value = this.cpu.regESI & 0xffff;
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break;
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case "ESI":
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value = this.cpu.regESI;
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break;
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case "DI":
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value = this.cpu.regEDI & 0xffff;
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break;
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case "EDI":
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value = this.cpu.regEDI;
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break;
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case "BP":
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value = this.cpu.regEBP & 0xffff;
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break;
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case "EBP":
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value = this.cpu.regEBP;
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break;
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case "SP":
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value = this.cpu.getSP() & 0xffff;
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break;
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case "ESP":
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value = this.cpu.getSP();
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break;
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case "CS":
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@ -3179,6 +3329,9 @@ if (DEBUGGER) {
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* treat "PC" as an alias for the 16-bit flags register. So for purposes of parseValue(), "PC" has been removed.
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*/
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case "IP":
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value = this.cpu.getIP() & 0xffff;
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break;
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case "EIP":
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value = this.cpu.getIP();
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break;
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default:
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@ -3319,7 +3472,7 @@ if (DEBUGGER) {
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if (seg === undefined) seg = (addr >>> 4);
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var sSymbolOrig = aSymbols[sSymbol]['l'];
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if (sSymbolOrig) sSymbol = sSymbolOrig;
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this.println(str.toHexAddr(off, seg) + " " + sSymbol);
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this.println(this.hexOffset(off, seg) + " " + sSymbol);
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}
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||||
}
|
||||
};
|
||||
|
|
@ -3967,13 +4120,13 @@ if (DEBUGGER) {
|
|||
sDelta = "";
|
||||
nDelta = aAddr[0] - aSymbol[1];
|
||||
if (nDelta) sDelta = " + " + str.toHexWord(nDelta);
|
||||
this.println(aSymbol[0] + " (" + str.toHexAddr(aSymbol[1], aAddr[1]) + ")" + sDelta);
|
||||
this.println(aSymbol[0] + " (" + this.hexOffset(aSymbol[1], aAddr[1]) + ")" + sDelta);
|
||||
}
|
||||
if (aSymbol.length > 4 && aSymbol[4]) {
|
||||
sDelta = "";
|
||||
nDelta = aSymbol[5] - aAddr[0];
|
||||
if (nDelta) sDelta = " - " + str.toHexWord(nDelta);
|
||||
this.println(aSymbol[4] + " (" + str.toHexAddr(aSymbol[5], aAddr[1]) + ")" + sDelta);
|
||||
this.println(aSymbol[4] + " (" + this.hexOffset(aSymbol[5], aAddr[1]) + ")" + sDelta);
|
||||
}
|
||||
} else {
|
||||
this.println("no symbols");
|
||||
|
|
@ -4285,55 +4438,82 @@ if (DEBUGGER) {
|
|||
}
|
||||
var w = parseInt(sValue, 16);
|
||||
if (!isNaN(w)) {
|
||||
sReg = sReg.toUpperCase();
|
||||
switch (sReg) {
|
||||
var sRegMatch = sReg.toUpperCase();
|
||||
if (sRegMatch.charAt(0) == 'E' && this.cchReg <= 4) {
|
||||
sRegMatch = null;
|
||||
}
|
||||
switch (sRegMatch) {
|
||||
case "AL":
|
||||
this.cpu.regEAX = (this.cpu.regEAX & 0xff00) | (w & 0xff);
|
||||
this.cpu.regEAX = (this.cpu.regEAX & ~0xff) | (w & 0xff);
|
||||
break;
|
||||
case "AH":
|
||||
this.cpu.regEAX = (this.cpu.regEAX & 0x00ff) | ((w << 8) & 0xff);
|
||||
this.cpu.regEAX = (this.cpu.regEAX & ~0xff00) | ((w << 8) & 0xff);
|
||||
break;
|
||||
case "AX":
|
||||
this.cpu.regEAX = (w & 0xffff);
|
||||
this.cpu.regEAX = (this.cpu.regEAX & ~0xffff) | (w & 0xffff);
|
||||
break;
|
||||
case "EAX":
|
||||
this.cpu.regEAX = w;
|
||||
break;
|
||||
case "BL":
|
||||
this.cpu.regEBX = (this.cpu.regEBX & 0xff00) | (w & 0xff);
|
||||
this.cpu.regEBX = (this.cpu.regEBX & ~0xff) | (w & 0xff);
|
||||
break;
|
||||
case "BH":
|
||||
this.cpu.regEBX = (this.cpu.regEBX & 0x00ff) | ((w << 8) & 0xff);
|
||||
this.cpu.regEBX = (this.cpu.regEBX & ~0xff00) | ((w << 8) & 0xff);
|
||||
break;
|
||||
case "BX":
|
||||
this.cpu.regEBX = (w & 0xffff);
|
||||
this.cpu.regEBX = (this.cpu.regEBX & ~0xffff) | (w & 0xffff);
|
||||
break;
|
||||
case "EBX":
|
||||
this.cpu.regEBX = w;
|
||||
break;
|
||||
case "CL":
|
||||
this.cpu.regECX = (this.cpu.regECX & 0xff00) | (w & 0xff);
|
||||
this.cpu.regECX = (this.cpu.regECX & ~0xff) | (w & 0xff);
|
||||
break;
|
||||
case "CH":
|
||||
this.cpu.regECX = (this.cpu.regECX & 0x00ff) | ((w << 8) & 0xff);
|
||||
this.cpu.regECX = (this.cpu.regECX & ~0xff00) | ((w << 8) & 0xff);
|
||||
break;
|
||||
case "CX":
|
||||
this.cpu.regECX = (w & 0xffff);
|
||||
this.cpu.regECX = (this.cpu.regECX & ~0xffff) | (w & 0xffff);
|
||||
break;
|
||||
case "ECX":
|
||||
this.cpu.regECX = w;
|
||||
break;
|
||||
case "DL":
|
||||
this.cpu.regEDX = (this.cpu.regEDX & 0xff00) | (w & 0xff);
|
||||
this.cpu.regEDX = (this.cpu.regEDX & ~0xff) | (w & 0xff);
|
||||
break;
|
||||
case "DH":
|
||||
this.cpu.regEDX = (this.cpu.regEDX & 0x00ff) | ((w << 8) & 0xff);
|
||||
this.cpu.regEDX = (this.cpu.regEDX & ~0xff00) | ((w << 8) & 0xff);
|
||||
break;
|
||||
case "DX":
|
||||
this.cpu.regEDX = (w & 0xffff);
|
||||
this.cpu.regEDX = (this.cpu.regEDX & ~0xffff) | (w & 0xffff);
|
||||
break;
|
||||
case "EDX":
|
||||
this.cpu.regEDX = w;
|
||||
break;
|
||||
case "SP":
|
||||
this.cpu.setSP((this.cpu.getSP() & ~0xffff) | (w & 0xffff));
|
||||
break;
|
||||
case "ESP":
|
||||
this.cpu.setSP(w);
|
||||
break;
|
||||
case "BP":
|
||||
this.cpu.regEBP = (w & 0xffff);
|
||||
this.cpu.regEBP = (this.cpu.regEBP & ~0xffff) | (w & 0xffff);
|
||||
break;
|
||||
case "EBP":
|
||||
this.cpu.regEBP = w;
|
||||
break;
|
||||
case "SI":
|
||||
this.cpu.regESI = (w & 0xffff);
|
||||
this.cpu.regESI = (this.cpu.regESI & ~0xffff) | (w & 0xffff);
|
||||
break;
|
||||
case "ESI":
|
||||
this.cpu.regESI = w;
|
||||
break;
|
||||
case "DI":
|
||||
this.cpu.regEDI = (w & 0xffff);
|
||||
this.cpu.regEDI = (this.cpu.regEDI & ~0xffff) | (w & 0xffff);
|
||||
break;
|
||||
case "EDI":
|
||||
this.cpu.regEDI = w;
|
||||
break;
|
||||
case "DS":
|
||||
this.cpu.setDS(w);
|
||||
|
|
@ -4390,7 +4570,7 @@ if (DEBUGGER) {
|
|||
var fUnknown = true;
|
||||
if (this.cpu.model >= X86.MODEL_80286) {
|
||||
fUnknown = false;
|
||||
switch(sReg){
|
||||
switch(sRegMatch){
|
||||
case "MS":
|
||||
X86Help.opHelpLMSW.call(this.cpu, w);
|
||||
break;
|
||||
|
|
@ -4422,7 +4602,7 @@ if (DEBUGGER) {
|
|||
}
|
||||
}
|
||||
|
||||
this.println((fCompact? '' : '\n') + this.getRegStr(fProt));
|
||||
this.println((fCompact? '' : '\n') + this.getRegDump(fProt));
|
||||
|
||||
if (fIns) {
|
||||
this.aAddrNextCode = this.newAddr(this.cpu.getIP(), this.cpu.getCS());
|
||||
|
|
|
|||
Loading…
Reference in a new issue