CPU caches CPL now (independent of segCS.cpl)

This commit is contained in:
Jeff Parsons 2015-07-26 12:14:30 -07:00
commit 4bb34eb81d
5 changed files with 88 additions and 36 deletions

View file

@ -2945,8 +2945,8 @@ if (DEBUGGER) {
/*
* Halt if running with interrupts disabled and IOPL < CPL, because that's likely an error
*/
if (!(this.cpu.regPS & X86.PS.IF) && this.cpu.nIOPL < this.cpu.segCS.cpl) {
this.printMessage("interrupts disabled at IOPL " + this.cpu.nIOPL + " and CPL " + this.cpu.segCS.cpl, true);
if (!(this.cpu.regPS & X86.PS.IF) && this.cpu.nIOPL < this.cpu.nCPL) {
this.printMessage("interrupts disabled at IOPL " + this.cpu.nIOPL + " and CPL " + this.cpu.nCPL, true);
return true;
}
}