Fixed the evaluation of register operands for the XOR opcode (this slipped through the cracks, since it doesn't use readSrcWord())
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5 changed files with 61 additions and 12 deletions
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@ -1243,15 +1243,15 @@ PDP11.JSR_CYCLES = [
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PDP11.opJSR = function(opCode)
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{
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/*
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* Since JMP and JSR opcodes have their own unique timings for the various dst modes, we must snapshot
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* nStepCycles before decoding the mode, and then use that to update nStepCycles.
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* Since JMP and JSR opcodes have their own unique timings for the various dst modes, we must
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* snapshot nStepCycles before decoding the mode, and then use that to update nStepCycles.
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*/
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this.nSnapCycles = this.nStepCycles;
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/*
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* TODO: Determine whether or not the SRCMODE operand (regsGen[reg]) should be snapped BEFORE or AFTER we
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* decode the DSTMODE operand. Doing it AFTER seems a bit risky.
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*/
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var addr = this.readDstAddr(opCode);
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/*
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* As per the WARNING in readSrcWord(), reading the SRC register AFTER decoding the DST operand
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* is entirely appropriate.
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*/
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var reg = (opCode >> PDP11.SRCMODE.SHIFT) & PDP11.OPREG.MASK;
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this.pushWord(this.regsGen[reg]);
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this.regsGen[reg] = this.getPC();
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@ -1883,7 +1883,11 @@ PDP11.opWAIT = function(opCode)
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PDP11.opXOR = function(opCode)
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{
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var reg = (opCode >> PDP11.SRCMODE.SHIFT) & PDP11.OPREG.MASK;
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this.updateDstWord(opCode, this.regsGen[reg], PDP11.fnXOR);
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/*
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* As per the WARNING in readSrcWord(), we must supply a register number rather than a register value,
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* which will then be evaluated by updateDstWord() after both the SRC and DST operands have been decoded.
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*/
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this.updateDstWord(opCode, -reg-1 /* this.regsGen[reg] */, PDP11.fnXOR);
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this.nStepCycles -= (this.dstMode? (8 + 1) : (2 + 1) + (this.dstReg == 7? 2 : 0));
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};
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