Cleaned up IRQ handling, added support for DL11 overrun errors, and fixed buffered message output (although a better solution is needed longer term)
This commit is contained in:
Jeff Parsons
Jeff Parsons
parent
66f82736c9
commit
47a65f043f
13 changed files with 651 additions and 591 deletions
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@ -158,7 +158,7 @@ var PDP11 = {
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MASK: 0x3
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},
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/*
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* Processor Status Word definitions (stored in regPSW)
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* Processor Status Word (stored in regPSW) at 177776
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*/
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PSW: {
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CF: 0x0001, // bit 0 (000001) Carry Flag
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@ -185,6 +185,19 @@ var PDP11 = {
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CMODE: 14
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}
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},
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/*
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* Program Interrupt Register (stored in regPIR) at 177772
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*
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* The PIA bits at 5-7 are designed to align with PRI bits 5-7 in the PSW.
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*/
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PIR: {
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BITS: 0xFE00, // bits 9-15 correspond to interrupt requests 1-7
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PIA: 0x00EE, // the PIA bits contain two copies of the corresponding interrupt request priority
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PIA_INC: 0x0022, // both sets of PIA bits can be incremented with this constant
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SHIFT: {
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BITS: 9
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}
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},
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/*
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* PDP-11 trap vectors
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*/
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@ -248,9 +261,9 @@ var PDP11 = {
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* Internal operation state flags
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*/
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OPFLAG: {
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INTQ_DELAY: 0x01, // set INTQ on next check (set by SPL and traps)
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INTQ: 0x02, // call checkInterrupts()
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INTQ_MASK: 0x03,
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IRQ_DELAY: 0x01, // set IRQ on next check (set by SPL and traps)
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IRQ: 0x02, // call checkInterrupts()
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IRQ_MASK: 0x03,
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WAIT: 0x04, // WAIT operation in progress
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TRAP: 0x08, // set if last operation was a trap (see trapLast for the vector, and trapReason for the reason)
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TRAP_TF: 0x10, // aka PDP11.PSW.TF (WARNING: do not change this bit, or you will likely break opRTI())
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@ -492,10 +505,10 @@ var PDP11 = {
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PPS: 0o177554, // PC11 Punch Status Register
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PPB: 0o177556, // PC11 Punch Buffer Register
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RCSR: 0o177560, // DL11 Display Terminal: Receiver Status Register
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RBUF: 0o177562, // DL11 Display Terminal: Receiver Data Buffer Register
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XCSR: 0o177564, // DL11 Display Terminal: Transmitter Status Register
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XBUF: 0o177566, // DL11 Display Terminal: Transmitter Data Buffer Register
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RCSR: 0o177560, // DL11 Receiver Status Register
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RBUF: 0o177562, // DL11 Receiver Data Buffer Register
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XCSR: 0o177564, // DL11 Transmitter Status Register
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XBUF: 0o177566, // DL11 Transmitter Data Buffer Register
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CNSW: 0o177570, // Console (Front Panel) Switch/Display Register
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@ -578,9 +591,9 @@ var PDP11 = {
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},
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DL11: { // Serial Line Interface (program compatible with the KL11 for control of console teleprinters)
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PRI: 4,
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RVEC: 0o60,
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XVEC: 0o64,
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RCSR: { // 177560
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RVEC: 0o060,
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XVEC: 0o064,
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RCSR: { // 177560: DL11 Receiver Status Register
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RE: 0x0001, // Reader Enable (W/O)
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DTR: 0x0002, // Data Terminal Ready (R/W)
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RTS: 0x0004, // Request To Send (R/W)
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@ -598,14 +611,14 @@ var PDP11 = {
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WMASK: 0x006F, // bits writable
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BAUD: 9600
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},
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RBUF: { // 177562
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RBUF: { // 177562: DL11 Receiver Data Buffer Register
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DATA: 0x00ff, // Received Data (R/O)
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PARITY: 0x1000, // Received Data Parity (R/O)
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FE: 0x2000, // Framing Error (R/O)
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OE: 0x4000, // Overrun Error (R/O)
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ERROR: 0x8000 // Error (R/O)
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},
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XCSR: { // 177564
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XCSR: { // 177564: DL11 Transmitter Status Register
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BREAK: 0x0001, // BREAK (R/W)
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MAINT: 0x0004, // Maintenance (R/W)
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TIE: 0x0040, // Transmitter Interrupt Enable (R/W)
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@ -614,7 +627,7 @@ var PDP11 = {
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WMASK: 0x0045,
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BAUD: 9600
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},
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XBUF: { // 177566
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XBUF: { // 177566: DL11 Transmitter Data Buffer Register
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DATA: 0x00FF // Transmitted Data (W/O) TODO: Determine why pdp11.js effectively defined this as 0x7F
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}
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},
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@ -622,7 +635,7 @@ var PDP11 = {
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PRI: 6,
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VEC: 0o100,
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DELAY: 0,
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LKS: {
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LKS: { // 177546: KW11-L Clock Status
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IE: 0x0040, // Interrupt Enable
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MON: 0x0080, // Monitor
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MASK: 0x00C0 // these are the only bits that can read or written
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@ -630,9 +643,9 @@ var PDP11 = {
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},
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PC11: { // High Speed Reader & Punch (PR11 is a Reader-only unit)
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PRI: 4, // NOTE: reader has precedence over punch
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RVEC: 0o70, // reader vector
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PVEC: 0o74, // punch vector
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PRS: {
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RVEC: 0o070, // reader vector
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PVEC: 0o074, // punch vector
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PRS: { // 177550: PC11 (and PR11) Reader Status Register
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RE: 0x0001, // Reader Enable (W/O)
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RIE: 0x0040, // Reader Interrupt Enable (allows the DONE and ERROR bits to trigger an interrupt)
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DONE: 0x0080, // Done (R/O)
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@ -643,15 +656,20 @@ var PDP11 = {
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WMASK: 0x0041, // bits writable
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BAUD: 3600
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},
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PRB: {
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PRB: { // 177552: PC11 (and PR11) Reader Buffer Register
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MASK: 0x00FF // Data
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},
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PPS: {
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PPS: { // 177554: PC11 Punch Status Register
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/*
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* TODO: Flesh this out if/when we add Paper Tape Punch support
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*/
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BAUD: 600
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},
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PPB: { // 177556: PC11 Punch Buffer Register
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/*
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* TODO: Flesh this out if/when we add Paper Tape Punch support
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*/
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}
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},
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RK11: { // RK11 Disk Controller
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PRI: 5,
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@ -826,6 +844,15 @@ var PDP11 = {
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RDATA: 0b1100, // Read Data
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RDNC: 0b1110 // Read Data without Header Check
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}
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},
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VECTORS: {
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0o060: "DL11.RCSR",
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0o064: "DL11.XCSR",
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0o070: "PC11.PRS",
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0o074: "PC11.PPS",
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0o100: "KW11",
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0o160: "RL11",
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0o220: "RK11"
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}
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};
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