Fixed OPDEF opcode generation (improper use of bitwise operators)
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parent
d28d1ee940
commit
427e6afdb8
3 changed files with 112 additions and 100 deletions
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@ -963,6 +963,9 @@ class DebuggerPDP10 extends Debugger {
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case DebuggerPDP10.REGS.C1:
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value = (cpu.regPS & PDP10.PSFLAG.CRY1)? 1 : 0;
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break;
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case DebuggerPDP10.REGS.BI:
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value = (cpu.regPS & PDP10.PSFLAG.BIS)? 1 : 0;
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break;
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case DebuggerPDP10.REGS.ND:
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value = (cpu.regPS & PDP10.PSFLAG.DCK)? 1 : 0;
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break;
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@ -1002,6 +1005,9 @@ class DebuggerPDP10 extends Debugger {
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case DebuggerPDP10.REGS.C1:
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flag = PDP10.PSFLAG.CRY1;
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break;
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case DebuggerPDP10.REGS.BI:
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flag = PDP10.PSFLAG.BIS;
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break;
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case DebuggerPDP10.REGS.ND:
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flag = PDP10.PSFLAG.DCK;
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break;
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@ -4147,12 +4153,13 @@ if (DEBUGGER) {
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OV: 4, // single-bit "register" representing the Overflow flag
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C0: 5, // single-bit "register" representing the Carry 0 flag
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C1: 6, // single-bit "register" representing the Carry 1 flag
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ND: 7, // single-bit "register" representing the No Divide flag
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PD: 8, // single-bit "register" representing the Pushdown Overflow flag
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BI: 7, // single-bit "register" representing the Byte Interrupt flag
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ND: 8, // single-bit "register" representing the No Divide flag
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PD: 9, // single-bit "register" representing the Pushdown Overflow flag
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};
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DebuggerPDP10.REGNAMES = [
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"PC", "RA", "EA", "PS", "OV", "C0", "C1", "ND", "PD"
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"PC", "RA", "EA", "PS", "OV", "C0", "C1", "BI", "ND", "PD"
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];
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/*
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@ -815,7 +815,12 @@ class Macro10 {
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this.popScope();
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if (w !== undefined) {
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this.aWords[nLocation] += (w & (PDP10.OPCODE.A_FIELD | PDP10.OPCODE.X_FIELD | PDP10.OPCODE.Y_FIELD));
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this.aWords[nLocation] |= (w & PDP10.OPCODE.I_FIELD);
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/*
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* We can't "OR" (|=) the I_FIELD bit into the target word, because it's a 36-bit value and bitwise
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* operators truncate to 32 bits, so we'll use addition, trusting that the field was initially zero.
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*/
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this.dbg.assert(!(this.aWords[nLocation] & PDP10.OPCODE.I_FIELD));
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this.aWords[nLocation] += (w & PDP10.OPCODE.I_FIELD);
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if (sFixup) {
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if (!this.aFixups[nLocation]) {
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this.aFixups[nLocation] = sFixup;
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