Restructured ModRM decoding
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parent
1ede9acf15
commit
418f3bd603
13 changed files with 6175 additions and 6516 deletions
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@ -248,7 +248,7 @@ var X86Help = {
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*
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* TODO: Determine the cycle cost when a BOUND exception is triggered, over and above nOpCyclesBound.
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*/
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this.setIP(this.opEA - this.segCS.base);
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this.setIP(this.opLIP - this.segCS.base);
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X86Help.opHelpINT.call(this, X86.EXCEPTION.BOUND_ERR, null, 0);
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}
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if (EAFUNCS) this.setEAByte = this.setEAByteDisabled; else this.opFlags |= X86.OPFLAG.NOWRITE;
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@ -490,10 +490,10 @@ var X86Help = {
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*/
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opHelpCALLF: function(off, sel) {
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var regCS = this.segCS.sel;
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var regIP = this.regIP;
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var regEIP = this.regEIP;
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if (this.setCSIP(off, sel, true) != null) {
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this.pushWord(regCS);
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this.pushWord(regIP);
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this.pushWord(regEIP);
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}
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},
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/**
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@ -506,10 +506,10 @@ var X86Help = {
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* @param {number} n
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*/
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opHelpRETF: function(n) {
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var regIP = this.popWord();
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var regEIP = this.popWord();
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var regCS = this.popWord();
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if (n) this.regESP = (this.regESP + n) & 0xffff;
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if (this.setCSIP(regIP, regCS, false)) {
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if (this.setCSIP(regEIP, regCS, false)) {
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if (n) this.regESP = (this.regESP + n) & 0xffff;
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/*
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* As per Intel documentation: "If any of [the DS or ES] registers refer to segments whose DPL is
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@ -529,7 +529,7 @@ var X86Help = {
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this.segES.load(0);
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}
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}
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if (n == 2 && this.cIntReturn) this.checkIntReturn(this.regEIP);
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if (n == 2 && this.cIntReturn) this.checkIntReturn(this.regLIP);
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},
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/**
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* opHelpINT(nIDT, nError, nCycles)
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@ -554,14 +554,14 @@ var X86Help = {
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this.segCS.fCall = true;
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var regPS = this.getPS();
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var regCS = this.segCS.sel;
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var regIP = this.regIP;
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var regEIP = this.regEIP;
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var base = this.segCS.loadIDT(nIDT);
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if (base != X86.ADDR_INVALID) {
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this.regEIP = base + this.regIP;
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if (PREFETCH) this.flushPrefetch(this.regEIP);
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this.regLIP = base + this.regEIP;
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if (PREFETCH) this.flushPrefetch(this.regLIP);
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this.pushWord(regPS);
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this.pushWord(regCS);
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this.pushWord(regIP);
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this.pushWord(regEIP);
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if (nError != null) this.pushWord(nError);
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this.nFault = -1;
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}
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@ -585,12 +585,12 @@ var X86Help = {
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}
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}
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var cpl = this.segCS.cpl;
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var regIP = this.popWord();
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var regEIP = this.popWord();
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var regCS = this.popWord();
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var regPS = this.popWord();
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if (this.setCSIP(regIP, regCS, false) != null) {
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if (this.setCSIP(regEIP, regCS, false) != null) {
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this.setPS(regPS, cpl);
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if (this.cIntReturn) this.checkIntReturn(this.regEIP);
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if (this.cIntReturn) this.checkIntReturn(this.regLIP);
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}
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},
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/**
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@ -599,7 +599,7 @@ var X86Help = {
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* @this {X86CPU}
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*/
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opHelpDIVOverflow: function() {
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this.setIP(this.opEA - this.segCS.base);
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this.setIP(this.opLIP - this.segCS.base);
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/*
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* TODO: Determine the proper cycle cost.
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*/
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@ -619,7 +619,7 @@ var X86Help = {
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{
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if (!this.aFlags.fComplete) {
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this.printMessage("Fault " + str.toHexByte(nFault) + " blocked by Debugger", Messages.WARN);
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this.setIP(this.opEA - this.segCS.base);
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this.setIP(this.opLIP - this.segCS.base);
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return;
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}
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@ -629,7 +629,7 @@ var X86Help = {
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/*
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* Single-fault (error code is passed through, and the responsible instruction is restartable)
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*/
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this.setIP(this.opEA - this.segCS.base);
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this.setIP(this.opLIP - this.segCS.base);
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fDispatch = true;
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} else if (this.nFault != X86.EXCEPTION.DF_FAULT) {
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/*
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@ -691,7 +691,7 @@ var X86Help = {
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opHelpFaultMessage: function(nFault, nError, fHalt)
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{
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var bitsMessage = Messages.FAULT;
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var bOpcode = this.bus.getByteDirect(this.regEIP);
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var bOpcode = this.bus.getByteDirect(this.regLIP);
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/*
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* OS/2 1.0 uses an INT3 (0xCC) opcode in conjunction with an invalid IDT to trigger a triple-fault
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@ -716,7 +716,7 @@ var X86Help = {
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* (Power-On Self Test); we don't want to ignore those, but we don't want to halt on them either. We
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* detect those faults by virtue of EIP being in the range %0F0000 to %0FFFFF.
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*/
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if (this.regEIP >= 0x0F0000 && this.regEIP <= 0x0FFFFF) {
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if (this.regLIP >= 0x0F0000 && this.regLIP <= 0x0FFFFF) {
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fHalt = false;
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}
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@ -729,7 +729,7 @@ var X86Help = {
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}
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if (this.messageEnabled(bitsMessage) || fHalt) {
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var sMessage = (fHalt? '\n' : '') + "Fault " + str.toHexByte(nFault) + (nError != null? " (" + str.toHexWord(nError) + ")" : "") + " on opcode 0x" + str.toHexByte(bOpcode) + " at " + str.toHexAddr(this.regIP, this.segCS.sel) + " (%" + str.toHex(this.regEIP, 6) + ")";
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var sMessage = (fHalt? '\n' : '') + "Fault " + str.toHexByte(nFault) + (nError != null? " (" + str.toHexWord(nError) + ")" : "") + " on opcode 0x" + str.toHexByte(bOpcode) + " at " + str.toHexAddr(this.regEIP, this.segCS.sel) + " (%" + str.toHex(this.regLIP, 6) + ")";
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var fRunning = this.aFlags.fRunning;
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if (this.printMessage(sMessage, bitsMessage)) {
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if (fHalt) {
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@ -767,8 +767,8 @@ var X86Help = {
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* @this {X86CPU}
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*/
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opHelpUndefined: function() {
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this.setIP(this.opEA - this.segCS.base);
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this.setError("Undefined opcode 0x" + str.toHexByte(this.bus.getByteDirect(this.regEIP)) + " at " + str.toHexAddr(this.regIP, this.segCS.sel));
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this.setIP(this.opLIP - this.segCS.base);
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this.setError("Undefined opcode 0x" + str.toHexByte(this.bus.getByteDirect(this.regLIP)) + " at " + str.toHexAddr(this.regEIP, this.segCS.sel));
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this.stopCPU();
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}
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};
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