romtests.json updated
This commit is contained in:
parent
17523bfbe8
commit
3ce78f23ed
18 changed files with 3991 additions and 3794 deletions
|
|
@ -15193,21 +15193,11 @@ lffb3: pop ds ; 0000FFB3 1F '.'
|
||||||
|
|
||||||
jmp l9f17 ; 0000FFDD E9379F '.7.'
|
jmp l9f17 ; 0000FFDD E9379F '.7.'
|
||||||
|
|
||||||
mov dh,0x7f ; 0000FFE0 B67F '..'
|
dw 0x7FB6 ; 0000FFE0 B67F
|
||||||
mov si,0x477f ; 0000FFE2 BE7F47 '..G'
|
dw 0x7FBE ; 0000FFE2 BE7F
|
||||||
xor al,0x4a ; 0000FFE5 344A '4J'
|
db 'G4J 03COMPAQ' ; 0000FFE4 47344A203033434F4D504151
|
||||||
and [bx+si],dh ; 0000FFE7 2030 ' 0'
|
jmp 0xf000:0xf905 ; 0000FFF0 EA05F900F0
|
||||||
xor ax,[bp+di+0x4f] ; 0000FFE9 33434F '3CO'
|
|
||||||
dec bp ; 0000FFEC 4D 'M'
|
|
||||||
push ax ; 0000FFED 50 'P'
|
|
||||||
inc cx ; 0000FFEE 41 'A'
|
|
||||||
push cx ; 0000FFEF 51 'Q'
|
|
||||||
jmp 0xf000:0xf905 ; 0000FFF0 EA05F900F0 '.....'
|
|
||||||
|
|
||||||
and [bx+si],dh ; 0000FFF5 2030 ' 0'
|
db ' 01/28/88'
|
||||||
xor [bx],bp ; 0000FFF7 312F '1/'
|
db 0xFC ; 0000FFFE FC
|
||||||
xor bh,[bx+si] ; 0000FFF9 3238 '28'
|
db 0x98 ; 0000FFFF 98
|
||||||
das ; 0000FFFB 2F '/'
|
|
||||||
cmp [bx+si],bh ; 0000FFFC 3838 '88'
|
|
||||||
cld ; 0000FFFE FC '.'
|
|
||||||
cbw ; 0000FFFF 98 '.'
|
|
||||||
|
|
|
||||||
|
|
@ -199,7 +199,7 @@ function loadMachine(sFile)
|
||||||
* do with "package.json". Also note that require() assumes the same path as that of the
|
* do with "package.json". Also note that require() assumes the same path as that of the
|
||||||
* requiring file, whereas fs.readFileSync() assumes the path reported by process.cwd().
|
* requiring file, whereas fs.readFileSync() assumes the path reported by process.cwd().
|
||||||
*
|
*
|
||||||
* TODO: I've since removed the comments from my sample "machine.json" file, so we could
|
* TODO: I've since removed the comments from my sample "ibm5150.json" file, so we could
|
||||||
* try to reinstate this code; however, there are still hex constants, which I find *much*
|
* try to reinstate this code; however, there are still hex constants, which I find *much*
|
||||||
* preferable to the decimal equivalents. JSON's restrictions continue to infuriate me.
|
* preferable to the decimal equivalents. JSON's restrictions continue to infuriate me.
|
||||||
*
|
*
|
||||||
|
|
|
||||||
81
modules/pcjs/bin/romtests.json
Normal file
81
modules/pcjs/bin/romtests.json
Normal file
|
|
@ -0,0 +1,81 @@
|
||||||
|
{
|
||||||
|
"computer": {
|
||||||
|
"id": "pc386.computer",
|
||||||
|
"name": "Compaq DeskPro 386",
|
||||||
|
"resume": 0,
|
||||||
|
"state": ""
|
||||||
|
},
|
||||||
|
"ram": [
|
||||||
|
{ "id": "pc386.ramLow",
|
||||||
|
"name": "",
|
||||||
|
"addr": 0x00000,
|
||||||
|
"size": 0xa0000,
|
||||||
|
"test": false
|
||||||
|
}
|
||||||
|
],
|
||||||
|
"rom": [
|
||||||
|
{ "id": "pc386.romTests",
|
||||||
|
"name": "",
|
||||||
|
"addr": 0xf0000,
|
||||||
|
"size": 0x10000,
|
||||||
|
"file": "/tests/pc/80386/tests.json",
|
||||||
|
"notify": ""
|
||||||
|
}
|
||||||
|
],
|
||||||
|
"video": [
|
||||||
|
{ "id": "pc386.videoMDA",
|
||||||
|
"name": "Monochrome Display",
|
||||||
|
"model": "",
|
||||||
|
"mode": 7,
|
||||||
|
"screenWidth": 720,
|
||||||
|
"screenHeight": 350,
|
||||||
|
"scale": true,
|
||||||
|
"charCols": 80,
|
||||||
|
"charRows": 25,
|
||||||
|
"fontROM": "/devices/pc/video/ibm-mda-cga.json",
|
||||||
|
"screenColor": "black",
|
||||||
|
"touchScreen": false
|
||||||
|
}
|
||||||
|
],
|
||||||
|
"cpu": {
|
||||||
|
"id": "pc386.cpu",
|
||||||
|
"name": "",
|
||||||
|
"model": 80386,
|
||||||
|
"clock": 0,
|
||||||
|
"multiplier": 1,
|
||||||
|
"autoStart": true,
|
||||||
|
"csStart": -1,
|
||||||
|
"csInterval": -1,
|
||||||
|
"csStop": -1
|
||||||
|
},
|
||||||
|
"keyboard": {
|
||||||
|
"id": "pc386.keyboard",
|
||||||
|
"name": "",
|
||||||
|
"model": ""
|
||||||
|
},
|
||||||
|
"fdc": {
|
||||||
|
"id": "pc386.fdcNEC",
|
||||||
|
"name": "",
|
||||||
|
"autoMount": {
|
||||||
|
"A": {
|
||||||
|
"name": "PC-DOS 2.00 (Disk 1)",
|
||||||
|
"path": "/disks/pc/dos/ibm/2.00/PCDOS200-DISK1.json"
|
||||||
|
},
|
||||||
|
"B": {
|
||||||
|
"name": "PC-DOS 2.00 (Disk 2)",
|
||||||
|
"path": "/disks/pc/dos/ibm/2.00/PCDOS200-DISK2.json"
|
||||||
|
}
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"chipset": {
|
||||||
|
"id": "pc386.chipset",
|
||||||
|
"name": "",
|
||||||
|
"model": "deskpro386",
|
||||||
|
"sound": false
|
||||||
|
},
|
||||||
|
"debugger": {
|
||||||
|
"id": "pc386.debugger",
|
||||||
|
"name": "",
|
||||||
|
"messages": ""
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
@ -577,6 +577,7 @@ if (DEBUGGER) {
|
||||||
* [0]: {number} of the opcode name (see INS.*)
|
* [0]: {number} of the opcode name (see INS.*)
|
||||||
* [1]: {number} containing the destination operand descriptor bit(s)
|
* [1]: {number} containing the destination operand descriptor bit(s)
|
||||||
* [2]: {number} containing the source operand descriptor bit(s)
|
* [2]: {number} containing the source operand descriptor bit(s)
|
||||||
|
* [3]: {number} containing optional third operand descriptor bit(s)
|
||||||
*
|
*
|
||||||
* These sub-elements are all optional. If [0] is not present, the opcode is undefined; if [1] is not
|
* These sub-elements are all optional. If [0] is not present, the opcode is undefined; if [1] is not
|
||||||
* present (or contains zero), the opcode has no (or only implied) operands; and if [2] is not present,
|
* present (or contains zero), the opcode has no (or only implied) operands; and if [2] is not present,
|
||||||
|
|
@ -873,18 +874,22 @@ if (DEBUGGER) {
|
||||||
];
|
];
|
||||||
|
|
||||||
Debugger.aaOp0FDescs = {
|
Debugger.aaOp0FDescs = {
|
||||||
0x00: [Debugger.INS.GRP6, Debugger.TYPE_MODRM | Debugger.TYPE_WORD | Debugger.TYPE_BOTH],
|
0x00: [Debugger.INS.GRP6, Debugger.TYPE_MODRM | Debugger.TYPE_WORD | Debugger.TYPE_BOTH],
|
||||||
0x01: [Debugger.INS.GRP7, Debugger.TYPE_MODRM | Debugger.TYPE_WORD | Debugger.TYPE_BOTH],
|
0x01: [Debugger.INS.GRP7, Debugger.TYPE_MODRM | Debugger.TYPE_WORD | Debugger.TYPE_BOTH],
|
||||||
0x02: [Debugger.INS.LAR, Debugger.TYPE_REG | Debugger.TYPE_WORD | Debugger.TYPE_OUT | Debugger.TYPE_80286, Debugger.TYPE_MEM | Debugger.TYPE_WORD | Debugger.TYPE_IN],
|
0x02: [Debugger.INS.LAR, Debugger.TYPE_REG | Debugger.TYPE_WORD | Debugger.TYPE_OUT | Debugger.TYPE_80286, Debugger.TYPE_MEM | Debugger.TYPE_WORD | Debugger.TYPE_IN],
|
||||||
0x03: [Debugger.INS.LSL, Debugger.TYPE_REG | Debugger.TYPE_WORD | Debugger.TYPE_OUT | Debugger.TYPE_80286, Debugger.TYPE_MEM | Debugger.TYPE_WORD | Debugger.TYPE_IN],
|
0x03: [Debugger.INS.LSL, Debugger.TYPE_REG | Debugger.TYPE_WORD | Debugger.TYPE_OUT | Debugger.TYPE_80286, Debugger.TYPE_MEM | Debugger.TYPE_WORD | Debugger.TYPE_IN],
|
||||||
0x05: [Debugger.INS.LOADALL,Debugger.TYPE_80286],
|
0x05: [Debugger.INS.LOADALL,Debugger.TYPE_80286],
|
||||||
0x06: [Debugger.INS.CLTS, Debugger.TYPE_80286],
|
0x06: [Debugger.INS.CLTS, Debugger.TYPE_80286],
|
||||||
0x20: [Debugger.INS.MOV, Debugger.TYPE_REG | Debugger.TYPE_DWORD | Debugger.TYPE_OUT | Debugger.TYPE_80386, Debugger.TYPE_CTLREG | Debugger.TYPE_DWORD | Debugger.TYPE_IN],
|
0x20: [Debugger.INS.MOV, Debugger.TYPE_REG | Debugger.TYPE_DWORD | Debugger.TYPE_OUT | Debugger.TYPE_80386, Debugger.TYPE_CTLREG | Debugger.TYPE_DWORD | Debugger.TYPE_IN],
|
||||||
0x22: [Debugger.INS.MOV, Debugger.TYPE_CTLREG | Debugger.TYPE_DWORD | Debugger.TYPE_OUT | Debugger.TYPE_80386, Debugger.TYPE_REG | Debugger.TYPE_DWORD | Debugger.TYPE_IN],
|
0x22: [Debugger.INS.MOV, Debugger.TYPE_CTLREG | Debugger.TYPE_DWORD | Debugger.TYPE_OUT | Debugger.TYPE_80386, Debugger.TYPE_REG | Debugger.TYPE_DWORD | Debugger.TYPE_IN],
|
||||||
0xA0: [Debugger.INS.PUSH, Debugger.TYPE_FS | Debugger.TYPE_IN | Debugger.TYPE_80386],
|
0xA0: [Debugger.INS.PUSH, Debugger.TYPE_FS | Debugger.TYPE_IN | Debugger.TYPE_80386],
|
||||||
0xA1: [Debugger.INS.POP, Debugger.TYPE_FS | Debugger.TYPE_OUT | Debugger.TYPE_80386],
|
0xA1: [Debugger.INS.POP, Debugger.TYPE_FS | Debugger.TYPE_OUT | Debugger.TYPE_80386],
|
||||||
0xA8: [Debugger.INS.PUSH, Debugger.TYPE_GS | Debugger.TYPE_IN | Debugger.TYPE_80386],
|
0xA4: [Debugger.INS.SHLD, Debugger.TYPE_MODRM | Debugger.TYPE_WORDV | Debugger.TYPE_OUT | Debugger.TYPE_80386, Debugger.TYPE_REG | Debugger.TYPE_WORDV | Debugger.TYPE_IN, Debugger.TYPE_IMM | Debugger.TYPE_BYTE | Debugger.TYPE_IN],
|
||||||
0xA9: [Debugger.INS.POP, Debugger.TYPE_GS | Debugger.TYPE_OUT | Debugger.TYPE_80386]
|
0xA5: [Debugger.INS.SHLD, Debugger.TYPE_MODRM | Debugger.TYPE_WORDV | Debugger.TYPE_OUT | Debugger.TYPE_80386, Debugger.TYPE_REG | Debugger.TYPE_WORDV | Debugger.TYPE_IN, Debugger.TYPE_IMPREG | Debugger.TYPE_CL | Debugger.TYPE_IN],
|
||||||
|
0xA8: [Debugger.INS.PUSH, Debugger.TYPE_GS | Debugger.TYPE_IN | Debugger.TYPE_80386],
|
||||||
|
0xA9: [Debugger.INS.POP, Debugger.TYPE_GS | Debugger.TYPE_OUT | Debugger.TYPE_80386],
|
||||||
|
0xAC: [Debugger.INS.SHRD, Debugger.TYPE_MODRM | Debugger.TYPE_WORDV | Debugger.TYPE_OUT | Debugger.TYPE_80386, Debugger.TYPE_REG | Debugger.TYPE_WORDV | Debugger.TYPE_IN, Debugger.TYPE_IMM | Debugger.TYPE_BYTE | Debugger.TYPE_IN],
|
||||||
|
0xAD: [Debugger.INS.SHRD, Debugger.TYPE_MODRM | Debugger.TYPE_WORDV | Debugger.TYPE_OUT | Debugger.TYPE_80386, Debugger.TYPE_REG | Debugger.TYPE_WORDV | Debugger.TYPE_IN, Debugger.TYPE_IMPREG | Debugger.TYPE_CL | Debugger.TYPE_IN]
|
||||||
};
|
};
|
||||||
|
|
||||||
Debugger.aaGrpDescs = [
|
Debugger.aaGrpDescs = [
|
||||||
|
|
@ -2934,7 +2939,7 @@ if (DEBUGGER) {
|
||||||
}
|
}
|
||||||
|
|
||||||
var sOpcode = Debugger.INS_NAMES[aOpDesc[0]];
|
var sOpcode = Debugger.INS_NAMES[aOpDesc[0]];
|
||||||
var cOperands = 2;
|
var cOperands = aOpDesc.length - 1;
|
||||||
var sOperands = "";
|
var sOperands = "";
|
||||||
if (this.isStringIns(bOpcode)) {
|
if (this.isStringIns(bOpcode)) {
|
||||||
cOperands = 0; // suppress display of operands for string instructions
|
cOperands = 0; // suppress display of operands for string instructions
|
||||||
|
|
|
||||||
|
|
@ -423,6 +423,122 @@ X86CPU.CYCLES_80286 = {
|
||||||
};
|
};
|
||||||
|
|
||||||
X86CPU.CYCLES_80386 = {
|
X86CPU.CYCLES_80386 = {
|
||||||
|
nWordCyclePenalty: 0,
|
||||||
|
nEACyclesBase: 0,
|
||||||
|
nEACyclesDisp: 0,
|
||||||
|
nEACyclesBaseIndex: 0,
|
||||||
|
nEACyclesBaseIndexExtra: 0,
|
||||||
|
nEACyclesBaseDisp: 0,
|
||||||
|
nEACyclesBaseIndexDisp: 1,
|
||||||
|
nEACyclesBaseIndexDispExtra:1,
|
||||||
|
nOpCyclesAAA: 3,
|
||||||
|
nOpCyclesAAD: 14,
|
||||||
|
nOpCyclesAAM: 16,
|
||||||
|
nOpCyclesArithRR: 2,
|
||||||
|
nOpCyclesArithRM: 7,
|
||||||
|
nOpCyclesArithMR: 7,
|
||||||
|
nOpCyclesArithMID: 0,
|
||||||
|
nOpCyclesCall: 7, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesCallF: 13, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesCallWR: 7, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesCallWM: 11, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesCallDM: 16, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesCLI: 3,
|
||||||
|
nOpCyclesCompareRM: 6,
|
||||||
|
nOpCyclesCWD: 2,
|
||||||
|
nOpCyclesBound: 13,
|
||||||
|
nOpCyclesInP: 5,
|
||||||
|
nOpCyclesInDX: 5,
|
||||||
|
nOpCyclesIncR: 2,
|
||||||
|
nOpCyclesIncM: 7,
|
||||||
|
nOpCyclesInt: 23, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesInt3D: 0,
|
||||||
|
nOpCyclesIntOD: 1,
|
||||||
|
nOpCyclesIntOFall: 3,
|
||||||
|
nOpCyclesIRet: 17, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesJmp: 7, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesJmpF: 11, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesJmpC: 7, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesJmpCFall: 3,
|
||||||
|
nOpCyclesJmpWR: 7, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesJmpWM: 11, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesJmpDM: 15, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesLAHF: 2,
|
||||||
|
nOpCyclesLEA: 3,
|
||||||
|
nOpCyclesLS: 7,
|
||||||
|
nOpCyclesLoop: 8, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesLoopZ: 8, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesLoopNZ: 8, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesLoopFall: 4,
|
||||||
|
nOpCyclesLoopZFall: 4,
|
||||||
|
nOpCyclesMovRR: 2, // this is actually the same as the 8086...
|
||||||
|
nOpCyclesMovRM: 3,
|
||||||
|
nOpCyclesMovMR: 5,
|
||||||
|
nOpCyclesMovRI: 2,
|
||||||
|
nOpCyclesMovMI: 3,
|
||||||
|
nOpCyclesMovAM: 5, // this is actually slower than the MOD/RM form of MOV AX,mem (see nOpCyclesMovRM)
|
||||||
|
nOpCyclesMovMA: 3,
|
||||||
|
nOpCyclesDivBR: 14,
|
||||||
|
nOpCyclesDivWR: 22,
|
||||||
|
nOpCyclesDivBM: 17,
|
||||||
|
nOpCyclesDivWM: 25,
|
||||||
|
nOpCyclesIDivBR: 17,
|
||||||
|
nOpCyclesIDivWR: 25,
|
||||||
|
nOpCyclesIDivBM: 20,
|
||||||
|
nOpCyclesIDivWM: 28,
|
||||||
|
nOpCyclesMulBR: 13,
|
||||||
|
nOpCyclesMulWR: 21,
|
||||||
|
nOpCyclesMulBM: 16,
|
||||||
|
nOpCyclesMulWM: 24,
|
||||||
|
nOpCyclesIMulBR: 13,
|
||||||
|
nOpCyclesIMulWR: 21,
|
||||||
|
nOpCyclesIMulBM: 16,
|
||||||
|
nOpCyclesIMulWM: 24,
|
||||||
|
nOpCyclesNegR: 2,
|
||||||
|
nOpCyclesNegM: 7,
|
||||||
|
nOpCyclesOutP: 5,
|
||||||
|
nOpCyclesOutDX: 5,
|
||||||
|
nOpCyclesPopAll: 19,
|
||||||
|
nOpCyclesPopReg: 5,
|
||||||
|
nOpCyclesPopMem: 5,
|
||||||
|
nOpCyclesPushAll: 17,
|
||||||
|
nOpCyclesPushReg: 3,
|
||||||
|
nOpCyclesPushMem: 5,
|
||||||
|
nOpCyclesPushSeg: 3,
|
||||||
|
nOpCyclesPrefix: 0,
|
||||||
|
nOpCyclesCmpS: 8,
|
||||||
|
nOpCyclesCmpSr0: 5,
|
||||||
|
nOpCyclesCmpSrn: 9,
|
||||||
|
nOpCyclesLodS: 5,
|
||||||
|
nOpCyclesLodSr0: 5,
|
||||||
|
nOpCyclesLodSrn: 4,
|
||||||
|
nOpCyclesMovS: 5,
|
||||||
|
nOpCyclesMovSr0: 5,
|
||||||
|
nOpCyclesMovSrn: 4,
|
||||||
|
nOpCyclesScaS: 7,
|
||||||
|
nOpCyclesScaSr0: 5,
|
||||||
|
nOpCyclesScaSrn: 8,
|
||||||
|
nOpCyclesStoS: 3,
|
||||||
|
nOpCyclesStoSr0: 4,
|
||||||
|
nOpCyclesStoSrn: 3,
|
||||||
|
nOpCyclesRet: 11, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesRetn: 11, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesRetF: 15, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesRetFn: 15, // on the 80286, this ALSO includes the number of bytes in the target instruction
|
||||||
|
nOpCyclesShift1M: 7,
|
||||||
|
nOpCyclesShiftCR: 5,
|
||||||
|
nOpCyclesShiftCM: 8,
|
||||||
|
nOpCyclesShiftCS: 0,
|
||||||
|
nOpCyclesTestRR: 2,
|
||||||
|
nOpCyclesTestRM: 6,
|
||||||
|
nOpCyclesTestRI: 3,
|
||||||
|
nOpCyclesTestMI: 6,
|
||||||
|
nOpCyclesXchgRR: 3,
|
||||||
|
nOpCyclesXchgRM: 5,
|
||||||
|
nOpCyclesXLAT: 5,
|
||||||
|
/*
|
||||||
|
* Cycle counts unique to the 80386
|
||||||
|
*/
|
||||||
nOpCyclesBitScan: 11,
|
nOpCyclesBitScan: 11,
|
||||||
nOpCyclesBitSetR: 6,
|
nOpCyclesBitSetR: 6,
|
||||||
nOpCyclesBitSetM: 8,
|
nOpCyclesBitSetM: 8,
|
||||||
|
|
@ -715,10 +831,7 @@ X86CPU.prototype.initProcessor = function()
|
||||||
this.OPFLAG_NOINTR_8086 = X86.OPFLAG.NOINTR;
|
this.OPFLAG_NOINTR_8086 = X86.OPFLAG.NOINTR;
|
||||||
this.nShiftCountMask = 0xff; // on an 8086/8088, all shift counts are used as-is
|
this.nShiftCountMask = 0xff; // on an 8086/8088, all shift counts are used as-is
|
||||||
|
|
||||||
/*
|
this.cycleCounts = (this.model == X86.MODEL_80386? X86CPU.CYCLES_80386 : (this.model == X86.MODEL_80286? X86CPU.CYCLES_80286 : X86CPU.CYCLES_8088));
|
||||||
* TODO: Create an 80386-specific CYCLES table.
|
|
||||||
*/
|
|
||||||
this.CYCLES = (this.model >= X86.MODEL_80286? X86CPU.CYCLES_80286 : X86CPU.CYCLES_8088);
|
|
||||||
|
|
||||||
this.aOps = X86.aOps;
|
this.aOps = X86.aOps;
|
||||||
this.aOpGrp4b = X86.aOpGrp4b;
|
this.aOpGrp4b = X86.aOpGrp4b;
|
||||||
|
|
@ -2432,7 +2545,7 @@ X86CPU.prototype.getShort = function(addr)
|
||||||
* On the 8088, it takes 4 cycles to read the additional byte REGARDLESS whether the address is odd or even.
|
* On the 8088, it takes 4 cycles to read the additional byte REGARDLESS whether the address is odd or even.
|
||||||
* TODO: For the 8086, the penalty is actually "(addr & 0x1) << 2" (4 additional cycles only when the address is odd).
|
* TODO: For the 8086, the penalty is actually "(addr & 0x1) << 2" (4 additional cycles only when the address is odd).
|
||||||
*/
|
*/
|
||||||
this.nStepCycles -= this.CYCLES.nWordCyclePenalty;
|
this.nStepCycles -= this.cycleCounts.nWordCyclePenalty;
|
||||||
|
|
||||||
if (BACKTRACK) {
|
if (BACKTRACK) {
|
||||||
this.backTrack.btiMemLo = this.bus.readBackTrack(addr);
|
this.backTrack.btiMemLo = this.bus.readBackTrack(addr);
|
||||||
|
|
@ -2494,7 +2607,7 @@ X86CPU.prototype.setShort = function(addr, w)
|
||||||
* On the 8088, it takes 4 cycles to write the additional byte REGARDLESS whether the address is odd or even.
|
* On the 8088, it takes 4 cycles to write the additional byte REGARDLESS whether the address is odd or even.
|
||||||
* TODO: For the 8086, the penalty is actually "(addr & 0x1) << 2" (4 additional cycles only when the address is odd).
|
* TODO: For the 8086, the penalty is actually "(addr & 0x1) << 2" (4 additional cycles only when the address is odd).
|
||||||
*/
|
*/
|
||||||
this.nStepCycles -= this.CYCLES.nWordCyclePenalty;
|
this.nStepCycles -= this.cycleCounts.nWordCyclePenalty;
|
||||||
|
|
||||||
if (BACKTRACK) {
|
if (BACKTRACK) {
|
||||||
this.bus.writeBackTrack(addr, this.backTrack.btiMemLo);
|
this.bus.writeBackTrack(addr, this.backTrack.btiMemLo);
|
||||||
|
|
@ -2519,7 +2632,7 @@ X86CPU.prototype.setLong = function(addr, l)
|
||||||
{
|
{
|
||||||
var off = addr & this.blockLimit;
|
var off = addr & this.blockLimit;
|
||||||
var iBlock = (addr & this.busMask) >>> this.blockShift;
|
var iBlock = (addr & this.busMask) >>> this.blockShift;
|
||||||
this.nStepCycles -= this.CYCLES.nWordCyclePenalty;
|
this.nStepCycles -= this.cycleCounts.nWordCyclePenalty;
|
||||||
|
|
||||||
if (BACKTRACK) {
|
if (BACKTRACK) {
|
||||||
this.bus.writeBackTrack(addr, this.backTrack.btiMemLo);
|
this.bus.writeBackTrack(addr, this.backTrack.btiMemLo);
|
||||||
|
|
|
||||||
|
|
@ -49,7 +49,7 @@ X86.fnADCb = function ADCb(dst, src)
|
||||||
{
|
{
|
||||||
var b = (dst + src + this.getCarry())|0;
|
var b = (dst + src + this.getCarry())|0;
|
||||||
this.setArithResult(dst, src, b, X86.RESULT.BYTE | X86.RESULT.ALL);
|
this.setArithResult(dst, src, b, X86.RESULT.BYTE | X86.RESULT.ALL);
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesArithRR : this.CYCLES.nOpCyclesArithRM) : this.CYCLES.nOpCyclesArithMR);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
|
||||||
return b & 0xff;
|
return b & 0xff;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -65,7 +65,7 @@ X86.fnADCw = function ADCw(dst, src)
|
||||||
{
|
{
|
||||||
var w = (dst + src + this.getCarry())|0;
|
var w = (dst + src + this.getCarry())|0;
|
||||||
this.setArithResult(dst, src, w, X86.RESULT.WORD | X86.RESULT.ALL);
|
this.setArithResult(dst, src, w, X86.RESULT.WORD | X86.RESULT.ALL);
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesArithRR : this.CYCLES.nOpCyclesArithRM) : this.CYCLES.nOpCyclesArithMR);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
|
||||||
return w & 0xffff;
|
return w & 0xffff;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -81,7 +81,7 @@ X86.fnADDb = function ADDb(dst, src)
|
||||||
{
|
{
|
||||||
var b = (dst + src)|0;
|
var b = (dst + src)|0;
|
||||||
this.setArithResult(dst, src, b, X86.RESULT.BYTE | X86.RESULT.ALL);
|
this.setArithResult(dst, src, b, X86.RESULT.BYTE | X86.RESULT.ALL);
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesArithRR : this.CYCLES.nOpCyclesArithRM) : this.CYCLES.nOpCyclesArithMR);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
|
||||||
return b & 0xff;
|
return b & 0xff;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -97,7 +97,7 @@ X86.fnADDw = function ADDw(dst, src)
|
||||||
{
|
{
|
||||||
var w = (dst + src)|0;
|
var w = (dst + src)|0;
|
||||||
this.setArithResult(dst, src, w, X86.RESULT.WORD | X86.RESULT.ALL);
|
this.setArithResult(dst, src, w, X86.RESULT.WORD | X86.RESULT.ALL);
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesArithRR : this.CYCLES.nOpCyclesArithRM) : this.CYCLES.nOpCyclesArithMR);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
|
||||||
return w & 0xffff;
|
return w & 0xffff;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -113,7 +113,7 @@ X86.fnANDb = function ANDb(dst, src)
|
||||||
{
|
{
|
||||||
var b = dst & src;
|
var b = dst & src;
|
||||||
this.setLogicResult(b, X86.RESULT.BYTE);
|
this.setLogicResult(b, X86.RESULT.BYTE);
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesArithRR : this.CYCLES.nOpCyclesArithRM) : this.CYCLES.nOpCyclesArithMR);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
|
||||||
return b;
|
return b;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -129,7 +129,7 @@ X86.fnANDw = function ANDw(dst, src)
|
||||||
{
|
{
|
||||||
var w = dst & src;
|
var w = dst & src;
|
||||||
this.setLogicResult(w, X86.RESULT.WORD);
|
this.setLogicResult(w, X86.RESULT.WORD);
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesArithRR : this.CYCLES.nOpCyclesArithRM) : this.CYCLES.nOpCyclesArithMR);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
|
||||||
return w;
|
return w;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -143,7 +143,7 @@ X86.fnANDw = function ANDw(dst, src)
|
||||||
*/
|
*/
|
||||||
X86.fnANDd = function ANDd(dst, src)
|
X86.fnANDd = function ANDd(dst, src)
|
||||||
{
|
{
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesArithRR : this.CYCLES.nOpCyclesArithRM) : this.CYCLES.nOpCyclesArithMR);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
|
||||||
return this.setLogicResult(dst & src, X86.RESULT.DWORD);
|
return this.setLogicResult(dst & src, X86.RESULT.DWORD);
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -190,12 +190,12 @@ X86.fnBOUND = function BOUND(dst, src)
|
||||||
var wIndex = (dst << 16) >> 16;
|
var wIndex = (dst << 16) >> 16;
|
||||||
var wLower = (this.getShort(this.regEA) << 16) >> 16;
|
var wLower = (this.getShort(this.regEA) << 16) >> 16;
|
||||||
var wUpper = (this.getShort(this.regEA + 2) << 16) >> 16;
|
var wUpper = (this.getShort(this.regEA + 2) << 16) >> 16;
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesBound;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesBound;
|
||||||
if (wIndex < wLower || wIndex > wUpper) {
|
if (wIndex < wLower || wIndex > wUpper) {
|
||||||
/*
|
/*
|
||||||
* The INT 0x05 handler must be called with CS:IP pointing to the BOUND instruction.
|
* The INT 0x05 handler must be called with CS:IP pointing to the BOUND instruction.
|
||||||
*
|
*
|
||||||
* TODO: Determine the cycle cost when a BOUND exception is triggered, over and above nOpCyclesBound.
|
* TODO: Determine the cycle cost when a BOUND exception is triggered, over and above nCyclesBound.
|
||||||
*/
|
*/
|
||||||
this.setIP(this.opLIP - this.segCS.base);
|
this.setIP(this.opLIP - this.segCS.base);
|
||||||
X86.fnINT.call(this, X86.EXCEPTION.BOUND_ERR, null, 0);
|
X86.fnINT.call(this, X86.EXCEPTION.BOUND_ERR, null, 0);
|
||||||
|
|
@ -235,7 +235,7 @@ X86.fnBSF = function BSF(dst, src)
|
||||||
i++;
|
i++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
this.nStepCycles -= X86CPU.CYCLES_80386.nOpCyclesBitScan + i * 3;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesBitScan + i * 3;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -270,7 +270,7 @@ X86.fnBSR = function BSR(dst, src)
|
||||||
i--;
|
i--;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
this.nStepCycles -= X86CPU.CYCLES_80386.nOpCyclesBitScan + (j - i) * 3;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesBitScan + (j - i) * 3;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -285,7 +285,7 @@ X86.fnBSR = function BSR(dst, src)
|
||||||
X86.fnBT = function BT(dst, src)
|
X86.fnBT = function BT(dst, src)
|
||||||
{
|
{
|
||||||
if (dst & (1 << (src & 0x1f))) this.setCF(); else this.clearCF();
|
if (dst & (1 << (src & 0x1f))) this.setCF(); else this.clearCF();
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? X86CPU.CYCLES_80386.nOpCyclesBitTestR : X86CPU.CYCLES_80386.nOpCyclesBitTestM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesBitTestR : this.cycleCounts.nOpCyclesBitTestM);
|
||||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
@ -302,7 +302,7 @@ X86.fnBTC = function BTC(dst, src)
|
||||||
{
|
{
|
||||||
var bit = 1 << (src & 0x1f);
|
var bit = 1 << (src & 0x1f);
|
||||||
if (dst & bit) this.setCF(); else this.clearCF();
|
if (dst & bit) this.setCF(); else this.clearCF();
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? X86CPU.CYCLES_80386.nOpCyclesBitSetR : X86CPU.CYCLES_80386.nOpCyclesBitSetM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesBitSetR : this.cycleCounts.nOpCyclesBitSetM);
|
||||||
return dst ^ bit;
|
return dst ^ bit;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -318,7 +318,7 @@ X86.fnBTR = function BTR(dst, src)
|
||||||
{
|
{
|
||||||
var bit = 1 << (src & 0x1f);
|
var bit = 1 << (src & 0x1f);
|
||||||
if (dst & bit) this.setCF(); else this.clearCF();
|
if (dst & bit) this.setCF(); else this.clearCF();
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? X86CPU.CYCLES_80386.nOpCyclesBitSetR : X86CPU.CYCLES_80386.nOpCyclesBitSetM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesBitSetR : this.cycleCounts.nOpCyclesBitSetM);
|
||||||
return dst & ~bit;
|
return dst & ~bit;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -334,7 +334,7 @@ X86.fnBTS = function BTS(dst, src)
|
||||||
{
|
{
|
||||||
var bit = 1 << (src & 0x1f);
|
var bit = 1 << (src & 0x1f);
|
||||||
if (dst & bit) this.setCF(); else this.clearCF();
|
if (dst & bit) this.setCF(); else this.clearCF();
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? X86CPU.CYCLES_80386.nOpCyclesBitSetR : X86CPU.CYCLES_80386.nOpCyclesBitSetM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesBitSetR : this.cycleCounts.nOpCyclesBitSetM);
|
||||||
return dst | bit;
|
return dst | bit;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -350,7 +350,7 @@ X86.fnCALLw = function CALLw(dst, src)
|
||||||
{
|
{
|
||||||
this.pushWord(this.getIP());
|
this.pushWord(this.getIP());
|
||||||
this.setIP(dst);
|
this.setIP(dst);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesCallWR : this.CYCLES.nOpCyclesCallWM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesCallWR : this.cycleCounts.nOpCyclesCallWM);
|
||||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
@ -389,7 +389,7 @@ X86.fnCALLFdw = function CALLFdw(dst, src)
|
||||||
return X86.fnGRPUndefined.call(this, dst, src);
|
return X86.fnGRPUndefined.call(this, dst, src);
|
||||||
}
|
}
|
||||||
X86.fnCALLF.call(this, dst, this.getShort(this.regEA + 2));
|
X86.fnCALLF.call(this, dst, this.getShort(this.regEA + 2));
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesCallDM;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesCallDM;
|
||||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
@ -406,7 +406,7 @@ X86.fnCMPb = function CMPb(dst, src)
|
||||||
{
|
{
|
||||||
var b = (dst - src)|0;
|
var b = (dst - src)|0;
|
||||||
this.setArithResult(dst, src, b, X86.RESULT.BYTE | X86.RESULT.ALL, true);
|
this.setArithResult(dst, src, b, X86.RESULT.BYTE | X86.RESULT.ALL, true);
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesArithRR : this.CYCLES.nOpCyclesCompareRM) : this.CYCLES.nOpCyclesArithRM);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesCompareRM) : this.cycleCounts.nOpCyclesArithRM);
|
||||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
@ -423,7 +423,7 @@ X86.fnCMPw = function CMPw(dst, src)
|
||||||
{
|
{
|
||||||
var w = (dst - src)|0;
|
var w = (dst - src)|0;
|
||||||
this.setArithResult(dst, src, w, X86.RESULT.WORD | X86.RESULT.ALL, true);
|
this.setArithResult(dst, src, w, X86.RESULT.WORD | X86.RESULT.ALL, true);
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesArithRR : this.CYCLES.nOpCyclesCompareRM) : this.CYCLES.nOpCyclesArithRM);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesCompareRM) : this.cycleCounts.nOpCyclesArithRM);
|
||||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
@ -440,7 +440,7 @@ X86.fnDECb = function DECb(dst, src)
|
||||||
{
|
{
|
||||||
var b = (dst - 1)|0;
|
var b = (dst - 1)|0;
|
||||||
this.setArithResult(dst, 1, b, X86.RESULT.BYTE | X86.RESULT.NOTCF, true);
|
this.setArithResult(dst, 1, b, X86.RESULT.BYTE | X86.RESULT.NOTCF, true);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesIncR : this.CYCLES.nOpCyclesIncM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesIncR : this.cycleCounts.nOpCyclesIncM);
|
||||||
return b & 0xff;
|
return b & 0xff;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -471,7 +471,7 @@ X86.fnDECw = function DECw(dst, src)
|
||||||
{
|
{
|
||||||
var w = (dst - 1)|0;
|
var w = (dst - 1)|0;
|
||||||
this.setArithResult(dst, 1, w, X86.RESULT.WORD | X86.RESULT.NOTCF, true);
|
this.setArithResult(dst, 1, w, X86.RESULT.WORD | X86.RESULT.NOTCF, true);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesIncR : this.CYCLES.nOpCyclesIncM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesIncR : this.cycleCounts.nOpCyclesIncM);
|
||||||
return w & 0xffff;
|
return w & 0xffff;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -508,7 +508,7 @@ X86.fnDIVb = function DIVb(dst, src)
|
||||||
* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
|
* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
|
||||||
*/
|
*/
|
||||||
if (DEBUG && DEBUGGER) this.traceLog('DIVB', src, dst, null, this.getPS(), this.regMD16);
|
if (DEBUG && DEBUGGER) this.traceLog('DIVB', src, dst, null, this.getPS(), this.regMD16);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesDivBR : this.CYCLES.nOpCyclesDivBM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesDivBR : this.cycleCounts.nOpCyclesDivBM);
|
||||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
@ -552,7 +552,7 @@ X86.fnDIVw = function DIVw(dst, src)
|
||||||
* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
|
* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
|
||||||
*/
|
*/
|
||||||
if (DEBUG && DEBUGGER) this.traceLog('DIVW', src, dst, null, this.getPS(), this.regMD16 | (this.regMD32 << 16));
|
if (DEBUG && DEBUGGER) this.traceLog('DIVW', src, dst, null, this.getPS(), this.regMD16 | (this.regMD32 << 16));
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesDivWR : this.CYCLES.nOpCyclesDivWM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesDivWR : this.cycleCounts.nOpCyclesDivWM);
|
||||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
@ -611,7 +611,7 @@ X86.fnIDIVb = function IDIVb(dst, src)
|
||||||
* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
|
* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
|
||||||
*/
|
*/
|
||||||
if (DEBUG && DEBUGGER) this.traceLog('IDIVB', src, dst, null, this.getPS(), this.regMD16);
|
if (DEBUG && DEBUGGER) this.traceLog('IDIVB', src, dst, null, this.getPS(), this.regMD16);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesIDivBR : this.CYCLES.nOpCyclesIDivBM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesIDivBR : this.cycleCounts.nOpCyclesIDivBM);
|
||||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
@ -660,7 +660,7 @@ X86.fnIDIVw = function IDIVw(dst, src)
|
||||||
* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
|
* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
|
||||||
*/
|
*/
|
||||||
if (DEBUG && DEBUGGER) this.traceLog('IDIVW', src, dst, null, this.getPS(), this.regMD16 | (this.regMD32 << 16));
|
if (DEBUG && DEBUGGER) this.traceLog('IDIVW', src, dst, null, this.getPS(), this.regMD16 | (this.regMD32 << 16));
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesIDivWR : this.CYCLES.nOpCyclesIDivWM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesIDivWR : this.cycleCounts.nOpCyclesIDivWM);
|
||||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
@ -774,7 +774,7 @@ X86.fnIMULb = function IMULb(dst, src)
|
||||||
* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
|
* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
|
||||||
*/
|
*/
|
||||||
if (DEBUG && DEBUGGER) this.traceLog('IMULB', src, dst, null, this.getPS(), this.regMD16);
|
if (DEBUG && DEBUGGER) this.traceLog('IMULB', src, dst, null, this.getPS(), this.regMD16);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesIMulBR : this.CYCLES.nOpCyclesIMulBM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesIMulBR : this.cycleCounts.nOpCyclesIMulBM);
|
||||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
@ -817,7 +817,7 @@ X86.fnIMULw = function IMULw(dst, src)
|
||||||
* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
|
* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
|
||||||
*/
|
*/
|
||||||
if (DEBUG && DEBUGGER) this.traceLog('IMULW', src, dst, null, this.getPS(), this.regMD16 | (this.regMD32 << 16));
|
if (DEBUG && DEBUGGER) this.traceLog('IMULW', src, dst, null, this.getPS(), this.regMD16 | (this.regMD32 << 16));
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesIMulWR : this.CYCLES.nOpCyclesIMulWM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesIMulWR : this.cycleCounts.nOpCyclesIMulWM);
|
||||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
@ -839,7 +839,7 @@ X86.fnIMULrw = function IMULrw(dst, src)
|
||||||
this.clearCF(); this.clearOF();
|
this.clearCF(); this.clearOF();
|
||||||
}
|
}
|
||||||
result &= 0xffff;
|
result &= 0xffff;
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? X86CPU.CYCLES_80386.nOpCyclesIMulR : X86CPU.CYCLES_80386.nOpCyclesIMulM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesIMulR : this.cycleCounts.nOpCyclesIMulM);
|
||||||
return result;
|
return result;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -860,7 +860,7 @@ X86.fnIMULrd = function IMULrd(dst, src)
|
||||||
this.clearCF(); this.clearOF();
|
this.clearCF(); this.clearOF();
|
||||||
}
|
}
|
||||||
result |= 0;
|
result |= 0;
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? X86CPU.CYCLES_80386.nOpCyclesIMulR : X86CPU.CYCLES_80386.nOpCyclesIMulM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesIMulR : this.cycleCounts.nOpCyclesIMulM);
|
||||||
return result;
|
return result;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -876,7 +876,7 @@ X86.fnINCb = function INCb(dst, src)
|
||||||
{
|
{
|
||||||
var b = (dst + 1)|0;
|
var b = (dst + 1)|0;
|
||||||
this.setArithResult(dst, 1, b, X86.RESULT.BYTE | X86.RESULT.NOTCF);
|
this.setArithResult(dst, 1, b, X86.RESULT.BYTE | X86.RESULT.NOTCF);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesIncR : this.CYCLES.nOpCyclesIncM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesIncR : this.cycleCounts.nOpCyclesIncM);
|
||||||
return b & 0xff;
|
return b & 0xff;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -907,7 +907,7 @@ X86.fnINCw = function INCw(dst, src)
|
||||||
{
|
{
|
||||||
var w = (dst + 1)|0;
|
var w = (dst + 1)|0;
|
||||||
this.setArithResult(dst, 1, w, X86.RESULT.WORD | X86.RESULT.NOTCF);
|
this.setArithResult(dst, 1, w, X86.RESULT.WORD | X86.RESULT.NOTCF);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesIncR : this.CYCLES.nOpCyclesIncM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesIncR : this.cycleCounts.nOpCyclesIncM);
|
||||||
return w & 0xffff;
|
return w & 0xffff;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -931,7 +931,7 @@ X86.fnINT = function INT(nIDT, nError, nCycles)
|
||||||
/*
|
/*
|
||||||
* TODO: We assess the cycle cost up front, because otherwise, if loadIDT() fails, no cost may be assessed.
|
* TODO: We assess the cycle cost up front, because otherwise, if loadIDT() fails, no cost may be assessed.
|
||||||
*/
|
*/
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesInt + nCycles;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesInt + nCycles;
|
||||||
this.segCS.fCall = true;
|
this.segCS.fCall = true;
|
||||||
var regPS = this.getPS();
|
var regPS = this.getPS();
|
||||||
var regCS = this.getCS();
|
var regCS = this.getCS();
|
||||||
|
|
@ -958,7 +958,7 @@ X86.fnIRET = function IRET()
|
||||||
/*
|
/*
|
||||||
* TODO: We assess a fixed cycle cost up front, because at the moment, switchTSS() doesn't assess anything.
|
* TODO: We assess a fixed cycle cost up front, because at the moment, switchTSS() doesn't assess anything.
|
||||||
*/
|
*/
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesIRet;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesIRet;
|
||||||
if (this.regCR0 & X86.CR0.MSW.PE) {
|
if (this.regCR0 & X86.CR0.MSW.PE) {
|
||||||
if (this.regPS & X86.PS.NT) {
|
if (this.regPS & X86.PS.NT) {
|
||||||
var addrNew = this.segTSS.base;
|
var addrNew = this.segTSS.base;
|
||||||
|
|
@ -988,7 +988,7 @@ X86.fnIRET = function IRET()
|
||||||
X86.fnJMPw = function JMPw(dst, src)
|
X86.fnJMPw = function JMPw(dst, src)
|
||||||
{
|
{
|
||||||
this.setIP(dst);
|
this.setIP(dst);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesJmpWR : this.CYCLES.nOpCyclesJmpWM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesJmpWR : this.cycleCounts.nOpCyclesJmpWM);
|
||||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
@ -1008,7 +1008,7 @@ X86.fnJMPFdw = function JMPFdw(dst, src)
|
||||||
}
|
}
|
||||||
this.setCSIP(dst, this.getShort(this.regEA + 2));
|
this.setCSIP(dst, this.getShort(this.regEA + 2));
|
||||||
if (this.cIntReturn) this.checkIntReturn(this.regLIP);
|
if (this.cIntReturn) this.checkIntReturn(this.regLIP);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpDM;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpDM;
|
||||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
@ -1072,7 +1072,7 @@ X86.fnLDS = function LDS(dst, src)
|
||||||
return dst;
|
return dst;
|
||||||
}
|
}
|
||||||
this.setDS(this.getShort(this.regEA + 2));
|
this.setDS(this.getShort(this.regEA + 2));
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesLS;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesLS;
|
||||||
return src;
|
return src;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -1099,7 +1099,7 @@ X86.fnLEA = function LEA(dst, src)
|
||||||
X86.opUndefined.call(this);
|
X86.opUndefined.call(this);
|
||||||
return dst;
|
return dst;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesLEA;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesLEA;
|
||||||
return this.regEA;
|
return this.regEA;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -1118,7 +1118,7 @@ X86.fnLES = function LES(dst, src)
|
||||||
return dst;
|
return dst;
|
||||||
}
|
}
|
||||||
this.setES(this.getShort(this.regEA + 2));
|
this.setES(this.getShort(this.regEA + 2));
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesLS;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesLS;
|
||||||
return src;
|
return src;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -1137,7 +1137,7 @@ X86.fnLFS = function LFS(dst, src)
|
||||||
return dst;
|
return dst;
|
||||||
}
|
}
|
||||||
this.setFS(this.getShort(this.regEA + 2));
|
this.setFS(this.getShort(this.regEA + 2));
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesLS;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesLS;
|
||||||
return src;
|
return src;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -1183,7 +1183,7 @@ X86.fnLGS = function LGS(dst, src)
|
||||||
return dst;
|
return dst;
|
||||||
}
|
}
|
||||||
this.setGS(this.getShort(this.regEA + 2));
|
this.setGS(this.getShort(this.regEA + 2));
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesLS;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesLS;
|
||||||
return src;
|
return src;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -1296,7 +1296,7 @@ X86.fnLSS = function LSS(dst, src)
|
||||||
return dst;
|
return dst;
|
||||||
}
|
}
|
||||||
this.setSS(this.getShort(this.regEA + 2));
|
this.setSS(this.getShort(this.regEA + 2));
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesLS;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesLS;
|
||||||
return src;
|
return src;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -1331,7 +1331,7 @@ X86.fnLTR = function LTR(dst, src)
|
||||||
*/
|
*/
|
||||||
X86.fnMOV = function MOV(dst, src)
|
X86.fnMOV = function MOV(dst, src)
|
||||||
{
|
{
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesMovRR : this.CYCLES.nOpCyclesMovRM) : this.CYCLES.nOpCyclesMovMR);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesMovRR : this.cycleCounts.nOpCyclesMovRM) : this.cycleCounts.nOpCyclesMovMR);
|
||||||
return src;
|
return src;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -1358,7 +1358,7 @@ X86.fnMOVX = function MOVX(dst, src)
|
||||||
*/
|
*/
|
||||||
X86.fnMOVn = function MOVn(dst, src)
|
X86.fnMOVn = function MOVn(dst, src)
|
||||||
{
|
{
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? this.CYCLES.nOpCyclesMovRI : this.CYCLES.nOpCyclesMovMI);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesMovRI : this.cycleCounts.nOpCyclesMovMI);
|
||||||
return src;
|
return src;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -1398,7 +1398,7 @@ X86.fnMULb = function MULb(dst, src)
|
||||||
* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
|
* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
|
||||||
*/
|
*/
|
||||||
if (DEBUG && DEBUGGER) this.traceLog('MULB', src, dst, null, this.getPS(), this.regMD16);
|
if (DEBUG && DEBUGGER) this.traceLog('MULB', src, dst, null, this.getPS(), this.regMD16);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesMulBR : this.CYCLES.nOpCyclesMulBM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesMulBR : this.cycleCounts.nOpCyclesMulBM);
|
||||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
@ -1428,7 +1428,7 @@ X86.fnMULw = function MULw(dst, src)
|
||||||
* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
|
* dst unchanged). So, to make traceLog() more consistent, we reverse the order of dst and src.
|
||||||
*/
|
*/
|
||||||
if (DEBUG && DEBUGGER) this.traceLog('MULW', src, dst, null, this.getPS(), this.regMD16 | (this.regMD32 << 16));
|
if (DEBUG && DEBUGGER) this.traceLog('MULW', src, dst, null, this.getPS(), this.regMD16 | (this.regMD32 << 16));
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesMulWR : this.CYCLES.nOpCyclesMulWM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesMulWR : this.cycleCounts.nOpCyclesMulWM);
|
||||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
@ -1445,7 +1445,7 @@ X86.fnNEGb = function NEGb(dst, src)
|
||||||
{
|
{
|
||||||
var b = (-dst)|0;
|
var b = (-dst)|0;
|
||||||
this.setArithResult(0, dst, b, X86.RESULT.BYTE | X86.RESULT.ALL, true);
|
this.setArithResult(0, dst, b, X86.RESULT.BYTE | X86.RESULT.ALL, true);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesNegR : this.CYCLES.nOpCyclesNegM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesNegR : this.cycleCounts.nOpCyclesNegM);
|
||||||
return b & 0xff;
|
return b & 0xff;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -1461,7 +1461,7 @@ X86.fnNEGw = function NEGw(dst, src)
|
||||||
{
|
{
|
||||||
var w = (-dst)|0;
|
var w = (-dst)|0;
|
||||||
this.setArithResult(0, dst, w, X86.RESULT.WORD | X86.RESULT.ALL, true);
|
this.setArithResult(0, dst, w, X86.RESULT.WORD | X86.RESULT.ALL, true);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesNegR : this.CYCLES.nOpCyclesNegM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesNegR : this.cycleCounts.nOpCyclesNegM);
|
||||||
return w & 0xffff;
|
return w & 0xffff;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -1475,7 +1475,7 @@ X86.fnNEGw = function NEGw(dst, src)
|
||||||
*/
|
*/
|
||||||
X86.fnNOTb = function NOTb(dst, src)
|
X86.fnNOTb = function NOTb(dst, src)
|
||||||
{
|
{
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesNegR : this.CYCLES.nOpCyclesNegM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesNegR : this.cycleCounts.nOpCyclesNegM);
|
||||||
return dst ^ 0xff;
|
return dst ^ 0xff;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -1489,7 +1489,7 @@ X86.fnNOTb = function NOTb(dst, src)
|
||||||
*/
|
*/
|
||||||
X86.fnNOTw = function NOTw(dst, src)
|
X86.fnNOTw = function NOTw(dst, src)
|
||||||
{
|
{
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesNegR : this.CYCLES.nOpCyclesNegM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesNegR : this.cycleCounts.nOpCyclesNegM);
|
||||||
return dst ^ 0xffff;
|
return dst ^ 0xffff;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -1505,7 +1505,7 @@ X86.fnORb = function ORb(dst, src)
|
||||||
{
|
{
|
||||||
var b = dst | src;
|
var b = dst | src;
|
||||||
this.setLogicResult(b, X86.RESULT.BYTE);
|
this.setLogicResult(b, X86.RESULT.BYTE);
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesArithRR : this.CYCLES.nOpCyclesArithRM) : this.CYCLES.nOpCyclesArithMR);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
|
||||||
return b;
|
return b;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -1521,7 +1521,7 @@ X86.fnORw = function ORw(dst, src)
|
||||||
{
|
{
|
||||||
var w = dst | src;
|
var w = dst | src;
|
||||||
this.setLogicResult(w, X86.RESULT.WORD);
|
this.setLogicResult(w, X86.RESULT.WORD);
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesArithRR : this.CYCLES.nOpCyclesArithRM) : this.CYCLES.nOpCyclesArithMR);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
|
||||||
return w;
|
return w;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -1535,7 +1535,7 @@ X86.fnORw = function ORw(dst, src)
|
||||||
*/
|
*/
|
||||||
X86.fnPOPw = function POPw(dst, src)
|
X86.fnPOPw = function POPw(dst, src)
|
||||||
{
|
{
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? this.CYCLES.nOpCyclesPopReg : this.CYCLES.nOpCyclesPopMem);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesPopReg : this.cycleCounts.nOpCyclesPopMem);
|
||||||
return src;
|
return src;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -1563,7 +1563,7 @@ X86.fnPUSHw = function PUSHw(dst, src)
|
||||||
if (this.model < X86.MODEL_80286) w = dst;
|
if (this.model < X86.MODEL_80286) w = dst;
|
||||||
}
|
}
|
||||||
this.pushWord(w);
|
this.pushWord(w);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesPushReg : this.CYCLES.nOpCyclesPushMem);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesPushReg : this.cycleCounts.nOpCyclesPushMem);
|
||||||
/*
|
/*
|
||||||
* The PUSH is the only write that needs to occur; dst was the source operand and does not need to be rewritten.
|
* The PUSH is the only write that needs to occur; dst was the source operand and does not need to be rewritten.
|
||||||
*/
|
*/
|
||||||
|
|
@ -1941,7 +1941,7 @@ X86.fnSBBb = function SBBb(dst, src)
|
||||||
{
|
{
|
||||||
var b = (dst - src - this.getCarry())|0;
|
var b = (dst - src - this.getCarry())|0;
|
||||||
this.setArithResult(dst, src, b, X86.RESULT.BYTE | X86.RESULT.ALL, true);
|
this.setArithResult(dst, src, b, X86.RESULT.BYTE | X86.RESULT.ALL, true);
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesArithRR : this.CYCLES.nOpCyclesArithRM) : this.CYCLES.nOpCyclesArithMR);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
|
||||||
return b & 0xff;
|
return b & 0xff;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -1957,7 +1957,7 @@ X86.fnSBBw = function SBBw(dst, src)
|
||||||
{
|
{
|
||||||
var w = (dst - src - this.getCarry())|0;
|
var w = (dst - src - this.getCarry())|0;
|
||||||
this.setArithResult(dst, src, w, X86.RESULT.WORD | X86.RESULT.ALL, true);
|
this.setArithResult(dst, src, w, X86.RESULT.WORD | X86.RESULT.ALL, true);
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesArithRR : this.CYCLES.nOpCyclesArithRM) : this.CYCLES.nOpCyclesArithMR);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
|
||||||
return w & 0xffff;
|
return w & 0xffff;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -1971,7 +1971,7 @@ X86.fnSETcc = function SETcc(fnSet)
|
||||||
{
|
{
|
||||||
this.opFlags |= X86.OPFLAG.NOREAD;
|
this.opFlags |= X86.OPFLAG.NOREAD;
|
||||||
this.aOpModMemByte[this.getIPByte()].call(this, fnSet);
|
this.aOpModMemByte[this.getIPByte()].call(this, fnSet);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? X86CPU.CYCLES_80386.nOpCyclesSetR : X86CPU.CYCLES_80386.nOpCyclesSetM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesSetR : this.cycleCounts.nOpCyclesSetM);
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -2615,7 +2615,7 @@ X86.fnSUBb = function SUBb(dst, src)
|
||||||
{
|
{
|
||||||
var b = (dst - src)|0;
|
var b = (dst - src)|0;
|
||||||
this.setArithResult(dst, src, b, X86.RESULT.BYTE | X86.RESULT.ALL, true);
|
this.setArithResult(dst, src, b, X86.RESULT.BYTE | X86.RESULT.ALL, true);
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesArithRR : this.CYCLES.nOpCyclesArithRM) : this.CYCLES.nOpCyclesArithMR);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
|
||||||
return b & 0xff;
|
return b & 0xff;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -2631,7 +2631,7 @@ X86.fnSUBw = function SUBw(dst, src)
|
||||||
{
|
{
|
||||||
var w = (dst - src)|0;
|
var w = (dst - src)|0;
|
||||||
this.setArithResult(dst, src, w, X86.RESULT.WORD | X86.RESULT.ALL, true);
|
this.setArithResult(dst, src, w, X86.RESULT.WORD | X86.RESULT.ALL, true);
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesArithRR : this.CYCLES.nOpCyclesArithRM) : this.CYCLES.nOpCyclesArithMR);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
|
||||||
return w & 0xffff;
|
return w & 0xffff;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -2647,7 +2647,7 @@ X86.fnTEST8 = function TEST8(dst, src)
|
||||||
{
|
{
|
||||||
src = this.getIPByte();
|
src = this.getIPByte();
|
||||||
this.setLogicResult(dst & src, X86.RESULT.BYTE);
|
this.setLogicResult(dst & src, X86.RESULT.BYTE);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesTestRI : this.CYCLES.nOpCyclesTestMI);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesTestRI : this.cycleCounts.nOpCyclesTestMI);
|
||||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
@ -2664,7 +2664,7 @@ X86.fnTEST16 = function TEST16(dst, src)
|
||||||
{
|
{
|
||||||
src = this.getIPWord();
|
src = this.getIPWord();
|
||||||
this.setLogicResult(dst & src, X86.RESULT.WORD);
|
this.setLogicResult(dst & src, X86.RESULT.WORD);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesTestRI : this.CYCLES.nOpCyclesTestMI);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesTestRI : this.cycleCounts.nOpCyclesTestMI);
|
||||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
@ -2680,7 +2680,7 @@ X86.fnTEST16 = function TEST16(dst, src)
|
||||||
X86.fnTESTb = function TESTb(dst, src)
|
X86.fnTESTb = function TESTb(dst, src)
|
||||||
{
|
{
|
||||||
this.setLogicResult(dst & src, X86.RESULT.BYTE);
|
this.setLogicResult(dst & src, X86.RESULT.BYTE);
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesTestRR : this.CYCLES.nOpCyclesTestRM) : this.CYCLES.nOpCyclesTestRM);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesTestRR : this.cycleCounts.nOpCyclesTestRM) : this.cycleCounts.nOpCyclesTestRM);
|
||||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
@ -2696,7 +2696,7 @@ X86.fnTESTb = function TESTb(dst, src)
|
||||||
X86.fnTESTw = function TESTw(dst, src)
|
X86.fnTESTw = function TESTw(dst, src)
|
||||||
{
|
{
|
||||||
this.setLogicResult(dst & src, X86.RESULT.WORD);
|
this.setLogicResult(dst & src, X86.RESULT.WORD);
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesTestRR : this.CYCLES.nOpCyclesTestRM) : this.CYCLES.nOpCyclesTestRM);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesTestRR : this.cycleCounts.nOpCyclesTestRM) : this.cycleCounts.nOpCyclesTestRM);
|
||||||
this.opFlags |= X86.OPFLAG.NOWRITE;
|
this.opFlags |= X86.OPFLAG.NOWRITE;
|
||||||
return dst;
|
return dst;
|
||||||
};
|
};
|
||||||
|
|
@ -2838,7 +2838,7 @@ X86.fnXCHGrb = function XCHGRb(dst, src)
|
||||||
default:
|
default:
|
||||||
break; // there IS no other case, but JavaScript inspections don't know that
|
break; // there IS no other case, but JavaScript inspections don't know that
|
||||||
}
|
}
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesXchgRR;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesXchgRR;
|
||||||
} else {
|
} else {
|
||||||
/*
|
/*
|
||||||
* This is a case where the ModRM decoder that's calling us didn't know it should have called modEAByte()
|
* This is a case where the ModRM decoder that's calling us didn't know it should have called modEAByte()
|
||||||
|
|
@ -2847,7 +2847,7 @@ X86.fnXCHGrb = function XCHGRb(dst, src)
|
||||||
*/
|
*/
|
||||||
this.regEAWrite = this.regEA;
|
this.regEAWrite = this.regEA;
|
||||||
this.setEAByte(dst);
|
this.setEAByte(dst);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesXchgRM;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesXchgRM;
|
||||||
}
|
}
|
||||||
return src;
|
return src;
|
||||||
};
|
};
|
||||||
|
|
@ -2902,7 +2902,7 @@ X86.fnXCHGrw = function XCHGRw(dst, src)
|
||||||
default:
|
default:
|
||||||
break; // there IS no other case, but JavaScript inspections don't know that
|
break; // there IS no other case, but JavaScript inspections don't know that
|
||||||
}
|
}
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesXchgRR;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesXchgRR;
|
||||||
} else {
|
} else {
|
||||||
/*
|
/*
|
||||||
* This is a case where the ModRM decoder that's calling us didn't know it should have called modEAWord()
|
* This is a case where the ModRM decoder that's calling us didn't know it should have called modEAWord()
|
||||||
|
|
@ -2911,7 +2911,7 @@ X86.fnXCHGrw = function XCHGRw(dst, src)
|
||||||
*/
|
*/
|
||||||
this.regEAWrite = this.regEA;
|
this.regEAWrite = this.regEA;
|
||||||
this.setEAWord(dst);
|
this.setEAWord(dst);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesXchgRM;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesXchgRM;
|
||||||
}
|
}
|
||||||
return src;
|
return src;
|
||||||
};
|
};
|
||||||
|
|
@ -2928,7 +2928,7 @@ X86.fnXORb = function XORb(dst, src)
|
||||||
{
|
{
|
||||||
var b = dst ^ src;
|
var b = dst ^ src;
|
||||||
this.setLogicResult(b, X86.RESULT.BYTE);
|
this.setLogicResult(b, X86.RESULT.BYTE);
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesArithRR : this.CYCLES.nOpCyclesArithRM) : this.CYCLES.nOpCyclesArithMR);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
|
||||||
return b;
|
return b;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -2944,7 +2944,7 @@ X86.fnXORw = function XORw(dst, src)
|
||||||
{
|
{
|
||||||
var w = dst ^ src;
|
var w = dst ^ src;
|
||||||
this.setLogicResult(w, X86.RESULT.WORD);
|
this.setLogicResult(w, X86.RESULT.WORD);
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesArithRR : this.CYCLES.nOpCyclesArithRM) : this.CYCLES.nOpCyclesArithMR);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
|
||||||
return w;
|
return w;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -2958,7 +2958,7 @@ X86.fnXORw = function XORw(dst, src)
|
||||||
*/
|
*/
|
||||||
X86.fnXORd = function XORd(dst, src)
|
X86.fnXORd = function XORd(dst, src)
|
||||||
{
|
{
|
||||||
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesArithRR : this.CYCLES.nOpCyclesArithRM) : this.CYCLES.nOpCyclesArithMR);
|
this.nStepCycles -= (this.regEAWrite === X86.ADDR_INVALID? (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesArithRR : this.cycleCounts.nOpCyclesArithRM) : this.cycleCounts.nOpCyclesArithMR);
|
||||||
return this.setLogicResult(dst ^ src, X86.RESULT.DWORD);
|
return this.setLogicResult(dst ^ src, X86.RESULT.DWORD);
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -3041,7 +3041,7 @@ X86.fnDIVOverflow = function DIVOverflow()
|
||||||
*/
|
*/
|
||||||
X86.fnSrcCount1 = function SrcCount1()
|
X86.fnSrcCount1 = function SrcCount1()
|
||||||
{
|
{
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? 2 : this.CYCLES.nOpCyclesShift1M);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? 2 : this.cycleCounts.nOpCyclesShift1M);
|
||||||
return 1;
|
return 1;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -3054,7 +3054,7 @@ X86.fnSrcCount1 = function SrcCount1()
|
||||||
X86.fnSrcCountCL = function SrcCountCL()
|
X86.fnSrcCountCL = function SrcCountCL()
|
||||||
{
|
{
|
||||||
var count = this.regECX & 0xff;
|
var count = this.regECX & 0xff;
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesShiftCR : this.CYCLES.nOpCyclesShiftCM) + (count << this.CYCLES.nOpCyclesShiftCS);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesShiftCR : this.cycleCounts.nOpCyclesShiftCM) + (count << this.cycleCounts.nOpCyclesShiftCS);
|
||||||
return count;
|
return count;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -3067,7 +3067,7 @@ X86.fnSrcCountCL = function SrcCountCL()
|
||||||
X86.fnSrcCountN = function SrcCountN()
|
X86.fnSrcCountN = function SrcCountN()
|
||||||
{
|
{
|
||||||
var count = this.getIPByte();
|
var count = this.getIPByte();
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.CYCLES.nOpCyclesShiftCR : this.CYCLES.nOpCyclesShiftCM) + (count << this.CYCLES.nOpCyclesShiftCS);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesShiftCR : this.cycleCounts.nOpCyclesShiftCM) + (count << this.cycleCounts.nOpCyclesShiftCS);
|
||||||
return count;
|
return count;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
||||||
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
|
|
@ -323,10 +323,10 @@ X86.opJOw = function JOw()
|
||||||
var disp = this.getIPDispWord();
|
var disp = this.getIPDispWord();
|
||||||
if (this.getOF()) {
|
if (this.getOF()) {
|
||||||
this.setIP(this.getIP() + disp);
|
this.setIP(this.getIP() + disp);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpC;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpC;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpCFall;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpCFall;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -341,10 +341,10 @@ X86.opJNOw = function JNOw()
|
||||||
var disp = this.getIPDispWord();
|
var disp = this.getIPDispWord();
|
||||||
if (!this.getOF()) {
|
if (!this.getOF()) {
|
||||||
this.setIP(this.getIP() + disp);
|
this.setIP(this.getIP() + disp);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpC;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpC;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpCFall;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpCFall;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -359,10 +359,10 @@ X86.opJCw = function JCw()
|
||||||
var disp = this.getIPDispWord();
|
var disp = this.getIPDispWord();
|
||||||
if (this.getCF()) {
|
if (this.getCF()) {
|
||||||
this.setIP(this.getIP() + disp);
|
this.setIP(this.getIP() + disp);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpC;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpC;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpCFall;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpCFall;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -377,10 +377,10 @@ X86.opJNCw = function JNCw()
|
||||||
var disp = this.getIPDispWord();
|
var disp = this.getIPDispWord();
|
||||||
if (!this.getCF()) {
|
if (!this.getCF()) {
|
||||||
this.setIP(this.getIP() + disp);
|
this.setIP(this.getIP() + disp);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpC;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpC;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpCFall;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpCFall;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -395,10 +395,10 @@ X86.opJZw = function JZw()
|
||||||
var disp = this.getIPDispWord();
|
var disp = this.getIPDispWord();
|
||||||
if (this.getZF()) {
|
if (this.getZF()) {
|
||||||
this.setIP(this.getIP() + disp);
|
this.setIP(this.getIP() + disp);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpC;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpC;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpCFall;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpCFall;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -413,10 +413,10 @@ X86.opJNZw = function JNZw()
|
||||||
var disp = this.getIPDispWord();
|
var disp = this.getIPDispWord();
|
||||||
if (!this.getZF()) {
|
if (!this.getZF()) {
|
||||||
this.setIP(this.getIP() + disp);
|
this.setIP(this.getIP() + disp);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpC;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpC;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpCFall;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpCFall;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -431,10 +431,10 @@ X86.opJBEw = function JBEw()
|
||||||
var disp = this.getIPDispWord();
|
var disp = this.getIPDispWord();
|
||||||
if (this.getCF() || this.getZF()) {
|
if (this.getCF() || this.getZF()) {
|
||||||
this.setIP(this.getIP() + disp);
|
this.setIP(this.getIP() + disp);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpC;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpC;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpCFall;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpCFall;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -449,10 +449,10 @@ X86.opJNBEw = function JNBEw()
|
||||||
var disp = this.getIPDispWord();
|
var disp = this.getIPDispWord();
|
||||||
if (!this.getCF() && !this.getZF()) {
|
if (!this.getCF() && !this.getZF()) {
|
||||||
this.setIP(this.getIP() + disp);
|
this.setIP(this.getIP() + disp);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpC;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpC;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpCFall;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpCFall;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -467,10 +467,10 @@ X86.opJSw = function JSw()
|
||||||
var disp = this.getIPDispWord();
|
var disp = this.getIPDispWord();
|
||||||
if (this.getSF()) {
|
if (this.getSF()) {
|
||||||
this.setIP(this.getIP() + disp);
|
this.setIP(this.getIP() + disp);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpC;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpC;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpCFall;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpCFall;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -485,10 +485,10 @@ X86.opJNSw = function JNSw()
|
||||||
var disp = this.getIPDispWord();
|
var disp = this.getIPDispWord();
|
||||||
if (!this.getSF()) {
|
if (!this.getSF()) {
|
||||||
this.setIP(this.getIP() + disp);
|
this.setIP(this.getIP() + disp);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpC;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpC;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpCFall;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpCFall;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -503,10 +503,10 @@ X86.opJPw = function JPw()
|
||||||
var disp = this.getIPDispWord();
|
var disp = this.getIPDispWord();
|
||||||
if (this.getPF()) {
|
if (this.getPF()) {
|
||||||
this.setIP(this.getIP() + disp);
|
this.setIP(this.getIP() + disp);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpC;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpC;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpCFall;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpCFall;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -521,10 +521,10 @@ X86.opJNPw = function JNPw()
|
||||||
var disp = this.getIPDispWord();
|
var disp = this.getIPDispWord();
|
||||||
if (!this.getPF()) {
|
if (!this.getPF()) {
|
||||||
this.setIP(this.getIP() + disp);
|
this.setIP(this.getIP() + disp);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpC;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpC;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpCFall;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpCFall;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -539,10 +539,10 @@ X86.opJLw = function JLw()
|
||||||
var disp = this.getIPDispWord();
|
var disp = this.getIPDispWord();
|
||||||
if (!this.getSF() != !this.getOF()) {
|
if (!this.getSF() != !this.getOF()) {
|
||||||
this.setIP(this.getIP() + disp);
|
this.setIP(this.getIP() + disp);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpC;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpC;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpCFall;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpCFall;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -557,10 +557,10 @@ X86.opJNLw = function JNLw()
|
||||||
var disp = this.getIPDispWord();
|
var disp = this.getIPDispWord();
|
||||||
if (!this.getSF() == !this.getOF()) {
|
if (!this.getSF() == !this.getOF()) {
|
||||||
this.setIP(this.getIP() + disp);
|
this.setIP(this.getIP() + disp);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpC;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpC;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpCFall;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpCFall;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -575,10 +575,10 @@ X86.opJLEw = function JLEw()
|
||||||
var disp = this.getIPDispWord();
|
var disp = this.getIPDispWord();
|
||||||
if (this.getZF() || !this.getSF() != !this.getOF()) {
|
if (this.getZF() || !this.getSF() != !this.getOF()) {
|
||||||
this.setIP(this.getIP() + disp);
|
this.setIP(this.getIP() + disp);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpC;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpC;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpCFall;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpCFall;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -593,10 +593,10 @@ X86.opJNLEw = function JNLEw()
|
||||||
var disp = this.getIPDispWord();
|
var disp = this.getIPDispWord();
|
||||||
if (!this.getZF() && !this.getSF() == !this.getOF()) {
|
if (!this.getZF() && !this.getSF() == !this.getOF()) {
|
||||||
this.setIP(this.getIP() + disp);
|
this.setIP(this.getIP() + disp);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpC;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpC;
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesJmpCFall;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesJmpCFall;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -801,7 +801,7 @@ X86.opSETNLE = function SETNLE()
|
||||||
X86.opPUSHFS = function PUSHFS()
|
X86.opPUSHFS = function PUSHFS()
|
||||||
{
|
{
|
||||||
this.pushWord(this.segFS.sel);
|
this.pushWord(this.segFS.sel);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesPushSeg;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesPushSeg;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -814,7 +814,7 @@ X86.opPUSHFS = function PUSHFS()
|
||||||
X86.opPOPFS = function POPFS()
|
X86.opPOPFS = function POPFS()
|
||||||
{
|
{
|
||||||
this.setFS(this.popWord());
|
this.setFS(this.popWord());
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesPopReg;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesPopReg;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -827,13 +827,13 @@ X86.opPOPFS = function POPFS()
|
||||||
X86.opBT = function BT()
|
X86.opBT = function BT()
|
||||||
{
|
{
|
||||||
this.aOpModMemWord[this.getIPByte()].call(this, X86.fnBT);
|
this.aOpModMemWord[this.getIPByte()].call(this, X86.fnBT);
|
||||||
if (this.regEA !== X86.ADDR_INVALID) this.nStepCycles -= X86CPU.CYCLES_80386.nOpCyclesBitTestMExtra;
|
if (this.regEA !== X86.ADDR_INVALID) this.nStepCycles -= this.cycleCounts.nOpCyclesBitTestMExtra;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* opSHLDn()
|
* opSHLDn()
|
||||||
*
|
*
|
||||||
* op=0x0F,0xA4 (SHLD mem/reg,imm8)
|
* op=0x0F,0xA4 (SHLD mem/reg,reg,imm8)
|
||||||
*
|
*
|
||||||
* @this {X86CPU}
|
* @this {X86CPU}
|
||||||
*/
|
*/
|
||||||
|
|
@ -845,13 +845,13 @@ X86.opSHLDn = function SHLDn()
|
||||||
* has to happen below.
|
* has to happen below.
|
||||||
*/
|
*/
|
||||||
this.aOpModMemWord[this.getIPByte()].call(this, this.dataSize == 2? X86.fnSHLDwi : X86.fnSHLDdi);
|
this.aOpModMemWord[this.getIPByte()].call(this, this.dataSize == 2? X86.fnSHLDwi : X86.fnSHLDdi);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? X86CPU.CYCLES_80386.nOpCyclesShiftDR : X86CPU.CYCLES_80386.nOpCyclesShiftDM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesShiftDR : this.cycleCounts.nOpCyclesShiftDM);
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* opSHLDcl()
|
* opSHLDcl()
|
||||||
*
|
*
|
||||||
* op=0x0F,0xA5 (SHLD mem/reg,CL)
|
* op=0x0F,0xA5 (SHLD mem/reg,reg,CL)
|
||||||
*
|
*
|
||||||
* @this {X86CPU}
|
* @this {X86CPU}
|
||||||
*/
|
*/
|
||||||
|
|
@ -863,7 +863,7 @@ X86.opSHLDcl = function SHLDcl()
|
||||||
* has to happen below.
|
* has to happen below.
|
||||||
*/
|
*/
|
||||||
this.aOpModMemWord[this.getIPByte()].call(this, this.dataSize == 2? X86.fnSHLDwCL : X86.fnSHLDdCL);
|
this.aOpModMemWord[this.getIPByte()].call(this, this.dataSize == 2? X86.fnSHLDwCL : X86.fnSHLDdCL);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? X86CPU.CYCLES_80386.nOpCyclesShiftDR : X86CPU.CYCLES_80386.nOpCyclesShiftDM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesShiftDR : this.cycleCounts.nOpCyclesShiftDM);
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -876,7 +876,7 @@ X86.opSHLDcl = function SHLDcl()
|
||||||
X86.opPUSHGS = function PUSHGS()
|
X86.opPUSHGS = function PUSHGS()
|
||||||
{
|
{
|
||||||
this.pushWord(this.segGS.sel);
|
this.pushWord(this.segGS.sel);
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesPushSeg;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesPushSeg;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -889,7 +889,7 @@ X86.opPUSHGS = function PUSHGS()
|
||||||
X86.opPOPGS = function POPGS()
|
X86.opPOPGS = function POPGS()
|
||||||
{
|
{
|
||||||
this.setGS(this.popWord());
|
this.setGS(this.popWord());
|
||||||
this.nStepCycles -= this.CYCLES.nOpCyclesPopReg;
|
this.nStepCycles -= this.cycleCounts.nOpCyclesPopReg;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -902,13 +902,13 @@ X86.opPOPGS = function POPGS()
|
||||||
X86.opBTS = function BTS()
|
X86.opBTS = function BTS()
|
||||||
{
|
{
|
||||||
this.aOpModMemWord[this.getIPByte()].call(this, X86.fnBTS);
|
this.aOpModMemWord[this.getIPByte()].call(this, X86.fnBTS);
|
||||||
if (this.regEA !== X86.ADDR_INVALID) this.nStepCycles -= X86CPU.CYCLES_80386.nOpCyclesBitSetMExtra;
|
if (this.regEA !== X86.ADDR_INVALID) this.nStepCycles -= this.cycleCounts.nOpCyclesBitSetMExtra;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* opSHRDn()
|
* opSHRDn()
|
||||||
*
|
*
|
||||||
* op=0x0F,0xAC (SHRD mem/reg,imm8)
|
* op=0x0F,0xAC (SHRD mem/reg,reg,imm8)
|
||||||
*
|
*
|
||||||
* @this {X86CPU}
|
* @this {X86CPU}
|
||||||
*/
|
*/
|
||||||
|
|
@ -920,13 +920,13 @@ X86.opSHRDn = function SHRDn()
|
||||||
* has to happen below.
|
* has to happen below.
|
||||||
*/
|
*/
|
||||||
this.aOpModMemWord[this.getIPByte()].call(this, this.dataSize == 2? X86.fnSHRDwi : X86.fnSHRDdi);
|
this.aOpModMemWord[this.getIPByte()].call(this, this.dataSize == 2? X86.fnSHRDwi : X86.fnSHRDdi);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? X86CPU.CYCLES_80386.nOpCyclesShiftDR : X86CPU.CYCLES_80386.nOpCyclesShiftDM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesShiftDR : this.cycleCounts.nOpCyclesShiftDM);
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* opSHRDcl()
|
* opSHRDcl()
|
||||||
*
|
*
|
||||||
* op=0x0F,0xAD (SHRD mem/reg,CL)
|
* op=0x0F,0xAD (SHRD mem/reg,reg,CL)
|
||||||
*
|
*
|
||||||
* @this {X86CPU}
|
* @this {X86CPU}
|
||||||
*/
|
*/
|
||||||
|
|
@ -938,7 +938,7 @@ X86.opSHRDcl = function SHRDcl()
|
||||||
* has to happen below.
|
* has to happen below.
|
||||||
*/
|
*/
|
||||||
this.aOpModMemWord[this.getIPByte()].call(this, this.dataSize == 2? X86.fnSHRDwCL : X86.fnSHRDdCL);
|
this.aOpModMemWord[this.getIPByte()].call(this, this.dataSize == 2? X86.fnSHRDwCL : X86.fnSHRDdCL);
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? X86CPU.CYCLES_80386.nOpCyclesShiftDR : X86CPU.CYCLES_80386.nOpCyclesShiftDM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesShiftDR : this.cycleCounts.nOpCyclesShiftDM);
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -982,7 +982,7 @@ X86.opLSS = function LSS()
|
||||||
X86.opBTR = function BTR()
|
X86.opBTR = function BTR()
|
||||||
{
|
{
|
||||||
this.aOpModMemWord[this.getIPByte()].call(this, X86.fnBTR);
|
this.aOpModMemWord[this.getIPByte()].call(this, X86.fnBTR);
|
||||||
if (this.regEA !== X86.ADDR_INVALID) this.nStepCycles -= X86CPU.CYCLES_80386.nOpCyclesBitSetMExtra;
|
if (this.regEA !== X86.ADDR_INVALID) this.nStepCycles -= this.cycleCounts.nOpCyclesBitSetMExtra;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -1082,7 +1082,7 @@ X86.opMOVZXb = function MOVZXb()
|
||||||
this.regEBX = temp;
|
this.regEBX = temp;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? X86CPU.CYCLES_80386.nOpCyclesMovXR : X86CPU.CYCLES_80386.nOpCyclesMovXM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesMovXR : this.cycleCounts.nOpCyclesMovXM);
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -1122,7 +1122,7 @@ X86.opMOVZXw = function MOVZXw()
|
||||||
this.regEDI = (this.regEDI & 0xffff);
|
this.regEDI = (this.regEDI & 0xffff);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? X86CPU.CYCLES_80386.nOpCyclesMovXR : X86CPU.CYCLES_80386.nOpCyclesMovXM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesMovXR : this.cycleCounts.nOpCyclesMovXM);
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -1145,7 +1145,7 @@ X86.opGRP8 = function GRP8()
|
||||||
X86.opBTC = function BTC()
|
X86.opBTC = function BTC()
|
||||||
{
|
{
|
||||||
this.aOpModMemWord[this.getIPByte()].call(this, X86.fnBTC);
|
this.aOpModMemWord[this.getIPByte()].call(this, X86.fnBTC);
|
||||||
if (this.regEA !== X86.ADDR_INVALID) this.nStepCycles -= X86CPU.CYCLES_80386.nOpCyclesBitSetMExtra;
|
if (this.regEA !== X86.ADDR_INVALID) this.nStepCycles -= this.cycleCounts.nOpCyclesBitSetMExtra;
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -1241,7 +1241,7 @@ X86.opMOVSXb = function MOVSXb()
|
||||||
this.regEBX = temp;
|
this.regEBX = temp;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? X86CPU.CYCLES_80386.nOpCyclesMovXR : X86CPU.CYCLES_80386.nOpCyclesMovXM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesMovXR : this.cycleCounts.nOpCyclesMovXM);
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -1281,7 +1281,7 @@ X86.opMOVSXw = function MOVSXw()
|
||||||
this.regEDI = ((this.regEDI << 16) >> 16);
|
this.regEDI = ((this.regEDI << 16) >> 16);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? X86CPU.CYCLES_80386.nOpCyclesMovXR : X86CPU.CYCLES_80386.nOpCyclesMovXM);
|
this.nStepCycles -= (this.regEA === X86.ADDR_INVALID? this.cycleCounts.nOpCyclesMovXR : this.cycleCounts.nOpCyclesMovXM);
|
||||||
};
|
};
|
||||||
|
|
||||||
X86.aOps0F = new Array(256);
|
X86.aOps0F = new Array(256);
|
||||||
|
|
|
||||||
File diff suppressed because it is too large
Load diff
|
|
@ -78,7 +78,7 @@ TextOut.asTargetRefs = ["call", "jmp", "jz", "jnz", "jc", "jnc", "ja", "jna", "j
|
||||||
* labelTargets(): looks for all JMP and CALL targets and labels them.
|
* labelTargets(): looks for all JMP and CALL targets and labels them.
|
||||||
*
|
*
|
||||||
* alignVertical(): looks for a predefined target string (eg, '; ') in the first line,
|
* alignVertical(): looks for a predefined target string (eg, '; ') in the first line,
|
||||||
* and ensures that the same sequence in all subsequent lines start at the same column.
|
* and ensures that the same sequence in all subsequent lines starts at the same column.
|
||||||
*
|
*
|
||||||
* For now, all output is written to stdout only.
|
* For now, all output is written to stdout only.
|
||||||
*
|
*
|
||||||
|
|
|
||||||
|
|
@ -1,4 +1,7 @@
|
||||||
all: tests.rom
|
all: tests.json
|
||||||
|
|
||||||
tests.rom: tests.nasm
|
tests.rom: tests.nasm
|
||||||
nasm -f bin tests.nasm -l tests.lst -o tests.rom
|
nasm -f bin tests.nasm -l tests.lst -o tests.rom
|
||||||
|
|
||||||
|
tests.json: tests.rom
|
||||||
|
node ../../../modules/filedump/bin/filedump --file=tests.rom --output=tests.json
|
||||||
|
|
|
||||||
|
|
@ -5,10 +5,15 @@
|
||||||
|
|
||||||
bits 16
|
bits 16
|
||||||
|
|
||||||
start: mov eax,0x11223344
|
start: mov eax,0x44332211
|
||||||
mov edx,0x55667788
|
mov edx,0x88776655
|
||||||
|
shrd eax,edx,4
|
||||||
|
|
||||||
times 0xfff0-($-$$) db 0
|
times 0xfff0-($-$$) db 0x90 ; NOP
|
||||||
|
|
||||||
bits 16
|
bits 16
|
||||||
jmp 0xf000:start
|
jmp 0xf000:start
|
||||||
|
|
||||||
|
db ' 04/04/15'
|
||||||
|
db 0xFC ; 0000FFFE FC (Model ID byte)
|
||||||
|
db 0x00 ; 0000FFFF 00 (location of checksum byte)
|
||||||
|
|
|
||||||
Loading…
Reference in a new issue