Debugger improvements (dumping/setting MMU registers)
This commit is contained in:
Jeff
Jeff Parsons
parent
00d6fb6c59
commit
2b23c86649
8 changed files with 709 additions and 473 deletions
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@ -266,7 +266,32 @@ if (DEBUGGER) {
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* Register numbers 0-7 are reserved for cpu.regsGen, 8-15 are reserved for cpu.regsAlt, and 16-19 for cpu.regsStack.
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*/
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DebuggerPDP11.REG_PSW = 20;
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DebuggerPDP11.REG_SR = 21; // SWITCH register; see Panel's getSR() and setSR()
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DebuggerPDP11.REG_PIR = 21;
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DebuggerPDP11.REG_ERR = 22;
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DebuggerPDP11.REG_SL = 23;
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DebuggerPDP11.REG_MMR0 = 24;
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DebuggerPDP11.REG_MMR1 = 25;
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DebuggerPDP11.REG_MMR2 = 26;
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DebuggerPDP11.REG_MMR3 = 27;
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DebuggerPDP11.REG_AR = 28; // ADDRESS register; see Panel's getAR() and setAR()
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DebuggerPDP11.REG_DR = 29; // DISPLAY/DATA register; see Panel's getDR() and setDR()
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DebuggerPDP11.REG_SR = 30; // SWITCH register; see Panel's getSR() and setSR()
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DebuggerPDP11.REGS = {
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"SP": 6,
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"PC": 7,
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"PS": DebuggerPDP11.REG_PSW,
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"IR": DebuggerPDP11.REG_PIR,
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"ER": DebuggerPDP11.REG_ERR,
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"SL": DebuggerPDP11.REG_SL,
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"MMR0": DebuggerPDP11.REG_MMR0,
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"MMR1": DebuggerPDP11.REG_MMR1,
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"MMR2": DebuggerPDP11.REG_MMR2,
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"MMR3": DebuggerPDP11.REG_MMR3,
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"AR": DebuggerPDP11.REG_AR,
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"DR": DebuggerPDP11.REG_DR,
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"SR": DebuggerPDP11.REG_SR
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};
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/*
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* Operand type masks; anything that's not covered by OP_SRC or OP_DST must be a OP_OTHER value.
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@ -1118,24 +1143,14 @@ if (DEBUGGER) {
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*/
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DebuggerPDP11.prototype.getRegIndex = function(sReg, off)
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{
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var iReg = -1;
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sReg = sReg.toUpperCase();
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switch(sReg) {
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case "SP":
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iReg = 6;
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break;
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case "PC":
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iReg = 7;
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break;
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case "SR":
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iReg = 21;
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break;
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default:
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var iReg = DebuggerPDP11.REGS[sReg];
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if (iReg == null) {
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iReg = -1;
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if (sReg.charAt(0) == "R") {
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iReg = +sReg.charAt(1);
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if (iReg < 0 || iReg > 7) iReg = -1;
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}
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break;
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}
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return iReg;
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};
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@ -1156,7 +1171,7 @@ if (DEBUGGER) {
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* getRegValue(iReg)
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*
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* Register numbers 0-7 are reserved for cpu.regsGen, 8-15 are reserved for cpu.regsAlt,
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* 16-19 for cpu.regsAltStack, 20 for regPSW, and 21 for SR (SWITCH register).
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* 16-19 for cpu.regsAltStack, 20 for regPSW, etc.
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*
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* @this {DebuggerPDP11}
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* @param {number} iReg
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@ -1175,11 +1190,50 @@ if (DEBUGGER) {
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else if (iReg < 20) {
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value = this.cpu.regsAltStack[iReg-16];
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}
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else if (iReg == DebuggerPDP11.REG_PSW) {
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value = this.cpu.getPSW();
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}
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else if (iReg == DebuggerPDP11.REG_SR && this.panel && this.panel.hasSwitches()) {
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value = this.panel.getSR();
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else {
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var cpu = this.cpu;
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var panel = this.panel;
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switch(iReg) {
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case DebuggerPDP11.REG_PSW:
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value = this.cpu.getPSW();
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break;
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case DebuggerPDP11.REG_PIR:
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value = cpu.regPIR;
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break;
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case DebuggerPDP11.REG_ERR:
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value = cpu.regErr;
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break;
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case DebuggerPDP11.REG_SL:
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value = cpu.regSL;
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break;
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case DebuggerPDP11.REG_MMR0:
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value = panel.getMMR0();
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break;
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case DebuggerPDP11.REG_MMR1:
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value = panel.getMMR1();
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break;
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case DebuggerPDP11.REG_MMR2:
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value = panel.getMMR2();
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break;
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case DebuggerPDP11.REG_MMR3:
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value = panel.getMMR3();
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break;
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case DebuggerPDP11.REG_AR:
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if (panel) {
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value = panel.getAR();
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}
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break;
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case DebuggerPDP11.REG_DR:
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if (panel) {
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value = panel.getDR();
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}
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break;
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case DebuggerPDP11.REG_SR:
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if (panel && panel.hasSwitches()) {
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value = panel.getSR();
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}
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break;
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}
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}
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}
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return value;
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@ -1371,6 +1425,7 @@ if (DEBUGGER) {
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* is calling us in a loop, in which case it will perform its own updateDisplays() when it's done.
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*/
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if (fUpdateDisplays !== false) {
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if (this.panel && this.panel.stop) this.panel.stop();
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this.cmp.updateDisplays(-1);
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}
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@ -2393,28 +2448,86 @@ if (DEBUGGER) {
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else if (iReg >= 16 && iReg < 20) {
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sReg = "S" + (iReg - 16) + '=' + this.toStrBase(cpu.regsAltStack[iReg - 16]);
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}
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else if (iReg == DebuggerPDP11.REG_PSW) {
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sReg = "PS=" + this.toStrBase(cpu.getPSW());
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}
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else if (iReg == DebuggerPDP11.REG_SR && this.panel && this.panel.hasSwitches()) {
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sReg = "SR=" + this.toStrBase(this.panel.getSR(), 3);
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else {
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switch(iReg) {
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case DebuggerPDP11.REG_PSW:
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sReg = "PS=" + this.toStrBase(cpu.getPSW());
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break;
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case DebuggerPDP11.REG_PIR:
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sReg = "IR=" + this.toStrBase(cpu.regPIR);
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break;
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case DebuggerPDP11.REG_ERR:
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sReg = "ER=" + this.toStrBase(cpu.regErr);
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break;
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case DebuggerPDP11.REG_SL:
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sReg = "SL=" + this.toStrBase(cpu.regSL);
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break;
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case DebuggerPDP11.REG_MMR0:
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sReg = "MMR0=" + this.toStrBase(cpu.getMMR0());
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break;
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case DebuggerPDP11.REG_MMR1:
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sReg = "MMR1=" + this.toStrBase(cpu.getMMR1());
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break;
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case DebuggerPDP11.REG_MMR2:
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sReg = "MMR2=" + this.toStrBase(cpu.getMMR2());
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break;
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case DebuggerPDP11.REG_MMR3:
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sReg = "MMR3=" + this.toStrBase(cpu.getMMR3());
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break;
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case DebuggerPDP11.REG_AR:
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if (this.panel) {
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sReg = "AR=" + this.toStrBase(this.panel.getAR(), 3);
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}
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break;
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case DebuggerPDP11.REG_DR:
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if (this.panel) {
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sReg = "DR=" + this.toStrBase(this.panel.getDR());
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}
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break;
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case DebuggerPDP11.REG_SR:
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if (this.panel && this.panel.hasSwitches()) {
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sReg = "SR=" + this.toStrBase(this.panel.getSR(), 3);
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}
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break;
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}
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}
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if (sReg) sReg += ' ';
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return sReg;
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};
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/**
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* getRegDump()
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* getMiscDump()
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*
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* Sample register dump:
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*
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* R0=xxxx R1=xxxx R2=xxxx R3=xxxx R4=xxxx R5=xxxx
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* SP=xxxx PC=xxxx PS=xxxx T0 N0 Z0 V0 C0
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* MMR0=xxxxxx MMR1=xxxxxx MMR2=xxxxxx MMR3=xxxxxx ER=xxxxxx
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*
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* @this {DebuggerPDP11}
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* @return {string}
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*/
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DebuggerPDP11.prototype.getRegDump = function()
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DebuggerPDP11.prototype.getMiscDump = function()
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{
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var sDump = "";
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sDump += this.getRegOutput(DebuggerPDP11.REG_MMR0) + this.getRegOutput(DebuggerPDP11.REG_MMR1);
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sDump += this.getRegOutput(DebuggerPDP11.REG_MMR2) + this.getRegOutput(DebuggerPDP11.REG_MMR3) + this.getRegOutput(DebuggerPDP11.REG_ERR);
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sDump += '\n';
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sDump += this.getRegOutput(DebuggerPDP11.REG_SR) + this.getRegOutput(DebuggerPDP11.REG_AR) + this.getRegOutput(DebuggerPDP11.REG_DR);
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return sDump;
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};
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/**
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* getRegDump(fMisc)
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*
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* Sample register dump:
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*
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* R0=xxxxxx R1=xxxxxx R2=xxxxxx R3=xxxxxx R4=xxxxxx R5=xxxxxx
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* SP=xxxxxx PC=xxxxxx PS=xxxxxx IR=xxxxxx SL=xxxxxx T0 N0 Z0 V0 C0
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*
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* @this {DebuggerPDP11}
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* @param {boolean} [fMisc] (true to include misc registers)
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* @return {string}
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*/
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DebuggerPDP11.prototype.getRegDump = function(fMisc)
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{
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var i;
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var sDump = "";
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@ -2423,8 +2536,9 @@ if (DEBUGGER) {
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}
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sDump += '\n';
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sDump += this.getRegOutput(PDP11.REG.SP) + this.getRegOutput(PDP11.REG.PC);
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sDump += this.getRegOutput(DebuggerPDP11.REG_PSW) + this.getRegOutput(DebuggerPDP11.REG_SR);
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sDump += this.getRegOutput(DebuggerPDP11.REG_PSW) + this.getRegOutput(DebuggerPDP11.REG_PIR) + this.getRegOutput(DebuggerPDP11.REG_SL);
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sDump += this.getFlagOutput('T') + this.getFlagOutput('N') + this.getFlagOutput('Z') + this.getFlagOutput('V') + this.getFlagOutput('C');
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if (fMisc) sDump += '\n' + this.getMiscDump();
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return sDump;
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};
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@ -3390,77 +3504,115 @@ if (DEBUGGER) {
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if (asArgs && asArgs[1] == '?') {
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this.println("register commands:");
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this.println("\tr\tdump registers");
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this.println("\trm\tdump misc registers");
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this.println("\trx [#]\tset flag or register x to [#]");
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return;
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}
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var fMisc = false;
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var cpu = this.cpu;
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if (fInstruction == null) fInstruction = true;
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if (asArgs != null && asArgs.length > 1) {
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var sReg = asArgs[1];
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var sValue = null;
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var i = sReg.indexOf('=');
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if (i > 0) {
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sValue = sReg.substr(i + 1);
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sReg = sReg.substr(0, i);
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}
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else if (asArgs.length > 2) {
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sValue = asArgs[2];
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if (sReg == 'm') {
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fMisc = true;
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}
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else {
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this.println("missing value for " + asArgs[1]);
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return;
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}
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var w = this.parseExpression(sValue);
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if (w === undefined) return;
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var sRegMatch = sReg.toUpperCase();
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switch (sRegMatch) {
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case "SP":
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case "R6":
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cpu.setSP(w);
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break;
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case "PC":
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case "R7":
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cpu.setPC(w);
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this.dbgAddrNextCode = this.newAddr(cpu.getPC());
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break;
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case "N":
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if (w) cpu.setNF(); else cpu.clearNF();
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break;
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case "Z":
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if (w) cpu.setZF(); else cpu.clearZF();
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break;
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case "V":
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if (w) cpu.setVF(); else cpu.clearVF();
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break;
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case "C":
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if (w) cpu.setCF(); else cpu.clearCF();
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break;
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case "SR":
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if (this.panel && this.panel.hasSwitches()) {
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this.panel.setSR(w);
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break;
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var sValue = null;
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var i = sReg.indexOf('=');
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if (i > 0) {
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sValue = sReg.substr(i + 1);
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sReg = sReg.substr(0, i);
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}
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/* falls through */
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default:
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if (sRegMatch.charAt(0) == 'R') {
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var iReg = +sRegMatch.charAt(1);
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if (iReg >= 0 && iReg < 6) {
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cpu.regsGen[iReg] = w & 0xffff;
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else if (asArgs.length > 2) {
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sValue = asArgs[2];
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}
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else {
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this.println("missing value for " + asArgs[1]);
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return;
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}
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var w = this.parseExpression(sValue);
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if (w === undefined) return;
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var sRegMatch = sReg.toUpperCase();
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switch (sRegMatch) {
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case "SP":
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case "R6":
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cpu.setSP(w);
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break;
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case "PC":
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case "R7":
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cpu.setPC(w);
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this.dbgAddrNextCode = this.newAddr(cpu.getPC());
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break;
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case "N":
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if (w) cpu.setNF(); else cpu.clearNF();
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break;
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case "Z":
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if (w) cpu.setZF(); else cpu.clearZF();
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break;
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case "V":
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if (w) cpu.setVF(); else cpu.clearVF();
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break;
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case "C":
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if (w) cpu.setCF(); else cpu.clearCF();
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break;
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case "PS":
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cpu.setPSW(w);
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break;
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case "IR":
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cpu.setPIR(w);
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break;
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case "ER":
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cpu.regErr = w;
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fMisc = true;
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break;
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case "SL":
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cpu.setSL(w);
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break;
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case "MMR0":
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cpu.setMMR0(w);
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fMisc = true;
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break;
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case "MMR3":
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cpu.setMMR3(w);
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fMisc = true;
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break;
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case "AR":
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if (this.panel) this.panel.setAR(w);
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fMisc = true;
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break;
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case "DR":
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if (this.panel) this.panel.setDR(w);
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fMisc = true;
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break;
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case "SR":
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if (this.panel && this.panel.hasSwitches()) {
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this.panel.setSR(w);
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fMisc = true;
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break;
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}
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/* falls through */
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default:
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if (sRegMatch.charAt(0) == 'R') {
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var iReg = +sRegMatch.charAt(1);
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if (iReg >= 0 && iReg < 6) {
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cpu.regsGen[iReg] = w & 0xffff;
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break;
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}
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}
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this.println("unknown register: " + sReg);
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return;
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}
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this.println("unknown register: " + sReg);
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return;
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this.cmp.updateDisplays();
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this.println("updated registers:");
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}
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this.cmp.updateDisplays();
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this.println("updated registers:");
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}
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this.println(this.getRegDump());
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this.println(this.getRegDump(fMisc));
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if (fInstruction) {
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this.dbgAddrNextCode = this.newAddr(cpu.getPC());
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@ -3716,7 +3868,7 @@ if (DEBUGGER) {
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* a final updateDisplays().
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*/
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if (dbg.panel && dbg.panel.stop) dbg.panel.stop();
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dbg.cmp.updateDisplays();
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dbg.cmp.updateDisplays(-1);
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dbg.setBusy(false);
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}
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);
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