Fixed 8080 bug exposed by the exerciser (but still a long way from 100% passing)
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8 changed files with 1974 additions and 13 deletions
291
devices/pc8080/rom/test/8080PRE.MAC
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291
devices/pc8080/rom/test/8080PRE.MAC
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title 'Preliminary Z80 tests'
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; prelim.z80 - Preliminary Z80 tests
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; Copyright (C) 1994 Frank D. Cringle
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;
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; This program is free software; you can redistribute it and/or
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; modify it under the terms of the GNU General Public License
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; as published by the Free Software Foundation; either version 2
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; of the License, or (at your option) any later version.
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;
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; This program is distributed in the hope that it will be useful,
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; but WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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; GNU General Public License for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with this program; if not, write to the Free Software
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; Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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; These tests have two goals. To start with, we assume the worst and
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; successively test the instructions needed to continue testing.
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; Then we try to test all instructions which cannot be handled by
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; zexlax - the crc-based instruction exerciser.
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; Initially errors are 'reported' by jumping to 0. This should reboot
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; cp/m, so if the program terminates without any output one of the
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; early tests failed. Later errors are reported by outputting an
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; address via the bdos conout routine. The address can be located in
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; a listing of this program.
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; If the program runs to completion it displays a suitable message.
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;******************************************************************************
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;
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; Modified by Ian Bartholomew to run a preliminary test on an 8080 CPU
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;
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; Assemble using M80
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;
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;******************************************************************************
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.8080
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aseg
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org 100h
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start: mvi a,1 ; test simple compares and z/nz jumps
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cpi 2
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jz 0
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cpi 1
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jnz 0
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jmp lab0
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hlt ; emergency exit
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db 0ffh
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lab0: call lab2 ; does a simple call work?
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lab1: jmp 0 ; fail
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lab2: pop h ; check return address
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mov a,h
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cpi high lab1
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jz lab3
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jmp 0
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lab3: mov a,l
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cpi low lab1
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jz lab4
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jmp 0
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; test presence and uniqueness of all machine registers
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; (except ir)
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lab4: lxi sp,regs1
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pop psw
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pop b
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pop d
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pop h
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lxi sp,regs2+8
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push h
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push d
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push b
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push psw
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v defl 0
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rept 8
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lda regs2+v/2
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v defl v+2
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cpi v
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jnz 0
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endm
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; test access to memory via (hl)
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lxi h,hlval
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mov a,m
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cpi 0a5h
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jnz 0
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lxi h,hlval+1
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mov a,m
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cpi 03ch
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jnz 0
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; test unconditional return
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lxi sp,stack
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lxi h,reta
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push h
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ret
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jmp 0
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; test instructions needed for hex output
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reta: mvi a,0ffh
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ani 0fh
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cpi 0fh
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jnz 0
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mvi a,05ah
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ani 0fh
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cpi 0ah
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jnz 0
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rrc
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cpi 05h
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jnz 0
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rrc
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cpi 82h
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jnz 0
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rrc
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cpi 41h
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jnz 0
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rrc
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cpi 0a0h
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jnz 0
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lxi h,01234h
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push h
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pop b
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mov a,b
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cpi 12h
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jnz 0
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mov a,c
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cpi 34h
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jnz 0
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; from now on we can report errors by displaying an address
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; test conditional call, ret, jp, jr
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tcond macro flag,pcond,ncond,rel
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lxi h,&flag
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push h
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pop psw
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c&pcond lab1&pcond
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jmp error
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lab1&pcond: pop h
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lxi h,0d7h xor &flag
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push h
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pop psw
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c&ncond lab2&pcond
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jmp error
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lab2&pcond: pop h
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lxi h,lab3&pcond
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push h
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lxi h,&flag
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push h
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pop psw
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r&pcond
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call error
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lab3&pcond: lxi h,lab4&pcond
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push h
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lxi h,0d7h xor &flag
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push h
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pop psw
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r&ncond
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call error
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lab4&pcond: lxi h,&flag
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push h
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pop psw
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j&pcond lab5&pcond
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call error
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lab5&pcond: lxi h,0d7h xor &flag
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push h
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pop psw
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j&ncond lab6&pcond
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call error
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lab6&pcond:
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endm
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tcond 1,c,nc,1
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tcond 4,pe,po,0
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tcond 040h,z,nz,1
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tcond 080h,m,p,0
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; test indirect jumps
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lxi h,lab7
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pchl
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call error
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; djnz (and (partially) inc a, inc hl)
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lab7: mvi a,0a5h
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mvi b,4
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lab8: rrc
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dcr b
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jnz lab8
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cpi 05ah
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cnz error
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mvi b,16
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lab9: inr a
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dcr b
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jnz lab9
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cpi 06ah
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cnz error
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mvi b,0
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lxi h,0
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lab10: inx h
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dcr b
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jnz lab10
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mov a,h
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cpi 1
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cnz error
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mov a,l
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cpi 0
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cnz error
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allok: lxi d,okmsg
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mvi c,9
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call 5
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jmp 0
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okmsg: db '8080 Preliminary tests complete$'
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; display address at top of stack and exit
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error: pop b
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mvi h,high hextab
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mov a,b
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rrc
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rrc
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rrc
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rrc
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ani 15
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mov l,a
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mov a,m
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call conout
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mov a,b
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ani 15
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mov l,a
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mov a,m
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call conout
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mov a,c
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rrc
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rrc
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rrc
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rrc
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ani 15
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mov l,a
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mov a,m
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call conout
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mov a,c
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ani 15
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mov l,a
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mov a,m
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call conout
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mvi a,13
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call conout
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mvi a,10
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call conout
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jmp 0
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conout: push psw
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push b
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push d
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push h
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mvi c,2
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mov e,a
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call 5
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pop h
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pop d
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pop b
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pop psw
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ret
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v defl 0
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regs1: rept 8
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v defl v+2
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db v
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endm
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regs2: ds 8,0
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hlval: db 0a5h,03ch
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; skip to next page boundary
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org (($+255)/256)*256
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hextab: db '0123456789abcdef'
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ds 240
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stack equ $
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end start
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