v1.17.0: Widening registers
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c5d9b7dfcc
commit
1ede9acf15
133 changed files with 20419 additions and 19923 deletions
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@ -353,28 +353,28 @@ var X86Help = {
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//
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switch (this.bModRM & 0x7) {
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case 0x0: // AL
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this.regAX = (this.regAX & ~0xff) | dst;
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this.regEAX = (this.regEAX & ~0xff) | dst;
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break;
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case 0x1: // CL
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this.regCX = (this.regCX & ~0xff) | dst;
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this.regECX = (this.regECX & ~0xff) | dst;
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break;
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case 0x2: // DL
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this.regDX = (this.regDX & ~0xff) | dst;
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this.regEDX = (this.regEDX & ~0xff) | dst;
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break;
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case 0x3: // BL
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this.regBX = (this.regBX & ~0xff) | dst;
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this.regEBX = (this.regEBX & ~0xff) | dst;
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break;
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case 0x4: // AH
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this.regAX = (this.regAX & 0xff) | (dst << 8);
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this.regEAX = (this.regEAX & 0xff) | (dst << 8);
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break;
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case 0x5: // CH
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this.regCX = (this.regCX & 0xff) | (dst << 8);
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this.regECX = (this.regECX & 0xff) | (dst << 8);
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break;
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case 0x6: // DH
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this.regDX = (this.regDX & 0xff) | (dst << 8);
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this.regEDX = (this.regEDX & 0xff) | (dst << 8);
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break;
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case 0x7: // BH
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this.regBX = (this.regBX & 0xff) | (dst << 8);
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this.regEBX = (this.regEBX & 0xff) | (dst << 8);
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break;
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default:
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break; // there IS no other case, but JavaScript inspections don't know that
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@ -415,28 +415,28 @@ var X86Help = {
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//
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switch (this.bModRM & 0x7) {
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case 0x0: // AX
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this.regAX = dst;
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this.regEAX = dst;
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break;
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case 0x1: // CX
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this.regCX = dst;
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this.regECX = dst;
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break;
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case 0x2: // DX
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this.regDX = dst;
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this.regEDX = dst;
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break;
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case 0x3: // BX
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this.regBX = dst;
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this.regEBX = dst;
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break;
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case 0x4: // SP
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this.regSP = dst;
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this.regESP = dst;
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break;
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case 0x5: // BP
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this.regBP = dst;
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this.regEBP = dst;
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break;
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case 0x6: // SI
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this.regSI = dst;
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this.regESI = dst;
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break;
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case 0x7: // DI
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this.regDI = dst;
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this.regEDI = dst;
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break;
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default:
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break; // there IS no other case, but JavaScript inspections don't know that
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@ -508,9 +508,9 @@ var X86Help = {
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opHelpRETF: function(n) {
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var regIP = this.popWord();
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var regCS = this.popWord();
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if (n) this.regSP = (this.regSP + n) & 0xffff;
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if (n) this.regESP = (this.regESP + n) & 0xffff;
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if (this.setCSIP(regIP, regCS, false)) {
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if (n) this.regSP = (this.regSP + n) & 0xffff;
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if (n) this.regESP = (this.regESP + n) & 0xffff;
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/*
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* As per Intel documentation: "If any of [the DS or ES] registers refer to segments whose DPL is
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* less than the new CPL (excluding conforming code segments), the segment register is loaded with
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