Added KW11 interface (and LKS register) definitions
This commit is contained in:
Jeff
Jeff Parsons
parent
4b4098a5c9
commit
1e1388b9ca
4 changed files with 474 additions and 429 deletions
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@ -302,55 +302,6 @@ var PDP11 = {
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* For more details: https://github.com/google/closure-compiler/wiki/ECMAScript6
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*/
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UNIBUS: { //16-bit 18-bit 22-bit Hex Description
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PSW: 0o177776, // 777776 17777776 0x3FFFFE Processor Status Word
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SL: 0o177774, // Stack Limit Register
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PIR: 0o177772, // Program Interrupt Request
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MB: 0o177770, // Microprogram break (11/70 only?)
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CPUERR: 0o177766, // CPU error (11/70 only?)
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SYSID: 0o177764, // System ID Register (11/70 only?)
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SIZE_HI: 0o177762, // Upper Size Register (always zero) (11/70 only?)
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SIZE_LO: 0o177760, // Lower Size Register (last 32-word block) (11/70 only?)
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DISPLAY: 0o177570, // Console Switch and Display
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XBUF: 0o177566, // Console Terminal: Transmitter Data Buffer Register
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XCSR: 0o177564, // Console Terminal: Transmitter Status Register
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RBUF: 0o177562, // Console Terminal: Receiver Data Buffer Register
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RCSR: 0o177560, // Console Terminal: Receiver Status Register
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MMR0: 0o177572, // 777572 17777572
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MMR1: 0o177574, // 777574 17777574
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MMR2: 0o177576, // 777576 17777576
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MMR3: 0o172516, // 772516 17772516
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UISDR0: 0o177600, // User I Space Descriptor Register 0
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UISDR1: 0o177602, // User I Space Descriptor Register 1
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UISDR2: 0o177604, // User I Space Descriptor Register 2
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UISDR3: 0o177606, // User I Space Descriptor Register 3
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UISDR4: 0o177610, // User I Space Descriptor Register 4
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UISDR5: 0o177612, // User I Space Descriptor Register 5
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UISDR6: 0o177614, // User I Space Descriptor Register 6
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UISDR7: 0o177616, // User I Space Descriptor Register 7
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UDSDR0: 0o177620, // User D Space Descriptor Register 0
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UDSDR1: 0o177622, // User D Space Descriptor Register 1
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UDSDR2: 0o177624, // User D Space Descriptor Register 2
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UDSDR3: 0o177626, // User D Space Descriptor Register 3
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UDSDR4: 0o177630, // User D Space Descriptor Register 4
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UDSDR5: 0o177632, // User D Space Descriptor Register 5
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UDSDR6: 0o177634, // User D Space Descriptor Register 6
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UDSDR7: 0o177636, // User D Space Descriptor Register 7
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UISAR0: 0o177640, // User I Space Address Register 0
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UISAR1: 0o177642, // User I Space Address Register 1
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UISAR2: 0o177644, // User I Space Address Register 2
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UISAR3: 0o177646, // User I Space Address Register 3
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UISAR4: 0o177650, // User I Space Address Register 4
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UISAR5: 0o177652, // User I Space Address Register 5
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UISAR6: 0o177654, // User I Space Address Register 6
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UISAR7: 0o177656, // User I Space Address Register 7
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UDSAR0: 0o177660, // User D Space Address Register 0
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UDSAR1: 0o177662, // User D Space Address Register 1
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UDSAR2: 0o177664, // User D Space Address Register 2
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UDSAR3: 0o177666, // User D Space Address Register 3
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UDSAR4: 0o177670, // User D Space Address Register 4
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UDSAR5: 0o177672, // User D Space Address Register 5
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UDSAR6: 0o177674, // User D Space Address Register 6
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UDSAR7: 0o177676, // User D Space Address Register 7
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SISDR0: 0o172200, // Supervisor I Space Descriptor Register 0
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SISDR1: 0o172202, // Supervisor I Space Descriptor Register 1
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SISDR2: 0o172204, // Supervisor I Space Descriptor Register 2
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@ -415,8 +366,63 @@ var PDP11 = {
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KDSAR5: 0o172372, // Kernel D Space Address Register 5
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KDSAR6: 0o172374, // Kernel D Space Address Register 6
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KDSAR7: 0o172376, // Kernel D Space Address Register 7
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MMR3: 0o172516, // 772516 17772516
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XBUF: 0o177566, // Console Terminal: Transmitter Data Buffer Register
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XCSR: 0o177564, // Console Terminal: Transmitter Status Register
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RBUF: 0o177562, // Console Terminal: Receiver Data Buffer Register
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RCSR: 0o177560, // Console Terminal: Receiver Status Register
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LKS: 0o177546, // KW11-L Clock Status
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DISPLAY: 0o177570, // Console Switch and Display
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MMR0: 0o177572, // 777572 17777572
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MMR1: 0o177574, // 777574 17777574
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MMR2: 0o177576, // 777576 17777576
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UISDR0: 0o177600, // User I Space Descriptor Register 0
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UISDR1: 0o177602, // User I Space Descriptor Register 1
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UISDR2: 0o177604, // User I Space Descriptor Register 2
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UISDR3: 0o177606, // User I Space Descriptor Register 3
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UISDR4: 0o177610, // User I Space Descriptor Register 4
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UISDR5: 0o177612, // User I Space Descriptor Register 5
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UISDR6: 0o177614, // User I Space Descriptor Register 6
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UISDR7: 0o177616, // User I Space Descriptor Register 7
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UDSDR0: 0o177620, // User D Space Descriptor Register 0
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UDSDR1: 0o177622, // User D Space Descriptor Register 1
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UDSDR2: 0o177624, // User D Space Descriptor Register 2
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UDSDR3: 0o177626, // User D Space Descriptor Register 3
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UDSDR4: 0o177630, // User D Space Descriptor Register 4
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UDSDR5: 0o177632, // User D Space Descriptor Register 5
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UDSDR6: 0o177634, // User D Space Descriptor Register 6
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UDSDR7: 0o177636, // User D Space Descriptor Register 7
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UISAR0: 0o177640, // User I Space Address Register 0
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UISAR1: 0o177642, // User I Space Address Register 1
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UISAR2: 0o177644, // User I Space Address Register 2
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UISAR3: 0o177646, // User I Space Address Register 3
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UISAR4: 0o177650, // User I Space Address Register 4
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UISAR5: 0o177652, // User I Space Address Register 5
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UISAR6: 0o177654, // User I Space Address Register 6
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UISAR7: 0o177656, // User I Space Address Register 7
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UDSAR0: 0o177660, // User D Space Address Register 0
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UDSAR1: 0o177662, // User D Space Address Register 1
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UDSAR2: 0o177664, // User D Space Address Register 2
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UDSAR3: 0o177666, // User D Space Address Register 3
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UDSAR4: 0o177670, // User D Space Address Register 4
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UDSAR5: 0o177672, // User D Space Address Register 5
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UDSAR6: 0o177674, // User D Space Address Register 6
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UDSAR7: 0o177676, // User D Space Address Register 7
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SIZE_LO: 0o177760, // Lower Size Register (last 32-word block) (11/70 only?)
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SIZE_HI: 0o177762, // Upper Size Register (always zero) (11/70 only?)
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SYSID: 0o177764, // System ID Register (11/70 only?)
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CPUERR: 0o177766, // CPU error (11/70 only?)
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MB: 0o177770, // Microprogram break (11/70 only?)
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PIR: 0o177772, // Program Interrupt Request
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SL: 0o177774, // Stack Limit Register
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PSW: 0o177776 // 777776 17777776 0x3FFFFE Processor Status Word
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},
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DL11: {
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DL11: { // SERIAL LINE INTERFACE
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DELAY: 8,
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PRI: 4,
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VEC: 0o64,
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@ -426,6 +432,15 @@ var PDP11 = {
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MAINT: 0x04, // Maintenance (read-write)
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BREAK: 0x01 // BREAK (read-write)
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}
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},
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KW11: { // KW11-L LINE TIME CLOCK
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DELAY: 0,
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PRI: 6,
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VEC: 0o100,
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LKS: {
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INT_ENABLE: 0x40,
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MONITOR: 0x80
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}
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}
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};
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@ -201,36 +201,43 @@ DevicePDP11.prototype.initBus = function(cmp, bus, cpu, dbg)
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};
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/**
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* readPSW(addr)
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* readLKS(addr)
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*
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* @this {DevicePDP11}
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* @param {number} addr (eg, 177776)
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* @param {number} addr (eg, PDP11.UNIBUS.LKS or 177546)
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* @return {number}
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*/
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DevicePDP11.prototype.readPSW = function(addr)
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DevicePDP11.prototype.readLKS = function(addr)
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{
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return this.cpu.getPSW();
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var result = this.kw11.lks;
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this.kw11.lks &= ~PDP11.KW11.LKS.MONITOR;
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return result;
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};
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/**
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* writePSW(data, addr)
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* writeLKS(data, addr)
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*
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* @this {DevicePDP11}
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* @param {number} data
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* @param {number} addr (eg, 177776)
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* @param {number} addr (eg, PDP11.UNIBUS.LKS or 177546)
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*/
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DevicePDP11.prototype.writePSW = function(data, addr)
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DevicePDP11.prototype.writeLKS = function(data, addr)
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{
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var maskDisallowed = PDP11.PSW.UNUSED | PDP11.PSW.TF;
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this.cpu.setPSW((data & ~maskDisallowed) | (this.cpu.getPSW() & maskDisallowed));
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this.cpu.opFlags |= PDP11.OPFLAG.SKIP_FLAGS;
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this.kw11.lks = data;
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if (data & PDP11.KW11.LKS.INT_ENABLE) {
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if (!this.kw11.init) {
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setInterval(this.kw11_interrupt.bind(this), 25);
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this.kw11.init = 1;
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}
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}
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this.kw11.lks = data & ~PDP11.KW11.LKS.MONITOR;
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};
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/**
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* readXCSR(addr)
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*
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* @this {DevicePDP11}
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* @param {number} addr (eg, 177564)
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* @param {number} addr (eg, PDP11.UNIBUS.XCSR or 177564)
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* @return {number}
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*/
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DevicePDP11.prototype.readXCSR = function(addr)
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@ -243,7 +250,7 @@ DevicePDP11.prototype.readXCSR = function(addr)
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*
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* @this {DevicePDP11}
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* @param {number} data
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* @param {number} addr (eg, 177564)
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* @param {number} addr (eg, PDP11.UNIBUS.XCSR or 177564)
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*/
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DevicePDP11.prototype.writeXCSR = function(data, addr)
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{
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@ -263,6 +270,32 @@ DevicePDP11.prototype.writeXCSR = function(data, addr)
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this.tty.xcsr = (this.tty.xcsr & PDP11.DL11.XCSR.READY) | (data & ~PDP11.DL11.XCSR.READY);
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};
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/**
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* readPSW(addr)
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*
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* @this {DevicePDP11}
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* @param {number} addr (eg, PDP11.UNIBUS.PSW or 177776)
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* @return {number}
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*/
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DevicePDP11.prototype.readPSW = function(addr)
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{
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return this.cpu.getPSW();
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};
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/**
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* writePSW(data, addr)
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*
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* @this {DevicePDP11}
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* @param {number} data
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* @param {number} addr (eg, PDP11.UNIBUS.PSW or 177776)
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*/
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DevicePDP11.prototype.writePSW = function(data, addr)
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{
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var maskDisallowed = PDP11.PSW.UNUSED | PDP11.PSW.TF;
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this.cpu.setPSW((data & ~maskDisallowed) | (this.cpu.getPSW() & maskDisallowed));
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this.cpu.opFlags |= PDP11.OPFLAG.SKIP_FLAGS;
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};
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/**
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* rk11_go()
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*
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@ -645,9 +678,9 @@ DevicePDP11.prototype.rp11_end = function(err, meta, block, address, count)
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*/
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DevicePDP11.prototype.kw11_interrupt = function()
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{
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this.kw11.csr |= 0x80;
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if (this.kw11.csr & 0x40) {
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this.cpu.interrupt(0, 6, 0x40 /*0100*/);
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this.kw11.lks |= PDP11.KW11.LKS.MONITOR;
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if (this.kw11.lks & PDP11.KW11.LKS.INT_ENABLE) {
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this.cpu.interrupt(PDP11.KW11.DELAY, PDP11.KW11.PRI, PDP11.KW11.VEC);
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}
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};
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@ -734,9 +767,9 @@ DevicePDP11.prototype.insertData = function(original, physicalAddress, data, byt
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if (physicalAddress & 1) {
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if (!byteFlag) {
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//log.push("TRAP 4 201 " + physicalAddress.toString(8) + " " + data.toString(8));
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return this.cpu.trap(PDP11.TRAP.BUS_ERROR, 122);
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this.cpu.trap(PDP11.TRAP.BUS_ERROR, 122);
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}
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if (data >= 0) {
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else if (data >= 0) {
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data = ((data << 8) & 0xff00) | (original & 0xff);
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} else {
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data = original;
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@ -833,7 +866,7 @@ DevicePDP11.prototype.reset = function()
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this.display.misc = (this.display.misc & ~0x77) | 0x14; // kernel 16 bit
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this.tty.rcsr = 0;
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this.tty.xcsr = 0x80; /*0200*/
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this.kw11.csr = 0;
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this.kw11.lks = 0;
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this.rk11.rkcs = 0x80; /*0200*/
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this.rl11.csr = 0x80;
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this.rp11_init();
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@ -1101,22 +1134,22 @@ DevicePDP11.prototype.access = function(physicalAddress, data, byteFlag)
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}
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result = 0;
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break;
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case 0x3FFF74: /*017777564*/ // console xcsr
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// if (data < 0) {
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// result = tty.xcsr;
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// } else {
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// result = this.insertData(tty.xcsr, physicalAddress, data, byteFlag);
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// if (result >= 0) {
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// if ((tty.xcsr & 0xC0) /*0300*/ == 0x80 /*0200*/&& (result & 0x40) /*0100*/) {
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// cpu.interrupt(8, 4, 0x34, /*064*/ function() {
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// tty.xcsr |= 0x80; /*0200*/
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// return !!(tty.xcsr & 0x40); /*0100*/
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// });
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// }
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// tty.xcsr = (tty.xcsr & 0x80) /*0200*/ | (result & ~0x80) /*0200*/;
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// }
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// }
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break;
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// case 0x3FFF74: /*017777564*/ // console xcsr
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// if (data < 0) {
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// result = tty.xcsr;
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// } else {
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// result = this.insertData(tty.xcsr, physicalAddress, data, byteFlag);
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// if (result >= 0) {
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// if ((tty.xcsr & 0xC0) /*0300*/ == 0x80 /*0200*/&& (result & 0x40) /*0100*/) {
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// cpu.interrupt(8, 4, 0x34, /*064*/ function() {
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// tty.xcsr |= 0x80; /*0200*/
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// return !!(tty.xcsr & 0x40); /*0100*/
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// });
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// }
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// tty.xcsr = (tty.xcsr & 0x80) /*0200*/ | (result & ~0x80) /*0200*/;
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// }
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// }
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// break;
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case 0x3FFF72: /*017777562*/ // console rbuf
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result = 0;
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if (data < 0) {
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@ -1140,23 +1173,23 @@ DevicePDP11.prototype.access = function(physicalAddress, data, byteFlag)
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if (result >= 0) tty.rcsr = (tty.rcsr & 0x80) /*0200*/ | (result & ~0x80) /*0200*/;
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}
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break;
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case 0x3FFF66: /*017777546*/ // kw11.csr
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if (data < 0) {
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result = kw11.csr;
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kw11.csr &= ~0x80; /*0200*/
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} else {
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result = this.insertData(kw11.csr, physicalAddress, data, byteFlag);
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if (result >= 0) {
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if (result & 0x40) /*0100*/ {
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if (!kw11.init) {
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setInterval(this.kw11_interrupt.bind(this), 25);
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kw11.init = 1;
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}
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}
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kw11.csr = result & ~0x80; /*0200*/
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}
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}
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break;
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// case 0x3FFF66: /*017777546*/ // kw11.lks
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// if (data < 0) {
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// result = kw11.lks;
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// kw11.lks &= ~0x80; /*0200*/
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// } else {
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// result = this.insertData(kw11.lks, physicalAddress, data, byteFlag);
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// if (result >= 0) {
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// if (result & 0x40) /*0100*/ {
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// if (!kw11.init) {
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// setInterval(this.kw11_interrupt.bind(this), 25);
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// kw11.init = 1;
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// }
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// }
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// kw11.lks = result & ~0x80; /*0200*/
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// }
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// }
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// break;
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default:
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cpu.regCPUErr |= PDP11.CPUERR.TIMEOUT;
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return cpu.trap(PDP11.TRAP.BUS_ERROR, 126);
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@ -1446,12 +1479,9 @@ DevicePDP11.prototype.access = function(physicalAddress, data, byteFlag)
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* ES6 ALERT: As you can see below, I've finally started using computed property names.
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*/
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DevicePDP11.UNIBUS_TABLE = {
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[PDP11.UNIBUS.PSW]: [
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null, null, DevicePDP11.prototype.readPSW, DevicePDP11.prototype.writePSW
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],
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[PDP11.UNIBUS.XCSR]: [
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null, null, DevicePDP11.prototype.readXCSR, DevicePDP11.prototype.writeXCSR
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]
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[PDP11.UNIBUS.LKS]: [null, null, DevicePDP11.prototype.readLKS, DevicePDP11.prototype.writeLKS],
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[PDP11.UNIBUS.XCSR]: [null, null, DevicePDP11.prototype.readXCSR, DevicePDP11.prototype.writeXCSR],
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[PDP11.UNIBUS.PSW]: [null, null, DevicePDP11.prototype.readPSW, DevicePDP11.prototype.writePSW]
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};
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/**
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