Compaq DeskPro 386 ROM BIOS boots UNMODIFIED now
This commit is contained in:
Jeff Parsons
jeffpar
parent
b9252390bf
commit
1508cd1bf3
12 changed files with 298 additions and 207 deletions
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@ -215,6 +215,13 @@ x80b3: xor dx,dx ; 000080B3 33D2 '3.'
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pop bx ; 000080E0 5B '['
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ret ; 000080E1 C3 '.'
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;;
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;; Use INT 0x15, (AH) == 0x89, to enter protected-mode
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;;
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;; Returns ZF set if successful
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;;
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;; See Compaq 386/25 TechRef, p.4-98 for details
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;;
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x80e2: push bx ; 000080E2 53 'S'
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push cx ; 000080E3 51 'Q'
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push dx ; 000080E4 52 'R'
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@ -236,6 +243,11 @@ x80e2: push bx ; 000080E2 53 'S'
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pop bx ; 00008100 5B '['
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ret ; 00008101 C3 '.'
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;;
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;; Descriptor table initialization
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;;
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;; Used by x80e2 to prepare for an INT 0x15 call to enter protected-mode
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;;
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x8102: pusha ; 00008102 60 '`'
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push ds ; 00008103 1E '.'
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push es ; 00008104 06 '.'
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@ -314,6 +326,11 @@ x8102: pusha ; 00008102 60 '`'
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popa ; 000081C9 61 'a'
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ret ; 000081CA C3 '.'
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;;
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;; Descriptor initializer
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;;
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;; Used by x8102 to initialize a descriptor table
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;;
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x81cb: mov word [si],0xffff ; 000081CB C704FFFF '....'
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mov bh,ah ; 000081CF 8AFC '..'
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shl ax,0x4 ; 000081D1 C1E004 '...'
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@ -4160,6 +4177,7 @@ xa43c: mov ax,0x40 ; 0000A43C B84000 '.@.'
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mov ds,ax ; 0000A43F 8ED8 '..'
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mov ss,[0x69] ; 0000A441 8E166900 '..i.'
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mov sp,[0x67] ; 0000A445 8B266700 '.&g.'
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;;
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;; Disable A20
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;;
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@ -8054,6 +8072,10 @@ xc825: pusha ; 0000C825 60 '`'
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mov [0x69],ss ; 0000C835 8C166900 '..i.'
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mov al,0xd1 ; 0000C839 B0D1 '..'
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out 0x84,al ; 0000C83B E684 '..'
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;;
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;; Enter protected-mode
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;;
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call x80e2 ; 0000C83D E8A2B8 '...'
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jz xc845 ; 0000C840 7403 't.'
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jmp xc8ef ; 0000C842 E9AA00 '...'
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@ -8071,7 +8093,13 @@ xc845: mov al,0xd2 ; 0000C845 B0D2 '..'
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mov bh,al ; 0000C85C 8AF8 '..'
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mov bl,0x10 ; 0000C85E B310 '..'
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call xc8fc ; 0000C860 E89900 '...'
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;;
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;; The next function writes 0xFF to 0x80C00000, presumably to ensure that
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;; Compaq Built-in Memory at 0xFE0000 is NOT mapped to 0x0E000 at the moment
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;;
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call x84a5 ; 0000C863 E83FBC '.?.'
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mov ax,[0x8d] ; 0000C866 A18D00 '...'
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add ax,0x80 ; 0000C869 058000 '...'
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xor dx,dx ; 0000C86C 33D2 '3.'
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@ -8084,7 +8112,14 @@ xc845: mov al,0xd2 ; 0000C845 B0D2 '..'
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;;
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;; Relocate the ROM
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;;
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;; On return, we should now be running in RAM (ie, a copy of the ROM in 128Kb of RAM
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;; now mapped to %0E0000 through %0FFFFF)
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;;
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call x853c ; 0000C87C E8BDBC '...'
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;;
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;; Return to real-mode
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;;
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mov al,0xd3 ; 0000C87F B0D3 '..'
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out 0x84,al ; 0000C881 E684 '..'
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mov ax,0x28 ; 0000C883 B82800 '.(.'
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@ -9691,9 +9726,13 @@ xd509: mov [0x41],ah ; 0000D509 88264100 '.&A.'
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pop ax ; 0000D50D 58 'X'
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ret ; 0000D50E C3 '.'
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;;
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;; Check the FDC's ST0 response
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;;
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xd50f: mov al,[0x42] ; 0000D50F A04200 '.B.'
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test al,0xc0 ; 0000D512 A8C0 '..'
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jz xd53d ; 0000D514 7427 't',0x27
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jz xd53d ; 0000D514 No problems
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test al,0x8 ; 0000D516 A808 '..'
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jz xd51e ; 0000D518 7404 't.'
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mov ah,0x80 ; 0000D51A B480 '..'
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@ -11479,8 +11518,16 @@ xe714: mov al,0xb9 ; 0000E714 B0B9 '..'
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out 0x84,al ; 0000E716 E684 '..'
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mov cx,0x3 ; 0000E718 B90300 '...'
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xe71b: push cx ; 0000E71B 51 'Q'
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;;
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;; Reset the disk controller
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;;
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mov ah,0x0 ; 0000E71C B400 '..'
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int 0x13 ; 0000E71E CD13 '..'
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;;
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;; Read the boot sector
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;;
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mov bx,0x7c00 ; 0000E720 BB007C '..|'
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mov cx,0x1 ; 0000E723 B90100 '...'
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mov ax,0x201 ; 0000E726 B80102 '...'
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@ -11520,14 +11567,37 @@ xe73c: loop xe71b ; 0000E73C E2DD '..'
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;;
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xe76e: int 0x18 ; 0000E76E CD18 '..'
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;;
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;; Boot sector successfully read
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;;
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xe770: test dl,0x80 ; 0000E770 F6C280 '...'
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jnz xe793 ; 0000E773 751E 'u.'
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;;
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;; More disk I/O (TODO: Investigate)
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;;
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push bx ; 0000E775 53 'S'
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call xd540 ; 0000E776 E8C7ED '...'
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pop bx ; 0000E779 5B '['
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;;
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;; Check the ROM progress byte for 0xBD (value I've seen: 0xB9)
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;;
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in al,0x84 ; 0000E77A E484 '..'
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cmp al,0xbd ; 0000E77C 3CBD '<.'
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jz xe714 ; 0000E77E 7494 't.'
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;;
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;; This code looks broken: ES:BX points to the boot sector just loaded
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;; (0x0000:0x7C00), and apparently it wants to scan the first 9 words of
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;; the boot sector, to see if they all match the 1st word; if they do,
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;; then it's likely the boot sector is invalid (hence the "boot_error"
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;; message). However, it's loading (AX) with the 1st word from DS:BX
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;; (0x0040:0x7C00) rather than ES:BX, which increases the likelihood that
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;; this code will always see a difference and never trigger the error.
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;;
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;; The value in (AX) is typically 0x0000.
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;;
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mov ax,[bx] ; 0000E780 8B07 '..'
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mov cx,0x9 ; 0000E782 B90900 '...'
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mov di,bx ; 0000E785 8BFB '..'
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@ -11539,6 +11609,9 @@ xe770: test dl,0x80 ; 0000E770 F6C280 '...'
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;; Hang
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xe791: jmp short xe791 ; 0000E791 EBFE '..'
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;;
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;; Hard disk sector validation (as opposed to the preceding floppy disk sector validation)
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;;
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xe793: mov al,0x33 ; 0000E793 B033 '.3'
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mov ah,al ; 0000E795 8AE0 '..'
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call xb544 ; 0000E797 E8AACD '...'
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@ -11547,10 +11620,11 @@ xe793: mov al,0x33 ; 0000E793 B033 '.3'
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call xb549 ; 0000E79E E8A8CD '...'
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;;
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;; Verify the boot sector signature (0xAA55)
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;; Verify the hard disk boot sector signature (0xAA55)
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;;
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cmp word [bx+0x1fe],0xaa55 ; 0000E7A1 81BFFE0155AA '....U.'
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jnz xe76e ; 0000E7A7 75C5 'u.'
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xe7a9: in al,0x86 ; 0000E7A9 E486 '..'
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test al,0x80 ; 0000E7AB A880 '..'
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jnz xe7b7 ; 0000E7AD 7508 'u.'
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@ -12105,24 +12179,13 @@ xec32: in al,0x64 ; 0000EC32 E464 '.d'
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pop cx ; 0000EC38 59 'Y'
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ret ; 0000EC39 C3 '.'
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times 4 db 0xFF ; 0000EC3A - 0000EC3D
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db 0xFF,0xFF,0xFF,0xFF,0xFF,0x34,0xC9,0x45,0xC9,0xC0,0xEC,0xC0,0xEC,0xC0,0xEC,0xE1
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db 0xED,0xA6,0xEC,0xA6,0xEC,0x48,0x9F,0x63,0x91,0x7C,0x8F,0x10,0x90,0x38,0xA0
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push word [si] ; 0000EC3E FF34 '.4'
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leave ; 0000EC40 C9 '.'
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inc bp ; 0000EC41 45 'E'
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leave ; 0000EC42 C9 '.'
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shr ah,0xc0 ; 0000EC43 C0ECC0 '...'
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in al,dx ; 0000EC46 EC '.'
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shr ah,0xe1 ; 0000EC47 C0ECE1 '...'
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in ax,dx ; 0000EC4A ED '.'
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cmpsb ; 0000EC4B A6 '.'
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in al,dx ; 0000EC4C EC '.'
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cmpsb ; 0000EC4D A6 '.'
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in al,dx ; 0000EC4E EC '.'
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dec ax ; 0000EC4F 48 'H'
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lahf ; 0000EC50 9F '.'
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arpl [bx+di+0x8f7c],dx ; 0000EC51 63917C8F 'c.|.'
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adc [bx+si+0xa038],dl ; 0000EC55 109038A0 '..8.'
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;;
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;; This address (F000:EC59) is stored in the IDT vector for INT 0x40 when a hard disk controls INT 0x13
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;;
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int13_diskette:
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sti ; 0000EC59 FB '.'
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push bp ; 0000EC5A 55 'U'
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push ds ; 0000EC5B 1E '.'
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@ -12161,6 +12224,7 @@ xec95: mov bl,al ; 0000EC95 8AD8 '..'
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xeca2: cmp al,0x1 ; 0000ECA2 3C01 '<.'
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jna xec95 ; 0000ECA4 76EF 'v.'
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xeca6: call xd3e8 ; 0000ECA6 E83FE7 '.?.'
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xeca9: mov bl,[es:si+0x2] ; 0000ECA9 268A5C02 '&.\.'
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mov [0x40],bl ; 0000ECAD 881E4000 '..@.'
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or word [bp+0x16],0x200 ; 0000ECB1 814E160002 '.N...'
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@ -12179,9 +12243,15 @@ xeca9: mov bl,[es:si+0x2] ; 0000ECA9 268A5C02 '&.\.'
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jnz xecd4 ; 0000ECC3 750F 'u.'
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call x9061 ; 0000ECC5 E899A3 '...'
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jc xecd4 ; 0000ECC8 720A 'r',0x0A
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;;
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;; Perform FDC operation (eg, read); ZF set on success
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;;
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call xecf0 ; 0000ECCA E82300 '.#.'
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jz xecd4 ; 0000ECCD 7405 't.'
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or word [bp+0x16],0x1 ; 0000ECCF 814E160100 '.N...'
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xecd4: ret ; 0000ECD4 C3 '.'
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xecd5: mov al,0x6 ; 0000ECD5 B006 '..'
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@ -12283,8 +12353,13 @@ xedb8: sub si,byte +0x5 ; 0000EDB8 83EE05 '...'
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xedbb: call xef85 ; 0000EDBB E8C701 '...'
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jnz xedd7 ; 0000EDBE 7517 'u.'
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;;
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;; Read 7 FDC response bytes, starting with ST0, storing them at 0x40:0x42
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;;
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mov cx,0x7 ; 0000EDC0 B90700 '...'
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mov di,0x42 ; 0000EDC3 BF4200 '.B.'
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xedc6: call xc9bf ; 0000EDC6 E8F6DB '...'
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jz xedc6 ; 0000EDC9 74FB 't.'
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call x919a ; 0000EDCB E8CCA3 '...'
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@ -12292,9 +12367,19 @@ xedc6: call xc9bf ; 0000EDC6 E8F6DB '...'
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mov [di],al ; 0000EDCF 8805 '..'
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inc di ; 0000EDD1 47 'G'
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loop xedc6 ; 0000EDD2 E2F2 '..'
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;;
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;; If the FDC's response in ST0 is good, this will return (AH) == 0x00
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;;
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call xd50f ; 0000EDD4 E838E7 '.8.'
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xedd7: mov [0x41],ah ; 0000EDD7 88264100 '.&A.'
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;;
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;; This appears to validate the rest of the FDC response bytes; (AX) should be zero on success
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;;
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call xecd5 ; 0000EDDB E8F7FE '...'
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or ah,ah ; 0000EDDE 0AE4 0x0A,'.'
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ret ; 0000EDE0 C3 '.'
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@ -12896,12 +12981,14 @@ xf494: mov al,0x0 ; 0000F494 B000
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out 0x80,al ; 0000F496 E680
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;;
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;; When we arrive here, the A20 line has been disabled, so in theory, the GDT-in-ROM
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;; is accessible only at the "lo" ROM address (%0F0730), not the "hi" address (%FF0730).
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;; Which means the following JMP through selector 0x28 (indeed, any selector access)
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;; should immediately fail. TODO: Determine how this code works in "real life"
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;; When we arrive here, the A20 line has been disabled, so in theory, the GDT is
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;; accessible only at the "low" ROM address (%0F0730), not the "high" address (%FF0730).
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;; And even if we DID access it from the "low" address, it contains base addresses (eg,
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;; for selector 0x28) located at %FFxxxx, so we're still screwed if A20 is disabled.
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;;
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;; It seems this code doesn't really do much PROVIDED bits 6 and 7 of the RAM Settings
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;; TODO: Determine how this code works in "real life"
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;;
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;; FYI, it seems this code doesn't do anything PROVIDED bits 6 and 7 of the RAM Settings
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;; register are set to anything other than 0x40.
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;;
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lgdt [cs:0x077e] ; 0000F498 load [gdtr_hi] into GDTR
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@ -75,113 +75,5 @@ and then gets stuck loading CS:IP of 0x28:0xF4AC:
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CR0=0000FFF1 CR2=00000000 CR3=00000000 PS=00000082 V0 D0 I0 T0 S1 Z0 A0 P0 C0
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F000:F4A7 EAACF42800 JMP 0028:F4AC
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Here's the code leading up to it:
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F000:F494 B000 MOV AL,00 ;history=8
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F000:F496 E680 OUT 80,AL ;history=7
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F000:F498 2E CS: ;history=6
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F000:F499 0F01167E07 LGDT [077E] ;history=5
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F000:F49E 0F2000 MOV EAX,CR0 ;history=4
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F000:F4A1 0D0100 OR AX,0001 ;history=3
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F000:F4A4 0F2200 MOV CR0,EAX ;history=2
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F000:F4A7 EAACF42800 JMP 0028:F4AC ;history=1
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%00FF073C 92C0 8000 FFFF 0000 - 9200 0000 FFFF 0000 ................
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%00FF074C 9A0F 0000 FFFF 0000 - 9200 C000 FFFF 0000 ................
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id physaddr blkaddr used size type id physaddr blkaddr used size type
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-------- --------- -------- ------ ------ ---- -------- --------- -------- ------ ------ ----
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00040006 %00000000: 00000000 0x8000 0x8000 RAM 00040006 %00000000: 00000000 0x8000 0x8000 RAM
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00040008 %00008000: 00008000 0x8000 0x8000 RAM 00040008 %00008000: 00008000 0x8000 0x8000 RAM
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0004000A %00010000: 00010000 0x8000 0x8000 RAM 0004000A %00010000: 00010000 0x8000 0x8000 RAM
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0004000C %00018000: 00018000 0x8000 0x8000 RAM 0004000C %00018000: 00018000 0x8000 0x8000 RAM
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0004000E %00020000: 00020000 0x8000 0x8000 RAM 0004000E %00020000: 00020000 0x8000 0x8000 RAM
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00040010 %00028000: 00028000 0x8000 0x8000 RAM 00040010 %00028000: 00028000 0x8000 0x8000 RAM
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00040012 %00030000: 00030000 0x8000 0x8000 RAM 00040012 %00030000: 00030000 0x8000 0x8000 RAM
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00040014 %00038000: 00038000 0x8000 0x8000 RAM 00040014 %00038000: 00038000 0x8000 0x8000 RAM
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00040016 %00040000: 00040000 0x8000 0x8000 RAM 00040016 %00040000: 00040000 0x8000 0x8000 RAM
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00040018 %00048000: 00048000 0x8000 0x8000 RAM 00040018 %00048000: 00048000 0x8000 0x8000 RAM
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0004001A %00050000: 00050000 0x8000 0x8000 RAM 0004001A %00050000: 00050000 0x8000 0x8000 RAM
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0004001C %00058000: 00058000 0x8000 0x8000 RAM 0004001C %00058000: 00058000 0x8000 0x8000 RAM
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0004001E %00060000: 00060000 0x8000 0x8000 RAM 0004001E %00060000: 00060000 0x8000 0x8000 RAM
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00040020 %00068000: 00068000 0x8000 0x8000 RAM 00040020 %00068000: 00068000 0x8000 0x8000 RAM
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00040022 %00070000: 00070000 0x8000 0x8000 RAM 00040022 %00070000: 00070000 0x8000 0x8000 RAM
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00040024 %00078000: 00078000 0x8000 0x8000 RAM 00040024 %00078000: 00078000 0x8000 0x8000 RAM
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00040026 %00080000: 00080000 0x8000 0x8000 RAM 00040026 %00080000: 00080000 0x8000 0x8000 RAM
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00040028 %00088000: 00088000 0x8000 0x8000 RAM 00040028 %00088000: 00088000 0x8000 0x8000 RAM
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0004002A %00090000: 00090000 0x8000 0x8000 RAM 0004002A %00090000: 00090000 0x8000 0x8000 RAM
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0004002C %00098000: 00098000 0x8000 0x8000 RAM 0004002C %00098000: 00098000 0x8000 0x8000 RAM
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00040088 %000B8000: 000B8000 0x8000 0x8000 VIDEO 000400A0 %000B8000: 000B8000 0x8000 0x8000 VIDEO
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00040002 %000C0000: 000C0000 0x4000 0x8000 ROM 00040002 %000C0000: 000C0000 0x4000 0x8000 ROM
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0004003F %000E0000: 000E0000 0x???? 0x8000 ROM
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00040041 %000E8000: 000E0000 0x???? 0x8000 ROM
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00040004 %000F0000: 000F8000 0x8000 0x8000 ROM 00040043 %000F0000: 000E0000 0x???? 0x8000 ROM
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00040004 %000F8000: 000F8000 0x8000 0x8000 ROM 00040045 %000F8000: 000E0000 0x???? 0x8000 ROM
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00040048 %00100000: 00100000 0x8000 0x8000 RAM 00040048 %00100000: 00100000 0x8000 0x8000 RAM
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0004004A %00108000: 00108000 0x8000 0x8000 RAM 0004004A %00108000: 00108000 0x8000 0x8000 RAM
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0004004C %00110000: 00110000 0x8000 0x8000 RAM 0004004C %00110000: 00110000 0x8000 0x8000 RAM
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0004004E %00118000: 00118000 0x8000 0x8000 RAM 0004004E %00118000: 00118000 0x8000 0x8000 RAM
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00040050 %00120000: 00120000 0x8000 0x8000 RAM 00040050 %00120000: 00120000 0x8000 0x8000 RAM
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00040052 %00128000: 00128000 0x8000 0x8000 RAM 00040052 %00128000: 00128000 0x8000 0x8000 RAM
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00040054 %00130000: 00130000 0x8000 0x8000 RAM 00040054 %00130000: 00130000 0x8000 0x8000 RAM
|
||||
00040056 %00138000: 00138000 0x8000 0x8000 RAM 00040056 %00138000: 00138000 0x8000 0x8000 RAM
|
||||
00040058 %00140000: 00140000 0x8000 0x8000 RAM 00040058 %00140000: 00140000 0x8000 0x8000 RAM
|
||||
0004005A %00148000: 00148000 0x8000 0x8000 RAM 0004005A %00148000: 00148000 0x8000 0x8000 RAM
|
||||
0004005C %00150000: 00150000 0x8000 0x8000 RAM 0004005C %00150000: 00150000 0x8000 0x8000 RAM
|
||||
0004005E %00158000: 00158000 0x8000 0x8000 RAM 0004005E %00158000: 00158000 0x8000 0x8000 RAM
|
||||
00040060 %00160000: 00160000 0x8000 0x8000 RAM 00040060 %00160000: 00160000 0x8000 0x8000 RAM
|
||||
00040062 %00168000: 00168000 0x8000 0x8000 RAM 00040062 %00168000: 00168000 0x8000 0x8000 RAM
|
||||
00040064 %00170000: 00170000 0x8000 0x8000 RAM 00040064 %00170000: 00170000 0x8000 0x8000 RAM
|
||||
00040066 %00178000: 00178000 0x8000 0x8000 RAM 00040066 %00178000: 00178000 0x8000 0x8000 RAM
|
||||
00040068 %00180000: 00180000 0x8000 0x8000 RAM 00040068 %00180000: 00180000 0x8000 0x8000 RAM
|
||||
0004006A %00188000: 00188000 0x8000 0x8000 RAM 0004006A %00188000: 00188000 0x8000 0x8000 RAM
|
||||
0004006C %00190000: 00190000 0x8000 0x8000 RAM 0004006C %00190000: 00190000 0x8000 0x8000 RAM
|
||||
0004006E %00198000: 00198000 0x8000 0x8000 RAM 0004006E %00198000: 00198000 0x8000 0x8000 RAM
|
||||
00040070 %001A0000: 001A0000 0x8000 0x8000 RAM 00040070 %001A0000: 001A0000 0x8000 0x8000 RAM
|
||||
00040072 %001A8000: 001A8000 0x8000 0x8000 RAM 00040072 %001A8000: 001A8000 0x8000 0x8000 RAM
|
||||
00040074 %001B0000: 001B0000 0x8000 0x8000 RAM 00040074 %001B0000: 001B0000 0x8000 0x8000 RAM
|
||||
00040076 %001B8000: 001B8000 0x8000 0x8000 RAM 00040076 %001B8000: 001B8000 0x8000 0x8000 RAM
|
||||
00040078 %001C0000: 001C0000 0x8000 0x8000 RAM 00040078 %001C0000: 001C0000 0x8000 0x8000 RAM
|
||||
0004007A %001C8000: 001C8000 0x8000 0x8000 RAM 0004007A %001C8000: 001C8000 0x8000 0x8000 RAM
|
||||
0004007C %001D0000: 001D0000 0x8000 0x8000 RAM 0004007C %001D0000: 001D0000 0x8000 0x8000 RAM
|
||||
0004007E %001D8000: 001D8000 0x8000 0x8000 RAM 0004007E %001D8000: 001D8000 0x8000 0x8000 RAM
|
||||
00040080 %001E0000: 001E0000 0x8000 0x8000 RAM 00040080 %001E0000: 001E0000 0x8000 0x8000 RAM
|
||||
00040082 %001E8000: 001E8000 0x8000 0x8000 RAM 00040082 %001E8000: 001E8000 0x8000 0x8000 RAM
|
||||
00040084 %001F0000: 001F0000 0x8000 0x8000 RAM 00040084 %001F0000: 001F0000 0x8000 0x8000 RAM
|
||||
00040086 %001F8000: 001F8000 0x8000 0x8000 RAM 00040086 %001F8000: 001F8000 0x8000 0x8000 RAM
|
||||
0004002E %00FA0000: 00FA0000 0x8000 0x8000 RAM 0004002E %00FA0000: 00FA0000 0x8000 0x8000 RAM
|
||||
00040030 %00FA8000: 00FA8000 0x8000 0x8000 RAM 00040030 %00FA8000: 00FA8000 0x8000 0x8000 RAM
|
||||
00040032 %00FB0000: 00FB0000 0x8000 0x8000 RAM 00040032 %00FB0000: 00FB0000 0x8000 0x8000 RAM
|
||||
00040034 %00FB8000: 00FB8000 0x8000 0x8000 RAM 00040034 %00FB8000: 00FB8000 0x8000 0x8000 RAM
|
||||
00040036 %00FC0000: 00FC0000 0x8000 0x8000 RAM 00040036 %00FC0000: 00FC0000 0x8000 0x8000 RAM
|
||||
00040038 %00FC8000: 00FC8000 0x8000 0x8000 RAM 00040038 %00FC8000: 00FC8000 0x8000 0x8000 RAM
|
||||
0004003A %00FD0000: 00FD0000 0x8000 0x8000 RAM 0004003A %00FD0000: 00FD0000 0x8000 0x8000 RAM
|
||||
0004003C %00FD8000: 00FD8000 0x8000 0x8000 RAM 0004003C %00FD8000: 00FD8000 0x8000 0x8000 RAM
|
||||
0004003E %00FE0000: 00FE0000 0x8000 0x8000 RAM 0004003E %00FE0000: 00FE0000 0x8000 0x8000 RAM
|
||||
00040040 %00FE8000: 00FE8000 0x8000 0x8000 RAM 00040040 %00FE8000: 00FE8000 0x8000 0x8000 RAM
|
||||
00040042 %00FF0000: 00FF0000 0x8000 0x8000 RAM 00040042 %00FF0000: 00FF0000 0x8000 0x8000 RAM
|
||||
00040044 %00FF8000: 00FF8000 0x8000 0x8000 RAM 00040044 %00FF8000: 00FF8000 0x8000 0x8000 RAM
|
||||
00040046 %80C00000: 80C00000 0x0001 0x8000 H/W 00040046 %80C00000: 80C00000 0x0001 0x8000 H/W
|
||||
00040004 %FFFF0000: 000F8000 0x8000 0x8000 ROM 00040004 %FFFF0000: 000F8000 0x8000 0x8000 ROM
|
||||
00040004 %FFFF8000: 000F8000 0x8000 0x8000 ROM 00040004 %FFFF8000: 000F8000 0x8000 0x8000 ROM
|
||||
|
||||
But when we stopped here next, it was no longer good:
|
||||
|
||||
breakpoint hit: F000:F498 (exec)
|
||||
stopped (27572162 ops, 443166 cycles, 143 ms, 3099063 hz)
|
||||
EAX=0000FF00 EBX=00000080 ECX=0000270F EDX=0000004A
|
||||
ESP=000000FE EBP=00000000 ESI=00007FB6 EDI=00008000
|
||||
SS=0030 DS=0040 ES=0000 FS=0000 GS=0304 PS=00000046 V0 D0 I0 T0 S0 Z1 A0 P1 C0
|
||||
F000:F498 2E CS:
|
||||
F000:F499 0F01167E07 LGDT [077E]
|
||||
|
||||
F000:077E 0047 0730 00FF FFFF - 0000 0000 87AA 0018 G.0.............
|
||||
F000:078E 87F8 0018 8828 0018 - 0F2E 1601 0778 200F ....(.......x..
|
||||
|
||||
%00FF0730 0000 0000 0000 0000 - 0000 0000 0000 0000 ................
|
||||
%00FF0740 0000 0000 0000 0000 - 0000 0000 0000 0000 ................
|
||||
|
||||
Turns out this is because the A20 line has been disabled.
|
||||
|
||||
-------------------------------------------------------------------------------------------------
|
||||
|
||||
This code will fail if the A20 line is off. Until I can figure out why this code is being run
|
||||
with A20 off, I've worked around it by enabling A20 internally whenever protected-mode is active.
|
||||
|
|
|
|||
Loading…
Reference in a new issue