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Added lots of PDP-10 compare/increment/decrement/skip/jump instructions

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This commit is contained in:
Jeff 2017-03-09 12:30:51 -08:00 • committed by Jeff Parsons
commit 0dc6b7276b
16 changed files with 1171 additions and 650 deletions
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962
modules/pdp10/lib/cpuops.js
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File diff suppressed because it is too large Load diff

7
modules/pdp10/lib/cpustate.js
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@ -486,11 +486,10 @@ class CPUStatePDP10 extends CPUPDP10 {
}
/**
* setPC()
* setPC(addr)
*
* NOTE: Unlike other PCjs emulators, such as PCx86, where all PC updates MUST go through the setPC()
* function, this function is nothing more than a convenience, because in the PDP-11, the PC can be loaded
* like any other general register. We fully expect this function to be inlined at runtime.
* Updates the PC register with the new address after masking it with ADDR_LIMIT (in case the
* new address was the result of an unchecked calculation).
*
* @this {CPUStatePDP10}
* @param {number} addr

8
modules/pdp10/lib/debugger.js
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@ -567,7 +567,7 @@ class DebuggerPDP10 extends Debugger {
* converting any signed values to their unsigned (two's complement) counterpart, provided they are
* within the acceptable range. Any values outside that range will be dealt with afterward.
*/
if (w < 0 && w >= -PDP10.MIN_NEG36) {
if (w < 0 && w >= -PDP10.INT_LIMIT) {
w += PDP10.WORD_LIMIT;
}
var value = Math.trunc(Math.abs(w)) % Math.pow(2, bits);
@ -3869,7 +3869,7 @@ if (DEBUGGER) {
ASHC: 57, FSC: 58, FADR: 59, FSBR: 60,
FMPR: 61, FDVR: 62, DFN: 63, UFA: 64,
FAD: 65, FSB: 66, FMP: 67, FDV: 68,
AOBJP: 69, AOBJN: 70, CAI: 71, CA: 72,
AOBJP: 69, AOBJN: 70, CAI: 71, CAM: 72,
JUMP: 73, SKIP: 74, AOJ: 75, AOS: 76,
SOJ: 77, SOS: 78, TR: 79, TL: 80,
TD: 81, TS: 82, XCT: 83, JFFO: 84,
@ -3903,7 +3903,7 @@ if (DEBUGGER) {
"ASHC", "FSC", "FADR", "FSBR",
"FMPR", "FDVR", "DFN", "UFA",
"FAD", "FSB", "FMP", "FDV",
"AOBJP", "AOBJN", "CAI", "CA",
"AOBJP", "AOBJN", "CAI", "CAM",
"JUMP", "SKIP", "AOJ", "AOS",
"SOJ", "SOS", "TR", "TL",
"TD", "TS", "XCT", "JFFO",
@ -4026,7 +4026,7 @@ if (DEBUGGER) {
},
[PDP10.OPCODE.OPCOMP]: { // 0o77000
0o30000: DebuggerPDP10.OPS.CAI,
0o31000: DebuggerPDP10.OPS.CA,
0o31000: DebuggerPDP10.OPS.CAM,
0o32000: DebuggerPDP10.OPS.JUMP,
0o33000: DebuggerPDP10.OPS.SKIP,
0o34000: DebuggerPDP10.OPS.AOJ,

10
modules/pdp10/lib/defines.js
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@ -109,6 +109,7 @@ var PDP10 = {
* values as unsigned quantities, these are the unsigned equivalents.
*/
WORD_INVALID: -1,
HINT_MASK: Math.pow(2, 17) - 1, // 131,071 (377777) signed half-word (half-int) mask
HALF_MASK: Math.pow(2, 18) - 1, // 262,143 (000000 777777): unsigned half-word mask
HALF_SHIFT: Math.pow(2, 18), // 262,144 (000001 000000): unsigned half-word shift
INT_MASK: Math.pow(2, 35) - 1, // 34,359,738,367 (377777 777777): signed word (magnitude) mask
@ -116,14 +117,9 @@ var PDP10 = {
WORD_MASK: Math.pow(2, 36) - 1, // 68,719,476,735 (777777 777777): unsigned word mask
WORD_LIMIT: Math.pow(2, 36), // 68,719,476,736 (1 000000 000000): unsigned word limit
MAX_POS18: Math.pow(2, 17) - 1, // 131,071 (377777)
MIN_NEG18: Math.pow(2, 17), // -131,072 (400000)
MAX_POS36: Math.pow(2, 35) - 1, // 34,359,738,367 (377777 777777)
MIN_NEG36: Math.pow(2, 35), // -34,359,738,368 (400000 000000)
TWO_POW36: Math.pow(2, 36), // the two's complement of a 36-bit value is (value? TWO_POW36 - value : 0)
TWO_POW34: Math.pow(2, 34),
TWO_POW32: Math.pow(2, 32),
TWO_POW34: Math.pow(2, 34),
TWO_POW36: Math.pow(2, 36), // the two's complement of a 36-bit value is (value? TWO_POW36 - value : 0)
/*
* PDP-10 opcodes are 36-bit values, most of which use the following layout:

2
modules/pdp10/lib/memory.js
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@ -217,7 +217,7 @@ class MemoryPDP10 {
* converting any signed values to their unsigned (two's complement) counterpart, provided they are
* within the acceptable range. Any values outside that range will be dealt with afterward.
*/
if (pattern < 0 && pattern >= -PDP10.MIN_NEG36) {
if (pattern < 0 && pattern >= -PDP10.INT_LIMIT) {
pattern += PDP10.WORD_LIMIT;
}
pattern = Math.trunc(Math.abs(pattern)) % PDP10.WORD_LIMIT;