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Changed SDR and SAR register references to PDR and PAR, which seems in keeping with more of DEC's own literature

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This commit is contained in:
Jeff 2016-11-03 17:19:15 -07:00 • committed by Jeff Parsons
commit 0d11d279bb
6 changed files with 631 additions and 609 deletions
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75
devices/pdp11/machine/1170/panel/debugger/README.md
View file

@ -134,7 +134,7 @@ which should produce these results:
>> d 17000500 l1
00017000500 070707
If you also want to see all the hardware register activity, use the Debugger's "m bus on" command to turn bus messages on:
If you also want to see all the hardware register activity, use the Debugger's "m bus on" command to turn Bus messages on:
>> m bus on
messages on: bus
@ -162,12 +162,12 @@ If you also want to see all the hardware register activity, use the Debugger's "
LOCATION CONTENTS INSTRUCTIONS & NOTES
17772300 077406 KIPDR 0
17772316 077406 KIPDR 7 = I/O page for program
17772340 000000 KIPAR 0 ; Load 200 if using trap catchers
17772356 177600 KIPAR 7 = I/O page for program
17772300 077406 KIPDR0
17772316 077406 KIPDR7 = I/O page for program
17772340 000000 KIPAR0 ; Load 200 if using trap catchers
17772356 177600 KIPAR7 = I/O page for program
17777700 000000 R0 = Start Virtual Address
17777701 172340 R1 = KIPAR 0 Address
17777701 172340 R1 = KIPAR0 Address
17777702 177572 R2 = MMR0 Address
17777703 177760 R3 = System size register Address
17777704 172516 R4 = MMR3 Address
@ -211,22 +211,22 @@ The above "toggle-in" can be entered with the PDPjs Debugger as follows:
e 17772260 000200 021311 003402 005000 000776 005312 000000;
r pc 172240
which should produce the following results when bus messages are turned on ("m bus on"):
which should produce the following results when Bus messages are turned on ("m bus on"):
>> m bus on
messages on: bus
>> e 17772300 077406
changing 00017772300 to 077406
KISDR0.writeWord(00017772300,077406)
KIPDR0.writeWord(00017772300,077406)
>> e 17772316 077406
changing 00017772316 to 077406
KISDR7.writeWord(00017772316,077406)
KIPDR7.writeWord(00017772316,077406)
>> e 17772340 000000
changing 00017772340 to 000000
KISAR0.writeWord(00017772340,000000)
KIPAR0.writeWord(00017772340,000000)
>> e 17772356 177600
changing 00017772356 to 177600
KISAR7.writeWord(00017772356,177600)
KIPAR7.writeWord(00017772356,177600)
>> e 17777700 000000
changing 00017777700 to 000000
R0SET0.writeWord(00017777700,000000)
@ -253,43 +253,58 @@ which should produce the following results when bus messages are turned on ("m b
PSW.writeWord(00017777776,000000)
>> e 17772240 012714 000020 005212 010520 020027 017776 003774 062711
changing 00017772240 to 012714
SISAR0.writeWord(00017772240,012714)
SIPAR0.writeWord(00017772240,012714)
changing 00017772242 to 000020
SISAR1.writeWord(00017772242,000020)
SIPAR1.writeWord(00017772242,000020)
changing 00017772244 to 005212
SISAR2.writeWord(00017772244,005212)
SIPAR2.writeWord(00017772244,005212)
changing 00017772246 to 010520
SISAR3.writeWord(00017772246,010520)
SIPAR3.writeWord(00017772246,010520)
changing 00017772250 to 020027
SISAR4.writeWord(00017772250,020027)
SIPAR4.writeWord(00017772250,020027)
changing 00017772252 to 017776
SISAR5.writeWord(00017772252,017776)
SIPAR5.writeWord(00017772252,017776)
changing 00017772254 to 003774
SISAR6.writeWord(00017772254,003774)
SIPAR6.writeWord(00017772254,003774)
changing 00017772256 to 062711
SISAR7.writeWord(00017772256,062711)
SIPAR7.writeWord(00017772256,062711)
>> e 17772260 000200 021311 003402 005000 000776 005312 000000
changing 00017772260 to 000200
SDSAR0.writeWord(00017772260,000200)
SDPAR0.writeWord(00017772260,000200)
changing 00017772262 to 021311
SDSAR1.writeWord(00017772262,021311)
SDPAR1.writeWord(00017772262,021311)
changing 00017772264 to 003402
SDSAR2.writeWord(00017772264,003402)
SDPAR2.writeWord(00017772264,003402)
changing 00017772266 to 005000
SDSAR3.writeWord(00017772266,005000)
SDPAR3.writeWord(00017772266,005000)
changing 00017772270 to 000776
SDSAR4.writeWord(00017772270,000776)
SDPAR4.writeWord(00017772270,000776)
changing 00017772272 to 005312
SDSAR5.writeWord(00017772272,005312)
SDPAR5.writeWord(00017772272,005312)
changing 00017772274 to 000000
SDSAR6.writeWord(00017772274,000000)
SDPAR6.writeWord(00017772274,000000)
>> r pc 172240
updated registers:
R0=000000 R1=172340 R2=177572 R3=177760 R4=172516 R5=123123
SP=177676 PC=172240 PS=000000 SW=00000000 T0 N0 Z0 V0 C0
SISAR0.readWord(172240): 012714
SISAR1.readWord(172242): 000020
SISAR0.readWord(172240): 012714
SISAR1.readWord(172242): 000020
SIPAR0.readWord(172240): 012714
SIPAR1.readWord(172242): 000020
SIPAR0.readWord(172240): 012714
SIPAR1.readWord(172242): 000020
172240: 012714 000020 MOV #20,@R4
All the "Supervisor I Page Address Register" (SIPAR) and "Supervisor D Page Address Register" (SDPAR) reads and writes
merely reflect where the above code is being loaded and executed from; those registers are essentially being used as scratch
RAM.
As the **Maintenance Service Guide** goes on to say:
The program should halt when all of memory is cleared. If it doesn't halt, examine the CPU error, Memory system error
and HI/LO error address registers to determine the cause. Trap catchers can be used by depositing 200 in KIPAR 0 (17772340)
instead of zero, and setting up vector locations with their address + 2 and the Vector + 2 with a 0 (halt).
Note: When loading the program you must be in console physical [i.e., the ADDRESS select switch must be set to "CONS PHY",
which is the default setting of the PDPjs Front Panel].
Before running the above code, you should turn Bus messages off (ie, "m bus off"); otherwise, the quantity of messages will
slow execution to a crawl.

192
modules/pdp11/lib/defines.js
View file

@ -365,70 +365,70 @@ var PDP11 = {
*/
UNIBUS: { //16-bit 18-bit 22-bit Hex Description
UNIMAP: 0o170200, // UNIBUS Mapping Registers (0-31) 64 words (ends at 0o170372)
SISDR0: 0o172200, // Supervisor I Space Descriptor Register 0
SISDR1: 0o172202, // Supervisor I Space Descriptor Register 1
SISDR2: 0o172204, // Supervisor I Space Descriptor Register 2
SISDR3: 0o172206, // Supervisor I Space Descriptor Register 3
SISDR4: 0o172210, // Supervisor I Space Descriptor Register 4
SISDR5: 0o172212, // Supervisor I Space Descriptor Register 5
SISDR6: 0o172214, // Supervisor I Space Descriptor Register 6
SISDR7: 0o172216, // Supervisor I Space Descriptor Register 7
SDSDR0: 0o172220, // Supervisor D Space Descriptor Register 0
SDSDR1: 0o172222, // Supervisor D Space Descriptor Register 1
SDSDR2: 0o172224, // Supervisor D Space Descriptor Register 2
SDSDR3: 0o172226, // Supervisor D Space Descriptor Register 3
SDSDR4: 0o172230, // Supervisor D Space Descriptor Register 4
SDSDR5: 0o172232, // Supervisor D Space Descriptor Register 5
SDSDR6: 0o172234, // Supervisor D Space Descriptor Register 6
SDSDR7: 0o172236, // Supervisor D Space Descriptor Register 7
SISAR0: 0o172240, // Supervisor I Space Address Register 0
SISAR1: 0o172242, // Supervisor I Space Address Register 1
SISAR2: 0o172244, // Supervisor I Space Address Register 2
SISAR3: 0o172246, // Supervisor I Space Address Register 3
SISAR4: 0o172250, // Supervisor I Space Address Register 4
SISAR5: 0o172252, // Supervisor I Space Address Register 5
SISAR6: 0o172254, // Supervisor I Space Address Register 6
SISAR7: 0o172256, // Supervisor I Space Address Register 7
SDSAR0: 0o172260, // Supervisor D Space Address Register 0
SDSAR1: 0o172262, // Supervisor D Space Address Register 1
SDSAR2: 0o172264, // Supervisor D Space Address Register 2
SDSAR3: 0o172266, // Supervisor D Space Address Register 3
SDSAR4: 0o172270, // Supervisor D Space Address Register 4
SDSAR5: 0o172272, // Supervisor D Space Address Register 5
SDSAR6: 0o172274, // Supervisor D Space Address Register 6
SDSAR7: 0o172276, // Supervisor D Space Address Register 7
KISDR0: 0o172300, // Kernel I Space Descriptor Register 0
KISDR1: 0o172302, // Kernel I Space Descriptor Register 1
KISDR2: 0o172304, // Kernel I Space Descriptor Register 2
KISDR3: 0o172306, // Kernel I Space Descriptor Register 3
KISDR4: 0o172310, // Kernel I Space Descriptor Register 4
KISDR5: 0o172312, // Kernel I Space Descriptor Register 5
KISDR6: 0o172314, // Kernel I Space Descriptor Register 6
KISDR7: 0o172316, // Kernel I Space Descriptor Register 7
KDSDR0: 0o172320, // Kernel D Space Descriptor Register 0
KDSDR1: 0o172322, // Kernel D Space Descriptor Register 1
KDSDR2: 0o172324, // Kernel D Space Descriptor Register 2
KDSDR3: 0o172326, // Kernel D Space Descriptor Register 3
KDSDR4: 0o172330, // Kernel D Space Descriptor Register 4
KDSDR5: 0o172332, // Kernel D Space Descriptor Register 5
KDSDR6: 0o172334, // Kernel D Space Descriptor Register 6
KDSDR7: 0o172336, // Kernel D Space Descriptor Register 7
KISAR0: 0o172340, // Kernel I Space Address Register 0
KISAR1: 0o172342, // Kernel I Space Address Register 1
KISAR2: 0o172344, // Kernel I Space Address Register 2
KISAR3: 0o172346, // Kernel I Space Address Register 3
KISAR4: 0o172350, // Kernel I Space Address Register 4
KISAR5: 0o172352, // Kernel I Space Address Register 5
KISAR6: 0o172354, // Kernel I Space Address Register 6
KISAR7: 0o172356, // Kernel I Space Address Register 7
KDSAR0: 0o172360, // Kernel D Space Address Register 0
KDSAR1: 0o172362, // Kernel D Space Address Register 1
KDSAR2: 0o172364, // Kernel D Space Address Register 2
KDSAR3: 0o172366, // Kernel D Space Address Register 3
KDSAR4: 0o172370, // Kernel D Space Address Register 4
KDSAR5: 0o172372, // Kernel D Space Address Register 5
KDSAR6: 0o172374, // Kernel D Space Address Register 6
KDSAR7: 0o172376, // Kernel D Space Address Register 7
SIPDR0: 0o172200, // Supervisor I Page Descriptor Register 0
SIPDR1: 0o172202, // Supervisor I Page Descriptor Register 1
SIPDR2: 0o172204, // Supervisor I Page Descriptor Register 2
SIPDR3: 0o172206, // Supervisor I Page Descriptor Register 3
SIPDR4: 0o172210, // Supervisor I Page Descriptor Register 4
SIPDR5: 0o172212, // Supervisor I Page Descriptor Register 5
SIPDR6: 0o172214, // Supervisor I Page Descriptor Register 6
SIPDR7: 0o172216, // Supervisor I Page Descriptor Register 7
SDPDR0: 0o172220, // Supervisor D Page Descriptor Register 0
SDPDR1: 0o172222, // Supervisor D Page Descriptor Register 1
SDPDR2: 0o172224, // Supervisor D Page Descriptor Register 2
SDPDR3: 0o172226, // Supervisor D Page Descriptor Register 3
SDPDR4: 0o172230, // Supervisor D Page Descriptor Register 4
SDPDR5: 0o172232, // Supervisor D Page Descriptor Register 5
SDPDR6: 0o172234, // Supervisor D Page Descriptor Register 6
SDPDR7: 0o172236, // Supervisor D Page Descriptor Register 7
SIPAR0: 0o172240, // Supervisor I Page Address Register 0
SIPAR1: 0o172242, // Supervisor I Page Address Register 1
SIPAR2: 0o172244, // Supervisor I Page Address Register 2
SIPAR3: 0o172246, // Supervisor I Page Address Register 3
SIPAR4: 0o172250, // Supervisor I Page Address Register 4
SIPAR5: 0o172252, // Supervisor I Page Address Register 5
SIPAR6: 0o172254, // Supervisor I Page Address Register 6
SIPAR7: 0o172256, // Supervisor I Page Address Register 7
SDPAR0: 0o172260, // Supervisor D Page Address Register 0
SDPAR1: 0o172262, // Supervisor D Page Address Register 1
SDPAR2: 0o172264, // Supervisor D Page Address Register 2
SDPAR3: 0o172266, // Supervisor D Page Address Register 3
SDPAR4: 0o172270, // Supervisor D Page Address Register 4
SDPAR5: 0o172272, // Supervisor D Page Address Register 5
SDPAR6: 0o172274, // Supervisor D Page Address Register 6
SDPAR7: 0o172276, // Supervisor D Page Address Register 7
KIPDR0: 0o172300, // Kernel I Page Descriptor Register 0
KIPDR1: 0o172302, // Kernel I Page Descriptor Register 1
KIPDR2: 0o172304, // Kernel I Page Descriptor Register 2
KIPDR3: 0o172306, // Kernel I Page Descriptor Register 3
KIPDR4: 0o172310, // Kernel I Page Descriptor Register 4
KIPDR5: 0o172312, // Kernel I Page Descriptor Register 5
KIPDR6: 0o172314, // Kernel I Page Descriptor Register 6
KIPDR7: 0o172316, // Kernel I Page Descriptor Register 7
KDPDR0: 0o172320, // Kernel D Page Descriptor Register 0
KDPDR1: 0o172322, // Kernel D Page Descriptor Register 1
KDPDR2: 0o172324, // Kernel D Page Descriptor Register 2
KDPDR3: 0o172326, // Kernel D Page Descriptor Register 3
KDPDR4: 0o172330, // Kernel D Page Descriptor Register 4
KDPDR5: 0o172332, // Kernel D Page Descriptor Register 5
KDPDR6: 0o172334, // Kernel D Page Descriptor Register 6
KDPDR7: 0o172336, // Kernel D Page Descriptor Register 7
KIPAR0: 0o172340, // Kernel I Page Address Register 0
KIPAR1: 0o172342, // Kernel I Page Address Register 1
KIPAR2: 0o172344, // Kernel I Page Address Register 2
KIPAR3: 0o172346, // Kernel I Page Address Register 3
KIPAR4: 0o172350, // Kernel I Page Address Register 4
KIPAR5: 0o172352, // Kernel I Page Address Register 5
KIPAR6: 0o172354, // Kernel I Page Address Register 6
KIPAR7: 0o172356, // Kernel I Page Address Register 7
KDPAR0: 0o172360, // Kernel D Page Address Register 0
KDPAR1: 0o172362, // Kernel D Page Address Register 1
KDPAR2: 0o172364, // Kernel D Page Address Register 2
KDPAR3: 0o172366, // Kernel D Page Address Register 3
KDPAR4: 0o172370, // Kernel D Page Address Register 4
KDPAR5: 0o172372, // Kernel D Page Address Register 5
KDPAR6: 0o172374, // Kernel D Page Address Register 6
KDPAR7: 0o172376, // Kernel D Page Address Register 7
MMR3: 0o172516, // 772516 17772516
@ -456,38 +456,38 @@ var PDP11 = {
MMR1: 0o177574, // 777574 17777574
MMR2: 0o177576, // 777576 17777576
UISDR0: 0o177600, // User I Space Descriptor Register 0
UISDR1: 0o177602, // User I Space Descriptor Register 1
UISDR2: 0o177604, // User I Space Descriptor Register 2
UISDR3: 0o177606, // User I Space Descriptor Register 3
UISDR4: 0o177610, // User I Space Descriptor Register 4
UISDR5: 0o177612, // User I Space Descriptor Register 5
UISDR6: 0o177614, // User I Space Descriptor Register 6
UISDR7: 0o177616, // User I Space Descriptor Register 7
UDSDR0: 0o177620, // User D Space Descriptor Register 0
UDSDR1: 0o177622, // User D Space Descriptor Register 1
UDSDR2: 0o177624, // User D Space Descriptor Register 2
UDSDR3: 0o177626, // User D Space Descriptor Register 3
UDSDR4: 0o177630, // User D Space Descriptor Register 4
UDSDR5: 0o177632, // User D Space Descriptor Register 5
UDSDR6: 0o177634, // User D Space Descriptor Register 6
UDSDR7: 0o177636, // User D Space Descriptor Register 7
UISAR0: 0o177640, // User I Space Address Register 0
UISAR1: 0o177642, // User I Space Address Register 1
UISAR2: 0o177644, // User I Space Address Register 2
UISAR3: 0o177646, // User I Space Address Register 3
UISAR4: 0o177650, // User I Space Address Register 4
UISAR5: 0o177652, // User I Space Address Register 5
UISAR6: 0o177654, // User I Space Address Register 6
UISAR7: 0o177656, // User I Space Address Register 7
UDSAR0: 0o177660, // User D Space Address Register 0
UDSAR1: 0o177662, // User D Space Address Register 1
UDSAR2: 0o177664, // User D Space Address Register 2
UDSAR3: 0o177666, // User D Space Address Register 3
UDSAR4: 0o177670, // User D Space Address Register 4
UDSAR5: 0o177672, // User D Space Address Register 5
UDSAR6: 0o177674, // User D Space Address Register 6
UDSAR7: 0o177676, // User D Space Address Register 7
UIPDR0: 0o177600, // User I Page Descriptor Register 0
UIPDR1: 0o177602, // User I Page Descriptor Register 1
UIPDR2: 0o177604, // User I Page Descriptor Register 2
UIPDR3: 0o177606, // User I Page Descriptor Register 3
UIPDR4: 0o177610, // User I Page Descriptor Register 4
UIPDR5: 0o177612, // User I Page Descriptor Register 5
UIPDR6: 0o177614, // User I Page Descriptor Register 6
UIPDR7: 0o177616, // User I Page Descriptor Register 7
UDPDR0: 0o177620, // User D Page Descriptor Register 0
UDPDR1: 0o177622, // User D Page Descriptor Register 1
UDPDR2: 0o177624, // User D Page Descriptor Register 2
UDPDR3: 0o177626, // User D Page Descriptor Register 3
UDPDR4: 0o177630, // User D Page Descriptor Register 4
UDPDR5: 0o177632, // User D Page Descriptor Register 5
UDPDR6: 0o177634, // User D Page Descriptor Register 6
UDPDR7: 0o177636, // User D Page Descriptor Register 7
UIPAR0: 0o177640, // User I Page Address Register 0
UIPAR1: 0o177642, // User I Page Address Register 1
UIPAR2: 0o177644, // User I Page Address Register 2
UIPAR3: 0o177646, // User I Page Address Register 3
UIPAR4: 0o177650, // User I Page Address Register 4
UIPAR5: 0o177652, // User I Page Address Register 5
UIPAR6: 0o177654, // User I Page Address Register 6
UIPAR7: 0o177656, // User I Page Address Register 7
UDPAR0: 0o177660, // User D Page Address Register 0
UDPAR1: 0o177662, // User D Page Address Register 1
UDPAR2: 0o177664, // User D Page Address Register 2
UDPAR3: 0o177666, // User D Page Address Register 3
UDPAR4: 0o177670, // User D Page Address Register 4
UDPAR5: 0o177672, // User D Page Address Register 5
UDPAR6: 0o177674, // User D Page Address Register 6
UDPAR7: 0o177676, // User D Page Address Register 7
R0SET0: 0o177700,
R1SET0: 0o177701,

168
modules/pdp11/lib/device.js
View file

@ -305,78 +305,78 @@ DevicePDP11.prototype.writeUNIMAP = function(data, addr)
};
/**
* readSISDR(addr)
* readSIPDR(addr)
*
* @this {DevicePDP11}
* @param {number} addr (eg, PDP11.UNIBUS.SISDR0--SISDR7 or 172200--172216)
* @param {number} addr (eg, PDP11.UNIBUS.SIPDR0--SIPDR7 or 172200--172216)
* @return {number}
*/
DevicePDP11.prototype.readSISDR = function(addr)
DevicePDP11.prototype.readSIPDR = function(addr)
{
var reg = (addr >> 1) & 7;
return this.cpu.mmuPDR[1][reg];
};
/**
* writeSISDR(data, addr)
* writeSIPDR(data, addr)
*
* @this {DevicePDP11}
* @param {number} data
* @param {number} addr (eg, PDP11.UNIBUS.SISDR0--SISDR7 or 172200--172216)
* @param {number} addr (eg, PDP11.UNIBUS.SIPDR0--SIPDR7 or 172200--172216)
*/
DevicePDP11.prototype.writeSISDR = function(data, addr)
DevicePDP11.prototype.writeSIPDR = function(data, addr)
{
var reg = (addr >> 1) & 7;
this.cpu.mmuPDR[1][reg] = data & 0xff0f;
};
/**
* readSDSDR(addr)
* readSDPDR(addr)
*
* @this {DevicePDP11}
* @param {number} addr (eg, PDP11.UNIBUS.SDSDR0--SDSDR7 or 172220--172236)
* @param {number} addr (eg, PDP11.UNIBUS.SDPDR0--SDPDR7 or 172220--172236)
* @return {number}
*/
DevicePDP11.prototype.readSDSDR = function(addr)
DevicePDP11.prototype.readSDPDR = function(addr)
{
var reg = ((addr >> 1) & 7) + 8;
return this.cpu.mmuPDR[1][reg];
};
/**
* writeSDSDR(data, addr)
* writeSDPDR(data, addr)
*
* @this {DevicePDP11}
* @param {number} data
* @param {number} addr (eg, PDP11.UNIBUS.SDSDR0--SDSDR7 or 172220--172236)
* @param {number} addr (eg, PDP11.UNIBUS.SDPDR0--SDPDR7 or 172220--172236)
*/
DevicePDP11.prototype.writeSDSDR = function(data, addr)
DevicePDP11.prototype.writeSDPDR = function(data, addr)
{
var reg = ((addr >> 1) & 7) + 8;
this.cpu.mmuPDR[1][reg] = data & 0xff0f;
};
/**
* readSISAR(addr)
* readSIPAR(addr)
*
* @this {DevicePDP11}
* @param {number} addr (eg, PDP11.UNIBUS.SISAR0--SISAR7 or 172240--172256)
* @param {number} addr (eg, PDP11.UNIBUS.SIPAR0--SIPAR7 or 172240--172256)
* @return {number}
*/
DevicePDP11.prototype.readSISAR = function(addr)
DevicePDP11.prototype.readSIPAR = function(addr)
{
var reg = (addr >> 1) & 7;
return this.cpu.mmuPAR[1][reg];
};
/**
* writeSISAR(data, addr)
* writeSIPAR(data, addr)
*
* @this {DevicePDP11}
* @param {number} data
* @param {number} addr (eg, PDP11.UNIBUS.SISAR0--SISAR7 or 172240--172256)
* @param {number} addr (eg, PDP11.UNIBUS.SIPAR0--SIPAR7 or 172240--172256)
*/
DevicePDP11.prototype.writeSISAR = function(data, addr)
DevicePDP11.prototype.writeSIPAR = function(data, addr)
{
var reg = (addr >> 1) & 7;
this.cpu.mmuPAR[1][reg] = data;
@ -385,26 +385,26 @@ DevicePDP11.prototype.writeSISAR = function(data, addr)
};
/**
* readSDSAR(addr)
* readSDPAR(addr)
*
* @this {DevicePDP11}
* @param {number} addr (eg, PDP11.UNIBUS.SDSAR0--SDSAR7 or 172260--172276)
* @param {number} addr (eg, PDP11.UNIBUS.SDPAR0--SDPAR7 or 172260--172276)
* @return {number}
*/
DevicePDP11.prototype.readSDSAR = function(addr)
DevicePDP11.prototype.readSDPAR = function(addr)
{
var reg = ((addr >> 1) & 7) + 8;
return this.cpu.mmuPAR[1][reg];
};
/**
* writeSDSAR(data, addr)
* writeSDPAR(data, addr)
*
* @this {DevicePDP11}
* @param {number} data
* @param {number} addr (eg, PDP11.UNIBUS.SDSAR0--SDSAR7 or 172260--172276)
* @param {number} addr (eg, PDP11.UNIBUS.SDPAR0--SDPAR7 or 172260--172276)
*/
DevicePDP11.prototype.writeSDSAR = function(data, addr)
DevicePDP11.prototype.writeSDPAR = function(data, addr)
{
var reg = ((addr >> 1) & 7) + 8;
this.cpu.mmuPAR[1][reg] = data;
@ -412,78 +412,78 @@ DevicePDP11.prototype.writeSDSAR = function(data, addr)
};
/**
* readKISDR(addr)
* readKIPDR(addr)
*
* @this {DevicePDP11}
* @param {number} addr (eg, PDP11.UNIBUS.KISDR0--KISDR7 or 172300--172316)
* @param {number} addr (eg, PDP11.UNIBUS.KIPDR0--KIPDR7 or 172300--172316)
* @return {number}
*/
DevicePDP11.prototype.readKISDR = function(addr)
DevicePDP11.prototype.readKIPDR = function(addr)
{
var reg = (addr >> 1) & 7;
return this.cpu.mmuPDR[0][reg];
};
/**
* writeKISDR(data, addr)
* writeKIPDR(data, addr)
*
* @this {DevicePDP11}
* @param {number} data
* @param {number} addr (eg, PDP11.UNIBUS.KISDR0--KISDR7 or 172300--172316)
* @param {number} addr (eg, PDP11.UNIBUS.KIPDR0--KIPDR7 or 172300--172316)
*/
DevicePDP11.prototype.writeKISDR = function(data, addr)
DevicePDP11.prototype.writeKIPDR = function(data, addr)
{
var reg = (addr >> 1) & 7;
this.cpu.mmuPDR[0][reg] = data & 0xff0f;
};
/**
* readKDSDR(addr)
* readKDPDR(addr)
*
* @this {DevicePDP11}
* @param {number} addr (eg, PDP11.UNIBUS.KDSDR0--KDSDR7 or 172320--172336)
* @param {number} addr (eg, PDP11.UNIBUS.KDPDR0--KDPDR7 or 172320--172336)
* @return {number}
*/
DevicePDP11.prototype.readKDSDR = function(addr)
DevicePDP11.prototype.readKDPDR = function(addr)
{
var reg = ((addr >> 1) & 7) + 8;
return this.cpu.mmuPDR[0][reg];
};
/**
* writeKDSDR(data, addr)
* writeKDPDR(data, addr)
*
* @this {DevicePDP11}
* @param {number} data
* @param {number} addr (eg, PDP11.UNIBUS.KDSDR0--KDSDR7 or 172320--172336)
* @param {number} addr (eg, PDP11.UNIBUS.KDPDR0--KDPDR7 or 172320--172336)
*/
DevicePDP11.prototype.writeKDSDR = function(data, addr)
DevicePDP11.prototype.writeKDPDR = function(data, addr)
{
var reg = ((addr >> 1) & 7) + 8;
this.cpu.mmuPDR[0][reg] = data & 0xff0f;
};
/**
* readKISAR(addr)
* readKIPAR(addr)
*
* @this {DevicePDP11}
* @param {number} addr (eg, PDP11.UNIBUS.KISAR0--KISAR7 or 172340--172356)
* @param {number} addr (eg, PDP11.UNIBUS.KIPAR0--KIPAR7 or 172340--172356)
* @return {number}
*/
DevicePDP11.prototype.readKISAR = function(addr)
DevicePDP11.prototype.readKIPAR = function(addr)
{
var reg = (addr >> 1) & 7;
return this.cpu.mmuPAR[0][reg];
};
/**
* writeKISAR(data, addr)
* writeKIPAR(data, addr)
*
* @this {DevicePDP11}
* @param {number} data
* @param {number} addr (eg, PDP11.UNIBUS.KISAR0--KISAR7 or 172340--172356)
* @param {number} addr (eg, PDP11.UNIBUS.KIPAR0--KIPAR7 or 172340--172356)
*/
DevicePDP11.prototype.writeKISAR = function(data, addr)
DevicePDP11.prototype.writeKIPAR = function(data, addr)
{
var reg = (addr >> 1) & 7;
this.cpu.mmuPAR[0][reg] = data;
@ -492,26 +492,26 @@ DevicePDP11.prototype.writeKISAR = function(data, addr)
};
/**
* readKDSAR(addr)
* readKDPAR(addr)
*
* @this {DevicePDP11}
* @param {number} addr (eg, PDP11.UNIBUS.KDSAR0--KDSAR7 or 172360--172376)
* @param {number} addr (eg, PDP11.UNIBUS.KDPAR0--KDPAR7 or 172360--172376)
* @return {number}
*/
DevicePDP11.prototype.readKDSAR = function(addr)
DevicePDP11.prototype.readKDPAR = function(addr)
{
var reg = ((addr >> 1) & 7) + 8;
return this.cpu.mmuPAR[0][reg];
};
/**
* writeKDSAR(data, addr)
* writeKDPAR(data, addr)
*
* @this {DevicePDP11}
* @param {number} data
* @param {number} addr (eg, PDP11.UNIBUS.KDSAR0--KDSAR7 or 172360--172376)
* @param {number} addr (eg, PDP11.UNIBUS.KDPAR0--KDPAR7 or 172360--172376)
*/
DevicePDP11.prototype.writeKDSAR = function(data, addr)
DevicePDP11.prototype.writeKDPAR = function(data, addr)
{
var reg = ((addr >> 1) & 7) + 8;
this.cpu.mmuPAR[0][reg] = data;
@ -519,78 +519,78 @@ DevicePDP11.prototype.writeKDSAR = function(data, addr)
};
/**
* readUISDR(addr)
* readUIPDR(addr)
*
* @this {DevicePDP11}
* @param {number} addr (eg, PDP11.UNIBUS.UISDR0--UISDR7 or 177600--177616)
* @param {number} addr (eg, PDP11.UNIBUS.UIPDR0--UIPDR7 or 177600--177616)
* @return {number}
*/
DevicePDP11.prototype.readUISDR = function(addr)
DevicePDP11.prototype.readUIPDR = function(addr)
{
var reg = (addr >> 1) & 7;
return this.cpu.mmuPDR[3][reg];
};
/**
* writeUISDR(data, addr)
* writeUIPDR(data, addr)
*
* @this {DevicePDP11}
* @param {number} data
* @param {number} addr (eg, PDP11.UNIBUS.UISDR0--UISDR7 or 177600--177616)
* @param {number} addr (eg, PDP11.UNIBUS.UIPDR0--UIPDR7 or 177600--177616)
*/
DevicePDP11.prototype.writeUISDR = function(data, addr)
DevicePDP11.prototype.writeUIPDR = function(data, addr)
{
var reg = (addr >> 1) & 7;
this.cpu.mmuPDR[3][reg] = data & 0xff0f;
};
/**
* readUDSDR(addr)
* readUDPDR(addr)
*
* @this {DevicePDP11}
* @param {number} addr (eg, PDP11.UNIBUS.UDSDR0--UDSDR7 or 177620--177636)
* @param {number} addr (eg, PDP11.UNIBUS.UDPDR0--UDPDR7 or 177620--177636)
* @return {number}
*/
DevicePDP11.prototype.readUDSDR = function(addr)
DevicePDP11.prototype.readUDPDR = function(addr)
{
var reg = ((addr >> 1) & 7) + 8;
return this.cpu.mmuPDR[3][reg];
};
/**
* writeUDSDR(data, addr)
* writeUDPDR(data, addr)
*
* @this {DevicePDP11}
* @param {number} data
* @param {number} addr (eg, PDP11.UNIBUS.UDSDR0--UDSDR7 or 177620--177636)
* @param {number} addr (eg, PDP11.UNIBUS.UDPDR0--UDPDR7 or 177620--177636)
*/
DevicePDP11.prototype.writeUDSDR = function(data, addr)
DevicePDP11.prototype.writeUDPDR = function(data, addr)
{
var reg = ((addr >> 1) & 7) + 8;
this.cpu.mmuPDR[3][reg] = data & 0xff0f;
};
/**
* readUISAR(addr)
* readUIPAR(addr)
*
* @this {DevicePDP11}
* @param {number} addr (eg, PDP11.UNIBUS.UISAR0--UISAR7 or 177640--177656)
* @param {number} addr (eg, PDP11.UNIBUS.UIPAR0--UIPAR7 or 177640--177656)
* @return {number}
*/
DevicePDP11.prototype.readUISAR = function(addr)
DevicePDP11.prototype.readUIPAR = function(addr)
{
var reg = (addr >> 1) & 7;
return this.cpu.mmuPAR[3][reg];
};
/**
* writeUISAR(data, addr)
* writeUIPAR(data, addr)
*
* @this {DevicePDP11}
* @param {number} data
* @param {number} addr (eg, PDP11.UNIBUS.UISAR0--UISAR7 or 177640--177656)
* @param {number} addr (eg, PDP11.UNIBUS.UIPAR0--UIPAR7 or 177640--177656)
*/
DevicePDP11.prototype.writeUISAR = function(data, addr)
DevicePDP11.prototype.writeUIPAR = function(data, addr)
{
var reg = (addr >> 1) & 7;
this.cpu.mmuPAR[3][reg] = data;
@ -599,26 +599,26 @@ DevicePDP11.prototype.writeUISAR = function(data, addr)
};
/**
* readUDSAR(addr)
* readUDPAR(addr)
*
* @this {DevicePDP11}
* @param {number} addr (eg, PDP11.UNIBUS.UDSAR0--UDSAR7 or 177660--177676)
* @param {number} addr (eg, PDP11.UNIBUS.UDPAR0--UDPAR7 or 177660--177676)
* @return {number}
*/
DevicePDP11.prototype.readUDSAR = function(addr)
DevicePDP11.prototype.readUDPAR = function(addr)
{
var reg = ((addr >> 1) & 7) + 8;
return this.cpu.mmuPAR[3][reg];
};
/**
* writeUDSAR(data, addr)
* writeUDPAR(data, addr)
*
* @this {DevicePDP11}
* @param {number} data
* @param {number} addr (eg, PDP11.UNIBUS.UDSAR0--UDSAR7 or 177660--177676)
* @param {number} addr (eg, PDP11.UNIBUS.UDPAR0--UDPAR7 or 177660--177676)
*/
DevicePDP11.prototype.writeUDSAR = function(data, addr)
DevicePDP11.prototype.writeUDPAR = function(data, addr)
{
var reg = ((addr >> 1) & 7) + 8;
this.cpu.mmuPAR[3][reg] = data;
@ -1043,23 +1043,23 @@ DevicePDP11.prototype.writeIgnored = function(data, addr)
*/
DevicePDP11.UNIBUS_IOTABLE = {
[PDP11.UNIBUS.UNIMAP]: /* 170200 */ [null, null, DevicePDP11.prototype.readUNIMAP, DevicePDP11.prototype.writeUNIMAP, "UNIMAP", 64, PDP11.MODEL_1170],
[PDP11.UNIBUS.SISDR0]: /* 172200 */ [null, null, DevicePDP11.prototype.readSISDR, DevicePDP11.prototype.writeSISDR, "SISDR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.SDSDR0]: /* 172220 */ [null, null, DevicePDP11.prototype.readSDSDR, DevicePDP11.prototype.writeSDSDR, "SDSDR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.SISAR0]: /* 172240 */ [null, null, DevicePDP11.prototype.readSISAR, DevicePDP11.prototype.writeSISAR, "SISAR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.SDSAR0]: /* 172260 */ [null, null, DevicePDP11.prototype.readSDSAR, DevicePDP11.prototype.writeSDSAR, "SDSAR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.KISDR0]: /* 172300 */ [null, null, DevicePDP11.prototype.readKISDR, DevicePDP11.prototype.writeKISDR, "KISDR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.KDSDR0]: /* 172320 */ [null, null, DevicePDP11.prototype.readKDSDR, DevicePDP11.prototype.writeKDSDR, "KDSDR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.KISAR0]: /* 172340 */ [null, null, DevicePDP11.prototype.readKISAR, DevicePDP11.prototype.writeKISAR, "KISAR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.KDSAR0]: /* 172360 */ [null, null, DevicePDP11.prototype.readKDSAR, DevicePDP11.prototype.writeKDSAR, "KDSAR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.SIPDR0]: /* 172200 */ [null, null, DevicePDP11.prototype.readSIPDR, DevicePDP11.prototype.writeSIPDR, "SIPDR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.SDPDR0]: /* 172220 */ [null, null, DevicePDP11.prototype.readSDPDR, DevicePDP11.prototype.writeSDPDR, "SDPDR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.SIPAR0]: /* 172240 */ [null, null, DevicePDP11.prototype.readSIPAR, DevicePDP11.prototype.writeSIPAR, "SIPAR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.SDPAR0]: /* 172260 */ [null, null, DevicePDP11.prototype.readSDPAR, DevicePDP11.prototype.writeSDPAR, "SDPAR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.KIPDR0]: /* 172300 */ [null, null, DevicePDP11.prototype.readKIPDR, DevicePDP11.prototype.writeKIPDR, "KIPDR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.KDPDR0]: /* 172320 */ [null, null, DevicePDP11.prototype.readKDPDR, DevicePDP11.prototype.writeKDPDR, "KDPDR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.KIPAR0]: /* 172340 */ [null, null, DevicePDP11.prototype.readKIPAR, DevicePDP11.prototype.writeKIPAR, "KIPAR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.KDPAR0]: /* 172360 */ [null, null, DevicePDP11.prototype.readKDPAR, DevicePDP11.prototype.writeKDPAR, "KDPAR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.MMR3]: /* 172516 */ [null, null, DevicePDP11.prototype.readMMR3, DevicePDP11.prototype.writeMMR3, "MMR3", 1, PDP11.MODEL_1145],
[PDP11.UNIBUS.LKS]: /* 177546 */ [null, null, DevicePDP11.prototype.readLKS, DevicePDP11.prototype.writeLKS, "LKS"],
[PDP11.UNIBUS.MMR0]: /* 177572 */ [null, null, DevicePDP11.prototype.readMMR0, DevicePDP11.prototype.writeMMR0, "MMR0", 1, PDP11.MODEL_1145],
[PDP11.UNIBUS.MMR1]: /* 177574 */ [null, null, DevicePDP11.prototype.readMMR1, DevicePDP11.prototype.writeIgnored, "MMR1", 1, PDP11.MODEL_1145],
[PDP11.UNIBUS.MMR2]: /* 177576 */ [null, null, DevicePDP11.prototype.readMMR2, DevicePDP11.prototype.writeIgnored, "MMR2", 1, PDP11.MODEL_1145],
[PDP11.UNIBUS.UISDR0]: /* 177600 */ [null, null, DevicePDP11.prototype.readUISDR, DevicePDP11.prototype.writeUISDR, "UISDR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.UDSDR0]: /* 177620 */ [null, null, DevicePDP11.prototype.readUDSDR, DevicePDP11.prototype.writeUDSDR, "UDSDR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.UISAR0]: /* 177640 */ [null, null, DevicePDP11.prototype.readUISAR, DevicePDP11.prototype.writeUISAR, "UISAR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.UDSAR0]: /* 177660 */ [null, null, DevicePDP11.prototype.readUDSAR, DevicePDP11.prototype.writeUDSAR, "UDSAR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.UIPDR0]: /* 177600 */ [null, null, DevicePDP11.prototype.readUIPDR, DevicePDP11.prototype.writeUIPDR, "UIPDR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.UDPDR0]: /* 177620 */ [null, null, DevicePDP11.prototype.readUDPDR, DevicePDP11.prototype.writeUDPDR, "UDPDR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.UIPAR0]: /* 177640 */ [null, null, DevicePDP11.prototype.readUIPAR, DevicePDP11.prototype.writeUIPAR, "UIPAR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.UDPAR0]: /* 177660 */ [null, null, DevicePDP11.prototype.readUDPAR, DevicePDP11.prototype.writeUDPAR, "UDPAR", 8, PDP11.MODEL_1145],
[PDP11.UNIBUS.R0SET0]: /* 177700 */ [null, null, DevicePDP11.prototype.readRSET0, DevicePDP11.prototype.writeRSET0, "R0SET0"],
[PDP11.UNIBUS.R1SET0]: /* 177701 */ [null, null, DevicePDP11.prototype.readRSET0, DevicePDP11.prototype.writeRSET0, "R1SET0"],
[PDP11.UNIBUS.R2SET0]: /* 177702 */ [null, null, DevicePDP11.prototype.readRSET0, DevicePDP11.prototype.writeRSET0, "R2SET0"],

17
modules/pdp11/lib/panel.js
View file

@ -268,11 +268,11 @@ PanelPDP11.prototype.setBinding = function(sType, sBinding, control, sValue)
default:
/*
* Square (default) or round LEDs are defined in machine XML files like so:
* Square ("led") or round ("rled") LEDs are defined in machine XML files like so:
*
* <control type="rled" binding="A3" value="1" width="100%" container="center"/>
*
* Only *type* and *binding* attributes are required; if *value* is omitted, the default value is 0 (off).
* Only *type* and *binding* attributes are required; if *value* is omitted, the default value is 0 ("off").
*/
if (sType == "led" || sType == "rled") {
this.bindings[sBinding] = control;
@ -576,9 +576,12 @@ PanelPDP11.prototype.processStart = function(value, index)
* If value == 1 (our initial value), then the 'STEP' switch is set to "S INST" (step one instruction);
* otherwise, it's set to "S BUS CYCLE" (step one bus cycle).
*
* However, since we can't currently support cycle-stepping, I've decided to change the meaning of this
* switch: the normal ("up") position means that successive 'EXAM' and 'DEP' operations will first add 2
* to the 'ADDRESS' register, while the opposite ("down") position means they will first subtract 2.
* However, since we can't currently support cycle-stepping, I've decided to innovate a little and
* change the meaning of this switch: the normal ("up") position means that successive 'EXAM' and 'DEP'
* operations will first add 2 to the 'ADDRESS' register, while the opposite ("down") position means
* they will first subtract 2.
*
* See processLEDTest() for more of these exciting "innovations". ;-)
*
* @this {PanelPDP11}
* @param {number} value
@ -760,6 +763,10 @@ PanelPDP11.prototype.processLEDTest = function(value, index)
} else {
this.fLEDTest = false;
this.displayLEDs();
/*
* This is another one of my "innovations": when you're done testing the LEDs, all the switches reset as well.
*/
this.setSwitches(0);
}
};

456
versions/pdpjs/1.30.3/pdp11-dbg.js
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332
versions/pdpjs/1.30.3/pdp11.js
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