New blog entry, and a corrected Word 3.0 disk image

This commit is contained in:
Jeff Parsons 2015-02-23 17:20:41 -08:00 committed by jeffpar
commit 0b413f27f7
11 changed files with 2356 additions and 1995 deletions

View file

@ -340,7 +340,7 @@ if (DEBUGGER) {
Debugger.asRegs = [
"AL", "CL", "DL", "BL", "AH", "CH", "DH", "BH",
"AX", "CX", "DX", "BX", "SP", "BP", "SI", "DI",
"ES", "CS", "SS", "DS", "IP"
"ES", "CS", "SS", "DS", "FS", "GS", "IP"
];
Debugger.REG_ES = 0x00; // bits 0-1 are standard SegReg encodings
@ -1189,7 +1189,7 @@ if (DEBUGGER) {
this.aaOpDescs[0x0F] = Debugger.aOpDescUndefined;
if (this.cpu.model >= X86.MODEL_80286) {
this.aaOpDescs[0x0F] = Debugger.aOpDesc0F;
if (this.cpu.model >= X86.MODEL_80386) {
if (I386 && this.cpu.model >= X86.MODEL_80386) {
this.cchReg = 8;
this.maskReg = 0xffffffff|0;
}
@ -1626,7 +1626,9 @@ if (DEBUGGER) {
this.aMessageRegs[asRegs[17]] = str.toHexWord(cpu.getCS());
this.aMessageRegs[asRegs[18]] = str.toHexWord(cpu.getSS());
this.aMessageRegs[asRegs[19]] = str.toHexWord(cpu.getDS());
this.aMessageRegs[asRegs[20]] = str.toHexWord(cpu.getIP());
this.aMessageRegs[asRegs[20]] = str.toHexWord(cpu.getFS());
this.aMessageRegs[asRegs[21]] = str.toHexWord(cpu.getGS());
this.aMessageRegs[asRegs[22]] = str.toHexWord(cpu.getIP());
};
/**
@ -2908,7 +2910,7 @@ if (DEBUGGER) {
Debugger.prototype.getRegOperand = function(bReg, type, aAddr)
{
if ((type & Debugger.TYPE_MODE) == Debugger.TYPE_SEGREG) {
if (bReg >= 4) return null;
if (bReg >= 6 || bReg >= 4 && this.cpu.model < X86.MODEL_80386) return null;
bReg += 16;
}
else if ((type & Debugger.TYPE_SIZE) >= Debugger.TYPE_WORD)
@ -3103,20 +3105,20 @@ if (DEBUGGER) {
/**
* getRegDump(fProt)
*
* Example of 8086 and 80286 real-mode register dump:
* Sample 8086 and 80286 real-mode register dump:
*
* AX=0000 BX=0000 CX=0000 DX=0000 SP=0000 BP=0000 SI=0000 DI=0000
* SS=0000 DS=0000 ES=0000 PS=0002 V0 D0 I0 T0 S0 Z0 A0 P0 C0
* F000:FFF0 EA5BE000F0 JMP F000:E05B
*
* Example of 80386 real-mode register dump:
* Sample 80386 real-mode register dump:
*
* EAX=00000000 EBX=00000000 ECX=00000000 EDX=00000000
* ESP=00000000 EBP=00000000 ESI=00000000 EDI=00000000
* SS=0000 DS=0000 ES=0000 PS=00000002 V0 D0 I0 T0 S0 Z0 A0 P0 C0
* F000:0000FFF0 EA05F900F0 JMP F000:0000F905
*
* Example of 80286 protected-mode register dump:
* Sample 80286 protected-mode register dump:
*
* AX=0000 BX=0000 CX=0000 DX=0000 SP=0000 BP=0000 SI=0000 DI=0000
* SS=0000[000000,FFFF] DS=0000[000000,FFFF] ES=0000[000000,FFFF] A20=ON
@ -3124,7 +3126,7 @@ if (DEBUGGER) {
* TR=0000 MS=FFF0 PS=0002 V0 D0 I0 T0 S0 Z0 A0 P0 C0
* F000:FFF0 EA5BE000F0 JMP F000:E05B
*
* Example of 80386 protected-mode register dump:
* Sample 80386 protected-mode register dump:
*
* EAX=00000000 EBX=00000000 ECX=00000000 EDX=00000000
* ESP=00000000 EBP=00000000 ESI=00000000 EDI=00000000
@ -3134,7 +3136,7 @@ if (DEBUGGER) {
* CR0=00000010 CR2=00000000 CR3=00000000 PS=00000002 V0 D0 I0 T0 S0 Z0 A0 P0 C0
* F000:0000FFF0 EA05F900F0 JMP F000:0000F905
*
* We no longer include CS in real-mode (or EIP in any mode), because that information can be obtained from the
* This no longer includes CS in real-mode (or EIP in any mode), because that information can be obtained from the
* first line of disassembly, which an "r" or "rp" command will also display.
*
* Note that even when the processor is in real mode, you can always use the "rp" command to force a protected-mode
@ -3168,7 +3170,7 @@ if (DEBUGGER) {
s += sA20; sA20 = '';
}
s += '\n' + this.getSegStr(this.cpu.segCS, fProt) + ' ';
if (this.cpu.model >= X86.MODEL_80386) {
if (I386 && this.cpu.model >= X86.MODEL_80386) {
sA20 += '\n';
s += this.getSegStr(this.cpu.segFS, fProt) + ' ' +
this.getSegStr(this.cpu.segGS, fProt) + '\n';
@ -3178,9 +3180,14 @@ if (DEBUGGER) {
this.getDTRStr("ID", null, this.cpu.addrIDT, this.cpu.addrIDTLimit) + ' ';
s += sTR + ' ' + sA20;
s += this.getRegStr(this.regs.MS, this.cpu.regCR0);
if (this.cpu.model >= X86.MODEL_80386) {
if (I386 && this.cpu.model >= X86.MODEL_80386) {
s += this.getRegStr("CR2", this.cpu.regCR2) + this.getRegStr("CR3", this.cpu.regCR3);
}
} else {
if (I386 && this.cpu.model >= X86.MODEL_80386) {
s += this.getSegStr(this.cpu.segFS, fProt) + ' ' +
this.getSegStr(this.cpu.segGS, fProt) + ' ';
}
}
s += this.getRegStr(this.regs.PS, this.cpu.getPS()) +
this.getFlagStr("V") + this.getFlagStr("D") + this.getFlagStr("I") + this.getFlagStr("T") +

View file

@ -800,6 +800,16 @@ X86CPU.prototype.reset = function()
* CS Base = 0xFF0000 DS/ES/SS Base = 0x000000 IDT Base = 0x000000
* CS Limit = 0xFFFF DS/ES/SS Limit = 0xFFFF IDT Limit = 0x03FF
*
* And from the "INTEL 80386 PROGRAMMER'S REFERENCE MANUAL 1986", section 10.1:
*
* The contents of EAX depend upon the results of the power-up self test. The self-test may be requested
* externally by assertion of BUSY# at the end of RESET. The EAX register holds zero if the 80386 passed
* the test. A nonzero value in EAX after self-test indicates that the particular 80386 unit is faulty.
* If the self-test is not requested, the contents of EAX after RESET is undefined.
*
* DX holds a component identifier and revision number after RESET as Figure 10-1 illustrates. DH contains 3,
* which indicates an 80386 component. DL contains a unique identifier of the revision level.
*
* We define some additional "registers", such as regLIP. which mirrors the linear address corresponding to
* CS:IP (the address of the next opcode byte). In fact, regLIP functions as our internal IP register, so any
* code that needs the real IP must call getIP(). This, in turn, means that whenever CS or IP must be modified,
@ -869,6 +879,7 @@ X86CPU.prototype.resetRegs = function()
this.setSS(0);
if (I386 && this.model >= X86.MODEL_80386) {
this.regEDX = 0x0303; // Intel documentation indicates this is what an 80386-B1 reported
this.regCR0 = X86.CR0.ET; // formerly MSW
this.regCR1 = 0; // reserved
this.regCR2 = 0; // page fault linear address (PFLA)
@ -1460,6 +1471,58 @@ X86CPU.prototype.setES = function(sel)
if (!BUGS_8086) this.opFlags |= this.OPFLAG_NOINTR8086;
};
/**
* getFS()
*
* NOTE: segFS is defined for I386 only.
*
* @this {X86CPU}
* @return {number}
*/
X86CPU.prototype.getFS = function()
{
return this.segFS.sel;
};
/**
* setFS(sel)
*
* NOTE: segFS is defined for I386 only.
*
* @this {X86CPU}
* @param {number} sel
*/
X86CPU.prototype.setFS = function(sel)
{
this.segFS.load(sel);
};
/**
* getGS()
*
* NOTE: segGS is defined for I386 only.
*
* @this {X86CPU}
* @return {number}
*/
X86CPU.prototype.getGS = function()
{
return this.segGS.sel;
};
/**
* setGS(sel)
*
* NOTE: segGS is defined for I386 only.
*
* @this {X86CPU}
* @param {number} sel
*/
X86CPU.prototype.setGS = function(sel)
{
this.segGS.load(sel);
};
/**
* getIP()
*

View file

@ -1993,7 +1993,7 @@ var X86OpXX = {
temp = this.regEBX;
break;
default:
if (this.model >= X86.MODEL_80286) {
if (this.model == X86.MODEL_80286 || this.model == X86.MODEL_80386 && reg != 0x4 && reg != 0x5) {
X86Help.opHelpInvalid.call(this);
return;
}
@ -2037,11 +2037,19 @@ var X86OpXX = {
this.regEBX = temp;
break;
case 0x4:
this.setES(this.getSP());
if (I386 && this.model >= X86.MODEL_80386) {
this.setFS(this.getSP());
} else {
this.setES(this.getSP());
}
this.setSP(temp);
break;
case 0x5:
this.setCS(this.regEBP);
if (I386 && this.model >= X86.MODEL_80386) {
this.setGS(this.regEBP);
} else {
this.setCS(this.regEBP);
}
this.regEBP = temp;
break;
case 0x6: