New blog entry, and a corrected Word 3.0 disk image
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5303d2fe20
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0b413f27f7
11 changed files with 2356 additions and 1995 deletions
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@ -340,7 +340,7 @@ if (DEBUGGER) {
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Debugger.asRegs = [
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"AL", "CL", "DL", "BL", "AH", "CH", "DH", "BH",
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"AX", "CX", "DX", "BX", "SP", "BP", "SI", "DI",
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"ES", "CS", "SS", "DS", "IP"
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"ES", "CS", "SS", "DS", "FS", "GS", "IP"
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];
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Debugger.REG_ES = 0x00; // bits 0-1 are standard SegReg encodings
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@ -1189,7 +1189,7 @@ if (DEBUGGER) {
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this.aaOpDescs[0x0F] = Debugger.aOpDescUndefined;
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if (this.cpu.model >= X86.MODEL_80286) {
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this.aaOpDescs[0x0F] = Debugger.aOpDesc0F;
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if (this.cpu.model >= X86.MODEL_80386) {
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if (I386 && this.cpu.model >= X86.MODEL_80386) {
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this.cchReg = 8;
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this.maskReg = 0xffffffff|0;
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}
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@ -1626,7 +1626,9 @@ if (DEBUGGER) {
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this.aMessageRegs[asRegs[17]] = str.toHexWord(cpu.getCS());
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this.aMessageRegs[asRegs[18]] = str.toHexWord(cpu.getSS());
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this.aMessageRegs[asRegs[19]] = str.toHexWord(cpu.getDS());
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this.aMessageRegs[asRegs[20]] = str.toHexWord(cpu.getIP());
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this.aMessageRegs[asRegs[20]] = str.toHexWord(cpu.getFS());
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this.aMessageRegs[asRegs[21]] = str.toHexWord(cpu.getGS());
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this.aMessageRegs[asRegs[22]] = str.toHexWord(cpu.getIP());
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};
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/**
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@ -2908,7 +2910,7 @@ if (DEBUGGER) {
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Debugger.prototype.getRegOperand = function(bReg, type, aAddr)
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{
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if ((type & Debugger.TYPE_MODE) == Debugger.TYPE_SEGREG) {
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if (bReg >= 4) return null;
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if (bReg >= 6 || bReg >= 4 && this.cpu.model < X86.MODEL_80386) return null;
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bReg += 16;
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}
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else if ((type & Debugger.TYPE_SIZE) >= Debugger.TYPE_WORD)
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@ -3103,20 +3105,20 @@ if (DEBUGGER) {
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/**
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* getRegDump(fProt)
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*
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* Example of 8086 and 80286 real-mode register dump:
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* Sample 8086 and 80286 real-mode register dump:
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*
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* AX=0000 BX=0000 CX=0000 DX=0000 SP=0000 BP=0000 SI=0000 DI=0000
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* SS=0000 DS=0000 ES=0000 PS=0002 V0 D0 I0 T0 S0 Z0 A0 P0 C0
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* F000:FFF0 EA5BE000F0 JMP F000:E05B
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*
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* Example of 80386 real-mode register dump:
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* Sample 80386 real-mode register dump:
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*
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* EAX=00000000 EBX=00000000 ECX=00000000 EDX=00000000
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* ESP=00000000 EBP=00000000 ESI=00000000 EDI=00000000
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* SS=0000 DS=0000 ES=0000 PS=00000002 V0 D0 I0 T0 S0 Z0 A0 P0 C0
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* F000:0000FFF0 EA05F900F0 JMP F000:0000F905
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*
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* Example of 80286 protected-mode register dump:
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* Sample 80286 protected-mode register dump:
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*
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* AX=0000 BX=0000 CX=0000 DX=0000 SP=0000 BP=0000 SI=0000 DI=0000
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* SS=0000[000000,FFFF] DS=0000[000000,FFFF] ES=0000[000000,FFFF] A20=ON
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@ -3124,7 +3126,7 @@ if (DEBUGGER) {
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* TR=0000 MS=FFF0 PS=0002 V0 D0 I0 T0 S0 Z0 A0 P0 C0
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* F000:FFF0 EA5BE000F0 JMP F000:E05B
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*
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* Example of 80386 protected-mode register dump:
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* Sample 80386 protected-mode register dump:
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*
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* EAX=00000000 EBX=00000000 ECX=00000000 EDX=00000000
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* ESP=00000000 EBP=00000000 ESI=00000000 EDI=00000000
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@ -3134,7 +3136,7 @@ if (DEBUGGER) {
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* CR0=00000010 CR2=00000000 CR3=00000000 PS=00000002 V0 D0 I0 T0 S0 Z0 A0 P0 C0
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* F000:0000FFF0 EA05F900F0 JMP F000:0000F905
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*
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* We no longer include CS in real-mode (or EIP in any mode), because that information can be obtained from the
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* This no longer includes CS in real-mode (or EIP in any mode), because that information can be obtained from the
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* first line of disassembly, which an "r" or "rp" command will also display.
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*
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* Note that even when the processor is in real mode, you can always use the "rp" command to force a protected-mode
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@ -3168,7 +3170,7 @@ if (DEBUGGER) {
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s += sA20; sA20 = '';
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}
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s += '\n' + this.getSegStr(this.cpu.segCS, fProt) + ' ';
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if (this.cpu.model >= X86.MODEL_80386) {
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if (I386 && this.cpu.model >= X86.MODEL_80386) {
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sA20 += '\n';
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s += this.getSegStr(this.cpu.segFS, fProt) + ' ' +
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this.getSegStr(this.cpu.segGS, fProt) + '\n';
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@ -3178,9 +3180,14 @@ if (DEBUGGER) {
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this.getDTRStr("ID", null, this.cpu.addrIDT, this.cpu.addrIDTLimit) + ' ';
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s += sTR + ' ' + sA20;
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s += this.getRegStr(this.regs.MS, this.cpu.regCR0);
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if (this.cpu.model >= X86.MODEL_80386) {
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if (I386 && this.cpu.model >= X86.MODEL_80386) {
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s += this.getRegStr("CR2", this.cpu.regCR2) + this.getRegStr("CR3", this.cpu.regCR3);
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}
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} else {
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if (I386 && this.cpu.model >= X86.MODEL_80386) {
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s += this.getSegStr(this.cpu.segFS, fProt) + ' ' +
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this.getSegStr(this.cpu.segGS, fProt) + ' ';
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}
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}
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s += this.getRegStr(this.regs.PS, this.cpu.getPS()) +
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this.getFlagStr("V") + this.getFlagStr("D") + this.getFlagStr("I") + this.getFlagStr("T") +
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@ -800,6 +800,16 @@ X86CPU.prototype.reset = function()
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* CS Base = 0xFF0000 DS/ES/SS Base = 0x000000 IDT Base = 0x000000
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* CS Limit = 0xFFFF DS/ES/SS Limit = 0xFFFF IDT Limit = 0x03FF
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*
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* And from the "INTEL 80386 PROGRAMMER'S REFERENCE MANUAL 1986", section 10.1:
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*
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* The contents of EAX depend upon the results of the power-up self test. The self-test may be requested
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* externally by assertion of BUSY# at the end of RESET. The EAX register holds zero if the 80386 passed
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* the test. A nonzero value in EAX after self-test indicates that the particular 80386 unit is faulty.
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* If the self-test is not requested, the contents of EAX after RESET is undefined.
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*
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* DX holds a component identifier and revision number after RESET as Figure 10-1 illustrates. DH contains 3,
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* which indicates an 80386 component. DL contains a unique identifier of the revision level.
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*
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* We define some additional "registers", such as regLIP. which mirrors the linear address corresponding to
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* CS:IP (the address of the next opcode byte). In fact, regLIP functions as our internal IP register, so any
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* code that needs the real IP must call getIP(). This, in turn, means that whenever CS or IP must be modified,
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@ -869,6 +879,7 @@ X86CPU.prototype.resetRegs = function()
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this.setSS(0);
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if (I386 && this.model >= X86.MODEL_80386) {
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this.regEDX = 0x0303; // Intel documentation indicates this is what an 80386-B1 reported
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this.regCR0 = X86.CR0.ET; // formerly MSW
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this.regCR1 = 0; // reserved
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this.regCR2 = 0; // page fault linear address (PFLA)
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@ -1460,6 +1471,58 @@ X86CPU.prototype.setES = function(sel)
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if (!BUGS_8086) this.opFlags |= this.OPFLAG_NOINTR8086;
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};
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/**
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* getFS()
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*
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* NOTE: segFS is defined for I386 only.
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*
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* @this {X86CPU}
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* @return {number}
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*/
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X86CPU.prototype.getFS = function()
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{
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return this.segFS.sel;
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};
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/**
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* setFS(sel)
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*
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* NOTE: segFS is defined for I386 only.
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*
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* @this {X86CPU}
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* @param {number} sel
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*/
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X86CPU.prototype.setFS = function(sel)
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{
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this.segFS.load(sel);
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};
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/**
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* getGS()
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*
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* NOTE: segGS is defined for I386 only.
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*
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* @this {X86CPU}
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* @return {number}
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*/
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X86CPU.prototype.getGS = function()
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{
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return this.segGS.sel;
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};
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/**
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* setGS(sel)
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*
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* NOTE: segGS is defined for I386 only.
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*
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* @this {X86CPU}
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* @param {number} sel
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*/
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X86CPU.prototype.setGS = function(sel)
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{
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this.segGS.load(sel);
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};
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/**
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* getIP()
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*
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@ -1993,7 +1993,7 @@ var X86OpXX = {
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temp = this.regEBX;
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break;
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default:
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if (this.model >= X86.MODEL_80286) {
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if (this.model == X86.MODEL_80286 || this.model == X86.MODEL_80386 && reg != 0x4 && reg != 0x5) {
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X86Help.opHelpInvalid.call(this);
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return;
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}
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@ -2037,11 +2037,19 @@ var X86OpXX = {
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this.regEBX = temp;
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break;
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case 0x4:
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this.setES(this.getSP());
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if (I386 && this.model >= X86.MODEL_80386) {
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this.setFS(this.getSP());
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} else {
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this.setES(this.getSP());
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}
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this.setSP(temp);
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break;
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case 0x5:
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this.setCS(this.regEBP);
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if (I386 && this.model >= X86.MODEL_80386) {
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this.setGS(this.regEBP);
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} else {
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this.setCS(this.regEBP);
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}
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this.regEBP = temp;
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break;
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case 0x6:
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