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Added new IBM PC AT configuration (8Mhz model, currently not booting)

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This commit is contained in:
Jeff Parsons 2014-10-13 12:16:27 -07:00 • committed by jeffpar
commit 093099d980
38 changed files with 3848 additions and 1558 deletions
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4
blog/2014/09/13/README.md
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@ -20,8 +20,8 @@ Aside from the additional DMA Controller, other major new motherboard components
The Keyboard Controller and Real-Time Clock/CMOS components required the most tinkering to pass through the ROM BIOS
gauntlet.
For example, at one point, the BIOS ("[TEST.21](../../../../pubs/pc/reference/ibm/static/5170/techref/pages/IBM-5170-TECHREF 202.pdf)")
reset the keyboard ("[KBD_RESET](../../../../pubs/pc/reference/ibm/static/5170/techref/pages/IBM-5170-TECHREF 212.pdf)"),
For example, at one point, the BIOS ("[TEST.21](../../../../pubs/pc/reference/ibm/static/5170/techref/1984-03/pages/IBM-5170-TECHREF 202.pdf)")
reset the keyboard ("[KBD_RESET](../../../../pubs/pc/reference/ibm/static/5170/techref/1984-03/pages/IBM-5170-TECHREF 212.pdf)"),
which unmasked the keyboard IRQ and waited for an interrupt, using a loop where CX was initialized to zero and then
decremented until either CX wrapped around to zero again *or* an interrupt occurred. The "TEST.21" code then assumed
that if "KBD_RESET" returned zero in CX, no interrupt had occurred.

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blog/2014/10/13/README.md Normal file
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@ -0,0 +1,28 @@
The 8Mhz IBM PC AT 5170
---
I just added my first [IBM PC AT "Rev 3"](/configs/pc/machines/5170/ega/1152kb/rev3/) machine configuration
to the list of [IBM PC Machine Configurations](/configs/pc/machines/), and not surprisingly, the new machine
fails to boot.
I call it "Rev 3" because it uses the 3rd [ROM BIOS](/devices/pc/bios/5170/) that IBM released for the PC AT,
a revision that is supposed to include support for 3.5-inch 1.44Mb diskettes -- which would be great, because I
have a number of 1.44Mb diskette images it would be nice to be able to read in a PCjs machine.
Machines with this BIOS also ran at 8Mhz, so I've bumped the CPU speed up to 8,000,000 cycles/second. It'll be
interesting to see whether this BIOS also increased any of its hard-coded timing delay-loops as a result.
Anyway, when I enabled ChipSet I/O port messages in the Debugger:
m chipset on
m port on
I can see that the BIOS Power-On Self Test (POST) progresses nicely until it starts generating lots of port 0x61
activity:
chipset.inPort(0x0061,8042_RWREG): 0x30 at F000:05A8
chipset.inPort(0x0061,8042_RWREG): 0x20 at F000:05AE
I know what I'm going to be doing this afternoon now.
*[@jeffpar](http://twitter.com/jeffpar)*
*October 13, 2014*