Debugger notes about 0x0F opcodes
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2 changed files with 11 additions and 2 deletions
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@ -79,7 +79,7 @@ XBTS (Extract Bit String) instruction -- an instruction that existed only on B0
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&0654:12B9 33C0 XOR AX,AX
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&0654:12BB 8BD0 MOV DX,AX
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&0654:12BD B900FF MOV CX,FF00
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&0654:12C0 0FA6CA INVALID ; attempt to execute an XBTS instruction
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&0654:12C0 0FA6CA XBTS CX,DX,AX,CL ; attempt to execute an XBTS instruction
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&0654:12C3 6658 POP EAX
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&0654:12C5 8BD0 MOV DX,AX
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&0654:12C7 66C1E810 SHR EAX,10
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@ -1207,7 +1207,7 @@ if (DEBUGGER) {
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this.maskAddr = bus.nBusLimit;
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/*
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* Allocate a special segment "register" for our own use, whenever a requested selector is not currently loaded
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* Allocate a special segment "register", for use whenever a requested selector is not currently loaded
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*/
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this.segDebugger = new X86Seg(this.cpu, X86Seg.ID.DBG, "DBG");
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@ -1216,6 +1216,15 @@ if (DEBUGGER) {
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this.aaOpDescs = Debugger.aaOpDescs.slice();
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this.aaOpDescs[0x0F] = Debugger.aOpDescUndefined;
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if (this.cpu.model >= X86.MODEL_80286) {
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/*
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* TODO: Consider whether the aOpDesc0F table should be split in two: one for 80286-only instructions,
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* and one for both 80286 and 80386. For now, the Debugger is not as strict as the X86CPU is about
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* the instructions it supports for each type of CPU, in part because an 80286 machine could still be
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* presented with 80386-only code that is simply "skipped over" when then CPU doesn't support it.
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*
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* Obviously I'm not being entirely consistent, since I don't disassemble *any* 0x0F opcodes for any
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* pre-80286 CPUs. But at least I'm being up front about it.
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*/
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this.aaOpDescs[0x0F] = Debugger.aOpDesc0F;
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if (I386 && this.cpu.model >= X86.MODEL_80386) {
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this.cchReg = 8;
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