Some undocumented instruction updates
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docs/x86/ops/AAM/README.md
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docs/x86/ops/AAM/README.md
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---
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layout: page
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title: "x86 Instructions: AAM"
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permalink: /docs/x86/ops/AAM/
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---
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AAD (0xD4)
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---
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### Description
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From [http://www.rcollins.org/secrets/opcodes/AAM.html](http://www.rcollins.org/secrets/opcodes/AAM.html):
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Undocumented: Available to all Intel x86 processors.
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Useful in production source code.
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AAM
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Flags: ASCII Adjust after Multiply
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+-+-+-+-+-+-+-+-+-+ +----------+----------+
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|O|D|I|T|S|Z|A|P|C| | 11010100 | DATA |
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+-+-+-+-+-+-+-+-+-+ +----------+----------+
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|0| | | |+|+|0|+|0| | D4 | IMM8 |
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+-+-+-+-+-+-+-+-+-+ +----------+----------+
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AAM is shown as a two byte encoding used to divide AL by 10, putting the quotient in AH, and the remainder in AL.
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However, AAM is listed in the op code map as a single byte instruction. This leads one to wonder why a two-byte
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opcode is listed in the single-byte opcode map. In reality, the second byte is an undocumented operand to AAM.
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The operand is the divisor. In its documented incarnation, AAM is encoded as D4 0A. The operand 0A is the divisor.
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This divisor can be changed to any value between 0 and FF. Using AAM in this manner is useful -- as it extends the
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CPU instruction set to include a DIV IMM8 instruction that is not available from any other form of the DIV
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instruction.
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The extended form of the AAM instruction is also useful because it sets the flags register according to the results,
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unlike the DIV or IDIV instruction. According to Intel documentation, SF, ZF, and PF flags are set according to the
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result, while OF, AF, and CF are undefined. However, if AAM were used strictly as documented, then the Sign Flag (SF)
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could not be set under any circumstances, since anything divided by 10 will leave a remainder between 0 and 9.
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Obviously the remainder could never be between 128 and 255 (or -1 and -128 if you prefer) if used only as documented.
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Since AAM divides an 8 bit number by another 8-bit number, a carry or overflow could never occur. Therefore CF and
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OF always=0. Intel claims they are undefined, but my observations are consistent with my theory.
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Contrary to documentation, AAM will generate exceptions in real mode, protected mode, and V86 mode. AAM can only
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generate Exception 0 -- divide by 0. Finally, in the Pentium User's Manual, this heretofore undocumented form of
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AMM is described. Intel says:
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Note: imm8 has the value of the instruction's second byte. The second byte under normally assembly [sic] of
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this instruction will be 0A, however, explicit modification of this byte will result in the operation described
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above and may alter results.
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This instruction exists in this form on all Intel x86 processors. See the file AAM.ASM for diagnostics source code
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for this instruction.
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See [AAM.ASM](AAM.ASM) for the source code mentioned above.
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