More strict 8080 compatibility changes
This commit is contained in:
Jeff Parsons
parent
2a447fa6ae
commit
01db9fc39e
6 changed files with 1618 additions and 14 deletions
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@ -4,7 +4,7 @@
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<name pos="center">8080 Test Machine</name>
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<computer id="computer" busWidth="16"/>
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<cpu id="cpu8080" model="8080" cycles="2000000"/>
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<rom id="romTest" addr="0x0100" size="0x1200" file="/devices/pc8080/rom/test/8080EXER.json" writable="true"/>
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<rom id="romTest" addr="0x0100" size="0x1200" file="/devices/pc8080/rom/test/8080EX1.json" writable="true"/>
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<ram id="ramTest" addr="0x1300" size="0xED00"/>
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<panel ref="/devices/pc8080/panel/wide.xml"/>
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<debugger id="debugger"/>
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1286
devices/pc8080/rom/test/8080EX1.MAC
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1286
devices/pc8080/rom/test/8080EX1.MAC
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File diff suppressed because it is too large
Load diff
290
devices/pc8080/rom/test/8080EX1.json
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290
devices/pc8080/rom/test/8080EX1.json
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@ -0,0 +1,290 @@
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|
||||
217,12,71,26,160,194,213,12,120,7,254,1,194,211,12,54,
|
||||
0,35,19,119,175,225,209,193,201,35,19,195,189,12,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,245,197,
|
||||
213,229,243,33,0,0,57,34,169,13,49,5,1,225,225,225,
|
||||
209,193,241,34,151,13,42,17,1,249,42,151,13,0,0,0,
|
||||
0,34,151,13,33,0,0,218,94,13,57,195,96,13,57,55,
|
||||
34,167,13,42,151,13,49,167,13,245,197,213,229,229,229,42,
|
||||
169,13,249,251,42,3,1,34,153,13,33,165,13,126,230,255,
|
||||
119,6,16,17,153,13,33,179,14,26,19,205,119,14,5,194,
|
||||
137,13,225,209,193,241,201,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,126,205,199,13,35,
|
||||
5,194,171,13,201,245,197,229,6,4,126,205,199,13,35,5,
|
||||
194,186,13,225,193,241,201,245,15,15,15,15,205,208,13,241,
|
||||
245,197,213,229,230,15,254,10,218,221,13,198,39,198,48,95,
|
||||
14,2,205,234,13,225,209,193,241,201,245,197,213,229,205,5,
|
||||
0,225,209,193,241,201,56,48,56,48,32,105,110,115,116,114,
|
||||
117,99,116,105,111,110,32,101,120,101,114,99,105,115,101,114,
|
||||
32,40,75,82,53,56,48,86,77,56,48,65,32,67,80,85,
|
||||
41,10,13,36,84,101,115,116,115,32,99,111,109,112,108,101,
|
||||
116,101,36,32,32,79,75,10,13,36,32,32,69,82,82,79,
|
||||
82,32,42,42,42,42,32,99,114,99,32,101,120,112,101,99,
|
||||
116,101,100,58,36,32,102,111,117,110,100,58,36,10,13,36,
|
||||
197,213,229,17,179,14,6,4,26,190,194,115,14,35,19,5,
|
||||
194,104,14,225,209,193,201,245,197,213,229,229,17,3,0,25,
|
||||
174,111,38,0,41,41,235,33,183,14,25,235,225,1,4,0,
|
||||
26,168,70,119,19,35,13,194,144,14,225,209,193,241,201,245,
|
||||
197,229,33,179,14,62,255,6,4,119,35,5,194,169,14,225,
|
||||
193,241,201,0,0,0,0,0,0,0,0,119,7,48,150,238,
|
||||
14,97,44,153,9,81,186,7,109,196,25,112,106,244,143,233,
|
||||
99,165,53,158,100,149,163,14,219,136,50,121,220,184,164,224,
|
||||
213,233,30,151,210,217,136,9,182,76,43,126,177,124,189,231,
|
||||
184,45,7,144,191,29,145,29,183,16,100,106,176,32,242,243,
|
||||
185,113,72,132,190,65,222,26,218,212,125,109,221,228,235,244,
|
||||
212,181,81,131,211,133,199,19,108,152,86,100,107,168,192,253,
|
||||
98,249,122,138,101,201,236,20,1,92,79,99,6,108,217,250,
|
||||
15,61,99,141,8,13,245,59,110,32,200,76,105,16,94,213,
|
||||
96,65,228,162,103,113,114,60,3,228,209,75,4,212,71,210,
|
||||
13,133,253,165,10,181,107,53,181,168,250,66,178,152,108,219,
|
||||
187,201,214,172,188,249,64,50,216,108,227,69,223,92,117,220,
|
||||
214,13,207,171,209,61,89,38,217,48,172,81,222,0,58,200,
|
||||
215,81,128,191,208,97,22,33,180,244,181,86,179,196,35,207,
|
||||
186,149,153,184,189,165,15,40,2,184,158,95,5,136,8,198,
|
||||
12,217,178,177,11,233,36,47,111,124,135,88,104,76,17,193,
|
||||
97,29,171,182,102,45,61,118,220,65,144,1,219,113,6,152,
|
||||
210,32,188,239,213,16,42,113,177,133,137,6,182,181,31,159,
|
||||
191,228,165,232,184,212,51,120,7,201,162,15,0,249,52,150,
|
||||
9,168,142,225,14,152,24,127,106,13,187,8,109,61,45,145,
|
||||
100,108,151,230,99,92,1,107,107,81,244,28,108,97,98,133,
|
||||
101,48,216,242,98,0,78,108,6,149,237,27,1,165,123,130,
|
||||
8,244,193,245,15,196,87,101,176,217,198,18,183,233,80,139,
|
||||
190,184,234,252,185,136,124,98,221,29,223,21,218,45,73,140,
|
||||
211,124,243,251,212,76,101,77,178,97,88,58,181,81,206,163,
|
||||
188,0,116,212,187,48,226,74,223,165,65,61,216,149,215,164,
|
||||
209,196,109,211,214,244,251,67,105,233,106,52,110,217,252,173,
|
||||
103,136,70,218,96,184,208,68,4,45,115,51,3,29,229,170,
|
||||
10,76,95,221,13,124,201,80,5,113,60,39,2,65,170,190,
|
||||
11,16,16,201,12,32,134,87,104,181,37,32,111,133,179,185,
|
||||
102,212,9,206,97,228,159,94,222,249,14,41,217,201,152,176,
|
||||
208,152,34,199,215,168,180,89,179,61,23,46,180,13,129,183,
|
||||
189,92,59,192,186,108,173,237,184,131,32,154,191,179,182,3,
|
||||
182,226,12,116,177,210,154,234,213,71,57,157,210,119,175,4,
|
||||
219,38,21,115,220,22,131,227,99,11,18,148,100,59,132,13,
|
||||
109,106,62,122,106,90,168,228,14,207,11,147,9,255,157,10,
|
||||
0,174,39,125,7,158,177,240,15,147,68,135,8,163,210,30,
|
||||
1,242,104,105,6,194,254,247,98,87,93,128,101,103,203,25,
|
||||
108,54,113,110,107,6,231,254,212,27,118,137,211,43,224,16,
|
||||
218,122,90,103,221,74,204,249,185,223,111,142,190,239,249,23,
|
||||
183,190,67,96,176,142,213,214,214,163,232,161,209,147,126,56,
|
||||
216,194,196,79,223,242,82,209,187,103,241,166,188,87,103,63,
|
||||
181,6,221,72,178,54,75,216,13,43,218,175,10,27,76,54,
|
||||
3,74,246,65,4,122,96,223,96,239,195,168,103,223,85,49,
|
||||
110,142,239,70,105,190,121,203,97,179,140,188,102,131,26,37,
|
||||
111,210,160,82,104,226,54,204,12,119,149,187,11,71,3,34,
|
||||
2,22,185,85,5,38,47,197,186,59,190,178,189,11,40,43,
|
||||
180,90,146,92,179,106,4,194,215,255,167,181,208,207,49,44,
|
||||
217,158,139,91,222,174,29,155,100,194,176,236,99,242,38,117,
|
||||
106,163,156,2,109,147,10,156,9,6,169,235,14,54,63,114,
|
||||
7,103,133,5,0,87,19,149,191,74,130,226,184,122,20,123,
|
||||
177,43,174,12,182,27,56,146,210,142,155,229,213,190,13,124,
|
||||
220,239,183,11,219,223,33,134,211,210,212,241,212,226,66,104,
|
||||
221,179,248,31,218,131,110,129,190,22,205,246,185,38,91,111,
|
||||
176,119,225,24,183,71,119,136,8,90,230,255,15,106,112,102,
|
||||
6,59,202,17,1,11,92,143,101,158,255,248,98,174,105,97,
|
||||
107,255,211,22,108,207,69,160,10,226,120,215,13,210,238,78,
|
||||
4,131,84,57,3,179,194,167,103,38,97,208,96,22,247,73,
|
||||
105,71,77,62,110,119,219,174,209,106,74,217,214,90,220,64,
|
||||
223,11,102,55,216,59,240,169,188,174,83,222,187,158,197,71,
|
||||
178,207,127,48,181,255,233,189,189,242,28,202,186,194,138,83,
|
||||
179,147,48,36,180,163,166,186,208,54,5,205,215,6,147,84,
|
||||
222,87,41,35,217,103,191,179,102,122,46,196,97,74,184,93,
|
||||
104,27,2,42,111,43,148,180,11,190,55,195,12,142,161,90,
|
||||
5,223,27,45,2,239,141,160,10,226,120,215,13,210,238,78,
|
||||
4,131,84,57,3,179,194,167,103,38,97,208,96,22,247,73,
|
||||
105,71,77,62,110,119,219,174,209,106,74,217,214,90,220,64,
|
||||
223,11,102,55,216,59,240,169,188,174,83,222,187,158,197,71,
|
||||
178,207,127,48,181,255,233,189,189,242,28,202,186,194,138,83]
|
||||
}
|
||||
|
|
@ -716,7 +716,7 @@ CPUSim.prototype.setPS = function(regPS)
|
|||
CPUSim.prototype.addByte = function(src)
|
||||
{
|
||||
this.resultAuxOverflow = this.regA ^ src;
|
||||
return (this.resultZeroCarry = this.resultParitySign = this.regA + src) & 0xff;
|
||||
return this.resultParitySign = (this.resultZeroCarry = this.regA + src) & 0xff;
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
@ -729,44 +729,63 @@ CPUSim.prototype.addByte = function(src)
|
|||
CPUSim.prototype.addByteCarry = function(src)
|
||||
{
|
||||
this.resultAuxOverflow = this.regA ^ src;
|
||||
return (this.resultZeroCarry = this.resultParitySign = this.regA + src + ((this.resultZeroCarry & 0x100)? 1 : 0)) & 0xff;
|
||||
return this.resultParitySign = (this.resultZeroCarry = this.regA + src + ((this.resultZeroCarry & 0x100)? 1 : 0)) & 0xff;
|
||||
};
|
||||
|
||||
/**
|
||||
* andByte(src)
|
||||
*
|
||||
* Ordinarily, one would expect the Auxiliary Carry flag (AF) to be clear after this operation,
|
||||
* but apparently the 8080 will set AF if bit 3 in either operand is set.
|
||||
*
|
||||
* @this {CPUSim}
|
||||
* @param {number} src
|
||||
* @return {number} regA & src
|
||||
*/
|
||||
CPUSim.prototype.andByte = function(src)
|
||||
{
|
||||
return this.resultZeroCarry = this.resultParitySign = this.resultAuxOverflow = this.regA & src;
|
||||
this.resultZeroCarry = this.resultParitySign = this.resultAuxOverflow = this.regA & src;
|
||||
if ((this.regA | src) & 0x8) this.resultAuxOverflow ^= 0x10; // set AF by inverting bit 4 in resultAuxOverflow
|
||||
return this.resultZeroCarry;
|
||||
};
|
||||
|
||||
/**
|
||||
* cmpByte(src)
|
||||
*
|
||||
* We perform this operation using 8-bit two's complement arithmetic, by negating src, adding,
|
||||
* and then inverting the resulting carry (resultZeroCarry ^ 0x100). This appears to mimic how
|
||||
* the 8080 manages the Auxiliary Carry flag (AF).
|
||||
*
|
||||
* @this {CPUSim}
|
||||
* @param {number} src
|
||||
*/
|
||||
CPUSim.prototype.cmpByte = function(src)
|
||||
{
|
||||
src = -src & 0xff;
|
||||
this.resultAuxOverflow = this.regA ^ src;
|
||||
this.resultZeroCarry = this.resultParitySign = this.regA - src;
|
||||
/*
|
||||
* The final AND with 0xff isn't strictly necessary, since the result of the comparison is
|
||||
* not returned, but I like limiting the result variables to tidy 8-bit values (resultZeroCarry
|
||||
* being the 9-bit exception).
|
||||
*/
|
||||
this.resultParitySign = (this.resultZeroCarry = (this.regA + src) ^ 0x100) & 0xff;
|
||||
};
|
||||
|
||||
/**
|
||||
* decByte(b)
|
||||
*
|
||||
* We perform this operation using 8-bit two's complement arithmetic, by negating src, adding,
|
||||
* and then inverting the resulting carry (resultZeroCarry ^ 0x100). This appears to mimic how
|
||||
* the 8080 manages the Auxiliary Carry flag (AF).
|
||||
*
|
||||
* @this {CPUSim}
|
||||
* @param {number} b
|
||||
* @return {number}
|
||||
*/
|
||||
CPUSim.prototype.decByte = function(b)
|
||||
{
|
||||
this.resultAuxOverflow = b;
|
||||
b = (this.resultParitySign = b - 1) & 0xff;
|
||||
this.resultAuxOverflow = b ^ 0xff;
|
||||
b = this.resultParitySign = (b + 0xff) & 0xff;
|
||||
this.resultZeroCarry = (this.resultZeroCarry & ~0xff) | b;
|
||||
return b;
|
||||
};
|
||||
|
|
@ -781,7 +800,7 @@ CPUSim.prototype.decByte = function(b)
|
|||
CPUSim.prototype.incByte = function(b)
|
||||
{
|
||||
this.resultAuxOverflow = b;
|
||||
b = (this.resultParitySign = b + 1) & 0xff;
|
||||
b = this.resultParitySign = (b + 1) & 0xff;
|
||||
this.resultZeroCarry = (this.resultZeroCarry & ~0xff) | b;
|
||||
return b;
|
||||
};
|
||||
|
|
@ -795,33 +814,43 @@ CPUSim.prototype.incByte = function(b)
|
|||
*/
|
||||
CPUSim.prototype.orByte = function(src)
|
||||
{
|
||||
return this.resultZeroCarry = this.resultParitySign = this.resultAuxOverflow = this.regA | src;
|
||||
return this.resultParitySign = this.resultZeroCarry = this.resultAuxOverflow = this.regA | src;
|
||||
};
|
||||
|
||||
/**
|
||||
* subByte(src)
|
||||
*
|
||||
* We perform this operation using 8-bit two's complement arithmetic, by negating src, adding,
|
||||
* and then inverting the resulting carry (resultZeroCarry ^ 0x100). This appears to mimic how
|
||||
* the 8080 manages the Auxiliary Carry flag (AF).
|
||||
*
|
||||
* @this {CPUSim}
|
||||
* @param {number} src
|
||||
* @return {number} regA - src
|
||||
*/
|
||||
CPUSim.prototype.subByte = function(src)
|
||||
{
|
||||
src = -src & 0xff;
|
||||
this.resultAuxOverflow = this.regA ^ src;
|
||||
return (this.resultZeroCarry = this.resultParitySign = this.regA - src) & 0xff;
|
||||
return this.resultParitySign = (this.resultZeroCarry = (this.regA + src) ^ 0x100) & 0xff;
|
||||
};
|
||||
|
||||
/**
|
||||
* subByteBorrow(src)
|
||||
*
|
||||
* We perform this operation using 8-bit two's complement arithmetic, by negating (src + carry),
|
||||
* adding, and then inverting the resulting carry (resultZeroCarry ^ 0x100). This appears to mimic
|
||||
* how the 8080 manages the Auxiliary Carry flag (AF).
|
||||
*
|
||||
* @this {CPUSim}
|
||||
* @param {number} src
|
||||
* @return {number} regA - src - carry
|
||||
*/
|
||||
CPUSim.prototype.subByteBorrow = function(src)
|
||||
{
|
||||
src = -(src + (this.resultZeroCarry & 0x100)? 1 : 0) & 0xff;
|
||||
this.resultAuxOverflow = this.regA ^ src;
|
||||
return (this.resultZeroCarry = this.resultParitySign = this.regA - src - ((this.resultZeroCarry & 0x100)? 1 : 0)) & 0xff;
|
||||
return this.resultParitySign = (this.resultZeroCarry = (this.regA + src) ^ 0x100) & 0xff;
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
@ -833,7 +862,7 @@ CPUSim.prototype.subByteBorrow = function(src)
|
|||
*/
|
||||
CPUSim.prototype.xorByte = function(src)
|
||||
{
|
||||
return this.resultZeroCarry = this.resultParitySign = this.resultAuxOverflow = this.regA ^ src;
|
||||
return this.resultParitySign = this.resultZeroCarry = this.resultAuxOverflow = this.regA ^ src;
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -952,7 +952,7 @@ if (DEBUGGER) {
|
|||
*/
|
||||
Debugger.prototype.newAddr = function(addr)
|
||||
{
|
||||
return {addr: addr || 0, fTemporary: false};
|
||||
return {addr: addr, fTemporary: false};
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
|
|||
|
|
@ -474,7 +474,6 @@ ROM.prototype.writeCPMString = function(s)
|
|||
this.controlPrint.value += s;
|
||||
this.controlPrint.scrollTop = this.controlPrint.scrollHeight;
|
||||
}
|
||||
this.log(s);
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
|
|||
Loading…
Reference in a new issue