324 lines
11 KiB
C
324 lines
11 KiB
C
#include "ibm.h"
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#include "x86.h"
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#include "386_common.h"
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#include "codegen.h"
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#include "codegen_ir.h"
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#include "codegen_ops.h"
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#include "codegen_ops_mov.h"
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uint32_t ropMOV_rb_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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uint8_t imm = fastreadb(cs + op_pc);
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uop_MOV_IMM(ir, IREG_8(opcode & 7), imm);
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return op_pc + 1;
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}
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uint32_t ropMOV_rw_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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uint16_t imm = fastreadw(cs + op_pc);
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uop_MOV_IMM(ir, IREG_16(opcode & 7), imm);
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return op_pc + 2;
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}
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uint32_t ropMOV_rl_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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fetchdat = fastreadl(cs + op_pc);
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uop_MOV_IMM(ir, IREG_32(opcode & 7), fetchdat);
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return op_pc + 4;
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}
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uint32_t ropMOV_b_r(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int src_reg = (fetchdat >> 3) & 7;
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if ((fetchdat & 0xc0) == 0xc0)
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{
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int dest_reg = fetchdat & 7;
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uop_MOV(ir, IREG_8(dest_reg), IREG_8(src_reg));
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}
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else
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{
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x86seg *target_seg;
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
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codegen_check_seg_write(block, ir, target_seg);
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uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_8(src_reg));
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}
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return op_pc + 1;
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}
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uint32_t ropMOV_w_r(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int src_reg = (fetchdat >> 3) & 7;
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if ((fetchdat & 0xc0) == 0xc0)
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{
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int dest_reg = fetchdat & 7;
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uop_MOV(ir, IREG_16(dest_reg), IREG_16(src_reg));
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}
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else
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{
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x86seg *target_seg;
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
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codegen_check_seg_write(block, ir, target_seg);
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uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_16(src_reg));
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}
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return op_pc + 1;
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}
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uint32_t ropMOV_l_r(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int src_reg = (fetchdat >> 3) & 7;
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if ((fetchdat & 0xc0) == 0xc0)
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{
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int dest_reg = fetchdat & 7;
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uop_MOV(ir, IREG_32(dest_reg), IREG_32(src_reg));
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}
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else
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{
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x86seg *target_seg;
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
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codegen_check_seg_write(block, ir, target_seg);
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uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_32(src_reg));
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}
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return op_pc + 1;
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}
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uint32_t ropMOV_r_b(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = (fetchdat >> 3) & 7;
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if ((fetchdat & 0xc0) == 0xc0)
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{
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int src_reg = fetchdat & 7;
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uop_MOV(ir, IREG_8(dest_reg), IREG_8(src_reg));
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}
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else
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{
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x86seg *target_seg;
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
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codegen_check_seg_read(block, ir, target_seg);
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uop_MEM_LOAD_REG(ir, IREG_8(dest_reg), ireg_seg_base(target_seg), IREG_eaaddr);
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}
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return op_pc + 1;
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}
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uint32_t ropMOV_r_w(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = (fetchdat >> 3) & 7;
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if ((fetchdat & 0xc0) == 0xc0)
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{
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int src_reg = fetchdat & 7;
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uop_MOV(ir, IREG_16(dest_reg), IREG_16(src_reg));
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}
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else
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{
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x86seg *target_seg;
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
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codegen_check_seg_read(block, ir, target_seg);
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uop_MEM_LOAD_REG(ir, IREG_16(dest_reg), ireg_seg_base(target_seg), IREG_eaaddr);
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}
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return op_pc + 1;
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}
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uint32_t ropMOV_r_l(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int dest_reg = (fetchdat >> 3) & 7;
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if ((fetchdat & 0xc0) == 0xc0)
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{
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int src_reg = fetchdat & 7;
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uop_MOV(ir, IREG_32(dest_reg), IREG_32(src_reg));
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}
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else
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{
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x86seg *target_seg;
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
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codegen_check_seg_read(block, ir, target_seg);
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uop_MEM_LOAD_REG(ir, IREG_32(dest_reg), ireg_seg_base(target_seg), IREG_eaaddr);
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}
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return op_pc + 1;
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}
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uint32_t ropMOV_AL_abs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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uint32_t addr;
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if (op_32 & 0x200)
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addr = fastreadl(cs + op_pc);
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else
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addr = fastreadw(cs + op_pc);
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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codegen_check_seg_read(block, ir, op_ea_seg);
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uop_MEM_LOAD_ABS(ir, IREG_AL, ireg_seg_base(op_ea_seg), addr);
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return op_pc + ((op_32 & 0x200) ? 4 : 2);
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}
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uint32_t ropMOV_AX_abs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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uint32_t addr;
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if (op_32 & 0x200)
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addr = fastreadl(cs + op_pc);
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else
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addr = fastreadw(cs + op_pc);
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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codegen_check_seg_read(block, ir, op_ea_seg);
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uop_MEM_LOAD_ABS(ir, IREG_AX, ireg_seg_base(op_ea_seg), addr);
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return op_pc + ((op_32 & 0x200) ? 4 : 2);
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}
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uint32_t ropMOV_EAX_abs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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uint32_t addr;
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if (op_32 & 0x200)
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addr = fastreadl(cs + op_pc);
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else
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addr = fastreadw(cs + op_pc);
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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codegen_check_seg_read(block, ir, op_ea_seg);
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uop_MEM_LOAD_ABS(ir, IREG_EAX, ireg_seg_base(op_ea_seg), addr);
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return op_pc + ((op_32 & 0x200) ? 4 : 2);
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}
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uint32_t ropMOV_abs_AL(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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uint32_t addr;
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if (op_32 & 0x200)
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addr = fastreadl(cs + op_pc);
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else
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addr = fastreadw(cs + op_pc);
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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codegen_check_seg_write(block, ir, op_ea_seg);
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uop_MEM_STORE_ABS(ir, ireg_seg_base(op_ea_seg), addr, IREG_AL);
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return op_pc + ((op_32 & 0x200) ? 4 : 2);
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}
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uint32_t ropMOV_abs_AX(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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uint32_t addr;
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if (op_32 & 0x200)
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addr = fastreadl(cs + op_pc);
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else
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addr = fastreadw(cs + op_pc);
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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codegen_check_seg_write(block, ir, op_ea_seg);
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uop_MEM_STORE_ABS(ir, ireg_seg_base(op_ea_seg), addr, IREG_AX);
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return op_pc + ((op_32 & 0x200) ? 4 : 2);
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}
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uint32_t ropMOV_abs_EAX(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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uint32_t addr;
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if (op_32 & 0x200)
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addr = fastreadl(cs + op_pc);
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else
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addr = fastreadw(cs + op_pc);
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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codegen_check_seg_write(block, ir, op_ea_seg);
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uop_MEM_STORE_ABS(ir, ireg_seg_base(op_ea_seg), addr, IREG_EAX);
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return op_pc + ((op_32 & 0x200) ? 4 : 2);
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}
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uint32_t ropMOV_b_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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x86seg *target_seg;
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uint8_t imm;
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if ((fetchdat & 0xc0) == 0xc0)
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{
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int dest_reg = fetchdat & 7;
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imm = fastreadb(cs + op_pc + 1);
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uop_MOV_IMM(ir, IREG_8(dest_reg), imm);
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}
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else
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{
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
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codegen_check_seg_write(block, ir, target_seg);
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imm = fastreadb(cs + op_pc + 1);
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uop_MEM_STORE_IMM_8(ir, ireg_seg_base(target_seg), IREG_eaaddr, imm);
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}
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return op_pc + 2;
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}
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uint32_t ropMOV_w_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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x86seg *target_seg;
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uint16_t imm;
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if ((fetchdat & 0xc0) == 0xc0)
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{
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int dest_reg = fetchdat & 7;
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imm = fastreadw(cs + op_pc + 1);
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uop_MOV_IMM(ir, IREG_16(dest_reg), imm);
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}
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else
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{
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
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codegen_check_seg_write(block, ir, target_seg);
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imm = fastreadw(cs + op_pc + 1);
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uop_MEM_STORE_IMM_16(ir, ireg_seg_base(target_seg), IREG_eaaddr, imm);
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}
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return op_pc + 3;
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}
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uint32_t ropMOV_l_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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x86seg *target_seg;
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uint32_t imm;
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if ((fetchdat & 0xc0) == 0xc0)
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{
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int dest_reg = fetchdat & 7;
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imm = fastreadl(cs + op_pc + 1);
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uop_MOV_IMM(ir, IREG_32(dest_reg), imm);
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}
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else
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{
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
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codegen_check_seg_write(block, ir, target_seg);
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imm = fastreadl(cs + op_pc + 1);
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uop_MEM_STORE_IMM_32(ir, ireg_seg_base(target_seg), IREG_eaaddr, imm);
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}
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return op_pc + 5;
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}
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