258 lines
6.8 KiB
C
258 lines
6.8 KiB
C
static int opMOV_r_CRx_a16(uint32_t fetchdat)
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{
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if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
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{
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pclog("Can't load from CRx\n");
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x86gpf(NULL, 0);
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return 1;
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}
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fetch_ea_16(fetchdat);
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switch (reg)
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{
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case 0:
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regs[rm].l = cr0;
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if (is486) regs[rm].l |= 0x10; /*ET hardwired on 486*/
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break;
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case 2:
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regs[rm].l = cr2;
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break;
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case 3:
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regs[rm].l = cr3;
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break;
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case 4:
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if (cpu_hasCR4)
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{
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regs[rm].l = cr4;
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break;
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}
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default:
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pclog("Bad read of CR%i %i\n",rmdat&7,reg);
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pc = oldpc;
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x86illegal();
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break;
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}
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CLOCK_CYCLES(6);
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return 0;
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}
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static int opMOV_r_CRx_a32(uint32_t fetchdat)
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{
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if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
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{
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pclog("Can't load from CRx\n");
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x86gpf(NULL, 0);
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return 1;
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}
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fetch_ea_32(fetchdat);
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switch (reg)
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{
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case 0:
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regs[rm].l = cr0;
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if (is486) regs[rm].l |= 0x10; /*ET hardwired on 486*/
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break;
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case 2:
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regs[rm].l = cr2;
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break;
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case 3:
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regs[rm].l = cr3;
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break;
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case 4:
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if (cpu_hasCR4)
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{
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regs[rm].l = cr4;
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break;
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}
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default:
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pclog("Bad read of CR%i %i\n",rmdat&7,reg);
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pc = oldpc;
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x86illegal();
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break;
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}
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CLOCK_CYCLES(6);
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return 0;
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}
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static int opMOV_r_DRx_a16(uint32_t fetchdat)
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{
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if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
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{
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pclog("Can't load from DRx\n");
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x86gpf(NULL, 0);
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return 1;
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}
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fetch_ea_16(fetchdat);
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regs[rm].l = 0;
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CLOCK_CYCLES(6);
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return 0;
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}
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static int opMOV_r_DRx_a32(uint32_t fetchdat)
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{
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if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
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{
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pclog("Can't load from DRx\n");
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x86gpf(NULL, 0);
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return 1;
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}
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fetch_ea_32(fetchdat);
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regs[rm].l = 0;
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CLOCK_CYCLES(6);
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return 0;
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}
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static int opMOV_CRx_r_a16(uint32_t fetchdat)
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{
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if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
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{
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pclog("Can't load CRx\n");
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x86gpf(NULL,0);
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return 1;
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}
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fetch_ea_16(fetchdat);
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switch (reg)
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{
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case 0:
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if ((regs[rm].l ^ cr0) & 0x80000001) flushmmucache();
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cr0 = regs[rm].l;
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if (cpu_16bitbus) cr0 |= 0x10;
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if (!(cr0 & 0x80000000)) mmu_perm=4;
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break;
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case 2:
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cr2 = regs[rm].l;
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break;
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case 3:
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cr3 = regs[rm].l;
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flushmmucache();
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break;
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case 4:
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if (cpu_hasCR4)
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{
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cr4 = regs[rm].l & cpu_CR4_mask;
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break;
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}
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default:
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pclog("Bad load CR%i\n", reg);
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pc = oldpc;
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x86illegal();
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break;
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}
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CLOCK_CYCLES(10);
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return 0;
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}
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static int opMOV_CRx_r_a32(uint32_t fetchdat)
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{
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if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
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{
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pclog("Can't load CRx\n");
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x86gpf(NULL,0);
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return 1;
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}
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fetch_ea_32(fetchdat);
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switch (reg)
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{
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case 0:
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if ((regs[rm].l ^ cr0) & 0x80000001) flushmmucache();
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cr0 = regs[rm].l;
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if (cpu_16bitbus) cr0 |= 0x10;
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if (!(cr0 & 0x80000000)) mmu_perm=4;
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break;
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case 2:
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cr2 = regs[rm].l;
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break;
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case 3:
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cr3 = regs[rm].l;
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flushmmucache();
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break;
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case 4:
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if (cpu_hasCR4)
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{
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cr4 = regs[rm].l & cpu_CR4_mask;
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break;
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}
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default:
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pclog("Bad load CR%i\n", reg);
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pc = oldpc;
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x86illegal();
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break;
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}
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CLOCK_CYCLES(10);
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return 0;
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}
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static int opMOV_DRx_r_a16(uint32_t fetchdat)
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{
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if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
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{
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pclog("Can't load DRx\n");
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x86gpf(NULL, 0);
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return 1;
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}
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fetch_ea_16(fetchdat);
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CLOCK_CYCLES(6);
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return 0;
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}
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static int opMOV_DRx_r_a32(uint32_t fetchdat)
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{
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if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
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{
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pclog("Can't load DRx\n");
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x86gpf(NULL, 0);
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return 1;
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}
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fetch_ea_16(fetchdat);
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CLOCK_CYCLES(6);
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return 0;
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}
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static int opMOV_r_TRx_a16(uint32_t fetchdat)
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{
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if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
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{
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pclog("Can't load from TRx\n");
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x86gpf(NULL, 0);
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return 1;
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}
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fetch_ea_16(fetchdat);
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regs[rm].l = 0;
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CLOCK_CYCLES(6);
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return 0;
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}
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static int opMOV_r_TRx_a32(uint32_t fetchdat)
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{
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if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
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{
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pclog("Can't load from TRx\n");
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x86gpf(NULL, 0);
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return 1;
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}
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fetch_ea_32(fetchdat);
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regs[rm].l = 0;
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CLOCK_CYCLES(6);
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return 0;
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}
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static int opMOV_TRx_r_a16(uint32_t fetchdat)
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{
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if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
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{
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pclog("Can't load TRx\n");
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x86gpf(NULL, 0);
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return 1;
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}
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fetch_ea_16(fetchdat);
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CLOCK_CYCLES(6);
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return 0;
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}
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static int opMOV_TRx_r_a32(uint32_t fetchdat)
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{
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if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
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{
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pclog("Can't load TRx\n");
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x86gpf(NULL, 0);
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return 1;
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}
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fetch_ea_16(fetchdat);
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CLOCK_CYCLES(6);
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return 0;
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}
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