183 lines
6.4 KiB
C
183 lines
6.4 KiB
C
#include <string.h>
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#include "ibm.h"
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#include "io.h"
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#include "keyboard_at.h"
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#include "mem.h"
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#include "pci.h"
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#include "x86.h"
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#include "i440fx.h"
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static uint8_t card_i440fx[256];
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static void i440fx_map(uint32_t addr, uint32_t size, int state)
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{
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switch (state & 3)
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{
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case 0:
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mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
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break;
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case 1:
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mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL);
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break;
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case 2:
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mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
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break;
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case 3:
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mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
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break;
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}
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flushmmucache_nopc();
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}
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void i440fx_write(int func, int addr, uint8_t val, void *priv)
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{
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if (func)
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return;
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if (addr >= 0x10 && addr < 0x4f)
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return;
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switch (addr)
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{
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case 0x00: case 0x01: case 0x02: case 0x03:
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case 0x08: case 0x09: case 0x0a: case 0x0b:
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case 0x0c: case 0x0e:
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return;
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case 0x04: /*Command register*/
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val &= 0x02;
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val |= 0x04;
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break;
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case 0x05:
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val = 0;
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break;
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case 0x06: /*Status*/
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val = 0;
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break;
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case 0x07:
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val = 0x02;
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break;
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case 0x59: /*PAM0*/
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if ((card_i440fx[0x59] ^ val) & 0xf0)
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{
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i440fx_map(0xf0000, 0x10000, val >> 4);
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}
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pclog("i440fx_write : PAM0 write %02X\n", val);
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break;
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case 0x5a: /*PAM1*/
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if ((card_i440fx[0x5a] ^ val) & 0x0f)
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i440fx_map(0xc0000, 0x04000, val & 0xf);
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if ((card_i440fx[0x5a] ^ val) & 0xf0)
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i440fx_map(0xc4000, 0x04000, val >> 4);
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break;
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case 0x5b: /*PAM2*/
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if ((card_i440fx[0x5b] ^ val) & 0x0f)
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i440fx_map(0xc8000, 0x04000, val & 0xf);
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if ((card_i440fx[0x5b] ^ val) & 0xf0)
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i440fx_map(0xcc000, 0x04000, val >> 4);
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break;
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case 0x5c: /*PAM3*/
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if ((card_i440fx[0x5c] ^ val) & 0x0f)
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i440fx_map(0xd0000, 0x04000, val & 0xf);
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if ((card_i440fx[0x5c] ^ val) & 0xf0)
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i440fx_map(0xd4000, 0x04000, val >> 4);
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break;
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case 0x5d: /*PAM4*/
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if ((card_i440fx[0x5d] ^ val) & 0x0f)
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i440fx_map(0xd8000, 0x04000, val & 0xf);
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if ((card_i440fx[0x5d] ^ val) & 0xf0)
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i440fx_map(0xdc000, 0x04000, val >> 4);
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break;
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case 0x5e: /*PAM5*/
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if ((card_i440fx[0x5e] ^ val) & 0x0f)
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i440fx_map(0xe0000, 0x04000, val & 0xf);
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if ((card_i440fx[0x5e] ^ val) & 0xf0)
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i440fx_map(0xe4000, 0x04000, val >> 4);
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pclog("i440fx_write : PAM5 write %02X\n", val);
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break;
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case 0x5f: /*PAM6*/
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if ((card_i440fx[0x5f] ^ val) & 0x0f)
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i440fx_map(0xe8000, 0x04000, val & 0xf);
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if ((card_i440fx[0x5f] ^ val) & 0xf0)
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i440fx_map(0xec000, 0x04000, val >> 4);
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pclog("i440fx_write : PAM6 write %02X\n", val);
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break;
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case 0x72: /*SMRAM*/
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pclog("Write SMRAM %02x\n", val);
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val = (val & 0x78) | 2; /*SMRAM always at A0000-BFFFF*/
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val |= (card_i440fx[0x72] & 0x10); /*D_LCK can not be cleared by software*/
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if (val & 0x10) /*D_LCK locks D_OPEN and G_SMRAME*/
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{
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val &= ~0x48; /*D_OPEN is forced to 0, G_SMRAME is read only*/
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val |= (card_i440fx[0x72] & 0x08);
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}
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if ((card_i440fx[0x72] ^ val) & 0x40)
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{
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if (val & 0x40) /*SMRAM enabled*/
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{
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pclog("Enable SMRAM\n");
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mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
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}
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else
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{
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pclog("Disable SMRAM\n");
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mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
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}
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}
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break;
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}
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card_i440fx[addr] = val;
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}
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uint8_t i440fx_read(int func, int addr, void *priv)
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{
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if (func)
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return 0xff;
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return card_i440fx[addr];
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}
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static void i440fx_smram_enable(void)
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{
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if (card_i440fx[0x72] & 8)
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mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
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}
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static void i440fx_smram_disable(void)
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{
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if (card_i440fx[0x72] & 8)
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mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
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}
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void i440fx_init()
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{
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pci_add_specific(0, i440fx_read, i440fx_write, NULL);
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memset(card_i440fx, 0, 256);
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card_i440fx[0x00] = 0x86; card_i440fx[0x01] = 0x80; /*Intel*/
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card_i440fx[0x02] = 0x37; card_i440fx[0x03] = 0x12; /*82441FX*/
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card_i440fx[0x04] = 0x06; card_i440fx[0x05] = 0x00;
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card_i440fx[0x06] = 0x80; card_i440fx[0x07] = 0x02;
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card_i440fx[0x08] = 0x00; /*A0 stepping*/
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card_i440fx[0x09] = 0x00; card_i440fx[0x0a] = 0x00; card_i440fx[0x0b] = 0x06;
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card_i440fx[0x51] = 0x84; /*Uniprocessor, 66 MHz bus*/
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card_i440fx[0x53] = 0x80;
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card_i440fx[0x57] = 0x01;
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card_i440fx[0x58] = 0x10;
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card_i440fx[0x60] = card_i440fx[0x61] = card_i440fx[0x62] = card_i440fx[0x63] = card_i440fx[0x64] = 0x01;
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card_i440fx[0x71] = 0x10;
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card_i440fx[0x72] = 0x02;
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smram_enable = i440fx_smram_enable;
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smram_disable = i440fx_smram_disable;
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}
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void i440fx_reset()
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{
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i440fx_write(0, 0x59, 0xf, NULL); /*Should reset all PCI devices, but just set PAM0 to point to ROM for now*/
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}
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