]],[[off64_t n=0;]])],[has_lfs="yes"],[has_lfs="no"])
-case "$host" in
- *-*-freebsd*) # has off64_t but no fopen64/etc.
- has_lfs="no"
- ;;
-esac
-AC_MSG_RESULT($has_lfs)
#AC_MSG_CHECKING([for libz])
#AX_CHECK_ZLIB
-AM_CONDITIONAL(USE_WX, test "$enable_wx" = "yes")
-AM_CONDITIONAL(USE_NETWORKING, test "$enable_networking" = "yes")
-AM_CONDITIONAL(USE_ALSA, test "$enable_alsa" = "yes")
+AM_CONDITIONAL(OS_WIN, test "$OS" = "win")
+AM_CONDITIONAL(OS_LINUX, test "$OS" = "linux")
-AM_CONDITIONAL(HAS_OFF64T, test "$has_lfs" = "yes")
-
-SDL_VERSION=2.0.1
-AM_PATH_SDL2($SDL_VERSION,
- :,
- AC_MSG_ERROR([*** SDL version $SDL_VERSION not found!])
-)
-
-AM_OPTIONS_WXCONFIG
-reqwx=3.0.0
-AM_PATH_WXCONFIG($reqwx, wxWin=1)
-if test "$wxWin" != 1; then
- AC_MSG_ERROR([
- wxWidgets must be installed on your system.
-
- Please check that wx-config is in path, the directory
- where wxWidgets libraries are installed (returned by
- 'wx-config --libs' or 'wx-config --static --libs' command)
- is in LD_LIBRARY_PATH or equivalent variable and
- wxWidgets version is $reqwx or above.
- ])
+# Do not run test for Allegro with Win32/MinGW version, as binary builds have
+# `allegro-config' missing.
+# NOTE: For the following Autoconf macro to be supported, you need to extract
+# allegro.m4 from the DOS/Windows Allegro sources (the file is contained
+# in `misc') and copy it to this directory or MSYS's `/share/aclocal'.
+if test "$OS" != "win"; then
+ AC_CONFIG_MACRO_DIR([./])
+ AM_PATH_ALLEGRO(, , AC_MSG_ERROR(building PCem requires Allegro to be installed))
fi
-if test "$enable_alsa" == "yes"; then
- AC_CHECK_LIB(asound, snd_pcm_open,
- [],
- [echo "You need to install the ALSA library."
- exit -1])
-fi
+AC_CHECK_LIB([openal], [alGetError], [], \
+ [echo "You need to install the OpenAL library."
+ exit -1])
+AC_CHECK_LIB([alut], [alutInit], [], \
+ [echo "You need to install the ALUT library."
+ exit -1])
AC_CHECK_LIB([pthread], [pthread_create])
-build_macosx="no"
-build_linux="no"
-build_win="no"
-build_other="no"
-
-case "$host" in
- *-*-darwin*)
- LIBS="$LIBS -framework OpenGL"
- LIBS="$LIBS -framework OpenAL"
- build_macosx="yes"
- CFLAGS="$CFLAGS -DHAVE_UNISTD_H"
- ;;
- *-*-cygwin* | *-*-mingw32*)
- AC_CHECK_LIB([opengl32], [main], [], \
- [echo "You need to install the OpenGL library."
- exit -1])
- AC_CHECK_LIB([openal], [alGetError], [], \
- [echo "You need to install the OpenAL library."
- exit -1])
- build_win="yes"
- AC_SUBST(SET_MAKE, 'MAKE=mingw32-make')
- ;;
- *-*-linux*)
- AC_CHECK_LIB([GL], [glGetError], [], \
- [echo "You need to install the OpenGL library."
- exit -1])
- AC_CHECK_LIB([openal], [alGetError], [], \
- [echo "You need to install the OpenAL library."
- exit -1])
- build_linux="yes"
- CFLAGS="$CFLAGS -DHAVE_UNISTD_H"
- ;;
- *-*-freebsd*)
- CFLAGS="$CFLAGS -I/usr/local/include"
- CXXFLAGS="$CXXFLAGS -I/usr/local/include"
- LDFLAGS="$LDFLAGS -L/usr/local/lib"
- AC_CHECK_LIB([GL], [glGetError], [], \
- [echo "You need to install the OpenGL library."
- exit -1])
- AC_CHECK_LIB([openal], [alGetError], [], \
- [echo "You need to install the OpenAL library."
- exit -1])
- build_other="yes"
- CFLAGS="$CFLAGS -DHAVE_UNISTD_H"
- ;;
- *)
- AC_CHECK_LIB([GL], [glGetError], [], \
- [echo "You need to install the OpenGL library."
- exit -1])
- AC_CHECK_LIB([openal], [alGetError], [], \
- [echo "You need to install the OpenAL library."
- exit -1])
- build_other="yes"
- ;;
-esac
-
-CFLAGS="$CFLAGS $SDL_CFLAGS"
-LIBS="$LIBS $WX_LIBS $SDL_LIBS"
-
-AM_CONDITIONAL(OS_LINUX, [test "$build_linux" = "yes"])
-AM_CONDITIONAL(OS_WINDOWS, [test "$build_win" = "yes"])
-AM_CONDITIONAL(OS_OTHER, [test "$build_other" = "yes"])
-AM_CONDITIONAL(OS_MACOSX, [test "$build_macosx" = "yes"])
-
AC_OUTPUT([Makefile src/Makefile])
diff --git a/install-sh b/install-sh
old mode 100755
new mode 100644
diff --git a/nvr/aha1542c.nvr b/nvr/aha1542c.nvr
deleted file mode 100644
index f62cc4b..0000000
Binary files a/nvr/aha1542c.nvr and /dev/null differ
diff --git a/nvr/ami386dx_opti495.nvr b/nvr/ami386dx_opti495.nvr
index b6de20e..dca4bd2 100644
Binary files a/nvr/ami386dx_opti495.nvr and b/nvr/ami386dx_opti495.nvr differ
diff --git a/nvr/default/430vx.nvr b/nvr/default/430vx.nvr
deleted file mode 100644
index 17ac54e..0000000
Binary files a/nvr/default/430vx.nvr and /dev/null differ
diff --git a/nvr/default/acer386.nvr b/nvr/default/acer386.nvr
deleted file mode 100644
index 22bff6c..0000000
Binary files a/nvr/default/acer386.nvr and /dev/null differ
diff --git a/nvr/default/adgold.bin b/nvr/default/adgold.bin
deleted file mode 100644
index 566bffc..0000000
Binary files a/nvr/default/adgold.bin and /dev/null differ
diff --git a/nvr/default/aha1542c.nvr b/nvr/default/aha1542c.nvr
deleted file mode 100644
index f62cc4b..0000000
Binary files a/nvr/default/aha1542c.nvr and /dev/null differ
diff --git a/nvr/default/ami286.nvr b/nvr/default/ami286.nvr
deleted file mode 100644
index bfb993f..0000000
Binary files a/nvr/default/ami286.nvr and /dev/null differ
diff --git a/nvr/default/ami386.nvr b/nvr/default/ami386.nvr
deleted file mode 100644
index 2256301..0000000
Binary files a/nvr/default/ami386.nvr and /dev/null differ
diff --git a/nvr/default/ami386dx_opti495.nvr b/nvr/default/ami386dx_opti495.nvr
deleted file mode 100644
index b6de20e..0000000
Binary files a/nvr/default/ami386dx_opti495.nvr and /dev/null differ
diff --git a/nvr/default/ami486.nvr b/nvr/default/ami486.nvr
deleted file mode 100644
index 7055279..0000000
Binary files a/nvr/default/ami486.nvr and /dev/null differ
diff --git a/nvr/default/at.nvr b/nvr/default/at.nvr
deleted file mode 100644
index b5c94c1..0000000
Binary files a/nvr/default/at.nvr and /dev/null differ
diff --git a/nvr/default/award286.nvr b/nvr/default/award286.nvr
deleted file mode 100644
index 223aa99..0000000
Binary files a/nvr/default/award286.nvr and /dev/null differ
diff --git a/nvr/default/cmdpc30.nvr b/nvr/default/cmdpc30.nvr
deleted file mode 100644
index 3e65518..0000000
Binary files a/nvr/default/cmdpc30.nvr and /dev/null differ
diff --git a/nvr/default/dell200.nvr b/nvr/default/dell200.nvr
deleted file mode 100644
index b16f184..0000000
Binary files a/nvr/default/dell200.nvr and /dev/null differ
diff --git a/nvr/default/deskpro386.nvr b/nvr/default/deskpro386.nvr
deleted file mode 100644
index 95ab63b..0000000
Binary files a/nvr/default/deskpro386.nvr and /dev/null differ
diff --git a/nvr/default/endeavor.nvr b/nvr/default/endeavor.nvr
deleted file mode 100644
index ade1a43..0000000
Binary files a/nvr/default/endeavor.nvr and /dev/null differ
diff --git a/nvr/default/europc.nvr b/nvr/default/europc.nvr
deleted file mode 100644
index 6757695..0000000
Binary files a/nvr/default/europc.nvr and /dev/null differ
diff --git a/nvr/default/gw286ct.nvr b/nvr/default/gw286ct.nvr
deleted file mode 100644
index 8a712f9..0000000
Binary files a/nvr/default/gw286ct.nvr and /dev/null differ
diff --git a/nvr/default/hot-433.nvr b/nvr/default/hot-433.nvr
deleted file mode 100644
index 104e711..0000000
Binary files a/nvr/default/hot-433.nvr and /dev/null differ
diff --git a/nvr/default/ibmps1_2011.nvr b/nvr/default/ibmps1_2011.nvr
deleted file mode 100644
index 2029c7b..0000000
Binary files a/nvr/default/ibmps1_2011.nvr and /dev/null differ
diff --git a/nvr/default/ibmps1_2121.nvr b/nvr/default/ibmps1_2121.nvr
deleted file mode 100644
index 0501a36..0000000
Binary files a/nvr/default/ibmps1_2121.nvr and /dev/null differ
diff --git a/nvr/default/ibmps2_m50.nvr b/nvr/default/ibmps2_m50.nvr
deleted file mode 100644
index 9d63cdc..0000000
Binary files a/nvr/default/ibmps2_m50.nvr and /dev/null differ
diff --git a/nvr/default/ibmps2_m55sx.nvr b/nvr/default/ibmps2_m55sx.nvr
deleted file mode 100644
index e83ab4f..0000000
Binary files a/nvr/default/ibmps2_m55sx.nvr and /dev/null differ
diff --git a/nvr/default/ibmps2_m60.nvr b/nvr/default/ibmps2_m60.nvr
deleted file mode 100644
index 33c5fb6..0000000
Binary files a/nvr/default/ibmps2_m60.nvr and /dev/null differ
diff --git a/nvr/default/ibmps2_m65sx.nvr b/nvr/default/ibmps2_m65sx.nvr
deleted file mode 100644
index 7bee33c..0000000
Binary files a/nvr/default/ibmps2_m65sx.nvr and /dev/null differ
diff --git a/nvr/default/ibmps2_m70.nvr b/nvr/default/ibmps2_m70.nvr
deleted file mode 100644
index c4c5578..0000000
Binary files a/nvr/default/ibmps2_m70.nvr and /dev/null differ
diff --git a/nvr/default/ibmps2_m70_sec.nvr b/nvr/default/ibmps2_m70_sec.nvr
deleted file mode 100644
index 4ed6224..0000000
Binary files a/nvr/default/ibmps2_m70_sec.nvr and /dev/null differ
diff --git a/nvr/default/ibmps2_m80.nvr b/nvr/default/ibmps2_m80.nvr
deleted file mode 100644
index 4e26e24..0000000
Binary files a/nvr/default/ibmps2_m80.nvr and /dev/null differ
diff --git a/nvr/default/ibmps2_m80_sec.nvr b/nvr/default/ibmps2_m80_sec.nvr
deleted file mode 100644
index e7e171e..0000000
Binary files a/nvr/default/ibmps2_m80_sec.nvr and /dev/null differ
diff --git a/nvr/default/ibmxt286.nvr b/nvr/default/ibmxt286.nvr
deleted file mode 100644
index b5c94c1..0000000
Binary files a/nvr/default/ibmxt286.nvr and /dev/null differ
diff --git a/nvr/default/kmxc02.nvr b/nvr/default/kmxc02.nvr
deleted file mode 100644
index 0b281a8..0000000
Binary files a/nvr/default/kmxc02.nvr and /dev/null differ
diff --git a/nvr/default/megapc.nvr b/nvr/default/megapc.nvr
deleted file mode 100644
index 3892761..0000000
Binary files a/nvr/default/megapc.nvr and /dev/null differ
diff --git a/nvr/default/mr386dx_opti495.nvr b/nvr/default/mr386dx_opti495.nvr
deleted file mode 100644
index 9146987..0000000
Binary files a/nvr/default/mr386dx_opti495.nvr and /dev/null differ
diff --git a/nvr/default/pb570.nvr b/nvr/default/pb570.nvr
deleted file mode 100644
index cc21f81..0000000
Binary files a/nvr/default/pb570.nvr and /dev/null differ
diff --git a/nvr/default/pc1512.nvr b/nvr/default/pc1512.nvr
deleted file mode 100644
index b1f758b..0000000
Binary files a/nvr/default/pc1512.nvr and /dev/null differ
diff --git a/nvr/default/pc1640.nvr b/nvr/default/pc1640.nvr
deleted file mode 100644
index 7171e74..0000000
Binary files a/nvr/default/pc1640.nvr and /dev/null differ
diff --git a/nvr/default/pc200.nvr b/nvr/default/pc200.nvr
deleted file mode 100644
index fcb1cb6..0000000
--- a/nvr/default/pc200.nvr
+++ /dev/null
@@ -1 +0,0 @@
-X
\ No newline at end of file
diff --git a/nvr/default/pc2086.nvr b/nvr/default/pc2086.nvr
deleted file mode 100644
index 40f5636..0000000
Binary files a/nvr/default/pc2086.nvr and /dev/null differ
diff --git a/nvr/default/pc3086.nvr b/nvr/default/pc3086.nvr
deleted file mode 100644
index f340d66..0000000
Binary files a/nvr/default/pc3086.nvr and /dev/null differ
diff --git a/nvr/default/revenge.nvr b/nvr/default/revenge.nvr
deleted file mode 100644
index c10c53c..0000000
Binary files a/nvr/default/revenge.nvr and /dev/null differ
diff --git a/nvr/default/sis496.nvr b/nvr/default/sis496.nvr
deleted file mode 100644
index 6d35a3c..0000000
Binary files a/nvr/default/sis496.nvr and /dev/null differ
diff --git a/nvr/default/spc4200p.nvr b/nvr/default/spc4200p.nvr
deleted file mode 100644
index e1602c2..0000000
Binary files a/nvr/default/spc4200p.nvr and /dev/null differ
diff --git a/nvr/default/spc4216p.nvr b/nvr/default/spc4216p.nvr
deleted file mode 100644
index f1ab56d..0000000
Binary files a/nvr/default/spc4216p.nvr and /dev/null differ
diff --git a/nvr/default/tandy1000hx.bin b/nvr/default/tandy1000hx.bin
deleted file mode 100644
index e69de4f..0000000
Binary files a/nvr/default/tandy1000hx.bin and /dev/null differ
diff --git a/nvr/default/tandy1000sl2.bin b/nvr/default/tandy1000sl2.bin
deleted file mode 100644
index e69de4f..0000000
Binary files a/nvr/default/tandy1000sl2.bin and /dev/null differ
diff --git a/nvr/default/win486.nvr b/nvr/default/win486.nvr
deleted file mode 100644
index 9722138..0000000
Binary files a/nvr/default/win486.nvr and /dev/null differ
diff --git a/nvr/ibmps2_m50.nvr b/nvr/ibmps2_m50.nvr
deleted file mode 100644
index 9d63cdc..0000000
Binary files a/nvr/ibmps2_m50.nvr and /dev/null differ
diff --git a/nvr/ibmps2_m55sx.nvr b/nvr/ibmps2_m55sx.nvr
deleted file mode 100644
index e83ab4f..0000000
Binary files a/nvr/ibmps2_m55sx.nvr and /dev/null differ
diff --git a/nvr/ibmps2_m80.nvr b/nvr/ibmps2_m80.nvr
deleted file mode 100644
index 4e26e24..0000000
Binary files a/nvr/ibmps2_m80.nvr and /dev/null differ
diff --git a/nvr/ibmps2_m80_sec.nvr b/nvr/ibmps2_m80_sec.nvr
deleted file mode 100644
index e7e171e..0000000
Binary files a/nvr/ibmps2_m80_sec.nvr and /dev/null differ
diff --git a/readme.html b/readme.html
deleted file mode 100644
index 8694110..0000000
--- a/readme.html
+++ /dev/null
@@ -1,1467 +0,0 @@
-
-
-
- readme
-
-
-
-
-
-
-Latest version: v17 Changelog
-PCem is licensed under GPL v2.0, see COPYING for more details.
-You can submit patches on our forum . Before you do, please note the guidelines for submitting patches.
-❗ Note: NO COPYRIGHTED ROM FILES ARE INCLUDED NOR WILL THEY BE. PLEASE DO NOT ASK FOR THEM.
-BSD and Linux supplement (v17)
-You will need the following libraries (and their dependencies):
-
-SDL2
-wxWidgets 3.x
-OpenAL
-
-Open a terminal window, navigate to the PCem directory then enter:
-Linux
-./configure --enable-release
-makeBSD
-./configure --enable-release-build
-gmakethen ./pcem to run.
-The Linux/BSD versions store BIOS ROM images, configuration files, and other data in ~/.pcem
-configure options are :
- --enable-release-build : Generate release build. Recommended for regular use.
- --enable-debug : Compile with debugging enabled.
- --enable-networking : Build with networking support.
- --enable-alsa : Build with support for MIDI output through ALSA. Requires libasound.The menu is a pop-up menu in the Linux/BSD port. Right-click on the main window when mouse is not captured.
-CD-ROM support currently only accesses /dev/cdrom. It has not been heavily tested.
-Links
-PCem emulates the following hardware (as of v17):
-
-
-
-Systems
-8088 based
-
-
-
-
-
-
-1981
-IBM PC ibmpc/pc102782.bin
-
-
-1983
-Compaq Portable Plus compaq_pip/Compaq Portable Plus 100666-001 Rev C.bin
-
-
-1983
-IBM XT ibmxt/5000027.u19
-
-
-1983
-Leading Edge Model M leadingedge_modelm/Leading Edge - Model M - BIOS ROM - Version 4.71.bin
-
-
-1984
-IBM PCjr [5] ibmpcjr/bios.rom
-
-
-1984
-Tandy 1000 [5] tandy/tandy1t1.020
-
-
-1985
-NCR PC4i ncr_pc4i/NCR_PC4i_BIOSROM_1985.BIN
-
-
-1986
-DTK Clone XT dtk/dtk_erso_2.42_2764.bin
-
-
-1986
-Phoenix XT clone pxxt/000p001.bin
-
-
-1987
-Tandy 1000HX tandy1000hx/v020000.u12
-
-
-1987
-Thomson TO16 PC to16_pc/TO16_103.bin
-
-
-1987
-Toshiba T1000 [1] [5] t1000/t1000.rom
-
-
-1987
-VTech Laser Turbo XT ltxt/27c64.bin
-
-
-1987
-Zenith Data SupersPort zdsupers/z184m v3.1d.10d
-
-
-1988?
-©Anonymous Generic Turbo XT BIOS genxt/pcxt.rom
-
-
-1988
-Atari PC3 ataripc3/AWARD_ATARI_PC_BIOS_3.08.BIN
-
-
-1988
-Juko XT clone jukopc/000o001.bin
-
-
-1988
-Schneider Euro PC europc/50145
-
-
-1989
-AMI XT clone amixt/ami_8088_bios_31jan89.bin
-
-
-2015
-Xi8088 xi8088/bios-xi8088.bin
-
-
-
-8086 based
-
-
-
-
-
-
-1984
-Compaq Deskpro deskpro/Compaq - BIOS - Revision J - 106265-002.bin
-
-
-1984
-Olivetti M24 [5] olivetti_m24/olivetti_m24_version_1.43_low.bin
-
-
-1986
-Amstrad PC1512 [5] pc1512/40043.v1
-
-
-1987
-Amstrad PC1640 [5] pc1640/40043.v3
-
-
-1987
-Toshiba T1200 [1] [5] t1200/t1200_019e.ic15.bin
-
-
-1988
-Amstrad PPC512/640 [5] ppc512/40107.v2
-
-
-1988
-Sinclair PC200/Amstrad PC20 [5] pc200/pc20v2.0
-
-
-1988
-VTech Laser XT3 lxt3/27c64d.bin
-
-
-1989
-Amstrad PC2086 [5] pc2086/40179.ic129
-
-
-1989
-Tandy 1000SL/2 [5] tandy1000sl2/8079047.hu1
-
-
-1990
-Amstrad PC3086 [5] pc3086/fc00.bin
-
-
-1991
-Amstrad PC5086 pc5086/sys_rom.bin
-
-
-
-286 based
-
-
-
-
-
-
-1984
-IBM AT ibmat/at111585.0
-
-
-1986
-Compaq Portable II compaq_pii/109739-001.rom
-
-
-1986
-IBM XT Model 286 ibmxt286/BIOS_5162_21APR86_U34_78X7460_27256.BIN
-
-
-1986
-Toshiba T3100e [1] [5] t3100e/t3100e_font.bin
-
-
-1987
-IBM PS/2 Model 50 [5] i8550021/90x7420.zm13
-
-
-1988
-Bull Micral 45 bull_micral_45/even.fil
-
-
-1988
-Commodore PC30-III cmdpc30/commodore pc 30 iii even.bin
-
-
-1988
-IBM PS/2 Model 30-286 ibmps2_m30_286/33f5381a.bin
-
-
-1989
-Epson PC AX epson_pcax/EVAX
-
-
-1989
-Epson PC AX2e epson_pcax2e/EVAX
-
-
-1990
-AMI 286 clone ami286/amic206.bin
-
-
-1990
-Award 286 clone award286/award.bin
-
-
-1990
-Dell System 200 dells200/dell0.bin
-
-
-1990
-IBM PS/1 Model 2011 [5] ibmps1/f80000.bin
-
-
-?
-Goldstar GDC-212M gdc212m/gdc212m_72h.bin
-
-
-?
-GW-286CT GEAR gw286ct/2ctc001.bin
-
-
-?
-Hyundai Super-286TR super286tr/award.bin
-
-
-?
-Samsung SPC-4200P spc4200p/u8.01
-
-
-?
-Samsung SPC-4216P spc4216p/phoenix.binor
-
-
-?
-Samsung SPC-4620P spc4620p/31005h.u8
-
-
-?
-Tulip AT Compact tulip_tc7/tc7be.bin
-
-
-
-386 based
-
-
-
-
-
-
-1987
-IBM PS/2 Model 80 [5] i8580111/15f6637.bin
-
-
-1988
-ECS 386/32 ecs386_32/386_32_even.bin
-
-
-1989
-IBM PS/2 Model 70 (type 3) [5] ibmps2_m70_type3/70-a_even.bin
-
-
-1989
-Compaq Deskpro 386 deskpro386/109592-005.u11.bin
-
-
-1989
-Epson PC AX3 epson_pcax3/EVAX3
-
-
-1989
-IBM PS/2 Model 55SX i8555081/33f8146.zm41
-
-
-1990
-DTK 386SX clone dtk386/3cto001.bin
-
-
-1990
-IBM PS/1 Model 2121 [5] ibmps1_2121/fc0000.bin
-
-
-1990
-Samsung SPC-6000A spc6000a/3c80.u27
-
-
-1992
-Acermate 386SX/25N [5] acer386/acer386.bin
-
-
-1992
-Amstrad MegaPC [2] [5] megapc/41651-bios lo.u18
-
-
-1992
-Commodore SL386SX-25 [5] cbm_sl386sx25/f000.bin
-
-
-1992
-Packard Bell Legend 300SX pb_l300sx/pb_l300sx.bin
-
-
-1992
-Samsung SPC-6033P spc6033p/phoenix.bin
-
-
-1994
-AMI 386DX clone ami386dx/opt495sx.ami
-
-
-1994
-AMI 386SX clone ami386/ami386.bin
-
-
-1994
-MR 386DX clone mr386dx/opt495sx.mr
-
-
-?
-KMX-C-02 kmxc02/3ctm005.bin
-
-
-
-486 based
-
-
-
-
-
-
-1990
-IBM PS/2 Model 70 (type 4) [3] 486DX at 25 MHzibmps2_m70_type3/70-a_even.bin
-
-
-1993
-AMI 486 clone 486 at 16-66 MHzami486/ami486.bin
-
-
-1993
-Elonex PC-425X [5] 486SX at 25 MHzelx_pc425x/elx_pc425x.binor
-
-
-1993
-IBM PS/1 Model 2133 (EMEA 451) 486SX at 25 MHzibmps1_2133/PS1_2133_52G2974_ROM.bin
-
-
-1993
-Packard Bell PB410A [5] 486 at 25-120 MHzAm5x86 at 133-160 MHzCx5x86 at 100-133 MHzPentium Overdrive at 63-83 MHzpb410a/PB410A.080337.4ABF.U25.bin
-
-
-1994
-AMI WinBIOS 486 clone 486 at 16-66 MHzwin486/ali1429g.amw
-
-
-1995
-Award SiS 496/497 486 at 16-120 MHzAm5x86 at 133-160 MHzCx5x86 at 100-133 MHzPentium Overdrive at 63-83 MHzsis496/sis496-1.awa
-
-
-
-Pentium based
-
-
-
-
-
-
-1994
-Intel Premiere/PCI (Batman's Revenge) Pentium at 60-66 MHzPentium Overdrive at 120-133 MHzrevenge/1009af2_.bi0
-
-
-1995
-Intel Advanced/EV (Endeavor) [4] Pentium at 75-133 MHzPentium Overdrive at 125-200 MHzendeavor/1006cb0_.bi0
-
-
-1995
-Intel Advanced/ZP (Zappa) Pentium at 75-133 MHzPentium Overdrive at 125-200 MHzzappa/1006bs0_.bio
-
-
-1995
-Packard Bell PB520R (Robin LC) [5] Pentium at 60-66 MHzPentium Overdrive at 120-133 MHzpb520r/1009bc0r.bio
-
-
-1995
-Packard Bell PB570 (Hillary) [5] Pentium at 75-133 MHzPentium Overdrive at 125-200 MHzpb570/1007by0r.bio
-
-
-1996
-ASUS P/I-P55TVP4 Pentium at 75-200 MHzPentium MMX at 166-233 MHzMobile Pentium MMX at 120-300 MHzCyrix 6x86 at PR90(80 MHz) -PR200(200 MHz) Cyrix 6x86MX/MII at PR166(133 MHz) -PR400(285 MHz) IDT WinChip at 75-240 MHzIDT Winchip 2 at 200-240 MHzIDT Winchip 2A at 200-233 MHzAMD K6 at 166-300 MHzAMD K6-2 (AFR-66) at 233-300 MHzp55tvp4/tv5i0204.awd
-
-
-1996
-ASUS P/I-P55T2P4 Pentium at 75-200 MHzPentium MMX at 166-233 MHzMobile Pentium MMX at 120-300 MHzCyrix 6x86 at PR90(80 MHz) -PR200(200 MHz) Cyrix 6x86MX/MII at PR166(133 MHz) -PR400(285 MHz) IDT WinChip at 75-240 MHzIDT Winchip 2 at 200-240 MHzIDT Winchip 2A at 200-233 MHzAMD K6 at 166-300 MHzAMD K6-2 (AFR-66) at 233-300 MHzp55t2p4/0207_j2.bin
-
-
-1996
-Award 430VX PCI Pentium at 75-200 MHzPentium MMX at 166-233 MHzMobile Pentium MMX at 120-300 MHzCyrix 6x86 at PR90(80 MHz) -PR200(200 MHz) Cyrix 6x86MX/MII at PR166(133 MHz) -PR400(285 MHz) IDT WinChip at 75-240 MHzIDT Winchip 2 at 200-240 MHzIDT Winchip 2A at 200-233 MHzAMD K6 at 166-300 MHzAMD K6-2 (AFR-66) at 233-300 MHz430vx/55xwuq0e.bin
-
-
-1996
-Itautec Infoway Multimidia Pentium at 75-133 MHzPentium Overdrive at 125-200 MHzinfowaym/1006bs0_.bio
-
-
-1997
-Epox P55-VA Pentium at 75-200 MHzPentium MMX at 166-233 MHzMobile Pentium MMX at 120-300 MHzCyrix 6x86 at PR90(80 MHz) -PR200(200 MHz) Cyrix 6x86MX/MII at PR166(133 MHz) -PR400(285 MHz) IDT WinChip at 75-240 MHzIDT Winchip 2 at 200-240 MHzIDT Winchip 2A at 200-233 MHzAMD K6 at 166-300 MHzAMD K6-2 (AFR-66) at 233-300 MHzp55va/va021297.bin
-
-
-
-Super Socket 7 based
-
-
-
-
-
-
-1998
-FIC VA-503+ AMD K6 at 166-300 MHzAMD K6-2 at 233-550 MHzAMD K6-2+ at 450-550 MHzAMD K6-III at 400-450 MHzAMD K6-III+ at 400-500 MHzPentium at 75-200 MHzPentium MMX at 166-233 MHzMobile Pentium MMX at 120-300 MHzCyrix 6x86 at PR90(80 MHz) -PR200(200 MHz) Cyrix 6x86MX/MII at PR166(133 MHz) -PR400(285 MHz) IDT WinChip at 75-240 MHzIDT WinChip2 at 200-250 MHzIDT Winchip 2A at PR200(200 MHz) -PR300(250 MHz) fic_va503p/je4333.bin
-
-
-
-Socket 8 based
-
-
-
-
-
-
-1996
-Intel VS440FX Pentium Pro at 150-200 MHzPentium II Overdrive at 300-333 MHzvs440fx/1018CS1_.BI1
-
-
-
-Slot 1 based
-
-
-
-
-
-
-1998
-Gigabyte GA-686BX Pentium II at 233-450 MHzCeleron at 266-533 MHzCyrix III at 500 MHzga686bx/6BX.F2a
-
-
-
-Additional Notes
-[1]Toshiba Button Mapping : PCem maps [Fn] to right-Ctrl and right-Alt. The following functions are supported: Key Combo | Function ---|--- Fn + Num Lock | toggle numpad Fn + Home | Internal LCD display Fn + Page Down | Turbo on Fn + Right | Toggle LCD font Fn + End | External CRT display Fn + SysRQ | Toggle window
-[2]Amstrad MegaPC (386SX) : The original machine had a built-in Sega MegaDrive. This is not emulated in PCem.
-[3]IBM PS/2 Model 70 (type 4) (486DX) : PCem's FPU emulation is not bit accurate and can not pass IBM's floating point tests. As a result, this machine will always print 12903 and 162 errors on bootup. These can be ignored - F1 will boot the machine.
-[4]Intel Advanced/EV (Endeavor) (Pentium) : The real board has a Sound Blaster 16 onboard and optionally an S3 Trio64V+. Neither are emulated as onboard devices.
-[5]** = Can use external video card.
-
-
-
-
-
-
-Amstrad MegaPC Paradise 90C11
-A development of the PVGA1 with 512KB VRAM
-✔
-
-
-Acer 386SX/25N Oak OTI-067
-Another 512KB SVGA clone
-✔
-
-
-Amstrad PC1512 CGA
-Has a new mode (640x200x16)
-X
-
-
-Amstrad PC1640 Paradise EGA
-
-✔
-
-
-Amstrad PC2086/PC3086 Paradise PVGA1
-An early SVGA clone with 256KB VRAM
-✔
-
-
-Amstrad PPC512/640 CGA/MDA
-Outputs to 640x200 plasma display
-✔
-
-
-Commodore SL386SX-25 AVGA2
-256KB - 512KB VRAM
-X
-
-
-Elonex PC-425X Trident TGUI9400CXi
-512KB VRAM
-X
-
-
-IBM PCjr CGA
-Has various new modes:
-X
-
-
-IBM PS/1 Model 2011 Stock VGA
-256KB VRAM
-X
-
-
-IBM PS/1 Model 2121 Basic (and unknown) SVGA
-256KB VRAM
-X
-
-
-IBM PS/2 machines Stock VGA
-256KB VRAM
-X
-
-
-Olivetti M24 [6] CGA
-Has double-res text modes + 640x400 mode
-X
-
-
-Packard Bell PB410A Headland HT-216
-
-✔
-
-
-Packard Bell PB520R Cirrus Logic GD-5434
-
-✔
-
-
-Packard Bell PB570 Cirrus Logic GD-5430
-
-✔
-
-
-Sinclair PC200 CGA
-Can output to TV @ 50hz (UK)
-✔
-
-
-Tandy 1000 Clone of PCjr video
-Widely supported in 80s games
-X
-
-
-Tandy 1000 SL/2 Improved Tandy 1000
-Has support for 640x200x16
-X
-
-
-Toshiba T-series CGA
-Outputs to built-in LCD or plasma display
-X
-
-
-
-[6]Olivetti M24 (display) : I haven't seen a dump of the font ROM for this yet, so if one is not provided the MDA font will be used - which looks slightly odd as it is 14-line instead of 16-line.
-Graphics Cards
-Basic cards
-
-
-
-
-
-
-MDA (1981) 80x25 monochrome text
-(none)
-
-CGA (1981) 40x25 and 80x25 text
-(none)
-
-Hercules (1982) 80x25 monochrome text
-(none)
-
-Plantronics ColorPlus An enhanced CGA board with support for 320x200x16 and 640x200x4
-(none)
-
-Wyse WY-700 A CGA-compatible board with support for a 1280x800 mode
-(none)
-
-MDSI Genius Mono portrait board with support for a 728x1008 mode
-8x12.bin
-
-
-IBM EGA (1984) Text up to 80x43
-ibm_6277356_ega_card_u44_27128.bin
-
-
-ATI EGA Wonder 800+ An enhanced EGA-compatible board with support for up to 800x600 in 16 colours
-ATI EGA Wonder 800+ N1.00.BIN
-
-
-Hercules InColor An enhanced Hercules with a custom 720x350 16 colour mode
-(none)
-
-
-Unaccelerated (S)VGA cards
-
-
-
-
-
-
-ATI Korean VGA ATI-28800 based.
-atikorvga.bin
-
-
-ATI VGA Edge-16 ATI-18800 based
-vgaedge16.vbi
-
-
-ATI VGA Charger ATI-28800 based
-bios.bin
-
-
-AVGA2 Also known as Cirrus Logic GD5402
-avga2vram.vbi
-
-
-IBM VGA (1987) 256KB VRAM
-ibm_vga.bin
-
-
-Kasan Hangulmadang-16 ET4000AX based
-et4000_kasan16.bin
-
-
-OAK OTI-037C 256KB VRAM
-oti037/bios.bin
-
-
-OAK OTI-067 256KB - 512KB VRAM
-oti067/bios.bin
-
-
-Olivetti GO481 (Paradise PVGA1A) 256KB VRAM
-oli_go481_lo.bin
-
-
-Trident 8900D SVGA 256KB - 1MB VRAM
-trident.bin
-
-
-Trident 9000B SVGA 512KB VRAM
-tvga9000b/BIOS.BIN
-
-
-Trident TGUI9400CXi 1MB - 2MB VRAM
-9440.vbi
-
-
-Trigem Korean VGA ET4000AX based
-tgkorvga.bin
-
-
-Tseng ET4000AX SVGA 1MB VRAM
-et4000.bin
-
-
-
-2D Accelerated SVGA cards
-
-
-
-
-
-
-ATI Graphics Pro Turbo Mach64GX based
-mach64gx/bios.bin
-
-
-ATI Video Xpression Mach64VT2 based
-atimach64vt2pci.bin
-
-
-Cirrus Logic GD-5428 1MB - 2MB VRAM
-Machspeed_VGA_GUI_2100_VLB.vbi
-
-
-Cirrus Logic GD-5429 1MB - 2MB VRAM
-5429.vbi
-
-
-Cirrus Logic GD-5430 1MB - 2MB VRAM
-gd5430/pci.bin
-
-
-Cirrus Logic GD-5434 [1] 2MB - 4MB VRAM
-gd5434.bin
-
-
-Diamond Stealth 32 SVGA ET4000/W32p based
-et4000w32.bin
-
-
-IBM 1MB SVGA Adapter/A Cirrus Logic GD5428 based
-SVGA141.ROM
-
-
-Number Nine 9FX S3 Trio64 based
-s3_764.bin
-
-
-Paradise Bahamas 64 S3 Vision864 based
-bahamas64.bin
-
-
-Phoenix S3 Trio32 S3 Trio32 based
-86c732p.bin
-
-
-Phoenix S3 Trio64 S3 Trio64 based
-86c764x1.bin
-
-
-Trident TGUI9440 1MB - 2MB VRAM
-9440.vbi
-
-
-
-3D Accelerated SVGA cards
-
-
-
-
-
-
-3DFX Voodoo Banshee (reference) Voodoo Banshee based
-pci_sg.rom
-
-
-3DFX Voodoo 3 2000 Voodoo 3 based
-voodoo3_2000/2k11sd.rom
-
-
-3DFX Voodoo 3 3000 Voodoo 3 based
-voodoo3_3000/3k12sd.rom
-
-
-Creative Labs 3D Blaster Banshee Voodoo Banshee based
-blasterpci.rom
-
-
-Diamond Stealth 3D 2000 [2] S3 ViRGE/325 based
-s3virge.bin
-
-
-S3 ViRGE/DX [3] S3 ViRGE/DX based
-86c375_1.bin
-
-
-
-3D only cards
-
-
-
-
-
-
-3DFX Voodoo Graphics [4] 3D accelerator. Widely supported in late 90s games.
-
-
-Obsidian SB50 [5] Voodoo with 2 TMUs
-
-
-3DFX Voodoo 2 [6] Improved Voodoo Graphics
-
-
-
-Additional Notes
-[1]Cirrus Logic GD-5434 : Real chip also supports 1MB configurations, however this is not currently supported in PCem.
-[2]Diamond Stealth 3D 2000 : PCem emulates the ViRGE S3D engine in software. This works with most games I tried, but there may be some issues. The Direct3D drivers for the /325 are fairly poor (often showing as missing triangles), so use of the /DX instead is recommended.
-[3]S3 ViRGE/DX : The drivers that come with Windows are similar to those for the /325, however better ones do exist (try the 8-21-1997 version). With the correct drivers, many early Direct3D games work okay (if slowly).
-[4]3DFX Voodoo Graphics : PCem emulates this in software. The emulation is a lot faster than in v10 (thanks to a new dynamic recompiler) and should be capable of hitting Voodoo 1 performance on most machines when two render threads are used. As before, the emulated CPU is the bottleneck for most games.
-[5]Obsidian SB50 : Drivers for this are a bit limited - the official drivers don't support 2 TMUs in Direct3D.
-[6]3DFX Voodoo 2 : PCem can emulate both 8 and 12 MB configurations. It can also emulate 6 and 10 MB configurations (with 2MB framebuffer memory), which were never sold into the PC market but do exist for arcade systems.
-Sound Cards
-
-
-
-
-
-
-PC speaker The standard beeper on all PCs. Supports samples/RealSound.
-
-
-Tandy PSG The Texas Instruments chip in the PCjr and Tandy 1000. Supports 3 voices plus noise. I reused the emulator in B-em for this (slightly modified). PCem emulates the differences between the SN76496 (PCjr and Tandy 1000), and the NCR8496 (currently assigned to the Tandy 1000HX). Maniac Mansion and Zak McKraken will only sound correct on the latter.
-
-
-Tandy PSSJ Used on the Tandy 1000SL/2, this clones the NCR8496, adding an addition frequency divider (did any software actually use this?) and an 8-bit DAC.
-
-
-PS/1 audio card An SN76496 clone plus an 8-bit DAC. The SN76496 isn't at the same address as PCjr/Tandy, so most software doesn't support it.
-
-
-Gameblaster The Creative Labs Gameblaster/Creative Music System, Creative's first sound card introduced in 1987. Has two Philips SAA1099, giving 12 voices of square waves plus 4 noise voices. In stereo!
-
-
-Adlib Has a Yamaha YM3812, giving 9 voices of 2 op FM, or 6 voices plus a rhythm section. PCem uses the DOSBox dbopl emulator.
-
-
-Adlib Gold OPL3 with YM318Z 12-bit digital section. Possibly some bugs (not a lot of software to test). The surround module is now emulated.
-
-
-Sound Blaster [1] See linked note for more details.
-
-
-Gravis Ultrasound 32 voice sample playback. Port address is fixed to 240, IRQ and DMA can be changed from the drivers. Emulation is improved significantly over previous versions.
-
-
-Windows Sound System 16-bit digital + OPL3. Note that this only emulates WSS itself, and should not be used with drivers from compatible boards with additional components (eg Turtle Beach Monte Carlo)
-
-
-Aztech Sound Galaxy Pro 16 AB (Washington) SB compatible + WSS compatible
-
-
-Innovation SSI-2001 SID6581. Emulated using resid-fp. Board is fixed to port 280.
-
-
-Ensoniq AudioPCI (ES1371) Basic PCI sound card. Emulates Sound Blaster in software.
-
-
-
-Additional Notes
-[1]Sound Blaster : Several Sound Blasters are emulated.
-
-SB v1.0 - The original. Limited to 22khz, and no auto-init DMA (can cause crackles sometimes).
-SB v1.5 - Adds auto-init DMA
-SB v2.0 - Upped to 41khz
-SB Pro v1.0 - Stereo with twin OPL2 chips.
-SB Pro v2.0 - Stereo with OPL 3 chip
-SB 16 - 16 bit stereo
-SB AWE32 - SB 16 + wavetable MIDI. This requires a ROM dump from a real AWE32.
-
-All cards are set to Address 220, IRQ 7 and DMA 1 (and High DMA 5). IRQ and DMA can be changed for the SB16 & AWE32 in the drivers. The relevant SET line for autoexec.bat is SET BLASTER = A220 I7 D1 Tx - where Tx is T1 for SB v1.0, T3 for SB v2.0, T4 for SB Pro, and T6 for SB16.
-AWE32 requires a ROM dump called awe32.raw. AWE-DUMP is a utility which can get a dump from a real card. Most EMU8000 functionality should work, however filters are not correct and reverb/chorus effects are not currently emulated.
-HDD Controller Cards
-
-
-
-
-
-
-MFM
-Fixed Disk Adapter (Xebec) MFM controller originally included in the IBM XT. This controller only supports HD types 0, 2, 13, and 16.
-ibm_xebec_62x0822_1985.bin
-
-
-MFM
-DTC 5150X 8-bit MFM controller.DEBUG.EXE and enter g=c800:5.
-dtc_cxd21a.bin
-
-
-MFM
-AT Fixed Disk Adapter MFM controller originally included in the IBM AT. Supported by all AT-compatible BIOSes.
-(none)
-
-ESDI
-Western Digital WD1007V-SE1 16-bit ESDI controller
-62-000279-061.bin
-
-
-ESDI
-IBM ESDI Fixed Disk Controller MCA ESDI controller. Only supported on PS/2 models.
-90x8969.bin
-
-
-IDE
-Standard IDE Standard IDE controller. Supported by all AT-compatible BIOSes. Use this if in any doubt!
-(none)
-
-IDE
-XTIDE 8-bit IDE controller. The BIOS is available here .
-ide_xt.bin
-
-
-IDE
-XTIDE (AT) 16-bit IDE controller.
-ide_at.bin
-
-
-IDE
-XTIDE (PS/1) IDE controller for the PS/1 model 2033. For this machine you will need BIOS version v1.1.5. The PS/1 is a bit fussy with XTIDE, and I've found that it works best when the XTIDE configuration has 'Full Operating Mode' disabled.
-ide_at_1_1_5.bin
-
-
-SCSI
-Longshine LCS-6821N 8-bit SCSI controller.
-Longshine LCS-6821N - BIOS version 1.04.bin
-
-
-SCSI
-Rancho RT1000B 8-bit SCSI controller.
-Rancho_RT1000_RTBios_version_8.10R.bin
-
-
-SCSI
-Trantor T130B 8-bit SCSI controller.
-trantor_t130b_bios_v2.14.bin
-
-
-SCSI
-IBM SCSI Adapter with Cache MCA SCSI controller. Only supported on PS/2 models.
-92F2244.U68
-
-
-SCSI
-Adaptec AHA-1542C 16-bit SCSI controller.
-adaptec_aha1542c_bios_534201-00.bin
-
-
-SCSI
-BusLogic BT-545S 16-bit SCSI controller.
-BusLogic_BT-545S_U15_27128_5002026-4.50.bin
-
-
-
-Misc Cards
-
-
-
-
-
-
-Serial mouse
-A Microsoft compatible serial mouse on COM1. Compatible drivers are all over the place for this.
-
-
-M24 mouse
-I haven't seen a DOS mouse driver for this yet but the regular scancode mode works as does the Windows 1.x driver.
-
-
-PC1512 mouse
-The PC1512's perculiar quadrature mouse. You need Amstrad's actual driver for this one.
-
-
-PS/2 mouse
-A standard 2 button PS/2 mouse. As with serial, compatible drivers are common.
-
-
-Microsoft PS/2 Intellimouse
-A PS/2 mouse with mouse wheel.
-
-
-ATAPI CD-ROM
-Works with OAKCDROM.SYS, VDD-IDE.SYS, and the internal drivers of every OS I've tried.
-
-
-
-
-
diff --git a/readme.txt b/readme.txt
new file mode 100644
index 0000000..95b22e3
--- /dev/null
+++ b/readme.txt
@@ -0,0 +1,894 @@
+PCem v12
+
+PCem is licensed under the GPL, see COPYING for more details.
+
+Changes since v11:
+
+- New machines added - AMI 386DX, MR 386DX
+- New graphics cards - Plantronics ColorPlus, Wyse WY-700, Obsidian SB50, Voodoo 2
+- CPU optimisations - up to 50% speedup seen
+- 3DFX optimisations
+- Improved joystick emulation - analogue joystick up to 8 buttons, CH Flightstick Pro, ThrustMaster FCS, SideWinder pad(s)
+- Mouse can be selected between serial, PS/2, and IntelliMouse
+- Basic 286/386 prefetch emulation - 286 & 386 performance much closer to real systems
+- Improved CGA/PCjr/Tandy composite emulation
+- Various bug fixes
+
+
+PCem emulates the following machines:
+
+IBM 5150 PC (1981)
+The original PC. This shipped in 1981 with a 4.77mhz 8088, 64k of RAM, and a cassette port.
+Disc drives quickly became standard, along with more memory.
+
+ROM files needed:
+
+ibmpc\pc102782.bin
+ibmpc\basicc11.f6
+ibmpc\basicc11.f8
+ibmpc\basicc11.fa
+ibmpc\basicc11.fc
+
+
+IBM 5160 XT (1983)
+From a hardware perspective, this is a minor tweak of the original PC. It originally shipped
+with 128k of RAM and a 10mb hard disc, both of which could be easily fitted to the 1981 machine.
+However, this was targetted as businesses and was more successful than the original.
+
+ROM files needed:
+
+ibmxt\5000027.u19
+ibmxt\1501512.u18
+
+
+IBM PCjr (1984)
+A home machine, which had better graphics and sound than most XTs but was not hardware compatible
+with the PC.
+
+ROM files needed:
+
+ibmpcjr\bios.rom
+
+
+IBM AT (1984)
+This was the 'next generation' PC, fully 16-bit with an 80286. The original model came with a 6mhz
+286, which ran three times as fast as the XT. This model also introduced EGA.
+
+ROM files needed:
+
+ibmat\at111585.0
+ibmat\at111585.1
+
+
+Olivetti M24 (1984)
+An enhanced XT clone, also known as the AT&T PC 6300. Has an 8086 CPU, and an unusual 'double-res'
+CGA display.
+
+ROM files needed:
+
+olivetti_m24\olivetti_m24_version_1.43_low.bin
+olivetti_m24\olivetti_m24_version_1.43_high.bin
+
+
+Tandy 1000 (1984)
+This is a clone of the unsuccessful IBM PCjr, which added better graphics and sound to the XT,
+but removed much expandability plus some other hardware (such as the DMA controller). The Tandy
+puts back the DMA controller and ISA slots, making it a much more useful machine. Many games
+from the late 80s support the Tandy.
+
+ROM files needed:
+
+tandy\tandy1t1.020
+
+
+Tandy 1000HX (1987)
+A Tandy 1000 with a faster 7.16 MHz 8088, and DOS in ROM.
+
+ROM files needed:
+
+tandy1000hx\v020000.u12
+
+
+Tandy 1000SL/2 (1989)
+An enhanced Tandy 1000 with a 9.54 MHz 8086, and enhanced graphics and sound.
+
+ROM files needed:
+
+tandy1000sl2\8079047.hu1
+tandy1000sl2\8079048.hu2
+
+
+DTK Clone XT (1986)
+A generic clone XT board.
+
+ROM files needed:
+
+dtk\dtk_erso_2.42_2764.bin
+
+
+Amstrad PC1512 (1986)
+This was Amstrad's first entry into the PC clone market (after the CPC and PCW machines), and
+was the first cheap PC available in the UK, selling for only 500. It was a 'turbo' clone,
+having an 8mhz 8086, as opposed to an 8088, and had 512k RAM as standard. It also had a
+perculiar modification to its onboard CGA controller - the 640x200 mode had 16 colours instead
+of the usual 2. This was put to good use by GEM, which shipped with the machine.
+
+Amstrad's CGA implementation has a few oddities, these are emulated as best as possible. This
+mainly affects games defining unusual video modes, though 160x100x16 still works (as on the real
+machine).
+
+ROM files needed:
+
+pc1512\40043.v1
+pc1512\40044.v2
+pc1512\40078.ic127
+
+
+Amstrad PC1640 (1987)
+Amstrad's followup to the PC1512, the PC1640 had 640k of RAM and onboard EGA, but was otherwise
+mostly the same.
+
+ROM files needed:
+
+pc1640\40043.v3
+pc1640\40044.v3
+pc1640\40100
+
+
+Sinclair PC200/Amstrad PC20 (1988)
+This was Amstrad's entry to the 16-bit home computer market, intended to compete with the Atari
+ST and Commodore Amiga. It's similar to the PC1512, but is based on Amstrad's portable PPC512
+system. With stock CGA and PC speaker, it couldn't compare with the ST or Amiga.
+
+ROM files needed:
+
+pc200\pc20v2.0
+pc200\pc20v2.1
+pc200\40109.bin
+
+
+Schneider Euro PC (1988)
+A German XT clone. An 'all-in-one' system like the Sinclair PC200. I don't know much about this
+machine to be honest! This doesn't appear to work with the XTIDE BIOS, so therefore this is the
+only model that does not support hard discs.
+
+ROM files needed:
+
+europc\50145
+europc\50146
+
+
+(c)Anonymous Generic Turbo XT BIOS (1988?)
+This is a BIOS whose source code was made available on Usenet in 1988. It appears to be an
+anonymous BIOS from an XT clone board. It was then heavily modified to fix bugs. The history of
+this BIOS (and the source code) is at http://dizzie.narod.ru/bios.txt
+
+ROM files needed:
+
+genxt\pcxt.rom
+
+
+AMI XT clone (1989)
+
+ROM files needed:
+
+amixt\ami_8088_bios_31jan89.bin
+
+
+DTK XT clone (1988)
+
+ROM files needed:
+
+dtk\dtk_erso_2.42_2764.bin
+
+
+VTech Laser Turbo XT (1987)
+
+ROM files needed:
+
+ltxt\27c64.bin
+
+
+VTech Laser XT3 (1989)
+
+ROM files needed:
+
+lxt3\27c64d.bin
+
+
+Phoenix XT clone (1986)
+
+ROM files needed:
+
+pxxt\000p001.bin
+
+
+Juko XT clone (1988)
+
+ROM files needed:
+
+jukopc\000o001.bin
+
+
+Commodore PC30-III (1988)
+A fairly generic 286 clone.
+
+ROM files needed:
+
+cmdpc30\commodore pc 30 iii even.bin
+cmdpc30\commodore pc 30 iii odd.bin
+
+
+Amstrad PC2086 (1989)
+The PC2086 is essentially a PC1640 with VGA and 3.5" floppy drives.
+
+ROM files needed:
+
+pc2086\40179.ic129
+pc2086\40180.ic132
+pc2086\40186.ic171
+
+
+Amstrad PC3086 (1990)
+The PC3086 is a version of the PC2086 with a more standard case.
+
+ROM files needed:
+
+pc3086\fc00.bin
+pc3086\c000.bin
+
+
+Dell System 200 (1990?)
+This is a pretty generic 286 clone with a Phoenix BIOS.
+
+ROM files needed:
+
+dells200\dell0.bin
+dells200\dell1.bin
+
+
+AMI 286 clone (1990)
+This is a generic 286 clone with an AMI BIOS.
+
+ROM files needed:
+
+ami286\amic206.bin
+
+
+Award 286 clone (1990)
+This is a generic 286 clone with an Award BIOS.
+
+ROM files needed:
+
+award286\award.bin
+
+
+IBM PS/1 Model 2011 (1990)
+This is a 286 with integrated VGA and a basic GUI and DOS 4.01 in ROM.
+
+ROM files needed:
+
+ibmps1\f80000.bin
+
+
+Compaq Deskpro 386 (1989)
+An early 386 system. I don't think this BIOS is from the original 1986 version
+(the very first 386 system), but from a 1989 refresh.
+
+ROM files needed:
+
+deskpro386\109592-005.u11.bin
+deskpro386\109591-005.u13.bin
+
+
+IBM PS/1 Model 2121 (1990)
+This is a 386SX with integrated VGA.
+
+ROM files needed:
+
+ibmps1_2121\fc0000.bin
+
+
+Acermate 386SX/25N (1992?)
+An integrated 386SX clone, with onboard Oak SVGA and IO.
+
+ROM files needed:
+
+acer386\acer386.bin
+acer386\oti067.bin
+
+
+DTK 386SX clone (1990)
+
+ROM files needed:
+
+dtk386\3cto001.bin
+
+
+Amstrad MegaPC (1992)
+A 386SX clone (otherwise known as the PC7386SX) with a built-in Sega Megadrive. Only the PC section
+is emulated, obv.
+
+ROM files needed:
+
+megapc\41651-bios lo.u18
+megapc\211253-bios hi.u19
+
+
+AMI 386SX clone (1994)
+This is a generic 386SX clone with an AMI BIOS.
+
+ROM files needed:
+
+ami386\ami386.bin
+
+
+MR 386DX clone (1994)
+This is a generic 386DX clone with an MR BIOS.
+
+ROM files needed:
+
+mr386dx\opt495sx.mr
+
+
+AMI 386DX clone (1994)
+This is a generic 386DX clone with an AMI BIOS. This is the only currently emulated 386DX system
+to support an external cache.
+
+ROM files needed:
+
+ami386dx\opt495sx.ami
+
+
+AMI 486 clone (1993)
+This is a generic 486 clone with an AMI BIOS. The BIOS came from my 486SX/25, bought in December
+1993.
+
+ROM files needed:
+
+ami486\ami486.bin
+
+
+AMI WinBIOS 486 clone (1994)
+A 486 clone with a newer AMI BIOS.
+
+ROM files needed:
+
+win486\ali1429g.amw
+
+
+Award SiS 496/497 (1995)
+A 486 clone using the SiS 496/497 chipset, with PCI bus and Award BIOS.
+
+ROM files needed:
+
+sis496\sis496-1.awa
+
+
+Intel Premiere/PCI (Batman's Revenge) (1994)
+A Socket 4 based board with 430LX chipset.
+
+ROM files needed:
+
+revenge\1009af2_.bi0
+revenge\1009af2_.bi1
+
+
+Intel Advanced/EV (Endeavor) (1995)
+A Socket 5/7 based board with 430FX chipset. The real board has a Sound Blaster Vibra 16 on board,
+which is not emulated - use a discrete card instead. Some Advanced/EVs also had a Trio64 on board,
+the emulated board does not have this either.
+
+ROM files needed:
+
+endeavor\1006cb0_.bi0
+endeavor\1006cb0_.bi1
+
+
+Award 430VX PCI (1996)
+A generic Socket 5/7 board with 430VX chipset.
+
+ROM files needed:
+
+430vx\55xwuq0e.bin
+
+
+
+PCem emulates the following graphics adapters :
+
+MDA
+The original PC adapter. This displays 80x25 text in monochrome.
+
+
+Hercules
+A clone of MDA, with the addition of a high-resolution 720x348 graphics mode.
+
+
+CGA
+The most common of the original adapters, supporting 40x25 and 80x25 text, and
+320x200 in 4 colours, 640x200 in 2 colours, and a composite mode giving 160x200
+in 16 colours.
+
+
+Plantronics ColorPlus
+An enhanced CGA board, with support for 320x200x16 and 640x200x4.
+
+
+Wyse WY-700
+A CGA-compatible board, with support for a 1280x800 mode
+
+
+IBM EGA
+The original 1984 IBM EGA card, with 256k VRAM.
+
+ROM files needed:
+ibm_6277356_ega_card_u44_27128.bin
+
+
+Hercules InColor
+An enhanced Hercules with a custom 720x350 16 colour mode.
+
+
+IBM VGA
+The original VGA card.
+
+ROM files needed:
+ibm_vga.bin
+
+
+Trident 8900D SVGA
+A low cost SVGA board circa 1992/1993. Not the greatest board in it's day, but
+it has a reasonable VESA driver and (buggy) 15/16/24-bit colour modes.
+
+ROM files needed:
+trident.bin
+
+
+Trident TGUI9440
+A later Trident board with GUI acceleration. Windows 9x doesn't include drivers
+for this, so they have to be downloaded and installed separately.
+
+ROM files needed:
+9440.vbi
+
+
+Tseng ET4000AX SVGA
+A somewhat better SVGA board than the Trident, here you get better compatibility
+and speed (on the real card, not the emulator) in exchange for being limited to
+8-bit colour.
+
+ROM files needed:
+et4000.bin
+
+
+Diamond Stealth 32 SVGA
+An ET4000/W32p based board, has 15/16/24-bit colour modes, plus acceleration.
+
+ROM files needed:
+et4000w32.bin
+
+
+Paradise Bahamas 64
+An S3 Vision864 based board.
+
+ROM files needed:
+bahamas64.bin
+
+
+Number Nine 9FX
+An S3 Trio64 based board.
+
+ROM files needed:
+s3_764.bin
+
+
+ATI VGA Edge-16
+A basic SVGA clone.
+
+ROM files needed:
+vgaedge16.vbi
+
+
+ATI VGA Charger
+A basic SVGA clone, similar to the Edge-16.
+
+ROM files needed:
+bios.bin
+
+
+ATI Graphics Pro Turbo
+A Mach64GX based board.
+
+ROM files needed:
+mach64gx/bios.bin
+
+
+OAK OTI-067
+A basic SVGA clone.
+
+ROM files needed:
+oti067/bios.bin
+
+
+Diamond Stealth 3D 2000
+An S3 ViRGE/325 based board.
+
+PCem emulates the ViRGE S3D engine in software. This works with most games I tried, but
+there may be some issues. The Direct3D drivers for the /325 are fairly poor (often showing
+as missing triangles), so use of the /DX instead is recommended.
+
+The streams processor (video overlay) is also emulated, however many features are missing.
+
+ROM files needed:
+s3virge.bin
+
+
+S3 ViRGE/DX
+An S3 ViRGE/DX based board. The drivers that come with Windows are similar to those for the
+/325, however better ones do exist (try the 8-21-1997 version). With the correct drivers,
+many early Direct3D games work okay (if slowly).
+
+ROM files needed:
+86c375_1.bin
+
+
+3DFX Voodoo Graphics
+3D accelerator. Widely supported in late 90s games.
+
+PCem emulates this in software. The emulation is a lot faster than in v10 (thanks to a new
+dynamic recompiler) and should be capable of hitting Voodoo 1 performance on most machines
+when two render threads are used. As before, the emulated CPU is the bottleneck for most games.
+
+PCem can emulate 6 and 8 MB configurations, but defaults to 4 MB for compatibility. It can also
+emulate the screen filter present on the original card, though this does at present have a
+noticeable performance hit.
+
+Almost everything I've tried works okay, with a very few exceptions - Screamer 2 and Rally have
+serious issues.
+
+
+Obsidian SB50
+Voodoo Graphics with 2 TMUs. Drivers for this are a bit limited - the official drivers don't
+support 2 TMUs in Direct3D.
+
+
+Voodoo 2
+Improved Voodoo Graphics - higher clocks, 2 TMUs, triangle setup etc.
+
+PCem can emulate both 8 and 12 MB configurations. It can also emulate 6 and 10 MB configurations
+(with 2MB framebuffer memory), which were never sold into the PC market but do exist for arcade
+systems.
+
+
+Some models have fixed graphics adapters :
+
+IBM PCjr
+CGA with various new modes - 160x200x16, 320x200x16, 640x200x4.
+
+Olivetti M24
+CGA with double-res text modes and a 640x400 mode. I haven't seen a dump of the font
+ROM for this yet, so if one is not provided the MDA font will be used - which looks slightly odd
+as it is 14-line instead of 16-line.
+
+Tandy 1000
+Clone of PCjr video. Widely supported in 80s games.
+
+Tandy 1000 SL/2
+Improvement of Tandy 1000, with support for 640x200x16.
+
+Amstrad PC1512
+CGA with a new mode (640x200x16). Only supported in GEM to my knowledge.
+
+Amstrad PC1640
+Paradise EGA.
+
+Amstrad PC2086/PC3086
+Paradise PVGA1. An early SVGA clone with 256kb VRAM.
+
+IBM PS/1 Model 2011
+Stock VGA with 256kb VRAM.
+
+IBM PS/1 Model 2121
+Basic (and unknown) SVGA with 256kb VRAM.
+
+Amstrad MegaPC
+Paradise 90C11. A development of the PVGA1, with 512kb VRAM.
+
+Acer 386SX/25N
+Oak OTI-067. Another 512kb SVGA clone.
+
+
+
+PCem emulates the following sound devices :
+
+PC speaker
+The standard beeper on all PCs. Supports samples/RealSound.
+
+Tandy PSG
+The Texas Instruments chip in the PCjr and Tandy 1000. Supports 3 voices plus
+noise. I reused the emulator in B-em for this (slightly modified).
+v11 now emulates the differences between the SN76496 (PCjr and Tandy 1000), and the NCR8496
+(currently assigned to the Tandy 1000HX). Maniac Mansion and Zak McKraken will only sound
+correct on the latter.
+
+Tandy PSSJ
+Used on the Tandy 1000SL/2, this clones the NCR8496, adding an addition frequency divider (did any
+software actually use this?) and an 8-bit DAC.
+
+PS/1 audio card
+An SN76496 clone plus an 8-bit DAC. The SN76496 isn't at the same address as PCjr/Tandy, so most
+software doesn't support it.
+
+Gameblaster
+The Creative Labs Gameblaster/Creative Music System, Creative's first sound card
+introduced in 1987. Has two Philips SAA1099, giving 12 voices of square waves plus 4 noise
+voices. In stereo!
+
+Adlib
+Has a Yamaha YM3812, giving 9 voices of 2 op FM, or 6 voices plus a rhythm section. PCem
+uses the DOSBox dbopl emulator.
+
+Adlib Gold
+OPL3 with YM318Z 12-bit digital section. Possibly some bugs (not a lot of software to test).
+The surround module is now emulated.
+
+Sound Blaster
+Several Sound Blasters are emulated :
+ SB v1.0 - The original. Limited to 22khz, and no auto-init DMA (can cause crackles sometimes).
+ SB v1.5 - Adds auto-init DMA
+ SB v2.0 - Upped to 41khz
+ SB Pro v1.0 - Stereo, with twin OPL2 chips.
+ SB Pro v2.0 - Stereo, with OPL 3 chip
+ SB 16 - 16 bit stereo
+ SB AWE32 - SB 16 + wavetable MIDI. This requires a ROM dump from a real AWE32.
+All are set to Address 220, IRQ 7 and DMA 1 (and High DMA 5). IRQ and DMA can be changed for the
+SB16 & AWE32 in the drivers.
+The relevant SET line for autoexec.bat is
+ SET BLASTER = A220 I7 D1 Tx - where Tx is T1 for SB v1.0, T3 for SB v2.0, T4 for SB Pro,
+ and T6 for SB16.
+
+AWE32 requires a ROM dump called awe32.raw. AWE-DUMP is a utility which can get a dump from a real
+card. Most EMU8000 functionality should work, however filters are not correct and reverb/chorus
+effects are not currently emulated.
+
+Gravis Ultrasound
+32 voice sample playback. Port address is fixed to 240, IRQ and DMA can be changed from the drivers.
+Emulation is improved significantly over previous versions.
+
+Windows Sound System
+16-bit digital + OPL3. Note that this only emulates WSS itself, and should not be used with drivers
+from compatible boards with additional components (eg Turtle Beach Monte Carlo)
+
+Innovation SSI-2001
+SID6581. Emulated using resid-fp. Board is fixed to port 280.
+
+
+Other stuff emulated :
+
+Serial mouse
+A Microsoft compatible serial mouse on COM1. Compatible drivers are all over the place for this.
+
+M24 mouse
+I haven't seen a DOS mouse driver for this yet, but the regular scancode mode works, as does the
+Windows 1.x driver.
+
+PC1512 mouse
+The PC1512's perculiar quadrature mouse. You need Amstrad's actual driver for this one.
+
+PS/2 mouse
+A standard 2 button PS/2 mouse. As with serial, compatible drivers are common.
+
+Microsoft PS/2 Intellimouse
+A PS/2 mouse with mouse wheel.
+
+ATAPI CD-ROM
+Works with OAKCDROM.SYS, VDD-IDE.SYS, and the internal drivers of every OS I've tried.
+
+
+XTIDE :
+
+The XTIDE board is emulated for machines that don't natively support IDE hard discs.
+
+You will need to download the XTIDE BIOS seperately. Of the various versions, ide_at.bin and ide_xt.bin
+should be placed in the ROMS directory. ide_xt is used on all XT models, and ide_at is used on the IBM AT
+and Commodore PC30-III machines.
+
+The BIOS is available at :
+
+http://code.google.com/p/xtideuniversalbios/
+
+v2.0.0 beta 1 is the version I've mostly tested. v2.0.0 beta 3 is known to have some issues.
+
+For the PS/1, you will need v1.1.5. The PS/1 is a bit fussy with XTIDE, and I've found that it works best
+when the XTIDE configuration has 'Full Operating Mode' disabled. This version must be called
+ide_at_1_1_5.bin and should also be placed in the ROMS directory.
+
+
+Notes :
+
+- The time on the PC1512 clock is wrong. The date is correct, though since the PC1512's bios isn't
+ Y2k compliant, it thinks it's 1988.
+
+- The envelope system on the Gameblaster isn't emulated. The noise may not be right either.
+
+- Some of the more unusual VGA features are not emulated. I haven't found anything that uses them yet.
+
+- On some versions of Windows the AWE32 is not set up correctly, claiming a resource conflict. To correct
+ this open the relevant item in Device Manager, choose 'Set Configuration Manually' and accept the
+ options presented.
+
+
+Software tested:
+
+MS-DOS 1.25
+MS-DOS 2.11
+MS-DOS 3.31
+Compaq DOS 3.31
+MS-DOS 5.0
+MS-DOS 6.22
+
+DR-DOS 6.0
+
+Windows 1.03
+Windows 2.03
+Windows/386 2.11
+Windows 3.0
+Windows 3.1
+Windows for Workgroups 3.11
+Windows 95
+Windows 95 OSR 2
+Windows 98
+Windows 98 SE
+Windows ME
+
+Windows NT 3.51
+Windows NT 4
+Windows 2000
+Windows XP
+
+OS/2 v1.1
+OS/2 v1.2
+OS/2 v1.3
+OS/2 v2.1
+OS/2 Warp 3
+OS/2 Warp 4
+
+GEM 3.11
+
+Corel Linux 1.2
+Ubuntu 10.04 (very slow, does not support serial mouse)
+
+BeOS 5.0 Professional
+
+Adobe Photoshop 3.0.4
+CorelDRAW! 2.5 (OS/2)
+CorelDRAW! 5.0
+FastTracker v2.08
+Lotus 1-2-3 2.1 (OS/2)
+Microsoft Excel 3.0 (OS/2)
+Microsoft Word 1.1 (OS/2)
+Microsoft Word for Windows 6.1
+Microsoft Works for Windows 3.0
+Microsoft Visual Basic 3.0
+Microsoft Visual C++ 1.0
+Microsoft Visual C++ 6.0
+StarOffice 3.1 (OS/2)
+
+Age of Empires
+Alien vs Predator (3DFX)
+Blake Stone
+Breakneck (3DFX)
+Caesar III
+Civilization
+Civilization II
+Colin McRae Rally (3DFX)
+Colonization
+Command & Conquer : Red Alert
+Command & Conquer : Red Alert 2
+Commander Keen : Goodbye Galaxy
+Commander Keen : Invasion of the Vorticons
+Croc (3DFX)
+Curse of Monkey Island
+Dawn Patrol
+Deus Ex (3DFX, slow)
+Discworld II
+Doom
+Doom II
+Duke Nukem 3D
+Dune
+Dune II
+Epic Pinball
+Grand Theft Auto (3DFX)
+GTA 2 (3DFX)
+Half-Life (3DFX)
+Heretic
+House of the Dead 2 (3DFX)
+Icon
+Incoming (3DFX)
+Indiana Jones and the Last Crusade
+Jetpack
+King's Quest (PCjr, Tandy)
+King's Quest II (Tandy)
+Klotz
+Lemmings
+Lemmings 2
+Little Big Adventure 2
+Lotus III
+Maniac Mansion
+Microsoft Arcade
+Monkey Island 2
+Mystic Towers
+Need for Speed II SE (3DFX)
+Need for Speed III (3DFX)
+Network Q RAC Rally
+Oddworld : Abe's Oddysee
+Overlord
+Populous : The Beginning (3DFX)
+Pro Pinball : Big Race USA
+Pro Pinball : The Web
+Psycho Pinball
+Resident Evil 2 (3DFX)
+Rollercoaster Tycoon
+Quake (3DFX)
+Quake II (3DFX)
+Quake III Arena (3DFX)
+Scorched Earth
+Screamer
+Screamer Rally (not 3DFX)
+Secret of Monkey Island
+SimCity (DOS, OS/2)
+SimCity 2000 (DOs, Windows, OS/2)
+SimCity 3000
+Spear of Destiny
+Star Goose
+Stargunner
+Stunt Island
+System Shock
+System Shock 2 (3DFX)
+Terminal Velocity
+The Humans
+Theme Hospital
+Tomb Raider (3DFX)
+Tomb Raider III (3DFX)
+Tony Hawk's Pro Skater 2 (3DFX)
+Total Annihilation
+Transport Tycoon
+Turok (3DFX)
+Turok 2 (3DFX)
+Tyrian
+UFO : Enemy Unknown
+Unreal (3DFX)
+Unreal Tournament (3DFX)
+Wacky Wheels
+Wing Commander
+Wolfenstein 3D
+World Cup 98 (3DFX)
+Worms
+Worms 2
+X-Com : Apocalypse
+X-Com : Terror From The Deep
+X-Wing
+Zone 66
+
+Complex - Cyboman 2
+EMF - Verses
+Future Crew - Second Reality
+Gazebo - Cyboman!
+KFMF - Trip (3DFX)
+Logic Design - Fashion
+Orange - X14
+Renaissance - Amnesia
+Skull - Putrefaction
+Tran - Ambience (flickery with a host display at 60 Hz)
+Tran - Timeless
+Triton - Crystal Dream
+Triton - Crystal Dream II (visual artifacts in titles)
+Ultraforce - Vectdemo
+Witan - Witan House
+
+BeebInC v0.99f
+Fellow v0.33
+Kgen98 v0.4b
+PacifiST v0.48
+SNES9x v0.96
+vMac v0.1.9.1
diff --git a/src/386.c b/src/386.c
index fc9cb3b..8a03cc4 100644
--- a/src/386.c
+++ b/src/386.c
@@ -2,6 +2,7 @@
#include
#include
#include "ibm.h"
+#include "386.h"
#include "x86.h"
#include "x87.h"
#include "mem.h"
@@ -9,18 +10,58 @@
#include "fdc.h"
#include "pic.h"
#include "timer.h"
-#include "nmi.h"
#include "386_common.h"
-#include "codegen.h"
-#undef CPU_BLOCK_END
#define CPU_BLOCK_END()
+extern int codegen_flags_changed;
+
+extern int nmi_enable;
+
+int inscounts[256];
+uint32_t oldpc2;
+
+int trap;
+
+
+
+extern int cpl_override;
+
+int has_fpu;
+extern int fpucount;
+uint16_t rds;
+uint16_t ea_rseg;
+
+int is486;
+int cgate32;
+
+
+
+uint8_t romext[32768];
+uint8_t *ram,*rom;
+
+uint32_t rmdat32;
+#define rmdat rmdat32
+#define fetchdat rmdat32
+uint32_t backupregs[16];
+extern int oddeven;
+int inttype;
+
+
+uint32_t oldcs2;
+uint32_t oldecx;
+
+uint32_t *eal_r, *eal_w;
+
+uint16_t *mod1add[2][8];
+uint32_t *mod1seg[8];
+
static inline void fetch_ea_32_long(uint32_t rmdat)
{
eal_r = eal_w = NULL;
easeg = cpu_state.ea_seg->base;
+ ea_rseg = cpu_state.ea_seg->seg;
if (cpu_rm == 4)
{
uint8_t sib = rmdat >> 8;
@@ -47,7 +88,8 @@ static inline void fetch_ea_32_long(uint32_t rmdat)
else if ((sib & 6) == 4 && !cpu_state.ssegs)
{
easeg = ss;
- cpu_state.ea_seg = &cpu_state.seg_ss;
+ ea_rseg = SS;
+ cpu_state.ea_seg = &_ss;
}
if (((sib >> 3) & 7) != 4)
cpu_state.eaaddr += cpu_state.regs[(sib >> 3) & 7].l << (sib >> 6);
@@ -60,7 +102,8 @@ static inline void fetch_ea_32_long(uint32_t rmdat)
if (cpu_rm == 5 && !cpu_state.ssegs)
{
easeg = ss;
- cpu_state.ea_seg = &cpu_state.seg_ss;
+ ea_rseg = SS;
+ cpu_state.ea_seg = &_ss;
}
if (cpu_mod == 1)
{
@@ -91,7 +134,8 @@ static inline void fetch_ea_16_long(uint32_t rmdat)
{
eal_r = eal_w = NULL;
easeg = cpu_state.ea_seg->base;
- if (!cpu_mod && cpu_rm == 6)
+ ea_rseg = cpu_state.ea_seg->seg;
+ if (!cpu_mod && cpu_rm == 6)
{
cpu_state.eaaddr = getword();
}
@@ -113,7 +157,8 @@ static inline void fetch_ea_16_long(uint32_t rmdat)
if (mod1seg[cpu_rm] == &ss && !cpu_state.ssegs)
{
easeg = ss;
- cpu_state.ea_seg = &cpu_state.seg_ss;
+ ea_rseg = SS;
+ cpu_state.ea_seg = &_ss;
}
cpu_state.eaaddr &= 0xFFFF;
}
@@ -136,7 +181,19 @@ static inline void fetch_ea_16_long(uint32_t rmdat)
#define getwordf() ((uint16_t)(fetchdat)); cpu_state.pc+=2
#define getbyte2f() ((uint8_t)(fetchdat>>8)); cpu_state.pc++
#define getword2f() ((uint16_t)(fetchdat>>8)); cpu_state.pc+=2
+extern int xout;
+int oldi;
+
+uint32_t testr[9];
+extern int dontprint;
+
+#undef NOTRM
+#define NOTRM if (!(msw & 1) || (eflags & VM_FLAG))\
+ { \
+ x86_int(6); \
+ return 0; \
+ }
#define OP_TABLE(name) ops_ ## name
@@ -145,6 +202,13 @@ static inline void fetch_ea_16_long(uint32_t rmdat)
#include "x86_ops.h"
+#undef NOTRM
+#define NOTRM if (!(msw & 1) || (eflags & VM_FLAG))\
+ { \
+ x86_int(6); \
+ break; \
+ }
+
void exec386(int cycs)
{
uint8_t temp;
@@ -152,56 +216,73 @@ void exec386(int cycs)
int tempi;
int cycdiff;
int oldcyc;
+ int cycle_period = cycs / 2000; /*Use a 5us timing granularity*/
cycles+=cycs;
// output=3;
while (cycles>0)
{
- int cycle_period = (timer_target - (uint32_t)tsc) + 1;
-
- x86_was_reset = 0;
cycdiff=0;
oldcyc=cycles;
+ timer_start_period(cycles << TIMER_SHIFT);
// pclog("%i %02X\n", ins, ram[8]);
while (cycdiff < cycle_period)
{
- int ins_cycles = cycles;
-
+ /* testr[0]=EAX; testr[1]=EBX; testr[2]=ECX; testr[3]=EDX;
+ testr[4]=ESI; testr[5]=EDI; testr[6]=EBP; testr[7]=ESP;*/
+/* testr[8]=flags;*/
+// oldcs2=oldcs;
+// oldpc2=oldpc;
+
+ oldcs=CS;
cpu_state.oldpc = cpu_state.pc;
+ oldcpl=CPL;
cpu_state.op32 = use32;
- cpu_state.ea_seg = &cpu_state.seg_ds;
+dontprint=0;
+
+ cpu_state.ea_seg = &_ds;
cpu_state.ssegs = 0;
fetchdat = fastreadl(cs + cpu_state.pc);
if (!cpu_state.abrt)
- {
- uint8_t opcode = fetchdat & 0xFF;
+ {
+ trap = flags & T_FLAG;
+ opcode = fetchdat & 0xFF;
fetchdat >>= 8;
- trap = cpu_state.flags & T_FLAG;
if (output == 3)
{
- pclog("%04X(%06X):%04X : %08X %08X %08X %08X %04X %04X %04X(%08X) %04X %04X %04X(%08X) %08X %08X %08X SP=%04X:%08X %02X %04X %i %08X %08X %i %i %02X %02X %02X %02X %02X\n",CS,cs,cpu_state.pc,EAX,EBX,ECX,EDX,CS,DS,ES,es,FS,GS,SS,ss,EDI,ESI,EBP,SS,ESP,opcode,cpu_state.flags,ins,0, ldt.base, CPL, stack32, pic.pend, pic.mask, pic.mask2, pic2.pend, pic2.mask);
+ pclog("%04X(%06X):%04X : %08X %08X %08X %08X %04X %04X %04X(%08X) %04X %04X %04X(%08X) %08X %08X %08X SP=%04X:%08X %02X %04X %i %08X %08X %i %i %02X %02X %02X %02X %02X %f %02X%02X %02X%02X %02X%02X %02X\n",CS,cs,cpu_state.pc,EAX,EBX,ECX,EDX,CS,DS,ES,es,FS,GS,SS,ss,EDI,ESI,EBP,SS,ESP,opcode,flags,ins,0, ldt.base, CPL, stack32, pic.pend, pic.mask, pic.mask2, pic2.pend, pic2.mask, pit.c[0], ram[0xB270+0x3F5], ram[0xB270+0x3F4], ram[0xB270+0x3F7], ram[0xB270+0x3F6], ram[0xB270+0x3F9], ram[0xB270+0x3F8], ram[0x4430+0x0D49]);
}
cpu_state.pc++;
x86_opcodes[(opcode | cpu_state.op32) & 0x3ff](fetchdat);
- if (x86_was_reset)
- break;
}
+ if (!use32) cpu_state.pc &= 0xffff;
+
if (cpu_state.abrt)
{
flags_rebuild();
// pclog("Abort\n");
// if (CS == 0x228) pclog("Abort at %04X:%04X - %i %i %i\n",CS,pc,notpresent,nullseg,abrt);
- tempi = cpu_state.abrt & ABRT_MASK;
+/* if (testr[0]!=EAX) pclog("EAX corrupted %08X\n",pc);
+ if (testr[1]!=EBX) pclog("EBX corrupted %08X\n",pc);
+ if (testr[2]!=ECX) pclog("ECX corrupted %08X\n",pc);
+ if (testr[3]!=EDX) pclog("EDX corrupted %08X\n",pc);
+ if (testr[4]!=ESI) pclog("ESI corrupted %08X\n",pc);
+ if (testr[5]!=EDI) pclog("EDI corrupted %08X\n",pc);
+ if (testr[6]!=EBP) pclog("EBP corrupted %08X\n",pc);
+ if (testr[7]!=ESP) pclog("ESP corrupted %08X\n",pc);*/
+/* if (testr[8]!=flags) pclog("FLAGS corrupted %08X\n",pc);*/
+ tempi = cpu_state.abrt;
cpu_state.abrt = 0;
x86_doabrt(tempi);
if (cpu_state.abrt)
{
cpu_state.abrt = 0;
+ CS = oldcs;
cpu_state.pc = cpu_state.oldpc;
pclog("Double fault %i\n", ins);
pmodeint(8, 0);
@@ -214,36 +295,34 @@ void exec386(int cycs)
}
}
}
+ cycdiff=oldcyc-cycles;
- if (cpu_state.smi_pending)
- {
- cpu_state.smi_pending = 0;
- x86_smi_enter();
- }
- else if (trap)
+ if (trap)
{
flags_rebuild();
// oldpc=pc;
+// oldcs=CS;
if (msw&1)
{
pmodeint(1,0);
}
else
{
- writememw(ss,(SP-2)&0xFFFF,cpu_state.flags);
+ writememw(ss,(SP-2)&0xFFFF,flags);
writememw(ss,(SP-4)&0xFFFF,CS);
writememw(ss,(SP-6)&0xFFFF,cpu_state.pc);
SP-=6;
addr = (1 << 2) + idt.base;
- cpu_state.flags &= ~I_FLAG;
- cpu_state.flags &= ~T_FLAG;
+ flags&=~I_FLAG;
+ flags&=~T_FLAG;
cpu_state.pc=readmemw(0,addr);
loadcs(readmemw(0,addr+2));
}
}
- else if (nmi && nmi_enable && nmi_mask)
+ else if (nmi && nmi_enable)
{
cpu_state.oldpc = cpu_state.pc;
+ oldcs = CS;
// pclog("NMI\n");
x86_int(2);
nmi_enable = 0;
@@ -253,7 +332,7 @@ void exec386(int cycs)
nmi = 0;
}
}
- else if ((cpu_state.flags & I_FLAG) && pic_intpending)
+ else if ((flags&I_FLAG) && pic_intpending)
{
temp=picinterrupt();
if (temp!=0xFF)
@@ -269,13 +348,14 @@ void exec386(int cycs)
}
else
{
- writememw(ss,(SP-2)&0xFFFF,cpu_state.flags);
+ writememw(ss,(SP-2)&0xFFFF,flags);
writememw(ss,(SP-4)&0xFFFF,CS);
writememw(ss,(SP-6)&0xFFFF,cpu_state.pc);
SP-=6;
addr = (temp << 2) + idt.base;
- cpu_state.flags &= ~I_FLAG;
- cpu_state.flags &= ~T_FLAG;
+ flags&=~I_FLAG;
+ flags&=~T_FLAG;
+ oxpc=cpu_state.pc;
cpu_state.pc=readmemw(0,addr);
loadcs(readmemw(0,addr+2));
// if (temp==0x76) pclog("INT to %04X:%04X\n",CS,pc);
@@ -287,11 +367,6 @@ void exec386(int cycs)
ins++;
insc++;
- ins_cycles -= cycles;
- tsc += ins_cycles;
-
- cycdiff=oldcyc-cycles;
-
if (timetolive)
{
timetolive--;
@@ -300,7 +375,8 @@ void exec386(int cycs)
}
}
- if (TIMER_VAL_LESS_THAN_VAL(timer_target, (uint32_t)tsc))
- timer_process();
+ tsc += cycdiff;
+
+ timer_end_period(cycles << TIMER_SHIFT);
}
}
diff --git a/src/386.h b/src/386.h
new file mode 100644
index 0000000..d78be84
--- /dev/null
+++ b/src/386.h
@@ -0,0 +1,15 @@
+extern void cpu_386_flags_extract();
+extern void cpu_386_flags_rebuild();
+
+void pmodeint(int num, int soft);
+void loadcscall(uint16_t seg);
+void loadcsjmp(uint16_t seg, uint32_t oxpc);
+void pmoderetf(int is32, uint16_t off);
+void pmodeiret(int is32);
+void x86_int_sw(int num);
+
+int divl(uint32_t val);
+int idivl(int32_t val);
+
+int rep386(int fv);
+
diff --git a/src/386_common.c b/src/386_common.c
deleted file mode 100644
index 4d0a761..0000000
--- a/src/386_common.c
+++ /dev/null
@@ -1,252 +0,0 @@
-#include "ibm.h"
-#include "x86.h"
-#include "386_common.h"
-#include "x86_flags.h"
-#include "codegen.h"
-
-x86seg gdt, ldt, idt, tr;
-
-uint32_t cr2, cr3, cr4;
-uint32_t dr[8];
-
-uint16_t sysenter_cs;
-uint32_t sysenter_eip, sysenter_esp;
-
-uint32_t use32;
-int stack32;
-int optype;
-
-int trap;
-
-uint32_t rmdat;
-
-uint32_t *eal_r, *eal_w;
-
-int nmi_enable = 1;
-
-int cpl_override=0;
-
-int fpucount=0;
-
-uint16_t cpu_cur_status = 0;
-
-uint32_t pccache;
-uint8_t *pccache2;
-
-void x86_int(int num)
-{
- uint32_t addr;
-// pclog("x86_int %02x %04x:%04x\n", num, CS,pc);
- flags_rebuild();
- cpu_state.pc=cpu_state.oldpc;
- if (msw&1)
- {
- pmodeint(num,0);
- }
- else
- {
- addr = (num << 2) + idt.base;
-
- if ((num << 2) + 3 > idt.limit)
- {
- if (idt.limit < 35)
- {
- cpu_state.abrt = 0;
- softresetx86();
- cpu_set_edx();
- pclog("Triple fault in real mode - reset\n");
- }
- else
- x86_int(8);
- }
- else
- {
- if (stack32)
- {
- writememw(ss,ESP-2,cpu_state.flags);
- writememw(ss,ESP-4,CS);
- writememw(ss,ESP-6,cpu_state.pc);
- ESP-=6;
- }
- else
- {
- writememw(ss,((SP-2)&0xFFFF),cpu_state.flags);
- writememw(ss,((SP-4)&0xFFFF),CS);
- writememw(ss,((SP-6)&0xFFFF),cpu_state.pc);
- SP-=6;
- }
-
- cpu_state.flags &= ~I_FLAG;
- cpu_state.flags &= ~T_FLAG;
- cpu_state.pc=readmemw(0,addr);
- loadcs(readmemw(0,addr+2));
- }
- }
- cycles-=70;
- CPU_BLOCK_END();
-}
-
-void x86_int_sw(int num)
-{
- uint32_t addr;
-// pclog("x86_int_sw %02x %04x:%04x\n", num, CS,pc);
-// pclog("x86_int\n");
- flags_rebuild();
- cycles -= timing_int;
- if (msw&1)
- {
- pmodeint(num,1);
- }
- else
- {
- addr = (num << 2) + idt.base;
-
- if ((num << 2) + 3 > idt.limit)
- {
- x86_int(13);
- }
- else
- {
- if (stack32)
- {
- writememw(ss,ESP-2,cpu_state.flags);
- writememw(ss,ESP-4,CS);
- writememw(ss,ESP-6,cpu_state.pc);
- ESP-=6;
- }
- else
- {
- writememw(ss,((SP-2)&0xFFFF),cpu_state.flags);
- writememw(ss,((SP-4)&0xFFFF),CS);
- writememw(ss,((SP-6)&0xFFFF),cpu_state.pc);
- SP-=6;
- }
-
- cpu_state.flags &= ~I_FLAG;
- cpu_state.flags &= ~T_FLAG;
- cpu_state.pc=readmemw(0,addr);
- loadcs(readmemw(0,addr+2));
- cycles -= timing_int_rm;
- }
- }
- trap = 0;
- CPU_BLOCK_END();
-}
-
-int x86_int_sw_rm(int num)
-{
- uint32_t addr;
- uint16_t new_pc, new_cs;
-
- flags_rebuild();
- cycles -= timing_int;
-
- addr = num << 2;
- new_pc = readmemw(0, addr);
- new_cs = readmemw(0, addr + 2);
-
- if (cpu_state.abrt) return 1;
-
- writememw(ss,((SP-2)&0xFFFF),cpu_state.flags); if (cpu_state.abrt) {pclog("abrt5\n"); return 1; }
- writememw(ss,((SP-4)&0xFFFF),CS);
- writememw(ss,((SP-6)&0xFFFF),cpu_state.pc); if (cpu_state.abrt) {pclog("abrt6\n"); return 1; }
- SP-=6;
-
- cpu_state.eflags &= ~VIF_FLAG;
- cpu_state.flags &= ~T_FLAG;
- cpu_state.pc = new_pc;
- loadcs(new_cs);
-
- cycles -= timing_int_rm;
- trap = 0;
- CPU_BLOCK_END();
-
- return 0;
-}
-
-void x86illegal()
-{
-// pclog("x86 illegal %04X %08X %04X:%08X %02X\n",msw,cr0,CS,pc,opcode);
-
-// if (output)
-// {
-// dumpregs();
-// exit(-1);
-// }
- x86_int(6);
-}
-
-int checkio(int port)
-{
- uint16_t t;
- uint8_t d;
- cpl_override = 1;
- t = readmemw(tr.base, 0x66);
- cpl_override = 0;
-// pclog("CheckIO 1 %08X %04x %02x\n",tr.base, eflags, _cs.access);
- if (cpu_state.abrt) return 0;
-// pclog("CheckIO %04X %01X %01X %02X %04X %04X %08X ",CS,CPL,IOPL,port,t,t+(port>>3),tr.base+t+(port>>3));
- if ((t+(port>>3))>tr.limit) return 1;
- cpl_override = 1;
- d = readmembl(tr.base + t + (port >> 3));
-// d=readmemb(tr.base,t+(port>>3));
- cpl_override = 0;
-// pclog("%02X %02X\n",d,d&(1<<(port&7)));
- return d&(1<<(port&7));
-}
-
-#define divexcp() { \
- pclog("Divide exception at %04X(%06X):%04X\n",CS,cs,cpu_state.pc); \
- x86_int(0); \
-}
-
-int divl(uint32_t val)
-{
- if (val==0)
- {
- divexcp();
- return 1;
- }
- uint64_t num=(((uint64_t)EDX)<<32)|EAX;
- uint64_t quo=num/val;
- uint32_t rem=num%val;
- uint32_t quo32=(uint32_t)(quo&0xFFFFFFFF);
- if (quo!=(uint64_t)quo32)
- {
- divexcp();
- return 1;
- }
- EDX=rem;
- EAX=quo32;
- return 0;
-}
-int idivl(int32_t val)
-{
- if (val==0)
- {
- divexcp();
- return 1;
- }
- int64_t num=(((uint64_t)EDX)<<32)|EAX;
- int64_t quo=num/val;
- int32_t rem=num%val;
- int32_t quo32=(int32_t)(quo&0xFFFFFFFF);
- if (quo!=(int64_t)quo32)
- {
- divexcp();
- return 1;
- }
- EDX=rem;
- EAX=quo32;
- return 0;
-}
-
-
-void cpu_386_flags_extract()
-{
- flags_extract();
-}
-void cpu_386_flags_rebuild()
-{
- flags_rebuild();
-}
diff --git a/src/386_common.h b/src/386_common.h
index 143984a..bbcfaa0 100644
--- a/src/386_common.h
+++ b/src/386_common.h
@@ -1,61 +1,51 @@
-#ifndef _386_COMMON_H_
-#define _386_COMMON_H_
+extern uint16_t ea_rseg;
-#define readmemb(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1)?readmembl((s)+(a)): *(uint8_t *)(readlookup2[(uint32_t)((s)+(a))>>12] + (uint32_t)((s) + (a))) )
-#define readmemw(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1 || (((s)+(a)) & 1))?readmemwl((s)+(a)):*(uint16_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a))))
-#define readmeml(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1 || (((s)+(a)) & 3))?readmemll((s)+(a)):*(uint32_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a))))
-#define readmemq(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1 || (((s)+(a)) & 7))?readmemql((s)+(a)):*(uint64_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a))))
+#undef readmemb
+#undef writememb
-#define writememb(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1) writemembl((s)+(a),v); else *(uint8_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v
-#define writememw(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1 || (((s)+(a)) & 1)) writememwl((s)+(a),v); else *(uint16_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v
-#define writememl(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1 || (((s)+(a)) & 3)) writememll((s)+(a),v); else *(uint32_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v
-#define writememq(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1 || (((s)+(a)) & 7)) writememql((s)+(a),v); else *(uint64_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v
+
+#define readmemb(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF)?readmemb386l(s,a): *(uint8_t *)(readlookup2[(uint32_t)((s)+(a))>>12] + (uint32_t)((s) + (a))) )
+#define readmemq(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF || (((s)+(a))&0xFFF)>0xFF8)?readmemql(s,a):*(uint64_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a))))
+
+#define writememb(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF) writememb386l(s,a,v); else *(uint8_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v
+
+#define writememw(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF || (((s)+(a))&0xFFF)>0xFFE) writememwl(s,a,v); else *(uint16_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v
+#define writememl(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF || (((s)+(a))&0xFFF)>0xFFC) writememll(s,a,v); else *(uint32_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v
+#define writememq(s,a,v) if (writelookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF || (((s)+(a))&0xFFF)>0xFF8) writememql(s,a,v); else *(uint64_t *)(writelookup2[(uint32_t)((s) + (a)) >> 12] + (uint32_t)((s) + (a))) = v
int checkio(int port);
-#define check_io_perm(port) if (!IOPLp || (cpu_state.eflags&VM_FLAG)) \
+#define check_io_perm(port) if (!IOPLp || (eflags&VM_FLAG)) \
{ \
int tempi = checkio(port); \
if (cpu_state.abrt) return 1; \
if (tempi) \
{ \
- if (cpu_state.eflags & VM_FLAG) \
- x86gpf_expected(NULL,0); \
- else \
- x86gpf(NULL,0); \
+ x86gpf(NULL,0); \
return 1; \
} \
}
-#define SEG_CHECK_READ(seg) \
- do \
- { \
- if ((seg)->base == 0xffffffff) \
- { \
- x86gpf("Segment can't read", 0);\
- return 1; \
- } \
- } while (0)
-
-#define SEG_CHECK_WRITE(seg) \
- do \
- { \
- if ((seg)->base == 0xffffffff) \
- { \
- x86gpf("Segment can't write", 0);\
- return 1; \
- } \
- } while (0)
+#define checkio_perm(port) if (!IOPLp || (eflags&VM_FLAG)) \
+ { \
+ tempi = checkio(port); \
+ if (cpu_state.abrt) break; \
+ if (tempi) \
+ { \
+ x86gpf(NULL,0); \
+ break; \
+ } \
+ }
#define CHECK_READ(seg, low, high) \
- if ((low < (seg)->limit_low) || (high > (seg)->limit_high) || ((msw & 1) && !(cpu_state.eflags & VM_FLAG) && (((seg)->access & 10) == 8))) \
+ if ((low < (seg)->limit_low) || (high > (seg)->limit_high)) \
{ \
x86gpf("Limit check", 0); \
return 1; \
}
#define CHECK_WRITE(seg, low, high) \
- if ((low < (seg)->limit_low) || (high > (seg)->limit_high) || !((seg)->access & 2) || ((msw & 1) && !(cpu_state.eflags & VM_FLAG) && ((seg)->access & 8))) \
+ if ((low < (seg)->limit_low) || (high > (seg)->limit_high) || !((seg)->access & 2)) \
{ \
x86gpf("Limit check", 0); \
return 1; \
@@ -69,7 +59,7 @@ int checkio(int port);
}
-#define NOTRM if (!(msw & 1) || (cpu_state.eflags & VM_FLAG))\
+#define NOTRM if (!(msw & 1) || (eflags & VM_FLAG))\
{ \
x86_int(6); \
return 1; \
@@ -98,8 +88,8 @@ static inline uint16_t fastreadw(uint32_t a)
uint16_t val;
if ((a&0xFFF)>0xFFE)
{
- val = fastreadb(a);
- val |= (fastreadb(a + 1) << 8);
+ val = readmemb(0, a);
+ val |= (readmemb(0, a + 1) << 8);
return val;
}
if ((a>>12)==pccache) return *((uint16_t *)&pccache2[a]);
@@ -129,22 +119,13 @@ static inline uint32_t fastreadl(uint32_t a)
}
return *((uint32_t *)&pccache2[a]);
}
- val = fastreadw(a);
- val |= (fastreadw(a + 2) << 16);
+ val =readmemb(0,a);
+ val |=(readmemb(0,a+1)<<8);
+ val |=(readmemb(0,a+2)<<16);
+ val |=(readmemb(0,a+3)<<24);
return val;
}
-static inline void *get_ram_ptr(uint32_t a)
-{
- if ((a >> 12) == pccache)
- return &pccache2[a];
- else
- {
- uint8_t *t = getpccache(a);
- return &t[a];
- }
-}
-
static inline uint8_t getbyte()
{
cpu_state.pc++;
@@ -177,30 +158,32 @@ static inline uint8_t geteab()
return (cpu_rm & 4) ? cpu_state.regs[cpu_rm & 3].b.h : cpu_state.regs[cpu_rm&3].b.l;
if (eal_r)
return *(uint8_t *)eal_r;
- return readmemb(easeg,cpu_state.eaaddr);
+ return readmemb(easeg, cpu_state.eaaddr);
}
static inline uint16_t geteaw()
{
if (cpu_mod == 3)
return cpu_state.regs[cpu_rm].w;
+// cycles-=3;
if (eal_r)
return *(uint16_t *)eal_r;
- return readmemw(easeg,cpu_state.eaaddr);
+ return readmemw(easeg, cpu_state.eaaddr);
}
static inline uint32_t geteal()
{
if (cpu_mod == 3)
return cpu_state.regs[cpu_rm].l;
+// cycles-=3;
if (eal_r)
return *eal_r;
- return readmeml(easeg,cpu_state.eaaddr);
+ return readmeml(easeg, cpu_state.eaaddr);
}
static inline uint64_t geteaq()
{
- return readmemq(easeg,cpu_state.eaaddr);
+ return readmemq(easeg, cpu_state.eaaddr);
}
static inline uint8_t geteab_mem()
@@ -221,20 +204,24 @@ static inline uint32_t geteal_mem()
static inline void seteaq(uint64_t v)
{
- writememql(easeg+cpu_state.eaaddr, v);
+ writememql(easeg, cpu_state.eaaddr, v);
}
-#define seteab(v) if (cpu_mod!=3) { if (eal_w) *(uint8_t *)eal_w=v; else writemembl(easeg+cpu_state.eaaddr,v); } else if (cpu_rm&4) cpu_state.regs[cpu_rm&3].b.h=v; else cpu_state.regs[cpu_rm].b.l=v
-#define seteaw(v) if (cpu_mod!=3) { if (eal_w) *(uint16_t *)eal_w=v; else writememwl(easeg+cpu_state.eaaddr,v); } else cpu_state.regs[cpu_rm].w=v
-#define seteal(v) if (cpu_mod!=3) { if (eal_w) *eal_w=v; else writememll(easeg+cpu_state.eaaddr,v); } else cpu_state.regs[cpu_rm].l=v
+#define seteab(v) if (cpu_mod!=3) { if (eal_w) *(uint8_t *)eal_w=v; else writememb386l(easeg,cpu_state.eaaddr,v); } else if (cpu_rm&4) cpu_state.regs[cpu_rm&3].b.h=v; else cpu_state.regs[cpu_rm].b.l=v
+#define seteaw(v) if (cpu_mod!=3) { if (eal_w) *(uint16_t *)eal_w=v; else writememwl(easeg,cpu_state.eaaddr,v); } else cpu_state.regs[cpu_rm].w=v
+#define seteal(v) if (cpu_mod!=3) { if (eal_w) *eal_w=v; else writememll(easeg,cpu_state.eaaddr,v); } else cpu_state.regs[cpu_rm].l=v
-#define seteab_mem(v) if (eal_w) *(uint8_t *)eal_w=v; else writemembl(easeg+cpu_state.eaaddr,v);
-#define seteaw_mem(v) if (eal_w) *(uint16_t *)eal_w=v; else writememwl(easeg+cpu_state.eaaddr,v);
-#define seteal_mem(v) if (eal_w) *eal_w=v; else writememll(easeg+cpu_state.eaaddr,v);
+#define seteab_mem(v) if (eal_w) *(uint8_t *)eal_w=v; else writememb386l(easeg,cpu_state.eaaddr,v);
+#define seteaw_mem(v) if (eal_w) *(uint16_t *)eal_w=v; else writememwl(easeg,cpu_state.eaaddr,v);
+#define seteal_mem(v) if (eal_w) *eal_w=v; else writememll(easeg,cpu_state.eaaddr,v);
#define getbytef() ((uint8_t)(fetchdat)); cpu_state.pc++
#define getwordf() ((uint16_t)(fetchdat)); cpu_state.pc+=2
#define getbyte2f() ((uint8_t)(fetchdat>>8)); cpu_state.pc++
#define getword2f() ((uint16_t)(fetchdat>>8)); cpu_state.pc+=2
-#endif
+
+#define rmdat rmdat32
+#define fetchdat rmdat32
+
+void x86_int(int num);
diff --git a/src/386_dynarec.c b/src/386_dynarec.c
index ec56e57..09894dd 100644
--- a/src/386_dynarec.c
+++ b/src/386_dynarec.c
@@ -1,19 +1,15 @@
#include
#include
#include
-#if defined(__APPLE__) && defined(__aarch64__)
-#include
-#endif
#include "ibm.h"
+#include "386.h"
#include "x86.h"
#include "x86_ops.h"
#include "x87.h"
#include "mem.h"
#include "codegen.h"
-#include "codegen_backend.h"
#include "cpu.h"
#include "fdc.h"
-#include "nmi.h"
#include "pic.h"
#include "timer.h"
@@ -21,18 +17,57 @@
#define CPU_BLOCK_END() cpu_block_end = 1
+int cpu_reps, cpu_reps_latched;
+int cpu_notreps, cpu_notreps_latched;
+
int inrecomp = 0;
int cpu_recomp_blocks, cpu_recomp_full_ins, cpu_new_blocks;
int cpu_recomp_blocks_latched, cpu_recomp_ins_latched, cpu_recomp_full_ins_latched, cpu_new_blocks_latched;
int cpu_block_end = 0;
+int nmi_enable = 1;
+int inscounts[256];
+uint32_t oldpc2;
+
+int trap;
+
+
+
+int cpl_override=0;
+
+int has_fpu;
+int fpucount=0;
+uint16_t rds;
+uint16_t ea_rseg;
+
+int is486;
+int cgate32;
+
+
+uint8_t romext[32768];
+uint8_t *ram,*rom;
+
+uint32_t rmdat32;
+uint32_t backupregs[16];
+int oddeven=0;
+int inttype;
+
+
+uint32_t oldcs2;
+uint32_t oldecx;
+
+uint32_t *eal_r, *eal_w;
+
+uint16_t *mod1add[2][8];
+uint32_t *mod1seg[8];
static inline void fetch_ea_32_long(uint32_t rmdat)
{
eal_r = eal_w = NULL;
easeg = cpu_state.ea_seg->base;
+ ea_rseg = cpu_state.ea_seg->seg;
if (cpu_rm == 4)
{
uint8_t sib = rmdat >> 8;
@@ -59,7 +94,8 @@ static inline void fetch_ea_32_long(uint32_t rmdat)
else if ((sib & 6) == 4 && !cpu_state.ssegs)
{
easeg = ss;
- cpu_state.ea_seg = &cpu_state.seg_ss;
+ ea_rseg = SS;
+ cpu_state.ea_seg = &_ss;
}
if (((sib >> 3) & 7) != 4)
cpu_state.eaaddr += cpu_state.regs[(sib >> 3) & 7].l << (sib >> 6);
@@ -72,7 +108,8 @@ static inline void fetch_ea_32_long(uint32_t rmdat)
if (cpu_rm == 5 && !cpu_state.ssegs)
{
easeg = ss;
- cpu_state.ea_seg = &cpu_state.seg_ss;
+ ea_rseg = SS;
+ cpu_state.ea_seg = &_ss;
}
if (cpu_mod == 1)
{
@@ -103,7 +140,8 @@ static inline void fetch_ea_16_long(uint32_t rmdat)
{
eal_r = eal_w = NULL;
easeg = cpu_state.ea_seg->base;
- if (!cpu_mod && cpu_rm == 6)
+ ea_rseg = cpu_state.ea_seg->seg;
+ if (!cpu_mod && cpu_rm == 6)
{
cpu_state.eaaddr = getword();
}
@@ -125,7 +163,8 @@ static inline void fetch_ea_16_long(uint32_t rmdat)
if (mod1seg[cpu_rm] == &ss && !cpu_state.ssegs)
{
easeg = ss;
- cpu_state.ea_seg = &cpu_state.seg_ss;
+ ea_rseg = SS;
+ cpu_state.ea_seg = &_ss;
}
cpu_state.eaaddr &= 0xFFFF;
}
@@ -144,6 +183,95 @@ static inline void fetch_ea_16_long(uint32_t rmdat)
#include "x86_flags.h"
+void x86_int(int num)
+{
+ uint32_t addr;
+// pclog("x86_int %02x %04x:%04x\n", num, CS,pc);
+ flags_rebuild();
+ cpu_state.pc=cpu_state.oldpc;
+ if (msw&1)
+ {
+ pmodeint(num,0);
+ }
+ else
+ {
+ if (stack32)
+ {
+ writememw(ss,ESP-2,flags);
+ writememw(ss,ESP-4,CS);
+ writememw(ss,ESP-6,cpu_state.pc);
+ ESP-=6;
+ }
+ else
+ {
+ writememw(ss,((SP-2)&0xFFFF),flags);
+ writememw(ss,((SP-4)&0xFFFF),CS);
+ writememw(ss,((SP-6)&0xFFFF),cpu_state.pc);
+ SP-=6;
+ }
+ addr = (num << 2) + idt.base;
+
+ flags&=~I_FLAG;
+ flags&=~T_FLAG;
+ oxpc=cpu_state.pc;
+ cpu_state.pc=readmemw(0,addr);
+ loadcs(readmemw(0,addr+2));
+ }
+ cycles-=70;
+ CPU_BLOCK_END();
+}
+
+void x86_int_sw(int num)
+{
+ uint32_t addr;
+// pclog("x86_int_sw %02x %04x:%04x\n", num, CS,pc);
+// pclog("x86_int\n");
+ flags_rebuild();
+ cycles -= timing_int;
+ if (msw&1)
+ {
+ pmodeint(num,1);
+ }
+ else
+ {
+ if (stack32)
+ {
+ writememw(ss,ESP-2,flags);
+ writememw(ss,ESP-4,CS);
+ writememw(ss,ESP-6,cpu_state.pc);
+ ESP-=6;
+ }
+ else
+ {
+ writememw(ss,((SP-2)&0xFFFF),flags);
+ writememw(ss,((SP-4)&0xFFFF),CS);
+ writememw(ss,((SP-6)&0xFFFF),cpu_state.pc);
+ SP-=6;
+ }
+ addr = (num << 2) + idt.base;
+
+ flags&=~I_FLAG;
+ flags&=~T_FLAG;
+ oxpc=cpu_state.pc;
+ cpu_state.pc=readmemw(0,addr);
+ loadcs(readmemw(0,addr+2));
+ cycles -= timing_int_rm;
+ }
+ trap = 0;
+ CPU_BLOCK_END();
+}
+
+void x86illegal()
+{
+// pclog("x86 illegal %04X %08X %04X:%08X %02X\n",msw,cr0,CS,pc,opcode);
+
+// if (output)
+// {
+// dumpregs();
+// exit(-1);
+// }
+ x86_int(6);
+}
/*Prefetch emulation is a fairly simplistic model:
- All instruction bytes must be fetched before it starts.
@@ -215,8 +343,6 @@ static void prefetch_run(int instr_cycles, int bytes, int modrm, int reads, int
}
prefetch_prefixes = 0;
- if (prefetch_bytes > 16)
- prefetch_bytes = 16;
}
static void prefetch_flush()
@@ -227,10 +353,974 @@ static void prefetch_flush()
#define PREFETCH_RUN(instr_cycles, bytes, modrm, reads, reads_l, writes, writes_l, ea32) \
do { if (cpu_prefetch_cycles) prefetch_run(instr_cycles, bytes, modrm, reads, reads_l, writes, writes_l, ea32); } while (0)
-#define PREFETCH_PREFIX() do { if (cpu_prefetch_cycles) prefetch_prefixes++; } while (0)
+#define PREFETCH_PREFIX() prefetch_prefixes++
#define PREFETCH_FLUSH() prefetch_flush()
+int rep386(int fv)
+{
+ uint8_t temp;
+ uint32_t c;//=CX;
+ uint8_t temp2;
+ uint16_t tempw,tempw2,of;
+ uint32_t ipc = cpu_state.oldpc;//pc-1;
+ uint32_t rep32 = cpu_state.op32;
+ uint32_t templ,templ2;
+ int tempz;
+ int tempi;
+ /*Limit the amount of time the instruction is uninterruptable for, so
+ that high frequency timers still work okay. This amount is different
+ for interpreter and recompiler*/
+ int cycles_end = cycles - ((is386 && cpu_use_dynarec) ? 1000 : 100);
+ int reads = 0, reads_l = 0, writes = 0, writes_l = 0, total_cycles = 0;
+
+ if (trap)
+ cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/
+
+ cpu_reps++;
+
+ flags_rebuild();
+ of = flags;
+// if (inrecomp) pclog("REP32 %04X %04X ",use32,rep32);
+ startrep:
+ temp=opcode2=readmemb(cs,cpu_state.pc); cpu_state.pc++;
+// if (firstrepcycle && temp==0xA5) pclog("REP MOVSW %06X:%04X %06X:%04X\n",ds,SI,es,DI);
+// if (inrecomp) pclog("REP %02X %04X\n",temp,ipc);
+ c=(rep32&0x200)?ECX:CX;
+/* if (rep32 && (msw&1))
+ {
+ if (temp!=0x67 && temp!=0x66 && (rep32|temp)!=0x1AB && (rep32|temp)!=0x3AB) pclog("32-bit REP %03X %08X %04X:%06X\n",temp|rep32,c,CS,pc);
+ }*/
+ switch (temp|rep32)
+ {
+ case 0xC3: case 0x1C3: case 0x2C3: case 0x3C3:
+ cpu_state.pc--;
+ break;
+ case 0x08:
+ cpu_state.pc=ipc+1;
+ break;
+ case 0x26: case 0x126: case 0x226: case 0x326: /*ES:*/
+ cpu_state.ea_seg = &_es;
+ PREFETCH_PREFIX();
+ goto startrep;
+ break;
+ case 0x2E: case 0x12E: case 0x22E: case 0x32E: /*CS:*/
+ cpu_state.ea_seg = &_cs;
+ PREFETCH_PREFIX();
+ goto startrep;
+ case 0x36: case 0x136: case 0x236: case 0x336: /*SS:*/
+ cpu_state.ea_seg = &_ss;
+ PREFETCH_PREFIX();
+ goto startrep;
+ case 0x3E: case 0x13E: case 0x23E: case 0x33E: /*DS:*/
+ cpu_state.ea_seg = &_ds;
+ PREFETCH_PREFIX();
+ goto startrep;
+ case 0x64: case 0x164: case 0x264: case 0x364: /*FS:*/
+ cpu_state.ea_seg = &_fs;
+ PREFETCH_PREFIX();
+ goto startrep;
+ case 0x65: case 0x165: case 0x265: case 0x365: /*GS:*/
+ cpu_state.ea_seg = &_gs;
+ PREFETCH_PREFIX();
+ goto startrep;
+ case 0x66: case 0x166: case 0x266: case 0x366: /*Data size prefix*/
+ rep32 = (rep32 & 0x200) | ((use32 ^ 0x100) & 0x100);
+ PREFETCH_PREFIX();
+ goto startrep;
+ case 0x67: case 0x167: case 0x267: case 0x367: /*Address size prefix*/
+ rep32 = (rep32 & 0x100) | ((use32 ^ 0x200) & 0x200);
+ PREFETCH_PREFIX();
+ goto startrep;
+ case 0x6C: case 0x16C: /*REP INSB*/
+// cpu_notreps++;
+ if (c>0)
+ {
+ checkio_perm(DX);
+ temp2=inb(DX);
+ writememb(es,DI,temp2);
+ if (cpu_state.abrt) break;
+ if (flags&D_FLAG) DI--;
+ else DI++;
+ c--;
+ cycles-=15;
+ reads++; writes++; total_cycles += 15;
+ }
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x26C: case 0x36C: /*REP INSB*/
+// cpu_notreps++;
+ if (c>0)
+ {
+ checkio_perm(DX);
+ temp2=inb(DX);
+ writememb(es,EDI,temp2);
+ if (cpu_state.abrt) break;
+ if (flags&D_FLAG) EDI--;
+ else EDI++;
+ c--;
+ cycles-=15;
+ reads++; writes++; total_cycles += 15;
+ }
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x6D: /*REP INSW*/
+// cpu_notreps++;
+ if (c>0)
+ {
+// pclog("REP INSW %04x %04x:%04x %04x\n", DX, ES, DI, CX);
+ tempw=inw(DX);
+ writememw(es,DI,tempw);
+ if (cpu_state.abrt) break;
+ if (flags&D_FLAG) DI-=2;
+ else DI+=2;
+ c--;
+ cycles-=15;
+ reads++; writes++; total_cycles += 15;
+ }
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x16D: /*REP INSL*/
+// cpu_notreps++;
+ if (c>0)
+ {
+ templ=inl(DX);
+ writememl(es,DI,templ);
+ if (cpu_state.abrt) break;
+ if (flags&D_FLAG) DI-=4;
+ else DI+=4;
+ c--;
+ cycles-=15;
+ reads_l++; writes_l++; total_cycles += 15;
+ }
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x26D: /*REP INSW*/
+// cpu_notreps++;
+ if (c>0)
+ {
+ tempw=inw(DX);
+ writememw(es,EDI,tempw);
+ if (cpu_state.abrt) break;
+ if (flags&D_FLAG) EDI-=2;
+ else EDI+=2;
+ c--;
+ cycles-=15;
+ reads++; writes++; total_cycles += 15;
+ }
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x36D: /*REP INSL*/
+// cpu_notreps++;
+ if (c>0)
+ {
+ templ=inl(DX);
+ writememl(es,EDI,templ);
+ if (cpu_state.abrt) break;
+ if (flags&D_FLAG) EDI-=4;
+ else EDI+=4;
+ c--;
+ cycles-=15;
+ reads_l++; writes_l++; total_cycles += 15;
+ }
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x6E: case 0x16E: /*REP OUTSB*/
+// cpu_notreps++;
+ if (c>0)
+ {
+ temp2 = readmemb(cpu_state.ea_seg->base, SI);
+ if (cpu_state.abrt) break;
+ checkio_perm(DX);
+ outb(DX,temp2);
+ if (flags&D_FLAG) SI--;
+ else SI++;
+ c--;
+ cycles-=14;
+ reads++; writes++; total_cycles += 14;
+ }
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x26E: case 0x36E: /*REP OUTSB*/
+// cpu_notreps++;
+ if (c>0)
+ {
+ temp2 = readmemb(cpu_state.ea_seg->base, ESI);
+ if (cpu_state.abrt) break;
+ checkio_perm(DX);
+ outb(DX,temp2);
+ if (flags&D_FLAG) ESI--;
+ else ESI++;
+ c--;
+ cycles-=14;
+ reads++; writes++; total_cycles += 14;
+ }
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x6F: /*REP OUTSW*/
+// cpu_notreps++;
+ if (c>0)
+ {
+ tempw = readmemw(cpu_state.ea_seg->base, SI);
+ if (cpu_state.abrt) break;
+// pclog("OUTSW %04X -> %04X\n",SI,tempw);
+ outw(DX,tempw);
+ if (flags&D_FLAG) SI-=2;
+ else SI+=2;
+ c--;
+ cycles-=14;
+ reads++; writes++; total_cycles += 14;
+ }
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x16F: /*REP OUTSL*/
+// cpu_notreps++;
+ if (c > 0)
+ {
+ templ = readmeml(cpu_state.ea_seg->base, SI);
+ if (cpu_state.abrt) break;
+ outl(DX, templ);
+ if (flags & D_FLAG) SI -= 4;
+ else SI += 4;
+ c--;
+ cycles -= 14;
+ reads_l++; writes_l++; total_cycles += 14;
+ }
+ if (c > 0) { firstrepcycle = 0; cpu_state.pc = ipc; }
+ else firstrepcycle = 1;
+ break;
+ case 0x26F: /*REP OUTSW*/
+// cpu_notreps++;
+ if (c>0)
+ {
+ tempw = readmemw(cpu_state.ea_seg->base, ESI);
+ if (cpu_state.abrt) break;
+ outw(DX,tempw);
+ if (flags&D_FLAG) ESI-=2;
+ else ESI+=2;
+ c--;
+ cycles-=14;
+ reads++; writes++; total_cycles += 14;
+ }
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x36F: /*REP OUTSL*/
+// cpu_notreps++;
+ if (c > 0)
+ {
+ templ = readmeml(cpu_state.ea_seg->base, ESI);
+ if (cpu_state.abrt) break;
+ outl(DX, templ);
+ if (flags & D_FLAG) ESI -= 4;
+ else ESI += 4;
+ c--;
+ cycles -= 14;
+ reads_l++; writes_l++; total_cycles += 14;
+ }
+ if (c > 0) { firstrepcycle = 0; cpu_state.pc = ipc; }
+ else firstrepcycle = 1;
+ break;
+ case 0x90: case 0x190: /*REP NOP*/
+ case 0x290: case 0x390:
+// cpu_notreps++;
+ break;
+ case 0xA4: case 0x1A4: /*REP MOVSB*/
+ while (c > 0)
+ {
+ CHECK_WRITE_REP(&_es, DI, DI);
+ temp2 = readmemb(cpu_state.ea_seg->base, SI); if (cpu_state.abrt) break;
+ writememb(es,DI,temp2); if (cpu_state.abrt) break;
+// if (output==3) pclog("MOVSB %08X:%04X -> %08X:%04X %02X\n",ds,SI,es,DI,temp2);
+ if (flags&D_FLAG) { DI--; SI--; }
+ else { DI++; SI++; }
+ c--;
+ cycles-=(is486)?3:4;
+ ins++;
+ reads++; writes++; total_cycles += is486 ? 3 : 4;
+ if (cycles < cycles_end)
+ break;
+ }
+ ins--;
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x2A4: case 0x3A4: /*REP MOVSB*/
+ while (c > 0)
+ {
+ CHECK_WRITE_REP(&_es, EDI, EDI);
+ temp2 = readmemb(cpu_state.ea_seg->base, ESI); if (cpu_state.abrt) break;
+ writememb(es,EDI,temp2); if (cpu_state.abrt) break;
+ if (flags&D_FLAG) { EDI--; ESI--; }
+ else { EDI++; ESI++; }
+ c--;
+ cycles-=(is486)?3:4;
+ ins++;
+ reads++; writes++; total_cycles += is486 ? 3 : 4;
+ if (cycles < cycles_end)
+ break;
+ }
+ ins--;
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0xA5: /*REP MOVSW*/
+ while (c > 0)
+ {
+ CHECK_WRITE_REP(&_es, DI, DI+1);
+ tempw = readmemw(cpu_state.ea_seg->base, SI); if (cpu_state.abrt) break;
+ writememw(es,DI,tempw); if (cpu_state.abrt) break;
+ if (flags&D_FLAG) { DI-=2; SI-=2; }
+ else { DI+=2; SI+=2; }
+ c--;
+ cycles-=(is486)?3:4;
+ ins++;
+ reads++; writes++; total_cycles += is486 ? 3 : 4;
+ if (cycles < cycles_end)
+ break;
+ }
+ ins--;
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x1A5: /*REP MOVSL*/
+ while (c > 0)
+ {
+ CHECK_WRITE_REP(&_es, DI, DI+3);
+ templ = readmeml(cpu_state.ea_seg->base, SI); if (cpu_state.abrt) break;
+// pclog("MOVSD %08X from %08X to %08X (%04X:%08X)\n", templ, ds+SI, es+DI, CS, pc);
+ writememl(es,DI,templ); if (cpu_state.abrt) break;
+ if (flags&D_FLAG) { DI-=4; SI-=4; }
+ else { DI+=4; SI+=4; }
+ c--;
+ cycles-=(is486)?3:4;
+ ins++;
+ reads_l++; writes_l++; total_cycles += is486 ? 3 : 4;
+ if (cycles < cycles_end)
+ break;
+ }
+ ins--;
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x2A5: /*REP MOVSW*/
+ while (c > 0)
+ {
+ CHECK_WRITE_REP(&_es, EDI, EDI+1);
+ tempw = readmemw(cpu_state.ea_seg->base, ESI); if (cpu_state.abrt) break;
+ writememw(es,EDI,tempw); if (cpu_state.abrt) break;
+// if (output) pclog("Written %04X from %08X to %08X %i %08X %04X %08X %04X\n",tempw,ds+ESI,es+EDI,c,ds,ES,es,ES);
+ if (flags&D_FLAG) { EDI-=2; ESI-=2; }
+ else { EDI+=2; ESI+=2; }
+ c--;
+ cycles-=(is486)?3:4;
+ ins++;
+ reads++; writes++; total_cycles += is486 ? 3 : 4;
+ if (cycles < cycles_end)
+ break;
+ }
+ ins--;
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x3A5: /*REP MOVSL*/
+ while (c > 0)
+ {
+ CHECK_WRITE_REP(&_es, EDI, EDI+3);
+ templ = readmeml(cpu_state.ea_seg->base, ESI); if (cpu_state.abrt) break;
+// if ((EDI&0xFFFF0000)==0xA0000) cycles-=12;
+ writememl(es,EDI,templ); if (cpu_state.abrt) break;
+// if (output) pclog("Load %08X from %08X to %08X %04X %08X %04X %08X\n",templ,ESI,EDI,DS,ds,ES,es);
+ if (flags&D_FLAG) { EDI-=4; ESI-=4; }
+ else { EDI+=4; ESI+=4; }
+ c--;
+ cycles-=(is486)?3:4;
+ ins++;
+ reads_l++; writes_l++; total_cycles += is486 ? 3 : 4;
+ if (cycles < cycles_end)
+ break;
+ }
+ ins--;
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0xA6: case 0x1A6: /*REP CMPSB*/
+// cpu_notreps++;
+ tempz = (fv) ? 1 : 0;
+ if ((c>0) && (fv==tempz))
+ {
+ temp = readmemb(cpu_state.ea_seg->base, SI);
+ temp2=readmemb(es,DI);
+ if (cpu_state.abrt) { flags=of; break; }
+ if (flags&D_FLAG) { DI--; SI--; }
+ else { DI++; SI++; }
+ c--;
+ cycles-=(is486)?7:9;
+ reads += 2; total_cycles += is486 ? 7 : 9;
+ setsub8(temp,temp2);
+ tempz = (ZF_SET()) ? 1 : 0;
+ }
+ if ((c>0) && (fv==tempz)) { cpu_state.pc=ipc; firstrepcycle=0; }
+ else firstrepcycle=1;
+ break;
+ case 0x2A6: case 0x3A6: /*REP CMPSB*/
+// cpu_notreps++;
+ tempz = (fv) ? 1 : 0;
+ if ((c>0) && (fv==tempz))
+ {
+ temp = readmemb(cpu_state.ea_seg->base, ESI);
+ temp2=readmemb(es,EDI);
+ if (cpu_state.abrt) { flags=of; break; }
+ if (flags&D_FLAG) { EDI--; ESI--; }
+ else { EDI++; ESI++; }
+ c--;
+ cycles-=(is486)?7:9;
+ reads += 2; total_cycles += is486 ? 7 : 9;
+ setsub8(temp,temp2);
+ tempz = (ZF_SET()) ? 1 : 0;
+ }
+ if ((c>0) && (fv==tempz)) { cpu_state.pc=ipc; firstrepcycle=0; }
+ else firstrepcycle=1;
+ break;
+ case 0xA7: /*REP CMPSW*/
+// cpu_notreps++;
+ tempz = (fv) ? 1 : 0;
+ if ((c>0) && (fv==tempz))
+ {
+// pclog("CMPSW (%04x:%04x)%05X (%04x:%04x)%05X ", DS,SI, ds+SI, ES,DI, es+DI);
+ tempw = readmemw(cpu_state.ea_seg->base, SI);
+ tempw2=readmemw(es,DI);
+// pclog("%04X %04X %c%c %c%c\n", tempw, tempw2, tempw & 0xff, tempw >> 8, tempw2 & 0xff, tempw2 >> 8);
+
+ if (cpu_state.abrt) { flags=of; break; }
+ if (flags&D_FLAG) { DI-=2; SI-=2; }
+ else { DI+=2; SI+=2; }
+ c--;
+ cycles-=(is486)?7:9;
+ reads += 2; total_cycles += is486 ? 7 : 9;
+ setsub16(tempw,tempw2);
+ tempz = (ZF_SET()) ? 1 : 0;
+ }
+ if ((c>0) && (fv==tempz)) { cpu_state.pc=ipc; firstrepcycle=0; }
+ else firstrepcycle=1;
+ break;
+ case 0x1A7: /*REP CMPSL*/
+// cpu_notreps++;
+ tempz = (fv) ? 1 : 0;
+ if ((c>0) && (fv==tempz))
+ {
+ templ = readmeml(cpu_state.ea_seg->base, SI);
+ templ2=readmeml(es,DI);
+ if (cpu_state.abrt) { flags=of; break; }
+ if (flags&D_FLAG) { DI-=4; SI-=4; }
+ else { DI+=4; SI+=4; }
+ c--;
+ cycles-=(is486)?7:9;
+ reads_l += 2; total_cycles += is486 ? 7 : 9;
+ setsub32(templ,templ2);
+ tempz = (ZF_SET()) ? 1 : 0;
+ }
+ if ((c>0) && (fv==tempz)) { cpu_state.pc=ipc; firstrepcycle=0; }
+ else firstrepcycle=1;
+ break;
+ case 0x2A7: /*REP CMPSW*/
+// cpu_notreps++;
+ tempz = (fv) ? 1 : 0;
+ if ((c>0) && (fv==tempz))
+ {
+ tempw = readmemw(cpu_state.ea_seg->base, ESI);
+ tempw2=readmemw(es,EDI);
+ if (cpu_state.abrt) { flags=of; break; }
+ if (flags&D_FLAG) { EDI-=2; ESI-=2; }
+ else { EDI+=2; ESI+=2; }
+ c--;
+ cycles-=(is486)?7:9;
+ reads += 2; total_cycles += is486 ? 7 : 9;
+ setsub16(tempw,tempw2);
+ tempz = (ZF_SET()) ? 1 : 0;
+ }
+ if ((c>0) && (fv==tempz)) { cpu_state.pc=ipc; firstrepcycle=0; }
+ else firstrepcycle=1;
+ break;
+ case 0x3A7: /*REP CMPSL*/
+// cpu_notreps++;
+ tempz = (fv) ? 1 : 0;
+ if ((c>0) && (fv==tempz))
+ {
+ templ = readmeml(cpu_state.ea_seg->base, ESI);
+ templ2=readmeml(es,EDI);
+ if (cpu_state.abrt) { flags=of; break; }
+ if (flags&D_FLAG) { EDI-=4; ESI-=4; }
+ else { EDI+=4; ESI+=4; }
+ c--;
+ cycles-=(is486)?7:9;
+ reads_l += 2; total_cycles += is486 ? 7 : 9;
+ setsub32(templ,templ2);
+ tempz = (ZF_SET()) ? 1 : 0;
+ }
+ if ((c>0) && (fv==tempz)) { cpu_state.pc=ipc; firstrepcycle=0; }
+ else firstrepcycle=1;
+ break;
+
+ case 0xAA: case 0x1AA: /*REP STOSB*/
+ while (c > 0)
+ {
+ CHECK_WRITE_REP(&_es, DI, DI);
+ writememb(es,DI,AL);
+ if (cpu_state.abrt) break;
+ if (flags&D_FLAG) DI--;
+ else DI++;
+ c--;
+ cycles-=(is486)?4:5;
+ writes++; total_cycles += is486 ? 4 : 5;
+ ins++;
+ if (cycles < cycles_end)
+ break;
+ }
+ ins--;
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x2AA: case 0x3AA: /*REP STOSB*/
+ while (c > 0)
+ {
+ CHECK_WRITE_REP(&_es, EDI, EDI);
+ writememb(es,EDI,AL);
+ if (cpu_state.abrt) break;
+ if (flags&D_FLAG) EDI--;
+ else EDI++;
+ c--;
+ cycles-=(is486)?4:5;
+ writes++; total_cycles += is486 ? 4 : 5;
+ ins++;
+ if (cycles < cycles_end)
+ break;
+ }
+ ins--;
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0xAB: /*REP STOSW*/
+ while (c > 0)
+ {
+ CHECK_WRITE_REP(&_es, DI, DI+1);
+ writememw(es,DI,AX);
+ if (cpu_state.abrt) break;
+ if (flags&D_FLAG) DI-=2;
+ else DI+=2;
+ c--;
+ cycles-=(is486)?4:5;
+ writes++; total_cycles += is486 ? 4 : 5;
+ ins++;
+ if (cycles < cycles_end)
+ break;
+ }
+ ins--;
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x2AB: /*REP STOSW*/
+ while (c > 0)
+ {
+ CHECK_WRITE_REP(&_es, EDI, EDI+1);
+ writememw(es,EDI,AX);
+ if (cpu_state.abrt) break;
+ if (flags&D_FLAG) EDI-=2;
+ else EDI+=2;
+ c--;
+ cycles-=(is486)?4:5;
+ writes++; total_cycles += is486 ? 4 : 5;
+ ins++;
+ if (cycles < cycles_end)
+ break;
+ }
+ ins--;
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x1AB: /*REP STOSL*/
+ while (c > 0)
+ {
+ CHECK_WRITE_REP(&_es, DI, DI+3);
+ writememl(es,DI,EAX);
+ if (cpu_state.abrt) break;
+ if (flags&D_FLAG) DI-=4;
+ else DI+=4;
+ c--;
+ cycles-=(is486)?4:5;
+ writes_l++; total_cycles += is486 ? 4 : 5;
+ ins++;
+ if (cycles < cycles_end)
+ break;
+ }
+ ins--;
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x3AB: /*REP STOSL*/
+ while (c > 0)
+ {
+ CHECK_WRITE_REP(&_es, EDI, EDI+3);
+ writememl(es,EDI,EAX);
+ if (cpu_state.abrt) break;
+ if (flags&D_FLAG) EDI-=4;
+ else EDI+=4;
+ c--;
+ cycles-=(is486)?4:5;
+ writes_l++; total_cycles += is486 ? 4 : 5;
+ ins++;
+ if (cycles < cycles_end)
+ break;
+ }
+ ins--;
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0xAC: case 0x1AC: /*REP LODSB*/
+// cpu_notreps++;
+// if (ds==0xFFFFFFFF) pclog("Null selector REP LODSB %04X(%06X):%06X\n",CS,cs,pc);
+ if (c>0)
+ {
+ AL = readmemb(cpu_state.ea_seg->base, SI);
+ if (cpu_state.abrt) break;
+ if (flags&D_FLAG) SI--;
+ else SI++;
+ c--;
+ cycles-=5;
+ reads++; total_cycles += 5;
+ }
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x2AC: case 0x3AC: /*REP LODSB*/
+// cpu_notreps++;
+// if (ds==0xFFFFFFFF) pclog("Null selector REP LODSB %04X(%06X):%06X\n",CS,cs,pc);
+ if (c>0)
+ {
+ AL = readmemb(cpu_state.ea_seg->base, ESI);
+ if (cpu_state.abrt) break;
+ if (flags&D_FLAG) ESI--;
+ else ESI++;
+ c--;
+ cycles-=5;
+ reads++; total_cycles += 5;
+ }
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0xAD: /*REP LODSW*/
+// cpu_notreps++;
+// if (ds==0xFFFFFFFF) pclog("Null selector REP LODSW %04X(%06X):%06X\n",CS,cs,pc);
+ if (c>0)
+ {
+ AX = readmemw(cpu_state.ea_seg->base, SI);
+ if (cpu_state.abrt) break;
+ if (flags&D_FLAG) SI-=2;
+ else SI+=2;
+ c--;
+ cycles-=5;
+ reads++; total_cycles += 5;
+ }
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x1AD: /*REP LODSL*/
+// cpu_notreps++;
+// if (ds==0xFFFFFFFF) pclog("Null selector REP LODSL %04X(%06X):%06X\n",CS,cs,pc);
+ if (c>0)
+ {
+ EAX = readmeml(cpu_state.ea_seg->base, SI);
+ if (cpu_state.abrt) break;
+ if (flags&D_FLAG) SI-=4;
+ else SI+=4;
+ c--;
+ cycles-=5;
+ reads_l++; total_cycles += 5;
+ }
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x2AD: /*REP LODSW*/
+// cpu_notreps++;
+// if (ds==0xFFFFFFFF) pclog("Null selector REP LODSW %04X(%06X):%06X\n",CS,cs,pc);
+ if (c>0)
+ {
+ AX = readmemw(cpu_state.ea_seg->base, ESI);
+ if (cpu_state.abrt) break;
+ if (flags&D_FLAG) ESI-=2;
+ else ESI+=2;
+ c--;
+ cycles-=5;
+ reads++; total_cycles += 5;
+ }
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0x3AD: /*REP LODSL*/
+// cpu_notreps++;
+// if (ds==0xFFFFFFFF) pclog("Null selector REP LODSL %04X(%06X):%06X\n",CS,cs,pc);
+ if (c>0)
+ {
+ EAX = readmeml(cpu_state.ea_seg->base, ESI);
+ if (cpu_state.abrt) break;
+ if (flags&D_FLAG) ESI-=4;
+ else ESI+=4;
+ c--;
+ cycles-=5;
+ reads_l++; total_cycles += 5;
+ }
+ if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; }
+ else firstrepcycle=1;
+ break;
+ case 0xAE: case 0x1AE: /*REP SCASB*/
+ cpu_notreps++;
+// if (es==0xFFFFFFFF) pclog("Null selector REP SCASB %04X(%06X):%06X\n",CS,cs,pc);
+// tempz=(fv)?1:0;
+ tempz = (fv) ? 1 : 0;
+ while ((c > 0) && (fv == tempz))
+ {
+ temp2=readmemb(es,DI);
+ if (cpu_state.abrt) { flags=of; break; }
+ setsub8(AL,temp2);
+ tempz = (ZF_SET()) ? 1 : 0;
+ if (flags&D_FLAG) DI--;
+ else DI++;
+ c--;
+ cycles-=(is486)?5:8;
+ reads++; total_cycles += is486 ? 5 : 8;
+ ins++;
+ if (cycles < cycles_end)
+ break;
+ }
+ ins--;
+ if ((c>0) && (fv==tempz)) { cpu_state.pc=ipc; firstrepcycle=0; }
+ else firstrepcycle=1;
+ break;
+ case 0x2AE: case 0x3AE: /*REP SCASB*/
+ cpu_notreps++;
+// if (es==0xFFFFFFFF) pclog("Null selector REP SCASB %04X(%06X):%06X\n",CS,cs,pc);
+// tempz=(fv)?1:0;
+ tempz = (fv) ? 1 : 0;
+ while ((c > 0) && (fv == tempz))
+ {
+ temp2=readmemb(es,EDI);
+ if (cpu_state.abrt) { flags=of; break; }
+// if (output) pclog("Compare %02X,%02X\n",temp2,AL);
+ setsub8(AL,temp2);
+ tempz = (ZF_SET()) ? 1 : 0;
+ if (flags&D_FLAG) EDI--;
+ else EDI++;
+ c--;
+ cycles-=(is486)?5:8;
+ reads++; total_cycles += is486 ? 5 : 8;
+ ins++;
+ if (cycles < cycles_end)
+ break;
+ }
+ ins--;
+ if ((c>0) && (fv==tempz)) { cpu_state.pc=ipc; firstrepcycle=0; }
+ else firstrepcycle=1;
+ break;
+ case 0xAF: /*REP SCASW*/
+ cpu_notreps++;
+// if (es==0xFFFFFFFF) pclog("Null selector REP SCASW %04X(%06X):%06X\n",CS,cs,pc);
+ tempz = (fv) ? 1 : 0;
+ while ((c > 0) && (fv == tempz))
+ {
+ tempw=readmemw(es,DI);
+ if (cpu_state.abrt) { flags=of; break; }
+ setsub16(AX,tempw);
+ tempz = (ZF_SET()) ? 1 : 0;
+ if (flags&D_FLAG) DI-=2;
+ else DI+=2;
+ c--;
+ cycles-=(is486)?5:8;
+ reads++; total_cycles += is486 ? 5 : 8;
+ ins++;
+ if (cycles < cycles_end)
+ break;
+ }
+ ins--;
+ if ((c>0) && (fv==tempz)) { cpu_state.pc=ipc; firstrepcycle=0; }
+ else firstrepcycle=1;
+ break;
+ case 0x1AF: /*REP SCASL*/
+ cpu_notreps++;
+// if (es==0xFFFFFFFF) pclog("Null selector REP SCASL %04X(%06X):%06X\n",CS,cs,pc);
+ tempz = (fv) ? 1 : 0;
+ while ((c > 0) && (fv == tempz))
+ {
+ templ=readmeml(es,DI);
+ if (cpu_state.abrt) { flags=of; break; }
+ setsub32(EAX,templ);
+ tempz = (ZF_SET()) ? 1 : 0;
+ if (flags&D_FLAG) DI-=4;
+ else DI+=4;
+ c--;
+ cycles-=(is486)?5:8;
+ reads_l++; total_cycles += is486 ? 5 : 8;
+ ins++;
+ if (cycles < cycles_end)
+ break;
+ }
+ ins--;
+ if ((c>0) && (fv==tempz)) { cpu_state.pc=ipc; firstrepcycle=0; }
+ else firstrepcycle=1;
+ break;
+ case 0x2AF: /*REP SCASW*/
+ cpu_notreps++;
+// if (es==0xFFFFFFFF) pclog("Null selector REP SCASW %04X(%06X):%06X\n",CS,cs,pc);
+ tempz = (fv) ? 1 : 0;
+ while ((c > 0) && (fv == tempz))
+ {
+ tempw=readmemw(es,EDI);
+ if (cpu_state.abrt) { flags=of; break; }
+ setsub16(AX,tempw);
+ tempz = (ZF_SET()) ? 1 : 0;
+ if (flags&D_FLAG) EDI-=2;
+ else EDI+=2;
+ c--;
+ cycles-=(is486)?5:8;
+ reads++; total_cycles += is486 ? 5 : 8;
+ ins++;
+ if (cycles < cycles_end)
+ break;
+ }
+ ins--;
+ if ((c>0) && (fv==tempz)) { cpu_state.pc=ipc; firstrepcycle=0; }
+ else firstrepcycle=1;
+ break;
+ case 0x3AF: /*REP SCASL*/
+ cpu_notreps++;
+// if (es==0xFFFFFFFF) pclog("Null selector REP SCASL %04X(%06X):%06X\n",CS,cs,pc);
+ tempz = (fv) ? 1 : 0;
+ while ((c > 0) && (fv == tempz))
+ {
+ templ=readmeml(es,EDI);
+ if (cpu_state.abrt) { flags=of; break; }
+ setsub32(EAX,templ);
+ tempz = (ZF_SET()) ? 1 : 0;
+ if (flags&D_FLAG) EDI-=4;
+ else EDI+=4;
+ c--;
+ cycles-=(is486)?5:8;
+ reads_l++; total_cycles += is486 ? 5 : 8;
+ ins++;
+ if (cycles < cycles_end)
+ break;
+ }
+ ins--;
+ if ((c>0) && (fv==tempz)) { cpu_state.pc=ipc; firstrepcycle=0; }
+ else firstrepcycle=1;
+ break;
+
+
+ default:
+ cpu_state.pc = ipc+1;
+ //pclog("Bad REP %02X %i\n", temp, rep32 >> 8);
+ break;
+ }
+ if (rep32&0x200) ECX=c;
+ else CX=c;
+ CPU_BLOCK_END();
+ PREFETCH_RUN(total_cycles, 1, -1, reads, reads_l, writes, writes_l, 0);
+ return cpu_state.abrt;
+//pclog("rep cpu_block_end=%d %p\n", cpu_block_end, (void *)&cpu_block_end);
+// if (output) pclog("%03X %03X\n",rep32,use32);
+}
+
+int checkio(int port)
+{
+ uint16_t t;
+ uint8_t d;
+ cpl_override = 1;
+ t = readmemw(tr.base, 0x66);
+ cpl_override = 0;
+// pclog("CheckIO 1 %08X %04x %02x\n",tr.base, eflags, _cs.access);
+ if (cpu_state.abrt) return 0;
+// pclog("CheckIO %04X %01X %01X %02X %04X %04X %08X ",CS,CPL,IOPL,port,t,t+(port>>3),tr.base+t+(port>>3));
+ if ((t+(port>>3))>tr.limit) return 1;
+ cpl_override = 1;
+ d = readmemb386l(0, tr.base + t + (port >> 3));
+// d=readmemb(tr.base,t+(port>>3));
+ cpl_override = 0;
+// pclog("%02X %02X\n",d,d&(1<<(port&7)));
+ return d&(1<<(port&7));
+}
+
+int xout=0;
+
+
+#define divexcp() { \
+ pclog("Divide exception at %04X(%06X):%04X\n",CS,cs,cpu_state.pc); \
+ x86_int(0); \
+}
+
+int divl(uint32_t val)
+{
+ if (val==0)
+ {
+ divexcp();
+ return 1;
+ }
+ uint64_t num=(((uint64_t)EDX)<<32)|EAX;
+ uint64_t quo=num/val;
+ uint32_t rem=num%val;
+ uint32_t quo32=(uint32_t)(quo&0xFFFFFFFF);
+ if (quo!=(uint64_t)quo32)
+ {
+ divexcp();
+ return 1;
+ }
+ EDX=rem;
+ EAX=quo32;
+ return 0;
+}
+int idivl(int32_t val)
+{
+ if (val==0)
+ {
+ divexcp();
+ return 1;
+ }
+ int64_t num=(((uint64_t)EDX)<<32)|EAX;
+ int64_t quo=num/val;
+ int32_t rem=num%val;
+ int32_t quo32=(int32_t)(quo&0xFFFFFFFF);
+ if (quo!=(int64_t)quo32)
+ {
+ divexcp();
+ return 1;
+ }
+ EDX=rem;
+ EAX=quo32;
+ return 0;
+}
+
+
+void cpu_386_flags_extract()
+{
+ flags_extract();
+}
+void cpu_386_flags_rebuild()
+{
+ flags_rebuild();
+}
+
+int oldi;
+
+uint32_t testr[9];
+int dontprint=0;
+
#define OP_TABLE(name) ops_ ## name
#define CLOCK_CYCLES(c) cycles -= (c)
#define CLOCK_CYCLES_ALWAYS(c) cycles -= (c)
@@ -238,425 +1328,423 @@ static void prefetch_flush()
#include "386_ops.h"
-#define CACHE_ON() (!(cr0 & (1 << 30)) && !(cpu_state.flags & T_FLAG))
+#define CACHE_ON() (!(cr0 & (1 << 30)) /*&& (cr0 & 1)*/ && !(flags & T_FLAG))
//#define CACHE_ON() 0
-int cpu_end_block_after_ins = 0;
-
-
-static inline void exec_interpreter(void)
-{
- cpu_block_end = 0;
- x86_was_reset = 0;
-// if (output) pclog("Interpret block at %04x:%04x %04x %04x %04x %04x %04x %04x %04x\n", CS, pc, AX, BX, CX, DX, SI, DI, SP);
- while (!cpu_block_end)
- {
- cpu_state.oldpc = cpu_state.pc;
- cpu_state.op32 = use32;
-
- cpu_state.ea_seg = &cpu_state.seg_ds;
- cpu_state.ssegs = 0;
-
- fetchdat = fastreadl(cs + cpu_state.pc);
-
- if (!cpu_state.abrt)
- {
- uint8_t opcode = fetchdat & 0xFF;
- fetchdat >>= 8;
- trap = cpu_state.flags & T_FLAG;
-
-// if (output == 3)
-// pclog("int %04X(%06X):%04X : %08X %08X %08X %08X %04X %04X %04X(%08X) %04X %04X %04X(%08X) %08X %08X %08X SP=%04X:%08X %02X %04X %i %08X %08X %i %i %02X %02X %02X %02X %02X %f %02X%02X %02X%02X\n",CS,cs,pc,EAX,EBX,ECX,EDX,CS,DS,ES,es,FS,GS,SS,ss,EDI,ESI,EBP,SS,ESP,opcode,flags,ins,0, ldt.base, CPL, stack32, pic.pend, pic.mask, pic.mask2, pic2.pend, pic2.mask, pit.c[0], ram[0x8f13f], ram[0x8f13e], ram[0x8f141], ram[0x8f140]);
-
- cpu_state.pc++;
- x86_opcodes[(opcode | cpu_state.op32) & 0x3ff](fetchdat);
- }
-
- if (((cs + cpu_state.pc) >> 12) != pccache)
- CPU_BLOCK_END();
-
- if (cpu_state.abrt)
- CPU_BLOCK_END();
- if (cpu_state.smi_pending)
- CPU_BLOCK_END();
- if (trap)
- CPU_BLOCK_END();
- if (nmi && nmi_enable && nmi_mask)
- CPU_BLOCK_END();
- if (cpu_end_block_after_ins)
- {
- cpu_end_block_after_ins--;
- if (!cpu_end_block_after_ins)
- CPU_BLOCK_END();
- }
-
- ins++;
- insc++;
- }
-
- if (trap)
- {
- trap = 0;
- cpu_state.oldpc = cpu_state.pc;
- x86_int(1);
- }
-
- cpu_end_block_after_ins = 0;
-}
-
-static inline void exec_recompiler(void)
-{
- uint32_t phys_addr = get_phys(cs+cpu_state.pc);
- int hash = HASH(phys_addr);
- codeblock_t *block = &codeblock[codeblock_hash[hash]];
- int valid_block = 0;
-
- if (!cpu_state.abrt)
- {
- page_t *page = &pages[phys_addr >> 12];
-
- /*Block must match current CS, PC, code segment size,
- and physical address. The physical address check will
- also catch any page faults at this stage*/
- valid_block = (block->pc == cs + cpu_state.pc) && (block->_cs == cs) &&
- (block->phys == phys_addr) && !((block->status ^ cpu_cur_status) & CPU_STATUS_FLAGS) &&
- ((block->status & cpu_cur_status & CPU_STATUS_MASK) == (cpu_cur_status & CPU_STATUS_MASK));
- if (!valid_block)
- {
- uint64_t mask = (uint64_t)1 << ((phys_addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK);
- int byte_offset = (phys_addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK;
- uint64_t byte_mask = 1ull << (PAGE_BYTE_MASK_MASK & 0x3f);
-
- if ((page->code_present_mask & mask) || (page->byte_code_present_mask[byte_offset] & byte_mask))
- {
- /*Walk page tree to see if we find the correct block*/
- codeblock_t *new_block = codeblock_tree_find(phys_addr, cs);
- if (new_block)
- {
- valid_block = (new_block->pc == cs + cpu_state.pc) && (new_block->_cs == cs) &&
- (new_block->phys == phys_addr) && !((new_block->status ^ cpu_cur_status) & CPU_STATUS_FLAGS) &&
- ((new_block->status & cpu_cur_status & CPU_STATUS_MASK) == (cpu_cur_status & CPU_STATUS_MASK));
- if (valid_block)
- {
- block = new_block;
- codeblock_hash[hash] = get_block_nr(block);
- }
- }
- }
- }
-
- if (valid_block && (block->page_mask & *block->dirty_mask))
- {
- codegen_check_flush(page, page->dirty_mask, phys_addr);
- if (block->pc == BLOCK_PC_INVALID)
- valid_block = 0;
- else if (block->flags & CODEBLOCK_IN_DIRTY_LIST)
- block->flags &= ~CODEBLOCK_WAS_RECOMPILED;
- }
- if (valid_block && block->page_mask2)
- {
- /*We don't want the second page to cause a page
- fault at this stage - that would break any
- code crossing a page boundary where the first
- page is present but the second isn't. Instead
- allow the first page to be interpreted and for
- the page fault to occur when the page boundary
- is actually crossed.*/
- uint32_t phys_addr_2 = get_phys_noabrt(block->pc + ((block->flags & CODEBLOCK_BYTE_MASK) ? 0x40 : 0x400));
- page_t *page_2 = &pages[phys_addr_2 >> 12];
- if ((block->phys_2 ^ phys_addr_2) & ~0xfff)
- valid_block = 0;
- else if (block->page_mask2 & *block->dirty_mask2)
- {
- codegen_check_flush(page_2, page_2->dirty_mask, phys_addr_2);
- if (block->pc == BLOCK_PC_INVALID)
- valid_block = 0;
- else if (block->flags & CODEBLOCK_IN_DIRTY_LIST)
- block->flags &= ~CODEBLOCK_WAS_RECOMPILED;
- }
- }
- if (valid_block && (block->flags & CODEBLOCK_IN_DIRTY_LIST))
- {
- block->flags &= ~CODEBLOCK_WAS_RECOMPILED;
- if (block->flags & CODEBLOCK_BYTE_MASK)
- block->flags |= CODEBLOCK_NO_IMMEDIATES;
- else
- block->flags |= CODEBLOCK_BYTE_MASK;
- }
- if (valid_block && (block->flags & CODEBLOCK_WAS_RECOMPILED) && (block->flags & CODEBLOCK_STATIC_TOP) && block->TOP != (cpu_state.TOP & 7))
- {
- /*FPU top-of-stack does not match the value this block was compiled
- with, re-compile using dynamic top-of-stack*/
- block->flags &= ~(CODEBLOCK_STATIC_TOP | CODEBLOCK_WAS_RECOMPILED);
- }
- }
-
- if (valid_block && (block->flags & CODEBLOCK_WAS_RECOMPILED))
- {
- void (*code)() = (void *)&block->data[BLOCK_START];
-
-// if (output) pclog("Run block at %04x:%04x %04x %04x %04x %04x %04x %04x ESP=%08x %04x %08x %08x %016llx %08x\n", CS, pc, AX, BX, CX, DX, SI, DI, ESP, BP, get_phys(cs+pc), block->phys, block->page_mask, block->endpc);
-
- inrecomp=1;
- code();
- inrecomp=0;
-
- cpu_recomp_blocks++;
- }
- else if (valid_block && !cpu_state.abrt)
- {
- uint32_t start_pc = cs+cpu_state.pc;
- const int max_block_size = (block->flags & CODEBLOCK_BYTE_MASK) ? ((128 - 25) - (start_pc & 0x3f)) : 1000;
-
- cpu_block_end = 0;
- x86_was_reset = 0;
-
- cpu_new_blocks++;
-
-#if defined(__APPLE__) && defined(__aarch64__)
- pthread_jit_write_protect_np(0);
-#endif
- codegen_block_start_recompile(block);
- codegen_in_recompile = 1;
-
-// if (output) pclog("Recompile block at %04x:%04x %04x %04x %04x %04x %04x %04x ESP=%04x %04x %02x%02x:%02x%02x %02x%02x:%02x%02x %02x%02x:%02x%02x\n", CS, pc, AX, BX, CX, DX, SI, DI, ESP, BP, ram[0x116330+0x6df4+0xa+3], ram[0x116330+0x6df4+0xa+2], ram[0x116330+0x6df4+0xa+1], ram[0x116330+0x6df4+0xa+0], ram[0x11d136+3],ram[0x11d136+2],ram[0x11d136+1],ram[0x11d136+0], ram[(0x119abe)+0x3],ram[(0x119abe)+0x2],ram[(0x119abe)+0x1],ram[(0x119abe)+0x0]);
- while (!cpu_block_end)
- {
- cpu_state.oldpc = cpu_state.pc;
- cpu_state.op32 = use32;
-
- cpu_state.ea_seg = &cpu_state.seg_ds;
- cpu_state.ssegs = 0;
-
- fetchdat = fastreadl(cs + cpu_state.pc);
-
- if (!cpu_state.abrt)
- {
- uint8_t opcode = fetchdat & 0xFF;
- fetchdat >>= 8;
-
-// if (output == 3)
-// pclog("%04X(%06X):%04X : %08X %08X %08X %08X %04X %04X %04X(%08X) %04X %04X %04X(%08X) %08X %08X %08X SP=%04X:%08X %02X %04X %i %08X %08X %i %i %02X %02X %02X %02X %02X %08x %08x\n",CS,cs,pc,EAX,EBX,ECX,EDX,CS,DS,ES,es,FS,GS,SS,ss,EDI,ESI,EBP,SS,ESP,opcode,flags,ins,0, ldt.base, CPL, stack32, pic.pend, pic.mask, pic.mask2, pic2.pend, pic2.mask, cs+pc, pccache);
-
- cpu_state.pc++;
-
- codegen_generate_call(opcode, x86_opcodes[(opcode | cpu_state.op32) & 0x3ff], fetchdat, cpu_state.pc, cpu_state.pc-1);
-
- x86_opcodes[(opcode | cpu_state.op32) & 0x3ff](fetchdat);
-
- if (x86_was_reset)
- break;
- }
-
- /*Cap source code at 4000 bytes per block; this
- will prevent any block from spanning more than
- 2 pages. In practice this limit will never be
- hit, as host block size is only 2kB*/
- if (((cs+cpu_state.pc) - start_pc) >= max_block_size)
- CPU_BLOCK_END();
- if (cpu_state.flags & T_FLAG)
- CPU_BLOCK_END();
- if (cpu_state.smi_pending)
- CPU_BLOCK_END();
- if (nmi && nmi_enable && nmi_mask)
- CPU_BLOCK_END();
-
- if (cpu_end_block_after_ins)
- {
- cpu_end_block_after_ins--;
- if (!cpu_end_block_after_ins)
- CPU_BLOCK_END();
- }
-
- if (cpu_state.abrt)
- {
- if (!(cpu_state.abrt & ABRT_EXPECTED))
- codegen_block_remove();
- CPU_BLOCK_END();
- }
-
- ins++;
- insc++;
- }
- cpu_end_block_after_ins = 0;
-
- if ((!cpu_state.abrt || (cpu_state.abrt & ABRT_EXPECTED)) && !x86_was_reset)
- codegen_block_end_recompile(block);
-
- if (x86_was_reset)
- codegen_reset();
-
- codegen_in_recompile = 0;
-#if defined(__APPLE__) && defined(__aarch64__)
- pthread_jit_write_protect_np(1);
-#endif
- }
- else if (!cpu_state.abrt)
- {
- /*Mark block but do not recompile*/
- uint32_t start_pc = cs+cpu_state.pc;
- const int max_block_size = (block->flags & CODEBLOCK_BYTE_MASK) ? ((128 - 25) - (start_pc & 0x3f)) : 1000;
-
- cpu_block_end = 0;
- x86_was_reset = 0;
-
- codegen_block_init(phys_addr);
-
-// if (output) pclog("Recompile block at %04x:%04x %04x %04x %04x %04x %04x %04x ESP=%04x %04x %02x%02x:%02x%02x %02x%02x:%02x%02x %02x%02x:%02x%02x\n", CS, pc, AX, BX, CX, DX, SI, DI, ESP, BP, ram[0x116330+0x6df4+0xa+3], ram[0x116330+0x6df4+0xa+2], ram[0x116330+0x6df4+0xa+1], ram[0x116330+0x6df4+0xa+0], ram[0x11d136+3],ram[0x11d136+2],ram[0x11d136+1],ram[0x11d136+0], ram[(0x119abe)+0x3],ram[(0x119abe)+0x2],ram[(0x119abe)+0x1],ram[(0x119abe)+0x0]);
- while (!cpu_block_end)
- {
- cpu_state.oldpc = cpu_state.pc;
- cpu_state.op32 = use32;
-
- cpu_state.ea_seg = &cpu_state.seg_ds;
- cpu_state.ssegs = 0;
-
- codegen_endpc = (cs + cpu_state.pc) + 8;
- fetchdat = fastreadl(cs + cpu_state.pc);
-
- if (!cpu_state.abrt)
- {
- uint8_t opcode = fetchdat & 0xFF;
- fetchdat >>= 8;
-
-// if (output == 3)
-// pclog("%04X(%06X):%04X : %08X %08X %08X %08X %04X %04X %04X(%08X) %04X %04X %04X(%08X) %08X %08X %08X SP=%04X:%08X %02X %04X %i %08X %08X %i %i %02X %02X %02X %02X %02X %08x %08x\n",CS,cs,pc,EAX,EBX,ECX,EDX,CS,DS,ES,es,FS,GS,SS,ss,EDI,ESI,EBP,SS,ESP,opcode,flags,ins,0, ldt.base, CPL, stack32, pic.pend, pic.mask, pic.mask2, pic2.pend, pic2.mask, cs+pc, pccache);
-
- cpu_state.pc++;
-
- x86_opcodes[(opcode | cpu_state.op32) & 0x3ff](fetchdat);
-
- if (x86_was_reset)
- break;
- }
-
- /*Cap source code at 4000 bytes per block; this
- will prevent any block from spanning more than
- 2 pages. In practice this limit will never be
- hit, as host block size is only 2kB*/
- if (((cs+cpu_state.pc) - start_pc) >= max_block_size)
- CPU_BLOCK_END();
- if (cpu_state.flags & T_FLAG)
- CPU_BLOCK_END();
- if (cpu_state.smi_pending)
- CPU_BLOCK_END();
- if (nmi && nmi_enable && nmi_mask)
- CPU_BLOCK_END();
-
- if (cpu_end_block_after_ins)
- {
- cpu_end_block_after_ins--;
- if (!cpu_end_block_after_ins)
- CPU_BLOCK_END();
- }
-
- if (cpu_state.abrt)
- {
- if (!(cpu_state.abrt & ABRT_EXPECTED))
- codegen_block_remove();
- CPU_BLOCK_END();
- }
-
- ins++;
- insc++;
- }
- cpu_end_block_after_ins = 0;
-
-// if (!cpu_state.abrt && !x86_was_reset)
- if ((!cpu_state.abrt || (cpu_state.abrt & ABRT_EXPECTED)) && !x86_was_reset)
- codegen_block_end();
-
- if (x86_was_reset)
- codegen_reset();
- }
- else
- cpu_state.oldpc = cpu_state.pc;
-
-}
-
-
-int cycles_main = 0;
+static int cycles_main = 0;
void exec386_dynarec(int cycs)
{
uint8_t temp;
+ uint32_t addr;
int tempi;
int cycdiff;
int oldcyc;
- int cyc_period = cycs / 2000; /*5us*/
+//output = 3;
cycles_main += cycs;
while (cycles_main > 0)
{
int cycles_start;
- cycles += cyc_period;
+ cycles += 1000;
cycles_start = cycles;
- while (cycles>0)
+ timer_start_period(cycles << TIMER_SHIFT);
+// output=3;
+ while (cycles>0)
+ {
+ oldcs = CS;
+ cpu_state.oldpc = cpu_state.pc;
+ oldcpl = CPL;
+ cpu_state.op32 = use32;
+
+
+ cycdiff=0;
+ oldcyc=cycles;
+// if (output && CACHE_ON()) pclog("Block %04x:%04x %04x:%08x\n", CS, pc, SS,ESP);
+ if (!CACHE_ON()) /*Interpret block*/
{
- oldcyc=cycles;
-// if (output && CACHE_ON()) pclog("Block %04x:%04x %04x:%08x\n", CS, pc, SS,ESP);
- if (!CACHE_ON()) /*Interpret block*/
- exec_interpreter();
- else
- exec_recompiler();
-
- if (cpu_state.abrt)
+ cpu_block_end = 0;
+// if (output) pclog("Interpret block at %04x:%04x %04x %04x %04x %04x %04x %04x %04x\n", CS, pc, AX, BX, CX, DX, SI, DI, SP);
+ while (!cpu_block_end)
{
- flags_rebuild();
- tempi = cpu_state.abrt & ABRT_MASK;
- cpu_state.abrt = 0;
- x86_doabrt(tempi);
- if (cpu_state.abrt)
+ oldcs=CS;
+ cpu_state.oldpc = cpu_state.pc;
+ oldcpl=CPL;
+ cpu_state.op32 = use32;
+
+ cpu_state.ea_seg = &_ds;
+ cpu_state.ssegs = 0;
+
+ fetchdat = fastreadl(cs + cpu_state.pc);
+// if (!fetchdat)
+// fatal("Dead with cache off\n");
+ if (!cpu_state.abrt)
+ {
+ trap = flags & T_FLAG;
+ opcode = fetchdat & 0xFF;
+ fetchdat >>= 8;
+
+// if (output == 3)
+// pclog("int %04X(%06X):%04X : %08X %08X %08X %08X %04X %04X %04X(%08X) %04X %04X %04X(%08X) %08X %08X %08X SP=%04X:%08X %02X %04X %i %08X %08X %i %i %02X %02X %02X %02X %02X %f %02X%02X %02X%02X\n",CS,cs,pc,EAX,EBX,ECX,EDX,CS,DS,ES,es,FS,GS,SS,ss,EDI,ESI,EBP,SS,ESP,opcode,flags,ins,0, ldt.base, CPL, stack32, pic.pend, pic.mask, pic.mask2, pic2.pend, pic2.mask, pit.c[0], ram[0x8f13f], ram[0x8f13e], ram[0x8f141], ram[0x8f140]);
+
+ cpu_state.pc++;
+ x86_opcodes[(opcode | cpu_state.op32) & 0x3ff](fetchdat);
+ }
+
+ if (!use32) cpu_state.pc &= 0xffff;
+
+ if (((cs + cpu_state.pc) >> 12) != pccache)
+ CPU_BLOCK_END();
+
+/* if (ssegs)
{
- cpu_state.abrt = 0;
- cpu_state.pc = cpu_state.oldpc;
- pclog("Double fault %i\n", ins);
- pmodeint(8, 0);
- if (cpu_state.abrt)
+ ds=oldds;
+ ss=oldss;
+ ssegs=0;
+ }*/
+ if (cpu_state.abrt)
+ CPU_BLOCK_END();
+ if (trap)
+ CPU_BLOCK_END();
+
+ ins++;
+ insc++;
+
+/* if ((cs + pc) == 4)
+ fatal("4\n");*/
+/* if (ins >= 141400000)
+ output = 3;*/
+ }
+ }
+ else
+ {
+ uint32_t phys_addr = get_phys(cs+cpu_state.pc);
+ int hash = HASH(phys_addr);
+ codeblock_t *block = codeblock_hash[hash];
+ int valid_block = 0;
+ trap = 0;
+
+ if (block && !cpu_state.abrt)
+ {
+ page_t *page = &pages[phys_addr >> 12];
+
+ /*Block must match current CS, PC, code segment size,
+ and physical address. The physical address check will
+ also catch any page faults at this stage*/
+ valid_block = (block->pc == cs + cpu_state.pc) && (block->_cs == cs) &&
+ (block->use32 == use32) && (block->phys == phys_addr) && (block->stack32 == stack32);
+ if (!valid_block)
+ {
+ uint64_t mask = (uint64_t)1 << ((phys_addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK);
+
+ if (page->code_present_mask & mask)
+ {
+ /*Walk page tree to see if we find the correct block*/
+ codeblock_t *new_block = codeblock_tree_find(phys_addr, cs);
+ if (new_block)
{
- cpu_state.abrt = 0;
- softresetx86();
- cpu_set_edx();
- pclog("Triple fault - reset\n");
+ valid_block = (new_block->pc == cs + cpu_state.pc) && (new_block->_cs == cs) &&
+ (new_block->use32 == use32) && (new_block->phys == phys_addr) && (new_block->stack32 == stack32);
+ if (valid_block)
+ block = new_block;
}
}
}
-
- if (cpu_state.smi_pending)
+ if (valid_block && (block->page_mask & page->dirty_mask))
{
- cpu_state.smi_pending = 0;
- x86_smi_enter();
+ codegen_check_flush(page, page->dirty_mask, phys_addr);
+ page->dirty_mask = 0;
+ if (!block->pc)
+ valid_block = 0;
}
- else if (nmi && nmi_enable && nmi_mask)
+ if (valid_block && block->page_mask2)
{
- cpu_state.oldpc = cpu_state.pc;
-// pclog("NMI\n");
- x86_int(2);
- nmi_enable = 0;
- if (nmi_auto_clear)
- {
- nmi_auto_clear = 0;
- nmi = 0;
- }
- }
- else if ((cpu_state.flags & I_FLAG) && pic_intpending)
- {
- temp=picinterrupt();
- if (temp!=0xFF)
- {
- cpu_state.oldpc = cpu_state.pc;
- x86_int(temp);
-// pclog("IRQ %02X %04X:%04X %04X:%04X\n", temp, SS, SP, CS, pc);
- }
- }
+ /*We don't want the second page to cause a page
+ fault at this stage - that would break any
+ code crossing a page boundary where the first
+ page is present but the second isn't. Instead
+ allow the first page to be interpreted and for
+ the page fault to occur when the page boundary
+ is actually crossed.*/
+ uint32_t phys_addr_2 = get_phys_noabrt(block->endpc) & ~0xfff;
+ page_t *page_2 = &pages[phys_addr_2 >> 12];
- cycdiff=oldcyc-cycles;
- tsc += cycdiff;
+ if ((block->phys_2 ^ phys_addr_2) & ~0xfff)
+ valid_block = 0;
+ else if (block->page_mask2 & page_2->dirty_mask)
+ {
+ codegen_check_flush(page_2, page_2->dirty_mask, phys_addr_2);
+ page_2->dirty_mask = 0;
+ if (!block->pc)
+ valid_block = 0;
+ }
+ }
+ if (valid_block && block->was_recompiled && (block->flags & CODEBLOCK_STATIC_TOP) && block->TOP != cpu_state.TOP)
+ {
+ /*FPU top-of-stack does not match the value this block was compiled
+ with, re-compile using dynamic top-of-stack*/
+ block->flags &= ~CODEBLOCK_STATIC_TOP;
+ block->was_recompiled = 0;
+ }
}
-
- if (TIMER_VAL_LESS_THAN_VAL(timer_target, (uint32_t)tsc))
- timer_process();
+
+ if (valid_block && block->was_recompiled)
+ {
+ void (*code)() = (void *)&block->data[BLOCK_START];
+
+ codeblock_hash[hash] = block;
+// if (output) pclog("Run block at %04x:%04x %04x %04x %04x %04x %04x %04x ESP=%08x %04x %08x %08x %016llx %08x\n", CS, pc, AX, BX, CX, DX, SI, DI, ESP, BP, get_phys(cs+pc), block->phys, block->page_mask, block->endpc);
+
+inrecomp=1;
+ code();
+inrecomp=0;
+ if (!use32) cpu_state.pc &= 0xffff;
+// cpu_recomp_ins += block->ins;
+ cpu_recomp_blocks++;
+/* ins += codeblock_ins[index];
+ insc += codeblock_ins[index];*/
+/* pclog("Exit block now %04X:%04X\n", CS, pc);*/
+ }
+ else if (valid_block && !cpu_state.abrt)
+ {
+ uint32_t start_pc = cpu_state.pc;
+
+// pclog("Hash %08x %i\n", codeblock_hash_pc[HASH(cs + pc)], codeblock_page_dirty[(cs + pc) >> 12]);
+ cpu_block_end = 0;
+ x86_was_reset = 0;
+
+ cpu_new_blocks++;
+
+ codegen_block_start_recompile(block);
+ codegen_in_recompile = 1;
+
+// if (output) pclog("Recompile block at %04x:%04x %04x %04x %04x %04x %04x %04x ESP=%04x %04x %02x%02x:%02x%02x %02x%02x:%02x%02x %02x%02x:%02x%02x\n", CS, pc, AX, BX, CX, DX, SI, DI, ESP, BP, ram[0x116330+0x6df4+0xa+3], ram[0x116330+0x6df4+0xa+2], ram[0x116330+0x6df4+0xa+1], ram[0x116330+0x6df4+0xa+0], ram[0x11d136+3],ram[0x11d136+2],ram[0x11d136+1],ram[0x11d136+0], ram[(0x119abe)+0x3],ram[(0x119abe)+0x2],ram[(0x119abe)+0x1],ram[(0x119abe)+0x0]);
+ while (!cpu_block_end)
+ {
+ oldcs=CS;
+ cpu_state.oldpc = cpu_state.pc;
+ oldcpl=CPL;
+ cpu_state.op32 = use32;
+
+ cpu_state.ea_seg = &_ds;
+ cpu_state.ssegs = 0;
+
+ fetchdat = fastreadl(cs + cpu_state.pc);
+// if (fetchdat == 0xffffffff)
+// fatal("Dead ffffffff\n");
+// if (!fetchdat)
+// fatal("Dead\n");
+ if (!cpu_state.abrt)
+ {
+ trap = flags & T_FLAG;
+ opcode = fetchdat & 0xFF;
+ fetchdat >>= 8;
+
+// if (output == 3)
+// pclog("%04X(%06X):%04X : %08X %08X %08X %08X %04X %04X %04X(%08X) %04X %04X %04X(%08X) %08X %08X %08X SP=%04X:%08X %02X %04X %i %08X %08X %i %i %02X %02X %02X %02X %02X %08x %08x\n",CS,cs,pc,EAX,EBX,ECX,EDX,CS,DS,ES,es,FS,GS,SS,ss,EDI,ESI,EBP,SS,ESP,opcode,flags,ins,0, ldt.base, CPL, stack32, pic.pend, pic.mask, pic.mask2, pic2.pend, pic2.mask, cs+pc, pccache);
+
+ cpu_state.pc++;
+
+ codegen_generate_call(opcode, x86_opcodes[(opcode | cpu_state.op32) & 0x3ff], fetchdat, cpu_state.pc, cpu_state.pc-1);
+
+ x86_opcodes[(opcode | cpu_state.op32) & 0x3ff](fetchdat);
+
+ if (x86_was_reset)
+ break;
+ }
+
+ if (!use32) cpu_state.pc &= 0xffff;
+
+ /*Cap source code at 4000 bytes per block; this
+ will prevent any block from spanning more than
+ 2 pages. In practice this limit will never be
+ hit, as host block size is only 2kB*/
+ if ((cpu_state.pc - start_pc) > 4000)
+ CPU_BLOCK_END();
+
+ if (trap)
+ CPU_BLOCK_END();
+
+
+ if (cpu_state.abrt)
+ {
+ codegen_block_remove();
+ CPU_BLOCK_END();
+ }
+
+ ins++;
+ insc++;
+ }
+
+ if (!cpu_state.abrt && !x86_was_reset)
+ codegen_block_end_recompile(block);
+
+ if (x86_was_reset)
+ codegen_reset();
+
+ codegen_in_recompile = 0;
+// output &= ~2;
+ }
+ else if (!cpu_state.abrt)
+ {
+ /*Mark block but do not recompile*/
+ uint32_t start_pc = cpu_state.pc;
+
+// pclog("Hash %08x %i\n", codeblock_hash_pc[HASH(cs + pc)], codeblock_page_dirty[(cs + pc) >> 12]);
+ cpu_block_end = 0;
+ x86_was_reset = 0;
+
+// cpu_new_blocks++;
+
+ codegen_block_init(phys_addr);
+
+// if (output) pclog("Recompile block at %04x:%04x %04x %04x %04x %04x %04x %04x ESP=%04x %04x %02x%02x:%02x%02x %02x%02x:%02x%02x %02x%02x:%02x%02x\n", CS, pc, AX, BX, CX, DX, SI, DI, ESP, BP, ram[0x116330+0x6df4+0xa+3], ram[0x116330+0x6df4+0xa+2], ram[0x116330+0x6df4+0xa+1], ram[0x116330+0x6df4+0xa+0], ram[0x11d136+3],ram[0x11d136+2],ram[0x11d136+1],ram[0x11d136+0], ram[(0x119abe)+0x3],ram[(0x119abe)+0x2],ram[(0x119abe)+0x1],ram[(0x119abe)+0x0]);
+ while (!cpu_block_end)
+ {
+ oldcs=CS;
+ cpu_state.oldpc = cpu_state.pc;
+ oldcpl=CPL;
+ cpu_state.op32 = use32;
+
+ cpu_state.ea_seg = &_ds;
+ cpu_state.ssegs = 0;
+
+ codegen_endpc = (cs + cpu_state.pc) + 8;
+ fetchdat = fastreadl(cs + cpu_state.pc);
+
+ if (!cpu_state.abrt)
+ {
+ trap = flags & T_FLAG;
+ opcode = fetchdat & 0xFF;
+ fetchdat >>= 8;
+
+// if (output == 3)
+// pclog("%04X(%06X):%04X : %08X %08X %08X %08X %04X %04X %04X(%08X) %04X %04X %04X(%08X) %08X %08X %08X SP=%04X:%08X %02X %04X %i %08X %08X %i %i %02X %02X %02X %02X %02X %08x %08x\n",CS,cs,pc,EAX,EBX,ECX,EDX,CS,DS,ES,es,FS,GS,SS,ss,EDI,ESI,EBP,SS,ESP,opcode,flags,ins,0, ldt.base, CPL, stack32, pic.pend, pic.mask, pic.mask2, pic2.pend, pic2.mask, cs+pc, pccache);
+
+ cpu_state.pc++;
+
+ x86_opcodes[(opcode | cpu_state.op32) & 0x3ff](fetchdat);
+
+ if (x86_was_reset)
+ break;
+ }
+
+ if (!use32) cpu_state.pc &= 0xffff;
+
+ /*Cap source code at 4000 bytes per block; this
+ will prevent any block from spanning more than
+ 2 pages. In practice this limit will never be
+ hit, as host block size is only 2kB*/
+ if ((cpu_state.pc - start_pc) > 4000)
+ CPU_BLOCK_END();
+
+ if (trap)
+ CPU_BLOCK_END();
+
+
+ if (cpu_state.abrt)
+ {
+ codegen_block_remove();
+ CPU_BLOCK_END();
+ }
+
+ ins++;
+ insc++;
+ }
+
+ if (!cpu_state.abrt && !x86_was_reset)
+ codegen_block_end();
+
+ if (x86_was_reset)
+ codegen_reset();
+
+// output &= ~2;
+ }
+// if (output && (SP & 1))
+// fatal("odd SP\n");
+ }
+
+ cycdiff=oldcyc-cycles;
+ tsc += cycdiff;
+
+// timer_end_period(cycles);
+
+ if (cpu_state.abrt)
+ {
+ flags_rebuild();
+ tempi = cpu_state.abrt;
+ cpu_state.abrt = 0;
+ x86_doabrt(tempi);
+ if (cpu_state.abrt)
+ {
+ cpu_state.abrt = 0;
+ CS = oldcs;
+ cpu_state.pc = cpu_state.oldpc;
+ pclog("Double fault %i\n", ins);
+ pmodeint(8, 0);
+ if (cpu_state.abrt)
+ {
+ cpu_state.abrt = 0;
+ softresetx86();
+ cpu_set_edx();
+ pclog("Triple fault - reset\n");
+ }
+ }
+ }
+
+ if (trap)
+ {
+
+ flags_rebuild();
+// oldpc=pc;
+// oldcs=CS;
+ if (msw&1)
+ {
+ pmodeint(1,0);
+ }
+ else
+ {
+ writememw(ss,(SP-2)&0xFFFF,flags);
+ writememw(ss,(SP-4)&0xFFFF,CS);
+ writememw(ss,(SP-6)&0xFFFF,cpu_state.pc);
+ SP-=6;
+ addr = (1 << 2) + idt.base;
+ flags&=~I_FLAG;
+ flags&=~T_FLAG;
+ cpu_state.pc=readmemw(0,addr);
+ loadcs(readmemw(0,addr+2));
+ }
+ }
+ else if ((flags&I_FLAG) && pic_intpending)
+ {
+ temp=picinterrupt();
+ if (temp!=0xFF)
+ {
+// pclog("IRQ %02X %04X:%04X %04X:%04X\n", temp, SS, SP, CS, pc);
+ CPU_BLOCK_END();
+ flags_rebuild();
+ if (msw&1)
+ {
+ pmodeint(temp,0);
+ }
+ else
+ {
+ writememw(ss,(SP-2)&0xFFFF,flags);
+ writememw(ss,(SP-4)&0xFFFF,CS);
+ writememw(ss,(SP-6)&0xFFFF,cpu_state.pc);
+ SP-=6;
+ addr=temp<<2;
+ flags&=~I_FLAG;
+ flags&=~T_FLAG;
+ oxpc=cpu_state.pc;
+ cpu_state.pc=readmemw(0,addr);
+ loadcs(readmemw(0,addr+2));
+ }
+ }
+ }
+ }
+ timer_end_period(cycles << TIMER_SHIFT);
cycles_main -= (cycles_start - cycles);
}
}
diff --git a/src/386_dynarec_ops.c b/src/386_dynarec_ops.c
index 249909f..bef86c8 100644
--- a/src/386_dynarec_ops.c
+++ b/src/386_dynarec_ops.c
@@ -1,11 +1,11 @@
#include "ibm.h"
#include "cpu.h"
+#include "386.h"
#include "x86.h"
#include "x86_ops.h"
#include "x87.h"
#include "x86_flags.h"
#include "mem.h"
-#include "nmi.h"
#include "pic.h"
#include "codegen.h"
@@ -14,10 +14,14 @@
#include "386_common.h"
+extern uint16_t *mod1add[2][8];
+extern uint32_t *mod1seg[8];
+
static inline void fetch_ea_32_long(uint32_t rmdat)
{
eal_r = eal_w = NULL;
easeg = cpu_state.ea_seg->base;
+ ea_rseg = cpu_state.ea_seg->seg;
if (easeg != 0xFFFFFFFF && ((easeg + cpu_state.eaaddr) & 0xFFF) <= 0xFFC)
{
uint32_t addr = easeg + cpu_state.eaaddr;
@@ -32,6 +36,7 @@ static inline void fetch_ea_16_long(uint32_t rmdat)
{
eal_r = eal_w = NULL;
easeg = cpu_state.ea_seg->base;
+ ea_rseg = cpu_state.ea_seg->seg;
if (easeg != 0xFFFFFFFF && ((easeg + cpu_state.eaaddr) & 0xFFF) <= 0xFFC)
{
uint32_t addr = easeg + cpu_state.eaaddr;
@@ -42,8 +47,8 @@ static inline void fetch_ea_16_long(uint32_t rmdat)
}
}
-#define fetch_ea_16(rmdat) cpu_state.pc++; if (cpu_mod != 3) fetch_ea_16_long(rmdat);
-#define fetch_ea_32(rmdat) cpu_state.pc++; if (cpu_mod != 3) fetch_ea_32_long(rmdat);
+#define fetch_ea_16(rmdat) cpu_state.pc++; if (cpu_mod != 3) fetch_ea_16_long(rmdat);
+#define fetch_ea_32(rmdat) cpu_state.pc++; if (cpu_mod != 3) fetch_ea_32_long(rmdat);
#define PREFETCH_RUN(instr_cycles, bytes, modrm, reads, read_ls, writes, write_ls, ea32)
@@ -51,8 +56,7 @@ static inline void fetch_ea_16_long(uint32_t rmdat)
#define PREFETCH_FLUSH()
#define OP_TABLE(name) dynarec_ops_ ## name
-/*Temporary*/
-#define CLOCK_CYCLES(c)
+#define CLOCK_CYCLES(c)
#define CLOCK_CYCLES_ALWAYS(c) cycles -= (c)
#include "386_ops.h"
diff --git a/src/386_ops.h b/src/386_ops.h
index d59132a..43a7cfd 100644
--- a/src/386_ops.h
+++ b/src/386_ops.h
@@ -104,22 +104,12 @@ static inline uint32_t POP_L_seg(uint32_t seg)
return ret;
}
-static int ILLEGAL(uint32_t fetchdat)
-{
- cpu_state.pc = cpu_state.oldpc;
-
-// fatal("Illegal instruction %08X\n", fetchdat);
- x86illegal();
- return 0;
-}
-
#include "x86_ops_arith.h"
#include "x86_ops_atomic.h"
#include "x86_ops_bcd.h"
#include "x86_ops_bit.h"
#include "x86_ops_bitscan.h"
#include "x86_ops_call.h"
-#include "x86_ops_cyrix.h"
#include "x86_ops_flag.h"
#include "x86_ops_fpu.h"
#include "x86_ops_inc_dec.h"
@@ -128,7 +118,6 @@ static int ILLEGAL(uint32_t fetchdat)
#include "x86_ops_jump.h"
#include "x86_ops_misc.h"
#include "x86_ops_mmx.h"
-#include "x86_ops_3dnow.h"
#include "x86_ops_mmx_arith.h"
#include "x86_ops_mmx_cmp.h"
#include "x86_ops_mmx_logic.h"
@@ -151,6 +140,15 @@ static int ILLEGAL(uint32_t fetchdat)
#include "x86_ops_string.h"
#include "x86_ops_xchg.h"
+static int ILLEGAL(uint32_t fetchdat)
+{
+ cpu_state.pc = cpu_state.oldpc;
+
+// fatal("Illegal instruction %08X\n", fetchdat);
+ x86illegal();
+ return 0;
+}
+
static int op0F_w_a16(uint32_t fetchdat)
{
int opcode = fetchdat & 0xff;
@@ -281,7 +279,7 @@ OpFn OP_TABLE(386_0f)[1024] =
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ op0F00_a16, op0F01_w_a16, opLAR_w_a16, opLSL_w_a16, ILLEGAL, ILLEGAL, opCLTS, opLOADALL386, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
+/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
@@ -303,7 +301,7 @@ OpFn OP_TABLE(386_0f)[1024] =
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ op0F00_a16, op0F01_l_a16, opLAR_l_a16, opLSL_l_a16, ILLEGAL, ILLEGAL, opCLTS, opLOADALL386, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
+/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
@@ -325,7 +323,7 @@ OpFn OP_TABLE(386_0f)[1024] =
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ op0F00_a32, op0F01_w_a32, opLAR_w_a32, opLSL_w_a32, ILLEGAL, ILLEGAL, opCLTS, opLOADALL386, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
+/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
@@ -347,7 +345,7 @@ OpFn OP_TABLE(386_0f)[1024] =
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ op0F00_a32, op0F01_l_a32, opLAR_l_a32, opLSL_l_a32, ILLEGAL, ILLEGAL, opCLTS, opLOADALL386, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
+/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
@@ -372,7 +370,7 @@ OpFn OP_TABLE(winchip_0f)[1024] =
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ op0F00_a16, op0F01_w_a16, opLAR_w_a16, opLSL_w_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
+/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
@@ -382,10 +380,10 @@ OpFn OP_TABLE(winchip_0f)[1024] =
/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
-/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a16, opSHLD_w_i_a16, opSHLD_w_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a16, opSHRD_w_i_a16, opSHRD_w_CL_a16,ILLEGAL, opIMUL_w_w_a16,
+/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a16, opSHLD_w_i_a16, opSHLD_w_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, ILLEGAL, opBTS_w_r_a16, opSHRD_w_i_a16, opSHRD_w_CL_a16,ILLEGAL, opIMUL_w_w_a16,
/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_w_a16,opLSS_w_a16, opBTR_w_r_a16, opLFS_w_a16, opLGS_w_a16, opMOVZX_w_b_a16,opMOVZX_w_w_a16,ILLEGAL, ILLEGAL, opBA_w_a16, opBTC_w_r_a16, opBSF_w_a16, opBSR_w_a16, opMOVSX_w_b_a16,ILLEGAL,
-/*c0*/ opXADD_b_a16, opXADD_w_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
+/*c0*/ opXADD_b_a16, opXADD_w_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
/*d0*/ ILLEGAL, opPSRLW_a16, opPSRLD_a16, opPSRLQ_a16, ILLEGAL, opPMULLW_a16, ILLEGAL, ILLEGAL, opPSUBUSB_a16, opPSUBUSW_a16, NULL, opPAND_a16, opPADDUSB_a16, opPADDUSW_a16, NULL, opPANDN_a16,
/*e0*/ ILLEGAL, opPSRAW_a16, opPSRAD_a16, ILLEGAL, ILLEGAL, opPMULHW_a16, ILLEGAL, ILLEGAL, opPSUBSB_a16, opPSUBSW_a16, NULL, opPOR_a16, opPADDSB_a16, opPADDSW_a16, NULL, opPXOR_a16,
/*f0*/ ILLEGAL, opPSLLW_a16, opPSLLD_a16, opPSLLQ_a16, ILLEGAL, opPMADDWD_a16, ILLEGAL, ILLEGAL, opPSUBB_a16, opPSUBW_a16, opPSUBD_a16, ILLEGAL, opPADDB_a16, opPADDW_a16, opPADDD_a16, ILLEGAL,
@@ -394,7 +392,7 @@ OpFn OP_TABLE(winchip_0f)[1024] =
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ op0F00_a16, op0F01_l_a16, opLAR_l_a16, opLSL_l_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
+/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
@@ -404,10 +402,10 @@ OpFn OP_TABLE(winchip_0f)[1024] =
/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
-/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a16, opSHLD_l_i_a16, opSHLD_l_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a16, opSHRD_l_i_a16, opSHRD_l_CL_a16,ILLEGAL, opIMUL_l_l_a16,
+/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a16, opSHLD_l_i_a16, opSHLD_l_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, ILLEGAL, opBTS_l_r_a16, opSHRD_l_i_a16, opSHRD_l_CL_a16,ILLEGAL, opIMUL_l_l_a16,
/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_l_a16,opLSS_l_a16, opBTR_l_r_a16, opLFS_l_a16, opLGS_l_a16, opMOVZX_l_b_a16,opMOVZX_l_w_a16,ILLEGAL, ILLEGAL, opBA_l_a16, opBTC_l_r_a16, opBSF_l_a16, opBSR_l_a16, opMOVSX_l_b_a16,opMOVSX_l_w_a16,
-/*c0*/ opXADD_b_a16, opXADD_l_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
+/*c0*/ opXADD_b_a16, opXADD_l_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
/*d0*/ ILLEGAL, opPSRLW_a16, opPSRLD_a16, opPSRLQ_a16, ILLEGAL, opPMULLW_a16, ILLEGAL, ILLEGAL, opPSUBUSB_a16, opPSUBUSW_a16, NULL, opPAND_a16, opPADDUSB_a16, opPADDUSW_a16, NULL, opPANDN_a16,
/*e0*/ ILLEGAL, opPSRAW_a16, opPSRAD_a16, ILLEGAL, ILLEGAL, opPMULHW_a16, ILLEGAL, ILLEGAL, opPSUBSB_a16, opPSUBSW_a16, NULL, opPOR_a16, opPADDSB_a16, opPADDSW_a16, NULL, opPXOR_a16,
/*f0*/ ILLEGAL, opPSLLW_a16, opPSLLD_a16, opPSLLQ_a16, ILLEGAL, opPMADDWD_a16, ILLEGAL, ILLEGAL, opPSUBB_a16, opPSUBW_a16, opPSUBD_a16, ILLEGAL, opPADDB_a16, opPADDW_a16, opPADDD_a16, ILLEGAL,
@@ -416,7 +414,7 @@ OpFn OP_TABLE(winchip_0f)[1024] =
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ op0F00_a32, op0F01_w_a32, opLAR_w_a32, opLSL_w_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
+/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
@@ -426,10 +424,10 @@ OpFn OP_TABLE(winchip_0f)[1024] =
/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
-/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a32, opSHLD_w_i_a32, opSHLD_w_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a32, opSHRD_w_i_a32, opSHRD_w_CL_a32,ILLEGAL, opIMUL_w_w_a32,
+/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a32, opSHLD_w_i_a32, opSHLD_w_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, ILLEGAL, opBTS_w_r_a32, opSHRD_w_i_a32, opSHRD_w_CL_a32,ILLEGAL, opIMUL_w_w_a32,
/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_w_a32,opLSS_w_a32, opBTR_w_r_a32, opLFS_w_a32, opLGS_w_a32, opMOVZX_w_b_a32,opMOVZX_w_w_a32,ILLEGAL, ILLEGAL, opBA_w_a32, opBTC_w_r_a32, opBSF_w_a32, opBSR_w_a32, opMOVSX_w_b_a32,ILLEGAL,
-/*c0*/ opXADD_b_a32, opXADD_w_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
+/*c0*/ opXADD_b_a32, opXADD_w_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
/*d0*/ ILLEGAL, opPSRLW_a32, opPSRLD_a32, opPSRLQ_a32, ILLEGAL, opPMULLW_a32, ILLEGAL, ILLEGAL, opPSUBUSB_a32, opPSUBUSW_a32, NULL, opPAND_a32, opPADDUSB_a32, opPADDUSW_a32, NULL, opPANDN_a32,
/*e0*/ ILLEGAL, opPSRAW_a32, opPSRAD_a32, ILLEGAL, ILLEGAL, opPMULHW_a32, ILLEGAL, ILLEGAL, opPSUBSB_a32, opPSUBSW_a32, NULL, opPOR_a32, opPADDSB_a32, opPADDSW_a32, NULL, opPXOR_a32,
/*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL,
@@ -438,7 +436,7 @@ OpFn OP_TABLE(winchip_0f)[1024] =
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ op0F00_a32, op0F01_l_a32, opLAR_l_a32, opLSL_l_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
+/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
@@ -448,107 +446,16 @@ OpFn OP_TABLE(winchip_0f)[1024] =
/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
-/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a32, opSHLD_l_i_a32, opSHLD_l_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a32, opSHRD_l_i_a32, opSHRD_l_CL_a32,ILLEGAL, opIMUL_l_l_a32,
+/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a32, opSHLD_l_i_a32, opSHLD_l_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, ILLEGAL, opBTS_l_r_a32, opSHRD_l_i_a32, opSHRD_l_CL_a32,ILLEGAL, opIMUL_l_l_a32,
/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_l_a32,opLSS_l_a32, opBTR_l_r_a32, opLFS_l_a32, opLGS_l_a32, opMOVZX_l_b_a32,opMOVZX_l_w_a32,ILLEGAL, ILLEGAL, opBA_l_a32, opBTC_l_r_a32, opBSF_l_a32, opBSR_l_a32, opMOVSX_l_b_a32,opMOVSX_l_w_a32,
-/*c0*/ opXADD_b_a32, opXADD_l_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
+/*c0*/ opXADD_b_a32, opXADD_l_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
/*d0*/ ILLEGAL, opPSRLW_a32, opPSRLD_a32, opPSRLQ_a32, ILLEGAL, opPMULLW_a32, ILLEGAL, ILLEGAL, opPSUBUSB_a32, opPSUBUSW_a32, NULL, opPAND_a32, opPADDUSB_a32, opPADDUSW_a32, NULL, opPANDN_a32,
/*e0*/ ILLEGAL, opPSRAW_a32, opPSRAD_a32, ILLEGAL, ILLEGAL, opPMULHW_a32, ILLEGAL, ILLEGAL, opPSUBSB_a32, opPSUBSW_a32, NULL, opPOR_a32, opPADDSB_a32, opPADDSW_a32, NULL, opPXOR_a32,
/*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL,
};
-OpFn OP_TABLE(winchip2_0f)[1024] =
-{
- /*16-bit data, 16-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ op0F00_a16, op0F01_w_a16, opLAR_w_a16, opLSL_w_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, opPREFETCH_a16, opFEMMS, op3DNOW_a16,
-/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*60*/ opPUNPCKLBW_a16,opPUNPCKLWD_a16,opPUNPCKLDQ_a16,opPACKSSWB_a16, opPCMPGTB_a16, opPCMPGTW_a16, opPCMPGTD_a16, opPACKUSWB_a16, opPUNPCKHBW_a16,opPUNPCKHWD_a16,opPUNPCKHDQ_a16,opPACKSSDW_a16, ILLEGAL, ILLEGAL, opMOVD_l_mm_a16,opMOVQ_q_mm_a16,
-/*70*/ ILLEGAL, opPSxxW_imm, opPSxxD_imm, opPSxxQ_imm, opPCMPEQB_a16, opPCMPEQW_a16, opPCMPEQD_a16, opEMMS, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opMOVD_mm_l_a16,opMOVQ_mm_q_a16,
-
-/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
-/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
-/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a16, opSHLD_w_i_a16, opSHLD_w_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a16, opSHRD_w_i_a16, opSHRD_w_CL_a16,ILLEGAL, opIMUL_w_w_a16,
-/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_w_a16,opLSS_w_a16, opBTR_w_r_a16, opLFS_w_a16, opLGS_w_a16, opMOVZX_w_b_a16,opMOVZX_w_w_a16,ILLEGAL, ILLEGAL, opBA_w_a16, opBTC_w_r_a16, opBSF_w_a16, opBSR_w_a16, opMOVSX_w_b_a16,ILLEGAL,
-
-/*c0*/ opXADD_b_a16, opXADD_w_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
-/*d0*/ ILLEGAL, opPSRLW_a16, opPSRLD_a16, opPSRLQ_a16, ILLEGAL, opPMULLW_a16, ILLEGAL, ILLEGAL, opPSUBUSB_a16, opPSUBUSW_a16, NULL, opPAND_a16, opPADDUSB_a16, opPADDUSW_a16, NULL, opPANDN_a16,
-/*e0*/ ILLEGAL, opPSRAW_a16, opPSRAD_a16, ILLEGAL, ILLEGAL, opPMULHW_a16, ILLEGAL, ILLEGAL, opPSUBSB_a16, opPSUBSW_a16, NULL, opPOR_a16, opPADDSB_a16, opPADDSW_a16, NULL, opPXOR_a16,
-/*f0*/ ILLEGAL, opPSLLW_a16, opPSLLD_a16, opPSLLQ_a16, ILLEGAL, opPMADDWD_a16, ILLEGAL, ILLEGAL, opPSUBB_a16, opPSUBW_a16, opPSUBD_a16, ILLEGAL, opPADDB_a16, opPADDW_a16, opPADDD_a16, ILLEGAL,
-
- /*32-bit data, 16-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ op0F00_a16, op0F01_l_a16, opLAR_l_a16, opLSL_l_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, opPREFETCH_a16, opFEMMS, op3DNOW_a16,
-/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*60*/ opPUNPCKLBW_a16,opPUNPCKLWD_a16,opPUNPCKLDQ_a16,opPACKSSWB_a16, opPCMPGTB_a16, opPCMPGTW_a16, opPCMPGTD_a16, opPACKUSWB_a16, opPUNPCKHBW_a16,opPUNPCKHWD_a16,opPUNPCKHDQ_a16,opPACKSSDW_a16, ILLEGAL, ILLEGAL, opMOVD_l_mm_a16,opMOVQ_q_mm_a16,
-/*70*/ ILLEGAL, opPSxxW_imm, opPSxxD_imm, opPSxxQ_imm, opPCMPEQB_a16, opPCMPEQW_a16, opPCMPEQD_a16, opEMMS, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opMOVD_mm_l_a16,opMOVQ_mm_q_a16,
-
-/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
-/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
-/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a16, opSHLD_l_i_a16, opSHLD_l_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a16, opSHRD_l_i_a16, opSHRD_l_CL_a16,ILLEGAL, opIMUL_l_l_a16,
-/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_l_a16,opLSS_l_a16, opBTR_l_r_a16, opLFS_l_a16, opLGS_l_a16, opMOVZX_l_b_a16,opMOVZX_l_w_a16,ILLEGAL, ILLEGAL, opBA_l_a16, opBTC_l_r_a16, opBSF_l_a16, opBSR_l_a16, opMOVSX_l_b_a16,opMOVSX_l_w_a16,
-
-/*c0*/ opXADD_b_a16, opXADD_l_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
-/*d0*/ ILLEGAL, opPSRLW_a16, opPSRLD_a16, opPSRLQ_a16, ILLEGAL, opPMULLW_a16, ILLEGAL, ILLEGAL, opPSUBUSB_a16, opPSUBUSW_a16, NULL, opPAND_a16, opPADDUSB_a16, opPADDUSW_a16, NULL, opPANDN_a16,
-/*e0*/ ILLEGAL, opPSRAW_a16, opPSRAD_a16, ILLEGAL, ILLEGAL, opPMULHW_a16, ILLEGAL, ILLEGAL, opPSUBSB_a16, opPSUBSW_a16, NULL, opPOR_a16, opPADDSB_a16, opPADDSW_a16, NULL, opPXOR_a16,
-/*f0*/ ILLEGAL, opPSLLW_a16, opPSLLD_a16, opPSLLQ_a16, ILLEGAL, opPMADDWD_a16, ILLEGAL, ILLEGAL, opPSUBB_a16, opPSUBW_a16, opPSUBD_a16, ILLEGAL, opPADDB_a16, opPADDW_a16, opPADDD_a16, ILLEGAL,
-
- /*16-bit data, 32-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ op0F00_a32, op0F01_w_a32, opLAR_w_a32, opLSL_w_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, opPREFETCH_a32, opFEMMS, op3DNOW_a32,
-/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*60*/ opPUNPCKLBW_a32,opPUNPCKLWD_a32,opPUNPCKLDQ_a32,opPACKSSWB_a32, opPCMPGTB_a32, opPCMPGTW_a32, opPCMPGTD_a32, opPACKUSWB_a32, opPUNPCKHBW_a32,opPUNPCKHWD_a32,opPUNPCKHDQ_a32,opPACKSSDW_a32, ILLEGAL, ILLEGAL, opMOVD_l_mm_a32,opMOVQ_q_mm_a32,
-/*70*/ ILLEGAL, opPSxxW_imm, opPSxxD_imm, opPSxxQ_imm, opPCMPEQB_a32, opPCMPEQW_a32, opPCMPEQD_a32, opEMMS, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opMOVD_mm_l_a32,opMOVQ_mm_q_a32,
-
-/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
-/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
-/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a32, opSHLD_w_i_a32, opSHLD_w_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a32, opSHRD_w_i_a32, opSHRD_w_CL_a32,ILLEGAL, opIMUL_w_w_a32,
-/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_w_a32,opLSS_w_a32, opBTR_w_r_a32, opLFS_w_a32, opLGS_w_a32, opMOVZX_w_b_a32,opMOVZX_w_w_a32,ILLEGAL, ILLEGAL, opBA_w_a32, opBTC_w_r_a32, opBSF_w_a32, opBSR_w_a32, opMOVSX_w_b_a32,ILLEGAL,
-
-/*c0*/ opXADD_b_a32, opXADD_w_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
-/*d0*/ ILLEGAL, opPSRLW_a32, opPSRLD_a32, opPSRLQ_a32, ILLEGAL, opPMULLW_a32, ILLEGAL, ILLEGAL, opPSUBUSB_a32, opPSUBUSW_a32, NULL, opPAND_a32, opPADDUSB_a32, opPADDUSW_a32, NULL, opPANDN_a32,
-/*e0*/ ILLEGAL, opPSRAW_a32, opPSRAD_a32, ILLEGAL, ILLEGAL, opPMULHW_a32, ILLEGAL, ILLEGAL, opPSUBSB_a32, opPSUBSW_a32, NULL, opPOR_a32, opPADDSB_a32, opPADDSW_a32, NULL, opPXOR_a32,
-/*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL,
-
- /*32-bit data, 32-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ op0F00_a32, op0F01_l_a32, opLAR_l_a32, opLSL_l_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, opPREFETCH_a32, opFEMMS, op3DNOW_a32,
-/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*60*/ opPUNPCKLBW_a32,opPUNPCKLWD_a32,opPUNPCKLDQ_a32,opPACKSSWB_a32, opPCMPGTB_a32, opPCMPGTW_a32, opPCMPGTD_a32, opPACKUSWB_a32, opPUNPCKHBW_a32,opPUNPCKHWD_a32,opPUNPCKHDQ_a32,opPACKSSDW_a32, ILLEGAL, ILLEGAL, opMOVD_l_mm_a32,opMOVQ_q_mm_a32,
-/*70*/ ILLEGAL, opPSxxW_imm, opPSxxD_imm, opPSxxQ_imm, opPCMPEQB_a32, opPCMPEQW_a32, opPCMPEQD_a32, opEMMS, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opMOVD_mm_l_a32,opMOVQ_mm_q_a32,
-
-/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
-/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
-/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a32, opSHLD_l_i_a32, opSHLD_l_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a32, opSHRD_l_i_a32, opSHRD_l_CL_a32,ILLEGAL, opIMUL_l_l_a32,
-/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_l_a32,opLSS_l_a32, opBTR_l_r_a32, opLFS_l_a32, opLGS_l_a32, opMOVZX_l_b_a32,opMOVZX_l_w_a32,ILLEGAL, ILLEGAL, opBA_l_a32, opBTC_l_r_a32, opBSF_l_a32, opBSR_l_a32, opMOVSX_l_b_a32,opMOVSX_l_w_a32,
-
-/*c0*/ opXADD_b_a32, opXADD_l_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
-/*d0*/ ILLEGAL, opPSRLW_a32, opPSRLD_a32, opPSRLQ_a32, ILLEGAL, opPMULLW_a32, ILLEGAL, ILLEGAL, opPSUBUSB_a32, opPSUBUSW_a32, NULL, opPAND_a32, opPADDUSB_a32, opPADDUSW_a32, NULL, opPANDN_a32,
-/*e0*/ ILLEGAL, opPSRAW_a32, opPSRAD_a32, ILLEGAL, ILLEGAL, opPMULHW_a32, ILLEGAL, ILLEGAL, opPSUBSB_a32, opPSUBSW_a32, NULL, opPOR_a32, opPADDSB_a32, opPADDSW_a32, NULL, opPXOR_a32,
-/*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL,
-};
-
-OpFn OP_TABLE(pentium_0f)[1024] =
+OpFn OP_TABLE(pentium_0f)[1024] =
{
/*16-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
@@ -564,7 +471,7 @@ OpFn OP_TABLE(pentium_0f)[1024] =
/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
-/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a16, opSHLD_w_i_a16, opSHLD_w_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a16, opSHRD_w_i_a16, opSHRD_w_CL_a16,ILLEGAL, opIMUL_w_w_a16,
+/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a16, opSHLD_w_i_a16, opSHLD_w_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, ILLEGAL, opBTS_w_r_a16, opSHRD_w_i_a16, opSHRD_w_CL_a16,ILLEGAL, opIMUL_w_w_a16,
/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_w_a16,opLSS_w_a16, opBTR_w_r_a16, opLFS_w_a16, opLGS_w_a16, opMOVZX_w_b_a16,opMOVZX_w_w_a16,ILLEGAL, ILLEGAL, opBA_w_a16, opBTC_w_r_a16, opBSF_w_a16, opBSR_w_a16, opMOVSX_w_b_a16,ILLEGAL,
/*c0*/ opXADD_b_a16, opXADD_w_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
@@ -586,7 +493,7 @@ OpFn OP_TABLE(pentium_0f)[1024] =
/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
-/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a16, opSHLD_l_i_a16, opSHLD_l_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a16, opSHRD_l_i_a16, opSHRD_l_CL_a16,ILLEGAL, opIMUL_l_l_a16,
+/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a16, opSHLD_l_i_a16, opSHLD_l_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, ILLEGAL, opBTS_l_r_a16, opSHRD_l_i_a16, opSHRD_l_CL_a16,ILLEGAL, opIMUL_l_l_a16,
/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_l_a16,opLSS_l_a16, opBTR_l_r_a16, opLFS_l_a16, opLGS_l_a16, opMOVZX_l_b_a16,opMOVZX_l_w_a16,ILLEGAL, ILLEGAL, opBA_l_a16, opBTC_l_r_a16, opBSF_l_a16, opBSR_l_a16, opMOVSX_l_b_a16,opMOVSX_l_w_a16,
/*c0*/ opXADD_b_a16, opXADD_l_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
@@ -608,7 +515,7 @@ OpFn OP_TABLE(pentium_0f)[1024] =
/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
-/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a32, opSHLD_w_i_a32, opSHLD_w_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a32, opSHRD_w_i_a32, opSHRD_w_CL_a32,ILLEGAL, opIMUL_w_w_a32,
+/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a32, opSHLD_w_i_a32, opSHLD_w_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, ILLEGAL, opBTS_w_r_a32, opSHRD_w_i_a32, opSHRD_w_CL_a32,ILLEGAL, opIMUL_w_w_a32,
/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_w_a32,opLSS_w_a32, opBTR_w_r_a32, opLFS_w_a32, opLGS_w_a32, opMOVZX_w_b_a32,opMOVZX_w_w_a32,ILLEGAL, ILLEGAL, opBA_w_a32, opBTC_w_r_a32, opBSF_w_a32, opBSR_w_a32, opMOVSX_w_b_a32,ILLEGAL,
/*c0*/ opXADD_b_a32, opXADD_w_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
@@ -630,7 +537,7 @@ OpFn OP_TABLE(pentium_0f)[1024] =
/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
-/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a32, opSHLD_l_i_a32, opSHLD_l_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a32, opSHRD_l_i_a32, opSHRD_l_CL_a32,ILLEGAL, opIMUL_l_l_a32,
+/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a32, opSHLD_l_i_a32, opSHLD_l_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, ILLEGAL, opBTS_l_r_a32, opSHRD_l_i_a32, opSHRD_l_CL_a32,ILLEGAL, opIMUL_l_l_a32,
/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_l_a32,opLSS_l_a32, opBTR_l_r_a32, opLFS_l_a32, opLGS_l_a32, opMOVZX_l_b_a32,opMOVZX_l_w_a32,ILLEGAL, ILLEGAL, opBA_l_a32, opBTC_l_r_a32, opBSF_l_a32, opBSR_l_a32, opMOVSX_l_b_a32,opMOVSX_l_w_a32,
/*c0*/ opXADD_b_a32, opXADD_l_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
@@ -639,98 +546,7 @@ OpFn OP_TABLE(pentium_0f)[1024] =
/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
};
-OpFn OP_TABLE(c6x86_0f)[1024] =
-{
- /*16-bit data, 16-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ op0F00_a16, op0F01_w_a16, opLAR_w_a16, opLSL_w_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*60*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opSVDC_a16, opRSDC_a16, opSVLDT_a16, opRSLDT_a16, opSVTS_a16, opRSTS_a16, opSMINT, ILLEGAL,
-
-/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
-/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
-/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a16, opSHLD_w_i_a16, opSHLD_w_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a16, opSHRD_w_i_a16, opSHRD_w_CL_a16,ILLEGAL, opIMUL_w_w_a16,
-/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_w_a16,opLSS_w_a16, opBTR_w_r_a16, opLFS_w_a16, opLGS_w_a16, opMOVZX_w_b_a16,opMOVZX_w_w_a16,ILLEGAL, ILLEGAL, opBA_w_a16, opBTC_w_r_a16, opBSF_w_a16, opBSR_w_a16, opMOVSX_w_b_a16,ILLEGAL,
-
-/*c0*/ opXADD_b_a16, opXADD_w_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
-/*d0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*e0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
- /*32-bit data, 16-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ op0F00_a16, op0F01_l_a16, opLAR_l_a16, opLSL_l_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*60*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opSVDC_a16, opRSDC_a16, opSVLDT_a16, opRSLDT_a16, opSVTS_a16, opRSTS_a16, opSMINT, ILLEGAL,
-
-/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
-/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
-/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a16, opSHLD_l_i_a16, opSHLD_l_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a16, opSHRD_l_i_a16, opSHRD_l_CL_a16,ILLEGAL, opIMUL_l_l_a16,
-/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_l_a16,opLSS_l_a16, opBTR_l_r_a16, opLFS_l_a16, opLGS_l_a16, opMOVZX_l_b_a16,opMOVZX_l_w_a16,ILLEGAL, ILLEGAL, opBA_l_a16, opBTC_l_r_a16, opBSF_l_a16, opBSR_l_a16, opMOVSX_l_b_a16,opMOVSX_l_w_a16,
-
-/*c0*/ opXADD_b_a16, opXADD_l_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
-/*d0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*e0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
- /*16-bit data, 32-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ op0F00_a32, op0F01_w_a32, opLAR_w_a32, opLSL_w_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*60*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opSVDC_a32, opRSDC_a32, opSVLDT_a32, opRSLDT_a32, opSVTS_a32, opRSTS_a32, opSMINT, ILLEGAL,
-
-/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
-/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
-/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a32, opSHLD_w_i_a32, opSHLD_w_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a32, opSHRD_w_i_a32, opSHRD_w_CL_a32,ILLEGAL, opIMUL_w_w_a32,
-/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_w_a32,opLSS_w_a32, opBTR_w_r_a32, opLFS_w_a32, opLGS_w_a32, opMOVZX_w_b_a32,opMOVZX_w_w_a32,ILLEGAL, ILLEGAL, opBA_w_a32, opBTC_w_r_a32, opBSF_w_a32, opBSR_w_a32, opMOVSX_w_b_a32,ILLEGAL,
-
-/*c0*/ opXADD_b_a32, opXADD_w_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
-/*d0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*e0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
- /*32-bit data, 32-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ op0F00_a32, op0F01_l_a32, opLAR_l_a32, opLSL_l_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*60*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opSVDC_a32, opRSDC_a32, opSVLDT_a32, opRSLDT_a32, opSVTS_a32, opRSTS_a32, opSMINT, ILLEGAL,
-
-/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
-/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
-/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a32, opSHLD_l_i_a32, opSHLD_l_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a32, opSHRD_l_i_a32, opSHRD_l_CL_a32,ILLEGAL, opIMUL_l_l_a32,
-/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_l_a32,opLSS_l_a32, opBTR_l_r_a32, opLFS_l_a32, opLGS_l_a32, opMOVZX_l_b_a32,opMOVZX_l_w_a32,ILLEGAL, ILLEGAL, opBA_l_a32, opBTC_l_r_a32, opBSF_l_a32, opBSR_l_a32, opMOVSX_l_b_a32,opMOVSX_l_w_a32,
-
-/*c0*/ opXADD_b_a32, opXADD_l_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
-/*d0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*e0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-};
-
-OpFn OP_TABLE(pentiummmx_0f)[1024] =
+OpFn OP_TABLE(pentiummmx_0f)[1024] =
{
/*16-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
@@ -746,7 +562,7 @@ OpFn OP_TABLE(pentiummmx_0f)[1024] =
/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
-/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a16, opSHLD_w_i_a16, opSHLD_w_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a16, opSHRD_w_i_a16, opSHRD_w_CL_a16,ILLEGAL, opIMUL_w_w_a16,
+/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a16, opSHLD_w_i_a16, opSHLD_w_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, ILLEGAL, opBTS_w_r_a16, opSHRD_w_i_a16, opSHRD_w_CL_a16,ILLEGAL, opIMUL_w_w_a16,
/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_w_a16,opLSS_w_a16, opBTR_w_r_a16, opLFS_w_a16, opLGS_w_a16, opMOVZX_w_b_a16,opMOVZX_w_w_a16,ILLEGAL, ILLEGAL, opBA_w_a16, opBTC_w_r_a16, opBSF_w_a16, opBSR_w_a16, opMOVSX_w_b_a16,ILLEGAL,
/*c0*/ opXADD_b_a16, opXADD_w_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
@@ -768,7 +584,7 @@ OpFn OP_TABLE(pentiummmx_0f)[1024] =
/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
-/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a16, opSHLD_l_i_a16, opSHLD_l_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a16, opSHRD_l_i_a16, opSHRD_l_CL_a16,ILLEGAL, opIMUL_l_l_a16,
+/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a16, opSHLD_l_i_a16, opSHLD_l_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, ILLEGAL, opBTS_l_r_a16, opSHRD_l_i_a16, opSHRD_l_CL_a16,ILLEGAL, opIMUL_l_l_a16,
/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_l_a16,opLSS_l_a16, opBTR_l_r_a16, opLFS_l_a16, opLGS_l_a16, opMOVZX_l_b_a16,opMOVZX_l_w_a16,ILLEGAL, ILLEGAL, opBA_l_a16, opBTC_l_r_a16, opBSF_l_a16, opBSR_l_a16, opMOVSX_l_b_a16,opMOVSX_l_w_a16,
/*c0*/ opXADD_b_a16, opXADD_l_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
@@ -790,7 +606,7 @@ OpFn OP_TABLE(pentiummmx_0f)[1024] =
/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
-/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a32, opSHLD_w_i_a32, opSHLD_w_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a32, opSHRD_w_i_a32, opSHRD_w_CL_a32,ILLEGAL, opIMUL_w_w_a32,
+/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a32, opSHLD_w_i_a32, opSHLD_w_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, ILLEGAL, opBTS_w_r_a32, opSHRD_w_i_a32, opSHRD_w_CL_a32,ILLEGAL, opIMUL_w_w_a32,
/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_w_a32,opLSS_w_a32, opBTR_w_r_a32, opLFS_w_a32, opLGS_w_a32, opMOVZX_w_b_a32,opMOVZX_w_w_a32,ILLEGAL, ILLEGAL, opBA_w_a32, opBTC_w_r_a32, opBSF_w_a32, opBSR_w_a32, opMOVSX_w_b_a32,ILLEGAL,
/*c0*/ opXADD_b_a32, opXADD_w_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
@@ -812,7 +628,7 @@ OpFn OP_TABLE(pentiummmx_0f)[1024] =
/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
-/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a32, opSHLD_l_i_a32, opSHLD_l_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a32, opSHRD_l_i_a32, opSHRD_l_CL_a32,ILLEGAL, opIMUL_l_l_a32,
+/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a32, opSHLD_l_i_a32, opSHLD_l_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, ILLEGAL, opBTS_l_r_a32, opSHRD_l_i_a32, opSHRD_l_CL_a32,ILLEGAL, opIMUL_l_l_a32,
/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_l_a32,opLSS_l_a32, opBTR_l_r_a32, opLFS_l_a32, opLGS_l_a32, opMOVZX_l_b_a32,opMOVZX_l_w_a32,ILLEGAL, ILLEGAL, opBA_l_a32, opBTC_l_r_a32, opBSF_l_a32, opBSR_l_a32, opMOVSX_l_b_a32,opMOVSX_l_w_a32,
/*c0*/ opXADD_b_a32, opXADD_l_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
@@ -828,189 +644,7 @@ OpFn OP_TABLE(c6x86mx_0f)[1024] =
/*00*/ op0F00_a16, op0F01_w_a16, opLAR_w_a16, opLSL_w_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, ILLEGAL, ILLEGAL, opRDSHR_a16, opWRSHR_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*40*/ opCMOVO_w_a16, opCMOVNO_w_a16, opCMOVB_w_a16, opCMOVNB_w_a16, opCMOVE_w_a16, opCMOVNE_w_a16, opCMOVBE_w_a16, opCMOVNBE_w_a16,opCMOVS_w_a16, opCMOVNS_w_a16, opCMOVP_w_a16, opCMOVNP_w_a16, opCMOVL_w_a16, opCMOVNL_w_a16, opCMOVLE_w_a16, opCMOVNLE_w_a16,
-/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*60*/ opPUNPCKLBW_a16,opPUNPCKLWD_a16,opPUNPCKLDQ_a16,opPACKSSWB_a16, opPCMPGTB_a16, opPCMPGTW_a16, opPCMPGTD_a16, opPACKUSWB_a16, opPUNPCKHBW_a16,opPUNPCKHWD_a16,opPUNPCKHDQ_a16,opPACKSSDW_a16, ILLEGAL, ILLEGAL, opMOVD_l_mm_a16,opMOVQ_q_mm_a16,
-/*70*/ ILLEGAL, opPSxxW_imm, opPSxxD_imm, opPSxxQ_imm, opPCMPEQB_a16, opPCMPEQW_a16, opPCMPEQD_a16, opEMMS, opSVDC_a16, opRSDC_a16, opSVLDT_a16, opRSLDT_a16, opSVTS_a16, opRSTS_a16, opMOVD_mm_l_a16_cx,opMOVQ_mm_q_a16,
-
-/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
-/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
-/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a16, opSHLD_w_i_a16, opSHLD_w_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a16, opSHRD_w_i_a16, opSHRD_w_CL_a16,ILLEGAL, opIMUL_w_w_a16,
-/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_w_a16,opLSS_w_a16, opBTR_w_r_a16, opLFS_w_a16, opLGS_w_a16, opMOVZX_w_b_a16,opMOVZX_w_w_a16,ILLEGAL, ILLEGAL, opBA_w_a16, opBTC_w_r_a16, opBSF_w_a16, opBSR_w_a16, opMOVSX_w_b_a16,ILLEGAL,
-
-/*c0*/ opXADD_b_a16, opXADD_w_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
-/*d0*/ ILLEGAL, opPSRLW_a16, opPSRLD_a16, opPSRLQ_a16, ILLEGAL, opPMULLW_a16, ILLEGAL, ILLEGAL, opPSUBUSB_a16, opPSUBUSW_a16, NULL, opPAND_a16, opPADDUSB_a16, opPADDUSW_a16, NULL, opPANDN_a16,
-/*e0*/ ILLEGAL, opPSRAW_a16, opPSRAD_a16, ILLEGAL, ILLEGAL, opPMULHW_a16, ILLEGAL, ILLEGAL, opPSUBSB_a16, opPSUBSW_a16, NULL, opPOR_a16, opPADDSB_a16, opPADDSW_a16, NULL, opPXOR_a16,
-/*f0*/ ILLEGAL, opPSLLW_a16, opPSLLD_a16, opPSLLQ_a16, ILLEGAL, opPMADDWD_a16, ILLEGAL, ILLEGAL, opPSUBB_a16, opPSUBW_a16, opPSUBD_a16, ILLEGAL, opPADDB_a16, opPADDW_a16, opPADDD_a16, ILLEGAL,
-
- /*32-bit data, 16-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ op0F00_a16, op0F01_l_a16, opLAR_l_a16, opLSL_l_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, ILLEGAL, ILLEGAL, opRDSHR_a16, opWRSHR_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*40*/ opCMOVO_l_a16, opCMOVNO_l_a16, opCMOVB_l_a16, opCMOVNB_l_a16, opCMOVE_l_a16, opCMOVNE_l_a16, opCMOVBE_l_a16, opCMOVNBE_l_a16,opCMOVS_l_a16, opCMOVNS_l_a16, opCMOVP_l_a16, opCMOVNP_l_a16, opCMOVL_l_a16, opCMOVNL_l_a16, opCMOVLE_l_a16, opCMOVNLE_l_a16,
-/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*60*/ opPUNPCKLBW_a16,opPUNPCKLWD_a16,opPUNPCKLDQ_a16,opPACKSSWB_a16, opPCMPGTB_a16, opPCMPGTW_a16, opPCMPGTD_a16, opPACKUSWB_a16, opPUNPCKHBW_a16,opPUNPCKHWD_a16,opPUNPCKHDQ_a16,opPACKSSDW_a16, ILLEGAL, ILLEGAL, opMOVD_l_mm_a16,opMOVQ_q_mm_a16,
-/*70*/ ILLEGAL, opPSxxW_imm, opPSxxD_imm, opPSxxQ_imm, opPCMPEQB_a16, opPCMPEQW_a16, opPCMPEQD_a16, opEMMS, opSVDC_a16, opRSDC_a16, opSVLDT_a16, opRSLDT_a16, opSVTS_a16, opRSTS_a16, opMOVD_mm_l_a16_cx,opMOVQ_mm_q_a16,
-
-/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
-/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
-/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a16, opSHLD_l_i_a16, opSHLD_l_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a16, opSHRD_l_i_a16, opSHRD_l_CL_a16,ILLEGAL, opIMUL_l_l_a16,
-/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_l_a16,opLSS_l_a16, opBTR_l_r_a16, opLFS_l_a16, opLGS_l_a16, opMOVZX_l_b_a16,opMOVZX_l_w_a16,ILLEGAL, ILLEGAL, opBA_l_a16, opBTC_l_r_a16, opBSF_l_a16, opBSR_l_a16, opMOVSX_l_b_a16,opMOVSX_l_w_a16,
-
-/*c0*/ opXADD_b_a16, opXADD_l_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
-/*d0*/ ILLEGAL, opPSRLW_a16, opPSRLD_a16, opPSRLQ_a16, ILLEGAL, opPMULLW_a16, ILLEGAL, ILLEGAL, opPSUBUSB_a16, opPSUBUSW_a16, NULL, opPAND_a16, opPADDUSB_a16, opPADDUSW_a16, NULL, opPANDN_a16,
-/*e0*/ ILLEGAL, opPSRAW_a16, opPSRAD_a16, ILLEGAL, ILLEGAL, opPMULHW_a16, ILLEGAL, ILLEGAL, opPSUBSB_a16, opPSUBSW_a16, NULL, opPOR_a16, opPADDSB_a16, opPADDSW_a16, NULL, opPXOR_a16,
-/*f0*/ ILLEGAL, opPSLLW_a16, opPSLLD_a16, opPSLLQ_a16, ILLEGAL, opPMADDWD_a16, ILLEGAL, ILLEGAL, opPSUBB_a16, opPSUBW_a16, opPSUBD_a16, ILLEGAL, opPADDB_a16, opPADDW_a16, opPADDD_a16, ILLEGAL,
-
- /*16-bit data, 32-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ op0F00_a32, op0F01_w_a32, opLAR_w_a32, opLSL_w_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, ILLEGAL, ILLEGAL, opRDSHR_a32, opWRSHR_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*40*/ opCMOVO_w_a32, opCMOVNO_w_a32, opCMOVB_w_a32, opCMOVNB_w_a32, opCMOVE_w_a32, opCMOVNE_w_a32, opCMOVBE_w_a32, opCMOVNBE_w_a32,opCMOVS_w_a32, opCMOVNS_w_a32, opCMOVP_w_a32, opCMOVNP_w_a32, opCMOVL_w_a32, opCMOVNL_w_a32, opCMOVLE_w_a32, opCMOVNLE_w_a32,
-/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*60*/ opPUNPCKLBW_a32,opPUNPCKLWD_a32,opPUNPCKLDQ_a32,opPACKSSWB_a32, opPCMPGTB_a32, opPCMPGTW_a32, opPCMPGTD_a32, opPACKUSWB_a32, opPUNPCKHBW_a32,opPUNPCKHWD_a32,opPUNPCKHDQ_a32,opPACKSSDW_a32, ILLEGAL, ILLEGAL, opMOVD_l_mm_a32,opMOVQ_q_mm_a32,
-/*70*/ ILLEGAL, opPSxxW_imm, opPSxxD_imm, opPSxxQ_imm, opPCMPEQB_a32, opPCMPEQW_a32, opPCMPEQD_a32, opEMMS, opSVDC_a32, opRSDC_a32, opSVLDT_a32, opRSLDT_a32, opSVTS_a32, opRSTS_a32, opMOVD_mm_l_a32_cx,opMOVQ_mm_q_a32,
-
-/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
-/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
-/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a32, opSHLD_w_i_a32, opSHLD_w_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a32, opSHRD_w_i_a32, opSHRD_w_CL_a32,ILLEGAL, opIMUL_w_w_a32,
-/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_w_a32,opLSS_w_a32, opBTR_w_r_a32, opLFS_w_a32, opLGS_w_a32, opMOVZX_w_b_a32,opMOVZX_w_w_a32,ILLEGAL, ILLEGAL, opBA_w_a32, opBTC_w_r_a32, opBSF_w_a32, opBSR_w_a32, opMOVSX_w_b_a32,ILLEGAL,
-
-/*c0*/ opXADD_b_a32, opXADD_w_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
-/*d0*/ ILLEGAL, opPSRLW_a32, opPSRLD_a32, opPSRLQ_a32, ILLEGAL, opPMULLW_a32, ILLEGAL, ILLEGAL, opPSUBUSB_a32, opPSUBUSW_a32, NULL, opPAND_a32, opPADDUSB_a32, opPADDUSW_a32, NULL, opPANDN_a32,
-/*e0*/ ILLEGAL, opPSRAW_a32, opPSRAD_a32, ILLEGAL, ILLEGAL, opPMULHW_a32, ILLEGAL, ILLEGAL, opPSUBSB_a32, opPSUBSW_a32, NULL, opPOR_a32, opPADDSB_a32, opPADDSW_a32, NULL, opPXOR_a32,
-/*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL,
-
- /*32-bit data, 32-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ op0F00_a32, op0F01_l_a32, opLAR_l_a32, opLSL_l_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, ILLEGAL, ILLEGAL, opRDSHR_a32, opWRSHR_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*40*/ opCMOVO_l_a32, opCMOVNO_l_a32, opCMOVB_l_a32, opCMOVNB_l_a32, opCMOVE_l_a32, opCMOVNE_l_a32, opCMOVBE_l_a32, opCMOVNBE_l_a32,opCMOVS_l_a32, opCMOVNS_l_a32, opCMOVP_l_a32, opCMOVNP_l_a32, opCMOVL_l_a32, opCMOVNL_l_a32, opCMOVLE_l_a32, opCMOVNLE_l_a32,
-/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*60*/ opPUNPCKLBW_a32,opPUNPCKLWD_a32,opPUNPCKLDQ_a32,opPACKSSWB_a32, opPCMPGTB_a32, opPCMPGTW_a32, opPCMPGTD_a32, opPACKUSWB_a32, opPUNPCKHBW_a32,opPUNPCKHWD_a32,opPUNPCKHDQ_a32,opPACKSSDW_a32, ILLEGAL, ILLEGAL, opMOVD_l_mm_a32,opMOVQ_q_mm_a32,
-/*70*/ ILLEGAL, opPSxxW_imm, opPSxxD_imm, opPSxxQ_imm, opPCMPEQB_a32, opPCMPEQW_a32, opPCMPEQD_a32, opEMMS, opSVDC_a16, opRSDC_a16, opSVLDT_a16, opRSLDT_a16, opSVTS_a16, opRSTS_a16, opMOVD_mm_l_a32_cx,opMOVQ_mm_q_a32,
-
-/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
-/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
-/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a32, opSHLD_l_i_a32, opSHLD_l_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a32, opSHRD_l_i_a32, opSHRD_l_CL_a32,ILLEGAL, opIMUL_l_l_a32,
-/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_l_a32,opLSS_l_a32, opBTR_l_r_a32, opLFS_l_a32, opLGS_l_a32, opMOVZX_l_b_a32,opMOVZX_l_w_a32,ILLEGAL, ILLEGAL, opBA_l_a32, opBTC_l_r_a32, opBSF_l_a32, opBSR_l_a32, opMOVSX_l_b_a32,opMOVSX_l_w_a32,
-
-/*c0*/ opXADD_b_a32, opXADD_l_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
-/*d0*/ ILLEGAL, opPSRLW_a32, opPSRLD_a32, opPSRLQ_a32, ILLEGAL, opPMULLW_a32, ILLEGAL, ILLEGAL, opPSUBUSB_a32, opPSUBUSW_a32, NULL, opPAND_a32, opPADDUSB_a32, opPADDUSW_a32, NULL, opPANDN_a32,
-/*e0*/ ILLEGAL, opPSRAW_a32, opPSRAD_a32, ILLEGAL, ILLEGAL, opPMULHW_a32, ILLEGAL, ILLEGAL, opPSUBSB_a32, opPSUBSW_a32, NULL, opPOR_a32, opPADDSB_a32, opPADDSW_a32, NULL, opPXOR_a32,
-/*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL,
-};
-
-OpFn OP_TABLE(pentiumpro_0f)[1024] =
-{
- /*16-bit data, 16-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ op0F00_a16, op0F01_w_a16, opLAR_w_a16, opLSL_w_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16,
-/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, opSYSENTER, opSYSEXIT, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*40*/ opCMOVO_w_a16, opCMOVNO_w_a16, opCMOVB_w_a16, opCMOVNB_w_a16, opCMOVE_w_a16, opCMOVNE_w_a16, opCMOVBE_w_a16, opCMOVNBE_w_a16,opCMOVS_w_a16, opCMOVNS_w_a16, opCMOVP_w_a16, opCMOVNP_w_a16, opCMOVL_w_a16, opCMOVNL_w_a16, opCMOVLE_w_a16, opCMOVNLE_w_a16,
-/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*60*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
-/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
-/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a16, opSHLD_w_i_a16, opSHLD_w_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a16, opSHRD_w_i_a16, opSHRD_w_CL_a16,ILLEGAL, opIMUL_w_w_a16,
-/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_w_a16,opLSS_w_a16, opBTR_w_r_a16, opLFS_w_a16, opLGS_w_a16, opMOVZX_w_b_a16,opMOVZX_w_w_a16,ILLEGAL, ILLEGAL, opBA_w_a16, opBTC_w_r_a16, opBSF_w_a16, opBSR_w_a16, opMOVSX_w_b_a16,ILLEGAL,
-
-/*c0*/ opXADD_b_a16, opXADD_w_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
-/*d0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*e0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
- /*32-bit data, 16-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ op0F00_a16, op0F01_l_a16, opLAR_l_a16, opLSL_l_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16,
-/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, opSYSENTER, opSYSEXIT, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*40*/ opCMOVO_l_a16, opCMOVNO_l_a16, opCMOVB_l_a16, opCMOVNB_l_a16, opCMOVE_l_a16, opCMOVNE_l_a16, opCMOVBE_l_a16, opCMOVNBE_l_a16,opCMOVS_l_a16, opCMOVNS_l_a16, opCMOVP_l_a16, opCMOVNP_l_a16, opCMOVL_l_a16, opCMOVNL_l_a16, opCMOVLE_l_a16, opCMOVNLE_l_a16,
-/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*60*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
-/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
-/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a16, opSHLD_l_i_a16, opSHLD_l_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a16, opSHRD_l_i_a16, opSHRD_l_CL_a16,ILLEGAL, opIMUL_l_l_a16,
-/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_l_a16,opLSS_l_a16, opBTR_l_r_a16, opLFS_l_a16, opLGS_l_a16, opMOVZX_l_b_a16,opMOVZX_l_w_a16,ILLEGAL, ILLEGAL, opBA_l_a16, opBTC_l_r_a16, opBSF_l_a16, opBSR_l_a16, opMOVSX_l_b_a16,opMOVSX_l_w_a16,
-
-/*c0*/ opXADD_b_a16, opXADD_l_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
-/*d0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*e0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
- /*16-bit data, 32-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ op0F00_a32, op0F01_w_a32, opLAR_w_a32, opLSL_w_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32,
-/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, opSYSENTER, opSYSEXIT, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*40*/ opCMOVO_w_a32, opCMOVNO_w_a32, opCMOVB_w_a32, opCMOVNB_w_a32, opCMOVE_w_a32, opCMOVNE_w_a32, opCMOVBE_w_a32, opCMOVNBE_w_a32,opCMOVS_w_a32, opCMOVNS_w_a32, opCMOVP_w_a32, opCMOVNP_w_a32, opCMOVL_w_a32, opCMOVNL_w_a32, opCMOVLE_w_a32, opCMOVNLE_w_a32,
-/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*60*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
-/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
-/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a32, opSHLD_w_i_a32, opSHLD_w_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a32, opSHRD_w_i_a32, opSHRD_w_CL_a32,ILLEGAL, opIMUL_w_w_a32,
-/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_w_a32,opLSS_w_a32, opBTR_w_r_a32, opLFS_w_a32, opLGS_w_a32, opMOVZX_w_b_a32,opMOVZX_w_w_a32,ILLEGAL, ILLEGAL, opBA_w_a32, opBTC_w_r_a32, opBSF_w_a32, opBSR_w_a32, opMOVSX_w_b_a32,ILLEGAL,
-
-/*c0*/ opXADD_b_a32, opXADD_w_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
-/*d0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*e0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
- /*32-bit data, 32-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ op0F00_a32, op0F01_l_a32, opLAR_l_a32, opLSL_l_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32,
-/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, opSYSENTER, opSYSEXIT, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*40*/ opCMOVO_l_a32, opCMOVNO_l_a32, opCMOVB_l_a32, opCMOVNB_l_a32, opCMOVE_l_a32, opCMOVNE_l_a32, opCMOVBE_l_a32, opCMOVNBE_l_a32,opCMOVS_l_a32, opCMOVNS_l_a32, opCMOVP_l_a32, opCMOVNP_l_a32, opCMOVL_l_a32, opCMOVNL_l_a32, opCMOVLE_l_a32, opCMOVNLE_l_a32,
-/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*60*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-
-/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
-/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
-/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a32, opSHLD_l_i_a32, opSHLD_l_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a32, opSHRD_l_i_a32, opSHRD_l_CL_a32,ILLEGAL, opIMUL_l_l_a32,
-/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_l_a32,opLSS_l_a32, opBTR_l_r_a32, opLFS_l_a32, opLGS_l_a32, opMOVZX_l_b_a32,opMOVZX_l_w_a32,ILLEGAL, ILLEGAL, opBA_l_a32, opBTC_l_r_a32, opBSF_l_a32, opBSR_l_a32, opMOVSX_l_b_a32,opMOVSX_l_w_a32,
-
-/*c0*/ opXADD_b_a32, opXADD_l_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
-/*d0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*e0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-};
-
-OpFn OP_TABLE(pentium2_0f)[1024] =
-{
- /*16-bit data, 16-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ op0F00_a16, op0F01_w_a16, opLAR_w_a16, opLSL_w_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16,
-/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, opSYSENTER, opSYSEXIT, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
+/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ opCMOVO_w_a16, opCMOVNO_w_a16, opCMOVB_w_a16, opCMOVNB_w_a16, opCMOVE_w_a16, opCMOVNE_w_a16, opCMOVBE_w_a16, opCMOVNBE_w_a16,opCMOVS_w_a16, opCMOVNS_w_a16, opCMOVP_w_a16, opCMOVNP_w_a16, opCMOVL_w_a16, opCMOVNL_w_a16, opCMOVLE_w_a16, opCMOVNLE_w_a16,
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
@@ -1019,7 +653,7 @@ OpFn OP_TABLE(pentium2_0f)[1024] =
/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
-/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a16, opSHLD_w_i_a16, opSHLD_w_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a16, opSHRD_w_i_a16, opSHRD_w_CL_a16,ILLEGAL, opIMUL_w_w_a16,
+/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a16, opSHLD_w_i_a16, opSHLD_w_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, ILLEGAL, opBTS_w_r_a16, opSHRD_w_i_a16, opSHRD_w_CL_a16,ILLEGAL, opIMUL_w_w_a16,
/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_w_a16,opLSS_w_a16, opBTR_w_r_a16, opLFS_w_a16, opLGS_w_a16, opMOVZX_w_b_a16,opMOVZX_w_w_a16,ILLEGAL, ILLEGAL, opBA_w_a16, opBTC_w_r_a16, opBSF_w_a16, opBSR_w_a16, opMOVSX_w_b_a16,ILLEGAL,
/*c0*/ opXADD_b_a16, opXADD_w_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
@@ -1028,11 +662,11 @@ OpFn OP_TABLE(pentium2_0f)[1024] =
/*f0*/ ILLEGAL, opPSLLW_a16, opPSLLD_a16, opPSLLQ_a16, ILLEGAL, opPMADDWD_a16, ILLEGAL, ILLEGAL, opPSUBB_a16, opPSUBW_a16, opPSUBD_a16, ILLEGAL, opPADDB_a16, opPADDW_a16, opPADDD_a16, ILLEGAL,
/*32-bit data, 16-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ op0F00_a16, op0F01_l_a16, opLAR_l_a16, opLSL_l_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16, opHINTNOP_a16,
+/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, opSYSENTER, opSYSEXIT, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
+/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ opCMOVO_l_a16, opCMOVNO_l_a16, opCMOVB_l_a16, opCMOVNB_l_a16, opCMOVE_l_a16, opCMOVNE_l_a16, opCMOVBE_l_a16, opCMOVNBE_l_a16,opCMOVS_l_a16, opCMOVNS_l_a16, opCMOVP_l_a16, opCMOVNP_l_a16, opCMOVL_l_a16, opCMOVNL_l_a16, opCMOVLE_l_a16, opCMOVNLE_l_a16,
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
@@ -1041,7 +675,7 @@ OpFn OP_TABLE(pentium2_0f)[1024] =
/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
-/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a16, opSHLD_l_i_a16, opSHLD_l_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a16, opSHRD_l_i_a16, opSHRD_l_CL_a16,ILLEGAL, opIMUL_l_l_a16,
+/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a16, opSHLD_l_i_a16, opSHLD_l_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, ILLEGAL, opBTS_l_r_a16, opSHRD_l_i_a16, opSHRD_l_CL_a16,ILLEGAL, opIMUL_l_l_a16,
/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_l_a16,opLSS_l_a16, opBTR_l_r_a16, opLFS_l_a16, opLGS_l_a16, opMOVZX_l_b_a16,opMOVZX_l_w_a16,ILLEGAL, ILLEGAL, opBA_l_a16, opBTC_l_r_a16, opBSF_l_a16, opBSR_l_a16, opMOVSX_l_b_a16,opMOVSX_l_w_a16,
/*c0*/ opXADD_b_a16, opXADD_l_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
@@ -1050,11 +684,11 @@ OpFn OP_TABLE(pentium2_0f)[1024] =
/*f0*/ ILLEGAL, opPSLLW_a16, opPSLLD_a16, opPSLLQ_a16, ILLEGAL, opPMADDWD_a16, ILLEGAL, ILLEGAL, opPSUBB_a16, opPSUBW_a16, opPSUBD_a16, ILLEGAL, opPADDB_a16, opPADDW_a16, opPADDD_a16, ILLEGAL,
/*16-bit data, 32-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ op0F00_a32, op0F01_w_a32, opLAR_w_a32, opLSL_w_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32,
+/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, opSYSENTER, opSYSEXIT, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
+/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ opCMOVO_w_a32, opCMOVNO_w_a32, opCMOVB_w_a32, opCMOVNB_w_a32, opCMOVE_w_a32, opCMOVNE_w_a32, opCMOVBE_w_a32, opCMOVNBE_w_a32,opCMOVS_w_a32, opCMOVNS_w_a32, opCMOVP_w_a32, opCMOVNP_w_a32, opCMOVL_w_a32, opCMOVNL_w_a32, opCMOVLE_w_a32, opCMOVNLE_w_a32,
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
@@ -1063,7 +697,7 @@ OpFn OP_TABLE(pentium2_0f)[1024] =
/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
-/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a32, opSHLD_w_i_a32, opSHLD_w_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a32, opSHRD_w_i_a32, opSHRD_w_CL_a32,ILLEGAL, opIMUL_w_w_a32,
+/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a32, opSHLD_w_i_a32, opSHLD_w_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, ILLEGAL, opBTS_w_r_a32, opSHRD_w_i_a32, opSHRD_w_CL_a32,ILLEGAL, opIMUL_w_w_a32,
/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_w_a32,opLSS_w_a32, opBTR_w_r_a32, opLFS_w_a32, opLGS_w_a32, opMOVZX_w_b_a32,opMOVZX_w_w_a32,ILLEGAL, ILLEGAL, opBA_w_a32, opBTC_w_r_a32, opBSF_w_a32, opBSR_w_a32, opMOVSX_w_b_a32,ILLEGAL,
/*c0*/ opXADD_b_a32, opXADD_w_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
@@ -1072,11 +706,11 @@ OpFn OP_TABLE(pentium2_0f)[1024] =
/*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL,
/*32-bit data, 32-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ op0F00_a32, op0F01_l_a32, opLAR_l_a32, opLSL_l_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32, opHINTNOP_a32,
+/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
-/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, opSYSENTER, opSYSEXIT, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
+/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
/*40*/ opCMOVO_l_a32, opCMOVNO_l_a32, opCMOVB_l_a32, opCMOVNB_l_a32, opCMOVE_l_a32, opCMOVNE_l_a32, opCMOVBE_l_a32, opCMOVNBE_l_a32,opCMOVS_l_a32, opCMOVNS_l_a32, opCMOVP_l_a32, opCMOVNP_l_a32, opCMOVL_l_a32, opCMOVNL_l_a32, opCMOVLE_l_a32, opCMOVNLE_l_a32,
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
@@ -1085,7 +719,7 @@ OpFn OP_TABLE(pentium2_0f)[1024] =
/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
-/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a32, opSHLD_l_i_a32, opSHLD_l_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a32, opSHRD_l_i_a32, opSHRD_l_CL_a32,ILLEGAL, opIMUL_l_l_a32,
+/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a32, opSHLD_l_i_a32, opSHLD_l_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, ILLEGAL, opBTS_l_r_a32, opSHRD_l_i_a32, opSHRD_l_CL_a32,ILLEGAL, opIMUL_l_l_a32,
/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_l_a32,opLSS_l_a32, opBTR_l_r_a32, opLFS_l_a32, opLGS_l_a32, opMOVZX_l_b_a32,opMOVZX_l_w_a32,ILLEGAL, ILLEGAL, opBA_l_a32, opBTC_l_r_a32, opBSF_l_a32, opBSR_l_a32, opMOVSX_l_b_a32,opMOVSX_l_w_a32,
/*c0*/ opXADD_b_a32, opXADD_l_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
@@ -1094,7 +728,7 @@ OpFn OP_TABLE(pentium2_0f)[1024] =
/*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL,
};
-OpFn OP_TABLE(286)[1024] =
+OpFn OP_TABLE(286)[1024] =
{
/*16-bit data, 16-bit addr*/
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
@@ -1276,186 +910,4 @@ OpFn OP_TABLE(386)[1024] =
/*f0*/ opLOCK, opINT1, opREPNE, opREPE, opHLT, opCMC, opF6_a32, opF7_l_a32, opCLC, opSTC, opCLI, opSTI, opCLD, opSTD, opINCDEC_b_a32, opFF_l_a32,
};
-OpFn OP_TABLE(REPE)[1024] =
-{
- /*16-bit data, 16-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*10*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*20*/ 0, 0, 0, 0, 0, 0, opES_REPE_w_a16,0, 0, 0, 0, 0, 0, 0, opCS_REPE_w_a16,0,
-/*30*/ 0, 0, 0, 0, 0, 0, opSS_REPE_w_a16,0, 0, 0, 0, 0, 0, 0, opDS_REPE_w_a16,0,
-
-/*40*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*50*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*60*/ 0, 0, 0, 0, opFS_REPE_w_a16,opGS_REPE_w_a16,op_66_REPE, op_67_REPE, 0, 0, 0, 0, opREP_INSB_a16, opREP_INSW_a16, opREP_OUTSB_a16,opREP_OUTSW_a16,
-/*70*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-/*80*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*90*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*a0*/ 0, 0, 0, 0, opREP_MOVSB_a16,opREP_MOVSW_a16,opREP_CMPSB_a16_E,opREP_CMPSW_a16_E,0, 0, opREP_STOSB_a16,opREP_STOSW_a16,opREP_LODSB_a16,opREP_LODSW_a16,opREP_SCASB_a16_E,opREP_SCASW_a16_E,
-/*b0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-/*c0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*d0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*e0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*f0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
- /*32-bit data, 16-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*10*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*20*/ 0, 0, 0, 0, 0, 0, opES_REPE_l_a16,0, 0, 0, 0, 0, 0, 0, opCS_REPE_l_a16,0,
-/*30*/ 0, 0, 0, 0, 0, 0, opSS_REPE_l_a16,0, 0, 0, 0, 0, 0, 0, opDS_REPE_l_a16,0,
-
-/*40*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*50*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*60*/ 0, 0, 0, 0, opFS_REPE_l_a16,opGS_REPE_l_a16,op_66_REPE, op_67_REPE, 0, 0, 0, 0, opREP_INSB_a16, opREP_INSL_a16, opREP_OUTSB_a16,opREP_OUTSL_a16,
-/*70*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-/*80*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*90*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*a0*/ 0, 0, 0, 0, opREP_MOVSB_a16,opREP_MOVSL_a16,opREP_CMPSB_a16_E,opREP_CMPSL_a16_E,0, 0, opREP_STOSB_a16,opREP_STOSL_a16,opREP_LODSB_a16,opREP_LODSL_a16,opREP_SCASB_a16_E,opREP_SCASL_a16_E,
-/*b0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-/*c0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*d0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*e0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*f0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
- /*16-bit data, 32-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*10*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*20*/ 0, 0, 0, 0, 0, 0, opES_REPE_w_a32,0, 0, 0, 0, 0, 0, 0, opCS_REPE_w_a32,0,
-/*30*/ 0, 0, 0, 0, 0, 0, opSS_REPE_w_a32,0, 0, 0, 0, 0, 0, 0, opDS_REPE_w_a32,0,
-
-/*40*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*50*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*60*/ 0, 0, 0, 0, opFS_REPE_w_a32,opGS_REPE_w_a32,op_66_REPE, op_67_REPE, 0, 0, 0, 0, opREP_INSB_a32, opREP_INSW_a32, opREP_OUTSB_a32,opREP_OUTSW_a32,
-/*70*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-/*80*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*90*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*a0*/ 0, 0, 0, 0, opREP_MOVSB_a32,opREP_MOVSW_a32,opREP_CMPSB_a32_E,opREP_CMPSW_a32_E,0, 0, opREP_STOSB_a32,opREP_STOSW_a32,opREP_LODSB_a32,opREP_LODSW_a32,opREP_SCASB_a32_E,opREP_SCASW_a32_E,
-/*b0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-/*c0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*d0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*e0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*f0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
- /*32-bit data, 32-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*10*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*20*/ 0, 0, 0, 0, 0, 0, opES_REPE_l_a32,0, 0, 0, 0, 0, 0, 0, opCS_REPE_l_a32,0,
-/*30*/ 0, 0, 0, 0, 0, 0, opSS_REPE_l_a32,0, 0, 0, 0, 0, 0, 0, opDS_REPE_l_a32,0,
-
-/*40*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*50*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*60*/ 0, 0, 0, 0, opFS_REPE_l_a32,opGS_REPE_l_a32,op_66_REPE, op_67_REPE, 0, 0, 0, 0, opREP_INSB_a32, opREP_INSL_a32, opREP_OUTSB_a32,opREP_OUTSL_a32,
-/*70*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-/*80*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*90*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*a0*/ 0, 0, 0, 0, opREP_MOVSB_a32,opREP_MOVSL_a32,opREP_CMPSB_a32_E,opREP_CMPSL_a32_E,0, 0, opREP_STOSB_a32,opREP_STOSL_a32,opREP_LODSB_a32,opREP_LODSL_a32,opREP_SCASB_a32_E,opREP_SCASL_a32_E,
-/*b0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-/*c0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*d0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*e0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*f0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-};
-
-OpFn OP_TABLE(REPNE)[1024] =
-{
- /*16-bit data, 16-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*10*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*20*/ 0, 0, 0, 0, 0, 0, opES_REPNE_w_a16,0, 0, 0, 0, 0, 0, 0, opCS_REPNE_w_a16,0,
-/*30*/ 0, 0, 0, 0, 0, 0, opSS_REPNE_w_a16,0, 0, 0, 0, 0, 0, 0, opDS_REPNE_w_a16,0,
-
-/*40*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*50*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*60*/ 0, 0, 0, 0, opFS_REPNE_w_a16,opGS_REPNE_w_a16,op_66_REPNE, op_67_REPNE, 0, 0, 0, 0, opREP_INSB_a16, opREP_INSW_a16, opREP_OUTSB_a16,opREP_OUTSW_a16,
-/*70*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-/*80*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*90*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*a0*/ 0, 0, 0, 0, opREP_MOVSB_a16,opREP_MOVSW_a16,opREP_CMPSB_a16_NE,opREP_CMPSW_a16_NE,0, 0, opREP_STOSB_a16,opREP_STOSW_a16,opREP_LODSB_a16,opREP_LODSW_a16,opREP_SCASB_a16_NE,opREP_SCASW_a16_NE,
-/*b0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-/*c0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*d0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*e0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*f0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
- /*32-bit data, 16-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*10*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*20*/ 0, 0, 0, 0, 0, 0, opES_REPNE_l_a16,0, 0, 0, 0, 0, 0, 0, opCS_REPNE_l_a16,0,
-/*30*/ 0, 0, 0, 0, 0, 0, opSS_REPNE_l_a16,0, 0, 0, 0, 0, 0, 0, opDS_REPNE_l_a16,0,
-
-/*40*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*50*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*60*/ 0, 0, 0, 0, opFS_REPNE_l_a16,opGS_REPNE_l_a16,op_66_REPNE, op_67_REPNE, 0, 0, 0, 0, opREP_INSB_a16, opREP_INSL_a16, opREP_OUTSB_a16,opREP_OUTSL_a16,
-/*70*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-/*80*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*90*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*a0*/ 0, 0, 0, 0, opREP_MOVSB_a16,opREP_MOVSL_a16,opREP_CMPSB_a16_NE,opREP_CMPSL_a16_NE,0, 0, opREP_STOSB_a16,opREP_STOSL_a16,opREP_LODSB_a16,opREP_LODSL_a16,opREP_SCASB_a16_NE,opREP_SCASL_a16_NE,
-/*b0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-/*c0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*d0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*e0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*f0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
- /*16-bit data, 32-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*10*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*20*/ 0, 0, 0, 0, 0, 0, opES_REPNE_w_a32,0, 0, 0, 0, 0, 0, 0, opCS_REPNE_w_a32,0,
-/*30*/ 0, 0, 0, 0, 0, 0, opSS_REPNE_w_a32,0, 0, 0, 0, 0, 0, 0, opDS_REPNE_w_a32,0,
-
-/*40*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*50*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*60*/ 0, 0, 0, 0, opFS_REPNE_w_a32,opGS_REPNE_w_a32,op_66_REPNE, op_67_REPNE, 0, 0, 0, 0, opREP_INSB_a32, opREP_INSW_a32, opREP_OUTSB_a32,opREP_OUTSW_a32,
-/*70*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-/*80*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*90*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*a0*/ 0, 0, 0, 0, opREP_MOVSB_a32,opREP_MOVSW_a32,opREP_CMPSB_a32_NE,opREP_CMPSW_a32_NE,0, 0, opREP_STOSB_a32,opREP_STOSW_a32,opREP_LODSB_a32,opREP_LODSW_a32,opREP_SCASB_a32_NE,opREP_SCASW_a32_NE,
-/*b0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-/*c0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*d0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*e0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*f0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
- /*32-bit data, 32-bit addr*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*10*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*20*/ 0, 0, 0, 0, 0, 0, opES_REPNE_l_a32,0, 0, 0, 0, 0, 0, 0, opCS_REPNE_l_a32,0,
-/*30*/ 0, 0, 0, 0, 0, 0, opSS_REPNE_l_a32,0, 0, 0, 0, 0, 0, 0, opDS_REPNE_l_a32,0,
-
-/*40*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*50*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*60*/ 0, 0, 0, 0, opFS_REPNE_l_a32,opGS_REPNE_l_a32,op_66_REPNE, op_67_REPNE, 0, 0, 0, 0, opREP_INSB_a32, opREP_INSL_a32, opREP_OUTSB_a32,opREP_OUTSL_a32,
-/*70*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-/*80*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*90*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*a0*/ 0, 0, 0, 0, opREP_MOVSB_a32,opREP_MOVSL_a32,opREP_CMPSB_a32_NE,opREP_CMPSL_a32_NE,0, 0, opREP_STOSB_a32,opREP_STOSL_a32,opREP_LODSB_a32,opREP_LODSL_a32,opREP_SCASB_a32_NE,opREP_SCASL_a32_NE,
-/*b0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-/*c0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*d0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*e0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-/*f0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-};
-
#include "x87_ops.h"
diff --git a/src/8087.h b/src/8087.h
deleted file mode 100644
index 6e5401a..0000000
--- a/src/8087.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/*This file is a series of macros to get the 386+ based x87 emulation working with
- the 808x emulation*/
-#define X8087
-#define OP_TABLE(name) ops_808x_ ## name
-
-#define CLOCK_CYCLES(c) cycles -= (c)
-#define CLOCK_CYCLES_ALWAYS(c) cycles -= (c)
-
-#define fetch_ea_16(fetchdat)
-#define fetch_ea_32(fetchdat)
-#define SEG_CHECK_READ(seg)
-#define SEG_CHECK_WRITE(seg)
-#define CHECK_WRITE(seg, addr_lo, addr_hi)
-#define PREFETCH_RUN(timing, bytes, rmdat, a, b, c, d, e)
-
-static uint32_t readmeml(uint32_t seg, uint32_t addr)
-{
- return readmemw(seg, addr) | (readmemw(seg, addr+2) << 16);
-}
-static uint64_t readmemq(uint32_t seg, uint32_t addr)
-{
- return (uint64_t)readmemw(seg, addr) | ((uint64_t)readmemw(seg, addr+2) << 16) |
- ((uint64_t)readmemw(seg, addr+4) << 32) |
- ((uint64_t)readmemw(seg, addr+6) << 48);
-}
-
-static void writememb_8087(uint32_t seg, uint32_t addr, uint8_t val)
-{
- writememb(seg+addr, val);
-}
-static void writememl(uint32_t seg, uint32_t addr, uint32_t val)
-{
- writememw(seg, addr, val & 0xffff);
- writememw(seg, addr+2, (val >> 16) & 0xffff);
-}
-static void writememq(uint32_t seg, uint32_t addr, uint64_t val)
-{
- writememw(seg, addr, val & 0xffff);
- writememw(seg, addr+2, (val >> 16) & 0xffff);
- writememw(seg, addr+4, (val >> 32) & 0xffff);
- writememw(seg, addr+6, (val >> 48) & 0xffff);
-}
-
-static inline uint32_t geteal()
-{
- if (cpu_mod == 3)
- fatal("geteal cpu_mod==3\n");
- return readmeml(easeg, cpu_state.eaaddr);
-}
-static inline uint64_t geteaq()
-{
- if (cpu_mod == 3)
- fatal("geteaq cpu_mod==3\n");
- return readmemq(easeg, cpu_state.eaaddr);
-}
-static inline void seteal(uint32_t val)
-{
- if (cpu_mod == 3)
- fatal("seteal cpu_mod==3\n");
- else
- writememl(easeg, cpu_state.eaaddr, val);
-}
-static inline void seteaq(uint64_t val)
-{
- if (cpu_mod == 3)
- fatal("seteaq cpu_mod==3\n");
- else
- writememq(easeg, cpu_state.eaaddr, val);
-}
-
-#define flags_rebuild()
-
-#define CF_SET() (cpu_state.flags & C_FLAG)
-#define NF_SET() (cpu_state.flags & N_FLAG)
-#define PF_SET() (cpu_state.flags & P_FLAG)
-#define VF_SET() (cpu_state.flags & V_FLAG)
-#define ZF_SET() (cpu_state.flags & Z_FLAG)
-
-#define cond_O ( VF_SET())
-#define cond_NO (!VF_SET())
-#define cond_B ( CF_SET())
-#define cond_NB (!CF_SET())
-#define cond_E ( ZF_SET())
-#define cond_NE (!ZF_SET())
-#define cond_BE ( CF_SET() || ZF_SET())
-#define cond_NBE (!CF_SET() && !ZF_SET())
-#define cond_S ( NF_SET())
-#define cond_NS (!NF_SET())
-#define cond_P ( PF_SET())
-#define cond_NP (!PF_SET())
-#define cond_L (((NF_SET()) ? 1 : 0) != ((VF_SET()) ? 1 : 0))
-#define cond_NL (((NF_SET()) ? 1 : 0) == ((VF_SET()) ? 1 : 0))
-#define cond_LE (((NF_SET()) ? 1 : 0) != ((VF_SET()) ? 1 : 0) || (ZF_SET()))
-#define cond_NLE (((NF_SET()) ? 1 : 0) == ((VF_SET()) ? 1 : 0) && (!ZF_SET()))
-
-#define writememb writememb_8087
-#include "x87_ops.h"
-#undef writememb
diff --git a/src/808x.c b/src/808x.c
index 825d9f9..1ff61d0 100644
--- a/src/808x.c
+++ b/src/808x.c
@@ -23,51 +23,46 @@
#include "timer.h"
#include "x86.h"
#include "x87.h"
-#include "paths.h"
-uint64_t xt_cpu_multi;
+int xt_cpu_multi;
int nmi = 0;
int nmi_auto_clear = 0;
-int oldcpl;
-
-int tempc;
-static int noint=0;
-
-int output=0;
-int timetolive=0;
-int ins=0;
-
+int nextcyc=0;
+int cycdiff;
int is8086=0;
-static uint32_t oldds;
-uint32_t oldss;
+int memcycs;
+int nopageerrors=0;
-static int nextcyc=0;
-static int memcycs;
+void FETCHCOMPLETE();
-static int cycdiff;
-static void FETCHCOMPLETE();
+uint8_t readmembl(uint32_t addr);
+void writemembl(uint32_t addr, uint8_t val);
+uint16_t readmemwl(uint32_t seg, uint32_t addr);
+void writememwl(uint32_t seg, uint32_t addr, uint16_t val);
+uint32_t readmemll(uint32_t seg, uint32_t addr);
+void writememll(uint32_t seg, uint32_t addr, uint32_t val);
-#define IRQTEST ((cpu_state.flags & I_FLAG) && (pic.pend&~pic.mask) && !noint)
-
-static uint8_t readmemb(uint32_t a)
+#undef readmemb
+#undef readmemw
+uint8_t readmemb(uint32_t a)
{
if (a!=(cs+cpu_state.pc)) memcycs+=4;
if (readlookup2[(a)>>12]==-1) return readmembl(a);
else return *(uint8_t *)(readlookup2[(a) >> 12] + (a));
}
-static uint8_t readmembf(uint32_t a)
+uint8_t readmembf(uint32_t a)
{
if (readlookup2[(a)>>12]==-1) return readmembl(a);
else return *(uint8_t *)(readlookup2[(a) >> 12] + (a));
}
-static uint16_t readmemw(uint32_t s, uint16_t a)
+uint16_t readmemw(uint32_t s, uint16_t a)
{
if (a!=(cs+cpu_state.pc)) memcycs+=(8>>is8086);
- if ((readlookup2[((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF)) return readmemwl(s+a);
+ if ((readlookup2[((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF)) return readmemwl(s,a);
else return *(uint16_t *)(readlookup2[(s + a) >> 12] + s + a);
}
@@ -80,28 +75,48 @@ void refreshread() { /*pclog("Refreshread\n"); */FETCHCOMPLETE(); memcycs+=4; }
cpu_rm=rmdat&7; \
if (cpu_mod!=3) fetcheal(); }
-static void writememb(uint32_t a, uint8_t v)
+void writemembl(uint32_t addr, uint8_t val);
+void writememb(uint32_t a, uint8_t v)
{
memcycs+=4;
if (writelookup2[(a)>>12]==-1) writemembl(a,v);
else *(uint8_t *)(writelookup2[a >> 12] + a) = v;
}
-static void writememw(uint32_t s, uint32_t a, uint16_t v)
+void writememwl(uint32_t seg, uint32_t addr, uint16_t val);
+void writememw(uint32_t s, uint32_t a, uint16_t v)
{
memcycs+=(8>>is8086);
- if (writelookup2[((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF) writememwl(s+a,v);
+ if (writelookup2[((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF) writememwl(s,a,v);
else *(uint16_t *)(writelookup2[(s + a) >> 12] + s + a) = v;
}
+void writememll(uint32_t seg, uint32_t addr, uint32_t val);
+void writememl(uint32_t s, uint32_t a, uint32_t v)
+{
+ if (writelookup2[((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF) writememll(s,a,v);
+ else *(uint32_t *)(writelookup2[(s + a) >> 12] + s + a) = v;
+}
+uint16_t oldcs;
+int oldcpl;
+
+int tempc;
+uint8_t opcode;
+uint16_t pc2,pc3;
+int noint=0;
+
+int output=0;
+
+int shadowbios=0;
+
+int ins=0;
//#define readmemb(a) (((a)<0xA0000)?ram[a]:readmembl(a))
-static int fetchcycles=0,fetchclocks;
-
-static uint8_t prefetchqueue[6];
-static uint16_t prefetchpc;
-static int prefetchw=0;
+int fetchcycles=0,memcycs,fetchclocks;
+uint8_t prefetchqueue[6];
+uint16_t prefetchpc;
+int prefetchw=0;
static inline uint8_t FETCH()
{
uint8_t temp;
@@ -186,7 +201,7 @@ static inline void FETCHADD(int c)
// if (fetchcycles>24) fetchcycles=24;
}
-static void FETCHCOMPLETE()
+void FETCHCOMPLETE()
{
// pclog("Fetchcomplete %i %i %i\n",fetchcycles&3,fetchcycles,prefetchw);
if (!(fetchcycles&3)) return;
@@ -327,9 +342,9 @@ reg = If mod=11, (depending on data size, 16 bits/8 bits, 32 bits=extend 16 bit
*/
uint32_t easeg;
-uint32_t rmdat;
+int rmdat;
-static uint16_t zero=0;
+uint16_t zero=0;
uint16_t *mod1add[2][8];
uint32_t *mod1seg[8];
@@ -426,7 +441,7 @@ static inline void seteaw(uint16_t val)
/*Flags*/
uint8_t znptable8[256];
-static uint16_t znptable16[65536];
+uint16_t znptable16[65536];
void makeznptable()
{
@@ -446,7 +461,7 @@ void makeznptable()
znptable8[c]=0;
else
znptable8[c]=P_FLAG;
- if (c == 0xb1) pclog("znp8 b1 = %i %02X\n", d, znptable8[c]);
+ if (c == 0xb1) pclog("znp8 b1 = %i %02X\n", d, znptable8[c]);
if (!c) znptable8[c]|=Z_FLAG;
if (c&0x80) znptable8[c]|=N_FLAG;
}
@@ -473,6 +488,10 @@ void makeznptable()
// makemod1table();
}
+int timetolive=0;
+
+extern uint32_t oldcs2;
+extern uint32_t oldpc2;
int indump = 0;
@@ -488,7 +507,8 @@ void dumpregs()
// return;
// savenvr();
// return;
- chdir(logs_path);
+chdir(pcempath);
+ nopageerrors=1;
/* f=fopen("rram3.dmp","wb");
for (c=0;c<0x8000000;c++) putc(readmemb(c+0x10000000),f);
fclose(f);*/
@@ -517,13 +537,13 @@ void dumpregs()
fclose(f);*/
pclog("Dumping rram4.dmp\n");
f=fopen("rram4.dmp","wb");
- for (c=0;c<0x0050000;c++)
+ for (c=0;c<0x0050000;c++)
{
cpu_state.abrt = 0;
- putc(readmembl(c+0x80000000),f);
+ putc(readmemb386l(0,c+0x80000000),f);
}
fclose(f);
- pclog("Dumping done\n");
+ pclog("Dumping done\n");
/* f=fopen("rram6.dmp","wb");
for (c=0;c<0x1000000;c++) putc(readmemb(c+0xBF000000),f);
fclose(f);*/
@@ -559,22 +579,22 @@ void dumpregs()
printf("EAX=%08X EBX=%08X ECX=%08X EDX=%08X\nEDI=%08X ESI=%08X EBP=%08X ESP=%08X\n",EAX,EBX,ECX,EDX,EDI,ESI,EBP,ESP);
else
printf("AX=%04X BX=%04X CX=%04X DX=%04X DI=%04X SI=%04X BP=%04X SP=%04X\n",AX,BX,CX,DX,DI,SI,BP,SP);
- printf("PC=%04X CS=%04X DS=%04X ES=%04X SS=%04X FLAGS=%04X\n",cpu_state.pc,CS,DS,ES,SS,cpu_state.flags);
- printf("%04X\n",cpu_state.oldpc);
+ printf("PC=%04X CS=%04X DS=%04X ES=%04X SS=%04X FLAGS=%04X\n",cpu_state.pc,CS,DS,ES,SS,flags);
+ printf("%04X:%04X %04X:%04X\n",oldcs,cpu_state.oldpc, oldcs2, oldpc2);
printf("%i ins\n",ins);
if (is386)
- printf("In %s mode\n",(msw&1)?((cpu_state.eflags&VM_FLAG)?"V86":"protected"):"real");
+ printf("In %s mode\n",(msw&1)?((eflags&VM_FLAG)?"V86":"protected"):"real");
else
printf("In %s mode\n",(msw&1)?"protected":"real");
- printf("CS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",cs,cpu_state.seg_cs.limit,cpu_state.seg_cs.access, cpu_state.seg_cs.limit_low, cpu_state.seg_cs.limit_high);
- printf("DS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",ds,cpu_state.seg_ds.limit,cpu_state.seg_ds.access, cpu_state.seg_ds.limit_low, cpu_state.seg_ds.limit_high);
- printf("ES : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",es,cpu_state.seg_es.limit,cpu_state.seg_es.access, cpu_state.seg_es.limit_low, cpu_state.seg_es.limit_high);
+ printf("CS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",cs,_cs.limit,_cs.access, _cs.limit_low, _cs.limit_high);
+ printf("DS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",ds,_ds.limit,_ds.access, _ds.limit_low, _ds.limit_high);
+ printf("ES : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",es,_es.limit,_es.access, _es.limit_low, _es.limit_high);
if (is386)
{
- printf("FS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",cpu_state.seg_fs.base,cpu_state.seg_fs.limit,cpu_state.seg_fs.access, cpu_state.seg_fs.limit_low, cpu_state.seg_fs.limit_high);
- printf("GS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",gs,cpu_state.seg_gs.limit,cpu_state.seg_gs.access, cpu_state.seg_gs.limit_low, cpu_state.seg_gs.limit_high);
+ printf("FS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",seg_fs,_fs.limit,_fs.access, _fs.limit_low, _fs.limit_high);
+ printf("GS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",gs,_gs.limit,_gs.access, _gs.limit_low, _gs.limit_high);
}
- printf("SS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",ss,cpu_state.seg_ss.limit,cpu_state.seg_ss.access, cpu_state.seg_ss.limit_low, cpu_state.seg_ss.limit_high);
+ printf("SS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",ss,_ss.limit,_ss.access, _ss.limit_low, _ss.limit_high);
printf("GDT : base=%06X limit=%04X\n",gdt.base,gdt.limit);
printf("LDT : base=%06X limit=%04X\n",ldt.base,ldt.limit);
printf("IDT : base=%06X limit=%04X\n",idt.base,idt.limit);
@@ -582,8 +602,7 @@ void dumpregs()
if (is386)
{
printf("386 in %s mode stack in %s mode\n",(use32)?"32-bit":"16-bit",(stack32)?"32-bit":"16-bit");
- printf("CR0=%08X CR2=%08X CR3=%08X CR4=%08x\n",cr0,cr2,cr3, cr4);
- pclog("SMBASE=%08x\n", cpu_state.smbase);
+ printf("CR0=%08X CR2=%08X CR3=%08X\n",cr0,cr2,cr3);
}
printf("Entries in readlookup : %i writelookup : %i\n",readlnum,writelnum);
for (c=0;c<1024*1024;c++)
@@ -596,16 +615,18 @@ void dumpregs()
indump = 0;
}
+int resets = 0;
int x86_was_reset = 0;
void resetx86()
{
pclog("x86 reset\n");
+ resets++;
ins = 0;
use32=0;
- cpu_cur_status = 0;
stack32=0;
// i86_Reset();
// cs=0xFFFF0;
+ cpu_state.pc=0;
msw=0;
if (is486)
cr0 = 1 << 30;
@@ -614,35 +635,25 @@ void resetx86()
cpu_cache_int_enabled = 0;
cpu_update_waitstates();
cr4 = 0;
- cpu_state.eflags=0;
+ eflags=0;
cgate32=0;
- if (AT)
- {
- loadcs(0xF000);
- cpu_state.pc = 0xFFF0;
- rammask = cpu_16bitbus ? 0xFFFFFF : 0xFFFFFFFF;
- }
- else
- {
- loadcs(0xFFFF);
- cpu_state.pc = 0;
- rammask = 0xfffff;
- }
+ loadcs(0xFFFF);
+ rammask = AT ? 0xFFFFFFFF : 0xfffff;
idt.base = 0;
- idt.limit = is386 ? 0x03FF : 0xFFFF;
- cpu_state.flags=2;
- EAX = EBX = ECX = EDX = ESI = EDI = EBP = ESP = 0;
+ flags=2;
makeznptable();
resetreadlookup();
makemod1table();
FETCHCLEAR();
x87_reset();
cpu_set_edx();
+ EAX = 0;
+ ESP=0;
mmu_perm=4;
+ memset(inscounts, 0, sizeof(inscounts));
x86seg_reset();
codegen_reset();
x86_was_reset = 1;
- cpu_state.smbase = 0x30000;
}
void softresetx86()
@@ -651,220 +662,151 @@ void softresetx86()
// exit(-1);
use32=0;
stack32=0;
- cpu_cur_status = 0;
// i86_Reset();
// cs=0xFFFF0;
+ cpu_state.pc=0;
msw=0;
- if (is486)
- cr0 = 1 << 30;
- else
- cr0 = 0;
- cpu_cache_int_enabled = 0;
- cpu_update_waitstates();
+ cr0=0;
cr4 = 0;
- cpu_state.eflags=0;
+ eflags=0;
cgate32=0;
- if (AT)
- {
- loadcs(0xF000);
- cpu_state.pc = 0xFFF0;
- rammask = cpu_16bitbus ? 0xFFFFFF : 0xFFFFFFFF;
- }
- else
- {
- loadcs(0xFFFF);
- cpu_state.pc = 0;
- rammask = 0xfffff;
- }
+ loadcs(0xFFFF);
//rammask=0xFFFFFFFF;
- cpu_state.flags=2;
+ flags=2;
idt.base = 0;
- if (is386)
- {
- idt.limit = 0x03FF;
- EAX = EBX = ECX = EDX = ESI = EDI = EBP = ESP = 0;
- }
- else
- {
- idt.limit = 0xFFFF;
- }
x86seg_reset();
- flushmmucache();
x86_was_reset = 1;
- FETCHCLEAR();
}
static void setznp8(uint8_t val)
{
- cpu_state.flags &= ~0xC4;
- cpu_state.flags |= znptable8[val];
+ flags&=~0xC4;
+ flags|=znptable8[val];
}
static void setznp16(uint16_t val)
{
- cpu_state.flags &= ~0xC4;
- cpu_state.flags |= znptable16[val];
+ flags&=~0xC4;
+ flags|=znptable16[val];
}
static void setadd8(uint8_t a, uint8_t b)
{
- uint16_t c = (uint16_t)a + (uint16_t)b;
- cpu_state.flags &= ~0x8D5;
- cpu_state.flags |= znptable8[c&0xFF];
- if (c & 0x100)
- cpu_state.flags |= C_FLAG;
- if (!((a ^ b) & 0x80) && ((a ^ c) & 0x80))
- cpu_state.flags |= V_FLAG;
- if (((a & 0xF) + (b & 0xF)) & 0x10)
- cpu_state.flags |= A_FLAG;
+ uint16_t c=(uint16_t)a+(uint16_t)b;
+ flags&=~0x8D5;
+ flags|=znptable8[c&0xFF];
+ if (c&0x100) flags|=C_FLAG;
+ if (!((a^b)&0x80)&&((a^c)&0x80)) flags|=V_FLAG;
+ if (((a&0xF)+(b&0xF))&0x10) flags|=A_FLAG;
}
static void setadd8nc(uint8_t a, uint8_t b)
{
- uint16_t c = (uint16_t)a + (uint16_t)b;
- cpu_state.flags &= ~0x8D4;
- cpu_state.flags |= znptable8[c&0xFF];
- if (!((a ^ b) & 0x80) && ((a ^ c) & 0x80))
- cpu_state.flags |= V_FLAG;
- if (((a & 0xF) + (b & 0xF)) & 0x10)
- cpu_state.flags |= A_FLAG;
+ uint16_t c=(uint16_t)a+(uint16_t)b;
+ flags&=~0x8D4;
+ flags|=znptable8[c&0xFF];
+ if (!((a^b)&0x80)&&((a^c)&0x80)) flags|=V_FLAG;
+ if (((a&0xF)+(b&0xF))&0x10) flags|=A_FLAG;
}
static void setadc8(uint8_t a, uint8_t b)
{
- uint16_t c = (uint16_t)a + (uint16_t)b+tempc;
- cpu_state.flags &= ~0x8D5;
- cpu_state.flags |= znptable8[c&0xFF];
- if (c & 0x100)
- cpu_state.flags |= C_FLAG;
- if (!((a ^ b) & 0x80) && ((a ^ c) & 0x80))
- cpu_state.flags |= V_FLAG;
- if (((a & 0xF) + (b & 0xF)) & 0x10)
- cpu_state.flags |= A_FLAG;
+ uint16_t c=(uint16_t)a+(uint16_t)b+tempc;
+ flags&=~0x8D5;
+ flags|=znptable8[c&0xFF];
+ if (c&0x100) flags|=C_FLAG;
+ if (!((a^b)&0x80)&&((a^c)&0x80)) flags|=V_FLAG;
+ if (((a&0xF)+(b&0xF))&0x10) flags|=A_FLAG;
}
static void setadd16(uint16_t a, uint16_t b)
{
- uint32_t c = (uint32_t)a + (uint32_t)b;
- cpu_state.flags &= ~0x8D5;
- cpu_state.flags |= znptable16[c&0xFFFF];
- if (c & 0x10000)
- cpu_state.flags |= C_FLAG;
- if (!((a ^ b) & 0x8000) && ((a ^ c) & 0x8000))
- cpu_state.flags |= V_FLAG;
- if (((a & 0xF) + (b & 0xF)) & 0x10)
- cpu_state.flags |= A_FLAG;
+ uint32_t c=(uint32_t)a+(uint32_t)b;
+ flags&=~0x8D5;
+ flags|=znptable16[c&0xFFFF];
+ if (c&0x10000) flags|=C_FLAG;
+ if (!((a^b)&0x8000)&&((a^c)&0x8000)) flags|=V_FLAG;
+ if (((a&0xF)+(b&0xF))&0x10) flags|=A_FLAG;
}
static void setadd16nc(uint16_t a, uint16_t b)
{
- uint32_t c = (uint32_t)a + (uint32_t)b;
- cpu_state.flags &= ~0x8D4;
- cpu_state.flags |= znptable16[c&0xFFFF];
- if (!((a ^ b) & 0x8000) && ((a ^ c) & 0x8000))
- cpu_state.flags |= V_FLAG;
- if (((a & 0xF) + (b & 0xF)) & 0x10)
- cpu_state.flags |= A_FLAG;
+ uint32_t c=(uint32_t)a+(uint32_t)b;
+ flags&=~0x8D4;
+ flags|=znptable16[c&0xFFFF];
+ if (!((a^b)&0x8000)&&((a^c)&0x8000)) flags|=V_FLAG;
+ if (((a&0xF)+(b&0xF))&0x10) flags|=A_FLAG;
}
static void setadc16(uint16_t a, uint16_t b)
{
- uint32_t c = (uint32_t)a + (uint32_t)b+tempc;
- cpu_state.flags &= ~0x8D5;
- cpu_state.flags |= znptable16[c&0xFFFF];
- if (c & 0x10000)
- cpu_state.flags |= C_FLAG;
- if (!((a ^ b) & 0x8000) && ((a ^ c) & 0x8000))
- cpu_state.flags |= V_FLAG;
- if (((a & 0xF) + (b & 0xF)) & 0x10)
- cpu_state.flags |= A_FLAG;
+ uint32_t c=(uint32_t)a+(uint32_t)b+tempc;
+ flags&=~0x8D5;
+ flags|=znptable16[c&0xFFFF];
+ if (c&0x10000) flags|=C_FLAG;
+ if (!((a^b)&0x8000)&&((a^c)&0x8000)) flags|=V_FLAG;
+ if (((a&0xF)+(b&0xF))&0x10) flags|=A_FLAG;
}
static void setsub8(uint8_t a, uint8_t b)
{
- uint16_t c = (uint16_t)a - (uint16_t)b;
- cpu_state.flags &= ~0x8D5;
- cpu_state.flags |= znptable8[c&0xFF];
- if (c & 0x100)
- cpu_state.flags |= C_FLAG;
- if ((a ^ b) & (a ^ c) & 0x80)
- cpu_state.flags |= V_FLAG;
- if (((a & 0xF) - (b & 0xF)) & 0x10)
- cpu_state.flags |= A_FLAG;
+ uint16_t c=(uint16_t)a-(uint16_t)b;
+ flags&=~0x8D5;
+ flags|=znptable8[c&0xFF];
+ if (c&0x100) flags|=C_FLAG;
+ if ((a^b)&(a^c)&0x80) flags|=V_FLAG;
+ if (((a&0xF)-(b&0xF))&0x10) flags|=A_FLAG;
}
static void setsub8nc(uint8_t a, uint8_t b)
{
- uint16_t c = (uint16_t)a - (uint16_t)b;
- cpu_state.flags &= ~0x8D4;
- cpu_state.flags |= znptable8[c&0xFF];
- if ((a ^ b) & (a ^ c) & 0x80)
- cpu_state.flags |= V_FLAG;
- if (((a & 0xF) - (b & 0xF)) & 0x10)
- cpu_state.flags |= A_FLAG;
+ uint16_t c=(uint16_t)a-(uint16_t)b;
+ flags&=~0x8D4;
+ flags|=znptable8[c&0xFF];
+ if ((a^b)&(a^c)&0x80) flags|=V_FLAG;
+ if (((a&0xF)-(b&0xF))&0x10) flags|=A_FLAG;
}
static void setsbc8(uint8_t a, uint8_t b)
{
- uint16_t c = (uint16_t)a - (((uint16_t)b) + tempc);
- cpu_state.flags &= ~0x8D5;
- cpu_state.flags |= znptable8[c&0xFF];
- if (c & 0x100)
- cpu_state.flags |= C_FLAG;
- if ((a ^ b) & (a ^ c) & 0x80)
- cpu_state.flags |= V_FLAG;
- if (((a & 0xF) - (b & 0xF)) & 0x10)
- cpu_state.flags |= A_FLAG;
+ uint16_t c=(uint16_t)a-(((uint16_t)b)+tempc);
+ flags&=~0x8D5;
+ flags|=znptable8[c&0xFF];
+ if (c&0x100) flags|=C_FLAG;
+ if ((a^b)&(a^c)&0x80) flags|=V_FLAG;
+ if (((a&0xF)-(b&0xF))&0x10) flags|=A_FLAG;
}
static void setsub16(uint16_t a, uint16_t b)
{
- uint32_t c = (uint32_t)a - (uint32_t)b;
- cpu_state.flags &= ~0x8D5;
- cpu_state.flags |= znptable16[c&0xFFFF];
- if (c & 0x10000)
- cpu_state.flags |= C_FLAG;
- if ((a ^ b) & (a ^ c) & 0x8000)
- cpu_state.flags |= V_FLAG;
- if (((a & 0xF) - (b & 0xF)) & 0x10)
- cpu_state.flags |= A_FLAG;
+ uint32_t c=(uint32_t)a-(uint32_t)b;
+ flags&=~0x8D5;
+ flags|=znptable16[c&0xFFFF];
+ if (c&0x10000) flags|=C_FLAG;
+ if ((a^b)&(a^c)&0x8000) flags|=V_FLAG;
+// if (output) printf("%04X %04X %i\n",a^b,a^c,flags&V_FLAG);
+ if (((a&0xF)-(b&0xF))&0x10) flags|=A_FLAG;
}
static void setsub16nc(uint16_t a, uint16_t b)
{
- uint32_t c = (uint32_t)a - (uint32_t)b;
- cpu_state.flags &= ~0x8D4;
- cpu_state.flags |= (znptable16[c&0xFFFF]&~4);
- cpu_state.flags |= (znptable8[c&0xFF]&4);
- if ((a ^ b) & (a ^ c) & 0x8000)
- cpu_state.flags |= V_FLAG;
- if (((a & 0xF) - (b & 0xF)) & 0x10)
- cpu_state.flags |= A_FLAG;
+ uint32_t c=(uint32_t)a-(uint32_t)b;
+ flags&=~0x8D4;
+ flags|=(znptable16[c&0xFFFF]&~4);
+ flags|=(znptable8[c&0xFF]&4);
+ if ((a^b)&(a^c)&0x8000) flags|=V_FLAG;
+ if (((a&0xF)-(b&0xF))&0x10) flags|=A_FLAG;
}
static void setsbc16(uint16_t a, uint16_t b)
{
- uint32_t c = (uint32_t)a - (((uint32_t)b) + tempc);
- cpu_state.flags &= ~0x8D5;
- cpu_state.flags |= (znptable16[c&0xFFFF]&~4);
- cpu_state.flags |= (znptable8[c&0xFF]&4);
- if (c & 0x10000)
- cpu_state.flags |= C_FLAG;
- if ((a ^ b) & (a ^ c) & 0x8000)
- cpu_state.flags |= V_FLAG;
- if (((a & 0xF) - (b & 0xF)) & 0x10)
- cpu_state.flags |= A_FLAG;
+ uint32_t c=(uint32_t)a-(((uint32_t)b)+tempc);
+ flags&=~0x8D5;
+ flags|=(znptable16[c&0xFFFF]&~4);
+ flags|=(znptable8[c&0xFF]&4);
+ if (c&0x10000) flags|=C_FLAG;
+ if ((a^b)&(a^c)&0x8000) flags|=V_FLAG;
+ if (((a&0xF)-(b&0xF))&0x10) flags|=A_FLAG;
}
int current_diff = 0;
-
-/*XT systems use the XT master oscillator (14.318 MHz) rather than the CPU clock
- at the base timer frequency. Because there isn't an integer relationship
- between the two frequencies, use fixed point arithmetic when updating TSC.*/
-static uint64_t tsc_frac = 0;
-
-static void clockhardware()
+void clockhardware()
{
int diff = cycdiff - cycles - current_diff;
current_diff += diff;
-
- tsc_frac += (uint64_t)diff * xt_cpu_multi;
-
- tsc += (tsc_frac >> 32);
- tsc_frac &= 0xffffffff;
- if (TIMER_VAL_LESS_THAN_VAL(timer_target, (uint32_t)tsc))
- timer_process();
+
+ timer_end_period(cycles*xt_cpu_multi);
}
static int takeint = 0;
@@ -872,7 +814,7 @@ static int takeint = 0;
int firstrepcycle=1;
-static void rep(int fv)
+void rep(int fv)
{
uint8_t temp;
int c=CX;
@@ -919,8 +861,8 @@ static void rep(int fv)
{
temp2=readmemb(ds+SI);
outb(DX,temp2);
- if (cpu_state.flags & D_FLAG) SI--;
- else SI++;
+ if (flags&D_FLAG) SI--;
+ else SI++;
c--;
cycles-=5;
}
@@ -933,8 +875,8 @@ static void rep(int fv)
temp2=readmemb(ds+SI);
writememb(es+DI,temp2);
// if (output) printf("Moved %02X from %04X:%04X to %04X:%04X\n",temp2,ds>>4,SI,es>>4,DI);
- if (cpu_state.flags & D_FLAG) { DI--; SI--; }
- else { DI++; SI++; }
+ if (flags&D_FLAG) { DI--; SI--; }
+ else { DI++; SI++; }
c--;
cycles-=17;
clockhardware();
@@ -951,8 +893,8 @@ static void rep(int fv)
memcycs=0;
tempw=readmemw(ds,SI);
writememw(es,DI,tempw);
- if (cpu_state.flags & D_FLAG) { DI-=2; SI-=2; }
- else { DI+=2; SI+=2; }
+ if (flags&D_FLAG) { DI-=2; SI-=2; }
+ else { DI+=2; SI+=2; }
c--;
cycles-=17;
clockhardware();
@@ -964,43 +906,43 @@ static void rep(int fv)
// }
break;
case 0xA6: /*REP CMPSB*/
- if (fv) cpu_state.flags |= Z_FLAG;
- else cpu_state.flags &= ~Z_FLAG;
- while ((c>0) && (fv==((cpu_state.flags & Z_FLAG)?1:0)) && !IRQTEST)
+ if (fv) flags|=Z_FLAG;
+ else flags&=~Z_FLAG;
+ while ((c>0) && (fv==((flags&Z_FLAG)?1:0)) && !IRQTEST)
{
memcycs=0;
temp=readmemb(ds+SI);
temp2=readmemb(es+DI);
// printf("CMPSB %c %c %i %05X %05X %04X:%04X\n",temp,temp2,c,ds+SI,es+DI,cs>>4,pc);
- if (cpu_state.flags & D_FLAG) { DI--; SI--; }
- else { DI++; SI++; }
+ if (flags&D_FLAG) { DI--; SI--; }
+ else { DI++; SI++; }
c--;
cycles -= 30;
setsub8(temp,temp2);
clockhardware();
FETCHADD(30 - memcycs);
}
- if (IRQTEST && c>0 && (fv==((cpu_state.flags & Z_FLAG)?1:0))) cpu_state.pc=ipc;
+ if (IRQTEST && c>0 && (fv==((flags&Z_FLAG)?1:0))) cpu_state.pc=ipc;
// if ((c>0) && (fv==((flags&Z_FLAG)?1:0))) { pc=ipc; firstrepcycle=0; if (ssegs) ssegs++; FETCHCLEAR(); }
// else firstrepcycle=1;
break;
case 0xA7: /*REP CMPSW*/
- if (fv) cpu_state.flags |= Z_FLAG;
- else cpu_state.flags &= ~Z_FLAG;
- while ((c>0) && (fv==((cpu_state.flags & Z_FLAG)?1:0)) && !IRQTEST)
+ if (fv) flags|=Z_FLAG;
+ else flags&=~Z_FLAG;
+ while ((c>0) && (fv==((flags&Z_FLAG)?1:0)) && !IRQTEST)
{
memcycs=0;
tempw=readmemw(ds,SI);
tempw2=readmemw(es,DI);
- if (cpu_state.flags & D_FLAG) { DI-=2; SI-=2; }
- else { DI+=2; SI+=2; }
+ if (flags&D_FLAG) { DI-=2; SI-=2; }
+ else { DI+=2; SI+=2; }
c--;
cycles -= 30;
setsub16(tempw,tempw2);
clockhardware();
FETCHADD(30 - memcycs);
}
- if (IRQTEST && c>0 && (fv==((cpu_state.flags & Z_FLAG)?1:0))) cpu_state.pc=ipc;
+ if (IRQTEST && c>0 && (fv==((flags&Z_FLAG)?1:0))) cpu_state.pc=ipc;
// if ((c>0) && (fv==((flags&Z_FLAG)?1:0))) { pc=ipc; firstrepcycle=0; if (ssegs) ssegs++; FETCHCLEAR(); }
// else firstrepcycle=1;
// if (firstrepcycle) printf("REP CMPSW %06X:%04X %06X:%04X %04X %04X\n",ds,SI,es,DI,tempw,tempw2);
@@ -1010,8 +952,8 @@ static void rep(int fv)
{
memcycs=0;
writememb(es+DI,AL);
- if (cpu_state.flags & D_FLAG) DI--;
- else DI++;
+ if (flags&D_FLAG) DI--;
+ else DI++;
c--;
cycles -= 10;
clockhardware();
@@ -1026,8 +968,8 @@ static void rep(int fv)
{
memcycs=0;
writememw(es,DI,AX);
- if (cpu_state.flags & D_FLAG) DI -= 2;
- else DI += 2;
+ if (flags&D_FLAG) DI-=2;
+ else DI+=2;
c--;
cycles -= 10;
clockhardware();
@@ -1041,8 +983,8 @@ static void rep(int fv)
if (c>0)
{
temp2=readmemb(ds+SI);
- if (cpu_state.flags & D_FLAG) SI--;
- else SI++;
+ if (flags&D_FLAG) SI--;
+ else SI++;
c--;
cycles-=4;
}
@@ -1053,8 +995,8 @@ static void rep(int fv)
if (c>0)
{
tempw2=readmemw(ds,SI);
- if (cpu_state.flags & D_FLAG) SI -= 2;
- else SI += 2;
+ if (flags&D_FLAG) SI-=2;
+ else SI+=2;
c--;
cycles-=4;
}
@@ -1062,37 +1004,37 @@ static void rep(int fv)
else firstrepcycle=1;
break;
case 0xAE: /*REP SCASB*/
- if (fv) cpu_state.flags |= Z_FLAG;
- else cpu_state.flags &= ~Z_FLAG;
- if ((c>0) && (fv==((cpu_state.flags & Z_FLAG)?1:0)))
+ if (fv) flags|=Z_FLAG;
+ else flags&=~Z_FLAG;
+ if ((c>0) && (fv==((flags&Z_FLAG)?1:0)))
{
temp2=readmemb(es+DI);
// if (output) printf("SCASB %02X %c %02X %05X ",temp2,temp2,AL,es+DI);
setsub8(AL,temp2);
// if (output && flags&Z_FLAG) printf("Match %02X %02X\n",AL,temp2);
- if (cpu_state.flags & D_FLAG) DI--;
- else DI++;
+ if (flags&D_FLAG) DI--;
+ else DI++;
c--;
cycles -= 15;
}
//if (output) printf("%i %i %i %i\n",c,(c>0),(fv==((flags&Z_FLAG)?1:0)),((c>0) && (fv==((flags&Z_FLAG)?1:0))));
- if ((c>0) && (fv==((cpu_state.flags & Z_FLAG)?1:0))) { cpu_state.pc=ipc; firstrepcycle=0; if (cpu_state.ssegs) cpu_state.ssegs++; FETCHCLEAR(); }
+ if ((c>0) && (fv==((flags&Z_FLAG)?1:0))) { cpu_state.pc=ipc; firstrepcycle=0; if (cpu_state.ssegs) cpu_state.ssegs++; FETCHCLEAR(); }
else firstrepcycle=1;
// cycles-=120;
break;
case 0xAF: /*REP SCASW*/
- if (fv) cpu_state.flags |= Z_FLAG;
- else cpu_state.flags &= ~Z_FLAG;
- if ((c>0) && (fv==((cpu_state.flags & Z_FLAG)?1:0)))
+ if (fv) flags|=Z_FLAG;
+ else flags&=~Z_FLAG;
+ if ((c>0) && (fv==((flags&Z_FLAG)?1:0)))
{
tempw=readmemw(es,DI);
setsub16(AX,tempw);
- if (cpu_state.flags & D_FLAG) DI -= 2;
- else DI += 2;
+ if (flags&D_FLAG) DI-=2;
+ else DI+=2;
c--;
cycles -= 15;
}
- if ((c>0) && (fv==((cpu_state.flags & Z_FLAG)?1:0))) { cpu_state.pc=ipc; firstrepcycle=0; if (cpu_state.ssegs) cpu_state.ssegs++; FETCHCLEAR(); }
+ if ((c>0) && (fv==((flags&Z_FLAG)?1:0))) { cpu_state.pc=ipc; firstrepcycle=0; if (cpu_state.ssegs) cpu_state.ssegs++; FETCHCLEAR(); }
else firstrepcycle=1;
break;
default:
@@ -1111,11 +1053,13 @@ static void rep(int fv)
}
-static int inhlt=0;
-static int skipnextprint=0;
-
-#include "8087.h"
+int inhlt=0;
+uint16_t lastpc,lastcs;
+int firstrepcycle;
+int skipnextprint=0;
+int instime=0;
+//#if 0
void execx86(int cycs)
{
uint8_t temp,temp2;
@@ -1133,20 +1077,25 @@ void execx86(int cycs)
// return;
while (cycles>0)
{
- uint8_t opcode;
-
+// old83=old82;
+// old82=old8;
+// old8=oldpc|(oldcs<<16);
+// if (pc==0x96B && cs==0x9E040) { printf("Hit it\n"); output=1; timetolive=150; }
+// if (pc<0x8000) printf("%04X : %04X %04X %04X %04X %04X %04X %04X %04X %04X %04X %04X %04X %02X %04X %i\n",pc,AX,BX,CX,DX,cs>>4,ds>>4,es>>4,ss>>4,DI,SI,BP,SP,opcode,flags,disctime);
cycdiff=cycles;
+ timer_start_period(cycles*xt_cpu_multi);
current_diff = 0;
cycles-=nextcyc;
// if (instime) pclog("Cycles %i %i\n",cycles,cycdiff);
nextcyc=0;
// if (output) printf("CLOCK %i %i\n",cycdiff,cycles);
fetchclocks=0;
+ oldcs=CS;
cpu_state.oldpc = cpu_state.pc;
opcodestart:
opcode=FETCH();
- tempc = cpu_state.flags & C_FLAG;
- trap = cpu_state.flags & T_FLAG;
+ tempc=flags&C_FLAG;
+ trap=flags&T_FLAG;
cpu_state.pc--;
// output=1;
// if (output) printf("%04X:%04X : %04X %04X %04X %04X %04X %04X %04X %04X %04X %04X %04X %04X %02X %04X\n",cs>>4,pc,AX,BX,CX,DX,cs>>4,ds>>4,es>>4,ss>>4,DI,SI,BP,SP,opcode,flags&~0x200,rmdat);
@@ -1155,7 +1104,7 @@ void execx86(int cycs)
{
// if ((opcode!=0xF2 && opcode!=0xF3) || firstrepcycle)
// {
- if (!skipnextprint) printf("%04X:%04X : %04X %04X %04X %04X %04X %04X %04X %04X %04X %04X %04X %04X %02X %04X %i %p %02X\n",cs,cpu_state.pc,AX,BX,CX,DX,CS,DS,ES,SS,DI,SI,BP,SP,opcode,cpu_state.flags, ins, ram, ram[0x1a925]);
+ if (!skipnextprint) printf("%04X:%04X : %04X %04X %04X %04X %04X %04X %04X %04X %04X %04X %04X %04X %02X %04X %i %p %02X\n",cs,cpu_state.pc,AX,BX,CX,DX,CS,DS,ES,SS,DI,SI,BP,SP,opcode,flags, ins, ram, ram[0x1a925]);
skipnextprint=0;
// ins++;
// }
@@ -1225,7 +1174,7 @@ void execx86(int cycs)
case 0x07: /*POP ES*/
if (cpu_state.ssegs) ss=oldss;
tempw=readmemw(ss,SP);
- loadseg(tempw,&cpu_state.seg_es);
+ loadseg(tempw,&_es);
SP+=2;
cycles-=12;
break;
@@ -1235,7 +1184,7 @@ void execx86(int cycs)
temp=geteab();
temp|=getr8(cpu_reg);
setznp8(temp);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
seteab(temp);
cycles-=((cpu_mod==3)?3:24);
break;
@@ -1244,7 +1193,7 @@ void execx86(int cycs)
tempw=geteaw();
tempw|=cpu_state.regs[cpu_reg].w;
setznp16(tempw);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
seteaw(tempw);
cycles-=((cpu_mod==3)?3:24);
break;
@@ -1253,7 +1202,7 @@ void execx86(int cycs)
temp=geteab();
temp|=getr8(cpu_reg);
setznp8(temp);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
setr8(cpu_reg,temp);
cycles-=((cpu_mod==3)?3:13);
break;
@@ -1262,20 +1211,20 @@ void execx86(int cycs)
tempw=geteaw();
tempw|=cpu_state.regs[cpu_reg].w;
setznp16(tempw);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
cpu_state.regs[cpu_reg].w=tempw;
cycles-=((cpu_mod==3)?3:13);
break;
case 0x0C: /*OR AL,#8*/
AL|=FETCH();
setznp8(AL);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
cycles-=4;
break;
case 0x0D: /*OR AX,#16*/
AX|=getword();
setznp16(AX);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
cycles-=4;
break;
@@ -1288,7 +1237,7 @@ void execx86(int cycs)
case 0x0F: /*POP CS - 8088/8086 only*/
if (cpu_state.ssegs) ss=oldss;
tempw=readmemw(ss,SP);
- loadseg(tempw,&cpu_state.seg_cs);
+ loadseg(tempw,&_cs);
SP+=2;
cycles-=12;
break;
@@ -1347,7 +1296,7 @@ void execx86(int cycs)
case 0x17: /*POP SS*/
if (cpu_state.ssegs) ss=oldss;
tempw=readmemw(ss,SP);
- loadseg(tempw,&cpu_state.seg_ss);
+ loadseg(tempw,&_ss);
SP+=2;
noint=1;
cycles-=12;
@@ -1412,7 +1361,7 @@ void execx86(int cycs)
case 0x1F: /*POP DS*/
if (cpu_state.ssegs) ss=oldss;
tempw=readmemw(ss,SP);
- loadseg(tempw,&cpu_state.seg_ds);
+ loadseg(tempw,&_ds);
if (cpu_state.ssegs) oldds=ds;
SP+=2;
cycles-=12;
@@ -1423,7 +1372,7 @@ void execx86(int cycs)
temp=geteab();
temp&=getr8(cpu_reg);
setznp8(temp);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
seteab(temp);
cycles-=((cpu_mod==3)?3:24);
break;
@@ -1432,7 +1381,7 @@ void execx86(int cycs)
tempw=geteaw();
tempw&=cpu_state.regs[cpu_reg].w;
setznp16(tempw);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
seteaw(tempw);
cycles-=((cpu_mod==3)?3:24);
break;
@@ -1441,7 +1390,7 @@ void execx86(int cycs)
temp=geteab();
temp&=getr8(cpu_reg);
setznp8(temp);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
setr8(cpu_reg,temp);
cycles-=((cpu_mod==3)?3:13);
break;
@@ -1450,20 +1399,20 @@ void execx86(int cycs)
tempw=geteaw();
tempw&=cpu_state.regs[cpu_reg].w;
setznp16(tempw);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
cpu_state.regs[cpu_reg].w=tempw;
cycles-=((cpu_mod==3)?3:13);
break;
case 0x24: /*AND AL,#8*/
AL&=FETCH();
setznp8(AL);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
cycles-=4;
break;
case 0x25: /*AND AX,#16*/
AX&=getword();
setznp16(AX);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
cycles-=4;
break;
@@ -1477,20 +1426,19 @@ void execx86(int cycs)
// break;
case 0x27: /*DAA*/
- if ((cpu_state.flags & A_FLAG) || ((AL & 0xF) > 9))
+ if ((flags&A_FLAG) || ((AL&0xF)>9))
{
- tempi = ((uint16_t)AL) + 6;
- AL += 6;
- cpu_state.flags |= A_FLAG;
- if (tempi & 0x100)
- cpu_state.flags |= C_FLAG;
+ tempi=((uint16_t)AL)+6;
+ AL+=6;
+ flags|=A_FLAG;
+ if (tempi&0x100) flags|=C_FLAG;
}
// else
// flags&=~A_FLAG;
- if ((cpu_state.flags & C_FLAG) || (AL > 0x9F))
+ if ((flags&C_FLAG) || (AL>0x9F))
{
- AL += 0x60;
- cpu_state.flags |= C_FLAG;
+ AL+=0x60;
+ flags|=C_FLAG;
}
// else
// flags&=~C_FLAG;
@@ -1552,20 +1500,19 @@ void execx86(int cycs)
cycles-=4;
goto opcodestart;
case 0x2F: /*DAS*/
- if ((cpu_state.flags & A_FLAG) || ((AL & 0xF) > 9))
+ if ((flags&A_FLAG)||((AL&0xF)>9))
{
- tempi = ((uint16_t)AL) - 6;
- AL -= 6;
- cpu_state.flags |= A_FLAG;
- if (tempi & 0x100)
- cpu_state.flags |= C_FLAG;
+ tempi=((uint16_t)AL)-6;
+ AL-=6;
+ flags|=A_FLAG;
+ if (tempi&0x100) flags|=C_FLAG;
}
// else
// flags&=~A_FLAG;
- if ((cpu_state.flags & C_FLAG) || (AL > 0x9F))
+ if ((flags&C_FLAG)||(AL>0x9F))
{
- AL -= 0x60;
- cpu_state.flags |= C_FLAG;
+ AL-=0x60;
+ flags|=C_FLAG;
}
// else
// flags&=~C_FLAG;
@@ -1577,7 +1524,7 @@ void execx86(int cycs)
temp=geteab();
temp^=getr8(cpu_reg);
setznp8(temp);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
seteab(temp);
cycles-=((cpu_mod==3)?3:24);
break;
@@ -1586,7 +1533,7 @@ void execx86(int cycs)
tempw=geteaw();
tempw^=cpu_state.regs[cpu_reg].w;
setznp16(tempw);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
seteaw(tempw);
cycles-=((cpu_mod==3)?3:24);
break;
@@ -1595,7 +1542,7 @@ void execx86(int cycs)
temp=geteab();
temp^=getr8(cpu_reg);
setznp8(temp);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
setr8(cpu_reg,temp);
cycles-=((cpu_mod==3)?3:13);
break;
@@ -1604,20 +1551,20 @@ void execx86(int cycs)
tempw=geteaw();
tempw^=cpu_state.regs[cpu_reg].w;
setznp16(tempw);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
cpu_state.regs[cpu_reg].w=tempw;
cycles-=((cpu_mod==3)?3:13);
break;
case 0x34: /*XOR AL,#8*/
AL^=FETCH();
setznp8(AL);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
cycles-=4;
break;
case 0x35: /*XOR AX,#16*/
AX^=getword();
setznp16(AX);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
cycles-=4;
break;
@@ -1631,16 +1578,16 @@ void execx86(int cycs)
// break;
case 0x37: /*AAA*/
- if ((cpu_state.flags & A_FLAG)||((AL & 0xF) > 9))
+ if ((flags&A_FLAG)||((AL&0xF)>9))
{
- AL += 6;
+ AL+=6;
AH++;
- cpu_state.flags |= (A_FLAG|C_FLAG);
+ flags|=(A_FLAG|C_FLAG);
}
else
- cpu_state.flags &= ~(A_FLAG|C_FLAG);
- AL &= 0xF;
- cycles -= 8;
+ flags&=~(A_FLAG|C_FLAG);
+ AL&=0xF;
+ cycles-=8;
break;
case 0x38: /*CMP 8,reg*/
@@ -1692,16 +1639,16 @@ void execx86(int cycs)
// break;
case 0x3F: /*AAS*/
- if ((cpu_state.flags & A_FLAG) || ((AL & 0xF) > 9))
+ if ((flags&A_FLAG)||((AL&0xF)>9))
{
- AL -= 6;
+ AL-=6;
AH--;
- cpu_state.flags |= (A_FLAG|C_FLAG);
+ flags|=(A_FLAG|C_FLAG);
}
else
- cpu_state.flags &= ~(A_FLAG|C_FLAG);
- AL &= 0xF;
- cycles -= 8;
+ flags&=~(A_FLAG|C_FLAG);
+ AL&=0xF;
+ cycles-=8;
break;
case 0x40: case 0x41: case 0x42: case 0x43: /*INC r16*/
@@ -1736,105 +1683,105 @@ void execx86(int cycs)
case 0x60: /*JO alias*/
case 0x70: /*JO*/
offset=(int8_t)FETCH();
- if (cpu_state.flags & V_FLAG) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
+ if (flags&V_FLAG) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x61: /*JNO alias*/
case 0x71: /*JNO*/
offset=(int8_t)FETCH();
- if (!(cpu_state.flags & V_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
+ if (!(flags&V_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x62: /*JB alias*/
case 0x72: /*JB*/
offset=(int8_t)FETCH();
- if (cpu_state.flags & C_FLAG) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
+ if (flags&C_FLAG) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x63: /*JNB alias*/
case 0x73: /*JNB*/
offset=(int8_t)FETCH();
- if (!(cpu_state.flags & C_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
+ if (!(flags&C_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x64: /*JE alias*/
case 0x74: /*JE*/
offset=(int8_t)FETCH();
- if (cpu_state.flags & Z_FLAG) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
+ if (flags&Z_FLAG) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x65: /*JNE alias*/
case 0x75: /*JNE*/
offset=(int8_t)FETCH();
cycles-=4;
- if (!(cpu_state.flags & Z_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
+ if (!(flags&Z_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
break;
case 0x66: /*JBE alias*/
case 0x76: /*JBE*/
offset=(int8_t)FETCH();
- if (cpu_state.flags & (C_FLAG|Z_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
+ if (flags&(C_FLAG|Z_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x67: /*JNBE alias*/
case 0x77: /*JNBE*/
offset=(int8_t)FETCH();
- if (!(cpu_state.flags & (C_FLAG|Z_FLAG))) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
+ if (!(flags&(C_FLAG|Z_FLAG))) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x68: /*JS alias*/
case 0x78: /*JS*/
offset=(int8_t)FETCH();
- if (cpu_state.flags & N_FLAG) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
+ if (flags&N_FLAG) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x69: /*JNS alias*/
case 0x79: /*JNS*/
offset=(int8_t)FETCH();
- if (!(cpu_state.flags & N_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
+ if (!(flags&N_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x6A: /*JP alias*/
case 0x7A: /*JP*/
offset=(int8_t)FETCH();
- if (cpu_state.flags & P_FLAG) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
+ if (flags&P_FLAG) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x6B: /*JNP alias*/
case 0x7B: /*JNP*/
offset=(int8_t)FETCH();
- if (!(cpu_state.flags & P_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
+ if (!(flags&P_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x6C: /*JL alias*/
case 0x7C: /*JL*/
offset=(int8_t)FETCH();
- temp=(cpu_state.flags & N_FLAG)?1:0;
- temp2=(cpu_state.flags & V_FLAG)?1:0;
+ temp=(flags&N_FLAG)?1:0;
+ temp2=(flags&V_FLAG)?1:0;
if (temp!=temp2) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x6D: /*JNL alias*/
case 0x7D: /*JNL*/
offset=(int8_t)FETCH();
- temp=(cpu_state.flags & N_FLAG)?1:0;
- temp2=(cpu_state.flags & V_FLAG)?1:0;
+ temp=(flags&N_FLAG)?1:0;
+ temp2=(flags&V_FLAG)?1:0;
if (temp==temp2) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x6E: /*JLE alias*/
case 0x7E: /*JLE*/
offset=(int8_t)FETCH();
- temp=(cpu_state.flags & N_FLAG)?1:0;
- temp2=(cpu_state.flags & V_FLAG)?1:0;
- if ((cpu_state.flags & Z_FLAG) || (temp!=temp2)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
+ temp=(flags&N_FLAG)?1:0;
+ temp2=(flags&V_FLAG)?1:0;
+ if ((flags&Z_FLAG) || (temp!=temp2)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x6F: /*JNLE alias*/
case 0x7F: /*JNLE*/
offset=(int8_t)FETCH();
- temp=(cpu_state.flags & N_FLAG)?1:0;
- temp2=(cpu_state.flags & V_FLAG)?1:0;
- if (!((cpu_state.flags & Z_FLAG) || (temp!=temp2))) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
+ temp=(flags&N_FLAG)?1:0;
+ temp2=(flags&V_FLAG)?1:0;
+ if (!((flags&Z_FLAG) || (temp!=temp2))) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
@@ -1852,7 +1799,7 @@ void execx86(int cycs)
case 0x08: /*OR b,#8*/
temp|=temp2;
setznp8(temp);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
seteab(temp);
cycles-=((cpu_mod==3)?4:23);
break;
@@ -1871,7 +1818,7 @@ void execx86(int cycs)
case 0x20: /*AND b,#8*/
temp&=temp2;
setznp8(temp);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
seteab(temp);
cycles-=((cpu_mod==3)?4:23);
break;
@@ -1883,7 +1830,7 @@ void execx86(int cycs)
case 0x30: /*XOR b,#8*/
temp^=temp2;
setznp8(temp);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
seteab(temp);
cycles-=((cpu_mod==3)?4:23);
break;
@@ -1914,7 +1861,7 @@ void execx86(int cycs)
case 0x08: /*OR w,#16*/
tempw|=tempw2;
setznp16(tempw);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
seteaw(tempw);
cycles-=((cpu_mod==3)?4:23);
break;
@@ -1928,7 +1875,7 @@ void execx86(int cycs)
case 0x20: /*AND w,#16*/
tempw&=tempw2;
setznp16(tempw);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
seteaw(tempw);
cycles-=((cpu_mod==3)?4:23);
break;
@@ -1947,7 +1894,7 @@ void execx86(int cycs)
case 0x30: /*XOR w,#16*/
tempw^=tempw2;
setznp16(tempw);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
seteaw(tempw);
cycles-=((cpu_mod==3)?4:23);
break;
@@ -1981,7 +1928,7 @@ void execx86(int cycs)
tempw|=tempw2;
setznp16(tempw);
seteaw(tempw);
- cpu_state.flags &= ~(C_FLAG|A_FLAG|V_FLAG);
+ flags&=~(C_FLAG|A_FLAG|V_FLAG);
cycles-=((cpu_mod==3)?4:23);
break;
case 0x10: /*ADC w,#8*/
@@ -2003,7 +1950,7 @@ void execx86(int cycs)
setznp16(tempw);
seteaw(tempw);
cycles-=((cpu_mod==3)?4:23);
- cpu_state.flags &= ~(C_FLAG|A_FLAG|V_FLAG);
+ flags&=~(C_FLAG|A_FLAG|V_FLAG);
break;
case 0x28: /*SUB w,#8*/
setsub16(tempw,tempw2);
@@ -2016,7 +1963,7 @@ void execx86(int cycs)
setznp16(tempw);
seteaw(tempw);
cycles-=((cpu_mod==3)?4:23);
- cpu_state.flags &= ~(C_FLAG|A_FLAG|V_FLAG);
+ flags&=~(C_FLAG|A_FLAG|V_FLAG);
break;
case 0x38: /*CMP w,#8*/
setsub16(tempw,tempw2);
@@ -2035,7 +1982,7 @@ void execx86(int cycs)
temp=geteab();
temp2=getr8(cpu_reg);
setznp8(temp&temp2);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
cycles-=((cpu_mod==3)?3:13);
break;
case 0x85: /*TEST w,reg*/
@@ -2043,7 +1990,7 @@ void execx86(int cycs)
tempw=geteaw();
tempw2=cpu_state.regs[cpu_reg].w;
setznp16(tempw&tempw2);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
cycles-=((cpu_mod==3)?3:13);
break;
case 0x86: /*XCHG b,reg*/
@@ -2120,20 +2067,20 @@ void execx86(int cycs)
{
case 0x00: /*ES*/
tempw=geteaw();
- loadseg(tempw,&cpu_state.seg_es);
+ loadseg(tempw,&_es);
break;
case 0x08: /*CS - 8088/8086 only*/
tempw=geteaw();
- loadseg(tempw,&cpu_state.seg_cs);
+ loadseg(tempw,&_cs);
break;
case 0x18: /*DS*/
tempw=geteaw();
- loadseg(tempw,&cpu_state.seg_ds);
+ loadseg(tempw,&_ds);
if (cpu_state.ssegs) oldds=ds;
break;
case 0x10: /*SS*/
tempw=geteaw();
- loadseg(tempw,&cpu_state.seg_ss);
+ loadseg(tempw,&_ss);
if (cpu_state.ssegs) oldss=ss;
// printf("LOAD SS %04X %04X\n",tempw,SS);
// printf("SS loaded with %04X %04X:%04X %04X %04X %04X\n",ss>>4,cs>>4,pc,CX,DX,es>>4);
@@ -2193,22 +2140,22 @@ void execx86(int cycs)
break;
case 0x9C: /*PUSHF*/
if (cpu_state.ssegs) ss=oldss;
- writememw(ss, ((SP-2)&0xFFFF), cpu_state.flags | 0xF000);
+ writememw(ss,((SP-2)&0xFFFF),flags|0xF000);
SP-=2;
cycles-=14;
break;
case 0x9D: /*POPF*/
if (cpu_state.ssegs) ss=oldss;
- cpu_state.flags = readmemw(ss,SP) & 0xFFF;
+ flags=readmemw(ss,SP)&0xFFF;
SP+=2;
cycles-=12;
break;
case 0x9E: /*SAHF*/
- cpu_state.flags = (cpu_state.flags & 0xFF00) | AH;
+ flags=(flags&0xFF00)|AH;
cycles-=4;
break;
case 0x9F: /*LAHF*/
- AH = cpu_state.flags & 0xFF;
+ AH=flags&0xFF;
cycles-=4;
break;
@@ -2221,7 +2168,7 @@ void execx86(int cycs)
addr=getword();
// printf("Reading AX from %05X %04X:%04X\n",ds+addr,ds>>4,addr);
AX=readmemw(ds,addr);
- cycles-=14;
+ cycles-=!4;
break;
case 0xA2: /*MOV (w),AL*/
addr=getword();
@@ -2238,23 +2185,23 @@ void execx86(int cycs)
case 0xA4: /*MOVSB*/
temp=readmemb(ds+SI);
writememb(es+DI,temp);
- if (cpu_state.flags & D_FLAG) { DI--; SI--; }
- else { DI++; SI++; }
+ if (flags&D_FLAG) { DI--; SI--; }
+ else { DI++; SI++; }
cycles-=18;
break;
case 0xA5: /*MOVSW*/
tempw=readmemw(ds,SI);
writememw(es,DI,tempw);
- if (cpu_state.flags & D_FLAG) { DI -= 2; SI -= 2; }
- else { DI += 2; SI += 2; }
+ if (flags&D_FLAG) { DI-=2; SI-=2; }
+ else { DI+=2; SI+=2; }
cycles-=18;
break;
case 0xA6: /*CMPSB*/
temp =readmemb(ds+SI);
temp2=readmemb(es+DI);
setsub8(temp,temp2);
- if (cpu_state.flags & D_FLAG) { DI--; SI--; }
- else { DI++; SI++; }
+ if (flags&D_FLAG) { DI--; SI--; }
+ else { DI++; SI++; }
cycles-=30;
break;
case 0xA7: /*CMPSW*/
@@ -2262,60 +2209,60 @@ void execx86(int cycs)
tempw2=readmemw(es,DI);
// printf("CMPSW %04X %04X\n",tempw,tempw2);
setsub16(tempw,tempw2);
- if (cpu_state.flags & D_FLAG) { DI -= 2; SI -= 2; }
- else { DI += 2; SI += 2; }
+ if (flags&D_FLAG) { DI-=2; SI-=2; }
+ else { DI+=2; SI+=2; }
cycles-=30;
break;
case 0xA8: /*TEST AL,#8*/
temp=FETCH();
setznp8(AL&temp);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
cycles-=5;
break;
case 0xA9: /*TEST AX,#16*/
tempw=getword();
setznp16(AX&tempw);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
cycles-=5;
break;
case 0xAA: /*STOSB*/
writememb(es+DI,AL);
- if (cpu_state.flags & D_FLAG) DI--;
- else DI++;
+ if (flags&D_FLAG) DI--;
+ else DI++;
cycles-=11;
break;
case 0xAB: /*STOSW*/
writememw(es,DI,AX);
- if (cpu_state.flags & D_FLAG) DI -= 2;
- else DI += 2;
+ if (flags&D_FLAG) DI-=2;
+ else DI+=2;
cycles-=11;
break;
case 0xAC: /*LODSB*/
AL=readmemb(ds+SI);
// printf("LODSB %04X:%04X %02X %04X:%04X\n",cs>>4,pc,AL,ds>>4,SI);
- if (cpu_state.flags & D_FLAG) SI--;
- else SI++;
+ if (flags&D_FLAG) SI--;
+ else SI++;
cycles-=16;
break;
case 0xAD: /*LODSW*/
// if (times) printf("LODSW %04X:%04X\n",cs>>4,pc);
AX=readmemw(ds,SI);
- if (cpu_state.flags & D_FLAG) SI -= 2;
- else SI += 2;
+ if (flags&D_FLAG) SI-=2;
+ else SI+=2;
cycles-=16;
break;
case 0xAE: /*SCASB*/
temp=readmemb(es+DI);
setsub8(AL,temp);
- if (cpu_state.flags & D_FLAG) DI--;
- else DI++;
+ if (flags&D_FLAG) DI--;
+ else DI++;
cycles-=19;
break;
case 0xAF: /*SCASW*/
tempw=readmemw(es,DI);
setsub16(AX,tempw);
- if (cpu_state.flags & D_FLAG) DI -= 2;
- else DI += 2;
+ if (flags&D_FLAG) DI-=2;
+ else DI+=2;
cycles-=19;
break;
@@ -2382,14 +2329,14 @@ void execx86(int cycs)
fetchea();
cpu_state.regs[cpu_reg].w=readmemw(easeg,cpu_state.eaaddr); //geteaw();
tempw=readmemw(easeg,(cpu_state.eaaddr+2)&0xFFFF); //geteaw2();
- loadseg(tempw,&cpu_state.seg_es);
+ loadseg(tempw,&_es);
cycles-=24;
break;
case 0xC5: /*LDS*/
fetchea();
cpu_state.regs[cpu_reg].w=readmemw(easeg,cpu_state.eaaddr);
tempw=readmemw(easeg,(cpu_state.eaaddr+2)&0xFFFF);
- loadseg(tempw,&cpu_state.seg_ds);
+ loadseg(tempw,&_ds);
if (cpu_state.ssegs) oldds=ds;
cycles-=24;
break;
@@ -2430,13 +2377,13 @@ void execx86(int cycs)
break;
case 0xCC: /*INT 3*/
if (cpu_state.ssegs) ss=oldss;
- writememw(ss, ((SP-2)&0xFFFF), cpu_state.flags | 0xF000);
- writememw(ss, ((SP-4)&0xFFFF), CS);
- writememw(ss, ((SP-6)&0xFFFF), cpu_state.pc);
+ writememw(ss,((SP-2)&0xFFFF),flags|0xF000);
+ writememw(ss,((SP-4)&0xFFFF),CS);
+ writememw(ss,((SP-6)&0xFFFF),cpu_state.pc);
SP-=6;
addr=3<<2;
- cpu_state.flags &= ~I_FLAG;
- cpu_state.flags &= ~T_FLAG;
+ flags&=~I_FLAG;
+ flags&=~T_FLAG;
// printf("CC %04X:%04X ",CS,pc);
cpu_state.pc=readmemw(0,addr);
loadcs(readmemw(0,addr+2));
@@ -2445,13 +2392,15 @@ void execx86(int cycs)
cycles-=72;
break;
case 0xCD: /*INT*/
+ lastpc=cpu_state.pc;
+ lastcs=CS;
temp=FETCH();
if (cpu_state.ssegs) ss=oldss;
- writememw(ss, ((SP-2)&0xFFFF), cpu_state.flags | 0xF000);
- writememw(ss, ((SP-4)&0xFFFF), CS);
- writememw(ss, ((SP-6)&0xFFFF), cpu_state.pc);
- cpu_state.flags &= ~T_FLAG;
+ writememw(ss,((SP-2)&0xFFFF),flags|0xF000);
+ writememw(ss,((SP-4)&0xFFFF),CS);
+ writememw(ss,((SP-6)&0xFFFF),cpu_state.pc);
+ flags&=~T_FLAG;
SP-=6;
addr=temp<<2;
cpu_state.pc=readmemw(0,addr);
@@ -2468,7 +2417,7 @@ void execx86(int cycs)
cpu_state.pc=readmemw(ss,SP);
// printf("CF\n");
loadcs(readmemw(ss,((SP+2)&0xFFFF)));
- cpu_state.flags = readmemw(ss,((SP+4)&0xFFFF))&0xFFF;
+ flags=readmemw(ss,((SP+4)&0xFFFF))&0xFFF;
SP+=6;
cycles-=44;
FETCHCLEAR();
@@ -2480,85 +2429,83 @@ void execx86(int cycs)
switch (rmdat&0x38)
{
case 0x00: /*ROL b,1*/
- if (temp&0x80) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ if (temp&0x80) flags|=C_FLAG;
+ else flags&=~C_FLAG;
temp<<=1;
- if (cpu_state.flags & C_FLAG)
- temp |= 1;
+ if (flags&C_FLAG) temp|=1;
seteab(temp);
// setznp8(temp);
- if ((cpu_state.flags&C_FLAG) ^ (temp >> 7)) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if ((flags&C_FLAG)^(temp>>7)) flags|=V_FLAG;
+ else flags&=~V_FLAG;
cycles-=((cpu_mod==3)?2:23);
break;
case 0x08: /*ROR b,1*/
- if (temp&1) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ if (temp&1) flags|=C_FLAG;
+ else flags&=~C_FLAG;
temp>>=1;
- if (cpu_state.flags & C_FLAG)
- temp |= 0x80;
+ if (flags&C_FLAG) temp|=0x80;
seteab(temp);
// setznp8(temp);
- if ((temp^(temp>>1))&0x40) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if ((temp^(temp>>1))&0x40) flags|=V_FLAG;
+ else flags&=~V_FLAG;
cycles-=((cpu_mod==3)?2:23);
break;
case 0x10: /*RCL b,1*/
- temp2 = cpu_state.flags & C_FLAG;
- if (temp&0x80) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ temp2=flags&C_FLAG;
+ if (temp&0x80) flags|=C_FLAG;
+ else flags&=~C_FLAG;
temp<<=1;
if (temp2) temp|=1;
seteab(temp);
// setznp8(temp);
- if ((cpu_state.flags & C_FLAG)^(temp>>7)) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if ((flags&C_FLAG)^(temp>>7)) flags|=V_FLAG;
+ else flags&=~V_FLAG;
cycles-=((cpu_mod==3)?2:23);
break;
case 0x18: /*RCR b,1*/
- temp2 = cpu_state.flags & C_FLAG;
- if (temp&1) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ temp2=flags&C_FLAG;
+ if (temp&1) flags|=C_FLAG;
+ else flags&=~C_FLAG;
temp>>=1;
if (temp2) temp|=0x80;
seteab(temp);
// setznp8(temp);
- if ((temp^(temp>>1))&0x40) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if ((temp^(temp>>1))&0x40) flags|=V_FLAG;
+ else flags&=~V_FLAG;
cycles-=((cpu_mod==3)?2:23);
break;
case 0x20: case 0x30: /*SHL b,1*/
- if (temp&0x80) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
- if ((temp^(temp<<1))&0x80) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if (temp&0x80) flags|=C_FLAG;
+ else flags&=~C_FLAG;
+ if ((temp^(temp<<1))&0x80) flags|=V_FLAG;
+ else flags&=~V_FLAG;
temp<<=1;
seteab(temp);
setznp8(temp);
cycles-=((cpu_mod==3)?2:23);
- cpu_state.flags |= A_FLAG;
+ flags|=A_FLAG;
break;
case 0x28: /*SHR b,1*/
- if (temp&1) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
- if (temp&0x80) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if (temp&1) flags|=C_FLAG;
+ else flags&=~C_FLAG;
+ if (temp&0x80) flags|=V_FLAG;
+ else flags&=~V_FLAG;
temp>>=1;
seteab(temp);
setznp8(temp);
cycles-=((cpu_mod==3)?2:23);
- cpu_state.flags |= A_FLAG;
+ flags|=A_FLAG;
break;
case 0x38: /*SAR b,1*/
- if (temp&1) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ if (temp&1) flags|=C_FLAG;
+ else flags&=~C_FLAG;
temp>>=1;
if (temp&0x40) temp|=0x80;
seteab(temp);
setznp8(temp);
cycles-=((cpu_mod==3)?2:23);
- cpu_state.flags |= A_FLAG;
- cpu_state.flags &= ~V_FLAG;
+ flags|=A_FLAG;
+ flags&=~V_FLAG;
break;
// default:
@@ -2574,83 +2521,83 @@ void execx86(int cycs)
switch (rmdat&0x38)
{
case 0x00: /*ROL w,1*/
- if (tempw&0x8000) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ if (tempw&0x8000) flags|=C_FLAG;
+ else flags&=~C_FLAG;
tempw<<=1;
- if (cpu_state.flags & C_FLAG) tempw|=1;
+ if (flags&C_FLAG) tempw|=1;
seteaw(tempw);
// setznp16(tempw);
- if ((cpu_state.flags & C_FLAG)^(tempw>>15)) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if ((flags&C_FLAG)^(tempw>>15)) flags|=V_FLAG;
+ else flags&=~V_FLAG;
cycles-=((cpu_mod==3)?2:23);
break;
case 0x08: /*ROR w,1*/
- if (tempw&1) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ if (tempw&1) flags|=C_FLAG;
+ else flags&=~C_FLAG;
tempw>>=1;
- if (cpu_state.flags & C_FLAG) tempw|=0x8000;
+ if (flags&C_FLAG) tempw|=0x8000;
seteaw(tempw);
// setznp16(tempw);
- if ((tempw^(tempw>>1))&0x4000) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if ((tempw^(tempw>>1))&0x4000) flags|=V_FLAG;
+ else flags&=~V_FLAG;
cycles-=((cpu_mod==3)?2:23);
break;
case 0x10: /*RCL w,1*/
- temp2 = cpu_state.flags & C_FLAG;
- if (tempw&0x8000) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ temp2=flags&C_FLAG;
+ if (tempw&0x8000) flags|=C_FLAG;
+ else flags&=~C_FLAG;
tempw<<=1;
if (temp2) tempw|=1;
seteaw(tempw);
- if ((cpu_state.flags & C_FLAG)^(tempw>>15)) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if ((flags&C_FLAG)^(tempw>>15)) flags|=V_FLAG;
+ else flags&=~V_FLAG;
cycles-=((cpu_mod==3)?2:23);
break;
case 0x18: /*RCR w,1*/
- temp2 = cpu_state.flags & C_FLAG;
- if (tempw&1) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ temp2=flags&C_FLAG;
+ if (tempw&1) flags|=C_FLAG;
+ else flags&=~C_FLAG;
tempw>>=1;
if (temp2) tempw|=0x8000;
seteaw(tempw);
// setznp16(tempw);
- if ((tempw^(tempw>>1))&0x4000) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if ((tempw^(tempw>>1))&0x4000) flags|=V_FLAG;
+ else flags&=~V_FLAG;
cycles-=((cpu_mod==3)?2:23);
break;
case 0x20: case 0x30: /*SHL w,1*/
- if (tempw&0x8000) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
- if ((tempw^(tempw<<1))&0x8000) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if (tempw&0x8000) flags|=C_FLAG;
+ else flags&=~C_FLAG;
+ if ((tempw^(tempw<<1))&0x8000) flags|=V_FLAG;
+ else flags&=~V_FLAG;
tempw<<=1;
seteaw(tempw);
setznp16(tempw);
cycles-=((cpu_mod==3)?2:23);
- cpu_state.flags |= A_FLAG;
+ flags|=A_FLAG;
break;
case 0x28: /*SHR w,1*/
- if (tempw&1) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
- if (tempw&0x8000) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if (tempw&1) flags|=C_FLAG;
+ else flags&=~C_FLAG;
+ if (tempw&0x8000) flags|=V_FLAG;
+ else flags&=~V_FLAG;
tempw>>=1;
seteaw(tempw);
setznp16(tempw);
cycles-=((cpu_mod==3)?2:23);
- cpu_state.flags |= A_FLAG;
+ flags|=A_FLAG;
break;
case 0x38: /*SAR w,1*/
- if (tempw&1) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ if (tempw&1) flags|=C_FLAG;
+ else flags&=~C_FLAG;
tempw>>=1;
if (tempw&0x4000) tempw|=0x8000;
seteaw(tempw);
setznp16(tempw);
cycles-=((cpu_mod==3)?2:23);
- cpu_state.flags |= A_FLAG;
- cpu_state.flags &= ~V_FLAG;
+ flags|=A_FLAG;
+ flags&=~V_FLAG;
break;
// default:
@@ -2677,12 +2624,12 @@ void execx86(int cycs)
c--;
cycles-=4;
}
- if (temp2) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ if (temp2) flags|=C_FLAG;
+ else flags&=~C_FLAG;
seteab(temp);
// setznp8(temp);
- if ((cpu_state.flags & C_FLAG)^(temp>>7)) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if ((flags&C_FLAG)^(temp>>7)) flags|=V_FLAG;
+ else flags&=~V_FLAG;
cycles-=((cpu_mod==3)?8:28);
break;
case 0x08: /*ROR b,CL*/
@@ -2694,40 +2641,40 @@ void execx86(int cycs)
c--;
cycles-=4;
}
- if (temp2) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ if (temp2) flags|=C_FLAG;
+ else flags&=~C_FLAG;
seteab(temp);
- if ((temp^(temp>>1))&0x40) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if ((temp^(temp>>1))&0x40) flags|=V_FLAG;
+ else flags&=~V_FLAG;
cycles-=((cpu_mod==3)?8:28);
break;
case 0x10: /*RCL b,CL*/
// printf("RCL %i %02X %02X\n",c,CL,temp);
while (c>0)
{
- templ=cpu_state.flags & C_FLAG;
+ templ=flags&C_FLAG;
temp2=temp&0x80;
temp<<=1;
- if (temp2) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ if (temp2) flags|=C_FLAG;
+ else flags&=~C_FLAG;
if (templ) temp|=1;
c--;
cycles-=4;
}
// printf("Now %02X\n",temp);
seteab(temp);
- if ((cpu_state.flags & C_FLAG)^(temp>>7)) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if ((flags&C_FLAG)^(temp>>7)) flags|=V_FLAG;
+ else flags&=~V_FLAG;
cycles-=((cpu_mod==3)?8:28);
break;
case 0x18: /*RCR b,CL*/
while (c>0)
{
- templ=cpu_state.flags & C_FLAG;
+ templ=flags&C_FLAG;
temp2=temp&1;
temp>>=1;
- if (temp2) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ if (temp2) flags|=C_FLAG;
+ else flags&=~C_FLAG;
if (templ) temp|=0x80;
c--;
cycles-=4;
@@ -2735,49 +2682,33 @@ void execx86(int cycs)
// if (temp2) flags|=C_FLAG;
// else flags&=~C_FLAG;
seteab(temp);
- if ((temp^(temp>>1))&0x40) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if ((temp^(temp>>1))&0x40) flags|=V_FLAG;
+ else flags&=~V_FLAG;
cycles-=((cpu_mod==3)?8:28);
break;
case 0x20: case 0x30: /*SHL b,CL*/
- if (c > 8)
- {
- temp = 0;
- cpu_state.flags &= ~C_FLAG;
- }
- else
- {
- if ((temp<<(c-1))&0x80) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
- temp<<=c;
- }
+ if ((temp<<(c-1))&0x80) flags|=C_FLAG;
+ else flags&=~C_FLAG;
+ temp<<=c;
seteab(temp);
setznp8(temp);
cycles-=(c*4);
cycles-=((cpu_mod==3)?8:28);
- cpu_state.flags |= A_FLAG;
+ flags|=A_FLAG;
break;
case 0x28: /*SHR b,CL*/
- if (c > 8)
- {
- temp = 0;
- cpu_state.flags &= ~C_FLAG;
- }
- else
- {
- if ((temp>>(c-1))&1) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
- temp>>=c;
- }
+ if ((temp>>(c-1))&1) flags|=C_FLAG;
+ else flags&=~C_FLAG;
+ temp>>=c;
seteab(temp);
setznp8(temp);
cycles-=(c*4);
cycles-=((cpu_mod==3)?8:28);
- cpu_state.flags |= A_FLAG;
+ flags|=A_FLAG;
break;
case 0x38: /*SAR b,CL*/
- if ((temp>>(c-1))&1) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ if ((temp>>(c-1))&1) flags|=C_FLAG;
+ else flags&=~C_FLAG;
while (c>0)
{
temp>>=1;
@@ -2788,7 +2719,7 @@ void execx86(int cycs)
seteab(temp);
setznp8(temp);
cycles-=((cpu_mod==3)?8:28);
- cpu_state.flags |= A_FLAG;
+ flags|=A_FLAG;
break;
// default:
@@ -2815,11 +2746,11 @@ void execx86(int cycs)
c--;
cycles-=4;
}
- if (temp) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ if (temp) flags|=C_FLAG;
+ else flags&=~C_FLAG;
seteaw(tempw);
- if ((cpu_state.flags & C_FLAG)^(tempw>>15)) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if ((flags&C_FLAG)^(tempw>>15)) flags|=V_FLAG;
+ else flags&=~V_FLAG;
cycles-=((cpu_mod==3)?8:28);
break;
case 0x08: /*ROR w,CL*/
@@ -2830,46 +2761,46 @@ void execx86(int cycs)
c--;
cycles-=4;
}
- if (tempw2) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ if (tempw2) flags|=C_FLAG;
+ else flags&=~C_FLAG;
seteaw(tempw);
- if ((tempw^(tempw>>1))&0x4000) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if ((tempw^(tempw>>1))&0x4000) flags|=V_FLAG;
+ else flags&=~V_FLAG;
cycles-=((cpu_mod==3)?8:28);
break;
case 0x10: /*RCL w,CL*/
while (c>0)
{
- templ = cpu_state.flags & C_FLAG;
- if (tempw&0x8000) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ templ=flags&C_FLAG;
+ if (tempw&0x8000) flags|=C_FLAG;
+ else flags&=~C_FLAG;
tempw=(tempw<<1)|templ;
c--;
cycles-=4;
}
- if (templ) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ if (templ) flags|=C_FLAG;
+ else flags&=~C_FLAG;
seteaw(tempw);
- if ((cpu_state.flags & C_FLAG)^(tempw>>15)) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if ((flags&C_FLAG)^(tempw>>15)) flags|=V_FLAG;
+ else flags&=~V_FLAG;
cycles-=((cpu_mod==3)?8:28);
break;
case 0x18: /*RCR w,CL*/
while (c>0)
{
- templ = cpu_state.flags & C_FLAG;
+ templ=flags&C_FLAG;
tempw2=(templ&1)?0x8000:0;
- if (tempw&1) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ if (tempw&1) flags|=C_FLAG;
+ else flags&=~C_FLAG;
tempw=(tempw>>1)|tempw2;
c--;
cycles-=4;
}
- if (tempw2) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ if (tempw2) flags|=C_FLAG;
+ else flags&=~C_FLAG;
seteaw(tempw);
- if ((tempw^(tempw>>1))&0x4000) cpu_state.flags |= V_FLAG;
- else cpu_state.flags &= ~V_FLAG;
+ if ((tempw^(tempw>>1))&0x4000) flags|=V_FLAG;
+ else flags&=~V_FLAG;
cycles-=((cpu_mod==3)?8:28);
break;
@@ -2877,44 +2808,36 @@ void execx86(int cycs)
if (c>16)
{
tempw=0;
- cpu_state.flags &= ~C_FLAG;
+ flags&=~C_FLAG;
}
else
{
- if ((tempw<<(c-1))&0x8000) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ if ((tempw<<(c-1))&0x8000) flags|=C_FLAG;
+ else flags&=~C_FLAG;
tempw<<=c;
}
seteaw(tempw);
setznp16(tempw);
cycles-=(c*4);
cycles-=((cpu_mod==3)?8:28);
- cpu_state.flags |= A_FLAG;
+ flags|=A_FLAG;
break;
case 0x28: /*SHR w,CL*/
- if (c > 16)
- {
- tempw = 0;
- cpu_state.flags &= ~C_FLAG;
- }
- else
- {
- if ((tempw>>(c-1))&1) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
- tempw>>=c;
- }
+ if ((tempw>>(c-1))&1) flags|=C_FLAG;
+ else flags&=~C_FLAG;
+ tempw>>=c;
seteaw(tempw);
setznp16(tempw);
cycles-=(c*4);
cycles-=((cpu_mod==3)?8:28);
- cpu_state.flags |= A_FLAG;
+ flags|=A_FLAG;
break;
case 0x38: /*SAR w,CL*/
tempw2=tempw&0x8000;
- if ((tempw>>(c-1))&1) cpu_state.flags |= C_FLAG;
- else cpu_state.flags &= ~C_FLAG;
+ if ((tempw>>(c-1))&1) flags|=C_FLAG;
+ else flags&=~C_FLAG;
while (c>0)
{
tempw=(tempw>>1)|tempw2;
@@ -2924,7 +2847,7 @@ void execx86(int cycs)
seteaw(tempw);
setznp16(tempw);
cycles-=((cpu_mod==3)?8:28);
- cpu_state.flags |= A_FLAG;
+ flags|=A_FLAG;
break;
// default:
@@ -2949,7 +2872,7 @@ void execx86(int cycs)
cycles-=60;
break;
case 0xD6: /*SETALC*/
- AL = (cpu_state.flags & C_FLAG) ? 0xff : 0;
+ AL = (flags & C_FLAG) ? 0xff : 0;
cycles -= 4;
break;
case 0xD7: /*XLAT*/
@@ -2957,90 +2880,22 @@ void execx86(int cycs)
AL=readmemb(ds+addr);
cycles-=11;
break;
-
- case 0xd8:
+ case 0xD9: case 0xDA: case 0xDB: case 0xDD: /*ESCAPE*/
+ case 0xDC: case 0xDE: case 0xDF: case 0xD8:
fetchea();
- if (hasfpu)
- {
- uint16_t save_pc = cpu_state.pc;
- ops_808x_fpu_d8_a16[rmdat >> 3](rmdat);
- cpu_state.pc = save_pc;
- }
- break;
- case 0xd9:
- fetchea();
- if (hasfpu)
- {
- uint16_t save_pc = cpu_state.pc;
- ops_808x_fpu_d9_a16[rmdat](rmdat);
- cpu_state.pc = save_pc;
- }
- break;
- case 0xda:
- fetchea();
- if (hasfpu)
- {
- uint16_t save_pc = cpu_state.pc;
- ops_808x_fpu_da_a16[rmdat](rmdat);
- cpu_state.pc = save_pc;
- }
- break;
- case 0xdb:
- fetchea();
- if (hasfpu)
- {
- uint16_t save_pc = cpu_state.pc;
- ops_808x_fpu_db_a16[rmdat](rmdat);
- cpu_state.pc = save_pc;
- }
- break;
- case 0xdc:
- fetchea();
- if (hasfpu)
- {
- uint16_t save_pc = cpu_state.pc;
- ops_808x_fpu_dc_a16[rmdat >> 3](rmdat);
- cpu_state.pc = save_pc;
- }
- break;
- case 0xdd:
- fetchea();
- if (hasfpu)
- {
- uint16_t save_pc = cpu_state.pc;
- ops_808x_fpu_dd_a16[rmdat](rmdat);
- cpu_state.pc = save_pc;
- }
- break;
- case 0xde:
- fetchea();
- if (hasfpu)
- {
- uint16_t save_pc = cpu_state.pc;
- ops_808x_fpu_de_a16[rmdat](rmdat);
- cpu_state.pc = save_pc;
- }
- break;
- case 0xdf:
- fetchea();
- if (hasfpu)
- {
- uint16_t save_pc = cpu_state.pc;
- ops_808x_fpu_df_a16[rmdat](rmdat);
- cpu_state.pc = save_pc;
- }
+ geteab();
break;
case 0xE0: /*LOOPNE*/
offset=(int8_t)FETCH();
CX--;
- if (CX && !(cpu_state.flags & Z_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
+ if (CX && !(flags&Z_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=6;
break;
case 0xE1: /*LOOPE*/
offset=(int8_t)FETCH();
CX--;
- if (CX && (cpu_state.flags & Z_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
+ if (CX && (flags&Z_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=6;
break;
case 0xE2: /*LOOP*/
@@ -3147,7 +3002,7 @@ void execx86(int cycs)
break;
case 0xF4: /*HLT*/
-// printf("IN HLT!!!! %04X %08X %08X %08X\n",oldpc,old8,old82,old83);
+// printf("IN HLT!!!! %04X:%04X %08X %08X %08X\n",oldcs,oldpc,old8,old82,old83);
/* if (!(flags & I_FLAG))
{
pclog("HLT\n");
@@ -3160,7 +3015,7 @@ void execx86(int cycs)
cycles-=2;
break;
case 0xF5: /*CMC*/
- cpu_state.flags ^= C_FLAG;
+ flags^=C_FLAG;
cycles-=2;
break;
@@ -3174,7 +3029,7 @@ void execx86(int cycs)
temp2=FETCH();
temp&=temp2;
setznp8(temp);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
cycles-=((cpu_mod==3)?5:11);
break;
case 0x10: /*NOT b*/
@@ -3191,20 +3046,20 @@ void execx86(int cycs)
case 0x20: /*MUL AL,b*/
setznp8(AL);
AX=AL*temp;
- if (AX) cpu_state.flags &= ~Z_FLAG;
- else cpu_state.flags |= Z_FLAG;
- if (AH) cpu_state.flags |= (C_FLAG|V_FLAG);
- else cpu_state.flags &= ~(C_FLAG|V_FLAG);
+ if (AX) flags&=~Z_FLAG;
+ else flags|=Z_FLAG;
+ if (AH) flags|=(C_FLAG|V_FLAG);
+ else flags&=~(C_FLAG|V_FLAG);
cycles-=70;
break;
case 0x28: /*IMUL AL,b*/
setznp8(AL);
tempws=(int)((int8_t)AL)*(int)((int8_t)temp);
AX=tempws&0xFFFF;
- if (AX) cpu_state.flags &= ~Z_FLAG;
- else cpu_state.flags |= Z_FLAG;
- if (AH) cpu_state.flags |= (C_FLAG|V_FLAG);
- else cpu_state.flags &= ~(C_FLAG|V_FLAG);
+ if (AX) flags&=~Z_FLAG;
+ else flags|=Z_FLAG;
+ if (AH) flags|=(C_FLAG|V_FLAG);
+ else flags&=~(C_FLAG|V_FLAG);
cycles-=80;
break;
case 0x30: /*DIV AL,b*/
@@ -3235,12 +3090,12 @@ void execx86(int cycs)
else
{
printf("DIVb BY 0 %04X:%04X\n",cs>>4,cpu_state.pc);
- writememw(ss,(SP-2)&0xFFFF,cpu_state.flags | 0xF000);
+ writememw(ss,(SP-2)&0xFFFF,flags|0xF000);
writememw(ss,(SP-4)&0xFFFF,CS);
writememw(ss,(SP-6)&0xFFFF,cpu_state.pc);
SP-=6;
- cpu_state.flags &= ~I_FLAG;
- cpu_state.flags &= ~T_FLAG;
+ flags&=~I_FLAG;
+ flags&=~T_FLAG;
cpu_state.pc=readmemw(0,0);
// printf("F6 30\n");
loadcs(readmemw(0,2));
@@ -3279,12 +3134,12 @@ void execx86(int cycs)
else
{
printf("IDIVb BY 0 %04X:%04X\n",cs>>4,cpu_state.pc);
- writememw(ss,(SP-2)&0xFFFF,cpu_state.flags | 0xF000);
+ writememw(ss,(SP-2)&0xFFFF,flags|0xF000);
writememw(ss,(SP-4)&0xFFFF,CS);
writememw(ss,(SP-6)&0xFFFF,cpu_state.pc);
SP-=6;
- cpu_state.flags &= ~I_FLAG;
- cpu_state.flags &= ~T_FLAG;
+ flags&=~I_FLAG;
+ flags&=~T_FLAG;
cpu_state.pc=readmemw(0,0);
// printf("F6 38\n");
loadcs(readmemw(0,2));
@@ -3312,7 +3167,7 @@ void execx86(int cycs)
case 0x08:
tempw2=getword();
setznp16(tempw&tempw2);
- cpu_state.flags &= ~(C_FLAG|V_FLAG|A_FLAG);
+ flags&=~(C_FLAG|V_FLAG|A_FLAG);
cycles-=((cpu_mod==3)?5:11);
break;
case 0x10: /*NOT w*/
@@ -3331,18 +3186,18 @@ void execx86(int cycs)
// if (output) printf("%04X*%04X=%08X\n",AX,tempw,templ);
AX=templ&0xFFFF;
DX=templ>>16;
- if (AX|DX) cpu_state.flags &= ~Z_FLAG;
- else cpu_state.flags |= Z_FLAG;
- if (DX) cpu_state.flags |= (C_FLAG|V_FLAG);
- else cpu_state.flags &= ~(C_FLAG|V_FLAG);
+ if (AX|DX) flags&=~Z_FLAG;
+ else flags|=Z_FLAG;
+ if (DX) flags|=(C_FLAG|V_FLAG);
+ else flags&=~(C_FLAG|V_FLAG);
cycles-=118;
break;
case 0x28: /*IMUL AX,w*/
setznp16(AX);
// printf("IMUL %i %i ",(int)((int16_t)AX),(int)((int16_t)tempw));
tempws=(int)((int16_t)AX)*(int)((int16_t)tempw);
- if ((tempws>>15) && ((tempws>>15)!=-1)) cpu_state.flags |= (C_FLAG|V_FLAG);
- else cpu_state.flags &= ~(C_FLAG|V_FLAG);
+ if ((tempws>>15) && ((tempws>>15)!=-1)) flags|=(C_FLAG|V_FLAG);
+ else flags&=~(C_FLAG|V_FLAG);
// printf("%i ",tempws);
AX=tempws&0xFFFF;
tempws=(uint16_t)(tempws>>16);
@@ -3350,8 +3205,8 @@ void execx86(int cycs)
// printf("%04X %04X\n",AX,DX);
// dumpregs();
// exit(-1);
- if (AX|DX) cpu_state.flags &= ~Z_FLAG;
- else cpu_state.flags |= Z_FLAG;
+ if (AX|DX) flags&=~Z_FLAG;
+ else flags|=Z_FLAG;
cycles-=128;
break;
case 0x30: /*DIV AX,w*/
@@ -3367,12 +3222,12 @@ void execx86(int cycs)
else
{
printf("DIVw BY 0 %04X:%04X\n",cs>>4,cpu_state.pc);
- writememw(ss,(SP-2)&0xFFFF,cpu_state.flags | 0xF000);
+ writememw(ss,(SP-2)&0xFFFF,flags|0xF000);
writememw(ss,(SP-4)&0xFFFF,CS);
writememw(ss,(SP-6)&0xFFFF,cpu_state.pc);
SP-=6;
- cpu_state.flags &= ~I_FLAG;
- cpu_state.flags &= ~T_FLAG;
+ flags&=~I_FLAG;
+ flags&=~T_FLAG;
cpu_state.pc=readmemw(0,0);
// printf("F7 30\n");
loadcs(readmemw(0,2));
@@ -3394,12 +3249,12 @@ void execx86(int cycs)
else
{
printf("IDIVw BY 0 %04X:%04X\n",cs>>4,cpu_state.pc);
- writememw(ss,(SP-2)&0xFFFF,cpu_state.flags | 0xF000);
+ writememw(ss,(SP-2)&0xFFFF,flags|0xF000);
writememw(ss,(SP-4)&0xFFFF,CS);
writememw(ss,(SP-6)&0xFFFF,cpu_state.pc);
SP-=6;
- cpu_state.flags &= ~I_FLAG;
- cpu_state.flags &= ~T_FLAG;
+ flags&=~I_FLAG;
+ flags&=~T_FLAG;
cpu_state.pc=readmemw(0,0);
// printf("F7 38\n");
loadcs(readmemw(0,2));
@@ -3416,48 +3271,48 @@ void execx86(int cycs)
break;
case 0xF8: /*CLC*/
- cpu_state.flags &= ~C_FLAG;
+ flags&=~C_FLAG;
cycles-=2;
break;
case 0xF9: /*STC*/
// printf("STC %04X\n",pc);
- cpu_state.flags |= C_FLAG;
+ flags|=C_FLAG;
cycles-=2;
break;
case 0xFA: /*CLI*/
- cpu_state.flags &= ~I_FLAG;
+ flags&=~I_FLAG;
// printf("CLI at %04X:%04X\n",cs>>4,pc);
cycles-=3;
break;
case 0xFB: /*STI*/
- cpu_state.flags |= I_FLAG;
+ flags|=I_FLAG;
// printf("STI at %04X:%04X\n",cs>>4,pc);
cycles-=2;
break;
case 0xFC: /*CLD*/
- cpu_state.flags &= ~D_FLAG;
+ flags&=~D_FLAG;
cycles-=2;
break;
case 0xFD: /*STD*/
- cpu_state.flags |= D_FLAG;
+ flags|=D_FLAG;
cycles-=2;
break;
case 0xFE: /*INC/DEC b*/
fetchea();
temp=geteab();
- cpu_state.flags &= ~V_FLAG;
+ flags&=~V_FLAG;
if (rmdat&0x38)
{
setsub8nc(temp,1);
temp2=temp-1;
- if ((temp&0x80) && !(temp2&0x80)) cpu_state.flags |= V_FLAG;
+ if ((temp&0x80) && !(temp2&0x80)) flags|=V_FLAG;
}
else
{
setadd8nc(temp,1);
temp2=temp+1;
- if ((temp2&0x80) && !(temp&0x80)) cpu_state.flags |= V_FLAG;
+ if ((temp2&0x80) && !(temp&0x80)) flags|=V_FLAG;
}
// setznp8(temp2);
seteab(temp2);
@@ -3574,6 +3429,14 @@ void execx86(int cycs)
// if (instime) printf("%i %i %i %i\n",cycdiff,cycles,memcycs,fetchclocks);
FETCHADD(((cycdiff-cycles)-memcycs)-fetchclocks);
if ((cycdiff-cycles) dosbox/$(am__dirstamp)
-dosbox/$(DEPDIR)/$(am__dirstamp):
- @$(MKDIR_P) dosbox/$(DEPDIR)
- @: > dosbox/$(DEPDIR)/$(am__dirstamp)
-dosbox/pcem-cdrom_image.$(OBJEXT): dosbox/$(am__dirstamp) \
- dosbox/$(DEPDIR)/$(am__dirstamp)
-dosbox/pcem-dbopl.$(OBJEXT): dosbox/$(am__dirstamp) \
- dosbox/$(DEPDIR)/$(am__dirstamp)
-dosbox/pcem-nukedopl.$(OBJEXT): dosbox/$(am__dirstamp) \
- dosbox/$(DEPDIR)/$(am__dirstamp)
-dosbox/pcem-vid_cga_comp.$(OBJEXT): dosbox/$(am__dirstamp) \
- dosbox/$(DEPDIR)/$(am__dirstamp)
-resid-fp/$(am__dirstamp):
- @$(MKDIR_P) resid-fp
- @: > resid-fp/$(am__dirstamp)
-resid-fp/$(DEPDIR)/$(am__dirstamp):
- @$(MKDIR_P) resid-fp/$(DEPDIR)
- @: > resid-fp/$(DEPDIR)/$(am__dirstamp)
-resid-fp/pcem-convolve.$(OBJEXT): resid-fp/$(am__dirstamp) \
- resid-fp/$(DEPDIR)/$(am__dirstamp)
-resid-fp/pcem-convolve-sse.$(OBJEXT): resid-fp/$(am__dirstamp) \
- resid-fp/$(DEPDIR)/$(am__dirstamp)
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- resid-fp/$(DEPDIR)/$(am__dirstamp)
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- resid-fp/$(DEPDIR)/$(am__dirstamp)
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- resid-fp/$(DEPDIR)/$(am__dirstamp)
-resid-fp/pcem-wave6581_PS_.$(OBJEXT): resid-fp/$(am__dirstamp) \
- resid-fp/$(DEPDIR)/$(am__dirstamp)
-resid-fp/pcem-wave6581_PST.$(OBJEXT): resid-fp/$(am__dirstamp) \
- resid-fp/$(DEPDIR)/$(am__dirstamp)
-resid-fp/pcem-wave6581_P_T.$(OBJEXT): resid-fp/$(am__dirstamp) \
- resid-fp/$(DEPDIR)/$(am__dirstamp)
-resid-fp/pcem-wave6581__ST.$(OBJEXT): resid-fp/$(am__dirstamp) \
- resid-fp/$(DEPDIR)/$(am__dirstamp)
-resid-fp/pcem-wave8580_PS_.$(OBJEXT): resid-fp/$(am__dirstamp) \
- resid-fp/$(DEPDIR)/$(am__dirstamp)
-resid-fp/pcem-wave8580_PST.$(OBJEXT): resid-fp/$(am__dirstamp) \
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- resid-fp/$(DEPDIR)/$(am__dirstamp)
-resid-fp/pcem-wave8580__ST.$(OBJEXT): resid-fp/$(am__dirstamp) \
- resid-fp/$(DEPDIR)/$(am__dirstamp)
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- resid-fp/$(DEPDIR)/$(am__dirstamp)
-minivhd/$(am__dirstamp):
- @$(MKDIR_P) minivhd
- @: > minivhd/$(am__dirstamp)
-minivhd/$(DEPDIR)/$(am__dirstamp):
- @$(MKDIR_P) minivhd/$(DEPDIR)
- @: > minivhd/$(DEPDIR)/$(am__dirstamp)
-minivhd/pcem-cwalk.$(OBJEXT): minivhd/$(am__dirstamp) \
- minivhd/$(DEPDIR)/$(am__dirstamp)
-minivhd/pcem-libxml2_encoding.$(OBJEXT): minivhd/$(am__dirstamp) \
- minivhd/$(DEPDIR)/$(am__dirstamp)
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- minivhd/$(DEPDIR)/$(am__dirstamp)
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- minivhd/$(DEPDIR)/$(am__dirstamp)
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- minivhd/$(DEPDIR)/$(am__dirstamp)
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- minivhd/$(DEPDIR)/$(am__dirstamp)
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- minivhd/$(DEPDIR)/$(am__dirstamp)
-slirp/$(am__dirstamp):
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- @: > slirp/$(am__dirstamp)
-slirp/$(DEPDIR)/$(am__dirstamp):
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- @: > slirp/$(DEPDIR)/$(am__dirstamp)
-slirp/pcem-bootp.$(OBJEXT): slirp/$(am__dirstamp) \
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pcem$(EXEEXT): $(pcem_OBJECTS) $(pcem_DEPENDENCIES) $(EXTRA_pcem_DEPENDENCIES)
@rm -f pcem$(EXEEXT)
- $(AM_V_CXXLD)$(pcem_LINK) $(pcem_OBJECTS) $(pcem_LDADD) $(LIBS)
+ $(AM_V_CXXLD)$(CXXLINK) $(pcem_OBJECTS) $(pcem_LDADD) $(LIBS)
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- -rm -f dosbox/*.$(OBJEXT)
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pcem-mouse_ps2.o: mouse_ps2.c
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pcem-pci.o: pci.c
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pcem-tandy_eeprom.o: tandy_eeprom.c
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pcem-vid_stg_ramdac.o: vid_stg_ramdac.c
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-@AMDEP_TRUE@@am__fastdepCXX_FALSE@ $(AM_V_CXX)source='wx-resources.cpp' object='pcem-wx-resources.obj' libtool=no @AMDEPBACKSLASH@
-@AMDEP_TRUE@@am__fastdepCXX_FALSE@ DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) @AMDEPBACKSLASH@
-@am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(pcem_CXXFLAGS) $(CXXFLAGS) -c -o pcem-wx-resources.obj `if test -f 'wx-resources.cpp'; then $(CYGPATH_W) 'wx-resources.cpp'; else $(CYGPATH_W) '$(srcdir)/wx-resources.cpp'; fi`
+@am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(CXX) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CXXFLAGS) $(CXXFLAGS) -c -o wave.obj `if test -f 'resid-fp/wave.cc'; then $(CYGPATH_W) 'resid-fp/wave.cc'; else $(CYGPATH_W) '$(srcdir)/resid-fp/wave.cc'; fi`
.cpp.o:
-@am__fastdepCXX_TRUE@ $(AM_V_CXX)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.o$$||'`;\
-@am__fastdepCXX_TRUE@ $(CXXCOMPILE) -MT $@ -MD -MP -MF $$depbase.Tpo -c -o $@ $< &&\
-@am__fastdepCXX_TRUE@ $(am__mv) $$depbase.Tpo $$depbase.Po
+@am__fastdepCXX_TRUE@ $(AM_V_CXX)$(CXXCOMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ $<
+@am__fastdepCXX_TRUE@ $(AM_V_at)$(am__mv) $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
@AMDEP_TRUE@@am__fastdepCXX_FALSE@ $(AM_V_CXX)source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
@AMDEP_TRUE@@am__fastdepCXX_FALSE@ DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(CXXCOMPILE) -c -o $@ $<
.cpp.obj:
-@am__fastdepCXX_TRUE@ $(AM_V_CXX)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.obj$$||'`;\
-@am__fastdepCXX_TRUE@ $(CXXCOMPILE) -MT $@ -MD -MP -MF $$depbase.Tpo -c -o $@ `$(CYGPATH_W) '$<'` &&\
-@am__fastdepCXX_TRUE@ $(am__mv) $$depbase.Tpo $$depbase.Po
+@am__fastdepCXX_TRUE@ $(AM_V_CXX)$(CXXCOMPILE) -MT $@ -MD -MP -MF $(DEPDIR)/$*.Tpo -c -o $@ `$(CYGPATH_W) '$<'`
+@am__fastdepCXX_TRUE@ $(AM_V_at)$(am__mv) $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
@AMDEP_TRUE@@am__fastdepCXX_FALSE@ $(AM_V_CXX)source='$<' object='$@' libtool=no @AMDEPBACKSLASH@
@AMDEP_TRUE@@am__fastdepCXX_FALSE@ DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) @AMDEPBACKSLASH@
@am__fastdepCXX_FALSE@ $(AM_V_CXX@am__nodep@)$(CXXCOMPILE) -c -o $@ `$(CYGPATH_W) '$<'`
@@ -6684,10 +3432,7 @@ cscopelist-am: $(am__tagged_files)
distclean-tags:
-rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags
-distdir: $(BUILT_SOURCES)
- $(MAKE) $(AM_MAKEFLAGS) distdir-am
-
-distdir-am: $(DISTFILES)
+distdir: $(DISTFILES)
@srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \
list='$(DISTFILES)'; \
@@ -6751,14 +3496,6 @@ clean-generic:
distclean-generic:
-test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES)
-test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES)
- -rm -f dosbox/$(DEPDIR)/$(am__dirstamp)
- -rm -f dosbox/$(am__dirstamp)
- -rm -f minivhd/$(DEPDIR)/$(am__dirstamp)
- -rm -f minivhd/$(am__dirstamp)
- -rm -f resid-fp/$(DEPDIR)/$(am__dirstamp)
- -rm -f resid-fp/$(am__dirstamp)
- -rm -f slirp/$(DEPDIR)/$(am__dirstamp)
- -rm -f slirp/$(am__dirstamp)
maintainer-clean-generic:
@echo "This command is intended for maintainers to use"
@@ -6768,362 +3505,7 @@ clean: clean-am
clean-am: clean-binPROGRAMS clean-generic mostlyclean-am
distclean: distclean-am
- -rm -f ./$(DEPDIR)/pcem-386.Po
- -rm -f ./$(DEPDIR)/pcem-386_common.Po
- -rm -f ./$(DEPDIR)/pcem-386_dynarec.Po
- -rm -f ./$(DEPDIR)/pcem-386_dynarec_ops.Po
- -rm -f ./$(DEPDIR)/pcem-808x.Po
- -rm -f ./$(DEPDIR)/pcem-82091aa.Po
- -rm -f ./$(DEPDIR)/pcem-acc2036.Po
- -rm -f ./$(DEPDIR)/pcem-acc2168.Po
- -rm -f ./$(DEPDIR)/pcem-acc3221.Po
- -rm -f ./$(DEPDIR)/pcem-acer386sx.Po
- -rm -f ./$(DEPDIR)/pcem-ali1429.Po
- -rm -f ./$(DEPDIR)/pcem-amstrad.Po
- -rm -f ./$(DEPDIR)/pcem-cassette.Po
- -rm -f ./$(DEPDIR)/pcem-cbm_io.Po
- -rm -f ./$(DEPDIR)/pcem-cdrom-image.Po
- -rm -f ./$(DEPDIR)/pcem-cdrom-ioctl-dummy.Po
- -rm -f ./$(DEPDIR)/pcem-cdrom-ioctl-linux.Po
- -rm -f ./$(DEPDIR)/pcem-cdrom-ioctl-osx.Po
- -rm -f ./$(DEPDIR)/pcem-cdrom-ioctl.Po
- -rm -f ./$(DEPDIR)/pcem-cdrom-null.Po
- -rm -f ./$(DEPDIR)/pcem-cmd640.Po
- -rm -f ./$(DEPDIR)/pcem-codegen.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_accumulate.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_allocator.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_arm.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_arm64.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_arm64_imm.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_arm64_ops.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_arm64_uops.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_arm_ops.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_arm_uops.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_x86-64.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_x86-64_ops.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_x86-64_ops_sse.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_x86-64_uops.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_x86.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_x86_ops.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_x86_ops_fpu.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_x86_ops_sse.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_x86_uops.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_block.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ir.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_3dnow.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_arith.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_branch.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_fpu_arith.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_fpu_constant.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_fpu_loadstore.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_fpu_misc.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_helpers.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_jump.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_logic.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_misc.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_mmx_arith.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_mmx_cmp.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_mmx_loadstore.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_mmx_logic.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_mmx_pack.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_mmx_shift.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_mov.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_shift.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_stack.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_reg.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_timing_486.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_timing_686.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_timing_common.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_timing_cyrixiii.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_timing_k6.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_timing_p6.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_timing_pentium.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_timing_winchip.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_timing_winchip2.Po
- -rm -f ./$(DEPDIR)/pcem-compaq.Po
- -rm -f ./$(DEPDIR)/pcem-config.Po
- -rm -f ./$(DEPDIR)/pcem-cpu.Po
- -rm -f ./$(DEPDIR)/pcem-cpu_tables.Po
- -rm -f ./$(DEPDIR)/pcem-cs8230.Po
- -rm -f ./$(DEPDIR)/pcem-dells200.Po
- -rm -f ./$(DEPDIR)/pcem-device.Po
- -rm -f ./$(DEPDIR)/pcem-disc.Po
- -rm -f ./$(DEPDIR)/pcem-disc_fdi.Po
- -rm -f ./$(DEPDIR)/pcem-disc_img.Po
- -rm -f ./$(DEPDIR)/pcem-disc_sector.Po
- -rm -f ./$(DEPDIR)/pcem-dma.Po
- -rm -f ./$(DEPDIR)/pcem-esdi_at.Po
- -rm -f ./$(DEPDIR)/pcem-f82c710_upc.Po
- -rm -f ./$(DEPDIR)/pcem-fdc.Po
- -rm -f ./$(DEPDIR)/pcem-fdc37c665.Po
- -rm -f ./$(DEPDIR)/pcem-fdc37c93x.Po
- -rm -f ./$(DEPDIR)/pcem-fdd.Po
- -rm -f ./$(DEPDIR)/pcem-fdi2raw.Po
- -rm -f ./$(DEPDIR)/pcem-gameport.Po
- -rm -f ./$(DEPDIR)/pcem-hdd.Po
- -rm -f ./$(DEPDIR)/pcem-hdd_esdi.Po
- -rm -f ./$(DEPDIR)/pcem-hdd_file.Po
- -rm -f ./$(DEPDIR)/pcem-headland.Po
- -rm -f ./$(DEPDIR)/pcem-i430fx.Po
- -rm -f ./$(DEPDIR)/pcem-i430hx.Po
- -rm -f ./$(DEPDIR)/pcem-i430lx.Po
- -rm -f ./$(DEPDIR)/pcem-i430vx.Po
- -rm -f ./$(DEPDIR)/pcem-i440bx.Po
- -rm -f ./$(DEPDIR)/pcem-i440fx.Po
- -rm -f ./$(DEPDIR)/pcem-ide.Po
- -rm -f ./$(DEPDIR)/pcem-ide_atapi.Po
- -rm -f ./$(DEPDIR)/pcem-ide_sff8038i.Po
- -rm -f ./$(DEPDIR)/pcem-intel.Po
- -rm -f ./$(DEPDIR)/pcem-intel_flash.Po
- -rm -f ./$(DEPDIR)/pcem-io.Po
- -rm -f ./$(DEPDIR)/pcem-jim.Po
- -rm -f ./$(DEPDIR)/pcem-joystick_ch_flightstick_pro.Po
- -rm -f ./$(DEPDIR)/pcem-joystick_standard.Po
- -rm -f ./$(DEPDIR)/pcem-joystick_sw_pad.Po
- -rm -f ./$(DEPDIR)/pcem-joystick_tm_fcs.Po
- -rm -f ./$(DEPDIR)/pcem-keyboard.Po
- -rm -f ./$(DEPDIR)/pcem-keyboard_amstrad.Po
- -rm -f ./$(DEPDIR)/pcem-keyboard_at.Po
- -rm -f ./$(DEPDIR)/pcem-keyboard_olim24.Po
- -rm -f ./$(DEPDIR)/pcem-keyboard_pcjr.Po
- -rm -f ./$(DEPDIR)/pcem-keyboard_xt.Po
- -rm -f ./$(DEPDIR)/pcem-laserxt.Po
- -rm -f ./$(DEPDIR)/pcem-lpt.Po
- -rm -f ./$(DEPDIR)/pcem-lpt_dac.Po
- -rm -f ./$(DEPDIR)/pcem-lpt_dss.Po
- -rm -f ./$(DEPDIR)/pcem-mca.Po
- -rm -f ./$(DEPDIR)/pcem-mcr.Po
- -rm -f ./$(DEPDIR)/pcem-mem.Po
- -rm -f ./$(DEPDIR)/pcem-mem_bios.Po
- -rm -f ./$(DEPDIR)/pcem-mfm_at.Po
- -rm -f ./$(DEPDIR)/pcem-mfm_xebec.Po
- -rm -f ./$(DEPDIR)/pcem-midi_alsa.Po
- -rm -f ./$(DEPDIR)/pcem-model.Po
- -rm -f ./$(DEPDIR)/pcem-mouse.Po
- -rm -f ./$(DEPDIR)/pcem-mouse_msystems.Po
- -rm -f ./$(DEPDIR)/pcem-mouse_ps2.Po
- -rm -f ./$(DEPDIR)/pcem-mouse_serial.Po
- -rm -f ./$(DEPDIR)/pcem-mvp3.Po
- -rm -f ./$(DEPDIR)/pcem-ne2000.Po
- -rm -f ./$(DEPDIR)/pcem-neat.Po
- -rm -f ./$(DEPDIR)/pcem-nethandler.Po
- -rm -f ./$(DEPDIR)/pcem-nmi.Po
- -rm -f ./$(DEPDIR)/pcem-nvr.Po
- -rm -f ./$(DEPDIR)/pcem-nvr_tc8521.Po
- -rm -f ./$(DEPDIR)/pcem-olivetti_m24.Po
- -rm -f ./$(DEPDIR)/pcem-opti495.Po
- -rm -f ./$(DEPDIR)/pcem-paths.Po
- -rm -f ./$(DEPDIR)/pcem-pc.Po
- -rm -f ./$(DEPDIR)/pcem-pc87306.Po
- -rm -f ./$(DEPDIR)/pcem-pc87307.Po
- -rm -f ./$(DEPDIR)/pcem-pci.Po
- -rm -f ./$(DEPDIR)/pcem-pic.Po
- -rm -f ./$(DEPDIR)/pcem-piix.Po
- -rm -f ./$(DEPDIR)/pcem-piix_pm.Po
- -rm -f ./$(DEPDIR)/pcem-pit.Po
- -rm -f ./$(DEPDIR)/pcem-ppi.Po
- -rm -f ./$(DEPDIR)/pcem-ps1.Po
- -rm -f ./$(DEPDIR)/pcem-ps2.Po
- -rm -f ./$(DEPDIR)/pcem-ps2_mca.Po
- -rm -f ./$(DEPDIR)/pcem-ps2_nvr.Po
- -rm -f ./$(DEPDIR)/pcem-pzx.Po
- -rm -f ./$(DEPDIR)/pcem-rom.Po
- -rm -f ./$(DEPDIR)/pcem-rtc.Po
- -rm -f ./$(DEPDIR)/pcem-rtc_tc8521.Po
- -rm -f ./$(DEPDIR)/pcem-scamp.Po
- -rm -f ./$(DEPDIR)/pcem-scat.Po
- -rm -f ./$(DEPDIR)/pcem-scsi.Po
- -rm -f ./$(DEPDIR)/pcem-scsi_53c400.Po
- -rm -f ./$(DEPDIR)/pcem-scsi_aha1540.Po
- -rm -f ./$(DEPDIR)/pcem-scsi_cd.Po
- -rm -f ./$(DEPDIR)/pcem-scsi_hd.Po
- -rm -f ./$(DEPDIR)/pcem-scsi_ibm.Po
- -rm -f ./$(DEPDIR)/pcem-scsi_zip.Po
- -rm -f ./$(DEPDIR)/pcem-serial.Po
- -rm -f ./$(DEPDIR)/pcem-sio.Po
- -rm -f ./$(DEPDIR)/pcem-sis496.Po
- -rm -f ./$(DEPDIR)/pcem-sl82c460.Po
- -rm -f ./$(DEPDIR)/pcem-sound.Po
- -rm -f ./$(DEPDIR)/pcem-sound_ad1848.Po
- -rm -f ./$(DEPDIR)/pcem-sound_adlib.Po
- -rm -f ./$(DEPDIR)/pcem-sound_adlibgold.Po
- -rm -f ./$(DEPDIR)/pcem-sound_audiopci.Po
- -rm -f ./$(DEPDIR)/pcem-sound_azt2316a.Po
- -rm -f ./$(DEPDIR)/pcem-sound_cms.Po
- -rm -f ./$(DEPDIR)/pcem-sound_dbopl.Po
- -rm -f ./$(DEPDIR)/pcem-sound_emu8k.Po
- -rm -f ./$(DEPDIR)/pcem-sound_gus.Po
- -rm -f ./$(DEPDIR)/pcem-sound_mpu401_uart.Po
- -rm -f ./$(DEPDIR)/pcem-sound_opl.Po
- -rm -f ./$(DEPDIR)/pcem-sound_pas16.Po
- -rm -f ./$(DEPDIR)/pcem-sound_ps1.Po
- -rm -f ./$(DEPDIR)/pcem-sound_pssj.Po
- -rm -f ./$(DEPDIR)/pcem-sound_resid.Po
- -rm -f ./$(DEPDIR)/pcem-sound_sb.Po
- -rm -f ./$(DEPDIR)/pcem-sound_sb_dsp.Po
- -rm -f ./$(DEPDIR)/pcem-sound_sn76489.Po
- -rm -f ./$(DEPDIR)/pcem-sound_speaker.Po
- -rm -f ./$(DEPDIR)/pcem-sound_ssi2001.Po
- -rm -f ./$(DEPDIR)/pcem-sound_wss.Po
- -rm -f ./$(DEPDIR)/pcem-sound_ym7128.Po
- -rm -f ./$(DEPDIR)/pcem-soundopenal.Po
- -rm -f ./$(DEPDIR)/pcem-sst39sf010.Po
- -rm -f ./$(DEPDIR)/pcem-superxt.Po
- -rm -f ./$(DEPDIR)/pcem-t1000.Po
- -rm -f ./$(DEPDIR)/pcem-t3100e.Po
- -rm -f ./$(DEPDIR)/pcem-tandy_eeprom.Po
- -rm -f ./$(DEPDIR)/pcem-tandy_rom.Po
- -rm -f ./$(DEPDIR)/pcem-timer.Po
- -rm -f ./$(DEPDIR)/pcem-um8669f.Po
- -rm -f ./$(DEPDIR)/pcem-um8881f.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ati18800.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ati28800.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ati68860_ramdac.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ati_eeprom.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ati_mach64.Po
- -rm -f ./$(DEPDIR)/pcem-vid_cga.Po
- -rm -f ./$(DEPDIR)/pcem-vid_cl5429.Po
- -rm -f ./$(DEPDIR)/pcem-vid_colorplus.Po
- -rm -f ./$(DEPDIR)/pcem-vid_compaq_cga.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ddc.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ega.Po
- -rm -f ./$(DEPDIR)/pcem-vid_et4000.Po
- -rm -f ./$(DEPDIR)/pcem-vid_et4000w32.Po
- -rm -f ./$(DEPDIR)/pcem-vid_genius.Po
- -rm -f ./$(DEPDIR)/pcem-vid_hercules.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ht216.Po
- -rm -f ./$(DEPDIR)/pcem-vid_icd2061.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ics2595.Po
- -rm -f ./$(DEPDIR)/pcem-vid_im1024.Po
- -rm -f ./$(DEPDIR)/pcem-vid_incolor.Po
- -rm -f ./$(DEPDIR)/pcem-vid_mda.Po
- -rm -f ./$(DEPDIR)/pcem-vid_mga.Po
- -rm -f ./$(DEPDIR)/pcem-vid_olivetti_m24.Po
- -rm -f ./$(DEPDIR)/pcem-vid_oti037.Po
- -rm -f ./$(DEPDIR)/pcem-vid_oti067.Po
- -rm -f ./$(DEPDIR)/pcem-vid_paradise.Po
- -rm -f ./$(DEPDIR)/pcem-vid_pc1512.Po
- -rm -f ./$(DEPDIR)/pcem-vid_pc1640.Po
- -rm -f ./$(DEPDIR)/pcem-vid_pc200.Po
- -rm -f ./$(DEPDIR)/pcem-vid_pcjr.Po
- -rm -f ./$(DEPDIR)/pcem-vid_pgc.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ps1_svga.Po
- -rm -f ./$(DEPDIR)/pcem-vid_s3.Po
- -rm -f ./$(DEPDIR)/pcem-vid_s3_virge.Po
- -rm -f ./$(DEPDIR)/pcem-vid_sdac_ramdac.Po
- -rm -f ./$(DEPDIR)/pcem-vid_sigma.Po
- -rm -f ./$(DEPDIR)/pcem-vid_stg_ramdac.Po
- -rm -f ./$(DEPDIR)/pcem-vid_svga.Po
- -rm -f ./$(DEPDIR)/pcem-vid_svga_render.Po
- -rm -f ./$(DEPDIR)/pcem-vid_t1000.Po
- -rm -f ./$(DEPDIR)/pcem-vid_t3100e.Po
- -rm -f ./$(DEPDIR)/pcem-vid_tandy.Po
- -rm -f ./$(DEPDIR)/pcem-vid_tandysl.Po
- -rm -f ./$(DEPDIR)/pcem-vid_tgui9440.Po
- -rm -f ./$(DEPDIR)/pcem-vid_tkd8001_ramdac.Po
- -rm -f ./$(DEPDIR)/pcem-vid_tvga.Po
- -rm -f ./$(DEPDIR)/pcem-vid_unk_ramdac.Po
- -rm -f ./$(DEPDIR)/pcem-vid_vga.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_banshee.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_banshee_blitter.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_blitter.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_display.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_fb.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_fifo.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_reg.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_render.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_setup.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_texture.Po
- -rm -f ./$(DEPDIR)/pcem-vid_wy700.Po
- -rm -f ./$(DEPDIR)/pcem-video.Po
- -rm -f ./$(DEPDIR)/pcem-vl82c480.Po
- -rm -f ./$(DEPDIR)/pcem-vt82c586b.Po
- -rm -f ./$(DEPDIR)/pcem-w83877tf.Po
- -rm -f ./$(DEPDIR)/pcem-w83977tf.Po
- -rm -f ./$(DEPDIR)/pcem-wd76c10.Po
- -rm -f ./$(DEPDIR)/pcem-wx-app.Po
- -rm -f ./$(DEPDIR)/pcem-wx-common.Po
- -rm -f ./$(DEPDIR)/pcem-wx-config.Po
- -rm -f ./$(DEPDIR)/pcem-wx-config_sel.Po
- -rm -f ./$(DEPDIR)/pcem-wx-createdisc.Po
- -rm -f ./$(DEPDIR)/pcem-wx-deviceconfig.Po
- -rm -f ./$(DEPDIR)/pcem-wx-dialogbox.Po
- -rm -f ./$(DEPDIR)/pcem-wx-glslp-parser.Po
- -rm -f ./$(DEPDIR)/pcem-wx-hostconfig.Po
- -rm -f ./$(DEPDIR)/pcem-wx-joystickconfig.Po
- -rm -f ./$(DEPDIR)/pcem-wx-main.Po
- -rm -f ./$(DEPDIR)/pcem-wx-resources.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-display-win.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-display.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-joystick.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-keyboard.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-midi.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-mouse.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-status.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-video-gl3.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-video-renderer.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-video.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2.Po
- -rm -f ./$(DEPDIR)/pcem-wx-shader_man.Po
- -rm -f ./$(DEPDIR)/pcem-wx-shaderconfig.Po
- -rm -f ./$(DEPDIR)/pcem-wx-status.Po
- -rm -f ./$(DEPDIR)/pcem-wx-thread.Po
- -rm -f ./$(DEPDIR)/pcem-wx-utils.Po
- -rm -f ./$(DEPDIR)/pcem-x86seg.Po
- -rm -f ./$(DEPDIR)/pcem-x87.Po
- -rm -f ./$(DEPDIR)/pcem-x87_timings.Po
- -rm -f ./$(DEPDIR)/pcem-xi8088.Po
- -rm -f ./$(DEPDIR)/pcem-xtide.Po
- -rm -f dosbox/$(DEPDIR)/pcem-cdrom_image.Po
- -rm -f dosbox/$(DEPDIR)/pcem-dbopl.Po
- -rm -f dosbox/$(DEPDIR)/pcem-nukedopl.Po
- -rm -f dosbox/$(DEPDIR)/pcem-vid_cga_comp.Po
- -rm -f minivhd/$(DEPDIR)/pcem-cwalk.Po
- -rm -f minivhd/$(DEPDIR)/pcem-libxml2_encoding.Po
- -rm -f minivhd/$(DEPDIR)/pcem-minivhd_convert.Po
- -rm -f minivhd/$(DEPDIR)/pcem-minivhd_create.Po
- -rm -f minivhd/$(DEPDIR)/pcem-minivhd_io.Po
- -rm -f minivhd/$(DEPDIR)/pcem-minivhd_manage.Po
- -rm -f minivhd/$(DEPDIR)/pcem-minivhd_struct_rw.Po
- -rm -f minivhd/$(DEPDIR)/pcem-minivhd_util.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-convolve-sse.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-convolve.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-envelope.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-extfilt.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-filter.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-pot.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-sid.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-voice.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-wave.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-wave6581_PST.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-wave6581_PS_.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-wave6581_P_T.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-wave6581__ST.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-wave8580_PST.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-wave8580_PS_.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-wave8580_P_T.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-wave8580__ST.Po
- -rm -f slirp/$(DEPDIR)/pcem-bootp.Po
- -rm -f slirp/$(DEPDIR)/pcem-cksum.Po
- -rm -f slirp/$(DEPDIR)/pcem-debug.Po
- -rm -f slirp/$(DEPDIR)/pcem-if.Po
- -rm -f slirp/$(DEPDIR)/pcem-ip_icmp.Po
- -rm -f slirp/$(DEPDIR)/pcem-ip_input.Po
- -rm -f slirp/$(DEPDIR)/pcem-ip_output.Po
- -rm -f slirp/$(DEPDIR)/pcem-mbuf.Po
- -rm -f slirp/$(DEPDIR)/pcem-misc.Po
- -rm -f slirp/$(DEPDIR)/pcem-queue.Po
- -rm -f slirp/$(DEPDIR)/pcem-sbuf.Po
- -rm -f slirp/$(DEPDIR)/pcem-slirp.Po
- -rm -f slirp/$(DEPDIR)/pcem-socket.Po
- -rm -f slirp/$(DEPDIR)/pcem-tcp_input.Po
- -rm -f slirp/$(DEPDIR)/pcem-tcp_output.Po
- -rm -f slirp/$(DEPDIR)/pcem-tcp_subr.Po
- -rm -f slirp/$(DEPDIR)/pcem-tcp_timer.Po
- -rm -f slirp/$(DEPDIR)/pcem-tftp.Po
- -rm -f slirp/$(DEPDIR)/pcem-udp.Po
+ -rm -rf ./$(DEPDIR)
-rm -f Makefile
distclean-am: clean-am distclean-compile distclean-generic \
distclean-tags
@@ -7169,362 +3551,7 @@ install-ps-am:
installcheck-am:
maintainer-clean: maintainer-clean-am
- -rm -f ./$(DEPDIR)/pcem-386.Po
- -rm -f ./$(DEPDIR)/pcem-386_common.Po
- -rm -f ./$(DEPDIR)/pcem-386_dynarec.Po
- -rm -f ./$(DEPDIR)/pcem-386_dynarec_ops.Po
- -rm -f ./$(DEPDIR)/pcem-808x.Po
- -rm -f ./$(DEPDIR)/pcem-82091aa.Po
- -rm -f ./$(DEPDIR)/pcem-acc2036.Po
- -rm -f ./$(DEPDIR)/pcem-acc2168.Po
- -rm -f ./$(DEPDIR)/pcem-acc3221.Po
- -rm -f ./$(DEPDIR)/pcem-acer386sx.Po
- -rm -f ./$(DEPDIR)/pcem-ali1429.Po
- -rm -f ./$(DEPDIR)/pcem-amstrad.Po
- -rm -f ./$(DEPDIR)/pcem-cassette.Po
- -rm -f ./$(DEPDIR)/pcem-cbm_io.Po
- -rm -f ./$(DEPDIR)/pcem-cdrom-image.Po
- -rm -f ./$(DEPDIR)/pcem-cdrom-ioctl-dummy.Po
- -rm -f ./$(DEPDIR)/pcem-cdrom-ioctl-linux.Po
- -rm -f ./$(DEPDIR)/pcem-cdrom-ioctl-osx.Po
- -rm -f ./$(DEPDIR)/pcem-cdrom-ioctl.Po
- -rm -f ./$(DEPDIR)/pcem-cdrom-null.Po
- -rm -f ./$(DEPDIR)/pcem-cmd640.Po
- -rm -f ./$(DEPDIR)/pcem-codegen.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_accumulate.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_allocator.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_arm.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_arm64.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_arm64_imm.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_arm64_ops.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_arm64_uops.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_arm_ops.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_arm_uops.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_x86-64.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_x86-64_ops.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_x86-64_ops_sse.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_x86-64_uops.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_x86.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_x86_ops.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_x86_ops_fpu.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_x86_ops_sse.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_backend_x86_uops.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_block.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ir.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_3dnow.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_arith.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_branch.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_fpu_arith.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_fpu_constant.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_fpu_loadstore.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_fpu_misc.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_helpers.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_jump.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_logic.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_misc.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_mmx_arith.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_mmx_cmp.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_mmx_loadstore.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_mmx_logic.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_mmx_pack.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_mmx_shift.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_mov.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_shift.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_ops_stack.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_reg.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_timing_486.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_timing_686.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_timing_common.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_timing_cyrixiii.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_timing_k6.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_timing_p6.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_timing_pentium.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_timing_winchip.Po
- -rm -f ./$(DEPDIR)/pcem-codegen_timing_winchip2.Po
- -rm -f ./$(DEPDIR)/pcem-compaq.Po
- -rm -f ./$(DEPDIR)/pcem-config.Po
- -rm -f ./$(DEPDIR)/pcem-cpu.Po
- -rm -f ./$(DEPDIR)/pcem-cpu_tables.Po
- -rm -f ./$(DEPDIR)/pcem-cs8230.Po
- -rm -f ./$(DEPDIR)/pcem-dells200.Po
- -rm -f ./$(DEPDIR)/pcem-device.Po
- -rm -f ./$(DEPDIR)/pcem-disc.Po
- -rm -f ./$(DEPDIR)/pcem-disc_fdi.Po
- -rm -f ./$(DEPDIR)/pcem-disc_img.Po
- -rm -f ./$(DEPDIR)/pcem-disc_sector.Po
- -rm -f ./$(DEPDIR)/pcem-dma.Po
- -rm -f ./$(DEPDIR)/pcem-esdi_at.Po
- -rm -f ./$(DEPDIR)/pcem-f82c710_upc.Po
- -rm -f ./$(DEPDIR)/pcem-fdc.Po
- -rm -f ./$(DEPDIR)/pcem-fdc37c665.Po
- -rm -f ./$(DEPDIR)/pcem-fdc37c93x.Po
- -rm -f ./$(DEPDIR)/pcem-fdd.Po
- -rm -f ./$(DEPDIR)/pcem-fdi2raw.Po
- -rm -f ./$(DEPDIR)/pcem-gameport.Po
- -rm -f ./$(DEPDIR)/pcem-hdd.Po
- -rm -f ./$(DEPDIR)/pcem-hdd_esdi.Po
- -rm -f ./$(DEPDIR)/pcem-hdd_file.Po
- -rm -f ./$(DEPDIR)/pcem-headland.Po
- -rm -f ./$(DEPDIR)/pcem-i430fx.Po
- -rm -f ./$(DEPDIR)/pcem-i430hx.Po
- -rm -f ./$(DEPDIR)/pcem-i430lx.Po
- -rm -f ./$(DEPDIR)/pcem-i430vx.Po
- -rm -f ./$(DEPDIR)/pcem-i440bx.Po
- -rm -f ./$(DEPDIR)/pcem-i440fx.Po
- -rm -f ./$(DEPDIR)/pcem-ide.Po
- -rm -f ./$(DEPDIR)/pcem-ide_atapi.Po
- -rm -f ./$(DEPDIR)/pcem-ide_sff8038i.Po
- -rm -f ./$(DEPDIR)/pcem-intel.Po
- -rm -f ./$(DEPDIR)/pcem-intel_flash.Po
- -rm -f ./$(DEPDIR)/pcem-io.Po
- -rm -f ./$(DEPDIR)/pcem-jim.Po
- -rm -f ./$(DEPDIR)/pcem-joystick_ch_flightstick_pro.Po
- -rm -f ./$(DEPDIR)/pcem-joystick_standard.Po
- -rm -f ./$(DEPDIR)/pcem-joystick_sw_pad.Po
- -rm -f ./$(DEPDIR)/pcem-joystick_tm_fcs.Po
- -rm -f ./$(DEPDIR)/pcem-keyboard.Po
- -rm -f ./$(DEPDIR)/pcem-keyboard_amstrad.Po
- -rm -f ./$(DEPDIR)/pcem-keyboard_at.Po
- -rm -f ./$(DEPDIR)/pcem-keyboard_olim24.Po
- -rm -f ./$(DEPDIR)/pcem-keyboard_pcjr.Po
- -rm -f ./$(DEPDIR)/pcem-keyboard_xt.Po
- -rm -f ./$(DEPDIR)/pcem-laserxt.Po
- -rm -f ./$(DEPDIR)/pcem-lpt.Po
- -rm -f ./$(DEPDIR)/pcem-lpt_dac.Po
- -rm -f ./$(DEPDIR)/pcem-lpt_dss.Po
- -rm -f ./$(DEPDIR)/pcem-mca.Po
- -rm -f ./$(DEPDIR)/pcem-mcr.Po
- -rm -f ./$(DEPDIR)/pcem-mem.Po
- -rm -f ./$(DEPDIR)/pcem-mem_bios.Po
- -rm -f ./$(DEPDIR)/pcem-mfm_at.Po
- -rm -f ./$(DEPDIR)/pcem-mfm_xebec.Po
- -rm -f ./$(DEPDIR)/pcem-midi_alsa.Po
- -rm -f ./$(DEPDIR)/pcem-model.Po
- -rm -f ./$(DEPDIR)/pcem-mouse.Po
- -rm -f ./$(DEPDIR)/pcem-mouse_msystems.Po
- -rm -f ./$(DEPDIR)/pcem-mouse_ps2.Po
- -rm -f ./$(DEPDIR)/pcem-mouse_serial.Po
- -rm -f ./$(DEPDIR)/pcem-mvp3.Po
- -rm -f ./$(DEPDIR)/pcem-ne2000.Po
- -rm -f ./$(DEPDIR)/pcem-neat.Po
- -rm -f ./$(DEPDIR)/pcem-nethandler.Po
- -rm -f ./$(DEPDIR)/pcem-nmi.Po
- -rm -f ./$(DEPDIR)/pcem-nvr.Po
- -rm -f ./$(DEPDIR)/pcem-nvr_tc8521.Po
- -rm -f ./$(DEPDIR)/pcem-olivetti_m24.Po
- -rm -f ./$(DEPDIR)/pcem-opti495.Po
- -rm -f ./$(DEPDIR)/pcem-paths.Po
- -rm -f ./$(DEPDIR)/pcem-pc.Po
- -rm -f ./$(DEPDIR)/pcem-pc87306.Po
- -rm -f ./$(DEPDIR)/pcem-pc87307.Po
- -rm -f ./$(DEPDIR)/pcem-pci.Po
- -rm -f ./$(DEPDIR)/pcem-pic.Po
- -rm -f ./$(DEPDIR)/pcem-piix.Po
- -rm -f ./$(DEPDIR)/pcem-piix_pm.Po
- -rm -f ./$(DEPDIR)/pcem-pit.Po
- -rm -f ./$(DEPDIR)/pcem-ppi.Po
- -rm -f ./$(DEPDIR)/pcem-ps1.Po
- -rm -f ./$(DEPDIR)/pcem-ps2.Po
- -rm -f ./$(DEPDIR)/pcem-ps2_mca.Po
- -rm -f ./$(DEPDIR)/pcem-ps2_nvr.Po
- -rm -f ./$(DEPDIR)/pcem-pzx.Po
- -rm -f ./$(DEPDIR)/pcem-rom.Po
- -rm -f ./$(DEPDIR)/pcem-rtc.Po
- -rm -f ./$(DEPDIR)/pcem-rtc_tc8521.Po
- -rm -f ./$(DEPDIR)/pcem-scamp.Po
- -rm -f ./$(DEPDIR)/pcem-scat.Po
- -rm -f ./$(DEPDIR)/pcem-scsi.Po
- -rm -f ./$(DEPDIR)/pcem-scsi_53c400.Po
- -rm -f ./$(DEPDIR)/pcem-scsi_aha1540.Po
- -rm -f ./$(DEPDIR)/pcem-scsi_cd.Po
- -rm -f ./$(DEPDIR)/pcem-scsi_hd.Po
- -rm -f ./$(DEPDIR)/pcem-scsi_ibm.Po
- -rm -f ./$(DEPDIR)/pcem-scsi_zip.Po
- -rm -f ./$(DEPDIR)/pcem-serial.Po
- -rm -f ./$(DEPDIR)/pcem-sio.Po
- -rm -f ./$(DEPDIR)/pcem-sis496.Po
- -rm -f ./$(DEPDIR)/pcem-sl82c460.Po
- -rm -f ./$(DEPDIR)/pcem-sound.Po
- -rm -f ./$(DEPDIR)/pcem-sound_ad1848.Po
- -rm -f ./$(DEPDIR)/pcem-sound_adlib.Po
- -rm -f ./$(DEPDIR)/pcem-sound_adlibgold.Po
- -rm -f ./$(DEPDIR)/pcem-sound_audiopci.Po
- -rm -f ./$(DEPDIR)/pcem-sound_azt2316a.Po
- -rm -f ./$(DEPDIR)/pcem-sound_cms.Po
- -rm -f ./$(DEPDIR)/pcem-sound_dbopl.Po
- -rm -f ./$(DEPDIR)/pcem-sound_emu8k.Po
- -rm -f ./$(DEPDIR)/pcem-sound_gus.Po
- -rm -f ./$(DEPDIR)/pcem-sound_mpu401_uart.Po
- -rm -f ./$(DEPDIR)/pcem-sound_opl.Po
- -rm -f ./$(DEPDIR)/pcem-sound_pas16.Po
- -rm -f ./$(DEPDIR)/pcem-sound_ps1.Po
- -rm -f ./$(DEPDIR)/pcem-sound_pssj.Po
- -rm -f ./$(DEPDIR)/pcem-sound_resid.Po
- -rm -f ./$(DEPDIR)/pcem-sound_sb.Po
- -rm -f ./$(DEPDIR)/pcem-sound_sb_dsp.Po
- -rm -f ./$(DEPDIR)/pcem-sound_sn76489.Po
- -rm -f ./$(DEPDIR)/pcem-sound_speaker.Po
- -rm -f ./$(DEPDIR)/pcem-sound_ssi2001.Po
- -rm -f ./$(DEPDIR)/pcem-sound_wss.Po
- -rm -f ./$(DEPDIR)/pcem-sound_ym7128.Po
- -rm -f ./$(DEPDIR)/pcem-soundopenal.Po
- -rm -f ./$(DEPDIR)/pcem-sst39sf010.Po
- -rm -f ./$(DEPDIR)/pcem-superxt.Po
- -rm -f ./$(DEPDIR)/pcem-t1000.Po
- -rm -f ./$(DEPDIR)/pcem-t3100e.Po
- -rm -f ./$(DEPDIR)/pcem-tandy_eeprom.Po
- -rm -f ./$(DEPDIR)/pcem-tandy_rom.Po
- -rm -f ./$(DEPDIR)/pcem-timer.Po
- -rm -f ./$(DEPDIR)/pcem-um8669f.Po
- -rm -f ./$(DEPDIR)/pcem-um8881f.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ati18800.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ati28800.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ati68860_ramdac.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ati_eeprom.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ati_mach64.Po
- -rm -f ./$(DEPDIR)/pcem-vid_cga.Po
- -rm -f ./$(DEPDIR)/pcem-vid_cl5429.Po
- -rm -f ./$(DEPDIR)/pcem-vid_colorplus.Po
- -rm -f ./$(DEPDIR)/pcem-vid_compaq_cga.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ddc.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ega.Po
- -rm -f ./$(DEPDIR)/pcem-vid_et4000.Po
- -rm -f ./$(DEPDIR)/pcem-vid_et4000w32.Po
- -rm -f ./$(DEPDIR)/pcem-vid_genius.Po
- -rm -f ./$(DEPDIR)/pcem-vid_hercules.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ht216.Po
- -rm -f ./$(DEPDIR)/pcem-vid_icd2061.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ics2595.Po
- -rm -f ./$(DEPDIR)/pcem-vid_im1024.Po
- -rm -f ./$(DEPDIR)/pcem-vid_incolor.Po
- -rm -f ./$(DEPDIR)/pcem-vid_mda.Po
- -rm -f ./$(DEPDIR)/pcem-vid_mga.Po
- -rm -f ./$(DEPDIR)/pcem-vid_olivetti_m24.Po
- -rm -f ./$(DEPDIR)/pcem-vid_oti037.Po
- -rm -f ./$(DEPDIR)/pcem-vid_oti067.Po
- -rm -f ./$(DEPDIR)/pcem-vid_paradise.Po
- -rm -f ./$(DEPDIR)/pcem-vid_pc1512.Po
- -rm -f ./$(DEPDIR)/pcem-vid_pc1640.Po
- -rm -f ./$(DEPDIR)/pcem-vid_pc200.Po
- -rm -f ./$(DEPDIR)/pcem-vid_pcjr.Po
- -rm -f ./$(DEPDIR)/pcem-vid_pgc.Po
- -rm -f ./$(DEPDIR)/pcem-vid_ps1_svga.Po
- -rm -f ./$(DEPDIR)/pcem-vid_s3.Po
- -rm -f ./$(DEPDIR)/pcem-vid_s3_virge.Po
- -rm -f ./$(DEPDIR)/pcem-vid_sdac_ramdac.Po
- -rm -f ./$(DEPDIR)/pcem-vid_sigma.Po
- -rm -f ./$(DEPDIR)/pcem-vid_stg_ramdac.Po
- -rm -f ./$(DEPDIR)/pcem-vid_svga.Po
- -rm -f ./$(DEPDIR)/pcem-vid_svga_render.Po
- -rm -f ./$(DEPDIR)/pcem-vid_t1000.Po
- -rm -f ./$(DEPDIR)/pcem-vid_t3100e.Po
- -rm -f ./$(DEPDIR)/pcem-vid_tandy.Po
- -rm -f ./$(DEPDIR)/pcem-vid_tandysl.Po
- -rm -f ./$(DEPDIR)/pcem-vid_tgui9440.Po
- -rm -f ./$(DEPDIR)/pcem-vid_tkd8001_ramdac.Po
- -rm -f ./$(DEPDIR)/pcem-vid_tvga.Po
- -rm -f ./$(DEPDIR)/pcem-vid_unk_ramdac.Po
- -rm -f ./$(DEPDIR)/pcem-vid_vga.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_banshee.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_banshee_blitter.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_blitter.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_display.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_fb.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_fifo.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_reg.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_render.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_setup.Po
- -rm -f ./$(DEPDIR)/pcem-vid_voodoo_texture.Po
- -rm -f ./$(DEPDIR)/pcem-vid_wy700.Po
- -rm -f ./$(DEPDIR)/pcem-video.Po
- -rm -f ./$(DEPDIR)/pcem-vl82c480.Po
- -rm -f ./$(DEPDIR)/pcem-vt82c586b.Po
- -rm -f ./$(DEPDIR)/pcem-w83877tf.Po
- -rm -f ./$(DEPDIR)/pcem-w83977tf.Po
- -rm -f ./$(DEPDIR)/pcem-wd76c10.Po
- -rm -f ./$(DEPDIR)/pcem-wx-app.Po
- -rm -f ./$(DEPDIR)/pcem-wx-common.Po
- -rm -f ./$(DEPDIR)/pcem-wx-config.Po
- -rm -f ./$(DEPDIR)/pcem-wx-config_sel.Po
- -rm -f ./$(DEPDIR)/pcem-wx-createdisc.Po
- -rm -f ./$(DEPDIR)/pcem-wx-deviceconfig.Po
- -rm -f ./$(DEPDIR)/pcem-wx-dialogbox.Po
- -rm -f ./$(DEPDIR)/pcem-wx-glslp-parser.Po
- -rm -f ./$(DEPDIR)/pcem-wx-hostconfig.Po
- -rm -f ./$(DEPDIR)/pcem-wx-joystickconfig.Po
- -rm -f ./$(DEPDIR)/pcem-wx-main.Po
- -rm -f ./$(DEPDIR)/pcem-wx-resources.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-display-win.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-display.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-joystick.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-keyboard.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-midi.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-mouse.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-status.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-video-gl3.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-video-renderer.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2-video.Po
- -rm -f ./$(DEPDIR)/pcem-wx-sdl2.Po
- -rm -f ./$(DEPDIR)/pcem-wx-shader_man.Po
- -rm -f ./$(DEPDIR)/pcem-wx-shaderconfig.Po
- -rm -f ./$(DEPDIR)/pcem-wx-status.Po
- -rm -f ./$(DEPDIR)/pcem-wx-thread.Po
- -rm -f ./$(DEPDIR)/pcem-wx-utils.Po
- -rm -f ./$(DEPDIR)/pcem-x86seg.Po
- -rm -f ./$(DEPDIR)/pcem-x87.Po
- -rm -f ./$(DEPDIR)/pcem-x87_timings.Po
- -rm -f ./$(DEPDIR)/pcem-xi8088.Po
- -rm -f ./$(DEPDIR)/pcem-xtide.Po
- -rm -f dosbox/$(DEPDIR)/pcem-cdrom_image.Po
- -rm -f dosbox/$(DEPDIR)/pcem-dbopl.Po
- -rm -f dosbox/$(DEPDIR)/pcem-nukedopl.Po
- -rm -f dosbox/$(DEPDIR)/pcem-vid_cga_comp.Po
- -rm -f minivhd/$(DEPDIR)/pcem-cwalk.Po
- -rm -f minivhd/$(DEPDIR)/pcem-libxml2_encoding.Po
- -rm -f minivhd/$(DEPDIR)/pcem-minivhd_convert.Po
- -rm -f minivhd/$(DEPDIR)/pcem-minivhd_create.Po
- -rm -f minivhd/$(DEPDIR)/pcem-minivhd_io.Po
- -rm -f minivhd/$(DEPDIR)/pcem-minivhd_manage.Po
- -rm -f minivhd/$(DEPDIR)/pcem-minivhd_struct_rw.Po
- -rm -f minivhd/$(DEPDIR)/pcem-minivhd_util.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-convolve-sse.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-convolve.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-envelope.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-extfilt.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-filter.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-pot.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-sid.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-voice.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-wave.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-wave6581_PST.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-wave6581_PS_.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-wave6581_P_T.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-wave6581__ST.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-wave8580_PST.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-wave8580_PS_.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-wave8580_P_T.Po
- -rm -f resid-fp/$(DEPDIR)/pcem-wave8580__ST.Po
- -rm -f slirp/$(DEPDIR)/pcem-bootp.Po
- -rm -f slirp/$(DEPDIR)/pcem-cksum.Po
- -rm -f slirp/$(DEPDIR)/pcem-debug.Po
- -rm -f slirp/$(DEPDIR)/pcem-if.Po
- -rm -f slirp/$(DEPDIR)/pcem-ip_icmp.Po
- -rm -f slirp/$(DEPDIR)/pcem-ip_input.Po
- -rm -f slirp/$(DEPDIR)/pcem-ip_output.Po
- -rm -f slirp/$(DEPDIR)/pcem-mbuf.Po
- -rm -f slirp/$(DEPDIR)/pcem-misc.Po
- -rm -f slirp/$(DEPDIR)/pcem-queue.Po
- -rm -f slirp/$(DEPDIR)/pcem-sbuf.Po
- -rm -f slirp/$(DEPDIR)/pcem-slirp.Po
- -rm -f slirp/$(DEPDIR)/pcem-socket.Po
- -rm -f slirp/$(DEPDIR)/pcem-tcp_input.Po
- -rm -f slirp/$(DEPDIR)/pcem-tcp_output.Po
- -rm -f slirp/$(DEPDIR)/pcem-tcp_subr.Po
- -rm -f slirp/$(DEPDIR)/pcem-tcp_timer.Po
- -rm -f slirp/$(DEPDIR)/pcem-tftp.Po
- -rm -f slirp/$(DEPDIR)/pcem-udp.Po
+ -rm -rf ./$(DEPDIR)
-rm -f Makefile
maintainer-clean-am: distclean-am maintainer-clean-generic
@@ -7544,7 +3571,7 @@ uninstall-am: uninstall-binPROGRAMS
.MAKE: install-am install-strip
-.PHONY: CTAGS GTAGS TAGS all all-am am--depfiles check check-am clean \
+.PHONY: CTAGS GTAGS TAGS all all-am check check-am clean \
clean-binPROGRAMS clean-generic cscopelist-am ctags ctags-am \
distclean distclean-compile distclean-generic distclean-tags \
distdir dvi dvi-am html html-am info info-am install \
@@ -7560,23 +3587,11 @@ uninstall-am: uninstall-binPROGRAMS
.PRECIOUS: Makefile
-@OS_WINDOWS_FALSE@../pcem: pcem
-@OS_WINDOWS_FALSE@ cp pcem ..
+
+../pcem: pcem
+ cp pcem ..
amrefresh:
-wx.res: wx.rc
- $(WINDRES) -i wx.rc --input-format=rc -o wx.res -O coff
-
-wx-resources.cpp : pc.xrc
- -wxrc -c pc.xrc -o wx-resources.cpp
-
-#pcem_CFLAGS += -mtune=cortex-a53
-#pcem_CXXFLAGS += -mtune=cortex-a53
-#pcem_LDFLAGS = -flto -O3 -mtune=cortex-a15
-
-# pcem_CFLAGS += -fprofile-use
-# pcem_CXXFLAGS += -fprofile-use
-# pcem_LDFLAGS = -fprofile-use
# Tell versions [3.59,3.63) of GNU make to not export all variables.
# Otherwise a system limit (for SysV at least) may be exceeded.
diff --git a/src/Makefile.linux32 b/src/Makefile.linux32
new file mode 100644
index 0000000..622d3f8
--- /dev/null
+++ b/src/Makefile.linux32
@@ -0,0 +1,47 @@
+VPATH = . dosbox resid-fp
+CPP = g++
+CC = gcc
+CFLAGS = -O3 -fomit-frame-pointer -msse2 -m32
+LDFLAGS = -m32
+OBJ = 386.o 386_dynarec.o 386_dynarec_ops.o 808x.o acer386sx.o ali1429.o allegro-gui.o \
+allegro-gui-configure.o allegro-gui-deviceconfig.o allegro-gui-hdconf.o allegro-joystick.o allegro-keyboard.o allegro-main.o \
+allegro-midi.o allegro-mouse.o allegro-video.o amstrad.o cdrom-ioctl-linux.o cdrom-iso.o cdrom-null.o \
+codegen.o codegen_ops.o codegen_timing_486.o codegen_timing_686.o codegen_timing_pentium.o codegen_timing_winchip.o codegen_x86.c compaq.o config.o cpu.o \
+dac.o device.o disc.o disc_fdi.o disc_img.o disc_sector.o dma.o fdc.o fdc37c665.o fdd.o fdi2raw.o gameport.o \
+hdd.o hdd_esdi.o headland.o i430lx.o i430fx.o i430vx.o ide.o intel.o intel_flash.o io.o jim.o joystick_ch_flightstick_pro.o joystick_standard.o joystick_sw_pad.o \
+joystick_tm_fcs.o keyboard.o keyboard_amstrad.o keyboard_at.o keyboard_olim24.o keyboard_pcjr.o keyboard_xt.o \
+lpt.o mca.o mcr.o mem.o mfm_at.o mfm_xebec.o model.o mouse.o mouse_ps2.o mouse_serial.o neat.o nmi.o nvr.o olivetti_m24.o \
+opti495.o pc.o pci.o pic.o piix.o pit.o ppi.o ps1.o ps2.o ps2_mca.o ps2_nvr.o rom.o rtc.o scat.o serial.o sis496.o sound.o \
+sound_ad1848.o sound_adlib.o sound_adlibgold.o sound_cms.o sound_emu8k.o sound_gus.o \
+sound_mpu401_uart.o sound_opl.o sound_pas16.o sound_ps1.o sound_pssj.o sound_sb.o sound_sb_dsp.o sound_sn76489.o \
+sound_speaker.o sound_ssi2001.o sound_wss.o sound_ym7128.o soundopenal.o tandy_eeprom.o tandy_rom.o thread-pthread.o \
+timer.o um8669f.o um8881f.o vid_ati_eeprom.o vid_ati_mach64.o vid_ati18800.o vid_ati28800.o \
+vid_ati68860_ramdac.o vid_cga.o vid_cl5429.o vid_colorplus.o vid_ega.o vid_et4000.o vid_et4000w32.o vid_genius.o vid_hercules.o \
+vid_icd2061.o vid_ics2595.o vid_incolor.o vid_mda.o vid_olivetti_m24.o vid_oti067.o vid_paradise.o vid_pc200.o \
+vid_pc1512.o vid_pc1640.o vid_pcjr.o vid_ps1_svga.o vid_s3.o vid_s3_virge.o vid_sdac_ramdac.o \
+vid_stg_ramdac.o vid_svga.o vid_svga_render.o vid_tandy.o vid_tandysl.o vid_tgui9440.o \
+vid_tkd8001_ramdac.o vid_tvga.o vid_unk_ramdac.o vid_vga.o vid_wy700.o vid_voodoo.o video.o wd76c10.o \
+x86seg.o x87.o xtide.o sound_dbopl.o sound_resid.o
+DBOBJ = dbopl.o vid_cga_comp.o
+SIDOBJ = convolve.o convolve-sse.o envelope.o extfilt.o filter.o pot.o sid.o voice.o wave6581__ST.o wave6581_P_T.o wave6581_PS_.o wave6581_PST.o wave8580__ST.o wave8580_P_T.o wave8580_PS_.o wave8580_PST.o wave.o
+
+
+LIBS = -lopenal -lstdc++ -lalleg -lpthread -lm
+
+PCem: $(OBJ) $(DBOBJ) $(SIDOBJ)
+ $(CC) $(LDFLAGS) $(OBJ) $(DBOBJ) $(SIDOBJ) -o "PCem" $(LIBS)
+
+all : PCem
+
+clean :
+ rm *.o
+ rm PCem
+
+%.o : %.c
+ $(CC) $(CFLAGS) -c $<
+
+%.o : %.cc
+ $(CPP) $(CFLAGS) -c $<
+
+%.o : %.cpp
+ $(CPP) $(CFLAGS) -c $<
diff --git a/src/Makefile.linux64 b/src/Makefile.linux64
new file mode 100644
index 0000000..2c5d4c7
--- /dev/null
+++ b/src/Makefile.linux64
@@ -0,0 +1,46 @@
+VPATH = . dosbox resid-fp
+CPP = g++
+CC = gcc
+CFLAGS = -O3 -fomit-frame-pointer -msse2 -m64
+OBJ = 386.o 386_dynarec.o 386_dynarec_ops.o 808x.o acer386sx.o ali1429.o allegro-gui.o \
+allegro-gui-configure.o allegro-gui-deviceconfig.o allegro-gui-hdconf.o allegro-joystick.o allegro-keyboard.o allegro-main.o \
+allegro-midi.o allegro-mouse.o allegro-video.o amstrad.o cdrom-ioctl-linux.o cdrom-iso.o cdrom-null.o \
+codegen.o codegen_ops.o codegen_timing_486.o codegen_timing_686.o codegen_timing_pentium.o codegen_timing_winchip.o codegen_x86-64.c compaq.o config.o cpu.o \
+dac.o device.o disc.o disc_fdi.o disc_img.o disc_sector.o dma.o fdc.o fdc37c665.o fdd.o fdi2raw.o gameport.o \
+hdd.o hdd_esdi.o headland.o i430lx.o i430fx.o i430vx.o ide.o intel.o intel_flash.o io.o jim.o joystick_ch_flightstick_pro.o joystick_standard.o joystick_sw_pad.o \
+joystick_tm_fcs.o keyboard.o keyboard_amstrad.o keyboard_at.o keyboard_olim24.o keyboard_pcjr.o keyboard_xt.o \
+lpt.o mca.o mcr.o mem.o mfm_at.o mfm_xebec.o model.o mouse.o mouse_ps2.o mouse_serial.o neat.o nmi.o nvr.o olivetti_m24.o \
+opti495.o pc.o pci.o pic.o piix.o pit.o ppi.o ps1.o ps2.o ps2_mca.o ps2_nvr.o rom.o rtc.o scat.o serial.o sis496.o sound.o \
+sound_ad1848.o sound_adlib.o sound_adlibgold.o sound_cms.o sound_emu8k.o sound_gus.o \
+sound_mpu401_uart.o sound_opl.o sound_pas16.o sound_ps1.o sound_pssj.o sound_sb.o sound_sb_dsp.o sound_sn76489.o \
+sound_speaker.o sound_ssi2001.o sound_wss.o sound_ym7128.o soundopenal.o tandy_eeprom.o tandy_rom.o thread-pthread.o \
+timer.o um8669f.o um8881f.o vid_ati_eeprom.o vid_ati_mach64.o vid_ati18800.o vid_ati28800.o \
+vid_ati68860_ramdac.o vid_cga.o vid_cl5429.o vid_colorplus.o vid_ega.o vid_et4000.o vid_et4000w32.o vid_genius.o vid_hercules.o \
+vid_icd2061.o vid_ics2595.o vid_incolor.o vid_mda.o vid_olivetti_m24.o vid_oti067.o vid_paradise.o vid_pc200.o \
+vid_pc1512.o vid_pc1640.o vid_pcjr.o vid_ps1_svga.o vid_s3.o vid_s3_virge.o vid_sdac_ramdac.o \
+vid_stg_ramdac.o vid_svga.o vid_svga_render.o vid_tandy.o vid_tandysl.o vid_tgui9440.o \
+vid_tkd8001_ramdac.o vid_tvga.o vid_unk_ramdac.o vid_vga.o vid_voodoo.o vid_wy700.o video.o wd76c10.o \
+x86seg.o x87.o xtide.o sound_dbopl.o sound_resid.o
+DBOBJ = dbopl.o vid_cga_comp.o
+SIDOBJ = convolve.o convolve-sse.o envelope.o extfilt.o filter.o pot.o sid.o voice.o wave6581__ST.o wave6581_P_T.o wave6581_PS_.o wave6581_PST.o wave8580__ST.o wave8580_P_T.o wave8580_PS_.o wave8580_PST.o wave.o
+
+
+LIBS = -lopenal -lstdc++ -lalleg -lpthread -lm
+
+PCem64: $(OBJ) $(DBOBJ) $(SIDOBJ)
+ $(CC) $(OBJ) $(DBOBJ) $(SIDOBJ) -o "PCem64" $(LIBS)
+
+all : PCem64
+
+clean :
+ rm *.o
+ rm PCem64
+
+%.o : %.c
+ $(CC) $(CFLAGS) -c $<
+
+%.o : %.cc
+ $(CPP) $(CFLAGS) -c $<
+
+%.o : %.cpp
+ $(CPP) $(CFLAGS) -c $<
diff --git a/src/Makefile.mingw b/src/Makefile.mingw
new file mode 100644
index 0000000..9d143f9
--- /dev/null
+++ b/src/Makefile.mingw
@@ -0,0 +1,47 @@
+VPATH = . dosbox resid-fp
+CPP = g++.exe
+CC = gcc.exe
+WINDRES = windres.exe
+CFLAGS = -O3 -march=i686 -fomit-frame-pointer -msse2 -mstackrealign -Wall -Werror -fno-strict-aliasing
+OBJ = 386.o 386_dynarec.o 386_dynarec_ops.o 808x.o acer386sx.o ali1429.o amstrad.o cdrom-ioctl.o cdrom-iso.o \
+ codegen.o codegen_ops.o codegen_timing_486.o codegen_timing_686.o codegen_timing_pentium.o codegen_timing_winchip.o codegen_x86.o compaq.o config.o cpu.o dac.o \
+ device.o disc.o disc_fdi.o disc_img.o disc_sector.o dma.o fdc.o fdc37c665.o fdd.o fdi2raw.o gameport.o hdd.o hdd_esdi.o headland.o i430lx.o i430fx.o \
+ i430vx.o ide.o intel.o intel_flash.o io.o jim.o joystick_ch_flightstick_pro.o joystick_standard.o joystick_sw_pad.o joystick_tm_fcs.o keyboard.o keyboard_amstrad.o keyboard_at.o \
+ keyboard_olim24.o keyboard_pcjr.o keyboard_xt.o lpt.o mca.o mcr.o mem.o mfm_at.o mfm_xebec.o model.o mouse.o mouse_ps2.o \
+ mouse_serial.o neat.o nmi.o nvr.o olivetti_m24.o opti495.o pc.o pci.o pic.o piix.o pit.o ppi.o ps1.o ps2.o ps2_mca.o ps2_nvr.o rom.o rtc.o \
+ scat.o serial.o sis496.o sound.o sound_ad1848.o sound_adlib.o sound_adlibgold.o sound_cms.o sound_dbopl.o \
+ sound_emu8k.o sound_gus.o sound_mpu401_uart.o sound_opl.o sound_pas16.o sound_ps1.o sound_pssj.o sound_resid.o \
+ sound_sb.o sound_sb_dsp.o sound_sn76489.o sound_speaker.o sound_ssi2001.o sound_wss.o \
+ sound_ym7128.o soundopenal.o tandy_eeprom.o tandy_rom.o timer.o um8881f.o um8669f.o vid_ati_eeprom.o vid_ati_mach64.o vid_ati18800.o \
+ vid_ati28800.o vid_ati68860_ramdac.o vid_cga.o vid_cl5429.o vid_colorplus.o vid_ega.o vid_et4000.o \
+ vid_et4000w32.o vid_et4000w32i.o vid_genius.o vid_hercules.o vid_icd2061.o vid_ics2595.o vid_incolor.o vid_mda.o \
+ vid_olivetti_m24.o vid_oti067.o vid_paradise.o vid_pc1512.o vid_pc1640.o vid_pc200.o \
+ vid_pcjr.o vid_ps1_svga.o vid_s3.o vid_s3_virge.o vid_sdac_ramdac.o vid_stg_ramdac.o vid_svga.o \
+ vid_svga_render.o vid_tandy.o vid_tandysl.o vid_tgui9440.o vid_tkd8001_ramdac.o vid_tvga.o vid_unk_ramdac.o \
+ vid_vga.o vid_voodoo.o vid_wy700.o video.o wd76c10.o win.o win-config.o win-config_sel.o win-d3d.o win-d3d-fs.o win-ddraw.o \
+ win-ddraw-fs.o win-deviceconfig.o win-hdconf.o win-joystick.o win-joystickconfig.o win-keyboard.o win-midi.o win-mouse.o \
+ win-status.o win-video.o x86seg.o x87.o xtide.o pc.res
+DBOBJ = dbopl.o vid_cga_comp.o
+SIDOBJ = convolve.o convolve-sse.o envelope.o extfilt.o filter.o pot.o sid.o voice.o wave6581__ST.o wave6581_P_T.o wave6581_PS_.o wave6581_PST.o wave8580__ST.o wave8580_P_T.o wave8580_PS_.o wave8580_PST.o wave.o
+
+
+LIBS = -mwindows -lwinmm -lopenal32 -lddraw -ldinput -ldxguid -ld3d9 -lstdc++
+
+PCem.exe: $(OBJ) $(DBOBJ) $(SIDOBJ)
+ $(CC) $(OBJ) $(DBOBJ) $(SIDOBJ) -o "PCem.exe" $(LIBS)
+
+all : PCem.exe
+
+clean :
+ rm *.o
+ rm *.exe
+ rm *.res
+
+%.o : %.c
+ $(CC) $(CFLAGS) -c $<
+
+%.o : %.cc
+ $(CPP) $(CFLAGS) -c $<
+
+pc.res: pc.rc
+ $(WINDRES) -i pc.rc --input-format=rc -o pc.res -O coff
diff --git a/src/Makefile.mingw-wx-sdl2 b/src/Makefile.mingw-wx-sdl2
deleted file mode 100644
index cc37a09..0000000
--- a/src/Makefile.mingw-wx-sdl2
+++ /dev/null
@@ -1,79 +0,0 @@
-VPATH = . dosbox resid-fp minivhd
-CPP = g++
-CC = gcc
-WINDRES = windres.exe
-WXVERSION = 31
-WXINCLUDE = e:/MinGWget/include/wx/
-CFLAGS = -O3 -march=i686 -fomit-frame-pointer -msse2 -mstackrealign -Werror -fno-strict-aliasing
-CXXFLAGS = $(CFLAGS)
-OBJ = 386.o 386_common.o 386_dynarec.o 386_dynarec_ops.o 808x.o 82091aa.o acc2036.o acc2168.o acc3221.o acer386sx.o ali1429.o amstrad.o cassette.o \
- cbm_io.o cdrom-ioctl.o cdrom-image.o cmd640.o codegen.o codegen_accumulate.o codegen_allocator.o \
- codegen_backend_x86.o codegen_backend_x86_ops.o codegen_backend_x86_ops_fpu.o codegen_backend_x86_ops_sse.o \
- codegen_backend_x86_uops.o codegen_block.o codegen_ir.o codegen_ops.o \
- codegen_ops_3dnow.o codegen_ops_branch.o codegen_ops_arith.o codegen_ops_fpu_arith.o \
- codegen_ops_fpu_constant.o codegen_ops_fpu_loadstore.o codegen_ops_fpu_misc.o codegen_ops_helpers.o codegen_ops_jump.o \
- codegen_ops_logic.o codegen_ops_misc.o codegen_ops_mmx_arith.o codegen_ops_mmx_cmp.o \
- codegen_ops_mmx_loadstore.o codegen_ops_mmx_logic.o codegen_ops_mmx_pack.o codegen_ops_mmx_shift.o \
- codegen_ops_mov.o codegen_ops_shift.o codegen_ops_stack.o codegen_reg.o codegen_timing_486.o \
- codegen_timing_686.o codegen_timing_common.o codegen_timing_cyrixiii.o codegen_timing_k6.o codegen_timing_p6.o codegen_timing_pentium.o \
- codegen_timing_winchip.o codegen_timing_winchip2.o compaq.o config.o cpu.o cpu_tables.o cs8230.o device.o \
- dells200.o disc.o disc_fdi.o disc_img.o disc_sector.o dma.o esdi_at.o f82c710_upc.o fdc.o fdc37c665.o fdc37c93x.o fdd.o \
- fdi2raw.o gameport.o hdd.o hdd_esdi.o hdd_file.o headland.o i430hx.o i430lx.o i430fx.o i430vx.o i440fx.o i440bx.o ide.o \
- ide_atapi.o ide_sff8038i.o intel.o intel_flash.o io.o jim.o joystick_ch_flightstick_pro.o \
- joystick_standard.o joystick_sw_pad.o joystick_tm_fcs.o keyboard.o keyboard_amstrad.o keyboard_at.o \
- keyboard_olim24.o keyboard_pcjr.o keyboard_xt.o laserxt.o lpt.o lpt_dac.o lpt_dss.o mca.o mcr.o \
- mem.o mem_bios.o mfm_at.o mfm_xebec.o model.o mouse.o mouse_msystems.o mouse_ps2.o mouse_serial.o \
- mvp3.o neat.o nmi.o nvr.o nvr_tc8521.o olivetti_m24.o opti495.o paths.o pc.o pc87306.o pc87307.o pci.o pic.o \
- piix.o piix_pm.o pit.o ppi.o ps1.o ps2.o ps2_mca.o ps2_nvr.o pzx.o rom.o rtc.o rtc_tc8521.o scamp.o scat.o scsi.o \
- scsi_53c400.o scsi_aha1540.o scsi_cd.o scsi_hd.o scsi_ibm.o scsi_zip.o serial.o sio.o sis496.o sl82c460.o \
- sound.o sound_ad1848.o sound_adlib.o sound_adlibgold.o sound_audiopci.o sound_azt2316a.o sound_cms.o sound_dbopl.o \
- sound_emu8k.o sound_gus.o sound_mpu401_uart.o sound_opl.o sound_pas16.o sound_ps1.o sound_pssj.o \
- sound_resid.o sound_sb.o sound_sb_dsp.o sound_sn76489.o sound_speaker.o sound_ssi2001.o sound_wss.o \
- sound_ym7128.o soundopenal.o sst39sf010.o superxt.o t1000.o t3100e.o tandy_eeprom.o tandy_rom.o timer.o um8881f.o um8669f.o \
- vid_ati_eeprom.o vid_ati_mach64.o vid_ati18800.o vid_ati28800.o vid_ati68860_ramdac.o vid_cga.o \
- vid_cl5429.o vid_colorplus.o vid_compaq_cga.o vid_ddc.o vid_ega.o vid_et4000.o vid_et4000w32.o \
- vid_et4000w32i.o vid_genius.o vid_hercules.o vid_ht216.o vid_icd2061.o vid_ics2595.o vid_im1024.o vid_incolor.o vid_mda.o \
- vid_mga.o vid_olivetti_m24.o vid_oti037.c vid_oti067.o vid_paradise.o vid_pc1512.o vid_pc1640.o vid_pc200.o \
- vid_pcjr.o vid_pgc.o vid_ps1_svga.o vid_s3.o vid_s3_virge.o vid_sdac_ramdac.o vid_sigma.o vid_stg_ramdac.o vid_svga.o \
- vid_svga_render.o vid_t1000.o vid_t3100e.o vid_tandy.o vid_tandysl.o vid_tgui9440.o \
- vid_tkd8001_ramdac.o vid_tvga.o vid_unk_ramdac.o vid_vga.o vid_voodoo.o vid_voodoo_banshee.o vid_voodoo_banshee_blitter.o \
- vid_voodoo_blitter.o vid_voodoo_display.o vid_voodoo_fb.o vid_voodoo_fifo.o vid_voodoo_reg.o \
- vid_voodoo_render.o vid_voodoo_setup.o vid_voodoo_texture.o vid_wy700.o video.o vl82c480.o \
- vt82c586b.o w83877tf.o w83977tf.o wd76c10.o x86seg.o x87.o x87_timings.o xi8088.c xtide.o zenith.o win-midi.o wx-main.o \
- wx-config_sel.o wx-dialogbox.o wx-utils.o wx-app.o wx-sdl2-joystick.o wx-sdl2-mouse.o \
- wx-sdl2-keyboard.o wx-sdl2-video.o wx-sdl2.o wx-config.o wx-deviceconfig.o wx-status.o \
- wx-sdl2-status.o wx-resources.o wx-thread.o wx-common.o wx-sdl2-display-win.o \
- wx-sdl2-video-renderer.o wx-sdl2-video-gl3.o wx-glslp-parser.o wx-shader_man.o wx-shaderconfig.o \
- wx-joystickconfig.o wx-createdisc.o wx.res
-DBOBJ = cdrom_image.o dbopl.o nukedopl.o vid_cga_comp.o
-SIDOBJ = convolve.o convolve-sse.o envelope.o extfilt.o filter.o pot.o sid.o voice.o wave6581__ST.o wave6581_P_T.o wave6581_PS_.o wave6581_PST.o wave8580__ST.o wave8580_P_T.o wave8580_PS_.o wave8580_PST.o wave.o
-MVHDOBJ = cwalk.o libxml2_encoding.o minivhd_convert.o minivhd_create.o minivhd_io.o minivhd_manage.o minivhd_struct_rw.o minivhd_util.o
-
-LIBS = -Wl,--subsystem,windows -mthreads -mwindows -lwxmsw$(WXVERSION)u_xrc -lwxmsw$(WXVERSION)u_html -lwxmsw$(WXVERSION)u_adv -lwxbase$(WXVERSION)u_xml -lwxmsw$(WXVERSION)u_core -lwxbase$(WXVERSION)u -lwxtiff -lwxjpeg -lwxpng -lwxzlib -lwxregexu -lwxexpat -lkernel32 -lcomdlg32 -lwinspool -lcomctl32 -lole32 -loleaut32 -luuid -lrpcrt4 -ladvapi32 -lmingw32 -lopengl32 -lopenal32 -lstdc++ -lSDL2main -lSDL2 -lm -ldinput8 -ldxguid -ldxerr8 -luser32 -lgdi32 -lwinmm -limm32 -lole32 -loleaut32 -lshell32 -lversion -luuid -static-libgcc
-
-PCem-wx-SDL2.exe: $(OBJ) $(DBOBJ) $(SIDOBJ) $(MVHDOBJ)
- $(CC) $(OBJ) $(DBOBJ) $(SIDOBJ) $(MVHDOBJ) -o "PCem-wx-SDL2.exe" $(LIBS)
- strip -s PCem-wx-SDL2.exe
-
-all : PCem-wx-SDL2.exe
-
-clean :
- rm *.o
- rm PCem-wx-SDL2.exe
- rm *.res
-
-wx-resources.o : pc.xrc
- -wxrc -c pc.xrc -o wx-resources.cpp
- $(CPP) $(CXXFLAGS) -c wx-resources.cpp
-
-%.o : %.c
- $(CC) $(CFLAGS) -c $<
-
-%.o : %.cc
- $(CPP) $(CXXFLAGS) -c $<
-
-%.o : %.cpp
- $(CPP) $(CXXFLAGS) -c $<
-
-wx.res: wx.rc
- $(WINDRES) -I$(WXINCLUDE)/../ -i wx.rc --input-format=rc -o wx.res -O coff
diff --git a/src/Makefile.mingw-wx-sdl2-network b/src/Makefile.mingw-wx-sdl2-network
deleted file mode 100644
index c1d7771..0000000
--- a/src/Makefile.mingw-wx-sdl2-network
+++ /dev/null
@@ -1,83 +0,0 @@
-VPATH = . dosbox resid-fp minivhd
-CPP = g++
-CC = gcc
-WINDRES = windres.exe
-WXVERSION = 31
-WXINCLUDE = e:/mingwget/include/wx/
-CFLAGS = -O3 -march=i686 -fomit-frame-pointer -msse2 -mstackrealign -Werror -fno-strict-aliasing -DUSE_NETWORKING
-CXXFLAGS = $(CFLAGS)
-OBJ = 386.o 386_common.o 386_dynarec.o 386_dynarec_ops.o 808x.o 82091aa.o acc2036.o acc2168.o acc3221.o acer386sx.o ali1429.o amstrad.o cassette.o \
- cbm_io.o cdrom-ioctl.o cdrom-image.o cmd640.o codegen.o codegen_accumulate.o codegen_allocator.o \
- codegen_backend_x86.o codegen_backend_x86_ops.o codegen_backend_x86_ops_fpu.o codegen_backend_x86_ops_sse.o \
- codegen_backend_x86_uops.o codegen_block.o codegen_ir.o codegen_ops.o \
- codegen_ops_3dnow.o codegen_ops_branch.o codegen_ops_arith.o codegen_ops_fpu_arith.o \
- codegen_ops_fpu_constant.o codegen_ops_fpu_loadstore.o codegen_ops_fpu_misc.o codegen_ops_helpers.o codegen_ops_jump.o \
- codegen_ops_logic.o codegen_ops_misc.o codegen_ops_mmx_arith.o codegen_ops_mmx_cmp.o \
- codegen_ops_mmx_loadstore.o codegen_ops_mmx_logic.o codegen_ops_mmx_pack.o codegen_ops_mmx_shift.o \
- codegen_ops_mov.o codegen_ops_shift.o codegen_ops_stack.o codegen_reg.o codegen_timing_486.o \
- codegen_timing_686.o codegen_timing_common.o codegen_timing_cyrixiii.o codegen_timing_k6.o codegen_timing_p6.o codegen_timing_pentium.o \
- codegen_timing_winchip.o codegen_timing_winchip2.o compaq.o config.o cpu.o cpu_tables.o cs8230.o device.o \
- dells200.o disc.o disc_fdi.o disc_img.o disc_sector.o dma.o esdi_at.o f82c710_upc.o fdc.o fdc37c665.o fdc37c93x.o fdd.o \
- fdi2raw.o gameport.o hdd.o hdd_esdi.o hdd_file.o headland.o i430hx.o i430lx.o i430fx.o i430vx.o i440fx.o i440bx.o ide.o \
- ide_atapi.o ide_sff8038i.o intel.o intel_flash.o io.o jim.o joystick_ch_flightstick_pro.o \
- joystick_standard.o joystick_sw_pad.o joystick_tm_fcs.o keyboard.o keyboard_amstrad.o keyboard_at.o \
- keyboard_olim24.o keyboard_pcjr.o keyboard_xt.o laserxt.o lpt.o lpt_dac.o lpt_dss.o mca.o mcr.o \
- mem.o mem_bios.o mfm_at.o mfm_xebec.o model.o mouse.o mouse_msystems.o mouse_ps2.o mouse_serial.o \
- mvp3.o neat.o nmi.o nvr.o nvr_tc8521.o olivetti_m24.o opti495.o paths.o pc.o pc87306.o pc87307.o pci.o pic.o \
- piix.o piix_pm.o pit.o ppi.o ps1.o ps2.o ps2_mca.o ps2_nvr.o pzx.o rom.o rtc.o rtc_tc8521.o scamp.o scat.o scsi.o \
- scsi_53c400.o scsi_aha1540.o scsi_cd.o scsi_hd.o scsi_ibm.o scsi_zip.o serial.o sio.o sis496.o sl82c460.o \
- sound.o sound_ad1848.o sound_adlib.o sound_adlibgold.o sound_audiopci.o sound_azt2316a.o sound_cms.o sound_dbopl.o \
- sound_emu8k.o sound_gus.o sound_mpu401_uart.o sound_opl.o sound_pas16.o sound_ps1.o sound_pssj.o \
- sound_resid.o sound_sb.o sound_sb_dsp.o sound_sn76489.o sound_speaker.o sound_ssi2001.o sound_wss.o \
- sound_ym7128.o soundopenal.o sst39sf010.o superxt.o t1000.o t3100e.o tandy_eeprom.o tandy_rom.o timer.o um8881f.o um8669f.o \
- vid_ati_eeprom.o vid_ati_mach64.o vid_ati18800.o vid_ati28800.o vid_ati68860_ramdac.o vid_cga.o \
- vid_cl5429.o vid_colorplus.o vid_compaq_cga.o vid_ddc.o vid_ega.o vid_et4000.o vid_et4000w32.o \
- vid_et4000w32i.o vid_genius.o vid_hercules.o vid_ht216.o vid_icd2061.o vid_ics2595.o vid_im1024.o vid_incolor.o vid_mda.o \
- vid_mga.o vid_olivetti_m24.o vid_oti037.c vid_oti067.o vid_paradise.o vid_pc1512.o vid_pc1640.o vid_pc200.o \
- vid_pcjr.o vid_pgc.o vid_ps1_svga.o vid_s3.o vid_s3_virge.o vid_sdac_ramdac.o vid_sigma.o vid_stg_ramdac.o vid_svga.o \
- vid_svga_render.o vid_t1000.o vid_t3100e.o vid_tandy.o vid_tandysl.o vid_tgui9440.o \
- vid_tkd8001_ramdac.o vid_tvga.o vid_unk_ramdac.o vid_vga.o vid_voodoo.o vid_voodoo_banshee.o vid_voodoo_banshee_blitter.o \
- vid_voodoo_blitter.o vid_voodoo_display.o vid_voodoo_fb.o vid_voodoo_fifo.o vid_voodoo_reg.o \
- vid_voodoo_render.o vid_voodoo_setup.o vid_voodoo_texture.o vid_wy700.o video.o vl82c480.o \
- vt82c586b.o w83877tf.o w83977tf.o wd76c10.o x86seg.o x87.o x87_timings.o xi8088.c xtide.o zenith.o win-midi.o wx-main.o \
- wx-config_sel.o wx-dialogbox.o wx-hostconfig.o wx-utils.o wx-app.o wx-sdl2-joystick.o wx-sdl2-mouse.o \
- wx-sdl2-keyboard.o wx-sdl2-video.o wx-sdl2.o wx-config.o wx-deviceconfig.o wx-status.o \
- wx-sdl2-status.o wx-resources.o wx-thread.o wx-common.o wx-sdl2-display-win.o \
- wx-sdl2-video-renderer.o wx-sdl2-video-gl3.o wx-glslp-parser.o wx-shader_man.o wx-shaderconfig.o \
- wx-joystickconfig.o wx-createdisc.o wx.res
-DBOBJ = cdrom_image.o dbopl.o nukedopl.o vid_cga_comp.o
-SIDOBJ = convolve.o convolve-sse.o envelope.o extfilt.o filter.o pot.o sid.o voice.o wave6581__ST.o wave6581_P_T.o wave6581_PS_.o wave6581_PST.o wave8580__ST.o wave8580_P_T.o wave8580_PS_.o wave8580_PST.o wave.o
-MVHDOBJ = cwalk.o libxml2_encoding.o minivhd_convert.o minivhd_create.o minivhd_io.o minivhd_manage.o minivhd_struct_rw.o minivhd_util.o
-NETOBJ = ne2000.o nethandler.o
-
-LIBS = -Wl,--subsystem,windows -mthreads -mwindows -lwxmsw$(WXVERSION)u_xrc -lwxmsw$(WXVERSION)u_html -lwxmsw$(WXVERSION)u_adv -lwxbase$(WXVERSION)u_xml -lwxmsw$(WXVERSION)u_core -lwxbase$(WXVERSION)u -lwxtiff -lwxjpeg -lwxpng -lwxzlib -lwxregexu -lwxexpat -lkernel32 -lcomdlg32 -lwinspool -lcomctl32 -lole32 -loleaut32 -luuid -lrpcrt4 -ladvapi32 -lmingw32 -lopengl32 -lopenal32 -lstdc++ -lSDL2main -lSDL2 -lm -ldinput8 -ldxguid -ldxerr8 -luser32 -lgdi32 -lwinmm -limm32 -lole32 -loleaut32 -lshell32 -lversion -luuid -static-libgcc -lwsock32 -liphlpapi
-
-PCem-wx-SDL2.exe: $(OBJ) $(DBOBJ) $(SIDOBJ) $(MVHDOBJ) $(NETOBJ) libslirp.a
- $(CC) $(OBJ) $(DBOBJ) $(SIDOBJ) $(MVHDOBJ) $(NETOBJ) slirp/libslirp.a -o "PCem-wx-SDL2.exe" $(LIBS)
- strip -s PCem-wx-SDL2.exe
-
-libslirp.a:
- $(MAKE) -C slirp
-
-all : libslirp.a PCem-wx-SDL2.exe
-
-clean :
- rm *.o
- rm PCem-wx-SDL2.exe
- rm *.res
-
-wx-resources.o : pc.xrc
- -wxrc -c pc.xrc -o wx-resources.cpp
- $(CPP) $(CXXFLAGS) -c wx-resources.cpp
-
-%.o : %.c
- $(CC) $(CFLAGS) -c $<
-
-%.o : %.cc
- $(CPP) $(CXXFLAGS) -c $<
-
-%.o : %.cpp
- $(CPP) $(CXXFLAGS) -c $<
-
-wx.res: wx.rc
- $(WINDRES) -I$(WXINCLUDE)/../ -i wx.rc --input-format=rc -o wx.res -O coff
diff --git a/src/Makefile.mingw64 b/src/Makefile.mingw64
new file mode 100644
index 0000000..f55c6e1
--- /dev/null
+++ b/src/Makefile.mingw64
@@ -0,0 +1,47 @@
+VPATH = . dosbox resid-fp
+CPP = g++.exe
+CC = gcc.exe
+WINDRES = windres.exe
+CFLAGS = -O3 -fomit-frame-pointer -msse2 -Wall -Werror -fno-strict-aliasing
+OBJ = 386.o 386_dynarec.o 386_dynarec_ops.o 808x.o acer386sx.o ali1429.o amstrad.o cdrom-ioctl.o cdrom-iso.o \
+ codegen.o codegen_ops.o codegen_timing_486.o codegen_timing_686.o codegen_timing_pentium.o codegen_timing_winchip.o codegen_x86-64.o compaq.o config.o cpu.o dac.o \
+ device.o disc.o disc_fdi.o disc_img.o disc_sector.o dma.o fdc.o fdc37c665.o fdd.o fdi2raw.o gameport.o hdd.o hdd_esdi.o headland.o i430lx.o i430fx.o \
+ i430vx.o ide.o intel.o intel_flash.o io.o jim.o joystick_ch_flightstick_pro.o joystick_standard.o joystick_sw_pad.o joystick_tm_fcs.o keyboard.o keyboard_amstrad.o keyboard_at.o \
+ keyboard_olim24.o keyboard_pcjr.o keyboard_xt.o lpt.o mca.o mcr.o mem.o mfm_at.o mfm_xebec.o model.o mouse.o mouse_ps2.o \
+ mouse_serial.o neat.o nmi.o nvr.o olivetti_m24.o opti495.o pc.o pci.o pic.o piix.o pit.o ppi.o ps1.o ps2.o ps2_mca.o ps2_nvr.o rom.o rtc.o \
+ scat.o serial.o sis496.o sound.o sound_ad1848.o sound_adlib.o sound_adlibgold.o sound_cms.o sound_dbopl.o \
+ sound_emu8k.o sound_gus.o sound_mpu401_uart.o sound_opl.o sound_pas16.o sound_ps1.o sound_pssj.o sound_resid.o \
+ sound_sb.o sound_sb_dsp.o sound_sn76489.o sound_speaker.o sound_ssi2001.o sound_wss.o sound_ym7128.o \
+ soundopenal.o tandy_eeprom.o tandy_rom.o timer.o um8881f.o um8669f.o vid_ati_eeprom.o vid_ati_mach64.o vid_ati18800.o \
+ vid_ati28800.o vid_ati68860_ramdac.o vid_cga.o vid_cl5429.o vid_colorplus.o vid_ega.o vid_et4000.o \
+ vid_et4000w32.o vid_et4000w32i.o vid_genius.o vid_hercules.o vid_icd2061.o vid_ics2595.o vid_incolor.o vid_mda.o \
+ vid_olivetti_m24.o vid_oti067.o vid_paradise.o vid_pc1512.o vid_pc1640.o vid_pc200.o \
+ vid_pcjr.o vid_ps1_svga.o vid_s3.o vid_s3_virge.o vid_sdac_ramdac.o vid_stg_ramdac.o vid_svga.o \
+ vid_svga_render.o vid_tandy.o vid_tandysl.o vid_tgui9440.o vid_tkd8001_ramdac.o vid_tvga.o vid_unk_ramdac.o \
+ vid_vga.o vid_voodoo.o vid_wy700.o video.o wd76c10.o win.o win-config.o win-d3d.o win-d3d-fs.o win-ddraw.o \
+ win-ddraw-fs.o win-deviceconfig.o win-hdconf.o win-joystick.o win-joystickconfig.o win-keyboard.o win-midi.o win-mouse.o \
+ win-status.o win-video.o x86seg.o x87.o xtide.o pc.res
+DBOBJ = dbopl.o vid_cga_comp.o
+SIDOBJ = convolve.o convolve-sse.o envelope.o extfilt.o filter.o pot.o sid.o voice.o wave6581__ST.o wave6581_P_T.o wave6581_PS_.o wave6581_PST.o wave8580__ST.o wave8580_P_T.o wave8580_PS_.o wave8580_PST.o wave.o
+
+
+LIBS = -mwindows -lwinmm -lopenal32 -lddraw -ldinput -ldxguid -ld3d9 -lstdc++
+
+PCem64.exe: $(OBJ) $(DBOBJ) $(SIDOBJ)
+ $(CC) $(OBJ) $(DBOBJ) $(SIDOBJ) -o "PCem64.exe" $(LIBS)
+
+all : PCem64.exe
+
+clean :
+ rm *.o
+ rm *.exe
+ rm *.res
+
+%.o : %.c
+ $(CC) $(CFLAGS) -c $<
+
+%.o : %.cc
+ $(CPP) $(CFLAGS) -c $<
+
+pc.res: pc.rc
+ $(WINDRES) -i pc.rc --input-format=rc -o pc.res -O coff
diff --git a/src/acc2036.c b/src/acc2036.c
deleted file mode 100644
index faacd9d..0000000
--- a/src/acc2036.c
+++ /dev/null
@@ -1,102 +0,0 @@
-#include "ibm.h"
-#include "acc2036.h"
-#include "io.h"
-#include "mem.h"
-
-static struct
-{
- int reg_idx;
- uint8_t regs[256];
-} acc2036;
-
-static void acc2036_shadow_recalc()
-{
- if (acc2036.regs[0x2c] & 8)
- {
- switch (acc2036.regs[0x22] & 3)
- {
- case 0:
- mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- break;
- case 1:
- mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL);
- break;
- case 2:
- mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
- break;
- case 3:
- mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- break;
- }
- }
- else
- mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
-
- if (acc2036.regs[0x2c] & 4)
- {
- switch (acc2036.regs[0x22] & 3)
- {
- case 0:
- mem_set_mem_state(0xe0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- break;
- case 1:
- mem_set_mem_state(0xe0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL);
- break;
- case 2:
- mem_set_mem_state(0xe0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
- break;
- case 3:
- mem_set_mem_state(0xe0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- break;
- }
- }
- else
- mem_set_mem_state(0xe0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
-}
-
-static void acc2036_write(uint16_t addr, uint8_t val, void *p)
-{
- if (!(addr & 1))
- acc2036.reg_idx = val;
- else
- {
- acc2036.regs[acc2036.reg_idx] = val;
-// pclog("Write ACC2036 R%02x %02x %04x:%04x %i\n", acc2036.reg_idx, val, CS,cpu_state.pc, ins);
-
- switch (acc2036.reg_idx)
- {
- case 0x22:
- case 0x2c:
- acc2036_shadow_recalc();
- break;
-
- case 0x23:
- mem_mapping_disable(&ram_remapped_mapping);
- if (val & 0x10)
- {
- if (acc2036.regs[0x2c] & 0xc)
- mem_remap_top_256k();
- else
- mem_remap_top_384k();
- }
- break;
- }
- }
-}
-
-static uint8_t acc2036_read(uint16_t addr, void *p)
-{
- if (!(addr & 1))
- return acc2036.reg_idx;
-
- if (acc2036.reg_idx >= 0xbc)
- return 0xff;
-
- return acc2036.regs[acc2036.reg_idx];
-}
-
-void acc2036_init()
-{
- memset(&acc2036, 0, sizeof(acc2036));
- io_sethandler(0x00f2, 0x0002, acc2036_read, NULL, NULL, acc2036_write, NULL, NULL, NULL);
-}
diff --git a/src/acc2036.h b/src/acc2036.h
deleted file mode 100644
index 40561fa..0000000
--- a/src/acc2036.h
+++ /dev/null
@@ -1 +0,0 @@
-void acc2036_init();
diff --git a/src/acc2168.c b/src/acc2168.c
deleted file mode 100644
index e6ab7dd..0000000
--- a/src/acc2168.c
+++ /dev/null
@@ -1,119 +0,0 @@
-#include "ibm.h"
-#include "acc2168.h"
-#include "cpu.h"
-#include "io.h"
-#include "mem.h"
-#include "x86.h"
-
-static struct
-{
- int reg_idx;
- uint8_t regs[256];
- uint8_t port_62;
-} acc2168;
-
-static void acc2168_shadow_recalc()
-{
- if (acc2168.regs[0x02] & 8)
- {
- switch (acc2168.regs[0x02] & 0x30)
- {
- case 0x00:
- mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
- break;
- case 0x10:
- mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- break;
- case 0x20:
- mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- break;
- case 0x30:
- mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL);
- break;
- }
- }
- else
- mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
-
- if (acc2168.regs[0x02] & 4)
- {
- switch (acc2168.regs[0x02] & 0x30)
- {
- case 0x00:
- mem_set_mem_state(0xe0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
- break;
- case 0x10:
- mem_set_mem_state(0xe0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- break;
- case 0x20:
- mem_set_mem_state(0xe0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- break;
- case 0x30:
- mem_set_mem_state(0xe0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL);
- break;
- }
- }
- else
- mem_set_mem_state(0xe0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
-}
-
-static void acc2168_write(uint16_t addr, uint8_t val, void *p)
-{
-// pclog("acc2168_write: addr=%04x val=%02x\n", addr, val);
- if (!(addr & 1))
- acc2168.reg_idx = val;
- else
- {
- acc2168.regs[acc2168.reg_idx] = val;
-// pclog("acc2168_write: idx=%02x val=%02x %04x:%04x\n", acc2168.reg_idx, val, CS,cpu_state.pc);
-
- switch (acc2168.reg_idx)
- {
- case 0x02:
- acc2168_shadow_recalc();
- break;
- }
- }
-}
-
-static uint8_t acc2168_read(uint16_t addr, void *p)
-{
- if (!(addr & 1))
- return acc2168.reg_idx;
-
-// pclog("acc2168_read: idx=%02x val=%02x\n", acc2168.reg_idx, acc2168.regs[acc2168.reg_idx]);
- return acc2168.regs[acc2168.reg_idx];
-}
-
-static uint8_t port78_read(uint16_t addr, void *p)
-{
- return 0;
-}
-
-static uint8_t port92_read(uint16_t addr, void *p)
-{
- return acc2168.port_62 | 0xfc;
-}
-
-static void port92_write(uint16_t addr, uint8_t val, void *p)
-{
- if ((mem_a20_alt ^ val) & 2)
- {
- mem_a20_alt = val & 2;
- mem_a20_recalc();
- }
- if ((~acc2168.port_62 & val) & 1)
- {
- softresetx86();
- cpu_set_edx();
- }
- acc2168.port_62 = val | 0xfC;
-}
-
-void acc2168_init()
-{
- memset(&acc2168, 0, sizeof(acc2168));
- io_sethandler(0x00f2, 0x0002, acc2168_read, NULL, NULL, acc2168_write, NULL, NULL, NULL);
- io_sethandler(0x0078, 0x0001, port78_read, NULL, NULL, NULL, NULL, NULL, NULL);
- io_sethandler(0x0092, 0x0001, port92_read, NULL, NULL, port92_write, NULL, NULL, NULL);
-}
diff --git a/src/acc2168.h b/src/acc2168.h
deleted file mode 100644
index 93515ee..0000000
--- a/src/acc2168.h
+++ /dev/null
@@ -1 +0,0 @@
-void acc2168_init();
diff --git a/src/acc3221.c b/src/acc3221.c
deleted file mode 100644
index 2b3fb8a..0000000
--- a/src/acc3221.c
+++ /dev/null
@@ -1,122 +0,0 @@
-#include "ibm.h"
-#include "acc3221.h"
-#include "fdc.h"
-#include "ide.h"
-#include "io.h"
-#include "lpt.h"
-#include "serial.h"
-
-static struct
-{
- int reg_idx;
- uint8_t regs[256];
-} acc3221;
-
-#define REG_BE_LPT1_DISABLE (1 << 4)
-
-#define REG_DB_SERIAL1_DISABLE (1 << 4)
-#define REG_DB_SERIAL2_DISABLE (1 << 1)
-
-#define REG_DE_SIRQ3_SOURCE (3 << 6)
-#define REG_DE_SIRQ3_SERIAL1 (1 << 6)
-#define REG_DE_SIRQ3_SERIAL2 (3 << 6)
-
-#define REG_DE_SIRQ4_SOURCE (3 << 4)
-#define REG_DE_SIRQ4_SERIAL1 (1 << 4)
-#define REG_DE_SIRQ4_SERIAL2 (3 << 4)
-
-#define REG_FB_FDC_DISABLE (1 << 1)
-
-#define REG_FE_IDE_DISABLE (1 << 1)
-
-static void acc3221_write(uint16_t addr, uint8_t val, void *p)
-{
- if (!(addr & 1))
- acc3221.reg_idx = val;
- else
- {
- acc3221.regs[acc3221.reg_idx] = val;
-// pclog("Write ACC2036 R%02x %02x %04x:%04x %i\n", acc2036.reg_idx, val, CS,cpu_state.pc, ins);
-
- if (acc3221.reg_idx >= 0xbc)
- {
-// pclog("Write ACC3221 R%02x %02x %04x:%04x %i\n", acc3221.reg_idx, val, CS,cpu_state.pc, ins);
- fdc_remove();
- if (!(acc3221.regs[0xfb] & REG_FB_FDC_DISABLE))
- fdc_add();
-
- serial1_remove();
- if (!(acc3221.regs[0xdb] & REG_DB_SERIAL1_DISABLE))
- {
- uint16_t addr = (acc3221.regs[0xdc] & 0x7f) << 2;
-
- if ((acc3221.regs[0xde] & REG_DE_SIRQ3_SOURCE) == REG_DE_SIRQ3_SERIAL1)
- {
-// pclog("COM1 addr %03x IRQ 3\n", addr);
- serial1_set(addr, 3);
- }
- else if ((acc3221.regs[0xde] & REG_DE_SIRQ4_SOURCE) == REG_DE_SIRQ4_SERIAL1)
- {
-// pclog("COM1 addr %03x IRQ 4\n", addr);
- serial1_set(addr, 4);
- }
-// else
-// pclog("COM1 addr %03x no IRQ\n", addr);
- }
-// else
-// pclog("COM1 disabled\n");
-
- serial2_remove();
- if (!(acc3221.regs[0xdb] & REG_DB_SERIAL2_DISABLE))
- {
- uint16_t addr = (acc3221.regs[0xdd] & 0x7f) << 2;
-
- if ((acc3221.regs[0xde] & REG_DE_SIRQ3_SOURCE) == REG_DE_SIRQ3_SERIAL2)
- {
-// pclog("COM2 addr %03x IRQ 3\n", addr);
- serial2_set(addr, 3);
- }
- else if ((acc3221.regs[0xde] & REG_DE_SIRQ4_SOURCE) == REG_DE_SIRQ4_SERIAL2)
- {
-// pclog("COM2 addr %03x IRQ 4\n", addr);
- serial2_set(addr, 4);
- }
-// else
-// pclog("COM2 addr %03x no IRQ\n", addr);
- }
-// else
-// pclog("COM2 disabled\n");
-
- lpt1_remove();
- lpt2_remove();
- if (!(acc3221.regs[0xbe] & REG_BE_LPT1_DISABLE))
- {
-// pclog("LPT1 addr %03x\n", acc3221.regs[0xbf] << 2);
- lpt1_init(acc3221.regs[0xbf] << 2);
- }
-// else
-// pclog("LPT1 disabled\n");
-
- ide_pri_disable();
- if (!(acc3221.regs[0xfe] & REG_FE_IDE_DISABLE))
- ide_pri_enable();
- }
- }
-}
-
-static uint8_t acc3221_read(uint16_t addr, void *p)
-{
- if (!(addr & 1))
- return acc3221.reg_idx;
-
- if (acc3221.reg_idx < 0xbc)
- return 0xff;
-
- return acc3221.regs[acc3221.reg_idx];
-}
-
-void acc3221_init()
-{
- memset(&acc3221, 0, sizeof(acc3221));
- io_sethandler(0x00f2, 0x0002, acc3221_read, NULL, NULL, acc3221_write, NULL, NULL, NULL);
-}
diff --git a/src/acc3221.h b/src/acc3221.h
deleted file mode 100644
index 95824ec..0000000
--- a/src/acc3221.h
+++ /dev/null
@@ -1 +0,0 @@
-void acc3221_init();
diff --git a/src/acer386sx.c b/src/acer386sx.c
index 456ef35..77a7ef2 100644
--- a/src/acer386sx.c
+++ b/src/acer386sx.c
@@ -1,92 +1,22 @@
#include "ibm.h"
-#include "device.h"
#include "io.h"
#include "cpu.h"
-#include "lpt.h"
-#include "mem.h"
-#include "serial.h"
-#include "vid_oti067.h"
#include "acer386sx.h"
static int acer_index = 0;
static uint8_t acer_regs[256];
-static uint8_t acer_last_write;
-static int acer_locked;
-static void *acer_oti067;
-
-void acer386sx_set_oti067(void *oti067)
-{
- acer_oti067 = oti067;
-}
void acer386sx_write(uint16_t addr, uint8_t val, void *priv)
{
if (addr & 1)
- {
- if (acer_locked)
- {
- if (acer_last_write == 0x14 && val == 0x09)
- acer_locked = 0;
-
- acer_last_write = val;
- return;
- }
-
- if (acer_index == 0xff && val == 0xff)
- acer_locked = 1;
- else
- {
- pclog("Write ACER reg %02x %02x %08x\n", acer_index, val, cs);
- acer_regs[acer_index] = val;
-
- switch (acer_index)
- {
- case 0xa:
- switch ((val >> 4) & 3)
- {
- case 0:
- mem_set_mem_state(0xe0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- break;
- case 1:
- mem_set_mem_state(0xe0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL);
- break;
- case 2:
- mem_set_mem_state(0xe0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
- break;
- case 3:
- mem_set_mem_state(0xe0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- break;
- }
- break;
- case 0xb:
- switch ((val >> 4) & 3)
- {
- case 0:
- mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- break;
- case 1:
- mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL);
- break;
- case 2:
- mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
- break;
- case 3:
- mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- break;
- }
- break;
- }
- }
- }
+ acer_regs[acer_index] = val;
else
- acer_index = val;
+ acer_index = val;
}
uint8_t acer386sx_read(uint16_t addr, void *priv)
{
- if (acer_locked)
- return 0xff;
if (addr & 1)
{
if ((acer_index >= 0xc0 || acer_index == 0x20) && cpu_iscyrix)
@@ -97,60 +27,7 @@ uint8_t acer386sx_read(uint16_t addr, void *priv)
return acer_index;
}
-static uint8_t acer386sx_37f = 0, acer386sx_io = 0;
-void acer386sx_io_write(uint16_t addr, uint8_t val, void *priv)
-{
- switch (addr)
- {
- case 0x37f:
- acer386sx_37f = val;
- if (val & 4)
- oti067_enable_disable(acer_oti067, 0);
- else
- oti067_enable_disable(acer_oti067, 1);
- break;
-
- case 0x3f3:
- acer386sx_io = val;
- serial1_remove();
- serial2_remove();
- lpt1_remove();
- lpt2_remove();
-
- switch (val & 3)
- {
- case 0: lpt1_init(0x378); break;
- case 1: lpt1_init(0x3bc); break;
- case 2: lpt1_init(0x278); break;
- }
- if (!(val & 0x04))
- serial1_set(0x3f8, 4);
- if (!(val & 0x08))
- serial2_set(0x2f8, 3);
- break;
- }
-}
-
-uint8_t acer386sx_io_read(uint16_t addr, void *priv)
-{
- switch (addr)
- {
- case 0x37f:
- return acer386sx_37f;
-
- case 0x3f3:
- return acer386sx_io;
- }
-
- return 0xff;
-}
-
void acer386sx_init()
{
io_sethandler(0x0022, 0x0002, acer386sx_read, NULL, NULL, acer386sx_write, NULL, NULL, NULL);
- io_sethandler(0x037f, 0x0001, acer386sx_io_read, NULL, NULL, acer386sx_io_write, NULL, NULL, NULL);
- io_sethandler(0x03f3, 0x0001, acer386sx_io_read, NULL, NULL, acer386sx_io_write, NULL, NULL, NULL);
-
- acer386sx_io = 0;
- acer386sx_37f = 0;
}
diff --git a/src/acer386sx.h b/src/acer386sx.h
index 3d91d5c..12d98f1 100644
--- a/src/acer386sx.h
+++ b/src/acer386sx.h
@@ -1,2 +1 @@
void acer386sx_init();
-void acer386sx_set_oti067(void *oti067);
diff --git a/src/ali1429.c b/src/ali1429.c
index 099a865..388ab48 100644
--- a/src/ali1429.c
+++ b/src/ali1429.c
@@ -55,6 +55,8 @@ void ali1429_write(uint16_t port, uint8_t val, void *priv)
ali1429_recalc();
break;
case 0x14:
+ shadowbios = val & 1;
+ shadowbios_write = val & 2;
ali1429_recalc();
break;
}
diff --git a/src/allegro-gui-config-sel.c b/src/allegro-gui-config-sel.c
new file mode 100644
index 0000000..5f2b7ff
--- /dev/null
+++ b/src/allegro-gui-config-sel.c
@@ -0,0 +1,265 @@
+#include "ibm.h"
+#include "device.h"
+#include "allegro-main.h"
+#include "allegro-gui.h"
+#include "config.h"
+#undef printf
+typedef struct config_t
+{
+ char name[512];
+ struct config_t *next;
+} config_t;
+
+static config_t *config_head;
+
+static char *get_config(int nr);
+static int get_config_nr();
+static void free_configs();
+static void populate_configs();
+
+static char *list_proc_joystick(int index, int *list_size)
+{
+ int c = 0;
+ config_t *config = config_head;
+
+ if (index < 0)
+ {
+ while (config)
+ {
+ c++;
+ config = config->next;
+ }
+
+ *list_size = c;
+ return NULL;
+ }
+
+ for (; c < index; c++)
+ {
+ if (!config)
+ return NULL;
+ config = config->next;
+ }
+
+ if (!config)
+ return NULL;
+
+ return config->name;
+// return joystick_list[index].name;
+}
+
+static char config_name[256];
+
+static DIALOG new_config_dialog[] =
+{
+ {d_shadow_box_proc, 0, 0, 480,80,0,0xffffff,0,0, 0,0,0,0,0}, // 0
+
+ {d_button_proc, 240-148, 56, 144, 16, 0, 0xffffff, 0, D_EXIT, 0, 0, "OK", 0, 0}, // 1
+ {d_button_proc, 240+4, 56, 144, 16, 0, 0xffffff, 0, D_EXIT, 0, 0, "Cancel", 0, 0}, // 2
+
+ {d_edit_proc, 8, 32, 464, 16, 0, 0xffffff, 0, 0, 255, 0, config_name, 0, 0}, // 3
+
+ {d_text_proc, 240-29*4, 16, 29*8, 16, 0, 0xffffff, 0, 0, 255, 0, "Please type new config name :", 0, 0},
+
+ {0,0,0,0,0,0,0,0,0,0,0,NULL,NULL,NULL}
+};
+
+static int new_proc(int msg, DIALOG *d, int c)
+{
+ int ret = d_button_proc(msg, d, c);
+
+ if (ret == D_CLOSE)
+ {
+ int c;
+
+ config_name[0] = 0;
+ new_config_dialog[3].d2 = 0;
+
+ position_dialog(new_config_dialog, SCREEN_W/2 - new_config_dialog[0].w/2, SCREEN_H/2 - new_config_dialog[0].h/2);
+
+ c = popup_dialog(new_config_dialog, 1);
+
+ position_dialog(new_config_dialog, -(SCREEN_W/2 - new_config_dialog[0].w/2), -(SCREEN_H/2 - new_config_dialog[0].h/2));
+
+ if (c == 1)
+ {
+ sprintf(config_file_default, "%sconfigs/%s.cfg", pcempath, config_name);
+ c = settings_configure();
+ free_configs();
+ populate_configs();
+ return c;
+ }
+
+ return D_O_K;
+ }
+
+ return ret;
+}
+
+static int config_proc(int msg, DIALOG *d, int c)
+{
+ int ret = d_button_proc(msg, d, c);
+
+ if (ret == D_CLOSE)
+ {
+ char *name = get_config(get_config_nr());
+
+ if (name)
+ {
+ sprintf(config_file_default, "%sconfigs/%s.cfg", pcempath, name);
+ loadconfig(NULL);
+ return settings_configure();
+ }
+
+ return D_O_K;
+ }
+
+ return ret;
+}
+
+static int hdd_proc(int msg, DIALOG *d, int c)
+{
+ int ret = d_button_proc(msg, d, c);
+
+ if (ret == D_CLOSE)
+ {
+ char *name = get_config(get_config_nr());
+
+ if (name)
+ {
+ sprintf(config_file_default, "%sconfigs/%s.cfg", pcempath, name);
+ loadconfig(NULL);
+ return disc_hdconf();
+ }
+
+ return D_O_K;
+ }
+
+ return ret;
+}
+
+static DIALOG config_sel_dialog[] =
+{
+ {d_shadow_box_proc, 0, 0, 568,372,0,0xffffff,0,0, 0,0,0,0,0}, // 0
+
+ {d_button_proc, 416, 8, 144, 16, 0, 0xffffff, 0, D_EXIT, 0, 0, "Load", 0, 0}, // 1
+ {d_button_proc, 416, 348, 144, 16, 0, 0xffffff, 0, D_EXIT, 0, 0, "Quit", 0, 0}, // 2
+
+ {new_proc, 416, 56, 144, 16, 0, 0xffffff, 0, D_EXIT, 0, 0, "New...", 0, 0}, // 3
+ {config_proc, 416, 80, 144, 16, 0, 0xffffff, 0, D_EXIT, 0, 0, "Configure...", 0, 0}, // 4
+ {hdd_proc, 416, 104, 144, 16, 0, 0xffffff, 0, D_EXIT, 0, 0, "HDD...", 0, 0}, // 5
+
+ {d_list_proc, 8, 8, 400, 356, 0, 0xffffff, 0, 0, 0, 0, list_proc_joystick, 0, 0}, // 6
+
+ {0,0,0,0,0,0,0,0,0,0,0,NULL,NULL,NULL}
+};
+
+static int get_config_nr()
+{
+ return config_sel_dialog[6].d1;
+}
+
+static void populate_configs()
+{
+ struct al_ffblk info;
+ char cfg[512];
+ config_t *config = NULL;
+
+ strcpy(cfg, pcempath);
+ strcat(cfg, "/configs/*.cfg");
+ printf("cfg %s\n", cfg);
+ if (al_findfirst(cfg, &info, FA_ALL))
+ return;
+
+ do
+ {
+ config_t *old_config = config;
+ char *ext;
+
+ config = malloc(sizeof(config_t));
+ if (old_config)
+ old_config->next = config;
+ else
+ config_head = config;
+ config->next = 0;
+ strcpy(config->name, info.name);
+
+ ext = get_extension(config->name);
+ if (ext && ext[0])
+ {
+ ext--;
+ *ext = 0;
+ }
+
+ printf("Found %s\n", info.name);
+ } while (al_findnext(&info) == 0);
+
+ al_findclose(&info);
+}
+
+static char *get_config(int nr)
+{
+ config_t *config = config_head;
+ int c;
+
+ for (c = 0; c < nr; c++)
+ {
+ if (!config)
+ return NULL;
+ config = config->next;
+ }
+ if (!config)
+ return NULL;
+
+ return config->name;
+}
+
+static void free_configs()
+{
+ config_t *config = config_head;
+
+ while (config)
+ {
+ config_t *old_config = config;
+
+ config = config->next;
+ free(old_config);
+ }
+}
+
+int config_sel()
+{
+ populate_configs();
+ set_gfx_mode(GFX_AUTODETECT_WINDOWED, 640, 480, 0, 0);
+ while (1)
+ {
+ int c;
+
+ position_dialog(config_sel_dialog, SCREEN_W/2 - config_sel_dialog[0].w/2, SCREEN_H/2 - config_sel_dialog[0].h/2);
+
+ c = popup_dialog(config_sel_dialog, 1);
+
+ position_dialog(config_sel_dialog, -(SCREEN_W/2 - config_sel_dialog[0].w/2), -(SCREEN_H/2 - config_sel_dialog[0].h/2));
+
+ if (c == 1)
+ {
+ char *name = get_config(config_sel_dialog[6].d1);
+
+ if (name)
+ {
+ sprintf(config_file_default, "%sconfigs/%s.cfg", pcempath, name);
+ pclog("config_file_default=%s\n", config_file_default);
+ free_configs();
+ return 0;
+ }
+ }
+
+ if (c == 2)
+ return 1;
+ }
+
+ free_configs();
+
+ return 1;
+}
+
diff --git a/src/allegro-gui-configure.c b/src/allegro-gui-configure.c
new file mode 100644
index 0000000..cdd16a3
--- /dev/null
+++ b/src/allegro-gui-configure.c
@@ -0,0 +1,837 @@
+#include "ibm.h"
+#include "device.h"
+#include "allegro-main.h"
+#include "allegro-gui.h"
+#include "cpu.h"
+#include "fdd.h"
+#include "gameport.h"
+#include "hdd.h"
+#include "mem.h"
+#include "model.h"
+#include "mouse.h"
+#include "sound.h"
+#include "video.h"
+#include "vid_voodoo.h"
+
+static int romstolist[ROM_MAX];
+static int settings_mouse_to_list[20], settings_list_to_mouse[20];
+
+typedef struct allegro_list_t
+{
+ char name[256];
+ int num;
+} allegro_list_t;
+
+typedef struct allegro_list_str_t
+{
+ char name[256];
+ char *internal_name;
+} allegro_list_str_t;
+
+static allegro_list_t model_list[ROM_MAX+1];
+static allegro_list_t video_list[GFX_MAX+1];
+static allegro_list_t sound_list[GFX_MAX+1];
+static allegro_list_t cpumanu_list[4];
+static allegro_list_t cpu_list[32];
+static allegro_list_t joystick_list[32];
+static allegro_list_t mouse_list[32];
+static allegro_list_str_t hdd_list[32];
+
+static char mem_size_str[10], mem_size_units[3];
+
+static allegro_list_t vidspeed_list[] =
+{
+ {"8-bit", 0},
+ {"Slow 16-bit", 1},
+ {"Fast 16-bit", 2},
+ {"Slow VLB/PCI", 3},
+ {"Mid VLB/PCI", 4},
+ {"Fast VLB/PCI", 5},
+ {"", -1}
+};
+
+static allegro_list_t fdd_list[] =
+{
+ {"None", 0},
+ {"5.25\" 360k", 1},
+ {"5.25\" 1.2M", 2},
+ {"5.25\" 1.2M Dual RPM", 3},
+ {"3.5\" 720k", 4},
+ {"3.5\" 1.44M", 5},
+ {"3.5\" 1.44M 3-Mode", 6},
+ {"3.5\" 2.88M", 7},
+ {"", -1}
+};
+
+static allegro_list_t waitstate_list[] =
+{
+ {"System default", 0},
+ {"0 W/S", 1},
+ {"1 W/S", 2},
+ {"2 W/S", 3},
+ {"3 W/S", 4},
+ {"4 W/S", 5},
+ {"5 W/S", 6},
+ {"6 W/S", 7},
+ {"7 W/S", 8},
+ {"", -1}
+};
+
+
+static void reset_list();
+
+static char *list_proc_model(int index, int *list_size)
+{
+ if (index < 0)
+ {
+ int c = 0;
+
+ while (model_list[c].name[0])
+ c++;
+
+ *list_size = c;
+ return NULL;
+ }
+
+ return model_list[index].name;
+}
+
+static char *list_proc_video(int index, int *list_size)
+{
+ if (index < 0)
+ {
+ int c = 0;
+
+ while (video_list[c].name[0])
+ c++;
+
+ *list_size = c;
+ return NULL;
+ }
+
+ return video_list[index].name;
+}
+
+static char *list_proc_vidspeed(int index, int *list_size)
+{
+ if (index < 0)
+ {
+ int c = 0;
+
+ while (vidspeed_list[c].name[0])
+ c++;
+
+ *list_size = c;
+ return NULL;
+ }
+
+ return vidspeed_list[index].name;
+}
+
+static char *list_proc_sound(int index, int *list_size)
+{
+ if (index < 0)
+ {
+ int c = 0;
+
+ while (sound_list[c].name[0])
+ c++;
+
+ *list_size = c;
+ return NULL;
+ }
+
+ return sound_list[index].name;
+}
+
+static char *list_proc_cpumanu(int index, int *list_size)
+{
+ if (index < 0)
+ {
+ int c = 0;
+
+ while (cpumanu_list[c].name[0])
+ c++;
+
+ *list_size = c;
+ return NULL;
+ }
+
+ return cpumanu_list[index].name;
+}
+
+static char *list_proc_cpu(int index, int *list_size)
+{
+ if (index < 0)
+ {
+ int c = 0;
+
+ while (cpu_list[c].name[0])
+ c++;
+
+ *list_size = c;
+ return NULL;
+ }
+
+ return cpu_list[index].name;
+}
+
+static char *list_proc_hdd(int index, int *list_size)
+{
+ if (index < 0)
+ {
+ int c = 0;
+
+ while (hdd_list[c].internal_name)
+ c++;
+
+ *list_size = c;
+ return NULL;
+ }
+
+ return hdd_list[index].name;
+}
+
+static char *list_proc_fdd(int index, int *list_size)
+{
+ if (index < 0)
+ {
+ int c = 0;
+
+ while (fdd_list[c].name[0])
+ c++;
+
+ *list_size = c;
+ return NULL;
+ }
+
+ return fdd_list[index].name;
+}
+
+static char *list_proc_joystick(int index, int *list_size)
+{
+ if (index < 0)
+ {
+ int c = 0;
+
+ while (joystick_list[c].name[0])
+ c++;
+
+ *list_size = c;
+ return NULL;
+ }
+
+ return joystick_list[index].name;
+}
+
+static char *list_proc_mouse(int index, int *list_size)
+{
+ if (index < 0)
+ {
+ int c = 0;
+
+ while (mouse_list[c].name[0])
+ c++;
+
+ *list_size = c;
+ return NULL;
+ }
+
+ return mouse_list[index].name;
+}
+
+static char *list_proc_ws(int index, int *list_size)
+{
+ if (index < 0)
+ {
+ int c = 0;
+
+ while (waitstate_list[c].name[0])
+ c++;
+
+ *list_size = c;
+ return NULL;
+ }
+
+ return waitstate_list[index].name;
+}
+
+static int voodoo_config_proc(int msg, DIALOG *d, int c)
+{
+ int ret = d_button_proc(msg, d, c);
+
+ if (ret == D_CLOSE)
+ {
+ deviceconfig_open(&voodoo_device);
+ return D_O_K;
+ }
+
+ return ret;
+}
+
+static int model_config_proc(int msg, DIALOG *d, int c);
+static int video_config_proc(int msg, DIALOG *d, int c);
+static int sound_config_proc(int msg, DIALOG *d, int c);
+static int list_proc(int msg, DIALOG *d, int c);
+
+static DIALOG configure_dialog[] =
+{
+ {d_shadow_box_proc, 0, 0, 568,372,0,0xffffff,0,0, 0,0,0,0,0}, // 0
+
+ {d_button_proc, 226, 348, 50, 16, 0, 0xffffff, 0, D_EXIT, 0, 0, "OK", 0, 0}, // 1
+ {d_button_proc, 296, 348, 50, 16, 0, 0xffffff, 0, D_EXIT, 0, 0, "Cancel", 0, 0}, // 2
+
+ {list_proc, 70*2, 12, 152*2, 20, 0, 0xffffff, 0, 0, 0, 0, list_proc_model, 0, 0},
+
+ {list_proc, 70*2, 32, 152*2, 20, 0, 0xffffff, 0, 0, 0, 0, list_proc_video, 0, 0},
+
+ {list_proc, 70*2, 52, 152*2, 20, 0, 0xffffff, 0, 0, 0, 0, list_proc_cpumanu, 0, 0}, //5
+ {list_proc, 70*2, 72, 152*2, 20, 0, 0xffffff, 0, 0, 0, 0, list_proc_cpu, 0, 0},
+ {d_list_proc, 70*2, 132, 152*2, 20, 0, 0xffffff, 0, 0, 0, 0, list_proc_vidspeed, 0, 0}, //7
+ {list_proc, 70*2, 152, 152*2, 20, 0, 0xffffff, 0, 0, 0, 0, list_proc_sound, 0, 0}, //8
+
+ {d_edit_proc, 70*2, 276, 32, 14, 0, 0xffffff, 0, 0, 3, 0, mem_size_str, 0, 0},
+
+ {d_text_proc, 98*2, 276, 40, 10, 0, 0xffffff, 0, 0, 0, 0, mem_size_units, 0, 0},
+
+ {d_check_proc, 14*2, 292, 118*2, 10, 0, 0xffffff, 0, 0, 0, 0, "CMS / Game Blaster", 0, 0},
+ {d_check_proc, 14*2, 308, 118*2, 10, 0, 0xffffff, 0, 0, 0, 0, "Gravis Ultrasound", 0, 0},
+ {d_check_proc, 14*2, 324, 118*2, 10, 0, 0xffffff, 0, 0, 0, 0, "Innovation SSI-2001", 0, 0},
+ {d_check_proc, 14*2, 336, 118*2, 10, 0, 0xffffff, 0, 0, 0, 0, "Voodoo Graphics", 0, 0}, //14
+
+ {d_text_proc, 16*2, 16, 40, 10, 0, 0xffffff, 0, 0, 0, 0, "Machine :", 0, 0},
+ {d_text_proc, 16*2, 36, 40, 10, 0, 0xffffff, 0, 0, 0, 0, "Video :", 0, 0},
+ {d_text_proc, 16*2, 56, 40, 10, 0, 0xffffff, 0, 0, 0, 0, "CPU type :", 0, 0},
+ {d_text_proc, 16*2, 76, 40, 10, 0, 0xffffff, 0, 0, 0, 0, "CPU :", 0, 0},
+ {d_text_proc, 16*2, 136, 40, 10, 0, 0xffffff, 0, 0, 0, 0, "Video speed :", 0, 0},
+ {d_text_proc, 16*2, 156, 40, 10, 0, 0xffffff, 0, 0, 0, 0, "Soundcard :", 0, 0},
+ {d_text_proc, 16*2, 276, 40, 10, 0, 0xffffff, 0, 0, 0, 0, "Memory :", 0, 0},
+
+ {d_check_proc, 14*2, 92, 118*2, 10, 0, 0xffffff, 0, 0, 0, 0, "Dynamic Recompiler", 0, 0},
+
+ {d_text_proc, 16*2, 196, 40, 10, 0, 0xffffff, 0, 0, 0, 0, "Drive A: :", 0, 0},
+ {d_text_proc, 16*2, 216, 40, 10, 0, 0xffffff, 0, 0, 0, 0, "Drive B: :", 0, 0},
+ {d_list_proc, 70*2, 192, 152*2, 20, 0, 0xffffff, 0, 0, 0, 0, list_proc_fdd, 0, 0}, //25
+ {d_list_proc, 70*2, 212, 152*2, 20, 0, 0xffffff, 0, 0, 0, 0, list_proc_fdd, 0, 0},
+
+ {video_config_proc, 452, 36, 100, 14, 0, 0xffffff, 0, D_EXIT, 0, 0, "Configure...", 0, 0}, //27
+ {sound_config_proc, 452, 156, 100, 14, 0, 0xffffff, 0, D_EXIT, 0, 0, "Configure...", 0, 0},
+ {voodoo_config_proc, 452, 336, 100, 14, 0, 0xffffff, 0, D_EXIT, 0, 0, "Configure...", 0, 0},
+
+ {d_text_proc, 16*2, 236, 40, 10, 0, 0xffffff, 0, 0, 0, 0, "Joystick :", 0, 0},
+ {d_list_proc, 70*2, 232, 152*2, 20, 0, 0xffffff, 0, 0, 0, 0, list_proc_joystick, 0, 0}, //31
+
+ {d_text_proc, 16*2, 256, 40, 10, 0, 0xffffff, 0, 0, 0, 0, "Mouse :", 0, 0},
+ {d_list_proc, 70*2, 252, 152*2, 20, 0, 0xffffff, 0, 0, 0, 0, list_proc_mouse, 0, 0}, //33
+
+ {model_config_proc, 452, 12, 100, 14, 0, 0xffffff, 0, D_EXIT, 0, 0, "Configure...", 0, 0},
+
+ {d_text_proc, 16*2, 116, 40, 10, 0, 0xffffff, 0, 0, 0, 0, "Waitstates :", 0, 0},
+ {d_list_proc, 70*2, 112, 152*2, 20, 0, 0xffffff, 0, 0, 0, 0, list_proc_ws, 0, 0}, //36
+
+ {d_text_proc, 16*2, 176, 40, 10, 0, 0xffffff, 0, 0, 0, 0, "HDD :", 0, 0},
+ {d_list_proc, 70*2, 172, 152*2, 20, 0, 0xffffff, 0, 0, 0, 0, list_proc_hdd, 0, 0}, //38
+
+ {0,0,0,0,0,0,0,0,0,0,0,NULL,NULL,NULL}
+};
+
+static void update_hdd_list(int model, int use_selected_hdd)
+{
+ memset(hdd_list, 0, sizeof(hdd_list));
+
+ if (models[model].flags & MODEL_HAS_IDE)
+ {
+ strcpy(hdd_list[0].name, "Internal IDE");
+ hdd_list[0].internal_name = "internal_ide";
+ }
+ else
+ {
+ int c = 0, d = 0;
+ char old_name[16];
+
+ if (use_selected_hdd)
+ {
+ c = configure_dialog[38].d1;
+
+ if (c != -1 && hdd_list[c].internal_name)
+ strncpy(old_name, hdd_list[c].internal_name, sizeof(old_name)-1);
+ else
+ strcpy(old_name, "none");
+ }
+ else
+ strncpy(old_name, hdd_controller_name, sizeof(old_name)-1);
+
+ configure_dialog[38].d1 = 0;
+ pclog("HDD list %i\n", model);
+ c = 0;
+ while (1)
+ {
+ char *s = hdd_controller_get_name(c);
+
+ if (s[0] == 0)
+ break;
+
+ if ((((hdd_controller_get_flags(c) & DEVICE_AT) && !(models[model].flags & MODEL_AT)) ||
+ (hdd_controller_get_flags(c) & DEVICE_MCA) != (models[model].flags & MODEL_MCA)) && c)
+ {
+ pclog("Skip %i 1 %s\n", c, s);
+ c++;
+ continue;
+ }
+ if (!hdd_controller_available(c))
+ {
+ pclog("Skip %i 2 %s\n", c, s);
+ c++;
+ continue;
+ }
+
+ strcpy(hdd_list[d].name, s);
+ hdd_list[d].internal_name = hdd_controller_get_internal_name(c);
+
+ if (!strcmp(old_name, hdd_list[d].internal_name))
+ configure_dialog[38].d1 = d;
+
+ c++;
+ d++;
+ }
+ }
+}
+
+static int mouse_valid(int type, int model)
+{
+ if ((type & MOUSE_TYPE_IF_MASK) == MOUSE_TYPE_PS2 && !(models[model].flags & MODEL_PS2))
+ return 0;
+ if ((type & MOUSE_TYPE_IF_MASK) == MOUSE_TYPE_AMSTRAD && !(models[model].flags & MODEL_AMSTRAD))
+ return 0;
+ if ((type & MOUSE_TYPE_IF_MASK) == MOUSE_TYPE_OLIM24 && !(models[model].flags & MODEL_OLIM24))
+ return 0;
+ return 1;
+}
+
+static void update_mouse_list()
+{
+ int sel_model = model_list[configure_dialog[3].d1].num;
+ int c = 0, d = 0;
+ int new_mouse = settings_list_to_mouse[configure_dialog[33].d1];
+
+ while (mouse_get_name(c))
+ {
+ int type = mouse_get_type(c);
+
+ settings_mouse_to_list[c] = d;
+
+ if (mouse_valid(type, sel_model))
+ {
+ strcpy(mouse_list[d].name, mouse_get_name(c));
+ settings_list_to_mouse[d] = c;
+ d++;
+ }
+
+ c++;
+ }
+ mouse_list[d].name[0] = 0;
+
+ if (mouse_valid(mouse_get_type(new_mouse), sel_model))
+ configure_dialog[33].d1 = settings_mouse_to_list[new_mouse];
+ else
+ configure_dialog[33].d1 = 0;
+}
+
+static int list_proc(int msg, DIALOG *d, int c)
+{
+ int old = d->d1;
+ int ret = d_list_proc(msg, d, c);
+
+ if (d->d1 != old)
+ {
+ int new_model = model_list[configure_dialog[3].d1].num;
+ int new_cpu_m = configure_dialog[5].d1;
+ int new_cpu = configure_dialog[6].d1;
+ int new_dynarec = configure_dialog[22].flags & D_SELECTED;
+ int new_gfxcard = video_old_to_new(video_list[configure_dialog[4].d1].num);
+ int new_mem_size;
+ int cpu_flags, cpu_type;
+
+ reset_list();
+
+ if (models[new_model].fixed_gfxcard)
+ configure_dialog[4].flags |= D_DISABLED;
+ else
+ configure_dialog[4].flags &= ~D_DISABLED;
+
+ cpu_flags = models[new_model].cpu[new_cpu_m].cpus[new_cpu].cpu_flags;
+ configure_dialog[22].flags = (((cpu_flags & CPU_SUPPORTS_DYNAREC) && new_dynarec) || (cpu_flags & CPU_REQUIRES_DYNAREC)) ? D_SELECTED : 0;
+ if (!(cpu_flags & CPU_SUPPORTS_DYNAREC) || (cpu_flags & CPU_REQUIRES_DYNAREC))
+ configure_dialog[22].flags |= D_DISABLED;
+
+ sscanf(mem_size_str, "%i", &new_mem_size);
+ new_mem_size &= ~(models[new_model].ram_granularity - 1);
+ if (new_mem_size < models[new_model].min_ram)
+ new_mem_size = models[new_model].min_ram;
+ else if (new_mem_size > models[new_model].max_ram)
+ new_mem_size = models[new_model].max_ram;
+ sprintf(mem_size_str, "%i", new_mem_size);
+
+ if (models[new_model].flags & MODEL_AT)
+ sprintf(mem_size_units, "MB");
+ else
+ sprintf(mem_size_units, "kB");
+
+ if (!video_card_has_config(new_gfxcard))
+ configure_dialog[27].flags |= D_DISABLED;
+ else
+ configure_dialog[27].flags &= ~D_DISABLED;
+
+ if (!sound_card_has_config(configure_dialog[9].d1))
+ configure_dialog[28].flags |= D_DISABLED;
+ else
+ configure_dialog[28].flags &= ~D_DISABLED;
+
+ update_mouse_list();
+
+ if (!model_getdevice(new_model))
+ configure_dialog[34].flags |= D_DISABLED;
+ else
+ configure_dialog[34].flags &= ~D_DISABLED;
+
+ cpu_type = models[new_model].cpu[new_cpu_m].cpus[new_cpu].cpu_type;
+ if (cpu_type < CPU_286 || cpu_type > CPU_386DX)
+ configure_dialog[36].flags |= D_DISABLED;
+ else
+ configure_dialog[36].flags &= ~D_DISABLED;
+
+ update_hdd_list(new_model, 1);
+
+ return D_REDRAW;
+ }
+
+ return ret;
+}
+
+static int video_config_proc(int msg, DIALOG *d, int c)
+{
+ int ret = d_button_proc(msg, d, c);
+
+ if (ret == D_CLOSE)
+ {
+ int new_gfxcard = video_old_to_new(video_list[configure_dialog[4].d1].num);
+
+ deviceconfig_open(video_card_getdevice(new_gfxcard));
+ return D_O_K;
+ }
+
+ return ret;
+}
+static int sound_config_proc(int msg, DIALOG *d, int c)
+{
+ int ret = d_button_proc(msg, d, c);
+
+ if (ret == D_CLOSE)
+ {
+ int new_sndcard = sound_list[configure_dialog[8].d1].num;
+
+ deviceconfig_open(sound_card_getdevice(new_sndcard));
+ return D_O_K;
+ }
+
+ return ret;
+}
+static int model_config_proc(int msg, DIALOG *d, int c)
+{
+ int ret = d_button_proc(msg, d, c);
+
+ if (ret == D_CLOSE)
+ {
+ int model = model_list[configure_dialog[3].d1].num;
+
+ deviceconfig_open(model_getdevice(model));
+ return D_O_K;
+ }
+
+ return ret;
+}
+
+
+static void reset_list()
+{
+ int model = model_list[configure_dialog[3].d1].num;
+ int cpumanu = configure_dialog[5].d1;
+ int cpu = configure_dialog[6].d1;
+ int c;
+
+ memset(cpumanu_list, 0, sizeof(cpumanu_list));
+ memset(cpu_list, 0, sizeof(cpu_list));
+
+ c = 0;
+ while (models[model].cpu[c].cpus != NULL && c < 3)
+ {
+ strcpy(cpumanu_list[c].name, models[model].cpu[c].name);
+ cpumanu_list[c].num = c;
+ c++;
+ }
+
+ if (cpumanu >= c)
+ cpumanu = configure_dialog[6].d1 = c-1;
+
+ c = 0;
+ while (models[model].cpu[cpumanu].cpus[c].cpu_type != -1)
+ {
+ strcpy(cpu_list[c].name, models[model].cpu[cpumanu].cpus[c].name);
+ cpu_list[c].num = c;
+ c++;
+ }
+
+ if (cpu >= c)
+ cpu = configure_dialog[7].d1 = c-1;
+}
+
+int settings_configure()
+{
+ int c, d;
+ int cpu_flags;
+
+ memset(model_list, 0, sizeof(model_list));
+ memset(video_list, 0, sizeof(video_list));
+ memset(sound_list, 0, sizeof(sound_list));
+
+ for (c = 0; c < ROM_MAX; c++)
+ romstolist[c] = 0;
+ c = d = 0;
+ while (models[c].id != -1)
+ {
+ pclog("INITDIALOG : %i %i %i\n",c,models[c].id,romspresent[models[c].id]);
+ if (romspresent[models[c].id])
+ {
+ strcpy(model_list[d].name, models[c].name);
+ model_list[d].num = c;
+ if (c == model)
+ configure_dialog[3].d1 = d;
+ d++;
+ }
+ c++;
+ }
+
+ if (models[model].fixed_gfxcard)
+ configure_dialog[4].flags |= D_DISABLED;
+ else
+ configure_dialog[4].flags &= ~D_DISABLED;
+
+ c = d = 0;
+ while (1)
+ {
+ char *s = video_card_getname(c);
+
+ if (!s[0])
+ break;
+pclog("video_card_available : %i\n", c);
+ if (video_card_available(c))
+ {
+ strcpy(video_list[d].name, video_card_getname(c));
+ video_list[d].num = video_new_to_old(c);
+ if (video_new_to_old(c) == gfxcard)
+ configure_dialog[4].d1 = d;
+ d++;
+ }
+
+ c++;
+ }
+
+ if (!video_card_has_config(video_old_to_new(gfxcard)))
+ configure_dialog[27].flags |= D_DISABLED;
+ else
+ configure_dialog[27].flags &= ~D_DISABLED;
+
+ c = d = 0;
+ while (1)
+ {
+ char *s = sound_card_getname(c);
+
+ if (!s[0])
+ break;
+
+ if (sound_card_available(c))
+ {
+ strcpy(sound_list[d].name, sound_card_getname(c));
+ sound_list[d].num = c;
+ if (c == sound_card_current)
+ configure_dialog[8].d1 = d;
+ d++;
+ }
+
+ c++;
+ }
+
+ c = 0;
+ while (joystick_get_name(c))
+ {
+ strcpy(joystick_list[c].name, joystick_get_name(c));
+ if (c == joystick_type)
+ configure_dialog[31].d1 = c;
+
+ c++;
+ }
+
+ configure_dialog[33].d1 = 0;
+ update_mouse_list();
+ configure_dialog[33].d1 = settings_mouse_to_list[mouse_type];
+
+ update_hdd_list(model, 0);
+
+ if (!sound_card_has_config(configure_dialog[8].d1))
+ configure_dialog[28].flags |= D_DISABLED;
+ else
+ configure_dialog[28].flags &= ~D_DISABLED;
+
+ configure_dialog[5].d1 = cpu_manufacturer;
+ configure_dialog[6].d1 = cpu;
+ configure_dialog[7].d1 = video_speed;
+ configure_dialog[36].d1 = cpu_waitstates;
+ reset_list();
+// strcpy(cpumanu_str, models[romstomodel[romset]].cpu[cpu_manufacturer].name);
+// strcpy(cpu_str, models[romstomodel[romset]].cpu[cpu_manufacturer].cpus[cpu].name);
+// strcpy(cache_str, cache_str_list[cache]);
+// strcpy(vidspeed_str, vidspeed_str_list[video_speed]);
+
+// strcpy(soundcard_str, sound_card_getname(sound_card_current));
+
+ if (GAMEBLASTER)
+ configure_dialog[11].flags |= D_SELECTED;
+ else
+ configure_dialog[11].flags &= ~D_SELECTED;
+
+ if (GUS)
+ configure_dialog[12].flags |= D_SELECTED;
+ else
+ configure_dialog[12].flags &= ~D_SELECTED;
+
+ if (SSI2001)
+ configure_dialog[13].flags |= D_SELECTED;
+ else
+ configure_dialog[13].flags &= ~D_SELECTED;
+
+ if (voodoo_enabled)
+ configure_dialog[14].flags |= D_SELECTED;
+ else
+ configure_dialog[14].flags &= ~D_SELECTED;
+
+ if (models[model].flags & MODEL_AT)
+ sprintf(mem_size_str, "%i", mem_size / 1024);
+ else
+ sprintf(mem_size_str, "%i", mem_size);
+
+ if (models[model].flags & MODEL_AT)
+ sprintf(mem_size_units, "MB");
+ else
+ sprintf(mem_size_units, "kB");
+
+ if (!model_getdevice(model))
+ configure_dialog[34].flags |= D_DISABLED;
+ else
+ configure_dialog[34].flags &= ~D_DISABLED;
+
+ cpu_flags = models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_flags;
+ configure_dialog[22].flags = (((cpu_flags & CPU_SUPPORTS_DYNAREC) && cpu_use_dynarec) || (cpu_flags & CPU_REQUIRES_DYNAREC)) ? D_SELECTED : 0;
+ if (!(cpu_flags & CPU_SUPPORTS_DYNAREC) || (cpu_flags & CPU_REQUIRES_DYNAREC))
+ configure_dialog[22].flags |= D_DISABLED;
+
+ configure_dialog[25].d1 = fdd_get_type(0);
+ configure_dialog[26].d1 = fdd_get_type(1);
+
+ while (1)
+ {
+ position_dialog(configure_dialog, SCREEN_W/2 - configure_dialog[0].w/2, SCREEN_H/2 - configure_dialog[0].h/2);
+
+ c = popup_dialog(configure_dialog, 1);
+
+ position_dialog(configure_dialog, -(SCREEN_W/2 - configure_dialog[0].w/2), -(SCREEN_H/2 - configure_dialog[0].h/2));
+
+ if (c == 1)
+ {
+ int new_model = model_list[configure_dialog[3].d1].num;
+ int new_gfxcard = video_list[configure_dialog[4].d1].num;
+ int new_sndcard = sound_list[configure_dialog[8].d1].num;
+ int new_cpu_m = configure_dialog[5].d1;
+ int new_cpu = configure_dialog[6].d1;
+ int new_mem_size;
+ int new_has_fpu = (models[new_model].cpu[new_cpu_m].cpus[new_cpu].cpu_type >= CPU_i486DX) ? 1 : 0;
+ int new_GAMEBLASTER = (configure_dialog[11].flags & D_SELECTED) ? 1 : 0;
+ int new_GUS = (configure_dialog[12].flags & D_SELECTED) ? 1 : 0;
+ int new_SSI2001 = (configure_dialog[13].flags & D_SELECTED) ? 1 : 0;
+ int new_voodoo = (configure_dialog[14].flags & D_SELECTED) ? 1 : 0;
+ int new_dynarec = (configure_dialog[22].flags & D_SELECTED) ? 1 : 0;
+ int new_fda = configure_dialog[25].d1;
+ int new_fdb = configure_dialog[26].d1;
+ int new_mouse = settings_list_to_mouse[configure_dialog[33].d1];
+ int new_hdd = configure_dialog[38].d1;
+
+ sscanf(mem_size_str, "%i", &new_mem_size);
+ new_mem_size &= ~(models[new_model].ram_granularity - 1);
+ if (new_mem_size < models[new_model].min_ram)
+ new_mem_size = models[new_model].min_ram;
+ else if (new_mem_size > models[new_model].max_ram)
+ new_mem_size = models[new_model].max_ram;
+ if (models[new_model].flags & MODEL_AT)
+ new_mem_size *= 1024;
+
+ if (new_model != model || new_gfxcard != gfxcard || new_mem_size != mem_size ||
+ new_has_fpu != hasfpu || new_GAMEBLASTER != GAMEBLASTER || new_GUS != GUS ||
+ new_SSI2001 != SSI2001 || new_sndcard != sound_card_current || new_voodoo != voodoo_enabled ||
+ new_dynarec != cpu_use_dynarec || new_fda != fdd_get_type(0) || new_fdb != fdd_get_type(1) ||
+ new_mouse != mouse_type || strncmp(hdd_list[new_hdd].internal_name, hdd_controller_name, sizeof(hdd_controller_name)-1))
+ {
+ if (has_been_inited && alert("This will reset PCem!", "Okay to continue?", NULL, "OK", "Cancel", 0, 0) != 1)
+ continue;
+
+ model = new_model;
+ romset = model_getromset();
+ gfxcard = new_gfxcard;
+ mem_size = new_mem_size;
+ cpu_manufacturer = new_cpu_m;
+ cpu = new_cpu;
+ GAMEBLASTER = new_GAMEBLASTER;
+ GUS = new_GUS;
+ SSI2001 = new_SSI2001;
+ sound_card_current = new_sndcard;
+ voodoo_enabled = new_voodoo;
+ cpu_use_dynarec = new_dynarec;
+ mouse_type = new_mouse;
+
+ if (hdd_list[new_hdd].internal_name)
+ strncpy(hdd_controller_name, hdd_list[new_hdd].internal_name, sizeof(hdd_controller_name)-1);
+ else
+ strcpy(hdd_controller_name, "none");
+
+ mem_resize();
+ loadbios();
+ resetpchard();
+
+ fdd_set_type(0, new_fda);
+ fdd_set_type(1, new_fdb);
+ }
+
+ video_speed = configure_dialog[7].d1;
+
+ cpu_manufacturer = new_cpu_m;
+ cpu = new_cpu;
+ cpu_set();
+
+ cpu_waitstates = configure_dialog[36].d1;
+ cpu_update_waitstates();
+
+ joystick_type = configure_dialog[31].d1;
+ gameport_update_joystick_type();
+
+ saveconfig(NULL);
+
+ speedchanged();
+
+ return D_O_K;
+ }
+
+ if (c == 2)
+ return D_O_K;
+ }
+
+ return D_O_K;
+}
+
diff --git a/src/allegro-gui-deviceconfig.c b/src/allegro-gui-deviceconfig.c
new file mode 100644
index 0000000..3899ce9
--- /dev/null
+++ b/src/allegro-gui-deviceconfig.c
@@ -0,0 +1,303 @@
+#include "ibm.h"
+#include "device.h"
+#include "allegro-main.h"
+#include "allegro-gui.h"
+#include "config.h"
+
+static device_t *config_device;
+
+#define MAX_CONFIG_SIZE 64
+#define MAX_CONFIG_SELECTIONS 8
+
+static device_config_selection_t *config_selections[MAX_CONFIG_SELECTIONS];
+
+#define list_proc_device_func(i) \
+ static char *list_proc_device_ ## i(int index, int *list_size) \
+ { \
+ device_config_selection_t *config = config_selections[i]; \
+ \
+ if (index < 0) \
+ { \
+ int c = 0; \
+ \
+ while (config[c].description[0]) \
+ c++; \
+ \
+ *list_size = c; \
+ return NULL; \
+ } \
+ \
+ return config[index].description; \
+ }
+
+list_proc_device_func(0)
+list_proc_device_func(1)
+list_proc_device_func(2)
+list_proc_device_func(3)
+list_proc_device_func(4)
+list_proc_device_func(5)
+list_proc_device_func(6)
+list_proc_device_func(7)
+
+static DIALOG deviceconfig_dialog[MAX_CONFIG_SIZE] =
+{
+ {d_shadow_box_proc, 0, 0, 568,332,0,0xffffff,0,0, 0,0,0,0,0} // 0
+};
+
+void deviceconfig_open(device_t *device)
+{
+ DIALOG *d;
+ device_config_t *config = device->config;
+ int y = 10;
+ int dialog_pos = 1;
+ int list_pos = 0;
+ int c;
+ int id_ok, id_cancel;
+
+ memset((void *)((uintptr_t)deviceconfig_dialog) + sizeof(DIALOG), 0, sizeof(deviceconfig_dialog) - sizeof(DIALOG));
+ deviceconfig_dialog[0].x = deviceconfig_dialog[0].y = 0;
+
+ while (config->type != -1)
+ {
+ d = &deviceconfig_dialog[dialog_pos];
+
+ switch (config->type)
+ {
+ case CONFIG_BINARY:
+ d->x = 32;
+ d->y = y;
+
+ d->w = 118*2;
+ d->h = 15;
+
+ d->dp = config->description;
+ d->proc = d_check_proc;
+
+ d->flags = config_get_int(CFG_MACHINE, device->name, config->name, config->default_int) ? D_SELECTED : 0;
+ d->bg = 0xffffff;
+ d->fg = 0;
+
+ dialog_pos++;
+
+ y += 20;
+ break;
+
+ case CONFIG_SELECTION:
+ if (list_pos >= MAX_CONFIG_SELECTIONS)
+ break;
+
+ d->x = 32;
+ d->y = y;
+
+ d->w = 80;
+ d->h = 15;
+
+ d->dp = config->description;
+ d->proc = d_text_proc;
+
+ d->flags = 0;
+ d->bg = 0xffffff;
+ d->fg = 0;
+
+ d++;
+
+ d->x = 250;
+ d->y = y;
+
+ d->w = 304;
+ d->h = 20;
+
+ switch (list_pos)
+ {
+ case 0 : d->dp = list_proc_device_0; break;
+ case 1 : d->dp = list_proc_device_1; break;
+ case 2 : d->dp = list_proc_device_2; break;
+ case 3 : d->dp = list_proc_device_3; break;
+ case 4 : d->dp = list_proc_device_4; break;
+ case 5 : d->dp = list_proc_device_5; break;
+ case 6 : d->dp = list_proc_device_6; break;
+ case 7 : d->dp = list_proc_device_7; break;
+ }
+ d->proc = d_list_proc;
+
+ d->flags = 0;
+ d->bg = 0xffffff;
+ d->fg = 0;
+
+ config_selections[list_pos++] = config->selection;
+
+ c = 0;
+ while (config->selection[c].description[0])
+ {
+ if (config_get_int(CFG_MACHINE, device->name, config->name, config->default_int) == config->selection[c].value)
+ d->d1 = c;
+ c++;
+ }
+
+ dialog_pos += 2;
+
+ y += 20;
+ break;
+
+ case CONFIG_MIDI:
+ break;
+ }
+
+ config++;
+
+ if (dialog_pos >= MAX_CONFIG_SIZE-3)
+ break;
+ }
+
+ d = &deviceconfig_dialog[dialog_pos];
+
+ id_ok = dialog_pos;
+ id_cancel = dialog_pos + 1;
+
+ d->x = 226;
+ d->y = y+8;
+
+ d->w = 50;
+ d->h = 16;
+
+ d->dp = "OK";
+ d->proc = d_button_proc;
+
+ d->flags = D_EXIT;
+ d->bg = 0xffffff;
+ d->fg = 0;
+
+ d++;
+
+ d->x = 296;
+ d->y = y+8;
+
+ d->w = 50;
+ d->h = 16;
+
+ d->dp = "Cancel";
+ d->proc = d_button_proc;
+
+ d->flags = D_EXIT;
+ d->bg = 0xffffff;
+ d->fg = 0;
+
+ deviceconfig_dialog[0].h = y + 28;
+
+ config_device = device;
+
+ while (1)
+ {
+ position_dialog(deviceconfig_dialog, SCREEN_W/2 - deviceconfig_dialog[0].w/2, SCREEN_H/2 - deviceconfig_dialog[0].h/2);
+
+ c = popup_dialog(deviceconfig_dialog, 1);
+
+ position_dialog(deviceconfig_dialog, -(SCREEN_W/2 - deviceconfig_dialog[0].w/2), -(SCREEN_H/2 - deviceconfig_dialog[0].h/2));
+
+ if (c == id_ok)
+ {
+ int changed = 0;
+
+ dialog_pos = 1;
+ config = device->config;
+
+ while (config->type != -1)
+ {
+ int val;
+
+ d = &deviceconfig_dialog[dialog_pos];
+
+ switch (config->type)
+ {
+ case CONFIG_BINARY:
+ val = (d->flags & D_SELECTED) ? 1 : 0;
+
+ if (val != config_get_int(CFG_MACHINE, device->name, config->name, config->default_int))
+ changed = 1;
+
+ dialog_pos++;
+ break;
+
+ case CONFIG_SELECTION:
+ if (list_pos >= MAX_CONFIG_SELECTIONS)
+ break;
+
+ d++;
+
+ val = config->selection[d->d1].value;
+
+ if (val != config_get_int(CFG_MACHINE, device->name, config->name, config->default_int))
+ changed = 1;
+
+ dialog_pos += 2;
+ break;
+
+ case CONFIG_MIDI:
+ break;
+ }
+
+ config++;
+
+ if (dialog_pos >= MAX_CONFIG_SIZE-3)
+ break;
+ }
+
+ if (!changed)
+ return;
+
+ if (alert("This will reset PCem!", "Okay to continue?", NULL, "OK", "Cancel", 0, 0) != 1)
+ continue;
+
+ dialog_pos = 1;
+ config = device->config;
+
+ while (config->type != -1)
+ {
+ int val;
+
+ d = &deviceconfig_dialog[dialog_pos];
+
+ switch (config->type)
+ {
+ case CONFIG_BINARY:
+ val = (d->flags & D_SELECTED) ? 1 : 0;
+
+ config_set_int(CFG_MACHINE, config_device->name, config->name, val);
+
+ dialog_pos++;
+ break;
+
+ case CONFIG_SELECTION:
+ if (list_pos >= MAX_CONFIG_SELECTIONS)
+ break;
+
+ d++;
+
+ val = config->selection[d->d1].value;
+
+ config_set_int(CFG_MACHINE, config_device->name, config->name, val);
+
+ dialog_pos += 2;
+ break;
+
+ case CONFIG_MIDI:
+ break;
+ }
+
+ config++;
+
+ if (dialog_pos >= MAX_CONFIG_SIZE-3)
+ break;
+ }
+
+ saveconfig(NULL);
+
+ resetpchard();
+
+ return;
+ }
+
+ if (c == id_cancel)
+ break;
+ }
+}
diff --git a/src/allegro-gui-hdconf.c b/src/allegro-gui-hdconf.c
new file mode 100644
index 0000000..493c3ff
--- /dev/null
+++ b/src/allegro-gui-hdconf.c
@@ -0,0 +1,536 @@
+#define _LARGEFILE_SOURCE
+#define _LARGEFILE64_SOURCE
+#define _GNU_SOURCE
+
+#include
+#include "ibm.h"
+#include "device.h"
+#include "ide.h"
+#include "allegro-main.h"
+#include "allegro-gui.h"
+
+static char hd_path[4][260];
+static char hd_sectors[4][10];
+static char hd_heads[4][10];
+static char hd_cylinders[4][10];
+static char hd_size[4][20];
+
+static char hd_path_new[260];
+static char hd_sectors_new[10];
+static char hd_heads_new[10];
+static char hd_cylinders_new[10];
+static char hd_size_new[20];
+
+static int new_cdrom_channel;
+
+static PcemHDC hdc_new[4];
+
+static DIALOG hdparams_dialog[]=
+{
+ {d_shadow_box_proc, 0, 0, 194*2,86,0,0xffffff,0,0, 0,0,0,0,0}, // 0
+
+ {d_button_proc, 126, 66, 50, 14, 0, 0xffffff, 0, D_EXIT, 0, 0, "OK", 0, 0}, // 1
+ {d_button_proc, 196, 66, 50, 16, 0, 0xffffff, 0, D_EXIT, 0, 0, "Cancel", 0, 0}, // 2
+
+ {d_text_proc, 7*2, 6, 170, 10, 0, 0xffffff, 0, 0, 0, 0, "Initial settings are based on file size", 0, 0},
+
+ {d_text_proc, 7*2, 22, 27, 10, 0, 0xffffff, 0, 0, 0, 0, "Sectors:", 0, 0},
+ {d_text_proc, 63*2, 22, 29, 8, 0, 0xffffff, 0, 0, 0, 0, "Heads:", 0, 0},
+ {d_text_proc, 120*2, 22, 28, 12, 0, 0xffffff, 0, 0, 0, 0, "Cylinders:", 0, 0},
+ {d_edit_proc, 44*2, 22, 16*2, 12, 0, 0xffffff, 0, 0, 2, 0, hd_sectors_new, 0, 0},
+ {d_edit_proc, 92*2, 22, 16*2, 12, 0, 0xffffff, 0, 0, 3, 0, hd_heads_new, 0, 0},
+ {d_edit_proc, 168*2, 22, 24*2, 12, 0, 0xffffff, 0, 0, 5, 0, hd_cylinders_new, 0, 0},
+ {d_text_proc, 7*2, 54, 136, 12, 0, 0xffffff, 0, 0, 0, 0, hd_size_new, 0, 0},
+
+ {0,0,0,0,0,0,0,0,0,0,0,NULL,NULL,NULL}
+};
+
+static int hdconf_open(int msg, DIALOG *d, int c)
+{
+ int drv = d->d2;
+ int ret = d_button_proc(msg, d, c);
+
+ if (ret == D_EXIT)
+ {
+ char fn[260];
+ int xsize = SCREEN_W - 32, ysize = SCREEN_H - 64;
+
+ strcpy(fn, hd_path[drv]);
+ ret = file_select_ex("Please choose a disc image", fn, "IMG", 260, xsize, ysize);
+ if (ret)
+ {
+ uint64_t sz;
+ FILE *f = fopen64(fn, "rb");
+ if (!f)
+ {
+ return D_REDRAW;
+ }
+ fseeko64(f, -1, SEEK_END);
+ sz = ftello64(f) + 1;
+ fclose(f);
+ if ((sz % 17) == 0 && sz <= 133693440)
+ {
+ sprintf(hd_sectors_new, "17");
+ if (sz <= 26738688)
+ {
+ sprintf(hd_heads_new, "4");
+ sprintf(hd_cylinders_new, "%i", (int)((sz / 512) / 4) / 17);
+ }
+ else if (sz <= 53477376)
+ {
+ sprintf(hd_heads_new, "6");
+ sprintf(hd_cylinders_new, "%i", (int)((sz / 512) / 6) / 17);
+ }
+ else if (sz <= 71303168)
+ {
+ sprintf(hd_heads_new, "8");
+ sprintf(hd_cylinders_new, "%i", (int)((sz / 512) / 8) / 17);
+ }
+ else
+ {
+ sprintf(hd_heads_new, "15");
+ sprintf(hd_cylinders_new, "%i", (int)((sz / 512) / 15) / 17);
+ }
+ }
+ else
+ {
+ sprintf(hd_sectors_new, "63");
+ sprintf(hd_heads_new, "16");
+ sprintf(hd_cylinders_new, "%i", (int)((sz / 512) / 16) / 63);
+ }
+
+ while (1)
+ {
+ position_dialog(hdparams_dialog, SCREEN_W/2 - 186, SCREEN_H/2 - 86/2);
+
+ ret = popup_dialog(hdparams_dialog, 1);
+
+ position_dialog(hdparams_dialog, -(SCREEN_W/2 - 186), -(SCREEN_H/2 - 86/2));
+
+ if (ret == 1)
+ {
+ int spt, hpc, cyl;
+ sscanf(hd_sectors_new, "%i", &spt);
+ sscanf(hd_heads_new, "%i", &hpc);
+ sscanf(hd_cylinders_new, "%i", &cyl);
+
+ if (spt > 63)
+ {
+ alert("Drive has too many sectors (maximum is 63)", NULL, NULL, "OK", NULL, 0, 0);
+ continue;
+ }
+ if (hpc > 128)
+ {
+ alert("Drive has too many heads (maximum is 128)", NULL, NULL, "OK", NULL, 0, 0);
+ continue;
+ }
+ if (cyl > 16383)
+ {
+ alert("Drive has too many cylinders (maximum is 16383)", NULL, NULL, "OK", NULL, 0, 0);
+ continue;
+ }
+
+ hdc_new[drv].spt = spt;
+ hdc_new[drv].hpc = hpc;
+ hdc_new[drv].tracks = cyl;
+
+ strcpy(hd_path[drv], fn);
+ sprintf(hd_sectors[drv], "%i", hdc_new[drv].spt);
+ sprintf(hd_heads[drv], "%i", hdc_new[drv].hpc);
+ sprintf(hd_cylinders[drv], "%i", hdc_new[drv].tracks);
+ sprintf(hd_size[drv], "Size : %imb", (((((uint64_t)hdc_new[drv].tracks*(uint64_t)hdc_new[drv].hpc)*(uint64_t)hdc_new[drv].spt)*512)/1024)/1024);
+
+ return D_REDRAW;
+ }
+
+ if (ret == 2)
+ break;
+ }
+ }
+
+ return D_REDRAW;
+ }
+
+ return ret;
+}
+
+static int hdconf_new_file(int msg, DIALOG *d, int c)
+{
+ int ret = d_button_proc(msg, d, c);
+
+ if (ret == D_EXIT)
+ {
+ char fn[260];
+ int xsize = SCREEN_W - 32, ysize = SCREEN_H - 64;
+
+ strcpy(fn, hd_path_new);
+ ret = file_select_ex("Please choose a disc image", fn, "IMG", 260, xsize, ysize);
+ if (ret)
+ strcpy(hd_path_new, fn);
+
+ return D_REDRAW;
+ }
+
+ return ret;
+}
+
+static DIALOG hdnew_dialog[]=
+{
+ {d_shadow_box_proc, 0, 0, 194*2,86,0,0xffffff,0,0, 0,0,0,0,0}, // 0
+
+ {d_button_proc, 126, 66, 50, 14, 0, 0xffffff, 0, D_EXIT, 0, 0, "OK", 0, 0}, // 1
+ {d_button_proc, 196, 66, 50, 16, 0, 0xffffff, 0, D_EXIT, 0, 0, "Cancel", 0, 0}, // 2
+
+ {d_edit_proc, 7*2, 6, 136*2, 10, 0, 0xffffff, 0, 0, 0, 0, hd_path_new, 0, 0},
+ {hdconf_new_file, 143*2, 6, 16*2, 14, 0, 0xffffff, 0, D_EXIT, 0, 0, "...", 0, 0},
+
+ {d_text_proc, 7*2, 22, 27, 10, 0, 0xffffff, 0, 0, 0, 0, "Sectors:", 0, 0},
+ {d_text_proc, 63*2, 22, 29, 8, 0, 0xffffff, 0, 0, 0, 0, "Heads:", 0, 0},
+ {d_text_proc, 120*2, 22, 28, 12, 0, 0xffffff, 0, 0, 0, 0, "Cylinders:", 0, 0},
+ {d_edit_proc, 44*2, 22, 16*2, 12, 0, 0xffffff, 0, 0, 2, 0, hd_sectors_new, 0, 0},
+ {d_edit_proc, 92*2, 22, 16*2, 12, 0, 0xffffff, 0, 0, 3, 0, hd_heads_new, 0, 0},
+ {d_edit_proc, 168*2, 22, 24*2, 12, 0, 0xffffff, 0, 0, 5, 0, hd_cylinders_new, 0, 0},
+// {d_text_proc, 7*2, 54, 136, 12, 0, -1, 0, 0, 0, 0, hd_size_new, 0, 0},
+
+ {0,0,0,0,0,0,0,0,0,0,0,NULL,NULL,NULL}
+};
+
+static int create_hd(char *fn, int cyl, int hpc, int spt)
+{
+ int c;
+ uint8_t buf[512];
+ FILE *f = fopen64(hd_path_new, "wb");
+ if (!f)
+ {
+ alert("Can't open file for write", NULL, NULL, "OK", NULL, 0, 0);
+ return -1;
+ }
+ memset(buf, 0, 512);
+ for (c = 0; c < (cyl * hpc * spt); c++)
+ {
+ fwrite(buf, 512, 1, f);
+ }
+ fclose(f);
+
+ return 0;
+}
+
+static int hdconf_new(int msg, DIALOG *d, int c)
+{
+ int drv = d->d2;
+ int ret = d_button_proc(msg, d, c);
+
+ if (ret == D_EXIT)
+ {
+ sprintf(hd_sectors_new, "63");
+ sprintf(hd_heads_new, "16");
+ sprintf(hd_cylinders_new, "511");
+ strcpy(hd_path_new, "");
+
+ while (1)
+ {
+ position_dialog(hdnew_dialog, SCREEN_W/2 - 186, SCREEN_H/2 - 86/2);
+
+ ret = popup_dialog(hdnew_dialog, 1);
+
+ position_dialog(hdnew_dialog, -(SCREEN_W/2 - 186), -(SCREEN_H/2 - 86/2));
+
+ if (ret == 1)
+ {
+ int spt, hpc, cyl;
+
+ sscanf(hd_sectors_new, "%i", &spt);
+ sscanf(hd_heads_new, "%i", &hpc);
+ sscanf(hd_cylinders_new, "%i", &cyl);
+
+ if (spt > 63)
+ {
+ alert("Drive has too many sectors (maximum is 63)", NULL, NULL, "OK", NULL, 0, 0);
+ continue;
+ }
+ if (hpc > 128)
+ {
+ alert("Drive has too many heads (maximum is 128)", NULL, NULL, "OK", NULL, 0, 0);
+ continue;
+ }
+ if (cyl > 16383)
+ {
+ alert("Drive has too many cylinders (maximum is 16383)", NULL, NULL, "OK", NULL, 0, 0);
+ continue;
+ }
+ if (create_hd(hd_path_new, cyl, hpc, spt))
+ return D_REDRAW;
+
+ alert("Remember to partition and format the new drive", NULL, NULL, "OK", NULL, 0, 0);
+
+ hdc_new[drv].spt = spt;
+ hdc_new[drv].hpc = hpc;
+ hdc_new[drv].tracks = cyl;
+
+ strcpy(hd_path[drv], hd_path_new);
+ sprintf(hd_sectors[drv], "%i", hdc_new[drv].spt);
+ sprintf(hd_heads[drv], "%i", hdc_new[drv].hpc);
+ sprintf(hd_cylinders[drv], "%i", hdc_new[drv].tracks);
+ sprintf(hd_size[drv], "Size : %imb", (((((uint64_t)hdc_new[drv].tracks*(uint64_t)hdc_new[drv].hpc)*(uint64_t)hdc_new[drv].spt)*512)/1024)/1024);
+
+ return D_REDRAW;
+ }
+
+ if (ret == 2)
+ break;
+ }
+
+ return D_REDRAW;
+ }
+
+ return ret;
+}
+
+static int hdconf_eject(int msg, DIALOG *d, int c)
+{
+ int drv = d->d2;
+ int ret = d_button_proc(msg, d, c);
+
+ if (ret == D_EXIT)
+ {
+ hdc_new[drv].spt = 0;
+ hdc_new[drv].hpc = 0;
+ hdc_new[drv].tracks = 0;
+ strcpy(hd_path[drv], "");
+ sprintf(hd_sectors[drv], "%i", hdc_new[drv].spt);
+ sprintf(hd_heads[drv], "%i", hdc_new[drv].hpc);
+ sprintf(hd_cylinders[drv], "%i", hdc_new[drv].tracks);
+ sprintf(hd_size[drv], "Size : %imb", (((((uint64_t)hdc_new[drv].tracks*(uint64_t)hdc_new[drv].hpc)*(uint64_t)hdc_new[drv].spt)*512)/1024)/1024);
+
+ return D_REDRAW;
+ }
+
+ return ret;
+}
+
+static int hdconf_radio_hd(int msg, DIALOG *d, int c);
+static int hdconf_radio_cd(int msg, DIALOG *d, int c);
+
+static DIALOG hdconf_dialog[]=
+{
+ {d_shadow_box_proc, 0, 0, 210*2,354,0,0xffffff,0,0, 0,0,0,0,0}, // 0
+
+ {d_button_proc, 150, 334, 50, 16, 0, 0xffffff, 0, D_EXIT, 0, 0, "OK", 0, 0}, // 1
+ {d_button_proc, 220, 334, 50, 16, 0, 0xffffff, 0, D_EXIT, 0, 0, "Cancel", 0, 0}, // 2
+
+ {d_text_proc, 7*2, 6, 27, 10, 0, 0xffffff, 0, 0, 0, 0, "C:", 0, 0},
+ {hdconf_radio_hd, 7*2, 22, 96, 12, 0, 0xffffff, 0, D_EXIT, 0, 0, "Hard drive", 0, 0}, // 4
+ {hdconf_radio_cd, 100*2, 22, 64, 12, 0, 0xffffff, 0, D_EXIT, 0, 0, "CD-ROM", 0, 0}, // 5
+ {d_edit_proc, 7*2, 38, 136*2, 12, 0, 0xffffff, 0, D_DISABLED, 0, 0, hd_path[0], 0, 0},
+ {hdconf_open, 143*2, 38, 16*2, 14, 0, 0xffffff, 0, D_EXIT, 0, 0, "...", 0, 0},
+ {hdconf_new, 159*2, 38, 24*2, 14, 0, 0xffffff, 0, D_EXIT, 0, 0, "New", 0, 0},
+ {hdconf_eject, 183*2, 38, 24*2, 14, 0, 0xffffff, 0, D_EXIT, 0, 0, "Eject", 0, 0},
+
+ {d_text_proc, 7*2, 54, 27, 10, 0, 0xffffff, 0, 0, 0, 0, "Sectors:", 0, 0},
+ {d_text_proc, 63*2, 54, 29, 8, 0, 0xffffff, 0, 0, 0, 0, "Heads:", 0, 0},
+ {d_text_proc, 120*2, 54, 28, 12, 0, 0xffffff, 0, 0, 0, 0, "Cylinders:", 0, 0},
+ {d_edit_proc, 44*2, 54, 16*2, 12, 0, 0xffffff, 0, D_DISABLED, 0, 0, hd_sectors[0], 0, 0},
+ {d_edit_proc, 92*2, 54, 16*2, 12, 0, 0xffffff, 0, D_DISABLED, 0, 0, hd_heads[0], 0, 0},
+ {d_edit_proc, 168*2, 54, 24*2, 12, 0, 0xffffff, 0, D_DISABLED, 0, 0, hd_cylinders[0], 0, 0},
+ {d_text_proc, 7*2, 54, 136, 12, 0, 0xffffff, 0, 0, 0, 0, hd_size[0], 0, 0},
+
+ {d_text_proc, 7*2, 76, 27, 10, 0, 0xffffff, 0, 0, 0, 0, "D:", 0, 0},
+ {hdconf_radio_hd, 7*2, 92, 96, 12, 0, 0xffffff, 0, D_EXIT, 1, 0, "Hard drive", 0, 0}, // 18
+ {hdconf_radio_cd, 100*2, 92, 64, 12, 0, 0xffffff, 0, D_EXIT, 1, 0, "CD-ROM", 0, 0}, // 19
+ {d_edit_proc, 7*2, 108, 136*2, 12, 0, 0xffffff, 0, D_DISABLED, 0, 0, hd_path[1], 0, 0},
+ {hdconf_open, 143*2, 108, 16*2, 14, 0, 0xffffff, 0, D_EXIT, 0, 1, "...", 0, 0},
+ {hdconf_new, 159*2, 108, 24*2, 14, 0, 0xffffff, 0, D_EXIT, 0, 1, "New", 0, 0},
+ {hdconf_eject, 183*2, 108, 24*2, 14, 0, 0xffffff, 0, D_EXIT, 0, 1, "Eject", 0, 0},
+
+ {d_edit_proc, 44*2, 124, 16*2, 12, 0, 0xffffff, 0, D_DISABLED, 0, 0, hd_sectors[1], 0, 0},
+ {d_edit_proc, 92*2, 124, 16*2, 12, 0, 0xffffff, 0, D_DISABLED, 0, 0, hd_heads[1], 0, 0},
+ {d_edit_proc, 168*2, 124, 24*2, 12, 0, 0xffffff, 0, D_DISABLED, 0, 0, hd_cylinders[1], 0, 0},
+ {d_text_proc, 7*2, 124, 27, 10, 0, 0xffffff, 0, 0, 0, 0, "Sectors:", 0, 0},
+ {d_text_proc, 63*2, 124, 29, 8, 0, 0xffffff, 0, 0, 0, 0, "Heads:", 0, 0},
+ {d_text_proc, 120*2, 124, 32, 12, 0, 0xffffff, 0, 0, 0, 0, "Cylinders:", 0, 0},
+ {d_text_proc, 7*2, 140, 136, 12, 0, 0xffffff, 0, 0, 0, 0, hd_size[1], 0, 0},
+
+ {d_text_proc, 7*2, 162, 27, 10, 0, 0xffffff, 0, 0, 0, 0, "E:", 0, 0},
+ {hdconf_radio_hd, 7*2, 178, 96, 12, 0, 0xffffff, 0, D_EXIT, 2, 0, "Hard drive", 0, 0}, // 32
+ {hdconf_radio_cd, 100*2, 178, 64, 12, 0, 0xffffff, 0, D_EXIT, 2, 0, "CD-ROM", 0, 0}, // 33
+ {d_edit_proc, 7*2, 194, 136*2, 12, 0, 0xffffff, 0, D_DISABLED, 0, 0, hd_path[2], 0, 0},
+ {hdconf_open, 143*2, 194, 16*2, 14, 0, 0xffffff, 0, D_EXIT, 0, 2, "...", 0, 0},
+ {hdconf_new, 159*2, 194, 24*2, 14, 0, 0xffffff, 0, D_EXIT, 0, 2, "New", 0, 0},
+ {hdconf_eject, 183*2, 194, 24*2, 14, 0, 0xffffff, 0, D_EXIT, 0, 2, "Eject", 0, 0},
+
+ {d_edit_proc, 44*2, 210, 16*2, 12, 0, 0xffffff, 0, D_DISABLED, 0, 0, hd_sectors[2], 0, 0},
+ {d_edit_proc, 92*2, 210, 16*2, 12, 0, 0xffffff, 0, D_DISABLED, 0, 0, hd_heads[2], 0, 0},
+ {d_edit_proc, 168*2, 210, 24*2, 12, 0, 0xffffff, 0, D_DISABLED, 0, 0, hd_cylinders[2], 0, 0},
+ {d_text_proc, 7*2, 210, 27, 10, 0, 0xffffff, 0, 0, 0, 0, "Sectors:", 0, 0},
+ {d_text_proc, 63*2, 210, 29, 8, 0, 0xffffff, 0, 0, 0, 0, "Heads:", 0, 0},
+ {d_text_proc, 120*2, 210, 32, 12, 0, 0xffffff, 0, 0, 0, 0, "Cylinders:", 0, 0},
+ {d_text_proc, 7*2, 226, 136, 12, 0, 0xffffff, 0, 0, 0, 0, hd_size[2], 0, 0},
+
+ {d_text_proc, 7*2, 248, 27, 10, 0, 0xffffff, 0, 0, 0, 0, "F:", 0, 0},
+ {hdconf_radio_hd, 7*2, 264, 96, 12, 0, 0xffffff, 0, D_EXIT, 3, 0, "Hard drive", 0, 0}, // 46
+ {hdconf_radio_cd, 100*2, 264, 64, 12, 0, 0xffffff, 0, D_EXIT, 3, 0, "CD-ROM", 0, 0}, // 47
+ {d_edit_proc, 7*2, 280, 136*2, 12, 0, 0xffffff, 0, D_DISABLED, 0, 0, hd_path[3], 0, 0},
+ {hdconf_open, 143*2, 280, 16*2, 14, 0, 0xffffff, 0, D_EXIT, 0, 3, "...", 0, 0},
+ {hdconf_new, 159*2, 280, 24*2, 14, 0, 0xffffff, 0, D_EXIT, 0, 3, "New", 0, 0},
+ {hdconf_eject, 183*2, 280, 24*2, 14, 0, 0xffffff, 0, D_EXIT, 0, 3, "Eject", 0, 0},
+
+ {d_edit_proc, 44*2, 296, 16*2, 12, 0, 0xffffff, 0, D_DISABLED, 0, 0, hd_sectors[3], 0, 0},
+ {d_edit_proc, 92*2, 296, 16*2, 12, 0, 0xffffff, 0, D_DISABLED, 0, 0, hd_heads[3], 0, 0},
+ {d_edit_proc, 168*2, 296, 24*2, 12, 0, 0xffffff, 0, D_DISABLED, 0, 0, hd_cylinders[3], 0, 0},
+ {d_text_proc, 7*2, 296, 27, 10, 0, 0xffffff, 0, 0, 0, 0, "Sectors:", 0, 0},
+ {d_text_proc, 63*2, 296, 29, 8, 0, 0xffffff, 0, 0, 0, 0, "Heads:", 0, 0},
+ {d_text_proc, 120*2, 296, 32, 12, 0, 0xffffff, 0, 0, 0, 0, "Cylinders:", 0, 0},
+ {d_text_proc, 7*2, 312, 136, 12, 0, 0xffffff, 0, 0, 0, 0, hd_size[3], 0, 0},
+
+ {0,0,0,0,0,0,0,0,0,0,0,NULL,NULL,NULL}
+};
+
+static void update_hdd_cdrom()
+{
+ if (new_cdrom_channel == 0)
+ {
+ hdconf_dialog[4].flags &= ~D_SELECTED;
+ hdconf_dialog[5].flags |= D_SELECTED;
+ }
+ else
+ {
+ hdconf_dialog[4].flags |= D_SELECTED;
+ hdconf_dialog[5].flags &= ~D_SELECTED;
+ }
+ if (new_cdrom_channel == 1)
+ {
+ hdconf_dialog[18].flags &= ~D_SELECTED;
+ hdconf_dialog[19].flags |= D_SELECTED;
+ }
+ else
+ {
+ hdconf_dialog[18].flags |= D_SELECTED;
+ hdconf_dialog[19].flags &= ~D_SELECTED;
+ }
+ if (new_cdrom_channel == 2)
+ {
+ hdconf_dialog[32].flags &= ~D_SELECTED;
+ hdconf_dialog[33].flags |= D_SELECTED;
+ }
+ else
+ {
+ hdconf_dialog[32].flags |= D_SELECTED;
+ hdconf_dialog[33].flags &= ~D_SELECTED;
+ }
+ if (new_cdrom_channel == 3)
+ {
+ hdconf_dialog[46].flags &= ~D_SELECTED;
+ hdconf_dialog[47].flags |= D_SELECTED;
+ }
+ else
+ {
+ hdconf_dialog[46].flags |= D_SELECTED;
+ hdconf_dialog[47].flags &= ~D_SELECTED;
+ }
+}
+
+static int hdconf_radio_hd(int msg, DIALOG *d, int c)
+{
+ int ret = d_radio_proc(msg, d, c);
+
+ if (ret == D_CLOSE)
+ {
+ if (new_cdrom_channel == d->d1)
+ {
+ new_cdrom_channel = -1;
+ update_hdd_cdrom();
+ }
+
+ return D_REDRAW;
+ }
+
+ return ret;
+}
+static int hdconf_radio_cd(int msg, DIALOG *d, int c)
+{
+ int ret = d_radio_proc(msg, d, c);
+
+ if (ret == D_CLOSE)
+ {
+ if (new_cdrom_channel != d->d1)
+ {
+ new_cdrom_channel = d->d1;
+ update_hdd_cdrom();
+ }
+
+ return D_REDRAW;
+ }
+
+ return ret;
+}
+
+int disc_hdconf()
+{
+ int c;
+
+ hdc_new[0] = hdc[0];
+ hdc_new[1] = hdc[1];
+ hdc_new[2] = hdc[2];
+ hdc_new[3] = hdc[3];
+ strcpy(hd_path[0], ide_fn[0]);
+ strcpy(hd_path[1], ide_fn[1]);
+ strcpy(hd_path[2], ide_fn[2]);
+ strcpy(hd_path[3], ide_fn[3]);
+ sprintf(hd_sectors[0], "%i", hdc[0].spt);
+ sprintf(hd_sectors[1], "%i", hdc[1].spt);
+ sprintf(hd_sectors[2], "%i", hdc[2].spt);
+ sprintf(hd_sectors[3], "%i", hdc[3].spt);
+ sprintf(hd_heads[0], "%i", hdc[0].hpc);
+ sprintf(hd_heads[1], "%i", hdc[1].hpc);
+ sprintf(hd_heads[2], "%i", hdc[2].hpc);
+ sprintf(hd_heads[3], "%i", hdc[3].hpc);
+ sprintf(hd_cylinders[0], "%i", hdc[0].tracks);
+ sprintf(hd_cylinders[1], "%i", hdc[1].tracks);
+ sprintf(hd_cylinders[2], "%i", hdc[2].tracks);
+ sprintf(hd_cylinders[3], "%i", hdc[3].tracks);
+ sprintf(hd_size[0], "Size : %imb", (((((uint64_t)hdc[0].tracks*(uint64_t)hdc[0].hpc)*(uint64_t)hdc[0].spt)*512)/1024)/1024);
+ sprintf(hd_size[1], "Size : %imb", (((((uint64_t)hdc[1].tracks*(uint64_t)hdc[1].hpc)*(uint64_t)hdc[1].spt)*512)/1024)/1024);
+ sprintf(hd_size[2], "Size : %imb", (((((uint64_t)hdc[2].tracks*(uint64_t)hdc[2].hpc)*(uint64_t)hdc[2].spt)*512)/1024)/1024);
+ sprintf(hd_size[3], "Size : %imb", (((((uint64_t)hdc[3].tracks*(uint64_t)hdc[3].hpc)*(uint64_t)hdc[3].spt)*512)/1024)/1024);
+
+ new_cdrom_channel = cdrom_channel;
+
+ update_hdd_cdrom();
+
+ while (1)
+ {
+ position_dialog(hdconf_dialog, SCREEN_W/2 - hdconf_dialog[0].w/2, SCREEN_H/2 - hdconf_dialog[0].h/2);
+
+ c = popup_dialog(hdconf_dialog, 1);
+
+ position_dialog(hdconf_dialog, -(SCREEN_W/2 - hdconf_dialog[0].w/2), -(SCREEN_H/2 - hdconf_dialog[0].h/2));
+
+ if (c == 1)
+ {
+ if (!has_been_inited || alert("This will reset PCem!", "Okay to continue?", NULL, "OK", "Cancel", 0, 0) == 1)
+ {
+ hdc[0] = hdc_new[0];
+ hdc[1] = hdc_new[1];
+ hdc[2] = hdc_new[2];
+ hdc[3] = hdc_new[3];
+
+ strcpy(ide_fn[0], hd_path[0]);
+ strcpy(ide_fn[1], hd_path[1]);
+ strcpy(ide_fn[2], hd_path[2]);
+ strcpy(ide_fn[3], hd_path[3]);
+
+ cdrom_channel = new_cdrom_channel;
+
+ saveconfig(NULL);
+
+ resetpchard();
+
+ return D_O_K;
+ }
+ }
+ if (c == 2)
+ return D_O_K;
+ }
+
+ return D_O_K;
+}
diff --git a/src/allegro-gui.c b/src/allegro-gui.c
new file mode 100644
index 0000000..43914e6
--- /dev/null
+++ b/src/allegro-gui.c
@@ -0,0 +1,288 @@
+#include "ibm.h"
+#include "device.h"
+#include "allegro-main.h"
+#include "allegro-gui.h"
+#include "disc.h"
+#include "ide.h"
+#include "cdrom-ioctl.h"
+#include "cdrom-iso.h"
+#include "cdrom-null.h"
+
+void warning(const char *format, ...)
+{
+ char buf[1024];
+ va_list ap;
+
+ va_start(ap, format);
+ vsprintf(buf, format, ap);
+ va_end(ap);
+
+ alert("Warning:", buf, NULL, "OK", NULL, 0, 0);
+}
+
+
+static int file_return(void)
+{
+ return D_CLOSE;
+}
+
+static int file_exit(void)
+{
+ quited = 1;
+ return D_CLOSE;
+}
+
+static int file_reset(void)
+{
+ resetpchard();
+ return D_CLOSE;
+}
+
+static int file_cad(void)
+{
+ resetpc_cad();
+ return D_CLOSE;
+}
+
+
+static MENU file_menu[]=
+{
+ {"&Return", file_return, NULL, 0, NULL},
+ {"&Hard Reset", file_reset, NULL, 0, NULL},
+ {"&Ctrl+Alt+Del", file_cad, NULL, 0, NULL},
+ {"E&xit", file_exit, NULL, 0, NULL},
+ {NULL,NULL,NULL,0,NULL}
+};
+
+static int disc_load_a()
+{
+ char fn[260];
+ int ret;
+ int xsize = SCREEN_W - 32, ysize = SCREEN_H - 64;
+ strcpy(fn, discfns[0]);
+ ret = file_select_ex("Please choose a disc image", fn, "IMG;IMA;FDI", 260, xsize, ysize);
+ if (ret)
+ {
+ disc_close(0);
+ disc_load(0, fn);
+ saveconfig(NULL);
+ }
+ return D_O_K;
+}
+
+static int disc_load_b()
+{
+ char fn[260];
+ int ret;
+ int xsize = SCREEN_W - 32, ysize = SCREEN_H - 64;
+ strcpy(fn, discfns[1]);
+ ret = file_select_ex("Please choose a disc image", fn, "IMG;IMA;FDI", 260, xsize, ysize);
+ if (ret)
+ {
+ disc_close(1);
+ disc_load(1, fn);
+ saveconfig(NULL);
+ }
+ return D_O_K;
+}
+
+static int disc_eject_a()
+{
+ disc_close(0);
+ saveconfig(NULL);
+
+ return D_O_K;
+}
+
+static int disc_eject_b()
+{
+ disc_close(1);
+ saveconfig(NULL);
+
+ return D_O_K;
+}
+
+static MENU disc_menu[]=
+{
+ {"Load drive &A:...", disc_load_a, NULL, 0, NULL},
+ {"Load drive &B:...", disc_load_b, NULL, 0, NULL},
+ {"&Eject drive &A:", disc_eject_a, NULL, 0, NULL},
+ {"Eject drive &B:", disc_eject_b, NULL, 0, NULL},
+ {"&Configure hard discs...", disc_hdconf, NULL, 0, NULL},
+ {NULL,NULL,NULL,0,NULL}
+};
+
+static MENU cdrom_menu[];
+
+static void cdrom_update()
+{
+ int c;
+
+ for (c = 0; cdrom_menu[c].text; c++)
+ cdrom_menu[c].flags = 0;
+
+ if (!cdrom_enabled)
+ cdrom_menu[0].flags = D_SELECTED;
+ else switch (cdrom_drive)
+ {
+ case -1:
+ cdrom_menu[1].flags = D_SELECTED;
+ break;
+ case CDROM_ISO:
+ cdrom_menu[3].flags = D_SELECTED;
+ break;
+ default:
+ cdrom_menu[2].flags = D_SELECTED;
+ break;
+ }
+}
+
+static int cdrom_disabled()
+{
+ if (!cdrom_enabled)
+ return D_O_K;
+
+ if (alert("This will reset PCem!", "Okay to continue?", NULL, "OK", "Cancel", 0, 0) == 1)
+ {
+ atapi->exit();
+ cdrom_enabled = 0;
+ saveconfig(NULL);
+ resetpchard();
+ cdrom_update();
+ }
+
+ return D_O_K;
+}
+
+static int cdrom_empty()
+{
+ if (cdrom_enabled)
+ {
+ atapi->exit();
+ cdrom_drive = -1;
+ cdrom_null_open(cdrom_drive);
+ return D_O_K;
+ }
+
+ if (alert("This will reset PCem!", "Okay to continue?", NULL, "OK", "Cancel", 0, 0) == 1)
+ {
+ cdrom_drive = -1;
+ cdrom_enabled = 1;
+ cdrom_null_open(cdrom_drive);
+ saveconfig(NULL);
+ resetpchard();
+ cdrom_update();
+ }
+
+ return D_O_K;
+}
+
+static int cdrom_dev()
+{
+ if (cdrom_enabled)
+ {
+ atapi->exit();
+ cdrom_drive = 1;
+ ioctl_open(cdrom_drive);
+ return D_O_K;
+ }
+
+ if (alert("This will reset PCem!", "Okay to continue?", NULL, "OK", "Cancel", 0, 0) == 1)
+ {
+ cdrom_drive = 1;
+ cdrom_enabled = 1;
+ ioctl_open(cdrom_drive);
+ saveconfig(NULL);
+ resetpchard();
+ cdrom_update();
+ }
+
+ return D_O_K;
+}
+
+static int cdrom_iso()
+{
+ char fn[260];
+ int ret;
+ int xsize = SCREEN_W - 32, ysize = SCREEN_H - 64;
+
+ strcpy(fn, iso_path);
+ ret = file_select_ex("Please choose an ISO image", fn, "ISO", 260, xsize, ysize);
+ if (ret)
+ {
+ if (!cdrom_enabled)
+ {
+ if (alert("This will reset PCem!", "Okay to continue?", NULL, "OK", "Cancel", 0, 0) != 1)
+ return D_O_K;
+ }
+ else
+ {
+ atapi->exit();
+ }
+
+ cdrom_drive = CDROM_ISO;
+ iso_open(fn);
+ if (!cdrom_enabled)
+ {
+ cdrom_enabled = 1;
+ resetpchard();
+ }
+ cdrom_update();
+ saveconfig(NULL);
+ }
+ return D_O_K;
+}
+
+static MENU cdrom_menu[] =
+{
+ {"&Disabled", cdrom_disabled, NULL, 0, NULL},
+ {"&Empty", cdrom_empty, NULL, 0, NULL},
+ {"/dev/cdrom", cdrom_dev, NULL, 0, NULL},
+ {"&ISO image...", cdrom_iso, NULL, 0, NULL},
+ {NULL,NULL,NULL,0,NULL}
+};
+
+static MENU settings_menu[]=
+{
+ {"&Configure...", settings_configure, NULL, 0, NULL},
+ {"CD-ROM", NULL, cdrom_menu, 0, NULL},
+ {NULL,NULL,NULL,0,NULL}
+};
+
+static MENU main_menu[]=
+{
+ {"&File", NULL, file_menu, 0, NULL},
+ {"&Disc", NULL, disc_menu, 0, NULL},
+ {"&Settings", NULL, settings_menu, 0, NULL},
+ {NULL,NULL,NULL,0,NULL}
+};
+
+static DIALOG pcem_gui[]=
+{
+ {d_menu_proc, 0, 0, 0, 0, 15, 0, 0, 0, 0, 0, main_menu, NULL, NULL},
+ {d_yield_proc, 0, 0, 0, 0, 15, 0, 0, 0, 0, 0, NULL, NULL, NULL},
+ {0,0,0,0,0,0,0,0,0,0,0,NULL,NULL,NULL}
+};
+
+void gui_enter()
+{
+ DIALOG_PLAYER *dp;
+ int x = 1;
+ infocus = 0;
+
+ dp = init_dialog(pcem_gui, 0);
+ show_mouse(screen);
+ while (x && !(mouse_b & 2) && !key[KEY_ESC])
+ {
+ x = update_dialog(dp);
+ }
+ show_mouse(NULL);
+ shutdown_dialog(dp);
+
+ clear(screen);
+ clear_keybuf();
+
+ infocus = 1;
+
+ device_force_redraw();
+}
diff --git a/src/allegro-gui.h b/src/allegro-gui.h
new file mode 100644
index 0000000..2c98f82
--- /dev/null
+++ b/src/allegro-gui.h
@@ -0,0 +1,15 @@
+void gui_enter();
+
+extern int quited;
+
+extern int romspresent[ROM_MAX];
+extern int gfx_present[GFX_MAX];
+
+int disc_hdconf();
+
+int settings_configure();
+
+void deviceconfig_open(device_t *device);
+int config_sel();
+
+extern int has_been_inited;
diff --git a/src/allegro-joystick.c b/src/allegro-joystick.c
new file mode 100644
index 0000000..953399a
--- /dev/null
+++ b/src/allegro-joystick.c
@@ -0,0 +1,49 @@
+#include "allegro-main.h"
+#include "plat-joystick.h"
+#include "device.h"
+#include "gameport.h"
+
+plat_joystick_t plat_joystick_state[MAX_PLAT_JOYSTICKS];
+joystick_t joystick_state[MAX_JOYSTICKS];
+
+int joysticks_present;
+
+void joystick_init()
+{
+ install_joystick(JOY_TYPE_AUTODETECT);
+ joysticks_present = num_joysticks;
+}
+void joystick_close()
+{
+}
+void joystick_poll()
+{
+ int c, d;
+
+ poll_joystick();
+
+ for (c = 0; c < num_joysticks; c++)
+ {
+ plat_joystick_state[c].a[0] = joy[c].stick[0].axis[0].pos * 256;
+ plat_joystick_state[c].a[1] = joy[c].stick[0].axis[1].pos * 256;
+ for (d = 0; d < MAX_JOYSTICK_BUTTONS; d++)
+ plat_joystick_state[c].b[d] = joy[c].button[d].b;
+ }
+ for (c = 0; c < joystick_get_max_joysticks(joystick_type); c++)
+ {
+ if (c < num_joysticks)
+ {
+ for (d = 0; d < joystick_get_axis_count(joystick_type); d++)
+ joystick_state[c].axis[d] = plat_joystick_state[c].a[d];
+ for (d = 0; d < joystick_get_button_count(joystick_type); d++)
+ joystick_state[c].button[d] = plat_joystick_state[c].b[d];
+ }
+ else
+ {
+ for (d = 0; d < joystick_get_axis_count(joystick_type); d++)
+ joystick_state[c].axis[d] = 0;
+ for (d = 0; d < joystick_get_button_count(joystick_type); d++)
+ joystick_state[c].button[d] = 0;
+ }
+ }
+}
diff --git a/src/allegro-keyboard.c b/src/allegro-keyboard.c
new file mode 100644
index 0000000..335f842
--- /dev/null
+++ b/src/allegro-keyboard.c
@@ -0,0 +1,49 @@
+#include "allegro-main.h"
+#include "plat-keyboard.h"
+
+int pcem_key[272];
+int rawinputkey[272];
+
+static int key_convert[128] =
+{
+ -1, 0x1e, 0x30, 0x2e, 0x20, 0x12, 0x21, 0x22, /* , A, B, C, D, E, F, G*/
+ 0x23, 0x17, 0x24, 0x25, 0x26, 0x32, 0x31, 0x18, /* H, I, J, K, L, M, N, O*/
+ 0x19, 0x10, 0x13, 0x1f, 0x14, 0x16, 0x2f, 0x11, /* P, Q, R, S, T, U, V, W*/
+ 0x2d, 0x15, 0x2c, 0x0b, 0x02, 0x03, 0x04, 0x05, /* X, Y, Z, 0, 1, 2, 3, 4*/
+ 0x06, 0x07, 0x08, 0x09, 0x0a, 0x52, 0x4f, 0x50, /* 5, 6, 7, 8, 9, p0, p1, p2*/
+ 0x51, 0x4b, 0x4c, 0x4d, 0x47, 0x48, 0x49, 0x3b, /* p3, p4, p5, p6, p7, p8, p9, F1*/
+ 0x3c, 0x3d, 0x3e, 0x3f, 0x40, 0x41, 0x42, 0x43, /* F2, F3, F4, F5, F6, F7, F8, F9*/
+ 0x44, 0x57, 0x58, 0x01, 0x29, 0x0c, 0x0d, 0x0e, /*F10, F11, F12, ESC, `, -_, =+, backspace*/
+ 0x0f, 0x1a, 0x1b, 0x1c, 0x27, 0x28, 0x2b, 0x56, /*TAB, [{, ]}, ENT, ;:, '@, \|, #~*/
+ 0x33, 0x34, 0x35, 0x39, 0xd2, 0xd3, 0xc7, 0xcf, /* ,<, .>, /?, SPC, INS, DEL, HOME, END*/
+ 0xc9, 0xd1, 0xcb, 0xcd, 0xc8, 0xd0, 0xb5, 0x37, /*PGU, PGD, LFT, RHT, UP, DN, /, * */
+ 0x4a, 0x4e, 0x53, 0x9c, 0xff, -1, -1, -1, /* p-, p+, pDL, pEN, psc, pse, abnt, yen*/
+ -1, -1, -1, -1, -1, -1, -1, -1, /*kana, convert, noconvert, at, circumflex, colon2, kanji, pad equals*/
+ -1, -1, -1, -1, -1, -1, -1, -1,
+ -1, -1, -1, 0x2a, 0x36, 0x1d, 0x9d, 0x38, /*, , lshift, rshift, lctrl, rctrl, alt*/
+ 0xb8, 0xdb, 0xdc, 0xdd, 0x46, 0x45, 0x3a, -1 /*altgr, lwin, rwin, menu, scrlock, numlock, capslock*/
+};
+
+void keyboard_init()
+{
+ install_keyboard();
+}
+
+void keyboard_close()
+{
+}
+
+void keyboard_poll_host()
+{
+ int c;
+
+ for (c = 0; c < 128; c++)
+ {
+ int key_idx = key_convert[c];
+ if (key_idx == -1)
+ continue;
+
+ if (key[c] != pcem_key[key_idx])
+ pcem_key[key_idx] = key[c];
+ }
+}
diff --git a/src/allegro-main.c b/src/allegro-main.c
new file mode 100644
index 0000000..47098f6
--- /dev/null
+++ b/src/allegro-main.c
@@ -0,0 +1,204 @@
+#include "ibm.h"
+#include "device.h"
+#include "allegro-gui.h"
+#include "allegro-main.h"
+#include "allegro-video.h"
+#include "config.h"
+#include "cpu.h"
+#include "mem.h"
+#include "model.h"
+#include "nvr.h"
+#include "plat-joystick.h"
+#include "plat-keyboard.h"
+#include "plat-midi.h"
+#include "plat-mouse.h"
+#include "sound.h"
+#include "video.h"
+
+ #undef printf
+
+int has_been_inited = 0;
+
+int mousecapture = 0;
+int quited = 0;
+int winsizex = -1, winsizey = -1;
+
+int romspresent[ROM_MAX];
+int gfx_present[GFX_MAX];
+
+void updatewindowsize(int x, int y)
+{
+ if (x < 128)
+ x = 128;
+ if (y < 128)
+ y = 128;
+ if (winsizex != x || winsizey != y)
+ {
+ winsizex = x;
+ winsizey = y;
+ allegro_video_update_size(x, y);
+ }
+}
+
+void startblit()
+{
+}
+
+void endblit()
+{
+}
+
+static int ticks = 0;
+static void timer_rout()
+{
+ ticks++;
+}
+
+uint64_t timer_freq;
+uint64_t timer_read()
+{
+ return 0;
+}
+
+int main(int argc, char *argv[])
+{
+ int frames = 0;
+ int c;
+ allegro_init();
+ allegro_video_init();
+ install_timer();
+ install_int_ex(timer_rout, BPS_TO_TIMER(100));
+ install_int_ex(onesec, BPS_TO_TIMER(1));
+ midi_init();
+
+ getpath();
+
+ sound_init();
+
+ initpc(argc, argv);
+
+ keyboard_init();
+ mouse_init();
+ joystick_init();
+
+ for (c = 0; c < ROM_MAX; c++)
+ {
+ romset = c;
+ romspresent[c] = loadbios();
+ pclog("romset %i - %i\n", c, romspresent[c]);
+ }
+
+ for (c = 0; c < ROM_MAX; c++)
+ {
+ if (romspresent[c])
+ break;
+ }
+ if (c == ROM_MAX)
+ {
+ printf("No ROMs present!\nYou must have at least one romset to use PCem.");
+ return 0;
+ }
+
+ for (c = 0; c < GFX_MAX; c++)
+ gfx_present[c] = video_card_available(video_old_to_new(c));
+
+ while (1)
+ {
+ has_been_inited = 0;
+ if (config_sel())
+ return 0;
+ has_been_inited = 1;
+
+ quited = 0;
+
+ loadconfig(NULL);
+
+ c=loadbios();
+
+ if (!c)
+ {
+ if (romset != -1)
+ printf("Configured romset not available.\nDefaulting to available romset.");
+ for (c = 0; c < ROM_MAX; c++)
+ {
+ if (romspresent[c])
+ {
+ romset = c;
+ model = model_getmodel(romset);
+ saveconfig(NULL);
+ resetpchard();
+ break;
+ }
+ }
+ }
+
+ if (!video_card_available(video_old_to_new(gfxcard)))
+ {
+ if (gfxcard) printf("Configured video BIOS not available.\nDefaulting to available romset.");
+ for (c = GFX_MAX-1; c >= 0; c--)
+ {
+ if (gfx_present[c])
+ {
+ gfxcard = c;
+ saveconfig(NULL);
+ resetpchard();
+ break;
+ }
+ }
+ }
+
+ resetpchard();
+
+ ticks = 0;
+ while (!quited)
+ {
+ if (ticks)
+ {
+ ticks--;
+ runpc();
+ frames++;
+ if (frames >= 200 && nvr_dosave)
+ {
+ frames = 0;
+ nvr_dosave = 0;
+ savenvr();
+ }
+ }
+ else
+ rest(1);
+
+ if (ticks > 10)
+ ticks = 0;
+
+ if ((mouse_b & 1) && !mousecapture)
+ mousecapture = 1;
+
+ if (((key[KEY_LCONTROL] || key[KEY_RCONTROL]) && key[KEY_END]) || (mouse_b & 4))
+ mousecapture = 0;
+
+ if ((key[KEY_LCONTROL] || key[KEY_RCONTROL]) && key[KEY_ALT] && key[KEY_PGDN])
+ {
+ int old_winsizex = winsizex, old_winsizey = winsizey;
+ if (winsizex < 512 || winsizey < 350)
+ updatewindowsize(512, 350);
+ gui_enter();
+ if (old_winsizex < 512 || old_winsizey < 350)
+ updatewindowsize(old_winsizex, old_winsizey);
+ ticks = 0;
+ }
+ }
+
+ savenvr();
+ }
+
+ closepc();
+
+ joystick_close();
+ mouse_close();
+ keyboard_close();
+ midi_close();
+
+ return 0;
+}
+
+END_OF_MAIN();
diff --git a/src/allegro-main.h b/src/allegro-main.h
new file mode 100644
index 0000000..ba96a4f
--- /dev/null
+++ b/src/allegro-main.h
@@ -0,0 +1,19 @@
+#define getr8 allegro_getr8
+#define setr8 allegro_setr8
+#define get_filename allegro_get_filename
+#define append_filename allegro_append_filename
+#define put_backslash allegro_put_backslash
+#define get_extension allegro_get_extension
+#define GFX_VGA allegro_GFX_VGA
+#define MAX_JOYSTICKS allegro_MAX_JOYSTICKS
+
+#include
+
+#undef MAX_JOYSTICKS
+#undef GFX_VGA
+#undef getr8
+#undef setr8
+#undef get_filename
+#undef append_filename
+#undef put_backslash
+#undef get_extension
diff --git a/src/allegro-midi.c b/src/allegro-midi.c
new file mode 100644
index 0000000..b491db1
--- /dev/null
+++ b/src/allegro-midi.c
@@ -0,0 +1,45 @@
+#include "allegro-main.h"
+#include "ibm.h"
+#include "plat-midi.h"
+
+//#define USE_ALLEGRO_MIDI
+
+void midi_init()
+{
+#ifdef USE_ALLEGRO_MIDI
+ install_sound(DIGI_NONE, MIDI_AUTODETECT, NULL);
+#endif
+}
+
+void midi_close()
+{
+#ifdef USE_ALLEGRO_MIDI
+ remove_sound();
+#endif
+}
+
+static int midi_cmd_pos, midi_len;
+static uint8_t midi_command[3];
+static int midi_lengths[8] = {3, 3, 3, 3, 2, 2, 3, 0};
+
+void midi_write(uint8_t val)
+{
+ if (val & 0x80)
+ {
+ midi_cmd_pos = 0;
+ midi_len = midi_lengths[(val >> 4) & 7];
+ midi_command[0] = midi_command[1] = midi_command[2] = 0;
+ }
+
+ if (midi_len && midi_cmd_pos < 3)
+ {
+ midi_command[midi_cmd_pos] = val;
+
+ midi_cmd_pos++;
+
+#ifdef USE_ALLEGRO_MIDI
+ if (midi_cmd_pos == midi_len)
+ midi_out(midi_command, midi_len);
+#endif
+ }
+}
diff --git a/src/allegro-mouse.c b/src/allegro-mouse.c
new file mode 100644
index 0000000..9cceaa9
--- /dev/null
+++ b/src/allegro-mouse.c
@@ -0,0 +1,32 @@
+#include "allegro-main.h"
+#include "plat-mouse.h"
+
+int mouse_buttons;
+
+void mouse_init()
+{
+ install_mouse();
+}
+
+void mouse_close()
+{
+}
+
+void mouse_poll_host()
+{
+ //poll_mouse();
+ mouse_buttons = mouse_b;
+}
+
+void mouse_get_mickeys(int *x, int *y, int *z)
+{
+ if (mousecapture)
+ {
+ get_mouse_mickeys(x, y);
+ *z = 0;
+// position_mouse(64, 64);
+ }
+ else
+ *x = *y = *z = 0;
+}
+
diff --git a/src/allegro-video.c b/src/allegro-video.c
new file mode 100644
index 0000000..5ca4da3
--- /dev/null
+++ b/src/allegro-video.c
@@ -0,0 +1,131 @@
+#include "allegro-main.h"
+#include "ibm.h"
+#include "video.h"
+
+#include "allegro-video.h"
+
+static PALETTE cgapal=
+{
+ {0,0,0},{0,42,0},{42,0,0},{42,21,0},
+ {0,0,0},{0,42,42},{42,0,42},{42,42,42},
+ {0,0,0},{21,63,21},{63,21,21},{63,63,21},
+ {0,0,0},{21,63,63},{63,21,63},{63,63,63},
+
+ {0,0,0},{0,0,42},{0,42,0},{0,42,42},
+ {42,0,0},{42,0,42},{42,21,00},{42,42,42},
+ {21,21,21},{21,21,63},{21,63,21},{21,63,63},
+ {63,21,21},{63,21,63},{63,63,21},{63,63,63},
+
+ {0,0,0},{0,21,0},{0,0,42},{0,42,42},
+ {42,0,21},{21,10,21},{42,0,42},{42,0,63},
+ {21,21,21},{21,63,21},{42,21,42},{21,63,63},
+ {63,0,0},{42,42,0},{63,21,42},{41,41,41},
+
+ {0,0,0},{0,42,42},{42,0,0},{42,42,42},
+ {0,0,0},{0,42,42},{42,0,0},{42,42,42},
+ {0,0,0},{0,63,63},{63,0,0},{63,63,63},
+ {0,0,0},{0,63,63},{63,0,0},{63,63,63},
+};
+
+static uint32_t pal_lookup[256];
+
+static void allegro_blit_memtoscreen(int x, int y, int y1, int y2, int w, int h);
+static void allegro_blit_memtoscreen_8(int x, int y, int w, int h);
+static BITMAP *buffer32_vscale;
+void allegro_video_init()
+{
+ int c;
+
+ set_color_depth(32);
+ set_gfx_mode(GFX_AUTODETECT_WINDOWED, 640, 480, 0, 0);
+ video_blit_memtoscreen_func = allegro_blit_memtoscreen;
+ video_blit_memtoscreen_8_func = allegro_blit_memtoscreen_8;
+
+ for (c = 0; c < 256; c++)
+ pal_lookup[c] = makecol(cgapal[c].r << 2, cgapal[c].g << 2, cgapal[c].b << 2);
+
+ buffer32_vscale = create_bitmap(2048, 2048);
+}
+
+void allegro_video_close()
+{
+ destroy_bitmap(buffer32_vscale);
+}
+
+void allegro_video_update_size(int x, int y)
+{
+ if (set_gfx_mode(GFX_AUTODETECT_WINDOWED, x, y, 0, 0))
+ fatal("Failed to set gfx mode %i,%i : %s\n", x, y, allegro_error);
+}
+
+static void allegro_blit_memtoscreen(int x, int y, int y1, int y2, int w, int h)
+{
+ if (h < winsizey)
+ {
+ int yy;
+
+ for (yy = y+y1; yy < y+y2; yy++)
+ {
+ if (yy >= 0)
+ {
+ memcpy(&((uint32_t *)buffer32_vscale->line[yy*2])[x], &((uint32_t *)buffer32->line[yy])[x], w*4);
+ memcpy(&((uint32_t *)buffer32_vscale->line[(yy*2)+1])[x], &((uint32_t *)buffer32->line[yy])[x], w*4);
+ }
+ }
+
+ video_blit_complete();
+ blit(buffer32_vscale, screen, x, (y+y1)*2, 0, y1, w, (y2-y1)*2);
+ }
+ else
+ {
+ blit(buffer32, screen, x, y+y1, 0, y1, w, y2-y1);
+ video_blit_complete();
+ }
+}
+
+static void allegro_blit_memtoscreen_8(int x, int y, int w, int h)
+{
+ int xx, yy;
+ int line_double = (winsizey > h) ? 1 : 0;
+
+ if (y < 0)
+ {
+ h += y;
+ y = 0;
+ }
+
+ for (yy = y; yy < y+h; yy++)
+ {
+ int dy = line_double ? yy*2 : yy;
+ if (dy < buffer->h)
+ {
+ if (line_double)
+ {
+ for (xx = x; xx < x+w; xx++)
+ {
+ ((uint32_t *)buffer32->line[dy])[xx] =
+ ((uint32_t *)buffer32->line[dy + 1])[xx] = pal_lookup[buffer->line[yy][xx]];
+ }
+ }
+ else
+ {
+ for (xx = x; xx < x+w; xx++)
+ ((uint32_t *)buffer32->line[dy])[xx] = pal_lookup[buffer->line[yy][xx]];
+ }
+ }
+ }
+ video_blit_complete();
+ if (readflash)
+ {
+ if (line_double)
+ rectfill(buffer32, x+SCREEN_W-40, y*2+8, SCREEN_W-8, y*2+14, makecol(255, 255, 255));
+ else
+ rectfill(buffer32, x+SCREEN_W-40, y+8, SCREEN_W-8, y+14, makecol(255, 255, 255));
+ readflash = 0;
+ }
+
+ if (line_double)
+ blit(buffer32, screen, x, y*2, 0, 0, w, h*2);
+ else
+ blit(buffer32, screen, x, y, 0, 0, w, h);
+}
diff --git a/src/allegro-video.h b/src/allegro-video.h
new file mode 100644
index 0000000..e82419a
--- /dev/null
+++ b/src/allegro-video.h
@@ -0,0 +1,3 @@
+void allegro_video_init();
+void allegro_video_close();
+void allegro_video_update_size(int x, int y);
diff --git a/src/amstrad.c b/src/amstrad.c
index 714380c..4c5cdf9 100644
--- a/src/amstrad.c
+++ b/src/amstrad.c
@@ -1,73 +1,26 @@
#include
#include "ibm.h"
+#include "dac.h"
#include "io.h"
#include "keyboard.h"
#include "lpt.h"
#include "mouse.h"
-#include "video.h"
-#include "fdc.h"
-#include "x86.h"
#include "amstrad.h"
static uint8_t amstrad_dead;
-int amstrad_latch = 0;
-static uint8_t amstrad_language;
uint8_t amstrad_read(uint16_t port, void *priv)
{
- uint8_t temp;
-
pclog("amstrad_read : %04X\n",port);
switch (port)
{
- case 0x378:
- return lpt1_read(port, NULL);
case 0x379:
- return lpt1_read(port, NULL) | (amstrad_language & 7);
+ return 7 | readdacfifo();
case 0x37a:
- temp = lpt1_read(port, NULL) & 0x1f;
- if (romset == ROM_PC1512) return temp | 0x20;
- if (romset == ROM_PC200 || romset == ROM_PPC512)
- {
- if (fdc_discchange_read())
- temp |= 0x20;
-/* DIP switches 4,5: Initial video mode */
- if (video_is_cga())
- temp |= 0x80; /* CGA 80 */
- else if (video_is_mda())
- temp |= 0xc0; /* MDA */
- return temp;
- }
- if (romset == ROM_PC1640)
- {
- if (video_is_cga())
- temp |= 0x80;
- else if (video_is_mda())
- temp |= 0xc0;
-
- switch (amstrad_latch)
- {
- case AMSTRAD_NOLATCH:
- temp &= ~0x20;
- break;
- case AMSTRAD_SW9:
- temp &= ~0x20;
- break;
- case AMSTRAD_SW10:
- temp |= 0x20;
- break;
- }
- }
- return temp;
- case 0x3de:
- if (romset == ROM_PC200 || romset == ROM_PPC512)
- {
-/* Read DIP switches / internal display adapter status. This code is only
- * reached if the IDA is disabled; if it is enabled this read will be
- * handled by the video card */
- }
- return 0x20; /* Disable IDA */
+ if (romset == ROM_PC1512) return 0x20;
+ if (romset == ROM_PC200) return 0x80;
+ return 0;
case 0xdead:
return amstrad_dead;
}
@@ -78,16 +31,6 @@ void amstrad_write(uint16_t port, uint8_t val, void *priv)
{
switch (port)
{
- case 0x66:
- softresetx86();
- break;
-
- case 0x378:
- case 0x379:
- case 0x37a:
- lpt1_write(port, val, NULL);
- break;
-
case 0xdead:
amstrad_dead = val;
break;
@@ -166,170 +109,6 @@ void amstrad_init()
io_sethandler(0x0078, 0x0001, amstrad_mouse_read, NULL, NULL, amstrad_mouse_write, NULL, NULL, NULL);
io_sethandler(0x007a, 0x0001, amstrad_mouse_read, NULL, NULL, amstrad_mouse_write, NULL, NULL, NULL);
- io_sethandler(0x0066, 0x0001, NULL, NULL, NULL, amstrad_write, NULL, NULL, NULL);
- io_sethandler(0x0378, 0x0003, amstrad_read, NULL, NULL, amstrad_write, NULL, NULL, NULL);
+ io_sethandler(0x0379, 0x0002, amstrad_read, NULL, NULL, NULL, NULL, NULL, NULL);
io_sethandler(0xdead, 0x0001, amstrad_read, NULL, NULL, amstrad_write, NULL, NULL, NULL);
- if ((romset == ROM_PC200 || romset == ROM_PPC512) && gfxcard != GFX_BUILTIN)
- io_sethandler(0x03de, 0x0001, amstrad_read, NULL, NULL, amstrad_write, NULL, NULL, NULL);
-
-
}
-
-static void *ams1512_init()
-{
- amstrad_language = device_get_config_int("language");
- return &amstrad_language;
-}
-
-device_config_t ams1512_config[] =
-{
- {
- .name = "language",
- .description = "BIOS language",
- .type = CONFIG_SELECTION,
- .selection =
- {
- {
- .description = "English",
- .value = 7
- },
- {
- .description = "German",
- .value = 6
- },
- {
- .description = "French",
- .value = 5
- },
- {
- .description = "Spanish",
- .value = 4
- },
- {
- .description = "Danish",
- .value = 3
- },
- {
- .description = "Swedish",
- .value = 2
- },
- {
- .description = "Italian",
- .value = 1
- },
- {
- .description = "Diagnostic mode",
- .value = 0
- },
- {
- .description = ""
- }
- },
- .default_int = 7
- },
- {
- .type = -1
- }
-};
-
-
-device_config_t ams2086_config[] =
-{
- {
- .name = "language",
- .description = "BIOS language",
- .type = CONFIG_SELECTION,
- .selection =
- {
- {
- .description = "English",
- .value = 7
- },
- {
- .description = "Diagnostic mode",
- .value = 0
- },
- {
- .description = ""
- }
- },
- .default_int = 7
- },
- {
- .type = -1
- }
-};
-
-
-
-device_config_t ams3086_config[] =
-{
- {
- .name = "language",
- .description = "BIOS language",
- .type = CONFIG_SELECTION,
- .selection =
- {
- {
- .description = "English",
- .value = 7
- },
- {
- .description = "Diagnostic mode",
- .value = 3
- },
- {
- .description = ""
- }
- },
- .default_int = 7
- },
- {
- .type = -1
- }
-};
-
-
-
-
-device_t ams1512_device =
-{
- "Amstrad PC1512 (BIOS)",
- 0,
- ams1512_init,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- ams1512_config
-};
-
-
-
-device_t ams2086_device =
-{
- "Amstrad PC2086 (BIOS)",
- 0,
- ams1512_init,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- ams2086_config
-};
-
-
-device_t ams3086_device =
-{
- "Amstrad PC3086 (BIOS)",
- 0,
- ams1512_init,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL,
- ams3086_config
-};
diff --git a/src/amstrad.h b/src/amstrad.h
index 0c54fcb..a4250d3 100644
--- a/src/amstrad.h
+++ b/src/amstrad.h
@@ -1,18 +1,3 @@
-#include "mouse.h"
-#include "device.h"
-
void amstrad_init();
extern mouse_t mouse_amstrad;
-extern int amstrad_latch;
-
-extern device_t ams1512_device;
-extern device_t ams2086_device;
-extern device_t ams3086_device;
-
-enum
-{
- AMSTRAD_NOLATCH,
- AMSTRAD_SW9,
- AMSTRAD_SW10
-};
diff --git a/src/bswap.h b/src/bswap.h
deleted file mode 100644
index c473c50..0000000
--- a/src/bswap.h
+++ /dev/null
@@ -1,202 +0,0 @@
-#ifndef BSWAP_H
-#define BSWAP_H
-
-//#include "config-host.h"
-
-#include
-
-#ifdef HAVE_BYTESWAP_H
-#include
-#else
-
-#define bswap_16(x) \
-({ \
- uint16_t __x = (x); \
- ((uint16_t)( \
- (((uint16_t)(__x) & (uint16_t)0x00ffU) << 8) | \
- (((uint16_t)(__x) & (uint16_t)0xff00U) >> 8) )); \
-})
-
-#define bswap_32(x) \
-({ \
- uint32_t __x = (x); \
- ((uint32_t)( \
- (((uint32_t)(__x) & (uint32_t)0x000000ffUL) << 24) | \
- (((uint32_t)(__x) & (uint32_t)0x0000ff00UL) << 8) | \
- (((uint32_t)(__x) & (uint32_t)0x00ff0000UL) >> 8) | \
- (((uint32_t)(__x) & (uint32_t)0xff000000UL) >> 24) )); \
-})
-
-#define bswap_64(x) \
-({ \
- uint64_t __x = (x); \
- ((uint64_t)( \
- (uint64_t)(((uint64_t)(__x) & (uint64_t)0x00000000000000ffULL) << 56) | \
- (uint64_t)(((uint64_t)(__x) & (uint64_t)0x000000000000ff00ULL) << 40) | \
- (uint64_t)(((uint64_t)(__x) & (uint64_t)0x0000000000ff0000ULL) << 24) | \
- (uint64_t)(((uint64_t)(__x) & (uint64_t)0x00000000ff000000ULL) << 8) | \
- (uint64_t)(((uint64_t)(__x) & (uint64_t)0x000000ff00000000ULL) >> 8) | \
- (uint64_t)(((uint64_t)(__x) & (uint64_t)0x0000ff0000000000ULL) >> 24) | \
- (uint64_t)(((uint64_t)(__x) & (uint64_t)0x00ff000000000000ULL) >> 40) | \
- (uint64_t)(((uint64_t)(__x) & (uint64_t)0xff00000000000000ULL) >> 56) )); \
-})
-
-#endif /* !HAVE_BYTESWAP_H */
-
-static inline uint16_t bswap16(uint16_t x)
-{
- return bswap_16(x);
-}
-
-static inline uint32_t bswap32(uint32_t x)
-{
- return bswap_32(x);
-}
-
-static inline uint64_t bswap64(uint64_t x)
-{
- return bswap_64(x);
-}
-
-static inline void bswap16s(uint16_t *s)
-{
- *s = bswap16(*s);
-}
-
-static inline void bswap32s(uint32_t *s)
-{
- *s = bswap32(*s);
-}
-
-static inline void bswap64s(uint64_t *s)
-{
- *s = bswap64(*s);
-}
-
-#if defined(WORDS_BIGENDIAN)
-#define be_bswap(v, size) (v)
-#define le_bswap(v, size) bswap ## size(v)
-#define be_bswaps(v, size)
-#define le_bswaps(p, size) *p = bswap ## size(*p);
-#else
-#define le_bswap(v, size) (v)
-#define be_bswap(v, size) bswap ## size(v)
-#define le_bswaps(v, size)
-#define be_bswaps(p, size) *p = bswap ## size(*p);
-#endif
-
-#define CPU_CONVERT(endian, size, type)\
-static inline type endian ## size ## _to_cpu(type v)\
-{\
- return endian ## _bswap(v, size);\
-}\
-\
-static inline type cpu_to_ ## endian ## size(type v)\
-{\
- return endian ## _bswap(v, size);\
-}\
-\
-static inline void endian ## size ## _to_cpus(type *p)\
-{\
- endian ## _bswaps(p, size)\
-}\
-\
-static inline void cpu_to_ ## endian ## size ## s(type *p)\
-{\
- endian ## _bswaps(p, size)\
-}\
-\
-static inline type endian ## size ## _to_cpup(const type *p)\
-{\
- return endian ## size ## _to_cpu(*p);\
-}\
-\
-static inline void cpu_to_ ## endian ## size ## w(type *p, type v)\
-{\
- *p = cpu_to_ ## endian ## size(v);\
-}
-
-CPU_CONVERT(be, 16, uint16_t)
-CPU_CONVERT(be, 32, uint32_t)
-CPU_CONVERT(be, 64, uint64_t)
-
-CPU_CONVERT(le, 16, uint16_t)
-CPU_CONVERT(le, 32, uint32_t)
-CPU_CONVERT(le, 64, uint64_t)
-
-/* unaligned versions (optimized for frequent unaligned accesses)*/
-
-#if defined(__i386__) || defined(__powerpc__)
-
-#define cpu_to_le16wu(p, v) cpu_to_le16w(p, v)
-#define cpu_to_le32wu(p, v) cpu_to_le32w(p, v)
-#define le16_to_cpupu(p) le16_to_cpup(p)
-#define le32_to_cpupu(p) le32_to_cpup(p)
-
-#define cpu_to_be16wu(p, v) cpu_to_be16w(p, v)
-#define cpu_to_be32wu(p, v) cpu_to_be32w(p, v)
-
-#else
-
-static inline void cpu_to_le16wu(uint16_t *p, uint16_t v)
-{
- uint8_t *p1 = (uint8_t *)p;
-
- p1[0] = v;
- p1[1] = v >> 8;
-}
-
-static inline void cpu_to_le32wu(uint32_t *p, uint32_t v)
-{
- uint8_t *p1 = (uint8_t *)p;
-
- p1[0] = v;
- p1[1] = v >> 8;
- p1[2] = v >> 16;
- p1[3] = v >> 24;
-}
-
-static inline uint16_t le16_to_cpupu(const uint16_t *p)
-{
- const uint8_t *p1 = (const uint8_t *)p;
- return p1[0] | (p1[1] << 8);
-}
-
-static inline uint32_t le32_to_cpupu(const uint32_t *p)
-{
- const uint8_t *p1 = (const uint8_t *)p;
- return p1[0] | (p1[1] << 8) | (p1[2] << 16) | (p1[3] << 24);
-}
-
-static inline void cpu_to_be16wu(uint16_t *p, uint16_t v)
-{
- uint8_t *p1 = (uint8_t *)p;
-
- p1[0] = v >> 8;
- p1[1] = v;
-}
-
-static inline void cpu_to_be32wu(uint32_t *p, uint32_t v)
-{
- uint8_t *p1 = (uint8_t *)p;
-
- p1[0] = v >> 24;
- p1[1] = v >> 16;
- p1[2] = v >> 8;
- p1[3] = v;
-}
-
-#endif
-
-#ifdef WORDS_BIGENDIAN
-#define cpu_to_32wu cpu_to_be32wu
-#else
-#define cpu_to_32wu cpu_to_le32wu
-#endif
-
-#undef le_bswap
-#undef be_bswap
-#undef le_bswaps
-#undef be_bswaps
-
-#endif /* BSWAP_H */
diff --git a/src/cassette.c b/src/cassette.c
deleted file mode 100644
index 68f495a..0000000
--- a/src/cassette.c
+++ /dev/null
@@ -1,187 +0,0 @@
-/************************************************************************
-
- PCem: IBM 5150 Cassette support
-
- Copyright (C) 2019 John Elliott
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
-*************************************************************************/
-
-#include
-#include "ibm.h"
-#include "cpu.h"
-#include "x86.h"
-#include "device.h"
-#include "pzx.h"
-
-char cassettefn[256];
-
-typedef struct cassette_t
-{
- uint8_t motor; /* Motor status */
- pzxfile_t pzx;
- int cycles_last; /* Cycle count at last cassette poll */
-
-} cassette_t;
-
-extern device_t cassette_device;
-
-
-static cassette_t *st_cas;
-
-
-
-#define CAS_LOG(x) pclog x
-// #define CAS_LOG(x)
-
-
-/* The PCem CPU uses IBM cycles (4.77MHz). PZX uses Spectrum cycles (3.5MHz)
- * so scale accordingly. */
-static int32_t pzx_cycles(int32_t pc)
-{
- double d = pc;
-
- return (int32_t)(((d * 3.5) / 4.772728) + 0.5);
-}
-
-void cassette_eject(void)
-{
- if (st_cas->pzx.input)
- {
- pzx_close(&st_cas->pzx);
- }
- cassettefn[0] = 0;
-}
-
-void cassette_load(const char *filename)
-{
- FILE *fp;
- unsigned char magic[8];
-
- if (!filename) return;
-
- fp = fopen(filename, "rb");
- if (!fp)
- {
- /* Warn user? */
- CAS_LOG(("Failed to open cassette input %s\n", filename));
- return;
- }
- memset(magic, 0, sizeof(magic));
- fread(magic, 1, sizeof(magic), fp);
-
- /* Check for PZX signature. In due course support could be added for
- * other formats like TZX */
- if (!memcmp(magic, "PZXT", 4))
- {
- const char *result;
-
- result = pzx_open(&st_cas->pzx, fp);
-
- if (result)
- {
- CAS_LOG(("Failed to open %s as PZX: %s\n",
- filename, result));
- fclose(fp);
- return;
- }
- strcpy(cassettefn, filename);
- }
-}
-
-
-uint8_t cassette_input(void)
-{
- int ticks;
-
- /* While motor is off, result is loopback */
- if (!st_cas->motor)
- {
- return ppispeakon;
- }
- /* If there is no tapefile open don't try to extract data */
- if (st_cas->pzx.input == NULL) return 0;
- /* Otherwise see how many ticks there have been since the last input */
- if (st_cas->cycles_last == -1)
- {
- st_cas->cycles_last = cycles;
- }
- if (cycles <= st_cas->cycles_last)
- {
- ticks = (st_cas->cycles_last - cycles);
- }
- else
- {
- ticks = (st_cas->cycles_last + (cpu_get_speed() / 100) - cycles);
- }
- st_cas->cycles_last = cycles;
-
- return pzx_advance(&st_cas->pzx, pzx_cycles(ticks));
-}
-
-
-
-void cassette_set_motor(uint8_t on)
-{
- if (on && !st_cas->motor)
- {
- CAS_LOG(("Start cassette motor\n"));
- st_cas->cycles_last = -1;
- }
- if (st_cas->motor && !on)
- {
- CAS_LOG(("Stop cassette motor\n"));
- st_cas->cycles_last = -1;
- }
- st_cas->motor = on;
-}
-
-
-static void *cassette_init(void)
-{
- cassette_t *cas = malloc(sizeof(cassette_t));
-
- memset(cas, 0, sizeof(cassette_t));
- pzx_init(&cas->pzx);
-
- st_cas = cas;
- return cas;
-}
-
-
-static void cassette_close(void *p)
-{
- cassette_t *cas = (cassette_t *)p;
-
- pzx_close(&cas->pzx);
-
- free(cas);
-}
-
-
-device_t cassette_device =
-{
- "Cassette",
- 0,
- cassette_init,
- cassette_close,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL
-};
-
diff --git a/src/cassette.h b/src/cassette.h
deleted file mode 100644
index de77354..0000000
--- a/src/cassette.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/************************************************************************
-
- PCem: IBM 5150 cassette support
-
- Copyright (C) 2019 John Elliott
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
-*************************************************************************/
-
-extern device_t cassette_device;
-
-uint8_t cassette_input(void);
-void cassette_set_motor(uint8_t on);
-void cassette_eject(void);
-void cassette_load(const char *filename);
-
-extern char cassettefn[256];
diff --git a/src/cbm_io.c b/src/cbm_io.c
deleted file mode 100644
index ec73560..0000000
--- a/src/cbm_io.c
+++ /dev/null
@@ -1,39 +0,0 @@
-#include "ibm.h"
-
-#include "io.h"
-#include "lpt.h"
-#include "serial.h"
-
-static void cbm_io_write(uint16_t port, uint8_t val, void *p)
-{
- serial1_remove();
- serial2_remove();
- lpt1_remove();
- lpt2_remove();
- switch (val & 3)
- {
- case 1:
- lpt1_init(0x3bc);
- break;
- case 2:
- lpt1_init(0x378);
- break;
- case 3:
- lpt1_init(0x278);
- break;
- }
- switch (val & 0xc)
- {
- case 0x4:
- serial1_set(0x2f8, 3);
- break;
- case 0x8:
- serial1_set(0x3f8, 4);
- break;
- }
-}
-
-void cbm_io_init()
-{
- io_sethandler(0x0230, 0x0001, NULL,NULL,NULL, cbm_io_write,NULL,NULL, NULL);
-}
diff --git a/src/cbm_io.h b/src/cbm_io.h
deleted file mode 100644
index 1e3d5e6..0000000
--- a/src/cbm_io.h
+++ /dev/null
@@ -1 +0,0 @@
-void cbm_io_init();
diff --git a/src/cdrom-image.cc b/src/cdrom-image.cc
deleted file mode 100644
index 99ce8ad..0000000
--- a/src/cdrom-image.cc
+++ /dev/null
@@ -1,548 +0,0 @@
-#include
-#include "cdrom-image.h"
-#include "dosbox/cdrom.h"
-
-extern "C"
-{
-#include "ibm.h"
-#include "ide.h"
-}
-
-char image_path[1024];
-static int image_changed = 0;
-
-extern ATAPI image_atapi;
-
-CDROM_Interface_Image *cdrom = NULL;
-
-#define MSFtoLBA(m,s,f) (((((m*60)+s)*75)+f))
-
-static uint32_t cdrom_capacity = 0;
-
-enum
-{
- CD_STOPPED = 0,
- CD_PLAYING,
- CD_PAUSED
-};
-
-static int image_cd_state = CD_STOPPED;
-static uint32_t image_cd_pos = 0, image_cd_end = 0;
-
-#define BUF_SIZE 32768
-static int16_t cd_buffer[BUF_SIZE];
-static int cd_buflen = 0;
-
-void image_audio_callback(int16_t *output, int len)
-{
- if (image_cd_state != CD_PLAYING)
- return;
- while (cd_buflen < len)
- {
- if (image_cd_pos < image_cd_end)
- {
-// pclog("Read to %i\n", cd_buflen);
- if (!cdrom->ReadSector((unsigned char *)&cd_buffer[cd_buflen], true, image_cd_pos - 150))
- {
-// pclog("DeviceIoControl returned false\n");
- memset(&cd_buffer[cd_buflen], 0, (BUF_SIZE - cd_buflen) * 2);
- image_cd_state = CD_STOPPED;
- cd_buflen = len;
- }
- else
- {
-// pclog("DeviceIoControl returned true\n");
- image_cd_pos++;
- cd_buflen += (RAW_SECTOR_SIZE / 2);
- }
- }
- else
- {
- memset(&cd_buffer[cd_buflen], 0, (BUF_SIZE - cd_buflen) * 2);
- image_cd_state = CD_STOPPED;
- cd_buflen = len;
- }
- }
- memcpy(output, cd_buffer, len * 2);
- memmove(cd_buffer, &cd_buffer[len], (BUF_SIZE - len) * 2);
- cd_buflen -= len;
-}
-
-void image_audio_stop()
-{
- image_cd_state = CD_STOPPED;
-}
-
-static int image_is_track_audio(uint32_t pos, int ismsf)
-{
- if (!cdrom) return 0;
- if (ismsf)
- {
- int m = (pos >> 16) & 0xff;
- int s = (pos >> 8) & 0xff;
- int f = pos & 0xff;
- pos = MSF_TO_FRAMES(m, s, f);
- }
-
- unsigned char attr;
- TMSF tmsf;
- int number;
- cdrom->GetAudioTrackInfo(cdrom->GetTrack(pos), number, tmsf, attr);
-
- return attr == AUDIO_TRACK;
-}
-
-static void image_playaudio(uint32_t pos, uint32_t len, int ismsf)
-{
- if (!cdrom) return;
- int number;
- unsigned char attr;
- TMSF tmsf;
- cdrom->GetAudioTrackInfo(cdrom->GetTrack(pos), number, tmsf, attr);
- if (attr == DATA_TRACK)
- {
- pclog("Can't play data track\n");
- image_cd_pos = 0;
- image_cd_state = CD_STOPPED;
- return;
- }
- pclog("Play audio - %08X %08X %i\n", pos, len, ismsf);
- if (ismsf)
- {
- int m, s, f;
- m = (pos >> 16) & 0xff;
- s = (pos >> 8) & 0xff;
- f = pos & 0xff;
- pos = MSFtoLBA(m, s, f);
-
- m = (len >> 16) & 0xff;
- s = (len >> 8) & 0xff;
- f = len & 0xff;
- len = MSFtoLBA(m, s, f);
-
- pclog("MSF - pos = %08X len = %08X\n", pos, len);
- }
- else
- len += pos;
- image_cd_pos = pos;// + 150;
- image_cd_end = len;// + 150;
- image_cd_state = CD_PLAYING;
- if (image_cd_pos < 150)
- image_cd_pos = 150;
- cd_buflen = 0;
- pclog("Audio start %08X %08X %i %i %i\n", image_cd_pos, image_cd_end, image_cd_state, cd_buflen, len);
-}
-
-static void image_pause(void)
-{
- if (!cdrom) return;
- if (image_cd_state == CD_PLAYING)
- image_cd_state = CD_PAUSED;
-}
-
-static void image_resume(void)
-{
- if (!cdrom) return;
- if (image_cd_state == CD_PAUSED)
- image_cd_state = CD_PLAYING;
-}
-
-static void image_stop(void)
-{
- if (!cdrom) return;
- image_cd_state = CD_STOPPED;
-}
-
-static void image_seek(uint32_t pos)
-{
- if (!cdrom) return;
- image_cd_pos = pos;
- image_cd_state = CD_STOPPED;
-}
-
-static int image_ready(void)
-{
- if (!cdrom)
- return 0;
-
- if (strlen(image_path) == 0)
- return 0;
-
- if (image_changed)
- image_changed = 0;
-
- return 1;
-}
-
-static int image_get_last_block(unsigned char starttrack, int msf, int maxlen, int single)
-{
- int c;
- uint32_t lb=0;
-
- if (!cdrom) return 0;
-
- int first_track;
- int last_track;
- int number;
- unsigned char attr;
- TMSF tmsf;
- cdrom->GetAudioTracks(first_track, last_track, tmsf);
-
- for (c = 0; c <= last_track; c++)
- {
- uint32_t address;
- cdrom->GetAudioTrackInfo(c+1, number, tmsf, attr);
- address = MSFtoLBA(tmsf.min, tmsf.sec, tmsf.fr) - 150;
- if (address > lb)
- lb = address;
- }
- return lb;
-}
-
-static int image_medium_changed(void)
-{
- if (!cdrom)
- return 0;
-
- if (strlen(image_path) == 0)
- return 0;
-
- if (old_cdrom_drive != cdrom_drive)
- {
- old_cdrom_drive = cdrom_drive;
- return 1;
- }
-
- if (image_changed)
- {
- image_changed = 0;
- return 1;
- }
- return 0;
-}
-
-static uint8_t image_getcurrentsubchannel(uint8_t *b, int msf)
-{
- if (!cdrom) return 0;
- uint8_t ret;
- int pos=0;
-
- uint32_t cdpos = image_cd_pos;
- if (cdpos >= 150) cdpos -= 150;
- TMSF relPos, absPos;
- unsigned char attr, track, index;
- cdrom->GetAudioSub(cdpos, attr, track, index, relPos, absPos);
-
- if (image_cd_state == CD_PLAYING)
- ret = 0x11;
- else if (image_cd_state == CD_PAUSED)
- ret = 0x12;
- else
- ret = 0x13;
-
- b[pos++] = attr;
- b[pos++] = track;
- b[pos++] = index;
-
- if (msf)
- {
- uint32_t dat = MSFtoLBA(absPos.min, absPos.sec, absPos.fr);
- b[pos + 3] = (uint8_t)(dat % 75); dat /= 75;
- b[pos + 2] = (uint8_t)(dat % 60); dat /= 60;
- b[pos + 1] = (uint8_t)dat;
- b[pos] = 0;
- pos += 4;
- dat = MSFtoLBA(relPos.min, relPos.sec, relPos.fr);
- b[pos + 3] = (uint8_t)(dat % 75); dat /= 75;
- b[pos + 2] = (uint8_t)(dat % 60); dat /= 60;
- b[pos + 1] = (uint8_t)dat;
- b[pos] = 0;
- pos += 4;
- }
- else
- {
- uint32_t dat = MSFtoLBA(absPos.min, absPos.sec, absPos.fr);
- b[pos++] = (dat >> 24) & 0xff;
- b[pos++] = (dat >> 16) & 0xff;
- b[pos++] = (dat >> 8) & 0xff;
- b[pos++] = dat & 0xff;
- dat = MSFtoLBA(relPos.min, relPos.sec, relPos.fr);
- b[pos++] = (dat >> 24) & 0xff;
- b[pos++] = (dat >> 16) & 0xff;
- b[pos++] = (dat >> 8) & 0xff;
- b[pos++] = dat & 0xff;
- }
-
- return ret;
-}
-
-static void image_eject(void)
-{
-}
-
-static void image_load(void)
-{
-}
-
-static int image_readsector(uint8_t *b, int sector, int count)
-{
- if (!cdrom) return -1;
- return !cdrom->ReadSectors((PhysPt)b, false, sector, count);
-}
-
-static void image_readsector_raw(uint8_t *b, int sector)
-{
- if (!cdrom) return;
- cdrom->ReadSector(b, true, sector);
-}
-
-static int image_readtoc(unsigned char *b, unsigned char starttrack, int msf, int maxlen, int single)
-{
- if (!cdrom) return 0;
- int len=4;
- int c,d;
- uint32_t temp;
-
- int first_track;
- int last_track;
- int number;
- unsigned char attr;
- TMSF tmsf;
- cdrom->GetAudioTracks(first_track, last_track, tmsf);
-
- b[2] = first_track;
- b[3] = last_track;
-
- d = 0;
- for (c = 0; c <= last_track; c++)
- {
- cdrom->GetAudioTrackInfo(c+1, number, tmsf, attr);
- if (number >= starttrack)
- {
- d=c;
- break;
- }
- }
- cdrom->GetAudioTrackInfo(c+1, number, tmsf, attr);
- b[2] = number;
-
- for (c = d; c <= last_track; c++)
- {
- if ((len + 8) > maxlen)
- break;
- cdrom->GetAudioTrackInfo(c+1, number, tmsf, attr);
-
-// pclog("Len %i max %i Track %02X - %02X %02X %02i:%02i:%02i %08X\n",len,maxlen,toc[c].cdte_track,toc[c].cdte_adr,toc[c].cdte_ctrl,toc[c].cdte_addr.msf.minute, toc[c].cdte_addr.msf.second, toc[c].cdte_addr.msf.frame,MSFtoLBA(toc[c].cdte_addr.msf.minute, toc[c].cdte_addr.msf.second, toc[c].cdte_addr.msf.frame));
- b[len++] = 0; /* reserved */
- b[len++] = attr;
- b[len++] = number; /* track number */
- b[len++] = 0; /* reserved */
-
- if (msf)
- {
- b[len++] = 0;
- b[len++] = tmsf.min;
- b[len++] = tmsf.sec;
- b[len++] = tmsf.fr;
- }
- else
- {
- temp = MSFtoLBA(tmsf.min, tmsf.sec, tmsf.fr) - 150;
- b[len++] = temp >> 24;
- b[len++] = temp >> 16;
- b[len++] = temp >> 8;
- b[len++] = temp;
- }
- if (single)
- break;
- }
- b[0] = (uint8_t)(((len-2) >> 8) & 0xff);
- b[1] = (uint8_t)((len-2) & 0xff);
- /*
- pclog("Table of Contents:\n");
- pclog("First track - %02X\n", first_track);
- pclog("Last track - %02X\n", last_track);
- for (c = 0; c <= last_track; c++)
- {
- cdrom->GetAudioTrackInfo(c+1, number, tmsf, attr);
- pclog("Track %02X - number %02X control %02X adr %02X address %02X %02X %02X %02X\n", c, number, attr, 0, 0, tmsf.min, tmsf.sec, tmsf.fr);
- }
- for (c = 0;c <= last_track; c++) {
- cdrom->GetAudioTrackInfo(c+1, number, tmsf, attr);
- pclog("Track %02X - number %02X control %02X adr %02X address %06X\n", c, number, attr, 0, MSF_TO_FRAMES(tmsf.min, tmsf.sec, tmsf.fr));
- }
- */
- return len;
-}
-
-static int image_readtoc_session(unsigned char *b, int msf, int maxlen)
-{
- if (!cdrom) return 0;
- int len = 4;
-
- int number;
- TMSF tmsf;
- unsigned char attr;
- cdrom->GetAudioTrackInfo(1, number, tmsf, attr);
-
-// pclog("Read TOC session - %i %02X %02X %i %i %02X %02X %02X\n",0, 0, 0,1,1,attr,0,number);
-
- b[2] = 1;
- b[3] = 1;
- b[len++] = 0; /* reserved */
- b[len++] = attr;
- b[len++] = number; /* track number */
- b[len++] = 0; /* reserved */
- if (msf)
- {
- b[len++] = 0;
- b[len++] = tmsf.min;
- b[len++] = tmsf.sec;
- b[len++] = tmsf.fr;
- }
- else
- {
- uint32_t temp = MSFtoLBA(tmsf.min, tmsf.sec, tmsf.fr) - 150;
- b[len++] = temp >> 24;
- b[len++] = temp >> 16;
- b[len++] = temp >> 8;
- b[len++] = temp;
- }
-
- return len;
-}
-
-static int image_readtoc_raw(unsigned char *b, int maxlen)
-{
- if (!cdrom) return 0;
-
- int track;
- int len = 4;
-
- int first_track;
- int last_track;
- int number;
- unsigned char attr;
- TMSF tmsf;
- cdrom->GetAudioTracks(first_track, last_track, tmsf);
-
- b[2] = first_track;
- b[3] = last_track;
-
- for (track = first_track; track <= last_track; track++)
- {
- if ((len + 11) > maxlen)
- {
- pclog("image_readtocraw: This iteration would fill the buffer beyond the bounds, aborting...\n");
- return len;
- }
-
- cdrom->GetAudioTrackInfo(track, number, tmsf, attr);
-
-// pclog("read_toc: Track %02X - number %02X control %02X adr %02X address %02X %02X %02X %02X\n", track, toc[track].cdte_track, toc[track].cdte_ctrl, toc[track].cdte_adr, 0, toc[track].cdte_addr.msf.minute, toc[track].cdte_addr.msf.second, toc[track].cdte_addr.msf.frame);
-
- b[len++] = track;
- b[len++]= attr;
- b[len++]=0;
- b[len++]=0;
- b[len++]=0;
- b[len++]=0;
- b[len++]=0;
- b[len++]=0;
- b[len++] = tmsf.min;
- b[len++] = tmsf.sec;
- b[len++] = tmsf.fr;
- }
- return len;
-}
-
-static uint32_t image_size()
-{
- return cdrom_capacity;
-}
-
-static int image_status()
-{
- if (!cdrom) return CD_STATUS_EMPTY;
- if (cdrom->HasAudioTracks())
- {
- switch(image_cd_state)
- {
- case CD_PLAYING:
- return CD_STATUS_PLAYING;
- case CD_PAUSED:
- return CD_STATUS_PAUSED;
- case CD_STOPPED:
- default:
- return CD_STATUS_STOPPED;
- }
- }
- return CD_STATUS_DATA_ONLY;
-}
-void image_reset()
-{
-}
-
-void image_close(void)
-{
- image_cd_state = CD_STOPPED;
- if (cdrom)
- {
- delete cdrom;
- cdrom = NULL;
- }
-// memset(image_path, 0, 1024);
-}
-
-int image_open(char *fn)
-{
- if (strcmp(fn, image_path) != 0)
- image_changed = 1;
-
- /* Make sure image_changed stays when changing from an image to another image. */
- if (cdrom_drive != CDROM_IMAGE)
- image_changed = 1;
- /* strcpy fails on OSX if both parameters are pointing to the same address */
- if (image_path != fn)
- strcpy(image_path, fn);
-
- cdrom = new CDROM_Interface_Image();
- if (!cdrom->SetDevice(fn, false))
- {
- image_close();
- return 1;
- }
- image_cd_state = CD_STOPPED;
- image_cd_pos = 0;
- cd_buflen = 0;
- cdrom_capacity = image_get_last_block(0, 0, 4096, 0) + 1;
- atapi = &image_atapi;
- return 0;
-}
-
-static void image_exit(void)
-{
-}
-
-ATAPI image_atapi=
-{
- image_ready,
- image_medium_changed,
- image_readtoc,
- image_readtoc_session,
- image_readtoc_raw,
- image_getcurrentsubchannel,
- image_readsector,
- image_readsector_raw,
- image_playaudio,
- image_seek,
- image_load,
- image_eject,
- image_pause,
- image_resume,
- image_size,
- image_status,
- image_is_track_audio,
- image_stop,
- image_exit
-};
diff --git a/src/cdrom-image.h b/src/cdrom-image.h
deleted file mode 100644
index c0a7e44..0000000
--- a/src/cdrom-image.h
+++ /dev/null
@@ -1,23 +0,0 @@
-#ifndef CDROM_ISO_H
-#define CDROM_ISO_H
-
-#include
-
-extern char image_path[1024];
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-int image_open(char *fn);
-void image_reset();
-void image_close();
-
-void image_audio_callback(int16_t *output, int len);
-void image_audio_stop();
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* ! CDROM_ISO_H */
diff --git a/src/cdrom-ioctl-dummy.c b/src/cdrom-ioctl-dummy.c
deleted file mode 100644
index a4229ac..0000000
--- a/src/cdrom-ioctl-dummy.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/*Dummy CD-ROM support for other OSes*/
-
-#include
-
-int old_cdrom_drive;
-
-void ioctl_audio_callback(int16_t *output, int len) { }
-
-void ioctl_audio_stop() { }
-
-void ioctl_reset() { }
-
-void ioctl_set_drive(char d) { }
-
-int ioctl_open(char d)
-{
- return 0;
-}
-
-void ioctl_close(void) { }
diff --git a/src/cdrom-ioctl-linux.c b/src/cdrom-ioctl-linux.c
index f5299ff..cd89b36 100644
--- a/src/cdrom-ioctl-linux.c
+++ b/src/cdrom-ioctl-linux.c
@@ -4,7 +4,6 @@
#include
#include
#include
-#include
#include "ibm.h"
#include "ide.h"
#include "cdrom-ioctl.h"
@@ -14,11 +13,10 @@ static ATAPI ioctl_atapi;
static uint32_t last_block = 0;
static uint32_t cdrom_capacity = 0;
static int ioctl_inited = 0;
+static char ioctl_path[8];
static int tocvalid = 0;
-static struct cdrom_tocentry toc[256];
-static int toc_tracks;
+static struct cdrom_tocentry toc[100];
static int first_track, last_track;
-static int ioctl_fd = 0;
int old_cdrom_drive;
@@ -38,6 +36,7 @@ static int16_t cd_buffer[BUF_SIZE];
static int cd_buflen = 0;
void ioctl_audio_callback(int16_t *output, int len)
{
+ int fd;
struct cdrom_read_audio read_audio;
// pclog("Audio callback %08X %08X %i %i %i %04X %i\n", ioctl_cd_pos, ioctl_cd_end, ioctl_cd_state, cd_buflen, len, cd_buffer[4], GetTickCount());
@@ -46,8 +45,9 @@ void ioctl_audio_callback(int16_t *output, int len)
memset(output, 0, len * 2);
return;
}
+ fd = open("/dev/cdrom", O_RDONLY|O_NONBLOCK);
- if (ioctl_fd <= 0)
+ if (fd <= 0)
{
memset(output, 0, len * 2);
return;
@@ -62,7 +62,7 @@ void ioctl_audio_callback(int16_t *output, int len)
read_audio.nframes = 1;
read_audio.buf = (__u8 *)&cd_buffer[cd_buflen];
- if (ioctl(ioctl_fd, CDROMREADAUDIO, &read_audio) < 0)
+ if (ioctl(fd, CDROMREADAUDIO, &read_audio) < 0)
{
// pclog("DeviceIoControl returned false\n");
memset(&cd_buffer[cd_buflen], 0, (BUF_SIZE - cd_buflen) * 2);
@@ -83,7 +83,7 @@ void ioctl_audio_callback(int16_t *output, int len)
cd_buflen = len;
}
}
-
+ close(fd);
memcpy(output, cd_buffer, len * 2);
// for (c = 0; c < BUF_SIZE - len; c++)
// cd_buffer[c] = cd_buffer[c + cd_buflen];
@@ -196,7 +196,6 @@ static int read_toc(int fd, struct cdrom_tocentry *btoc)
{
struct cdrom_tochdr toc_hdr;
int track, err;
- int c;
//pclog("read_toc\n");
err = ioctl(fd, CDROMREADTOCHDR, &toc_hdr);
if (err == -1)
@@ -208,66 +207,64 @@ static int read_toc(int fd, struct cdrom_tocentry *btoc)
first_track = toc_hdr.cdth_trk0;
last_track = toc_hdr.cdth_trk1;
//pclog("read_toc: first_track=%i last_track=%i\n", first_track, last_track);
- memset(btoc, 0, sizeof(struct cdrom_tocentry));
+ memset(btoc, 0, sizeof(btoc));
- c = 0;
- for (track = 0; track < 256; track++)
+ for (track = toc_hdr.cdth_trk0; track <= toc_hdr.cdth_trk1; track++)
{
- btoc[c].cdte_track = track;
- btoc[c].cdte_format = CDROM_MSF;
- err = ioctl(fd, CDROMREADTOCENTRY, &btoc[c]);
+ btoc[track].cdte_track = track;
+ btoc[track].cdte_format = CDROM_MSF;
+ err = ioctl(fd, CDROMREADTOCENTRY, &btoc[track]);
if (err == -1)
{
// pclog("read_toc: CDROMREADTOCENTRY failed on track %i\n", track);
- continue;
+ return 0;
}
- c++;
-// pclog("read_toc: %i Track %02X - number %02X control %02X adr %02X address %02X %02X %02X %02X\n", c, track, btoc[c].cdte_track, btoc[c].cdte_ctrl, btoc[c].cdte_adr, 0, btoc[c].cdte_addr.msf.minute, btoc[c].cdte_addr.msf.second, btoc[c].cdte_addr.msf.frame);
+// pclog("read_toc: Track %02X - number %02X control %02X adr %02X address %02X %02X %02X %02X\n", track, toc[track].cdte_track, toc[track].cdte_ctrl, toc[track].cdte_adr, 0, toc[track].cdte_addr.msf.minute, toc[track].cdte_addr.msf.second, toc[track].cdte_addr.msf.frame);
}
-
- toc_tracks = c;
-
return 1;
}
static int ioctl_ready(void)
{
+ long size;
+ int temp;
struct cdrom_tochdr toc_hdr;
struct cdrom_tocentry toc_entry;
int err;
+ int fd = open("/dev/cdrom", O_RDONLY|O_NONBLOCK);
- if (ioctl_fd <= 0)
+ if (fd <= 0)
return 0;
- err = ioctl(ioctl_fd, CDROM_MEDIA_CHANGED, 0);
- if (err)
- tocvalid = 0;
-
- if (tocvalid)
- return 1;
-
- err = ioctl(ioctl_fd, CDROMREADTOCHDR, &toc_hdr);
+ err = ioctl(fd, CDROMREADTOCHDR, &toc_hdr);
if (err == -1)
+ {
+ close(fd);
return 0;
-
+ }
// pclog("CDROMREADTOCHDR: start track=%i end track=%i\n", toc_hdr.cdth_trk0, toc_hdr.cdth_trk1);
toc_entry.cdte_track = toc_hdr.cdth_trk1;
toc_entry.cdte_format = CDROM_MSF;
- err = ioctl(ioctl_fd, CDROMREADTOCENTRY, &toc_entry);
+ err = ioctl(fd, CDROMREADTOCENTRY, &toc_entry);
if (err == -1)
+ {
+ close(fd);
return 0;
-
+ }
// pclog("CDROMREADTOCENTRY: addr=%02i:%02i:%02i\n", toc_entry.cdte_addr.msf.minute, toc_entry.cdte_addr.msf.second, toc_entry.cdte_addr.msf.frame);
if ((toc_entry.cdte_addr.msf.minute != toc[toc_hdr.cdth_trk1].cdte_addr.msf.minute) ||
(toc_entry.cdte_addr.msf.second != toc[toc_hdr.cdth_trk1].cdte_addr.msf.second) ||
(toc_entry.cdte_addr.msf.frame != toc[toc_hdr.cdth_trk1].cdte_addr.msf.frame ) ||
!tocvalid)
{
+ int track;
ioctl_cd_state = CD_STOPPED;
- tocvalid = read_toc(ioctl_fd, toc);
+ tocvalid = read_toc(fd, toc);
+ close(fd);
+ return 1;
}
-
+ close(fd);
return 1;
}
@@ -277,14 +274,16 @@ static int ioctl_get_last_block(unsigned char starttrack, int msf, int maxlen, i
int lb = 0;
int tv = 0;
struct cdrom_tocentry lbtoc[100];
+ int fd = open("/dev/cdrom", O_RDONLY|O_NONBLOCK);
- if (ioctl_fd <= 0)
+ if (fd <= 0)
return 0;
ioctl_cd_state = CD_STOPPED;
- if (!tocvalid)
- tv = read_toc(ioctl_fd, lbtoc);
+ tv = read_toc(fd, lbtoc);
+
+ close(fd);
if (!tv)
return 0;
@@ -302,23 +301,30 @@ static int ioctl_get_last_block(unsigned char starttrack, int msf, int maxlen, i
static int ioctl_medium_changed(void)
{
+ long size;
+ int temp;
struct cdrom_tochdr toc_hdr;
struct cdrom_tocentry toc_entry;
int err;
+ int fd = open("/dev/cdrom", O_RDONLY|O_NONBLOCK);
- if (ioctl_fd <= 0)
+ if (fd <= 0)
return 0;
- err = ioctl(ioctl_fd, CDROMREADTOCHDR, &toc_hdr);
+ err = ioctl(fd, CDROMREADTOCHDR, &toc_hdr);
if (err == -1)
+ {
+ close(fd);
return 0;
-
+ }
toc_entry.cdte_track = toc_hdr.cdth_trk1;
toc_entry.cdte_format = CDROM_MSF;
- err = ioctl(ioctl_fd, CDROMREADTOCENTRY, &toc_entry);
+ err = ioctl(fd, CDROMREADTOCENTRY, &toc_entry);
if (err == -1)
+ {
+ close(fd);
return 0;
-
+ }
// pclog("CDROMREADTOCENTRY: addr=%02i:%02i:%02i\n", toc_entry.cdte_addr.msf.minute, toc_entry.cdte_addr.msf.second, toc_entry.cdte_addr.msf.frame);
if ((toc_entry.cdte_addr.msf.minute != toc[toc_hdr.cdth_trk1].cdte_addr.msf.minute) ||
(toc_entry.cdte_addr.msf.second != toc[toc_hdr.cdth_trk1].cdte_addr.msf.second) ||
@@ -332,12 +338,15 @@ static int ioctl_medium_changed(void)
static uint8_t ioctl_getcurrentsubchannel(uint8_t *b, int msf)
{
+ struct cdrom_subchnl sub;
uint32_t cdpos = ioctl_cd_pos;
int track = get_track_nr(cdpos);
uint32_t track_address = toc[track].cdte_addr.msf.frame +
(toc[track].cdte_addr.msf.second * 75) +
(toc[track].cdte_addr.msf.minute * 75 * 60);
+ long size;
int pos=0;
+ int err;
uint8_t ret;
//pclog("ioctl_getsubchannel: cdpos=%x track_address=%x track=%i\n", cdpos, track_address, track);
if (ioctl_cd_state == CD_PLAYING)
@@ -384,29 +393,38 @@ static uint8_t ioctl_getcurrentsubchannel(uint8_t *b, int msf)
static void ioctl_eject(void)
{
- if (ioctl_fd <= 0)
+ int fd = open("/dev/cdrom", O_RDONLY|O_NONBLOCK);
+
+ if (fd <= 0)
return;
- ioctl(ioctl_fd, CDROMEJECT);
+ ioctl(fd, CDROMEJECT);
+
+ close(fd);
}
static void ioctl_load(void)
{
- if (ioctl_fd <= 0)
+ int fd = open("/dev/cdrom", O_RDONLY|O_NONBLOCK);
+
+ if (fd <= 0)
return;
- ioctl(ioctl_fd, CDROMEJECT);
+ ioctl(fd, CDROMEJECT);
+
+ close(fd);
cdrom_capacity = ioctl_get_last_block(0, 0, 4096, 0);
}
-static int ioctl_readsector(uint8_t *b, int sector, int count)
+static int ioctl_readsector(uint8_t *b, int sector)
{
- if (ioctl_fd <= 0)
+ int cdrom = open("/dev/cdrom", O_RDONLY|O_NONBLOCK);
+ if (cdrom <= 0)
return -1;
-
- lseek(ioctl_fd, sector*2048, SEEK_SET);
- read(ioctl_fd, b, count*2048);
+ lseek(cdrom, sector*2048, SEEK_SET);
+ read(cdrom, b, 2048);
+ close(cdrom);
return 0;
}
@@ -426,8 +444,9 @@ static void ioctl_readsector_raw(uint8_t *b, int sector)
{
int err;
int imsf = lba_to_msf(sector);
+ int cdrom = open("/dev/cdrom", O_RDONLY|O_NONBLOCK);
- if (ioctl_fd <= 0)
+ if (cdrom <= 0)
return;
raw_read_params.msf = malloc(sizeof(struct cdrom_msf));
@@ -436,7 +455,7 @@ static void ioctl_readsector_raw(uint8_t *b, int sector)
raw_read_params.msf->cdmsf_min0 = (imsf >> 16) & 0xff;
/* This will read the actual raw sectors from the disc. */
- err = ioctl(ioctl_fd, CDROMREADRAW, (void *) &raw_read_params);
+ err = ioctl(cdrom, CDROMREADRAW, (void *) &raw_read_params);
if (err == -1)
{
pclog("read_toc: CDROMREADTOCHDR failed\n");
@@ -445,23 +464,27 @@ static void ioctl_readsector_raw(uint8_t *b, int sector)
memcpy(b, raw_read_params.b, 2352);
+ close(cdrom);
+
free(raw_read_params.msf);
}
static int ioctl_readtoc(unsigned char *b, unsigned char starttrack, int msf, int maxlen, int single)
{
int len=4;
+ long size;
int c,d;
uint32_t temp;
- uint32_t last_address = 0;
+ int fd = open("/dev/cdrom", O_RDONLY|O_NONBLOCK);
- if (ioctl_fd <= 0)
+ if (fd <= 0)
return 0;
ioctl_cd_state = CD_STOPPED;
- if (!tocvalid)
- tocvalid = read_toc(ioctl_fd, toc);
+ tocvalid = read_toc(fd, toc);
+
+ close(fd);
if (!tocvalid)
return 4;
@@ -471,9 +494,9 @@ static int ioctl_readtoc(unsigned char *b, unsigned char starttrack, int msf, in
b[3] = last_track;
d = 0;
//pclog("Read TOC starttrack=%i\n", starttrack);
- for (c = 0; c <= toc_tracks; c++)
+ for (c = 1; c <= last_track; c++)
{
- if (toc[c].cdte_track && toc[c].cdte_track >= starttrack)
+ if (toc[c].cdte_track >= starttrack)
{
d = c;
break;
@@ -481,21 +504,17 @@ static int ioctl_readtoc(unsigned char *b, unsigned char starttrack, int msf, in
}
b[2] = toc[c].cdte_track;
last_block = 0;
-
- for (c = d; c <= toc_tracks; c++)
+ for (c = d; c <= last_track; c++)
{
uint32_t address;
if ((len + 8) > maxlen)
break;
// pclog("Len %i max %i Track %02X - %02X %02X %02i:%02i:%02i %08X\n",len,maxlen,toc[c].cdte_track,toc[c].cdte_adr,toc[c].cdte_ctrl,toc[c].cdte_addr.msf.minute, toc[c].cdte_addr.msf.second, toc[c].cdte_addr.msf.frame,MSFtoLBA(toc[c].cdte_addr.msf.minute, toc[c].cdte_addr.msf.second, toc[c].cdte_addr.msf.frame));
- address = MSFtoLBA(toc[c].cdte_addr.msf.minute, toc[c].cdte_addr.msf.second, toc[c].cdte_addr.msf.frame);
- if (address < last_address)
- continue;
- last_address = address;
b[len++] = 0; /*Reserved*/
b[len++] = (toc[c].cdte_adr << 4) | toc[c].cdte_ctrl;
b[len++] = toc[c].cdte_track;
b[len++] = 0; /*Reserved*/
+ address = MSFtoLBA(toc[c].cdte_addr.msf.minute, toc[c].cdte_addr.msf.second, toc[c].cdte_addr.msf.frame);
if (address > last_block)
last_block = address;
@@ -517,7 +536,6 @@ static int ioctl_readtoc(unsigned char *b, unsigned char starttrack, int msf, in
if (single)
break;
}
-
b[0] = (uint8_t)(((len-2) >> 8) & 0xff);
b[1] = (uint8_t)((len-2) & 0xff);
/* pclog("Table of Contents (%i bytes) : \n", size);
@@ -535,21 +553,25 @@ static int ioctl_readtoc_session(unsigned char *b, int msf, int maxlen)
struct cdrom_multisession session;
int len = 4;
int err;
+ int fd = open("/dev/cdrom", O_RDONLY|O_NONBLOCK);
- if (ioctl_fd <= 0)
+ if (fd <= 0)
return 0;
session.addr_format = CDROM_MSF;
- err = ioctl(ioctl_fd, CDROMMULTISESSION, &session);
+ err = ioctl(fd, CDROMMULTISESSION, &session);
if (err == -1)
+ {
+ close(fd);
return 0;
+ }
- b[2] = 1;
- b[3] = 1;
+ b[2] = 0;
+ b[3] = 0;
b[len++] = 0; /*Reserved*/
- b[len++] = (toc[first_track].cdte_adr << 4) | toc[first_track].cdte_ctrl;
- b[len++] = toc[first_track].cdte_track;
+ b[len++] = (toc[0].cdte_adr << 4) | toc[0].cdte_ctrl;
+ b[len++] = toc[0].cdte_track;
b[len++] = 0; /*Reserved*/
if (msf)
{
@@ -576,13 +598,12 @@ static int ioctl_readtoc_raw(unsigned char *b, int maxlen)
struct cdrom_tocentry toc2[100];
int track, err;
int len = 4;
-
+ int fd = open("/dev/cdrom", O_RDONLY|O_NONBLOCK);
//pclog("read_toc\n");
- if (ioctl_fd <= 0)
+ if (fd <= 0)
return 0;
- err = ioctl(ioctl_fd, CDROMREADTOCHDR, &toc_hdr);
-
+ err = ioctl(fd, CDROMREADTOCHDR, &toc_hdr);
if (err == -1)
{
pclog("read_toc: CDROMREADTOCHDR failed\n");
@@ -600,15 +621,19 @@ static int ioctl_readtoc_raw(unsigned char *b, int maxlen)
if ((len + 11) > maxlen)
{
pclog("ioctl_readtocraw: This iteration would fill the buffer beyond the bounds, aborting...\n");
+ close(fd);
return len;
}
toc2[track].cdte_track = track;
toc2[track].cdte_format = CDROM_MSF;
- err = ioctl(ioctl_fd, CDROMREADTOCENTRY, &toc2[track]);
+ err = ioctl(fd, CDROMREADTOCENTRY, &toc2[track]);
if (err == -1)
+ {
+// pclog("read_toc: CDROMREADTOCENTRY failed on track %i\n", track);
+ close(fd);
return 0;
-
+ }
// pclog("read_toc: Track %02X - number %02X control %02X adr %02X address %02X %02X %02X %02X\n", track, toc[track].cdte_track, toc[track].cdte_ctrl, toc[track].cdte_adr, 0, toc[track].cdte_addr.msf.minute, toc[track].cdte_addr.msf.second, toc[track].cdte_addr.msf.frame);
b[len++] = toc2[track].cdte_track;
@@ -623,7 +648,7 @@ static int ioctl_readtoc_raw(unsigned char *b, int maxlen)
b[len++] = toc2[track].cdte_addr.msf.second;
b[len++] = toc2[track].cdte_addr.msf.frame;
}
-
+ close(fd);
return len;
}
@@ -634,7 +659,7 @@ static uint32_t ioctl_size()
static int ioctl_status()
{
- if (!ioctl_ready() && (cdrom_drive <= 0)) return CD_STATUS_EMPTY;
+ if (!(ioctl_ready) && (cdrom_drive <= 0)) return CD_STATUS_EMPTY;
switch(ioctl_cd_state)
{
@@ -643,43 +668,36 @@ static int ioctl_status()
case CD_PAUSED:
return CD_STATUS_PAUSED;
case CD_STOPPED:
- default:
return CD_STATUS_STOPPED;
}
}
void ioctl_reset()
{
+ int fd = open("/dev/cdrom", O_RDONLY|O_NONBLOCK);
//pclog("ioctl_reset: fd=%i\n", fd);
tocvalid = 0;
- if (ioctl_fd <= 0)
+ if (fd <= 0)
return;
- tocvalid = read_toc(ioctl_fd, toc);
+ tocvalid = read_toc(fd, toc);
+
+ close(fd);
}
void ioctl_set_drive(char d)
{
- ioctl_close();
atapi=&ioctl_atapi;
- ioctl_open(d);
}
int ioctl_open(char d)
{
atapi=&ioctl_atapi;
- ioctl_fd = open("/dev/cdrom", O_RDONLY|O_NONBLOCK);
-
return 0;
}
void ioctl_close(void)
{
- if (ioctl_fd)
- {
- close(ioctl_fd);
- ioctl_fd = 0;
- }
}
static void ioctl_exit(void)
diff --git a/src/cdrom-ioctl-osx.c b/src/cdrom-ioctl-osx.c
deleted file mode 100644
index 4d81bce..0000000
--- a/src/cdrom-ioctl-osx.c
+++ /dev/null
@@ -1,779 +0,0 @@
-#include
-#include
-#include
-#include "ibm.h"
-#include "ide.h"
-#include "cdrom-ioctl.h"
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-static ATAPI ioctl_atapi;
-
-int old_cdrom_drive;
-
-static uint32_t cdrom_capacity = 0;
-static int tocvalid = 0;
-static int toc_tracks;
-static int first_track, last_track;
-static CDTOC *toc = NULL;
-static CDDiscInfo disc_info;
-static int track_addr[256];
-
-static int msf_to_lba(CDMSF *msf)
-{
- return msf->frame + (msf->second * 75) + (msf->minute * 60 * 75);
-}
-
-enum
-{
- CD_STOPPED = 0,
- CD_PLAYING,
- CD_PAUSED
-};
-
-static int ioctl_cd_state = CD_STOPPED;
-static uint32_t ioctl_cd_pos = 0, ioctl_cd_end = 0;
-#define BUF_SIZE 32768
-static int16_t cd_buffer[BUF_SIZE];
-static int cd_buflen = 0;
-static int cd_drive = -1;
-
-static int cd_open()
-{
- char s[80];
-
- if (cd_drive < 0)
- return 0;
-
- sprintf(s, "disk%i", cd_drive);
- return opendev(s, O_RDONLY, 0, NULL);
-}
-static void cd_close(int fd)
-{
- close(fd);
-}
-
-void ioctl_audio_callback(int16_t *output, int len)
-{
- int ioctl_fd;
-
-// pclog("Audio callback %08X %08X %i %i %i %04X %i\n", ioctl_cd_pos, ioctl_cd_end, ioctl_cd_state, cd_buflen, len, cd_buffer[4], GetTickCount());
- if (ioctl_cd_state != CD_PLAYING)
- {
- memset(output, 0, len * 2);
- return;
- }
-
- ioctl_fd = cd_open();
- if (ioctl_fd <= 0)
- {
- memset(output, 0, len * 2);
- return;
- }
-
- while (cd_buflen < len)
- {
- if (ioctl_cd_pos < ioctl_cd_end)
- {
- dk_cd_read_t cd_read;
-
- bzero(&cd_read, sizeof(cd_read));
-
- cd_read.offset = (ioctl_cd_pos-150)*kCDSectorSizeCDDA;
- cd_read.buffer = &cd_buffer[cd_buflen];
- cd_read.bufferLength = kCDSectorSizeCDDA;
- cd_read.sectorType = kCDSectorTypeCDDA;
- cd_read.sectorArea = kCDSectorAreaUser;
- //pclog("CDDA read %llx %d %d\n", cd_read.offset, cd_read.bufferLength, ioctl_cd_pos);
-
- if (ioctl(ioctl_fd, DKIOCCDREAD, &cd_read) < 0)
- {
- //pclog("DeviceIoControl returned false %d\n", errno);
- memset(&cd_buffer[cd_buflen], 0, (BUF_SIZE - cd_buflen) * 2);
- ioctl_cd_state = CD_STOPPED;
- cd_buflen = len;
- }
- else
- {
- //pclog("DeviceIoControl returned true\n");
- ioctl_cd_pos++;
- cd_buflen += (2352 / 2);
- }
- }
- else
- {
- memset(&cd_buffer[cd_buflen], 0, (BUF_SIZE - cd_buflen) * 2);
- ioctl_cd_state = CD_STOPPED;
- cd_buflen = len;
- }
- }
-
- cd_close(ioctl_fd);
-
- memcpy(output, cd_buffer, len * 2);
-// for (c = 0; c < BUF_SIZE - len; c++)
-// cd_buffer[c] = cd_buffer[c + cd_buflen];
- memcpy(&cd_buffer[0], &cd_buffer[len], (BUF_SIZE - len) * 2);
- cd_buflen -= len;
-// pclog("Done %i\n", GetTickCount());
-}
-
-void ioctl_audio_stop()
-{
- ioctl_cd_state = CD_STOPPED;
-}
-
-static int get_track_nr(uint32_t pos)
-{
- int c;
- int track = 0;
-
- if (!tocvalid)
- return 0;
-
- for (c = first_track; c < last_track; c++)
- {
- uint32_t track_address = toc->descriptors[c].p.frame +
- (toc->descriptors[c].p.second * 75) +
- (toc->descriptors[c].p.minute * 75 * 60);
-//pclog("get_track_nr: track=%i pos=%x track_address=%x\n", c, pos, track_address);
- if (track_address <= pos)
- track = c;
- }
- return track;
-}
-
-static int is_track_audio(uint32_t pos)
-{
- int c;
- int control = 0;
- //pclog("is_track_audio: %08x %i\n", pos, tocvalid);
- if (!tocvalid)
- return 0;
- //pclog(" scan tracks %i-%i\n", first_track, last_track);
- for (c = first_track; c < last_track; c++)
- {
- uint32_t track_address = toc->descriptors[c].p.frame +
- (toc->descriptors[c].p.second * 75) +
- (toc->descriptors[c].p.minute * 75 * 60);
-//pclog("get_track_nr: track=%i pos=%x track_address=%x\n", c, pos, track_address);
- if (track_address <= pos)
- control = toc->descriptors[c].control;
- }
- return (control & 4) ? 0 : 1;
-}
-
-static int ioctl_is_track_audio(uint32_t pos, int ismsf)
-{
- if (ismsf)
- {
- CDMSF msf;
- msf.minute = (pos >> 16) & 0xff;
- msf.second = (pos >> 8) & 0xff;
- msf.frame = pos & 0xff;
- pos = msf_to_lba(&msf);
- }
- return is_track_audio(pos);
-}
-
-static void ioctl_playaudio(uint32_t pos, uint32_t len, int ismsf)
-{
- //pclog("Play audio - %08X %08X %i\n", pos, len, ismsf);
- if (ismsf)
- {
- pos = (pos & 0xff) + (((pos >> 8) & 0xff) * 75) + (((pos >> 16) & 0xff) * 75 * 60);
- len = (len & 0xff) + (((len >> 8) & 0xff) * 75) + (((len >> 16) & 0xff) * 75 * 60);
- //pclog("MSF - pos = %08X len = %08X\n", pos, len);
- }
- else
- len += pos;
- ioctl_cd_pos = pos;// + 150;
- ioctl_cd_end = pos+len;// + 150;
- ioctl_cd_state = CD_PLAYING;
- if (ioctl_cd_pos < 150)
- ioctl_cd_pos = 150;
-// pclog("Audio start %08X %08X %i %i %i\n", ioctl_cd_pos, ioctl_cd_end, ioctl_cd_state, 0, len);
-}
-
-static void ioctl_pause(void)
-{
- if (ioctl_cd_state == CD_PLAYING)
- ioctl_cd_state = CD_PAUSED;
-}
-
-static void ioctl_resume(void)
-{
- if (ioctl_cd_state == CD_PAUSED)
- ioctl_cd_state = CD_PLAYING;
-}
-
-static void ioctl_stop(void)
-{
- ioctl_cd_state = CD_STOPPED;
-}
-
-static void ioctl_seek(uint32_t pos)
-{
-// pclog("Seek %08X\n", pos);
- ioctl_cd_pos = pos;
- ioctl_cd_state = CD_STOPPED;
-}
-
-static int read_toc(int fd)
-{
- dk_cd_read_toc_t cd_read_toc;
- dk_cd_read_disc_info_t cd_read_disc_info;
- int result;
- int c;
-
- bzero(&cd_read_toc, sizeof(cd_read_toc));
- bzero(&cd_read_disc_info, sizeof(cd_read_disc_info));
- bzero(toc, sizeof(CDTOC) + sizeof(CDTOCDescriptor)*100);
-
- cd_read_toc.format = kCDTOCFormatTOC;
- cd_read_toc.buffer = toc;
- cd_read_toc.bufferLength = 2048;//sizeof(CDTOC) + sizeof(CDTOCDescriptor)*100;
- //pclog("buffer=%p bufferLength=%u\n", cd_read_toc.buffer, cd_read_toc.bufferLength);
- result = ioctl(fd, DKIOCCDREADTOC, &cd_read_toc);
-
- //pclog("Read_toc - fd=%d result=%d errno=%d toc=%p\n", fd, result, errno, toc);
- if (result < 0)
- {
- //pclog("read_toc: DKIOCCDREADTOC failed\n");
- return 0;
- }
-
- //pclog("toc length=%u first=%u last=%u\n", toc->length, toc->sessionFirst, toc->sessionFirst);
- first_track = 1;
- last_track = 0;
- toc_tracks = CDTOCGetDescriptorCount(toc);
-
- for (c = 0; c < toc_tracks; c++)
- {
- if (toc->descriptors[c].session > 1)
- continue;
- track_addr[c] = msf_to_lba(&toc->descriptors[c].p);
- //pclog("Track %i %02x addr %08x\n", c, toc->descriptors[c].point, track_addr[c]);
- if (toc->descriptors[c].point <= 99 && toc->descriptors[c].adr == 1)
- last_track++;
- }
-
- //pclog("Tracks %i %i %i\n", first_track, last_track, toc_tracks);
-
- cd_read_disc_info.buffer = &disc_info;
- cd_read_disc_info.bufferLength = sizeof(disc_info);
- result = ioctl(fd, DKIOCCDREADDISCINFO, &cd_read_disc_info);
- if (result < 0)
- {
- //pclog("read_toc: DKIOCCDREADDISCINFO failed\n");
- return 0;
- }
-
- return 1;
-}
-
-static int ioctl_ready(void)
-{
- int ioctl_fd = cd_open();
- //pclog("ioctl_ready - %d %d\n", ioctl_fd, tocvalid);
- if (ioctl_fd <= 0)
- return 0;
- cd_close(ioctl_fd);
-
- if (tocvalid)
- return 1;
-
- return 0;
-}
-
-static int ioctl_get_last_block(unsigned char starttrack, int msf, int maxlen, int single)
-{
- int c;
- int lb = 0;
- int tv = 0;
- int ioctl_fd;
-
- ioctl_fd = cd_open();
- if (ioctl_fd <= 0)
- return 0;
-
- //ioctl_cd_state = CD_STOPPED;
-
- if (!tocvalid)
- tv = read_toc(ioctl_fd);
-
- cd_close(ioctl_fd);
-
- if (!tv)
- return 0;
-
- for (c = 0; c <= toc_tracks; c++)
- {
- if (track_addr[c] > lb)
- lb = track_addr[c];
- }
- return lb;
-}
-
-static int ioctl_medium_changed(void)
-{
- dk_cd_read_disc_info_t cd_read_disc_info;
- CDDiscInfo new_disc_info;
- int result;
- int ioctl_fd;
-
- ioctl_fd = cd_open();
- if (ioctl_fd <= 0)
- return 1;
-
- bzero(&cd_read_disc_info, sizeof(cd_read_disc_info));
- cd_read_disc_info.buffer = &new_disc_info;
- cd_read_disc_info.bufferLength = sizeof(new_disc_info);
- result = ioctl(ioctl_fd, DKIOCCDREADDISCINFO, &cd_read_disc_info);
- if (result < 0)
- {
- //pclog("medium_changed: DKIOCCDREADDISCINFO failed\n");
- ioctl_cd_state = CD_STOPPED;
- tocvalid = 0;
- cd_close(ioctl_fd);
- return 1;
- }
-
- if (memcmp(&disc_info, &new_disc_info, sizeof(CDDiscInfo)))
- {
- //pclog("medium_changed: disc changed\n");
- ioctl_cd_state = CD_STOPPED;
- tocvalid = read_toc(ioctl_fd);
- cd_close(ioctl_fd);
- return 1;
- }
-
- cd_close(ioctl_fd);
- return 0;
-}
-
-static uint8_t ioctl_getcurrentsubchannel(uint8_t *b, int msf)
-{
- uint32_t cdpos = ioctl_cd_pos;
- int track = get_track_nr(cdpos);
- uint32_t track_address = track_addr[track];
- long size;
- int pos=0;
- int err;
- uint8_t ret;
-
-
- if (ioctl_cd_state == CD_PLAYING)
- ret = 0x11;
- else if (ioctl_cd_state == CD_PAUSED)
- ret = 0x12;
- else
- ret = 0x13;
-
- b[pos++] = (toc->descriptors[track].adr << 4) | toc->descriptors[track].control;
- b[pos++] = toc->descriptors[track].point;
- b[pos++] = 0;
-
- if (msf)
- {
- uint32_t dat = cdpos;
- b[pos + 3] = (uint8_t)(dat % 75); dat /= 75;
- b[pos + 2] = (uint8_t)(dat % 60); dat /= 60;
- b[pos + 1] = (uint8_t)dat;
- b[pos] = 0;
- pos += 4;
- dat = cdpos - track_address;
- b[pos + 3] = (uint8_t)(dat % 75); dat /= 75;
- b[pos + 2] = (uint8_t)(dat % 60); dat /= 60;
- b[pos + 1] = (uint8_t)dat;
- b[pos] = 0;
- pos += 4;
- }
- else
- {
- b[pos++] = (cdpos >> 24) & 0xff;
- b[pos++] = (cdpos >> 16) & 0xff;
- b[pos++] = (cdpos >> 8) & 0xff;
- b[pos++] = cdpos & 0xff;
- cdpos -= track_address;
- b[pos++] = (cdpos >> 24) & 0xff;
- b[pos++] = (cdpos >> 16) & 0xff;
- b[pos++] = (cdpos >> 8) & 0xff;
- b[pos++] = cdpos & 0xff;
- }
-
- //pclog("ioctl_getsubchannel: cdpos=%x track_address=%x track=%i state=%i ret=%02x\n", cdpos, track_address, track, ioctl_cd_state, ret);
-
- return ret;
-}
-
-static void ioctl_eject(void)
-{
-}
-
-static void ioctl_load(void)
-{
-}
-
-static int ioctl_readsector(uint8_t *b, int sector, int count)
-{
- dk_cd_read_t cd_read;
- int res;
- int ioctl_fd;
-
- ioctl_fd = cd_open();
- if (ioctl_fd <= 0)
- return -1;
- //pclog("Read sector %x %i\n", sector, count);
-
- bzero(&cd_read, sizeof(cd_read));
-
- cd_read.offset = sector*2048;
- cd_read.buffer = b;
- cd_read.bufferLength = count*2048;
- cd_read.sectorType = kCDSectorTypeMode1;
- cd_read.sectorArea = kCDSectorAreaUser;
-
- res = ioctl(ioctl_fd, DKIOCCDREAD, &cd_read);
- //pclog("read res = %i %i %i\n", res, cd_read.bufferLength, errno);
-
- cd_close(ioctl_fd);
-
- return 0;
-}
-
-static void ioctl_readsector_raw(uint8_t *b, int sector)
-{
- dk_cd_read_t cd_read;
- int res;
- int ioctl_fd;
-
- ioctl_fd = cd_open();
- if (ioctl_fd <= 0)
- return;
- //pclog("Read sector %x %i\n", sector, count);
-
- bzero(&cd_read, sizeof(cd_read));
-
- cd_read.offset = sector*kCDSectorSizeWhole;
- cd_read.buffer = b;
- cd_read.bufferLength = kCDSectorSizeWhole;
- cd_read.sectorType = kCDSectorTypeUnknown;
- cd_read.sectorArea = kCDSectorAreaUser;
-
- res = ioctl(ioctl_fd, DKIOCCDREAD, &cd_read);
- //pclog("read res = %i %i %i\n", res, cd_read.bufferLength, errno);
-
- cd_close(ioctl_fd);
-}
-
-static int ioctl_readtoc(unsigned char *b, unsigned char starttrack, int msf, int maxlen, int single)
-{
- int len=4;
- int c,d;
- uint32_t temp;
- uint32_t last_address = 0;
- int seenAA = 0;
-
- pclog("ioctl_readtoc\n");
- //ioctl_cd_state = CD_STOPPED;
-
- if (!tocvalid)
- {
- int ioctl_fd = cd_open();
-
- if (ioctl_fd <= 0)
- return 4;
-
- tocvalid = read_toc(ioctl_fd);
- cd_close(ioctl_fd);
- }
- if (!tocvalid)
- return 4;
-
- //pclog("Read TOC done! %i\n",single);
- b[2] = first_track;
- b[3] = last_track;
- d = 0;
- //pclog("Read TOC starttrack=%i\n", starttrack);
- for (c = 0; c <= toc_tracks; c++)
- {
- if (toc->descriptors[c].point && toc->descriptors[c].point >= starttrack && toc->descriptors[c].point <= 99)
- {
- d = c;
- break;
- }
- }
- //pclog("Start from track %i\n",d);
- b[2] = toc->descriptors[c].point;
- //last_block = 0;
-
- for (c = d; c <= toc_tracks; c++)
- {
- uint32_t address;
- if ((len + 8) > maxlen)
- break;
- //pclog("Len %i max %i Track %02X - %02X %02X %02i:%02i:%02i %08X\n",len,maxlen,toc->descriptors[c].point,toc->descriptors[c].adr,toc->descriptors[c].control,toc->descriptors[c].p.minute, toc->descriptors[c].p.second, toc->descriptors[c].p.frame,track_addr[c]);
- address = track_addr[c];
- if (address < last_address)
- continue;
- if (toc->descriptors[c].point == 0xaa)
- seenAA = 1;
- last_address = address;
- b[len++] = 0; /*Reserved*/
- b[len++] = (toc->descriptors[c].adr << 4) | toc->descriptors[c].control;
- b[len++] = toc->descriptors[c].point;
- b[len++] = 0; /*Reserved*/
- //if (address > last_block)
- // last_block = address;
-
- if (msf)
- {
- b[len++] = 0;
- b[len++] = toc->descriptors[c].p.minute;
- b[len++] = toc->descriptors[c].p.second;
- b[len++] = toc->descriptors[c].p.frame;
- }
- else
- {
- temp = track_addr[c];
- b[len++] = temp >> 24;
- b[len++] = temp >> 16;
- b[len++] = temp >> 8;
- b[len++] = temp;
- }
- if (single)
- break;
- }
-
- if (!seenAA && !single)
- {
- uint32_t lb = 0;
-
- for (c = 0; c <= toc_tracks; c++)
- {
- if (track_addr[c] > lb)
- lb = track_addr[c];
- }
- //pclog("Track AA - %08x %i\n", lb, len);
- b[len++] = 0; /*Reserved*/
- b[len++] = (1 << 4) | 1;
- b[len++] = 0xaa;
- b[len++] = 0; /*Reserved*/
-
- if (msf)
- {
- b[len++] = 0;
- b[len++] = (lb / 60) / 75;
- b[len++] = (lb / 75) % 60;
- b[len++] = lb % 75;
- }
- else
- {
- temp = track_addr[c];
- b[len++] = lb >> 24;
- b[len++] = lb >> 16;
- b[len++] = lb >> 8;
- b[len++] = lb;
- }
- }
-
- b[0] = (uint8_t)(((len-2) >> 8) & 0xff);
- b[1] = (uint8_t)((len-2) & 0xff);
-/* pclog("Table of Contents (%i bytes) : \n", size);
- pclog("First track - %02X\n", first_track);
- pclog("Last track - %02X\n", last_track);
- for (c = 0; c <= last_track; c++)
- pclog("Track %02X - number %02X control %02X adr %02X address %02X %02X %02X %02X\n", c, toc[c].cdte_track, toc[c].cdte_ctrl, toc[c].cdte_adr, 0, toc[c].cdte_addr.msf.minute, toc[c].cdte_addr.msf.second, toc[c].cdte_addr.msf.frame);
- for (c = 0;c <= last_track; c++)
- pclog("Track %02X - number %02X control %02X adr %02X address %06X\n", c, toc[c].cdte_track, toc[c].cdte_ctrl, toc[c].cdte_adr, MSFtoLBA(toc[c].cdte_addr.msf.minute, toc[c].cdte_addr.msf.second, toc[c].cdte_addr.msf.frame));*/
- return len;
-}
-
-static int ioctl_readtoc_session(unsigned char *b, int msf, int maxlen)
-{
- int len = 4;
- int session = 0, first_track_nr = 0;
- int c, d;
-
- if (!tocvalid)
- {
- int ioctl_fd = cd_open();
-
- if (ioctl_fd <= 0)
- return 4;
-
- tocvalid = read_toc(ioctl_fd);
- cd_close(ioctl_fd);
- }
-
- if (!tocvalid)
- return 4;
-
- for (c = 0; c <= toc_tracks; c++)
- {
- if (toc->descriptors[c].point && toc->descriptors[c].point <= 99)
- {
- if (toc->descriptors[c].session > session || (toc->descriptors[c].session == session && toc->descriptors[c].point < first_track_nr))
- {
- session = toc->descriptors[c].session;
- first_track_nr = toc->descriptors[c].point;
- d = c;
- }
- }
- }
-
- b[2] = toc->sessionFirst;
- b[3] = toc->sessionLast;
- b[len++] = 0; /*Reserved*/
- b[len++] = (toc->descriptors[d].adr << 4) | toc->descriptors[d].control;
- b[len++] = toc->descriptors[d].point;
- b[len++] = 0; /*Reserved*/
- if (msf)
- {
- b[len++] = 0;
- b[len++] = toc->descriptors[d].p.minute;
- b[len++] = toc->descriptors[d].p.second;
- b[len++] = toc->descriptors[d].p.frame;
- }
- else
- {
- uint32_t temp = track_addr[d];
- b[len++] = temp >> 24;
- b[len++] = temp >> 16;
- b[len++] = temp >> 8;
- b[len++] = temp;
- }
-
- return len;
-}
-
-static int ioctl_readtoc_raw(unsigned char *b, int maxlen)
-{
- int len = 4;
- int ioctl_fd;
- int track;
-
-//pclog("read_toc\n");
- if (!tocvalid)
- return 0;
-
- ioctl_fd = cd_open();
- if (ioctl_fd <= 0)
- return 0;
- cd_close(ioctl_fd);
-
- b[2] = toc->sessionFirst;
- b[3] = toc->sessionLast;
-
- for (track = 0; track <= toc_tracks; track++)
- {
- if ((len + 11) > maxlen)
- {
- pclog("ioctl_readtocraw: This iteration would fill the buffer beyond the bounds, aborting...\n");
- return len;
- }
-
-
-// pclog("read_toc: Track %02X - number %02X control %02X adr %02X address %02X %02X %02X %02X\n", track, toc[track].cdte_track, toc[track].cdte_ctrl, toc[track].cdte_adr, 0, toc[track].cdte_addr.msf.minute, toc[track].cdte_addr.msf.second, toc[track].cdte_addr.msf.frame);
-
- b[len++] = toc->descriptors[track].session;
- b[len++] = (toc->descriptors[track].adr << 4) | toc->descriptors[track].control;
- b[len++] = toc->descriptors[track].tno;
- b[len++] = toc->descriptors[track].point;
- b[len++] = toc->descriptors[track].address.minute;
- b[len++] = toc->descriptors[track].address.second;
- b[len++] = toc->descriptors[track].address.frame;
- b[len++] = toc->descriptors[track].zero;
- b[len++] = toc->descriptors[track].p.minute;
- b[len++] = toc->descriptors[track].p.second;
- b[len++] = toc->descriptors[track].p.frame;
- }
-
- return len;
-}
-
-static uint32_t ioctl_size()
-{
- return cdrom_capacity;
-}
-
-static int ioctl_status()
-{
- if (!ioctl_ready)
- return CD_STATUS_EMPTY;
- return CD_STATUS_STOPPED;
-}
-void ioctl_reset()
-{
- int ioctl_fd;
-
- tocvalid = 0;
-
- ioctl_fd = cd_open();
- if (ioctl_fd <= 0)
- return;
-
- tocvalid = read_toc(ioctl_fd);
- cd_close(ioctl_fd);
-}
-
-void ioctl_set_drive(char d)
-{
- ioctl_close();
- atapi=&ioctl_atapi;
- ioctl_open(d);
-}
-
-int ioctl_open(char d)
-{
- atapi = &ioctl_atapi;
-
- toc = malloc(2048);
-
- cd_drive = d;
- return 0;
-}
-
-void ioctl_close(void)
-{
- if (toc)
- {
- free(toc);
- toc = NULL;
- }
-}
-
-static void ioctl_exit(void)
-{
-
-}
-
-static ATAPI ioctl_atapi=
-{
- ioctl_ready,
- ioctl_medium_changed,
- ioctl_readtoc,
- ioctl_readtoc_session,
- ioctl_readtoc_raw,
- ioctl_getcurrentsubchannel,
- ioctl_readsector,
- ioctl_readsector_raw,
- ioctl_playaudio,
- ioctl_seek,
- ioctl_load,
- ioctl_eject,
- ioctl_pause,
- ioctl_resume,
- ioctl_size,
- ioctl_status,
- ioctl_is_track_audio,
- ioctl_stop,
- ioctl_exit
-};
diff --git a/src/cdrom-ioctl.c b/src/cdrom-ioctl.c
index 8c8eb2b..2d4f176 100644
--- a/src/cdrom-ioctl.c
+++ b/src/cdrom-ioctl.c
@@ -2,7 +2,7 @@
#include
#include
-#ifdef __MINGW64_VERSION_MAJOR
+#ifdef __MINGW64__
#include "ntddcdrm.h"
#include "ntddscsi.h"
#else
@@ -16,7 +16,7 @@
int cdrom_drive;
int old_cdrom_drive;
-#ifndef __MINGW64_VERSION_MAJOR
+#ifndef __MINGW64__
typedef struct _CDROM_TOC_SESSION_DATA {
UCHAR Length[2];
UCHAR FirstCompleteSession;
@@ -58,7 +58,10 @@ void ioctl_audio_callback(int16_t *output, int len)
// return;
// pclog("Audio callback %08X %08X %i %i %i %04X %i\n", ioctl_cd_pos, ioctl_cd_end, ioctl_cd_state, cd_buflen, len, cd_buffer[4], GetTickCount());
if (ioctl_cd_state != CD_PLAYING)
+ {
+ memset(output, 0, len * 2);
return;
+ }
while (cd_buflen < len)
{
if (ioctl_cd_pos < ioctl_cd_end)
@@ -432,11 +435,11 @@ typedef struct _SCSI_PASS_THROUGH_DIRECT_WITH_BUFFER {
UCHAR SenseBuf[32];
} SCSI_PASS_THROUGH_DIRECT_WITH_BUFFER;
-static int ioctl_readsector(uint8_t *b, int sector, int count)
+static int ioctl_readsector(uint8_t *b, int sector)
{
LARGE_INTEGER pos;
BOOL status;
- long size = 0;
+ long size;
if (!cdrom_drive)
return -1;
@@ -448,18 +451,16 @@ static int ioctl_readsector(uint8_t *b, int sector, int count)
pos.QuadPart=sector*2048;
ioctl_open(0);
SetFilePointer(hIOCTL,pos.LowPart,&pos.HighPart,FILE_BEGIN);
- status = ReadFile(hIOCTL, b, count*2048, (LPDWORD)&size, NULL);
+ status = ReadFile(hIOCTL,b,2048,(LPDWORD)&size,NULL);
ioctl_close();
- /*If the read 'succeeded' but didn't read all required data, try again using SPTI*/
- if (status && size != count*2048)
+ /*If the read failed, try again using SPTI*/
+ if (!status || size != 2048)
{
uint8_t cmd[12] = { 0xbe, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 };
SCSI_PASS_THROUGH_DIRECT_WITH_BUFFER swb;
DWORD returned;
- uint8_t *data_buffer;//[IOCTL_DATA_BUFFER];
-
- data_buffer = malloc(count * IOCTL_DATA_BUFFER);
+ uint8_t data_buffer[IOCTL_DATA_BUFFER];
ioctl_open(0);
@@ -468,9 +469,6 @@ static int ioctl_readsector(uint8_t *b, int sector, int count)
cmd[3] = (uint8_t)(sector >> 16);
cmd[4] = (uint8_t)(sector >> 8);
cmd[5] = (uint8_t)(sector >> 0);
- cmd[6] = (uint8_t)(count >> 16);
- cmd[7] = (uint8_t)(count >> 8);
- cmd[8] = (uint8_t)(count >> 0);
memset(&swb, 0, sizeof (swb));
memcpy(swb.spt.Cdb, cmd, 12);
@@ -478,9 +476,9 @@ static int ioctl_readsector(uint8_t *b, int sector, int count)
swb.spt.Length = sizeof (SCSI_PASS_THROUGH);
swb.spt.CdbLength = 12;
swb.spt.DataIn = SCSI_IOCTL_DATA_IN;
- swb.spt.DataTransferLength = count*IOCTL_DATA_BUFFER;
+ swb.spt.DataTransferLength = IOCTL_DATA_BUFFER;
swb.spt.DataBuffer = data_buffer;
- memset(data_buffer, 0, count*IOCTL_DATA_BUFFER);
+ memset(data_buffer, 0, IOCTL_DATA_BUFFER);
swb.spt.TimeOutValue = 80 * 60;
swb.spt.SenseInfoOffset = (uintptr_t)&swb.SenseBuf - (uintptr_t)&swb;//offsetof(swb, SenseBuf);
swb.spt.SenseInfoLength = 32;
@@ -489,16 +487,9 @@ static int ioctl_readsector(uint8_t *b, int sector, int count)
&swb, sizeof (SCSI_PASS_THROUGH_DIRECT_WITH_BUFFER),
&swb, sizeof (SCSI_PASS_THROUGH_DIRECT_WITH_BUFFER),
&returned, NULL))
- {
- memcpy(b, data_buffer, count*2048);
- status = 1;
- }
- else
- status = 0;
+ memcpy(b, data_buffer, 2048);
ioctl_close();
-
- free(data_buffer);
}
return !status;
@@ -512,19 +503,14 @@ static int is_track_audio(uint32_t pos)
if (!tocvalid)
return 0;
- for (c = 0; toc.TrackData[c].TrackNumber != 0xaa; c++)
+ for (c = toc.FirstTrack; c < toc.LastTrack; c++)
{
uint32_t track_address = toc.TrackData[c].Address[3] +
(toc.TrackData[c].Address[2] * 75) +
(toc.TrackData[c].Address[1] * 75 * 60);
- if (toc.TrackData[c].TrackNumber >= toc.FirstTrack &&
- toc.TrackData[c].TrackNumber <= toc.LastTrack &&
- track_address >= pos)
- {
+ if (track_address <= pos)
control = toc.TrackData[c].Control;
- break;
- }
}
return (control & 4) ? 0 : 1;
}
@@ -579,6 +565,7 @@ static int ioctl_readtoc(unsigned char *b, unsigned char starttrack, int msf, in
break;
}
}
+ b[2]=toc.TrackData[c].TrackNumber;
last_block = 0;
for (c=d;c<=toc.LastTrack;c++)
{
@@ -750,20 +737,14 @@ void ioctl_reset()
void ioctl_set_drive(char d)
{
- ioctl_close();
-
sprintf(ioctl_path, "\\\\.\\%c:", d);
pclog("Path is %s\n", ioctl_path);
tocvalid = 0;
atapi = &ioctl_atapi;
-
- ioctl_open(d);
}
int ioctl_open(char d)
{
- if (hIOCTL)
- ioctl_close();
hIOCTL = CreateFile(ioctl_path,GENERIC_READ | GENERIC_WRITE,
FILE_SHARE_READ | FILE_SHARE_WRITE,NULL,OPEN_EXISTING,0,NULL);
if (!hIOCTL)
diff --git a/src/cdrom-iso.c b/src/cdrom-iso.c
new file mode 100644
index 0000000..220b073
--- /dev/null
+++ b/src/cdrom-iso.c
@@ -0,0 +1,356 @@
+/*ISO CD-ROM support*/
+
+#include "ibm.h"
+#include "ide.h"
+#include "cdrom-iso.h"
+#include
+
+static ATAPI iso_atapi;
+
+static uint32_t last_block = 0;
+static uint64_t image_size = 0;
+static int iso_inited = 0;
+char iso_path[1024];
+void iso_close(void);
+static FILE *iso_image = NULL;
+static int iso_changed = 0;
+
+void iso_audio_callback(int16_t *output, int len)
+{
+ memset(output, 0, len * 2);
+ return;
+}
+
+void iso_audio_stop()
+{
+ pclog("iso_audio_stop stub\n");
+}
+
+static void iso_playaudio(uint32_t pos, uint32_t len, int ismsf)
+{
+ pclog("iso_playaudio stub\n");
+ return;
+}
+
+static void iso_pause(void)
+{
+ pclog("iso_pause stub\n");
+ return;
+}
+
+static void iso_resume(void)
+{
+ pclog("iso_resume stub\n");
+ return;
+}
+
+static void iso_stop(void)
+{
+ pclog("iso_stop stub\n");
+ return;
+}
+
+static void iso_seek(uint32_t pos)
+{
+ pclog("iso_seek stub\n");
+ return;
+}
+
+static int iso_ready(void)
+{
+ if (strlen(iso_path) == 0)
+ return 0;
+
+ if (old_cdrom_drive != cdrom_drive)
+ return 1;
+
+ iso_changed = 0;
+ return 1;
+}
+
+/* Always return 0, because there is no way to change the ISO without unmounting and remounting it. */
+static int iso_medium_changed(void)
+{
+ iso_changed = 0;
+ return 0;
+}
+
+static uint8_t iso_getcurrentsubchannel(uint8_t *b, int msf)
+{
+ pclog("iso_getcurrentsubchannel stub\n");
+ return 0;
+}
+
+static void iso_eject(void)
+{
+ pclog("iso_eject stub\n");
+}
+
+static void iso_load(void)
+{
+ pclog("iso_load stub\n");
+}
+
+static int iso_readsector(uint8_t *b, int sector)
+{
+ if (!cdrom_drive)
+ return -1;
+ fseek(iso_image,sector*2048,SEEK_SET);
+ fread(b,2048,1,iso_image);
+ return 0;
+}
+
+static void lba_to_msf(uint8_t *buf, int lba)
+{
+ lba += 150;
+ buf[0] = (lba / 75) / 60;
+ buf[1] = (lba / 75) % 60;
+ buf[2] = lba % 75;
+}
+
+static void iso_readsector_raw(uint8_t *b, int sector)
+{
+ if (!cdrom_drive) return;
+ fseek(iso_image, sector*2048, SEEK_SET);
+ fread(b+16, 2048, 1, iso_image);
+
+ /* sync bytes */
+ b[0] = 0;
+ memset(b + 1, 0xff, 10);
+ b[11] = 0;
+ b += 12;
+ lba_to_msf(b, sector);
+ b[3] = 1; /* mode 1 data */
+ b += 4;
+ b += 2048;
+ memset(b, 0, 288);
+}
+
+static int iso_readtoc(unsigned char *buf, unsigned char start_track, int msf, int maxlen, int single)
+{
+ uint8_t *q;
+ int len;
+
+ if (start_track > 1 && start_track != 0xaa)
+ return -1;
+ q = buf + 2;
+ *q++ = 1; /* first session */
+ *q++ = 1; /* last session */
+ if (start_track <= 1)
+ {
+ *q++ = 0; /* reserved */
+ *q++ = 0x14; /* ADR, control */
+ *q++ = 1; /* track number */
+ *q++ = 0; /* reserved */
+ if (msf)
+ {
+ *q++ = 0; /* reserved */
+ lba_to_msf(q, 0);
+ q += 3;
+ }
+ else
+ {
+ /* sector 0 */
+ *q++ = 0;
+ *q++ = 0;
+ *q++ = 0;
+ *q++ = 0;
+ }
+ }
+ /* lead out track */
+ *q++ = 0; /* reserved */
+ *q++ = 0x16; /* ADR, control */
+ *q++ = 0xaa; /* track number */
+ *q++ = 0; /* reserved */
+ last_block = image_size >> 11;
+ if (msf)
+ {
+ *q++ = 0; /* reserved */
+ lba_to_msf(q, last_block);
+ q += 3;
+ }
+ else
+ {
+ *q++ = last_block >> 24;
+ *q++ = last_block >> 16;
+ *q++ = last_block >> 8;
+ *q++ = last_block;
+ }
+ len = q - buf;
+ buf[0] = (uint8_t)(((len-2) >> 8) & 0xff);
+ buf[1] = (uint8_t)((len-2) & 0xff);
+ return len;
+}
+
+static int iso_readtoc_session(unsigned char *buf, int msf, int maxlen)
+{
+ uint8_t *q;
+
+ q = buf + 2;
+ *q++ = 1; /* first session */
+ *q++ = 1; /* last session */
+
+ *q++ = 1; /* session number */
+ *q++ = 0x14; /* data track */
+ *q++ = 0; /* track number */
+ *q++ = 0xa0; /* lead-in */
+ *q++ = 0; /* min */
+ *q++ = 0; /* sec */
+ *q++ = 0; /* frame */
+ *q++ = 0;
+
+ return 12;
+}
+
+static int iso_readtoc_raw(unsigned char *buf, int maxlen)
+{
+ uint8_t *q;
+ int len;
+
+ q = buf + 2;
+ *q++ = 1; /* first session */
+ *q++ = 1; /* last session */
+
+ *q++ = 1; /* session number */
+ *q++ = 0x14; /* data track */
+ *q++ = 0; /* track number */
+ *q++ = 0xa0; /* lead-in */
+ *q++ = 0; /* min */
+ *q++ = 0; /* sec */
+ *q++ = 0; /* frame */
+ *q++ = 0;
+ *q++ = 1; /* first track */
+ *q++ = 0x00; /* disk type */
+ *q++ = 0x00;
+
+ *q++ = 1; /* session number */
+ *q++ = 0x14; /* data track */
+ *q++ = 0; /* track number */
+ *q++ = 0xa1;
+ *q++ = 0; /* min */
+ *q++ = 0; /* sec */
+ *q++ = 0; /* frame */
+ *q++ = 0;
+ *q++ = 1; /* last track */
+ *q++ = 0x00;
+ *q++ = 0x00;
+
+ *q++ = 1; /* session number */
+ *q++ = 0x14; /* data track */
+ *q++ = 0; /* track number */
+ *q++ = 0xa2; /* lead-out */
+ *q++ = 0; /* min */
+ *q++ = 0; /* sec */
+ *q++ = 0; /* frame */
+ last_block = image_size >> 11;
+ /* this is raw, must be msf */
+ *q++ = 0; /* reserved */
+ lba_to_msf(q, last_block);
+ q += 3;
+
+ *q++ = 1; /* session number */
+ *q++ = 0x14; /* ADR, control */
+ *q++ = 0; /* track number */
+ *q++ = 1; /* point */
+ *q++ = 0; /* min */
+ *q++ = 0; /* sec */
+ *q++ = 0; /* frame */
+ /* same here */
+ *q++ = 0;
+ *q++ = 0;
+ *q++ = 0;
+ *q++ = 0;
+
+ len = q - buf;
+ buf[0] = (uint8_t)(((len-2) >> 8) & 0xff);
+ buf[1] = (uint8_t)((len-2) & 0xff);
+ return len;
+}
+
+static uint32_t iso_size()
+{
+ unsigned char b[4096];
+
+ atapi->readtoc(b, 0, 0, 4096, 0);
+
+ return last_block;
+}
+
+static int iso_status()
+{
+ if (!(iso_ready()) && (cdrom_drive != 200))
+ return CD_STATUS_EMPTY;
+
+ return CD_STATUS_DATA_ONLY;
+}
+
+void iso_reset()
+{
+}
+
+int iso_open(char *fn)
+{
+ struct stat st;
+
+ if (iso_image)
+ fclose(iso_image);
+
+ if (strcmp(fn, iso_path) != 0)
+ iso_changed = 1;
+
+ /* Make sure iso_changed stays when changing from ISO to another ISO. */
+ if (cdrom_drive != CDROM_ISO)
+ iso_changed = 1;
+ strcpy(iso_path, fn);
+
+ iso_image = fopen(iso_path, "rb");
+ atapi = &iso_atapi;
+
+ stat(iso_path, &st);
+ image_size = st.st_size;
+
+ return 0;
+}
+
+void iso_close(void)
+{
+ if (iso_image)
+ {
+ fclose(iso_image);
+ iso_image = NULL;
+ }
+ memset(iso_path, 0, 1024);
+}
+
+static void iso_exit(void)
+{
+ iso_inited = 0;
+}
+
+static int iso_is_track_audio(uint32_t pos, int ismsf)
+{
+ return 0;
+}
+
+static ATAPI iso_atapi =
+{
+ iso_ready,
+ iso_medium_changed,
+ iso_readtoc,
+ iso_readtoc_session,
+ iso_readtoc_raw,
+ iso_getcurrentsubchannel,
+ iso_readsector,
+ iso_readsector_raw,
+ iso_playaudio,
+ iso_seek,
+ iso_load,
+ iso_eject,
+ iso_pause,
+ iso_resume,
+ iso_size,
+ iso_status,
+ iso_is_track_audio,
+ iso_stop,
+ iso_exit
+};
diff --git a/src/cdrom-iso.h b/src/cdrom-iso.h
new file mode 100644
index 0000000..d4efd06
--- /dev/null
+++ b/src/cdrom-iso.h
@@ -0,0 +1,13 @@
+#ifndef CDROM_ISO_H
+#define CDROM_ISO_H
+
+/* this header file lists the functions provided by
+ various platform specific cdrom-ioctl files */
+
+extern char iso_path[1024];
+
+extern int iso_open(char *fn);
+extern void iso_reset();
+extern void iso_close();
+
+#endif /* ! CDROM_ISO_H */
diff --git a/src/cdrom-null.c b/src/cdrom-null.c
index d62f28b..5ba7320 100644
--- a/src/cdrom-null.c
+++ b/src/cdrom-null.c
@@ -59,7 +59,7 @@ static void null_load(void)
{
}
-static int null_readsector(uint8_t *b, int sector, int count)
+static int null_readsector(uint8_t *b, int sector)
{
return 0;
}
diff --git a/src/cmd640.c b/src/cmd640.c
deleted file mode 100644
index 1e8b8f9..0000000
--- a/src/cmd640.c
+++ /dev/null
@@ -1,71 +0,0 @@
-/*CMD640 emulation
- Currently only legacy mode emulated*/
-#include "ibm.h"
-#include "cmd640.h"
-#include "ide.h"
-#include "pci.h"
-
-static uint8_t card_cmd640[256];
-
-void cmd640_write(int func, int addr, uint8_t val, void *priv)
-{
-// pclog("cmd640_write: func=%d addr=%02x val=%02x %04x:%08x\n", func, addr, val, CS, cpu_state.pc);
- if (func > 0)
- return;
-
- switch (addr)
- {
- case 0x04:
- ide_pri_disable();
- ide_sec_disable();
- if (val & 0x01)
- {
- ide_pri_enable();
- ide_sec_enable();
- }
- card_cmd640[0x04] = val & 0x41;
- break;
- case 0x07:
- card_cmd640[0x07] = val & 0x86;
- break;
- case 0x3c:
- card_cmd640[0x3c] = val;
- break;
- }
-}
-
-static uint8_t cmd640_read(int func, int addr, void *p)
-{
-// pclog("cmd640_read: func=%d addr=%02x val=%02x %04x:%08x\n", func, addr, card_cmd640[addr], CS, cpu_state.pc);
- if (func > 0)
- return 0xff;
-
- return card_cmd640[addr];
-}
-
-void cmd640b_init(int card)
-{
- pci_add_specific(card, cmd640_read, cmd640_write, NULL);
-
- memset(card_cmd640, 0, 256);
- card_cmd640[0x00] = 0x95; card_cmd640[0x01] = 0x10; /**/
- card_cmd640[0x02] = 0x40; card_cmd640[0x03] = 0x06; /*CMD640*/
- card_cmd640[0x04] = 0x01; card_cmd640[0x05] = 0x00;
- card_cmd640[0x06] = 0x00; card_cmd640[0x07] = 0x02;
- card_cmd640[0x08] = 0x00; /*Revision*/
- card_cmd640[0x09] = 0x00; /*Programming interface*/
- card_cmd640[0x0a] = 0x01; /*Sub class - IDE controller*/
- card_cmd640[0x0b] = 0x01; /*Base class - Mass storage controller*/
-
-
- card_cmd640[0x3c] = 0x0e; /*Interrupt line*/
- card_cmd640[0x3d] = 1;
-
- card_cmd640[0x50] = 0x02; /*Revision = 2*/
- card_cmd640[0x51] = 0x80; /*2nd port disabled, drive 1 read ahead disabled*/
- card_cmd640[0x57] = 0x0c; /*Drive 2/3 read ahead disabled*/
- card_cmd640[0x59] = 0x40; /*Burst length*/
-
- ide_pri_disable();
- ide_sec_disable();
-}
diff --git a/src/cmd640.h b/src/cmd640.h
deleted file mode 100644
index 5371669..0000000
--- a/src/cmd640.h
+++ /dev/null
@@ -1 +0,0 @@
-void cmd640b_init(int card);
diff --git a/src/codegen.c b/src/codegen.c
index 373c15c..8256ab2 100644
--- a/src/codegen.c
+++ b/src/codegen.c
@@ -2,65 +2,12 @@
#include "x86_ops.h"
#include "mem.h"
#include "codegen.h"
-#include "x86.h"
-
-#include "386_common.h"
-
-#include "codegen_accumulate.h"
-#include "codegen_allocator.h"
-#include "codegen_backend.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_helpers.h"
-
-#define MAX_INSTRUCTION_COUNT 50
-
-static struct
-{
- uint32_t pc;
- int op_ssegs;
- x86seg *op_ea_seg;
- uint32_t op_32;
- int first_uop;
- int TOP;
-} codegen_instructions[MAX_INSTRUCTION_COUNT];
-
-int codegen_get_instruction_uop(codeblock_t *block, uint32_t pc, int *first_instruction, int *TOP)
-{
- int c;
-
- for (c = 0; c <= block->ins; c++)
- {
- if (codegen_instructions[c].pc == pc)
- {
- *first_instruction = c;
- *TOP = codegen_instructions[c].TOP;
- return codegen_instructions[c].first_uop;
- }
- }
-
- *first_instruction = block->ins;
- return -1;
-}
-
-void codegen_set_loop_start(ir_data_t *ir, int first_instruction)
-{
- uop_MOV_IMM(ir, IREG_op32, codegen_instructions[first_instruction].op_32);
- uop_MOV_PTR(ir, IREG_ea_seg, (void *)codegen_instructions[first_instruction].op_ea_seg);
- uop_MOV_IMM(ir, IREG_ssegs, codegen_instructions[first_instruction].op_ssegs);
-}
-
-int has_ea;
-
-codeblock_t *codeblock;
-uint16_t *codeblock_hash;
void (*codegen_timing_start)();
void (*codegen_timing_prefix)(uint8_t prefix, uint32_t fetchdat);
-void (*codegen_timing_opcode)(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t op_pc);
+void (*codegen_timing_opcode)(uint8_t opcode, uint32_t fetchdat, int op_32);
void (*codegen_timing_block_start)();
void (*codegen_timing_block_end)();
-int (*codegen_timing_jump_cycles)();
void codegen_timing_set(codegen_timing_t *timing)
{
@@ -69,706 +16,6 @@ void codegen_timing_set(codegen_timing_t *timing)
codegen_timing_opcode = timing->opcode;
codegen_timing_block_start = timing->block_start;
codegen_timing_block_end = timing->block_end;
- codegen_timing_jump_cycles = timing->jump_cycles;
}
int codegen_in_recompile;
-
-static int last_op_ssegs;
-static x86seg *last_op_ea_seg;
-static uint32_t last_op_32;
-
-void codegen_generate_reset()
-{
- last_op_ssegs = -1;
- last_op_ea_seg = NULL;
- last_op_32 = -1;
- has_ea = 0;
-}
-
-void codegen_check_seg_read(codeblock_t *block, ir_data_t *ir, x86seg *seg)
-{
- /*Segments always valid in real/V86 mode*/
- if (!(cr0 & 1) || (cpu_state.eflags & VM_FLAG))
- return;
- /*CS and SS must always be valid*/
- if (seg == &cpu_state.seg_cs || seg == &cpu_state.seg_ss)
- return;
- if (seg->checked)
- return;
- if (seg == &cpu_state.seg_ds && codegen_flat_ds && !(cpu_cur_status & CPU_STATUS_NOTFLATDS))
- return;
-
- uop_CMP_IMM_JZ(ir, ireg_seg_base(seg), (uint32_t)-1, codegen_gpf_rout);
-
- seg->checked = 1;
-}
-void codegen_check_seg_write(codeblock_t *block, ir_data_t *ir, x86seg *seg)
-{
- /*Segments always valid in real/V86 mode*/
- if (!(cr0 & 1) || (cpu_state.eflags & VM_FLAG))
- return;
- /*CS and SS must always be valid*/
- if (seg == &cpu_state.seg_cs || seg == &cpu_state.seg_ss)
- return;
- if (seg->checked)
- return;
- if (seg == &cpu_state.seg_ds && codegen_flat_ds && !(cpu_cur_status & CPU_STATUS_NOTFLATDS))
- return;
-
- uop_CMP_IMM_JZ(ir, ireg_seg_base(seg), (uint32_t)-1, codegen_gpf_rout);
-
- seg->checked = 1;
-}
-
-static x86seg *codegen_generate_ea_16_long(ir_data_t *ir, x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc)
-{
- uint32_t old_pc = (*op_pc) + 1;
-// pclog("codegen - mod=%i rm=%i reg=%i fetchdat=%08x\n", cpu_mod, cpu_rm, cpu_reg, fetchdat);
- if (!cpu_mod && cpu_rm == 6)
- {
- uint16_t addr = (fetchdat >> 8) & 0xffff;
- uop_MOV_IMM(ir, IREG_eaaddr, addr);
- (*op_pc) += 2;
- }
- else
- {
- int base_reg, index_reg, offset;
-
- switch (cpu_rm & 7)
- {
- case 0: case 1: case 7:
- base_reg = IREG_EBX;
- break;
- case 2: case 3: case 6:
- base_reg = IREG_EBP;
- break;
- case 4:
- base_reg = IREG_ESI;
- break;
- case 5:
- base_reg = IREG_EDI;
- break;
- }
- uop_MOV(ir, IREG_eaaddr, base_reg);
-
- if (!(cpu_rm & 4))
- {
- if (!(cpu_rm & 1))
- index_reg = IREG_ESI;
- else
- index_reg = IREG_EDI;
-
- uop_ADD(ir, IREG_eaaddr, IREG_eaaddr, index_reg);
- }
-
- switch (cpu_mod)
- {
- case 1:
- offset = (int)(int8_t)((fetchdat >> 8) & 0xff);
- uop_ADD_IMM(ir, IREG_eaaddr, IREG_eaaddr, offset);
- (*op_pc)++;
- break;
- case 2:
- offset = (fetchdat >> 8) & 0xffff;
- uop_ADD_IMM(ir, IREG_eaaddr, IREG_eaaddr, offset);
- (*op_pc) += 2;
- break;
- }
-
- uop_AND_IMM(ir, IREG_eaaddr, IREG_eaaddr, 0xffff);
-
- if (mod1seg[cpu_rm] == &ss && !op_ssegs)
- {
- op_ea_seg = &cpu_state.seg_ss;
- }
- }
-
- codegen_mark_code_present(ir->block, cs+old_pc, ((*op_pc)+1)-old_pc);
- return op_ea_seg;
-}
-
-static x86seg *codegen_generate_ea_32_long(ir_data_t *ir, x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc, int stack_offset)
-{
- codeblock_t *block = ir->block;
- uint32_t old_pc = (*op_pc) + 1;
- uint32_t new_eaaddr;
- int extra_bytes = 0;
-
- if (cpu_rm == 4)
- {
- uint8_t sib = fetchdat >> 8;
- (*op_pc)++;
-
- switch (cpu_mod)
- {
- case 0:
- if ((sib & 7) == 5)
- {
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- LOAD_IMMEDIATE_FROM_RAM_32(block, ir, IREG_eaaddr, cs + (*op_pc) + 1);
- extra_bytes = 1;
- }
- else
- {
- new_eaaddr = fastreadl(cs + (*op_pc) + 1);
- uop_MOV_IMM(ir, IREG_eaaddr, new_eaaddr);
- extra_bytes = 5;
- }
- (*op_pc) += 4;
- }
- else
- {
- uop_MOV(ir, IREG_eaaddr, sib & 7);
- extra_bytes = 1;
- }
- break;
- case 1:
- new_eaaddr = (uint32_t)(int8_t)((fetchdat >> 16) & 0xff);
- uop_MOV_IMM(ir, IREG_eaaddr, new_eaaddr);
- uop_ADD(ir, IREG_eaaddr, IREG_eaaddr, sib & 7);
- (*op_pc)++;
- extra_bytes = 2;
- break;
- case 2:
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- LOAD_IMMEDIATE_FROM_RAM_32(block, ir, IREG_eaaddr, cs + (*op_pc) + 1);
- extra_bytes = 1;
- }
- else
- {
- new_eaaddr = fastreadl(cs + (*op_pc) + 1);
- uop_MOV_IMM(ir, IREG_eaaddr, new_eaaddr);
- extra_bytes = 5;
- }
- (*op_pc) += 4;
- uop_ADD(ir, IREG_eaaddr, IREG_eaaddr, sib & 7);
- break;
- }
- if (stack_offset && (sib & 7) == 4 && (cpu_mod || (sib & 7) != 5)) /*ESP*/
- {
- uop_ADD_IMM(ir, IREG_eaaddr, IREG_eaaddr, stack_offset);
-// addbyte(0x05);
-// addlong(stack_offset);
- }
- if (((sib & 7) == 4 || (cpu_mod && (sib & 7) == 5)) && !op_ssegs)
- op_ea_seg = &cpu_state.seg_ss;
- if (((sib >> 3) & 7) != 4)
- {
- switch (sib >> 6)
- {
- case 0:
- uop_ADD(ir, IREG_eaaddr, IREG_eaaddr, (sib >> 3) & 7);
- break;
- case 1:
- uop_ADD_LSHIFT(ir, IREG_eaaddr, IREG_eaaddr, (sib >> 3) & 7, 1);
- break;
- case 2:
- uop_ADD_LSHIFT(ir, IREG_eaaddr, IREG_eaaddr, (sib >> 3) & 7, 2);
- break;
- case 3:
- uop_ADD_LSHIFT(ir, IREG_eaaddr, IREG_eaaddr, (sib >> 3) & 7, 3);
- break;
- }
- }
- }
- else
- {
- if (!cpu_mod && cpu_rm == 5)
- {
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- LOAD_IMMEDIATE_FROM_RAM_32(block, ir, IREG_eaaddr, cs + (*op_pc) + 1);
- }
- else
- {
- new_eaaddr = fastreadl(cs + (*op_pc) + 1);
- uop_MOV_IMM(ir, IREG_eaaddr, new_eaaddr);
- extra_bytes = 4;
- }
-
- (*op_pc) += 4;
- }
- else
- {
- uop_MOV(ir, IREG_eaaddr, cpu_rm);
- if (cpu_mod)
- {
- if (cpu_rm == 5 && !op_ssegs)
- op_ea_seg = &cpu_state.seg_ss;
- if (cpu_mod == 1)
- {
- uop_ADD_IMM(ir, IREG_eaaddr, IREG_eaaddr, (uint32_t)(int8_t)(fetchdat >> 8));
- (*op_pc)++;
- extra_bytes = 1;
- }
- else
- {
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- LOAD_IMMEDIATE_FROM_RAM_32(block, ir, IREG_temp0, cs + (*op_pc) + 1);
- uop_ADD(ir, IREG_eaaddr, IREG_eaaddr, IREG_temp0);
- }
- else
- {
- new_eaaddr = fastreadl(cs + (*op_pc) + 1);
- uop_ADD_IMM(ir, IREG_eaaddr, IREG_eaaddr, new_eaaddr);
- extra_bytes = 4;
- }
- (*op_pc) += 4;
- }
- }
- }
- }
-
- if (extra_bytes)
- codegen_mark_code_present(ir->block, cs+old_pc, extra_bytes);
-
- return op_ea_seg;
-}
-
-x86seg *codegen_generate_ea(ir_data_t *ir, x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc, uint32_t op_32, int stack_offset)
-{
- cpu_mod = (fetchdat >> 6) & 3;
- cpu_reg = (fetchdat >> 3) & 7;
- cpu_rm = fetchdat & 7;
-
- if ((fetchdat & 0xc0) == 0xc0)
- return NULL;
- if (op_32 & 0x200)
- return codegen_generate_ea_32_long(ir, op_ea_seg, fetchdat, op_ssegs, op_pc, stack_offset);
-
- return codegen_generate_ea_16_long(ir, op_ea_seg, fetchdat, op_ssegs, op_pc);
-}
-
-static uint8_t opcode_modrm[256] =
-{
- 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, /*00*/
- 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, /*10*/
- 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, /*20*/
- 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, /*30*/
-
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*40*/
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*50*/
- 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, /*60*/
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*70*/
-
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*80*/
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*90*/
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*a0*/
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*b0*/
-
- 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, /*c0*/
- 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, /*d0*/
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*e0*/
- 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, /*f0*/
-};
-static uint8_t opcode_0f_modrm[256] =
-{
- 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, /*00*/
- 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, /*10*/
- 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*20*/
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*30*/
-
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*40*/
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*50*/
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, /*60*/
- 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, /*70*/
-
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*80*/
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*90*/
- 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, /*a0*/
- 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, /*b0*/
-
- 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, /*c0*/
- 0, 1, 1, 1, 0, 1, 0, 0, 1, 1, 0, 1, 1, 1, 0, 1, /*d0*/
- 0, 1, 1, 0, 0, 1, 0, 0, 1, 1, 0, 1, 1, 1, 0, 1, /*e0*/
- 0, 1, 1, 1, 0, 1, 0, 0, 1, 1, 1, 0, 1, 1, 1, 0 /*f0*/
-};
-
-void codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_pc, uint32_t old_pc)
-{
- codeblock_t *block = &codeblock[block_current];
- ir_data_t *ir = codegen_get_ir_data();
- uint32_t op_pc = new_pc;
- OpFn *op_table = x86_dynarec_opcodes;
- RecompOpFn *recomp_op_table = recomp_opcodes;
- int opcode_shift = 0;
- int opcode_mask = 0x3ff;
- uint32_t recomp_opcode_mask = 0x1ff;
- uint32_t op_32 = use32;
- int over = 0;
- int test_modrm = 1;
- int pc_off = 0;
- uint32_t next_pc = 0;
-#ifdef DEBUG_EXTRA
- uint8_t last_prefix = 0;
-#endif
- op_ea_seg = &cpu_state.seg_ds;
- op_ssegs = 0;
-
- codegen_timing_start();
-
- while (!over)
- {
- switch (opcode)
- {
- case 0x0f:
-#ifdef DEBUG_EXTRA
- last_prefix = 0x0f;
-#endif
- op_table = x86_dynarec_opcodes_0f;
- recomp_op_table = recomp_opcodes_0f;
- over = 1;
- break;
-
- case 0x26: /*ES:*/
- op_ea_seg = &cpu_state.seg_es;
- op_ssegs = 1;
- break;
- case 0x2e: /*CS:*/
- op_ea_seg = &cpu_state.seg_cs;
- op_ssegs = 1;
- break;
- case 0x36: /*SS:*/
- op_ea_seg = &cpu_state.seg_ss;
- op_ssegs = 1;
- break;
- case 0x3e: /*DS:*/
- op_ea_seg = &cpu_state.seg_ds;
- op_ssegs = 1;
- break;
- case 0x64: /*FS:*/
- op_ea_seg = &cpu_state.seg_fs;
- op_ssegs = 1;
- break;
- case 0x65: /*GS:*/
- op_ea_seg = &cpu_state.seg_gs;
- op_ssegs = 1;
- break;
-
- case 0x66: /*Data size select*/
- op_32 = ((use32 & 0x100) ^ 0x100) | (op_32 & 0x200);
- break;
- case 0x67: /*Address size select*/
- op_32 = ((use32 & 0x200) ^ 0x200) | (op_32 & 0x100);
- break;
-
- case 0xd8:
-#ifdef DEBUG_EXTRA
- last_prefix = 0xd8;
-#endif
- op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_d8_a32 : x86_dynarec_opcodes_d8_a16;
- recomp_op_table = recomp_opcodes_d8;
- opcode_shift = 3;
- opcode_mask = 0x1f;
- over = 1;
- pc_off = -1;
- test_modrm = 0;
- block->flags |= CODEBLOCK_HAS_FPU;
- break;
- case 0xd9:
-#ifdef DEBUG_EXTRA
- last_prefix = 0xd9;
-#endif
- op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_d9_a32 : x86_dynarec_opcodes_d9_a16;
- recomp_op_table = recomp_opcodes_d9;
- opcode_mask = 0xff;
- over = 1;
- pc_off = -1;
- test_modrm = 0;
- block->flags |= CODEBLOCK_HAS_FPU;
- break;
- case 0xda:
-#ifdef DEBUG_EXTRA
- last_prefix = 0xda;
-#endif
- op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_da_a32 : x86_dynarec_opcodes_da_a16;
- recomp_op_table = recomp_opcodes_da;
- opcode_mask = 0xff;
- over = 1;
- pc_off = -1;
- test_modrm = 0;
- block->flags |= CODEBLOCK_HAS_FPU;
- break;
- case 0xdb:
-#ifdef DEBUG_EXTRA
- last_prefix = 0xdb;
-#endif
- op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_db_a32 : x86_dynarec_opcodes_db_a16;
- recomp_op_table = recomp_opcodes_db;
- opcode_mask = 0xff;
- over = 1;
- pc_off = -1;
- test_modrm = 0;
- block->flags |= CODEBLOCK_HAS_FPU;
- break;
- case 0xdc:
-#ifdef DEBUG_EXTRA
- last_prefix = 0xdc;
-#endif
- op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_dc_a32 : x86_dynarec_opcodes_dc_a16;
- recomp_op_table = recomp_opcodes_dc;
- opcode_shift = 3;
- opcode_mask = 0x1f;
- over = 1;
- pc_off = -1;
- test_modrm = 0;
- block->flags |= CODEBLOCK_HAS_FPU;
- break;
- case 0xdd:
-#ifdef DEBUG_EXTRA
- last_prefix = 0xdd;
-#endif
- op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_dd_a32 : x86_dynarec_opcodes_dd_a16;
- recomp_op_table = recomp_opcodes_dd;
- opcode_mask = 0xff;
- over = 1;
- pc_off = -1;
- test_modrm = 0;
- block->flags |= CODEBLOCK_HAS_FPU;
- break;
- case 0xde:
-#ifdef DEBUG_EXTRA
- last_prefix = 0xde;
-#endif
- op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_de_a32 : x86_dynarec_opcodes_de_a16;
- recomp_op_table = recomp_opcodes_de;
- opcode_mask = 0xff;
- over = 1;
- pc_off = -1;
- test_modrm = 0;
- block->flags |= CODEBLOCK_HAS_FPU;
- break;
- case 0xdf:
-#ifdef DEBUG_EXTRA
- last_prefix = 0xdf;
-#endif
- op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_df_a32 : x86_dynarec_opcodes_df_a16;
- recomp_op_table = recomp_opcodes_df;
- opcode_mask = 0xff;
- over = 1;
- pc_off = -1;
- test_modrm = 0;
- block->flags |= CODEBLOCK_HAS_FPU;
- break;
-
- case 0xf0: /*LOCK*/
- break;
-
- case 0xf2: /*REPNE*/
-#ifdef DEBUG_EXTRA
- last_prefix = 0xf2;
-#endif
- op_table = x86_dynarec_opcodes_REPNE;
- recomp_op_table = NULL;//recomp_opcodes_REPNE;
- break;
- case 0xf3: /*REPE*/
-#ifdef DEBUG_EXTRA
- last_prefix = 0xf3;
-#endif
- op_table = x86_dynarec_opcodes_REPE;
- recomp_op_table = NULL;//recomp_opcodes_REPE;
- break;
-
- default:
- goto generate_call;
- }
- fetchdat = fastreadl(cs + op_pc);
- codegen_timing_prefix(opcode, fetchdat);
- if (cpu_state.abrt)
- return;
- opcode = fetchdat & 0xff;
- if (!pc_off)
- fetchdat >>= 8;
-
- op_pc++;
- }
-
-generate_call:
- codegen_instructions[block->ins].pc = cpu_state.oldpc;
- codegen_instructions[block->ins].op_ssegs = last_op_ssegs;
- codegen_instructions[block->ins].op_ea_seg = last_op_ea_seg;
- codegen_instructions[block->ins].op_32 = last_op_32;
- codegen_instructions[block->ins].TOP = cpu_state.TOP;
- codegen_instructions[block->ins].first_uop = ir->wr_pos;
-
- codegen_timing_opcode(opcode, fetchdat, op_32, op_pc);
-
- codegen_accumulate(ACCREG_ins, 1);
- codegen_accumulate(ACCREG_cycles, -codegen_block_cycles);
- codegen_block_cycles = 0;
-
- if ((op_table == x86_dynarec_opcodes &&
- ((opcode & 0xf0) == 0x70 || (opcode & 0xfc) == 0xe0 || opcode == 0xc2 ||
- (opcode & 0xfe) == 0xca || (opcode & 0xfc) == 0xcc || (opcode & 0xfc) == 0xe8 ||
- (opcode == 0xff && ((fetchdat & 0x38) >= 0x10 && (fetchdat & 0x38) < 0x30)))) ||
- (op_table == x86_dynarec_opcodes_0f && ((opcode & 0xf0) == 0x80)))
- {
- /*On some CPUs (eg K6), a jump/branch instruction may be able to pair with
- subsequent instructions, so no cycles may have been deducted for it yet.
- To prevent having zero cycle blocks (eg with a jump instruction pointing
- to itself), apply the cycles that would be taken if this jump is taken,
- then reverse it for subsequent instructions if the jump is not taken*/
- int jump_cycles = codegen_timing_jump_cycles();
-
- if (jump_cycles)
- codegen_accumulate(ACCREG_cycles, -jump_cycles);
- codegen_accumulate_flush(ir);
- if (jump_cycles)
- codegen_accumulate(ACCREG_cycles, jump_cycles);
- }
-
- if (op_table == x86_dynarec_opcodes_0f && opcode == 0x0f)
- {
- /*3DNow opcodes are stored after ModR/M, SIB and any offset*/
- uint8_t modrm = fetchdat & 0xff;
- uint8_t sib = (fetchdat >> 8) & 0xff;
- uint32_t opcode_pc = op_pc + 1;
- uint8_t opcode_3dnow;
-
- if ((modrm & 0xc0) != 0xc0)
- {
- if (op_32 & 0x200)
- {
- if ((modrm & 7) == 4)
- {
- /* Has SIB*/
- opcode_pc++;
- if ((modrm & 0xc0) == 0x40)
- opcode_pc++;
- else if ((modrm & 0xc0) == 0x80)
- opcode_pc += 4;
- else if ((sib & 0x07) == 0x05)
- opcode_pc += 4;
- }
- else
- {
- if ((modrm & 0xc0) == 0x40)
- opcode_pc++;
- else if ((modrm & 0xc0) == 0x80)
- opcode_pc += 4;
- else if ((modrm & 0xc7) == 0x05)
- opcode_pc += 4;
- }
- }
- else
- {
- if ((modrm & 0xc0) == 0x40)
- opcode_pc++;
- else if ((modrm & 0xc0) == 0x80)
- opcode_pc += 2;
- else if ((modrm & 0xc7) == 0x06)
- opcode_pc += 2;
- }
- }
-
- opcode_3dnow = fastreadb(cs + opcode_pc);
-// pclog("recomp_opcodes_3DNOW[%02x]=%p\n", opcode, recomp_opcodes_3DNOW[opcode]);
- if (recomp_opcodes_3DNOW[opcode_3dnow])
- {
- next_pc = opcode_pc + 1;
-
- op_table = x86_dynarec_opcodes_3DNOW;
- recomp_op_table = recomp_opcodes_3DNOW;
- opcode = opcode_3dnow;
- recomp_opcode_mask = 0xff;
- opcode_mask = 0xff;
- }
- }
- codegen_mark_code_present(block, cs+old_pc, (op_pc - old_pc) - pc_off);
-// pclog("%04x:%08x : %02x\n", CS, new_pc, opcode);
- if (recomp_op_table && recomp_op_table[(opcode | op_32) & recomp_opcode_mask])
- {
- uint32_t new_pc = recomp_op_table[(opcode | op_32) & recomp_opcode_mask](block, ir, opcode, fetchdat, op_32, op_pc);
- if (new_pc)
- {
- if (new_pc != -1)
- uop_MOV_IMM(ir, IREG_pc, new_pc);
-
- codegen_endpc = (cs + cpu_state.pc) + 8;
-
- block->ins++;
-
- if (block->ins >= MAX_INSTRUCTION_COUNT)
- CPU_BLOCK_END();
-
- return;
- }
- }
-
- if ((op_table == x86_dynarec_opcodes_REPNE || op_table == x86_dynarec_opcodes_REPE) && !op_table[opcode | op_32])
- {
- op_table = x86_dynarec_opcodes;
- recomp_op_table = recomp_opcodes;
- }
-
- op = op_table[((opcode >> opcode_shift) | op_32) & opcode_mask];
-
- if (!test_modrm ||
- (op_table == x86_dynarec_opcodes && opcode_modrm[opcode]) ||
- (op_table == x86_dynarec_opcodes_0f && opcode_0f_modrm[opcode]) ||
- (op_table == x86_dynarec_opcodes_3DNOW))
- {
- int stack_offset = 0;
-
- if (op_table == x86_dynarec_opcodes && opcode == 0x8f) /*POP*/
- stack_offset = (op_32 & 0x100) ? 4 : 2;
-
- cpu_mod = (fetchdat >> 6) & 3;
- cpu_reg = (fetchdat >> 3) & 7;
- cpu_rm = fetchdat & 7;
-
- uop_MOV_IMM(ir, IREG_rm_mod_reg, cpu_rm | (cpu_mod << 8) | (cpu_reg << 16));
-
- op_pc += pc_off;
- if (cpu_mod != 3 && !(op_32 & 0x200))
- {
- op_ea_seg = codegen_generate_ea_16_long(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc);
-// has_ea = 1;
- }
- if (cpu_mod != 3 && (op_32 & 0x200))
- {
- op_ea_seg = codegen_generate_ea_32_long(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, stack_offset);
-// has_ea = 1;
- }
-// op_ea_seg = codegen_generate_ea_32_long(op_ea_seg, fetchdat, op_ssegs, &op_pc, stack_offset);
- op_pc -= pc_off;
- }
-
-#ifdef DEBUG_EXTRA
- uop_LOG_INSTR(ir, opcode | (last_prefix << 8));
-#endif
- codegen_accumulate_flush(ir);
- if (op_table == x86_dynarec_opcodes_3DNOW)
- uop_MOV_IMM(ir, IREG_pc, next_pc);
- else
- uop_MOV_IMM(ir, IREG_pc, op_pc+pc_off);
- uop_MOV_IMM(ir, IREG_oldpc, old_pc);
- if (op_32 != last_op_32)
- uop_MOV_IMM(ir, IREG_op32, op_32);
- if (op_ea_seg != last_op_ea_seg)
- uop_MOV_PTR(ir, IREG_ea_seg, (void *)op_ea_seg);
- if (op_ssegs != last_op_ssegs)
- uop_MOV_IMM(ir, IREG_ssegs, op_ssegs);
- uop_LOAD_FUNC_ARG_IMM(ir, 0, fetchdat);
- uop_CALL_INSTRUCTION_FUNC(ir, op);
- codegen_mark_code_present(block, cs+cpu_state.pc, 8);
-
- last_op_32 = op_32;
- last_op_ea_seg = op_ea_seg;
- last_op_ssegs = op_ssegs;
- //codegen_block_ins++;
-
- block->ins++;
-
- if (block->ins >= MAX_INSTRUCTION_COUNT)
- CPU_BLOCK_END();
-
- codegen_endpc = (cs + cpu_state.pc) + 8;
-
-// if (has_ea)
-// fatal("Has EA\n");
-}
diff --git a/src/codegen.h b/src/codegen.h
index 83f37ae..e715915 100644
--- a/src/codegen.h
+++ b/src/codegen.h
@@ -1,8 +1,12 @@
-#ifndef _CODEGEN_H_
-#define _CODEGEN_H_
-
#include "mem.h"
-#include "x86_ops.h"
+
+#ifdef __amd64__
+#include "codegen_x86-64.h"
+#elif defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined WIN32 || defined _WIN32 || defined _WIN32
+#include "codegen_x86.h"
+#else
+#error Dynamic recompiler not implemented on your platform
+#endif
/*Handling self-modifying code (of which there is a lot on x86) :
@@ -31,88 +35,53 @@
typedef struct codeblock_t
{
- uint32_t pc;
- uint32_t _cs;
- uint32_t phys, phys_2;
- uint16_t status;
- uint16_t flags;
- uint8_t ins;
- uint8_t TOP;
-
- /*Pointers for codeblock tree, used to search for blocks when hash lookup
- fails.*/
- uint16_t parent, left, right;
-
- uint8_t *data;
-
- uint64_t page_mask, page_mask2;
- uint64_t *dirty_mask, *dirty_mask2;
-
/*Previous and next pointers, for the codeblock list associated with
each physical page. Two sets of pointers, as a codeblock can be
present in two pages.*/
- uint16_t prev, next;
- uint16_t prev_2, next_2;
-
- /*First mem_block_t used by this block. Any subsequent mem_block_ts
- will be in the list starting at head_mem_block->next.*/
- struct mem_block_t *head_mem_block;
+ struct codeblock_t *prev, *next;
+ struct codeblock_t *prev_2, *next_2;
+
+ /*Pointers for codeblock tree, used to search for blocks when hash lookup
+ fails.*/
+ struct codeblock_t *parent, *left, *right;
+
+ uint32_t pc;
+ uint32_t _cs;
+ uint32_t endpc;
+ uint32_t phys, phys_2;
+ uint32_t use32;
+ int stack32;
+ int pnt;
+ int ins;
+ uint64_t page_mask, page_mask2;
+
+ int was_recompiled;
+ uint32_t flags;
+ int TOP;
+
+ uint64_t cmp;
+
+ uint8_t data[2048];
} codeblock_t;
-extern codeblock_t *codeblock;
-
-extern uint16_t *codeblock_hash;
-
-extern uint8_t *block_write_data;
-
/*Code block uses FPU*/
#define CODEBLOCK_HAS_FPU 1
/*Code block is always entered with the same FPU top-of-stack*/
#define CODEBLOCK_STATIC_TOP 2
-/*Code block has been compiled*/
-#define CODEBLOCK_WAS_RECOMPILED 4
-/*Code block is in free list and is not valid*/
-#define CODEBLOCK_IN_FREE_LIST 8
-/*Code block spans two pages, page_mask2 and dirty_mask2 are valid*/
-#define CODEBLOCK_HAS_PAGE2 0x10
-/*Code block is using a byte mask for code present and dirty*/
-#define CODEBLOCK_BYTE_MASK 0x20
-/*Code block is in dirty list*/
-#define CODEBLOCK_IN_DIRTY_LIST 0x40
-/*Code block is not inlining immediate parameters, parameters must be fetched from memory*/
-#define CODEBLOCK_NO_IMMEDIATES 0x80
-
-#define BLOCK_PC_INVALID 0xffffffff
-
-#define BLOCK_INVALID 0
-
-static inline int get_block_nr(codeblock_t *block)
-{
- return ((uintptr_t)block - (uintptr_t)codeblock) / sizeof(codeblock_t);
-}
static inline codeblock_t *codeblock_tree_find(uint32_t phys, uint32_t _cs)
{
- codeblock_t *block;
+ codeblock_t *block = pages[phys >> 12].head;
uint64_t a = _cs | ((uint64_t)phys << 32);
- if (!pages[phys >> 12].head)
- return NULL;
-
- block = &codeblock[pages[phys >> 12].head];
while (block)
{
- uint64_t block_cmp = block->_cs | ((uint64_t)block->phys << 32);
- if (a == block_cmp)
- {
- if (!((block->status ^ cpu_cur_status) & CPU_STATUS_FLAGS) &&
- ((block->status & cpu_cur_status & CPU_STATUS_MASK) == (cpu_cur_status & CPU_STATUS_MASK)))
- break;
- }
- if (a < block_cmp)
- block = block->left ? &codeblock[block->left] : NULL;
+ if (a == block->cmp)
+ break;
+ else if (a < block->cmp)
+ block = block->left;
else
- block = block->right ? &codeblock[block->right] : NULL;
+ block = block->right;
}
return block;
@@ -120,87 +89,75 @@ static inline codeblock_t *codeblock_tree_find(uint32_t phys, uint32_t _cs)
static inline void codeblock_tree_add(codeblock_t *new_block)
{
- codeblock_t *block = &codeblock[pages[new_block->phys >> 12].head];
+ codeblock_t *block = pages[new_block->phys >> 12].head;
uint64_t a = new_block->_cs | ((uint64_t)new_block->phys << 32);
-
- if (!pages[new_block->phys >> 12].head)
+ new_block->cmp = a;
+
+ if (!block)
{
- pages[new_block->phys >> 12].head = get_block_nr(new_block);
- new_block->parent = new_block->left = new_block->right = BLOCK_INVALID;
+ pages[new_block->phys >> 12].head = new_block;
+ new_block->parent = new_block->left = new_block->right = NULL;
}
else
{
codeblock_t *old_block = NULL;
- uint64_t old_block_cmp = 0;
while (block)
{
old_block = block;
- old_block_cmp = old_block->_cs | ((uint64_t)old_block->phys << 32);
-
- if (a < old_block_cmp)
- block = block->left ? &codeblock[block->left] : NULL;
+ if (a < old_block->cmp)
+ block = block->left;
else
- block = block->right ? &codeblock[block->right] : NULL;
+ block = block->right;
}
- if (a < old_block_cmp)
- old_block->left = get_block_nr(new_block);
+ if (a < old_block->cmp)
+ old_block->left = new_block;
else
- old_block->right = get_block_nr(new_block);
+ old_block->right = new_block;
- new_block->parent = get_block_nr(old_block);
- new_block->left = new_block->right = BLOCK_INVALID;
+ new_block->parent = old_block;
+ new_block->left = new_block->right = NULL;
}
}
static inline void codeblock_tree_delete(codeblock_t *block)
{
- uint16_t parent_nr = block->parent;
- codeblock_t *parent;
-
- if (block->parent)
- parent = &codeblock[block->parent];
- else
- parent = NULL;
+ codeblock_t *parent = block->parent;
if (!block->left && !block->right)
{
/*Easy case - remove from parent*/
if (!parent)
- pages[block->phys >> 12].head = BLOCK_INVALID;
+ pages[block->phys >> 12].head = NULL;
else
{
- uint16_t block_nr = get_block_nr(block);
-
- if (parent->left == block_nr)
- parent->left = BLOCK_INVALID;
- if (parent->right == block_nr)
- parent->right = BLOCK_INVALID;
+ if (parent->left == block)
+ parent->left = NULL;
+ if (parent->right == block)
+ parent->right = NULL;
}
return;
}
else if (!block->left)
{
/*Only right node*/
- if (!parent_nr)
+ if (!parent)
{
pages[block->phys >> 12].head = block->right;
- codeblock[pages[block->phys >> 12].head].parent = BLOCK_INVALID;
+ pages[block->phys >> 12].head->parent = NULL;
}
else
{
- uint16_t block_nr = get_block_nr(block);
-
- if (parent->left == block_nr)
+ if (parent->left == block)
{
parent->left = block->right;
- codeblock[parent->left].parent = parent_nr;
+ parent->left->parent = parent;
}
- if (parent->right == block_nr)
+ if (parent->right == block)
{
parent->right = block->right;
- codeblock[parent->right].parent = parent_nr;
+ parent->right->parent = parent;
}
}
return;
@@ -208,24 +165,22 @@ static inline void codeblock_tree_delete(codeblock_t *block)
else if (!block->right)
{
/*Only left node*/
- if (!parent_nr)
+ if (!parent)
{
pages[block->phys >> 12].head = block->left;
- codeblock[pages[block->phys >> 12].head].parent = BLOCK_INVALID;
+ pages[block->phys >> 12].head->parent = NULL;
}
else
{
- uint16_t block_nr = get_block_nr(block);
-
- if (parent->left == block_nr)
+ if (parent->left == block)
{
parent->left = block->left;
- codeblock[parent->left].parent = parent_nr;
+ parent->left->parent = parent;
}
- if (parent->right == block_nr)
+ if (parent->right == block)
{
parent->right = block->left;
- codeblock[parent->right].parent = parent_nr;
+ parent->right->parent = parent;
}
}
return;
@@ -233,54 +188,50 @@ static inline void codeblock_tree_delete(codeblock_t *block)
else
{
/*Difficult case - node has two children. Walk right child to find lowest node*/
- codeblock_t *lowest = &codeblock[block->right], *highest;
+ codeblock_t *lowest = block->right, *highest;
codeblock_t *old_parent;
- uint16_t lowest_nr;
while (lowest->left)
- lowest = &codeblock[lowest->left];
- lowest_nr = get_block_nr(lowest);
-
- old_parent = &codeblock[lowest->parent];
+ lowest = lowest->left;
+
+ old_parent = lowest->parent;
/*Replace deleted node with lowest node*/
- if (!parent_nr)
- pages[block->phys >> 12].head = lowest_nr;
+ if (!parent)
+ pages[block->phys >> 12].head = lowest;
else
{
- uint16_t block_nr = get_block_nr(block);
-
- if (parent->left == block_nr)
- parent->left = lowest_nr;
- if (parent->right == block_nr)
- parent->right = lowest_nr;
+ if (parent->left == block)
+ parent->left = lowest;
+ if (parent->right == block)
+ parent->right = lowest;
}
- lowest->parent = parent_nr;
+ lowest->parent = parent;
lowest->left = block->left;
if (lowest->left)
- codeblock[lowest->left].parent = lowest_nr;
+ lowest->left->parent = lowest;
- old_parent->left = BLOCK_INVALID;
+ old_parent->left = NULL;
- highest = &codeblock[lowest->right];
- if (!lowest->right)
+ highest = lowest->right;
+ if (!highest)
{
- if (lowest_nr != block->right)
+ if (lowest != block->right)
{
lowest->right = block->right;
- codeblock[block->right].parent = lowest_nr;
+ block->right->parent = lowest;
}
return;
}
while (highest->right)
- highest = &codeblock[highest->right];
+ highest = highest->right;
- if (block->right && block->right != lowest_nr)
+ if (block->right && block->right != lowest)
{
highest->right = block->right;
- codeblock[block->right].parent = get_block_nr(highest);
+ block->right->parent = highest;
}
}
}
@@ -288,54 +239,22 @@ static inline void codeblock_tree_delete(codeblock_t *block)
#define PAGE_MASK_MASK 63
#define PAGE_MASK_SHIFT 6
-void codegen_mark_code_present_multibyte(codeblock_t *block, uint32_t start_pc, int len);
+extern codeblock_t *codeblock;
-static inline void codegen_mark_code_present(codeblock_t *block, uint32_t start_pc, int len)
-{
- if (len == 1)
- {
- if (block->flags & CODEBLOCK_BYTE_MASK)
- {
- if (!((start_pc ^ block->pc) & ~0x3f)) /*Starts in second page*/
- block->page_mask |= ((uint64_t)1 << (start_pc & PAGE_MASK_MASK));
- else
- block->page_mask2 |= ((uint64_t)1 << (start_pc & PAGE_MASK_MASK));
- }
- else
- {
- if (!((start_pc ^ block->pc) & ~0xfff)) /*Starts in second page*/
- block->page_mask |= ((uint64_t)1 << ((start_pc >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK));
- else
- block->page_mask2 |= ((uint64_t)1 << ((start_pc >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK));
- }
- }
- else
- codegen_mark_code_present_multibyte(block, start_pc, len);
-}
+extern codeblock_t **codeblock_hash;
void codegen_init();
-void codegen_close();
void codegen_reset();
void codegen_block_init(uint32_t phys_addr);
void codegen_block_remove();
void codegen_block_start_recompile(codeblock_t *block);
void codegen_block_end_recompile(codeblock_t *block);
void codegen_block_end();
-void codegen_delete_block(codeblock_t *block);
void codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_pc, uint32_t old_pc);
void codegen_generate_seg_restore();
void codegen_set_op32();
void codegen_flush();
void codegen_check_flush(struct page_t *page, uint64_t mask, uint32_t phys_addr);
-struct ir_data_t;
-x86seg *codegen_generate_ea(struct ir_data_t *ir, x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc, uint32_t op_32, int stack_offset);
-void codegen_check_seg_read(codeblock_t *block, struct ir_data_t *ir, x86seg *seg);
-void codegen_check_seg_write(codeblock_t *block, struct ir_data_t *ir, x86seg *seg);
-
-int codegen_purge_purgable_list();
-/*Delete a random code block to free memory. This is obviously quite expensive, and
- will only be called when the allocator is out of memory*/
-void codegen_delete_random_block(int required_mem_block);
extern int cpu_block_end;
extern uint32_t codegen_endpc;
@@ -354,29 +273,23 @@ extern int codegen_block_cycles;
extern void (*codegen_timing_start)();
extern void (*codegen_timing_prefix)(uint8_t prefix, uint32_t fetchdat);
-extern void (*codegen_timing_opcode)(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t op_pc);
+extern void (*codegen_timing_opcode)(uint8_t opcode, uint32_t fetchdat, int op_32);
extern void (*codegen_timing_block_start)();
extern void (*codegen_timing_block_end)();
-extern int (*codegen_timing_jump_cycles)();
typedef struct codegen_timing_t
{
void (*start)();
void (*prefix)(uint8_t prefix, uint32_t fetchdat);
- void (*opcode)(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t op_pc);
+ void (*opcode)(uint8_t opcode, uint32_t fetchdat, int op_32);
void (*block_start)();
void (*block_end)();
- int (*jump_cycles)();
} codegen_timing_t;
extern codegen_timing_t codegen_timing_pentium;
extern codegen_timing_t codegen_timing_686;
extern codegen_timing_t codegen_timing_486;
extern codegen_timing_t codegen_timing_winchip;
-extern codegen_timing_t codegen_timing_winchip2;
-extern codegen_timing_t codegen_timing_cyrixiii;
-extern codegen_timing_t codegen_timing_k6;
-extern codegen_timing_t codegen_timing_p6;
void codegen_timing_set(codegen_timing_t *timing);
@@ -385,6 +298,45 @@ extern int block_pos;
#define CPU_BLOCK_END() cpu_block_end = 1
+static inline void addbyte(uint8_t val)
+{
+ codeblock[block_current].data[block_pos++] = val;
+ if (block_pos >= BLOCK_MAX)
+ {
+ CPU_BLOCK_END();
+ }
+}
+
+static inline void addword(uint16_t val)
+{
+ *(uint16_t *)(void *)&codeblock[block_current].data[block_pos] = val;
+ block_pos += 2;
+ if (block_pos >= BLOCK_MAX)
+ {
+ CPU_BLOCK_END();
+ }
+}
+
+static inline void addlong(uint32_t val)
+{
+ *(uint32_t *)&codeblock[block_current].data[block_pos] = val;
+ block_pos += 4;
+ if (block_pos >= BLOCK_MAX)
+ {
+ CPU_BLOCK_END();
+ }
+}
+
+static inline void addquad(uint64_t val)
+{
+ *(uint64_t *)&codeblock[block_current].data[block_pos] = val;
+ block_pos += 8;
+ if (block_pos >= BLOCK_MAX)
+ {
+ CPU_BLOCK_END();
+ }
+}
+
/*Current physical page of block being recompiled. -1 if no recompilation taking place */
extern uint32_t recomp_page;
@@ -403,14 +355,3 @@ extern int codegen_fpu_loaded_iq[8];
extern int codegen_reg_loaded[8];
extern int codegen_in_recompile;
-
-void codegen_generate_reset();
-
-int codegen_get_instruction_uop(codeblock_t *block, uint32_t pc, int *first_instruction, int *TOP);
-void codegen_set_loop_start(struct ir_data_t *ir, int first_instruction);
-
-#ifdef DEBUG_EXTRA
-extern uint32_t instr_counts[256*256];
-#endif
-
-#endif
diff --git a/src/codegen_accumulate.c b/src/codegen_accumulate.c
deleted file mode 100644
index 968b7a5..0000000
--- a/src/codegen_accumulate.c
+++ /dev/null
@@ -1,50 +0,0 @@
-#include "ibm.h"
-#include "codegen.h"
-#include "codegen_accumulate.h"
-#include "codegen_ir.h"
-
-static struct
-{
- int count;
- int dest_reg;
-} acc_regs[] =
-{
- [ACCREG_ins] = {0, IREG_ins},
- [ACCREG_cycles] = {0, IREG_cycles},
-};
-
-void codegen_accumulate(int acc_reg, int delta)
-{
- if (acc_reg == ACCREG_cycles)
- {
-// pclog("cycles %04x:%04x %i\n", CS, cpu_state.pc, delta);
-// if (CS == 0x1000 && cpu_state.pc == 0x863)
-// fatal("Here\n");
- }
- acc_regs[acc_reg].count += delta;
-}
-
-void codegen_accumulate_flush(ir_data_t *ir)
-{
- int c;
-
- for (c = 0; c < ACCREG_COUNT; c++)
- {
- if (acc_regs[c].count)
- {
-// if (c == ACCREG_cycles)
-// pclog("accumulate %i %i %i\n", c, acc_regs[c].dest_reg, acc_regs[c].count);
- uop_ADD_IMM(ir, acc_regs[c].dest_reg, acc_regs[c].dest_reg, acc_regs[c].count);
- }
-
- acc_regs[c].count = 0;
- }
-}
-
-void codegen_accumulate_reset()
-{
- int c;
-
- for (c = 0; c < ACCREG_COUNT; c++)
- acc_regs[c].count = 0;
-}
diff --git a/src/codegen_accumulate.h b/src/codegen_accumulate.h
deleted file mode 100644
index 6c19499..0000000
--- a/src/codegen_accumulate.h
+++ /dev/null
@@ -1,13 +0,0 @@
-enum
-{
- ACCREG_ins = 0,
- ACCREG_cycles = 1,
-
- ACCREG_COUNT
-};
-
-struct ir_data_t;
-
-void codegen_accumulate(int acc_reg, int delta);
-void codegen_accumulate_flush(struct ir_data_t *ir);
-void codegen_accumulate_reset();
diff --git a/src/codegen_allocator.c b/src/codegen_allocator.c
deleted file mode 100644
index a5301d1..0000000
--- a/src/codegen_allocator.c
+++ /dev/null
@@ -1,131 +0,0 @@
-#if defined(__linux__) || defined(__APPLE__)
-#include
-#include
-#include
-#endif
-#if defined WIN32 || defined _WIN32 || defined _WIN32
-#include
-#endif
-
-#include "ibm.h"
-#include "codegen.h"
-#include "codegen_allocator.h"
-
-typedef struct mem_block_t
-{
- uint32_t offset; /*Offset into mem_block_alloc*/
- uint32_t next;
- uint16_t code_block;
-} mem_block_t;
-
-static mem_block_t mem_blocks[MEM_BLOCK_NR];
-static uint32_t mem_block_free_list;
-static uint8_t *mem_block_alloc = NULL;
-
-int codegen_allocator_usage = 0;
-
-void codegen_allocator_init()
-{
- int c;
-
-#if defined WIN32 || defined _WIN32 || defined _WIN32
- mem_block_alloc = VirtualAlloc(NULL, MEM_BLOCK_NR * MEM_BLOCK_SIZE, MEM_COMMIT, PAGE_EXECUTE_READWRITE);
- /* TODO: check deployment target: older Intel-based versions of macOS don't play
- nice with MAP_JIT. */
-#elif defined(__APPLE__) && defined(MAP_JIT)
- mem_block_alloc = mmap(0, MEM_BLOCK_NR * MEM_BLOCK_SIZE, PROT_READ|PROT_WRITE|PROT_EXEC, MAP_ANON|MAP_PRIVATE|MAP_JIT, 0, 0);
-#else
- mem_block_alloc = mmap(0, MEM_BLOCK_NR * MEM_BLOCK_SIZE, PROT_READ|PROT_WRITE|PROT_EXEC, MAP_ANON|MAP_PRIVATE, 0, 0);
-#endif
-
- for (c = 0; c < MEM_BLOCK_NR; c++)
- {
- mem_blocks[c].offset = c * MEM_BLOCK_SIZE;
- mem_blocks[c].code_block = BLOCK_INVALID;
- if (c < MEM_BLOCK_NR-1)
- mem_blocks[c].next = c+2;
- else
- mem_blocks[c].next = 0;
- }
- mem_block_free_list = 1;
-}
-
-mem_block_t *codegen_allocator_allocate(mem_block_t *parent, int code_block)
-{
- mem_block_t *block;
- uint32_t block_nr;
-
- while (!mem_block_free_list)
- {
- /*Pick a random memory block and free the owning code block*/
- block_nr = rand() & MEM_BLOCK_MASK;
- block = &mem_blocks[block_nr];
-
- if (block->code_block && block->code_block != code_block)
- codegen_delete_block(&codeblock[block->code_block]);
- }
-// fatal("codegen_allocator_allocate: free list empty!\n");
-
- /*Remove from free list*/
- block_nr = mem_block_free_list;
- block = &mem_blocks[block_nr-1];
- mem_block_free_list = block->next;
-
- block->code_block = code_block;
- if (parent)
- {
- /*Add to parent list*/
- block->next = parent->next;
- parent->next = block_nr;
- }
- else
- block->next = 0;
-
- codegen_allocator_usage++;
-/* if (parent)
- pclog("codegen_allocator_allocate with parent: %p %i %i %p\n", block, block_nr, codegen_allocator_usage, parent);
- else
- pclog("codegen_allocator_allocate: %p %i %i\n", block, block_nr, codegen_allocator_usage);*/
- return block;
-}
-void codegen_allocator_free(mem_block_t *block)
-{
- int block_nr = (((uintptr_t)block - (uintptr_t)mem_blocks) / sizeof(mem_block_t)) + 1;
-
-// pclog("codegen_allocator_free: %p %i %i %i\n", block, block_nr, codegen_allocator_usage, block->next);
- while (1)
- {
- int next_block_nr = block->next;
-// pclog(" free next=%i\n", next_block_nr);
- codegen_allocator_usage--;
-
- block->next = mem_block_free_list;
- block->code_block = BLOCK_INVALID;
- mem_block_free_list = block_nr;
- block_nr = next_block_nr;
-
- if (block_nr)
- block = &mem_blocks[block_nr - 1];
- else
- break;
- }
-}
-
-uint8_t *codeblock_allocator_get_ptr(mem_block_t *block)
-{
- return &mem_block_alloc[block->offset];
-}
-
-void codegen_allocator_clean_blocks(struct mem_block_t *block)
-{
-#if defined __ARM_EABI__ || defined __aarch64__
- while (1)
- {
- __clear_cache(&mem_block_alloc[block->offset], &mem_block_alloc[block->offset + MEM_BLOCK_SIZE]);
- if (block->next)
- block = &mem_blocks[block->next - 1];
- else
- break;
- }
-#endif
-}
diff --git a/src/codegen_allocator.h b/src/codegen_allocator.h
deleted file mode 100644
index 1adb243..0000000
--- a/src/codegen_allocator.h
+++ /dev/null
@@ -1,39 +0,0 @@
-#ifndef _CODEGEN_ALLOCATOR_H_
-#define _CODEGEN_ALLOCATOR_H_
-
-/*The allocator handles all allocation of executable memory. Since the two-pass
- recompiler design makes applying hard limits to codeblock size difficult, the
- allocator allows memory to be provided as and when required.
-
- The allocator provides a block size of a little under 1 kB (slightly lower to
- limit cache aliasing). Each generated codeblock is allocated one block by default,
- and will allocate additional block(s) once the existing memory is sorted. Blocks
- are chained together by jump instructions.
-
- Due to the chaining, the total memory size is limited by the range of a jump
- instruction. ARMv7 is restricted to +/- 32 MB, ARMv8 to +/- 128 MB, x86 to
- +/- 2GB. As a result, total memory size is limited to 32 MB on ARMv7*/
-#ifdef __ARM_EABI__
-#define MEM_BLOCK_NR 32768
-#else
-#define MEM_BLOCK_NR 131072
-#endif
-
-#define MEM_BLOCK_MASK (MEM_BLOCK_NR-1)
-#define MEM_BLOCK_SIZE 0x3c0
-
-void codegen_allocator_init();
-/*Allocate a mem_block_t, and the associated backing memory.
- If parent is non-NULL, then the new block will be added to the list in
- parent->next*/
-struct mem_block_t *codegen_allocator_allocate(struct mem_block_t *parent, int code_block);
-/*Free a mem_block_t, and any subsequent blocks in the list at block->next*/
-void codegen_allocator_free(struct mem_block_t *block);
-/*Get a pointer to the backing memory associated with block*/
-uint8_t *codeblock_allocator_get_ptr(struct mem_block_t *block);
-/*Cache clean memory block list*/
-void codegen_allocator_clean_blocks(struct mem_block_t *block);
-
-extern int codegen_allocator_usage;
-
-#endif
diff --git a/src/codegen_backend.h b/src/codegen_backend.h
deleted file mode 100644
index 45668df..0000000
--- a/src/codegen_backend.h
+++ /dev/null
@@ -1,43 +0,0 @@
-#ifndef _CODEGEN_BACKEND_H_
-#define _CODEGEN_BACKEND_H_
-
-//#ifdef __amd64__
-//#include "codegen_x86-64.h"
-#if defined __amd64__
-#include "codegen_backend_x86-64.h"
-#elif defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined WIN32 || defined _WIN32 || defined _WIN32
-#include "codegen_backend_x86.h"
-#elif defined __ARM_EABI__
-#include "codegen_backend_arm.h"
-#elif defined __aarch64__
-#include "codegen_backend_arm64.h"
-#else
-#error Dynamic recompiler not implemented on your platform
-#endif
-
-void codegen_backend_init();
-void codegen_backend_prologue(codeblock_t *block);
-void codegen_backend_epilogue(codeblock_t *block);
-
-struct ir_data_t;
-struct uop_t;
-
-struct ir_data_t *codegen_get_ir_data();
-
-typedef int (*uOpFn)(codeblock_t *codeblock, struct uop_t *uop);
-
-extern const uOpFn uop_handlers[];
-
-/*Register will not be preserved across function calls*/
-#define HOST_REG_FLAG_VOLATILE (1 << 0)
-
-typedef struct host_reg_def_t
-{
- int reg;
- int flags;
-} host_reg_def_t;
-
-extern host_reg_def_t codegen_host_reg_list[CODEGEN_HOST_REGS];
-extern host_reg_def_t codegen_host_fp_reg_list[CODEGEN_HOST_FP_REGS];
-
-#endif
diff --git a/src/codegen_backend_arm.c b/src/codegen_backend_arm.c
deleted file mode 100644
index aa9345c..0000000
--- a/src/codegen_backend_arm.c
+++ /dev/null
@@ -1,368 +0,0 @@
-#ifdef __ARM_EABI__
-
-#include
-#include "ibm.h"
-#include "codegen.h"
-#include "codegen_allocator.h"
-#include "codegen_backend.h"
-#include "codegen_backend_arm_defs.h"
-#include "codegen_backend_arm_ops.h"
-#include "codegen_reg.h"
-#include "x86.h"
-#include "x87.h"
-
-#if defined(__linux__) || defined(__APPLE__)
-#include
-#include
-#endif
-#if defined WIN32 || defined _WIN32 || defined _WIN32
-#include
-#endif
-
-void *codegen_mem_load_byte;
-void *codegen_mem_load_word;
-void *codegen_mem_load_long;
-void *codegen_mem_load_quad;
-void *codegen_mem_load_single;
-void *codegen_mem_load_double;
-
-void *codegen_mem_store_byte;
-void *codegen_mem_store_word;
-void *codegen_mem_store_long;
-void *codegen_mem_store_quad;
-void *codegen_mem_store_single;
-void *codegen_mem_store_double;
-
-void *codegen_fp_round;
-
-void *codegen_gpf_rout;
-void *codegen_exit_rout;
-
-host_reg_def_t codegen_host_reg_list[CODEGEN_HOST_REGS] =
-{
- {REG_R4, 0},
- {REG_R5, 0},
- {REG_R6, 0},
- {REG_R7, 0},
- {REG_R8, 0},
- {REG_R9, 0},
- {REG_R11, 0}
-};
-
-host_reg_def_t codegen_host_fp_reg_list[CODEGEN_HOST_FP_REGS] =
-{
- {REG_D8, 0},
- {REG_D9, 0},
- {REG_D10, 0},
- {REG_D11, 0},
- {REG_D12, 0},
- {REG_D13, 0},
- {REG_D14, 0},
- {REG_D15, 0}
-};
-
-static void build_load_routine(codeblock_t *block, int size, int is_float)
-{
- uint32_t *branch_offset;
- uint32_t *misaligned_offset;
-
- /*In - R0 = address
- Out - R0 = data, R1 = abrt*/
- /*MOV R1, R0, LSR #12
- MOV R2, #readlookup2
- LDR R1, [R2, R1, LSL #2]
- CMP R1, #-1
- BNE +
- LDRB R0, [R1, R0]
- MOV R1, #0
- MOV PC, LR
- * STR LR, [SP, -4]!
- BL readmembl
- LDRB R1, cpu_state.abrt
- LDR PC, [SP], #4
- */
- codegen_alloc(block, 80);
- host_arm_MOV_REG_LSR(block, REG_R1, REG_R0, 12);
- host_arm_MOV_IMM(block, REG_R2, (uint32_t)readlookup2);
- host_arm_LDR_REG_LSL(block, REG_R1, REG_R2, REG_R1, 2);
- if (size != 1)
- {
- host_arm_TST_IMM(block, REG_R0, size-1);
- misaligned_offset = host_arm_BNE_(block);
- }
- host_arm_CMP_IMM(block, REG_R1, -1);
- branch_offset = host_arm_BEQ_(block);
- if (size == 1 && !is_float)
- host_arm_LDRB_REG(block, REG_R0, REG_R1, REG_R0);
- else if (size == 2 && !is_float)
- host_arm_LDRH_REG(block, REG_R0, REG_R1, REG_R0);
- else if (size == 4 && !is_float)
- host_arm_LDR_REG(block, REG_R0, REG_R1, REG_R0);
- else if (size == 4 && is_float)
- {
- host_arm_ADD_REG(block, REG_R0, REG_R0, REG_R1);
- host_arm_VLDR_S(block, REG_D_TEMP, REG_R0, 0);
- }
- else if (size == 8)
- {
- host_arm_ADD_REG(block, REG_R0, REG_R0, REG_R1);
- host_arm_VLDR_D(block, REG_D_TEMP, REG_R0, 0);
- }
- host_arm_MOV_IMM(block, REG_R1, 0);
- host_arm_MOV_REG(block, REG_PC, REG_LR);
-
- *branch_offset |= ((((uintptr_t)&block_write_data[block_pos] - (uintptr_t)branch_offset) - 8) & 0x3fffffc) >> 2;
- if (size != 1)
- *misaligned_offset |= ((((uintptr_t)&block_write_data[block_pos] - (uintptr_t)misaligned_offset) - 8) & 0x3fffffc) >> 2;
- host_arm_STR_IMM_WB(block, REG_LR, REG_HOST_SP, -4);
- if (size == 1)
- host_arm_BL(block, (uintptr_t)readmembl);
- else if (size == 2)
- host_arm_BL(block, (uintptr_t)readmemwl);
- else if (size == 4)
- host_arm_BL(block, (uintptr_t)readmemll);
- else if (size == 8)
- host_arm_BL(block, (uintptr_t)readmemql);
- else
- fatal("build_load_routine - unknown size %i\n", size);
- if (size == 4 && is_float)
- host_arm_VMOV_S_32(block, REG_D_TEMP, REG_R0);
- else if (size == 8)
- host_arm_VMOV_D_64(block, REG_D_TEMP, REG_R0, REG_R1);
- host_arm_LDRB_ABS(block, REG_R1, &cpu_state.abrt);
- host_arm_LDR_IMM_POST(block, REG_PC, REG_HOST_SP, 4);
-}
-
-static void build_store_routine(codeblock_t *block, int size, int is_float)
-{
- uint32_t *branch_offset;
- uint32_t *misaligned_offset;
-
- /*In - R0 = address
- Out - R0 = data, R1 = abrt*/
- /*MOV R1, R0, LSR #12
- MOV R2, #readlookup2
- LDR R1, [R2, R1, LSL #2]
- CMP R1, #-1
- BNE +
- LDRB R0, [R1, R0]
- MOV R1, #0
- MOV PC, LR
- * STR LR, [SP, -4]!
- BL readmembl
- LDRB R1, cpu_state.abrt
- LDR PC, [SP], #4
- */
- codegen_alloc(block, 80);
- host_arm_MOV_REG_LSR(block, REG_R2, REG_R0, 12);
- host_arm_MOV_IMM(block, REG_R3, (uint32_t)writelookup2);
- host_arm_LDR_REG_LSL(block, REG_R2, REG_R3, REG_R2, 2);
- if (size != 1)
- {
- host_arm_TST_IMM(block, REG_R0, size-1);
- misaligned_offset = host_arm_BNE_(block);
- }
- host_arm_CMP_IMM(block, REG_R2, -1);
- branch_offset = host_arm_BEQ_(block);
- if (size == 1 && !is_float)
- host_arm_STRB_REG(block, REG_R1, REG_R2, REG_R0);
- else if (size == 2 && !is_float)
- host_arm_STRH_REG(block, REG_R1, REG_R2, REG_R0);
- else if (size == 4 && !is_float)
- host_arm_STR_REG(block, REG_R1, REG_R2, REG_R0);
- else if (size == 4 && is_float)
- {
- host_arm_ADD_REG(block, REG_R0, REG_R0, REG_R2);
- host_arm_VSTR_S(block, REG_D_TEMP, REG_R0, 0);
- }
- else if (size == 8)
- {
- host_arm_ADD_REG(block, REG_R0, REG_R0, REG_R2);
- host_arm_VSTR_D(block, REG_D_TEMP, REG_R0, 0);
- }
- host_arm_MOV_IMM(block, REG_R1, 0);
- host_arm_MOV_REG(block, REG_PC, REG_LR);
-
- *branch_offset |= ((((uintptr_t)&block_write_data[block_pos] - (uintptr_t)branch_offset) - 8) & 0x3fffffc) >> 2;
- if (size != 1)
- *misaligned_offset |= ((((uintptr_t)&block_write_data[block_pos] - (uintptr_t)misaligned_offset) - 8) & 0x3fffffc) >> 2;
- host_arm_STR_IMM_WB(block, REG_LR, REG_HOST_SP, -4);
- if (size == 4 && is_float)
- host_arm_VMOV_32_S(block, REG_R1, REG_D_TEMP);
- else if (size == 8)
- host_arm_VMOV_64_D(block, REG_R2, REG_R3, REG_D_TEMP);
- if (size == 1)
- host_arm_BL(block, (uintptr_t)writemembl);
- else if (size == 2)
- host_arm_BL(block, (uintptr_t)writememwl);
- else if (size == 4)
- host_arm_BL(block, (uintptr_t)writememll);
- else if (size == 8)
- host_arm_BL_r1(block, (uintptr_t)writememql);
- else
- fatal("build_store_routine - unknown size %i\n", size);
- host_arm_LDRB_ABS(block, REG_R1, &cpu_state.abrt);
- host_arm_LDR_IMM_POST(block, REG_PC, REG_HOST_SP, 4);
-}
-
-static void build_loadstore_routines(codeblock_t *block)
-{
- codegen_mem_load_byte = &block_write_data[block_pos];
- build_load_routine(block, 1, 0);
- codegen_mem_load_word = &block_write_data[block_pos];
- build_load_routine(block, 2, 0);
- codegen_mem_load_long = &block_write_data[block_pos];
- build_load_routine(block, 4, 0);
- codegen_mem_load_quad = &block_write_data[block_pos];
- build_load_routine(block, 8, 0);
- codegen_mem_load_single = &block_write_data[block_pos];
- build_load_routine(block, 4, 1);
- codegen_mem_load_double = &block_write_data[block_pos];
- build_load_routine(block, 8, 1);
-
- codegen_mem_store_byte = &block_write_data[block_pos];
- build_store_routine(block, 1, 0);
- codegen_mem_store_word = &block_write_data[block_pos];
- build_store_routine(block, 2, 0);
- codegen_mem_store_long = &block_write_data[block_pos];
- build_store_routine(block, 4, 0);
- codegen_mem_store_quad = &block_write_data[block_pos];
- build_store_routine(block, 8, 0);
- codegen_mem_store_single = &block_write_data[block_pos];
- build_store_routine(block, 4, 1);
- codegen_mem_store_double = &block_write_data[block_pos];
- build_store_routine(block, 8, 1);
-}
-
-/*VFP has a specific round-to-zero instruction, and the default rounding mode
- is nearest. For round up/down, temporarily change the rounding mode in FPCSR*/
-#define FPCSR_ROUNDING_MASK (3 << 22)
-#define FPCSR_ROUNDING_UP (1 << 22)
-#define FPCSR_ROUNDING_DOWN (2 << 22)
-
-static void build_fp_round_routine(codeblock_t *block)
-{
- uint32_t *jump_table;
-
- codegen_alloc(block, 80);
-
- host_arm_MOV_REG(block, REG_TEMP2, REG_LR);
- host_arm_MOV_REG(block, REG_LR, REG_TEMP2);
- host_arm_LDR_IMM(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.new_fp_control - (uintptr_t)&cpu_state);
- host_arm_LDR_REG(block, REG_PC, REG_PC, REG_TEMP);
- host_arm_NOP(block);
-
- jump_table = (uint32_t *)&block_write_data[block_pos];
- host_arm_NOP(block);
- host_arm_NOP(block);
- host_arm_NOP(block);
- host_arm_NOP(block);
-
- jump_table[X87_ROUNDING_NEAREST] = (uint64_t)(uintptr_t)&block_write_data[block_pos]; //tie even
- host_arm_VCVTR_IS_D(block, REG_D_TEMP, REG_D_TEMP);
- host_arm_MOV_REG(block, REG_PC, REG_LR);
-
- jump_table[X87_ROUNDING_UP] = (uint64_t)(uintptr_t)&block_write_data[block_pos]; //pos inf
- host_arm_LDR_IMM(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.old_fp_control - (uintptr_t)&cpu_state);
- host_arm_BIC_IMM(block, REG_TEMP2, REG_TEMP, FPCSR_ROUNDING_MASK);
- host_arm_ORR_IMM(block, REG_TEMP2, REG_TEMP2, FPCSR_ROUNDING_UP);
- host_arm_VMSR_FPSCR(block, REG_TEMP2);
- host_arm_VCVTR_IS_D(block, REG_D_TEMP, REG_D_TEMP);
- host_arm_VMSR_FPSCR(block, REG_TEMP);
- host_arm_MOV_REG(block, REG_PC, REG_LR);
-
- jump_table[X87_ROUNDING_DOWN] = (uint64_t)(uintptr_t)&block_write_data[block_pos]; //neg inf
- host_arm_LDR_IMM(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.old_fp_control - (uintptr_t)&cpu_state);
- host_arm_BIC_IMM(block, REG_TEMP2, REG_TEMP, FPCSR_ROUNDING_MASK);
- host_arm_ORR_IMM(block, REG_TEMP2, REG_TEMP, FPCSR_ROUNDING_DOWN);
- host_arm_VMSR_FPSCR(block, REG_TEMP2);
- host_arm_VCVTR_IS_D(block, REG_D_TEMP, REG_D_TEMP);
- host_arm_VMSR_FPSCR(block, REG_TEMP);
- host_arm_MOV_REG(block, REG_PC, REG_LR);
-
- jump_table[X87_ROUNDING_CHOP] = (uint64_t)(uintptr_t)&block_write_data[block_pos]; //zero
- host_arm_VCVT_IS_D(block, REG_D_TEMP, REG_D_TEMP);
- host_arm_MOV_REG(block, REG_PC, REG_LR);
-}
-
-void codegen_backend_init()
-{
- codeblock_t *block;
- int c;
-
- codeblock = malloc(BLOCK_SIZE * sizeof(codeblock_t));
- codeblock_hash = malloc(HASH_SIZE * sizeof(codeblock_t *));
-
- memset(codeblock, 0, BLOCK_SIZE * sizeof(codeblock_t));
- memset(codeblock_hash, 0, HASH_SIZE * sizeof(codeblock_t *));
-
- for (c = 0; c < BLOCK_SIZE; c++)
- codeblock[c].pc = BLOCK_PC_INVALID;
-
-// pclog("Codegen is %p\n", (void *)pages[0xfab12 >> 12].block);
-
- block_current = 0;
- block_pos = 0;
- block = &codeblock[block_current];
- block->head_mem_block = codegen_allocator_allocate(NULL, block_current);
- block->data = codeblock_allocator_get_ptr(block->head_mem_block);
- block_write_data = block->data;
- build_loadstore_routines(&codeblock[block_current]);
-printf("block_pos=%i\n", block_pos);
-
- codegen_fp_round = &block_write_data[block_pos];
- build_fp_round_routine(&codeblock[block_current]);
-
- codegen_alloc(block, 80);
- codegen_gpf_rout = &block_write_data[block_pos];
- host_arm_MOV_IMM(block, REG_R0, 0);
- host_arm_MOV_IMM(block, REG_R1, 0);
- host_arm_call(block, x86gpf);
-
- codegen_exit_rout = &block_write_data[block_pos];
- host_arm_ADD_IMM(block, REG_HOST_SP, REG_HOST_SP, 0x40);
- host_arm_LDMIA_WB(block, REG_HOST_SP, REG_MASK_LOCAL | REG_MASK_PC);
-
- block_write_data = NULL;
-//fatal("block_pos=%i\n", block_pos);
- asm("vmrs %0, fpscr\n"
- : "=r" (cpu_state.old_fp_control)
- );
- if ((cpu_state.old_fp_control >> 22) & 3)
- fatal("VFP not in nearest rounding mode\n");
-}
-
-void codegen_set_rounding_mode(int mode)
-{
- if (mode < 0 || mode > 3)
- fatal("codegen_set_rounding_mode - invalid mode\n");
- cpu_state.new_fp_control = mode << 2;
-}
-
-/*R10 - cpu_state*/
-void codegen_backend_prologue(codeblock_t *block)
-{
- block_pos = BLOCK_START;
-
- /*Entry code*/
-
- host_arm_STMDB_WB(block, REG_HOST_SP, REG_MASK_LOCAL | REG_MASK_LR);
- host_arm_SUB_IMM(block, REG_HOST_SP, REG_HOST_SP, 0x40);
- host_arm_MOV_IMM(block, REG_CPUSTATE, (uint32_t)&cpu_state);
- if (block->flags & CODEBLOCK_HAS_FPU)
- {
- host_arm_LDR_IMM(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.TOP - (uintptr_t)&cpu_state);
- host_arm_SUB_IMM(block, REG_TEMP, REG_TEMP, block->TOP);
- host_arm_STR_IMM(block, REG_TEMP, REG_HOST_SP, IREG_TOP_diff_stack_offset);
- }
-}
-
-void codegen_backend_epilogue(codeblock_t *block)
-{
- host_arm_ADD_IMM(block, REG_HOST_SP, REG_HOST_SP, 0x40);
- host_arm_LDMIA_WB(block, REG_HOST_SP, REG_MASK_LOCAL | REG_MASK_PC);
-
- codegen_allocator_clean_blocks(block->head_mem_block);
-}
-
-#endif
diff --git a/src/codegen_backend_arm.h b/src/codegen_backend_arm.h
deleted file mode 100644
index bfd5206..0000000
--- a/src/codegen_backend_arm.h
+++ /dev/null
@@ -1,24 +0,0 @@
-#include "codegen_backend_arm_defs.h"
-
-#define BLOCK_SIZE 0x4000
-#define BLOCK_MASK 0x3fff
-#define BLOCK_START 0
-
-#define HASH_SIZE 0x20000
-#define HASH_MASK 0x1ffff
-
-#define HASH(l) ((l) & 0x1ffff)
-
-#define BLOCK_MAX 0x3c0
-
-void host_arm_ADD_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t imm);
-void host_arm_LDMIA_WB(codeblock_t *block, int addr_reg, uint32_t reg_mask);
-void host_arm_LDR_IMM(codeblock_t *block, int dst_reg, int addr_reg, int offset);
-void host_arm_MOV_IMM(codeblock_t *block, int dst_reg, uint32_t imm);
-void host_arm_STMDB_WB(codeblock_t *block, int addr_reg, uint32_t reg_mask);
-void host_arm_SUB_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t imm);
-
-void host_arm_call(codeblock_t *block, void *dst_addr);
-void host_arm_nop(codeblock_t *block);
-
-void codegen_alloc(codeblock_t *block, int size);
\ No newline at end of file
diff --git a/src/codegen_backend_arm64.c b/src/codegen_backend_arm64.c
deleted file mode 100644
index 1885e61..0000000
--- a/src/codegen_backend_arm64.c
+++ /dev/null
@@ -1,382 +0,0 @@
-#ifdef __aarch64__
-
-#include
-#include "ibm.h"
-#include "codegen.h"
-#include "codegen_allocator.h"
-#include "codegen_backend.h"
-#include "codegen_backend_arm64_defs.h"
-#include "codegen_backend_arm64_ops.h"
-#include "codegen_reg.h"
-#include "x86.h"
-#include "x87.h"
-
-#if defined(__linux__) || defined(__APPLE__)
-#include
-#include
-#endif
-#if defined WIN32 || defined _WIN32 || defined _WIN32
-#include
-#endif
-
-void *codegen_mem_load_byte;
-void *codegen_mem_load_word;
-void *codegen_mem_load_long;
-void *codegen_mem_load_quad;
-void *codegen_mem_load_single;
-void *codegen_mem_load_double;
-
-void *codegen_mem_store_byte;
-void *codegen_mem_store_word;
-void *codegen_mem_store_long;
-void *codegen_mem_store_quad;
-void *codegen_mem_store_single;
-void *codegen_mem_store_double;
-
-void *codegen_fp_round;
-void *codegen_fp_round_quad;
-
-void *codegen_gpf_rout;
-void *codegen_exit_rout;
-
-host_reg_def_t codegen_host_reg_list[CODEGEN_HOST_REGS] =
-{
- {REG_X19, 0},
- {REG_X20, 0},
- {REG_X21, 0},
- {REG_X22, 0},
- {REG_X23, 0},
- {REG_X24, 0},
- {REG_X25, 0},
- {REG_X26, 0},
- {REG_X27, 0},
- {REG_X28, 0}
-};
-
-host_reg_def_t codegen_host_fp_reg_list[CODEGEN_HOST_FP_REGS] =
-{
- {REG_V8, 0},
- {REG_V9, 0},
- {REG_V10, 0},
- {REG_V11, 0},
- {REG_V12, 0},
- {REG_V13, 0},
- {REG_V14, 0},
- {REG_V15, 0}
-};
-
-static void build_load_routine(codeblock_t *block, int size, int is_float)
-{
- uint32_t *branch_offset;
- uint32_t *misaligned_offset;
- int offset;
-
- /*In - W0 = address
- Out - W0 = data, W1 = abrt*/
- /*MOV W1, W0, LSR #12
- MOV X2, #readlookup2
- LDR X1, [X2, X1, LSL #3]
- CMP X1, #-1
- BEQ +
- LDRB W0, [X1, X0]
- MOV W1, #0
- RET
- * STP X29, X30, [SP, #-16]
- BL readmembl
- LDRB R1, cpu_state.abrt
- LDP X29, X30, [SP, #-16]
- RET
- */
- codegen_alloc(block, 80);
- host_arm64_MOV_REG_LSR(block, REG_W1, REG_W0, 12);
- host_arm64_MOVX_IMM(block, REG_X2, (uint64_t)readlookup2);
- host_arm64_LDRX_REG_LSL3(block, REG_X1, REG_X2, REG_X1);
- if (size != 1)
- {
- host_arm64_TST_IMM(block, REG_W0, size-1);
- misaligned_offset = host_arm64_BNE_(block);
- }
- host_arm64_CMPX_IMM(block, REG_X1, -1);
- branch_offset = host_arm64_BEQ_(block);
- if (size == 1 && !is_float)
- host_arm64_LDRB_REG(block, REG_W0, REG_W1, REG_W0);
- else if (size == 2 && !is_float)
- host_arm64_LDRH_REG(block, REG_W0, REG_W1, REG_W0);
- else if (size == 4 && !is_float)
- host_arm64_LDR_REG(block, REG_W0, REG_W1, REG_W0);
- else if (size == 4 && is_float)
- host_arm64_LDR_REG_F32(block, REG_V_TEMP, REG_W1, REG_W0);
- else if (size == 8)
- host_arm64_LDR_REG_F64(block, REG_V_TEMP, REG_W1, REG_W0);
- host_arm64_MOVZ_IMM(block, REG_W1, 0);
- host_arm64_RET(block, REG_X30);
-
- host_arm64_branch_set_offset(branch_offset, &block_write_data[block_pos]);
- if (size != 1)
- host_arm64_branch_set_offset(misaligned_offset, &block_write_data[block_pos]);
- host_arm64_STP_PREIDX_X(block, REG_X29, REG_X30, REG_XSP, -16);
- if (size == 1)
- host_arm64_call(block, (void *)readmembl);
- else if (size == 2)
- host_arm64_call(block, (void *)readmemwl);
- else if (size == 4)
- host_arm64_call(block, (void *)readmemll);
- else if (size == 8)
- host_arm64_call(block, (void *)readmemql);
- else
- fatal("build_load_routine - unknown size %i\n", size);
- codegen_direct_read_8(block, REG_W1, &cpu_state.abrt);
- if (size == 4 && is_float)
- host_arm64_FMOV_S_W(block, REG_V_TEMP, REG_W0);
- else if (size == 8)
- host_arm64_FMOV_D_Q(block, REG_V_TEMP, REG_X0);
- host_arm64_LDP_POSTIDX_X(block, REG_X29, REG_X30, REG_XSP, 16);
- host_arm64_RET(block, REG_X30);
-}
-
-static void build_store_routine(codeblock_t *block, int size, int is_float)
-{
- uint32_t *branch_offset;
- uint32_t *misaligned_offset;
- int offset;
-
- /*In - R0 = address, R1 = data
- Out - R1 = abrt*/
- /*MOV W2, W0, LSR #12
- MOV X3, #writelookup2
- LDR X2, [X3, X2, LSL #3]
- CMP X2, #-1
- BEQ +
- STRB W1, [X2, X0]
- MOV W1, #0
- RET
- * STP X29, X30, [SP, #-16]
- BL writemembl
- LDRB R1, cpu_state.abrt
- LDP X29, X30, [SP, #-16]
- RET
- */
- codegen_alloc(block, 80);
- host_arm64_MOV_REG_LSR(block, REG_W2, REG_W0, 12);
- host_arm64_MOVX_IMM(block, REG_X3, (uint64_t)writelookup2);
- host_arm64_LDRX_REG_LSL3(block, REG_X2, REG_X3, REG_X2);
- if (size != 1)
- {
- host_arm64_TST_IMM(block, REG_W0, size-1);
- misaligned_offset = host_arm64_BNE_(block);
- }
- host_arm64_CMPX_IMM(block, REG_X2, -1);
- branch_offset = host_arm64_BEQ_(block);
- if (size == 1 && !is_float)
- host_arm64_STRB_REG(block, REG_X1, REG_X2, REG_X0);
- else if (size == 2 && !is_float)
- host_arm64_STRH_REG(block, REG_X1, REG_X2, REG_X0);
- else if (size == 4 && !is_float)
- host_arm64_STR_REG(block, REG_X1, REG_X2, REG_X0);
- else if (size == 4 && is_float)
- host_arm64_STR_REG_F32(block, REG_V_TEMP, REG_X2, REG_X0);
- else if (size == 8)
- host_arm64_STR_REG_F64(block, REG_V_TEMP, REG_X2, REG_X0);
- host_arm64_MOVZ_IMM(block, REG_X1, 0);
- host_arm64_RET(block, REG_X30);
-
- host_arm64_branch_set_offset(branch_offset, &block_write_data[block_pos]);
- if (size != 1)
- host_arm64_branch_set_offset(misaligned_offset, &block_write_data[block_pos]);
- host_arm64_STP_PREIDX_X(block, REG_X29, REG_X30, REG_XSP, -16);
- if (size == 4 && is_float)
- host_arm64_FMOV_W_S(block, REG_W1, REG_V_TEMP);
- else if (size == 8)
- host_arm64_FMOV_Q_D(block, REG_X1, REG_V_TEMP);
- if (size == 1)
- host_arm64_call(block, (void *)writemembl);
- else if (size == 2)
- host_arm64_call(block, (void *)writememwl);
- else if (size == 4)
- host_arm64_call(block, (void *)writememll);
- else if (size == 8)
- host_arm64_call(block, (void *)writememql);
- else
- fatal("build_store_routine - unknown size %i\n", size);
- codegen_direct_read_8(block, REG_W1, &cpu_state.abrt);
- host_arm64_LDP_POSTIDX_X(block, REG_X29, REG_X30, REG_XSP, 16);
- host_arm64_RET(block, REG_X30);
-}
-
-static void build_loadstore_routines(codeblock_t *block)
-{
- codegen_mem_load_byte = &block_write_data[block_pos];
- build_load_routine(block, 1, 0);
- codegen_mem_load_word = &block_write_data[block_pos];
- build_load_routine(block, 2, 0);
- codegen_mem_load_long = &block_write_data[block_pos];
- build_load_routine(block, 4, 0);
- codegen_mem_load_quad = &block_write_data[block_pos];
- build_load_routine(block, 8, 0);
- codegen_mem_load_single = &block_write_data[block_pos];
- build_load_routine(block, 4, 1);
- codegen_mem_load_double = &block_write_data[block_pos];
- build_load_routine(block, 8, 1);
-
- codegen_mem_store_byte = &block_write_data[block_pos];
- build_store_routine(block, 1, 0);
- codegen_mem_store_word = &block_write_data[block_pos];
- build_store_routine(block, 2, 0);
- codegen_mem_store_long = &block_write_data[block_pos];
- build_store_routine(block, 4, 0);
- codegen_mem_store_quad = &block_write_data[block_pos];
- build_store_routine(block, 8, 0);
- codegen_mem_store_single = &block_write_data[block_pos];
- build_store_routine(block, 4, 1);
- codegen_mem_store_double = &block_write_data[block_pos];
- build_store_routine(block, 8, 1);
-}
-
-static void build_fp_round_routine(codeblock_t *block, int is_quad)
-{
- uint64_t *jump_table;
-
- codegen_alloc(block, 80);
- host_arm64_LDR_IMM_W(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.new_fp_control - (uintptr_t)&cpu_state);
- host_arm64_ADR(block, REG_TEMP2, 12);
- host_arm64_LDR_REG_X(block, REG_TEMP2, REG_TEMP2, REG_TEMP);
- host_arm64_BR(block, REG_TEMP2);
-
- jump_table = (uint64_t *)&block_write_data[block_pos];
- block_pos += 4*8;
-
- jump_table[X87_ROUNDING_NEAREST] = (uint64_t)(uintptr_t)&block_write_data[block_pos]; //tie even
- if (is_quad)
- host_arm64_FCVTNS_X_D(block, REG_TEMP, REG_V_TEMP);
- else
- host_arm64_FCVTNS_W_D(block, REG_TEMP, REG_V_TEMP);
- host_arm64_RET(block, REG_X30);
-
- jump_table[X87_ROUNDING_UP] = (uint64_t)(uintptr_t)&block_write_data[block_pos]; //pos inf
- if (is_quad)
- host_arm64_FCVTPS_X_D(block, REG_TEMP, REG_V_TEMP);
- else
- host_arm64_FCVTPS_W_D(block, REG_TEMP, REG_V_TEMP);
- host_arm64_RET(block, REG_X30);
-
- jump_table[X87_ROUNDING_DOWN] = (uint64_t)(uintptr_t)&block_write_data[block_pos]; //neg inf
- if (is_quad)
- host_arm64_FCVTMS_X_D(block, REG_TEMP, REG_V_TEMP);
- else
- host_arm64_FCVTMS_W_D(block, REG_TEMP, REG_V_TEMP);
- host_arm64_RET(block, REG_X30);
-
- jump_table[X87_ROUNDING_CHOP] = (uint64_t)(uintptr_t)&block_write_data[block_pos]; //zero
- if (is_quad)
- host_arm64_FCVTZS_X_D(block, REG_TEMP, REG_V_TEMP);
- else
- host_arm64_FCVTZS_W_D(block, REG_TEMP, REG_V_TEMP);
- host_arm64_RET(block, REG_X30);
-}
-
-void codegen_backend_init()
-{
- codeblock_t *block;
- int c;
-#if defined(__linux__) || defined(__APPLE__)
- void *start;
- size_t len;
- long pagesize = sysconf(_SC_PAGESIZE);
- long pagemask = ~(pagesize - 1);
-#endif
-
- codeblock = malloc(BLOCK_SIZE * sizeof(codeblock_t));
- codeblock_hash = malloc(HASH_SIZE * sizeof(codeblock_t *));
-
- memset(codeblock, 0, BLOCK_SIZE * sizeof(codeblock_t));
- memset(codeblock_hash, 0, HASH_SIZE * sizeof(codeblock_t *));
-
- for (c = 0; c < BLOCK_SIZE; c++)
- {
- codeblock[c].pc = BLOCK_PC_INVALID;
- }
-
-// pclog("Codegen is %p\n", (void *)pages[0xfab12 >> 12].block);
-
- block_current = 0;
- block_pos = 0;
- block = &codeblock[block_current];
- block->head_mem_block = codegen_allocator_allocate(NULL, block_current);
- block->data = codeblock_allocator_get_ptr(block->head_mem_block);
- block_write_data = block->data;
- build_loadstore_routines(block);
-
- codegen_fp_round = &block_write_data[block_pos];
- build_fp_round_routine(block, 0);
- codegen_fp_round_quad = &block_write_data[block_pos];
- build_fp_round_routine(block, 1);
-
- codegen_alloc(block, 80);
- codegen_gpf_rout = &block_write_data[block_pos];
- host_arm64_mov_imm(block, REG_ARG0, 0);
- host_arm64_mov_imm(block, REG_ARG1, 0);
- host_arm64_call(block, (void *)x86gpf);
-
- codegen_exit_rout = &block_write_data[block_pos];
- host_arm64_LDP_POSTIDX_X(block, REG_X19, REG_X20, REG_XSP, 64);
- host_arm64_LDP_POSTIDX_X(block, REG_X21, REG_X22, REG_XSP, 16);
- host_arm64_LDP_POSTIDX_X(block, REG_X23, REG_X24, REG_XSP, 16);
- host_arm64_LDP_POSTIDX_X(block, REG_X25, REG_X26, REG_XSP, 16);
- host_arm64_LDP_POSTIDX_X(block, REG_X27, REG_X28, REG_XSP, 16);
- host_arm64_LDP_POSTIDX_X(block, REG_X29, REG_X30, REG_XSP, 16);
- host_arm64_RET(block, REG_X30);
-
- block_write_data = NULL;
-
- codegen_allocator_clean_blocks(block->head_mem_block);
-
- asm("mrs %0, fpcr\n"
- : "=r" (cpu_state.old_fp_control)
- );
-}
-
-void codegen_set_rounding_mode(int mode)
-{
- if (mode < 0 || mode > 3)
- fatal("codegen_set_rounding_mode - invalid mode\n");
- cpu_state.new_fp_control = mode << 3;
-}
-
-/*R10 - cpu_state*/
-void codegen_backend_prologue(codeblock_t *block)
-{
- block_pos = BLOCK_START;
-
- /*Entry code*/
-
- host_arm64_STP_PREIDX_X(block, REG_X29, REG_X30, REG_XSP, -16);
- host_arm64_STP_PREIDX_X(block, REG_X27, REG_X28, REG_XSP, -16);
- host_arm64_STP_PREIDX_X(block, REG_X25, REG_X26, REG_XSP, -16);
- host_arm64_STP_PREIDX_X(block, REG_X23, REG_X24, REG_XSP, -16);
- host_arm64_STP_PREIDX_X(block, REG_X21, REG_X22, REG_XSP, -16);
- host_arm64_STP_PREIDX_X(block, REG_X19, REG_X20, REG_XSP, -64);
-
- host_arm64_MOVX_IMM(block, REG_CPUSTATE, (uint64_t)&cpu_state);
-
- if (block->flags & CODEBLOCK_HAS_FPU)
- {
- host_arm64_LDR_IMM_W(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.TOP - (uintptr_t)&cpu_state);
- host_arm64_SUB_IMM(block, REG_TEMP, REG_TEMP, block->TOP);
- host_arm64_STR_IMM_W(block, REG_TEMP, REG_XSP, IREG_TOP_diff_stack_offset);
- }
-}
-
-void codegen_backend_epilogue(codeblock_t *block)
-{
- host_arm64_LDP_POSTIDX_X(block, REG_X19, REG_X20, REG_XSP, 64);
- host_arm64_LDP_POSTIDX_X(block, REG_X21, REG_X22, REG_XSP, 16);
- host_arm64_LDP_POSTIDX_X(block, REG_X23, REG_X24, REG_XSP, 16);
- host_arm64_LDP_POSTIDX_X(block, REG_X25, REG_X26, REG_XSP, 16);
- host_arm64_LDP_POSTIDX_X(block, REG_X27, REG_X28, REG_XSP, 16);
- host_arm64_LDP_POSTIDX_X(block, REG_X29, REG_X30, REG_XSP, 16);
- host_arm64_RET(block, REG_X30);
-
- codegen_allocator_clean_blocks(block->head_mem_block);
-}
-
-#endif
diff --git a/src/codegen_backend_arm64.h b/src/codegen_backend_arm64.h
deleted file mode 100644
index 3263aa1..0000000
--- a/src/codegen_backend_arm64.h
+++ /dev/null
@@ -1,31 +0,0 @@
-#include "codegen_backend_arm64_defs.h"
-
-#define BLOCK_SIZE 0x4000
-#define BLOCK_MASK 0x3fff
-#define BLOCK_START 0
-
-#define HASH_SIZE 0x20000
-#define HASH_MASK 0x1ffff
-
-#define HASH(l) ((l) & 0x1ffff)
-
-#define BLOCK_MAX 0x3c0
-
-
-void host_arm64_BLR(codeblock_t *block, int addr_reg);
-void host_arm64_CBNZ(codeblock_t *block, int reg, uintptr_t dest);
-void host_arm64_MOVK_IMM(codeblock_t *block, int reg, uint32_t imm_data);
-void host_arm64_MOVZ_IMM(codeblock_t *block, int reg, uint32_t imm_data);
-void host_arm64_LDP_POSTIDX_X(codeblock_t *block, int src_reg1, int src_reg2, int base_reg, int offset);
-void host_arm64_LDR_LITERAL_W(codeblock_t *block, int dest_reg, int literal_offset);
-void host_arm64_LDR_LITERAL_X(codeblock_t *block, int dest_reg, int literal_offset);
-void host_arm64_NOP(codeblock_t *block);
-void host_arm64_RET(codeblock_t *block, int reg);
-void host_arm64_STP_PREIDX_X(codeblock_t *block, int src_reg1, int src_reg2, int base_reg, int offset);
-void host_arm64_STR_IMM_W(codeblock_t *block, int dest_reg, int base_reg, int offset);
-void host_arm64_STRB_IMM_W(codeblock_t *block, int dest_reg, int base_reg, int offset);
-
-void host_arm64_call(codeblock_t *block, void *dst_addr);
-void host_arm64_mov_imm(codeblock_t *block, int reg, uint32_t imm_data);
-
-uint32_t host_arm64_find_imm(uint32_t data);
\ No newline at end of file
diff --git a/src/codegen_backend_arm64_defs.h b/src/codegen_backend_arm64_defs.h
deleted file mode 100644
index 2df1e9f..0000000
--- a/src/codegen_backend_arm64_defs.h
+++ /dev/null
@@ -1,135 +0,0 @@
-#define REG_W0 0
-#define REG_W1 1
-#define REG_W2 2
-#define REG_W3 3
-#define REG_W4 4
-#define REG_W5 5
-#define REG_W6 6
-#define REG_W7 7
-#define REG_W8 8
-#define REG_W9 9
-#define REG_W10 10
-#define REG_W11 11
-#define REG_W12 12
-#define REG_W13 13
-#define REG_W14 14
-#define REG_W15 15
-#define REG_W16 16
-#define REG_W17 17
-#define REG_W18 18
-#define REG_W19 19
-#define REG_W20 20
-#define REG_W21 21
-#define REG_W22 22
-#define REG_W23 23
-#define REG_W24 24
-#define REG_W25 25
-#define REG_W26 26
-#define REG_W27 27
-#define REG_W28 28
-#define REG_W29 29
-#define REG_W30 30
-#define REG_WZR 31
-
-#define REG_X0 0
-#define REG_X1 1
-#define REG_X2 2
-#define REG_X3 3
-#define REG_X4 4
-#define REG_X5 5
-#define REG_X6 6
-#define REG_X7 7
-#define REG_X8 8
-#define REG_X9 9
-#define REG_X10 10
-#define REG_X11 11
-#define REG_X12 12
-#define REG_X13 13
-#define REG_X14 14
-#define REG_X15 15
-#define REG_X16 16
-#define REG_X17 17
-#define REG_X18 18
-#define REG_X19 19
-#define REG_X20 20
-#define REG_X21 21
-#define REG_X22 22
-#define REG_X23 23
-#define REG_X24 24
-#define REG_X25 25
-#define REG_X26 26
-#define REG_X27 27
-#define REG_X28 28
-#define REG_X29 29
-#define REG_X30 30
-#define REG_XZR 31
-
-#define REG_V0 0
-#define REG_V1 1
-#define REG_V2 2
-#define REG_V3 3
-#define REG_V4 4
-#define REG_V5 5
-#define REG_V6 6
-#define REG_V7 7
-#define REG_V8 8
-#define REG_V9 9
-#define REG_V10 10
-#define REG_V11 11
-#define REG_V12 12
-#define REG_V13 13
-#define REG_V14 14
-#define REG_V15 15
-#define REG_V16 16
-#define REG_V17 17
-#define REG_V18 18
-#define REG_V19 19
-#define REG_V20 20
-#define REG_V21 21
-#define REG_V22 22
-#define REG_V23 23
-#define REG_V24 24
-#define REG_V25 25
-#define REG_V26 26
-#define REG_V27 27
-#define REG_V28 28
-#define REG_V29 29
-#define REG_V30 30
-#define REG_V31 31
-
-#define REG_XSP 31
-
-#define REG_ARG0 REG_X0
-#define REG_ARG1 REG_X1
-#define REG_ARG2 REG_X2
-#define REG_ARG3 REG_X3
-
-#define REG_CPUSTATE REG_X29
-
-#define REG_TEMP REG_X7
-#define REG_TEMP2 REG_X6
-
-#define REG_V_TEMP REG_V0
-
-#define CODEGEN_HOST_REGS 10
-#define CODEGEN_HOST_FP_REGS 8
-
-extern void *codegen_mem_load_byte;
-extern void *codegen_mem_load_word;
-extern void *codegen_mem_load_long;
-extern void *codegen_mem_load_quad;
-extern void *codegen_mem_load_single;
-extern void *codegen_mem_load_double;
-
-extern void *codegen_mem_store_byte;
-extern void *codegen_mem_store_word;
-extern void *codegen_mem_store_long;
-extern void *codegen_mem_store_quad;
-extern void *codegen_mem_store_single;
-extern void *codegen_mem_store_double;
-
-extern void *codegen_fp_round;
-extern void *codegen_fp_round_quad;
-
-extern void *codegen_gpf_rout;
-extern void *codegen_exit_rout;
\ No newline at end of file
diff --git a/src/codegen_backend_arm64_imm.c b/src/codegen_backend_arm64_imm.c
deleted file mode 100644
index 0362b71..0000000
--- a/src/codegen_backend_arm64_imm.c
+++ /dev/null
@@ -1,1330 +0,0 @@
-#include
-#include
-
-/*ARM64 logical instructions have an 'interesting' immediate encoding.
- All valid values are in the table below, which we perform a binary
- search over*/
-#define IMM_NR 1302
-static uint32_t imm_table[][2] =
-{
- {0x800, 0x00000001},
- {0xfc0, 0x00000002},
- {0x801, 0x00000003},
- {0xf80, 0x00000004},
- {0xfc1, 0x00000006},
- {0x802, 0x00000007},
- {0xf40, 0x00000008},
- {0xf81, 0x0000000c},
- {0xfc2, 0x0000000e},
- {0x803, 0x0000000f},
- {0xf00, 0x00000010},
- {0xf41, 0x00000018},
- {0xf82, 0x0000001c},
- {0xfc3, 0x0000001e},
- {0x804, 0x0000001f},
- {0xec0, 0x00000020},
- {0xf01, 0x00000030},
- {0xf42, 0x00000038},
- {0xf83, 0x0000003c},
- {0xfc4, 0x0000003e},
- {0x805, 0x0000003f},
- {0xe80, 0x00000040},
- {0xec1, 0x00000060},
- {0xf02, 0x00000070},
- {0xf43, 0x00000078},
- {0xf84, 0x0000007c},
- {0xfc5, 0x0000007e},
- {0x806, 0x0000007f},
- {0xe40, 0x00000080},
- {0xe81, 0x000000c0},
- {0xec2, 0x000000e0},
- {0xf03, 0x000000f0},
- {0xf44, 0x000000f8},
- {0xf85, 0x000000fc},
- {0xfc6, 0x000000fe},
- {0x807, 0x000000ff},
- {0xe00, 0x00000100},
- {0xe41, 0x00000180},
- {0xe82, 0x000001c0},
- {0xec3, 0x000001e0},
- {0xf04, 0x000001f0},
- {0xf45, 0x000001f8},
- {0xf86, 0x000001fc},
- {0xfc7, 0x000001fe},
- {0x808, 0x000001ff},
- {0xdc0, 0x00000200},
- {0xe01, 0x00000300},
- {0xe42, 0x00000380},
- {0xe83, 0x000003c0},
- {0xec4, 0x000003e0},
- {0xf05, 0x000003f0},
- {0xf46, 0x000003f8},
- {0xf87, 0x000003fc},
- {0xfc8, 0x000003fe},
- {0x809, 0x000003ff},
- {0xd80, 0x00000400},
- {0xdc1, 0x00000600},
- {0xe02, 0x00000700},
- {0xe43, 0x00000780},
- {0xe84, 0x000007c0},
- {0xec5, 0x000007e0},
- {0xf06, 0x000007f0},
- {0xf47, 0x000007f8},
- {0xf88, 0x000007fc},
- {0xfc9, 0x000007fe},
- {0x80a, 0x000007ff},
- {0xd40, 0x00000800},
- {0xd81, 0x00000c00},
- {0xdc2, 0x00000e00},
- {0xe03, 0x00000f00},
- {0xe44, 0x00000f80},
- {0xe85, 0x00000fc0},
- {0xec6, 0x00000fe0},
- {0xf07, 0x00000ff0},
- {0xf48, 0x00000ff8},
- {0xf89, 0x00000ffc},
- {0xfca, 0x00000ffe},
- {0x80b, 0x00000fff},
- {0xd00, 0x00001000},
- {0xd41, 0x00001800},
- {0xd82, 0x00001c00},
- {0xdc3, 0x00001e00},
- {0xe04, 0x00001f00},
- {0xe45, 0x00001f80},
- {0xe86, 0x00001fc0},
- {0xec7, 0x00001fe0},
- {0xf08, 0x00001ff0},
- {0xf49, 0x00001ff8},
- {0xf8a, 0x00001ffc},
- {0xfcb, 0x00001ffe},
- {0x80c, 0x00001fff},
- {0xcc0, 0x00002000},
- {0xd01, 0x00003000},
- {0xd42, 0x00003800},
- {0xd83, 0x00003c00},
- {0xdc4, 0x00003e00},
- {0xe05, 0x00003f00},
- {0xe46, 0x00003f80},
- {0xe87, 0x00003fc0},
- {0xec8, 0x00003fe0},
- {0xf09, 0x00003ff0},
- {0xf4a, 0x00003ff8},
- {0xf8b, 0x00003ffc},
- {0xfcc, 0x00003ffe},
- {0x80d, 0x00003fff},
- {0xc80, 0x00004000},
- {0xcc1, 0x00006000},
- {0xd02, 0x00007000},
- {0xd43, 0x00007800},
- {0xd84, 0x00007c00},
- {0xdc5, 0x00007e00},
- {0xe06, 0x00007f00},
- {0xe47, 0x00007f80},
- {0xe88, 0x00007fc0},
- {0xec9, 0x00007fe0},
- {0xf0a, 0x00007ff0},
- {0xf4b, 0x00007ff8},
- {0xf8c, 0x00007ffc},
- {0xfcd, 0x00007ffe},
- {0x80e, 0x00007fff},
- {0xc40, 0x00008000},
- {0xc81, 0x0000c000},
- {0xcc2, 0x0000e000},
- {0xd03, 0x0000f000},
- {0xd44, 0x0000f800},
- {0xd85, 0x0000fc00},
- {0xdc6, 0x0000fe00},
- {0xe07, 0x0000ff00},
- {0xe48, 0x0000ff80},
- {0xe89, 0x0000ffc0},
- {0xeca, 0x0000ffe0},
- {0xf0b, 0x0000fff0},
- {0xf4c, 0x0000fff8},
- {0xf8d, 0x0000fffc},
- {0xfce, 0x0000fffe},
- {0x80f, 0x0000ffff},
- {0xc00, 0x00010000},
- {0xc20, 0x00010001},
- {0xc41, 0x00018000},
- {0xc82, 0x0001c000},
- {0xcc3, 0x0001e000},
- {0xd04, 0x0001f000},
- {0xd45, 0x0001f800},
- {0xd86, 0x0001fc00},
- {0xdc7, 0x0001fe00},
- {0xe08, 0x0001ff00},
- {0xe49, 0x0001ff80},
- {0xe8a, 0x0001ffc0},
- {0xecb, 0x0001ffe0},
- {0xf0c, 0x0001fff0},
- {0xf4d, 0x0001fff8},
- {0xf8e, 0x0001fffc},
- {0xfcf, 0x0001fffe},
- {0x810, 0x0001ffff},
- {0xbc0, 0x00020000},
- {0xfe0, 0x00020002},
- {0xc01, 0x00030000},
- {0xc21, 0x00030003},
- {0xc42, 0x00038000},
- {0xc83, 0x0003c000},
- {0xcc4, 0x0003e000},
- {0xd05, 0x0003f000},
- {0xd46, 0x0003f800},
- {0xd87, 0x0003fc00},
- {0xdc8, 0x0003fe00},
- {0xe09, 0x0003ff00},
- {0xe4a, 0x0003ff80},
- {0xe8b, 0x0003ffc0},
- {0xecc, 0x0003ffe0},
- {0xf0d, 0x0003fff0},
- {0xf4e, 0x0003fff8},
- {0xf8f, 0x0003fffc},
- {0xfd0, 0x0003fffe},
- {0x811, 0x0003ffff},
- {0xb80, 0x00040000},
- {0xfa0, 0x00040004},
- {0xbc1, 0x00060000},
- {0xfe1, 0x00060006},
- {0xc02, 0x00070000},
- {0xc22, 0x00070007},
- {0xc43, 0x00078000},
- {0xc84, 0x0007c000},
- {0xcc5, 0x0007e000},
- {0xd06, 0x0007f000},
- {0xd47, 0x0007f800},
- {0xd88, 0x0007fc00},
- {0xdc9, 0x0007fe00},
- {0xe0a, 0x0007ff00},
- {0xe4b, 0x0007ff80},
- {0xe8c, 0x0007ffc0},
- {0xecd, 0x0007ffe0},
- {0xf0e, 0x0007fff0},
- {0xf4f, 0x0007fff8},
- {0xf90, 0x0007fffc},
- {0xfd1, 0x0007fffe},
- {0x812, 0x0007ffff},
- {0xb40, 0x00080000},
- {0xf60, 0x00080008},
- {0xb81, 0x000c0000},
- {0xfa1, 0x000c000c},
- {0xbc2, 0x000e0000},
- {0xfe2, 0x000e000e},
- {0xc03, 0x000f0000},
- {0xc23, 0x000f000f},
- {0xc44, 0x000f8000},
- {0xc85, 0x000fc000},
- {0xcc6, 0x000fe000},
- {0xd07, 0x000ff000},
- {0xd48, 0x000ff800},
- {0xd89, 0x000ffc00},
- {0xdca, 0x000ffe00},
- {0xe0b, 0x000fff00},
- {0xe4c, 0x000fff80},
- {0xe8d, 0x000fffc0},
- {0xece, 0x000fffe0},
- {0xf0f, 0x000ffff0},
- {0xf50, 0x000ffff8},
- {0xf91, 0x000ffffc},
- {0xfd2, 0x000ffffe},
- {0x813, 0x000fffff},
- {0xb00, 0x00100000},
- {0xf20, 0x00100010},
- {0xb41, 0x00180000},
- {0xf61, 0x00180018},
- {0xb82, 0x001c0000},
- {0xfa2, 0x001c001c},
- {0xbc3, 0x001e0000},
- {0xfe3, 0x001e001e},
- {0xc04, 0x001f0000},
- {0xc24, 0x001f001f},
- {0xc45, 0x001f8000},
- {0xc86, 0x001fc000},
- {0xcc7, 0x001fe000},
- {0xd08, 0x001ff000},
- {0xd49, 0x001ff800},
- {0xd8a, 0x001ffc00},
- {0xdcb, 0x001ffe00},
- {0xe0c, 0x001fff00},
- {0xe4d, 0x001fff80},
- {0xe8e, 0x001fffc0},
- {0xecf, 0x001fffe0},
- {0xf10, 0x001ffff0},
- {0xf51, 0x001ffff8},
- {0xf92, 0x001ffffc},
- {0xfd3, 0x001ffffe},
- {0x814, 0x001fffff},
- {0xac0, 0x00200000},
- {0xee0, 0x00200020},
- {0xb01, 0x00300000},
- {0xf21, 0x00300030},
- {0xb42, 0x00380000},
- {0xf62, 0x00380038},
- {0xb83, 0x003c0000},
- {0xfa3, 0x003c003c},
- {0xbc4, 0x003e0000},
- {0xfe4, 0x003e003e},
- {0xc05, 0x003f0000},
- {0xc25, 0x003f003f},
- {0xc46, 0x003f8000},
- {0xc87, 0x003fc000},
- {0xcc8, 0x003fe000},
- {0xd09, 0x003ff000},
- {0xd4a, 0x003ff800},
- {0xd8b, 0x003ffc00},
- {0xdcc, 0x003ffe00},
- {0xe0d, 0x003fff00},
- {0xe4e, 0x003fff80},
- {0xe8f, 0x003fffc0},
- {0xed0, 0x003fffe0},
- {0xf11, 0x003ffff0},
- {0xf52, 0x003ffff8},
- {0xf93, 0x003ffffc},
- {0xfd4, 0x003ffffe},
- {0x815, 0x003fffff},
- {0xa80, 0x00400000},
- {0xea0, 0x00400040},
- {0xac1, 0x00600000},
- {0xee1, 0x00600060},
- {0xb02, 0x00700000},
- {0xf22, 0x00700070},
- {0xb43, 0x00780000},
- {0xf63, 0x00780078},
- {0xb84, 0x007c0000},
- {0xfa4, 0x007c007c},
- {0xbc5, 0x007e0000},
- {0xfe5, 0x007e007e},
- {0xc06, 0x007f0000},
- {0xc26, 0x007f007f},
- {0xc47, 0x007f8000},
- {0xc88, 0x007fc000},
- {0xcc9, 0x007fe000},
- {0xd0a, 0x007ff000},
- {0xd4b, 0x007ff800},
- {0xd8c, 0x007ffc00},
- {0xdcd, 0x007ffe00},
- {0xe0e, 0x007fff00},
- {0xe4f, 0x007fff80},
- {0xe90, 0x007fffc0},
- {0xed1, 0x007fffe0},
- {0xf12, 0x007ffff0},
- {0xf53, 0x007ffff8},
- {0xf94, 0x007ffffc},
- {0xfd5, 0x007ffffe},
- {0x816, 0x007fffff},
- {0xa40, 0x00800000},
- {0xe60, 0x00800080},
- {0xa81, 0x00c00000},
- {0xea1, 0x00c000c0},
- {0xac2, 0x00e00000},
- {0xee2, 0x00e000e0},
- {0xb03, 0x00f00000},
- {0xf23, 0x00f000f0},
- {0xb44, 0x00f80000},
- {0xf64, 0x00f800f8},
- {0xb85, 0x00fc0000},
- {0xfa5, 0x00fc00fc},
- {0xbc6, 0x00fe0000},
- {0xfe6, 0x00fe00fe},
- {0xc07, 0x00ff0000},
- {0xc27, 0x00ff00ff},
- {0xc48, 0x00ff8000},
- {0xc89, 0x00ffc000},
- {0xcca, 0x00ffe000},
- {0xd0b, 0x00fff000},
- {0xd4c, 0x00fff800},
- {0xd8d, 0x00fffc00},
- {0xdce, 0x00fffe00},
- {0xe0f, 0x00ffff00},
- {0xe50, 0x00ffff80},
- {0xe91, 0x00ffffc0},
- {0xed2, 0x00ffffe0},
- {0xf13, 0x00fffff0},
- {0xf54, 0x00fffff8},
- {0xf95, 0x00fffffc},
- {0xfd6, 0x00fffffe},
- {0x817, 0x00ffffff},
- {0xa00, 0x01000000},
- {0xe20, 0x01000100},
- {0xe30, 0x01010101},
- {0xa41, 0x01800000},
- {0xe61, 0x01800180},
- {0xa82, 0x01c00000},
- {0xea2, 0x01c001c0},
- {0xac3, 0x01e00000},
- {0xee3, 0x01e001e0},
- {0xb04, 0x01f00000},
- {0xf24, 0x01f001f0},
- {0xb45, 0x01f80000},
- {0xf65, 0x01f801f8},
- {0xb86, 0x01fc0000},
- {0xfa6, 0x01fc01fc},
- {0xbc7, 0x01fe0000},
- {0xfe7, 0x01fe01fe},
- {0xc08, 0x01ff0000},
- {0xc28, 0x01ff01ff},
- {0xc49, 0x01ff8000},
- {0xc8a, 0x01ffc000},
- {0xccb, 0x01ffe000},
- {0xd0c, 0x01fff000},
- {0xd4d, 0x01fff800},
- {0xd8e, 0x01fffc00},
- {0xdcf, 0x01fffe00},
- {0xe10, 0x01ffff00},
- {0xe51, 0x01ffff80},
- {0xe92, 0x01ffffc0},
- {0xed3, 0x01ffffe0},
- {0xf14, 0x01fffff0},
- {0xf55, 0x01fffff8},
- {0xf96, 0x01fffffc},
- {0xfd7, 0x01fffffe},
- {0x818, 0x01ffffff},
- {0x9c0, 0x02000000},
- {0xde0, 0x02000200},
- {0xff0, 0x02020202},
- {0xa01, 0x03000000},
- {0xe21, 0x03000300},
- {0xe31, 0x03030303},
- {0xa42, 0x03800000},
- {0xe62, 0x03800380},
- {0xa83, 0x03c00000},
- {0xea3, 0x03c003c0},
- {0xac4, 0x03e00000},
- {0xee4, 0x03e003e0},
- {0xb05, 0x03f00000},
- {0xf25, 0x03f003f0},
- {0xb46, 0x03f80000},
- {0xf66, 0x03f803f8},
- {0xb87, 0x03fc0000},
- {0xfa7, 0x03fc03fc},
- {0xbc8, 0x03fe0000},
- {0xfe8, 0x03fe03fe},
- {0xc09, 0x03ff0000},
- {0xc29, 0x03ff03ff},
- {0xc4a, 0x03ff8000},
- {0xc8b, 0x03ffc000},
- {0xccc, 0x03ffe000},
- {0xd0d, 0x03fff000},
- {0xd4e, 0x03fff800},
- {0xd8f, 0x03fffc00},
- {0xdd0, 0x03fffe00},
- {0xe11, 0x03ffff00},
- {0xe52, 0x03ffff80},
- {0xe93, 0x03ffffc0},
- {0xed4, 0x03ffffe0},
- {0xf15, 0x03fffff0},
- {0xf56, 0x03fffff8},
- {0xf97, 0x03fffffc},
- {0xfd8, 0x03fffffe},
- {0x819, 0x03ffffff},
- {0x980, 0x04000000},
- {0xda0, 0x04000400},
- {0xfb0, 0x04040404},
- {0x9c1, 0x06000000},
- {0xde1, 0x06000600},
- {0xff1, 0x06060606},
- {0xa02, 0x07000000},
- {0xe22, 0x07000700},
- {0xe32, 0x07070707},
- {0xa43, 0x07800000},
- {0xe63, 0x07800780},
- {0xa84, 0x07c00000},
- {0xea4, 0x07c007c0},
- {0xac5, 0x07e00000},
- {0xee5, 0x07e007e0},
- {0xb06, 0x07f00000},
- {0xf26, 0x07f007f0},
- {0xb47, 0x07f80000},
- {0xf67, 0x07f807f8},
- {0xb88, 0x07fc0000},
- {0xfa8, 0x07fc07fc},
- {0xbc9, 0x07fe0000},
- {0xfe9, 0x07fe07fe},
- {0xc0a, 0x07ff0000},
- {0xc2a, 0x07ff07ff},
- {0xc4b, 0x07ff8000},
- {0xc8c, 0x07ffc000},
- {0xccd, 0x07ffe000},
- {0xd0e, 0x07fff000},
- {0xd4f, 0x07fff800},
- {0xd90, 0x07fffc00},
- {0xdd1, 0x07fffe00},
- {0xe12, 0x07ffff00},
- {0xe53, 0x07ffff80},
- {0xe94, 0x07ffffc0},
- {0xed5, 0x07ffffe0},
- {0xf16, 0x07fffff0},
- {0xf57, 0x07fffff8},
- {0xf98, 0x07fffffc},
- {0xfd9, 0x07fffffe},
- {0x81a, 0x07ffffff},
- {0x940, 0x08000000},
- {0xd60, 0x08000800},
- {0xf70, 0x08080808},
- {0x981, 0x0c000000},
- {0xda1, 0x0c000c00},
- {0xfb1, 0x0c0c0c0c},
- {0x9c2, 0x0e000000},
- {0xde2, 0x0e000e00},
- {0xff2, 0x0e0e0e0e},
- {0xa03, 0x0f000000},
- {0xe23, 0x0f000f00},
- {0xe33, 0x0f0f0f0f},
- {0xa44, 0x0f800000},
- {0xe64, 0x0f800f80},
- {0xa85, 0x0fc00000},
- {0xea5, 0x0fc00fc0},
- {0xac6, 0x0fe00000},
- {0xee6, 0x0fe00fe0},
- {0xb07, 0x0ff00000},
- {0xf27, 0x0ff00ff0},
- {0xb48, 0x0ff80000},
- {0xf68, 0x0ff80ff8},
- {0xb89, 0x0ffc0000},
- {0xfa9, 0x0ffc0ffc},
- {0xbca, 0x0ffe0000},
- {0xfea, 0x0ffe0ffe},
- {0xc0b, 0x0fff0000},
- {0xc2b, 0x0fff0fff},
- {0xc4c, 0x0fff8000},
- {0xc8d, 0x0fffc000},
- {0xcce, 0x0fffe000},
- {0xd0f, 0x0ffff000},
- {0xd50, 0x0ffff800},
- {0xd91, 0x0ffffc00},
- {0xdd2, 0x0ffffe00},
- {0xe13, 0x0fffff00},
- {0xe54, 0x0fffff80},
- {0xe95, 0x0fffffc0},
- {0xed6, 0x0fffffe0},
- {0xf17, 0x0ffffff0},
- {0xf58, 0x0ffffff8},
- {0xf99, 0x0ffffffc},
- {0xfda, 0x0ffffffe},
- {0x81b, 0x0fffffff},
- {0x900, 0x10000000},
- {0xd20, 0x10001000},
- {0xf30, 0x10101010},
- {0xf38, 0x11111111},
- {0x941, 0x18000000},
- {0xd61, 0x18001800},
- {0xf71, 0x18181818},
- {0x982, 0x1c000000},
- {0xda2, 0x1c001c00},
- {0xfb2, 0x1c1c1c1c},
- {0x9c3, 0x1e000000},
- {0xde3, 0x1e001e00},
- {0xff3, 0x1e1e1e1e},
- {0xa04, 0x1f000000},
- {0xe24, 0x1f001f00},
- {0xe34, 0x1f1f1f1f},
- {0xa45, 0x1f800000},
- {0xe65, 0x1f801f80},
- {0xa86, 0x1fc00000},
- {0xea6, 0x1fc01fc0},
- {0xac7, 0x1fe00000},
- {0xee7, 0x1fe01fe0},
- {0xb08, 0x1ff00000},
- {0xf28, 0x1ff01ff0},
- {0xb49, 0x1ff80000},
- {0xf69, 0x1ff81ff8},
- {0xb8a, 0x1ffc0000},
- {0xfaa, 0x1ffc1ffc},
- {0xbcb, 0x1ffe0000},
- {0xfeb, 0x1ffe1ffe},
- {0xc0c, 0x1fff0000},
- {0xc2c, 0x1fff1fff},
- {0xc4d, 0x1fff8000},
- {0xc8e, 0x1fffc000},
- {0xccf, 0x1fffe000},
- {0xd10, 0x1ffff000},
- {0xd51, 0x1ffff800},
- {0xd92, 0x1ffffc00},
- {0xdd3, 0x1ffffe00},
- {0xe14, 0x1fffff00},
- {0xe55, 0x1fffff80},
- {0xe96, 0x1fffffc0},
- {0xed7, 0x1fffffe0},
- {0xf18, 0x1ffffff0},
- {0xf59, 0x1ffffff8},
- {0xf9a, 0x1ffffffc},
- {0xfdb, 0x1ffffffe},
- {0x81c, 0x1fffffff},
- {0x8c0, 0x20000000},
- {0xce0, 0x20002000},
- {0xef0, 0x20202020},
- {0xff8, 0x22222222},
- {0x901, 0x30000000},
- {0xd21, 0x30003000},
- {0xf31, 0x30303030},
- {0xf39, 0x33333333},
- {0x942, 0x38000000},
- {0xd62, 0x38003800},
- {0xf72, 0x38383838},
- {0x983, 0x3c000000},
- {0xda3, 0x3c003c00},
- {0xfb3, 0x3c3c3c3c},
- {0x9c4, 0x3e000000},
- {0xde4, 0x3e003e00},
- {0xff4, 0x3e3e3e3e},
- {0xa05, 0x3f000000},
- {0xe25, 0x3f003f00},
- {0xe35, 0x3f3f3f3f},
- {0xa46, 0x3f800000},
- {0xe66, 0x3f803f80},
- {0xa87, 0x3fc00000},
- {0xea7, 0x3fc03fc0},
- {0xac8, 0x3fe00000},
- {0xee8, 0x3fe03fe0},
- {0xb09, 0x3ff00000},
- {0xf29, 0x3ff03ff0},
- {0xb4a, 0x3ff80000},
- {0xf6a, 0x3ff83ff8},
- {0xb8b, 0x3ffc0000},
- {0xfab, 0x3ffc3ffc},
- {0xbcc, 0x3ffe0000},
- {0xfec, 0x3ffe3ffe},
- {0xc0d, 0x3fff0000},
- {0xc2d, 0x3fff3fff},
- {0xc4e, 0x3fff8000},
- {0xc8f, 0x3fffc000},
- {0xcd0, 0x3fffe000},
- {0xd11, 0x3ffff000},
- {0xd52, 0x3ffff800},
- {0xd93, 0x3ffffc00},
- {0xdd4, 0x3ffffe00},
- {0xe15, 0x3fffff00},
- {0xe56, 0x3fffff80},
- {0xe97, 0x3fffffc0},
- {0xed8, 0x3fffffe0},
- {0xf19, 0x3ffffff0},
- {0xf5a, 0x3ffffff8},
- {0xf9b, 0x3ffffffc},
- {0xfdc, 0x3ffffffe},
- {0x81d, 0x3fffffff},
- {0x880, 0x40000000},
- {0xca0, 0x40004000},
- {0xeb0, 0x40404040},
- {0xfb8, 0x44444444},
- {0xfbc, 0x55555555},
- {0x8c1, 0x60000000},
- {0xce1, 0x60006000},
- {0xef1, 0x60606060},
- {0xff9, 0x66666666},
- {0x902, 0x70000000},
- {0xd22, 0x70007000},
- {0xf32, 0x70707070},
- {0xf3a, 0x77777777},
- {0x943, 0x78000000},
- {0xd63, 0x78007800},
- {0xf73, 0x78787878},
- {0x984, 0x7c000000},
- {0xda4, 0x7c007c00},
- {0xfb4, 0x7c7c7c7c},
- {0x9c5, 0x7e000000},
- {0xde5, 0x7e007e00},
- {0xff5, 0x7e7e7e7e},
- {0xa06, 0x7f000000},
- {0xe26, 0x7f007f00},
- {0xe36, 0x7f7f7f7f},
- {0xa47, 0x7f800000},
- {0xe67, 0x7f807f80},
- {0xa88, 0x7fc00000},
- {0xea8, 0x7fc07fc0},
- {0xac9, 0x7fe00000},
- {0xee9, 0x7fe07fe0},
- {0xb0a, 0x7ff00000},
- {0xf2a, 0x7ff07ff0},
- {0xb4b, 0x7ff80000},
- {0xf6b, 0x7ff87ff8},
- {0xb8c, 0x7ffc0000},
- {0xfac, 0x7ffc7ffc},
- {0xbcd, 0x7ffe0000},
- {0xfed, 0x7ffe7ffe},
- {0xc0e, 0x7fff0000},
- {0xc2e, 0x7fff7fff},
- {0xc4f, 0x7fff8000},
- {0xc90, 0x7fffc000},
- {0xcd1, 0x7fffe000},
- {0xd12, 0x7ffff000},
- {0xd53, 0x7ffff800},
- {0xd94, 0x7ffffc00},
- {0xdd5, 0x7ffffe00},
- {0xe16, 0x7fffff00},
- {0xe57, 0x7fffff80},
- {0xe98, 0x7fffffc0},
- {0xed9, 0x7fffffe0},
- {0xf1a, 0x7ffffff0},
- {0xf5b, 0x7ffffff8},
- {0xf9c, 0x7ffffffc},
- {0xfdd, 0x7ffffffe},
- {0x81e, 0x7fffffff},
- {0x840, 0x80000000},
- {0x841, 0x80000001},
- {0x842, 0x80000003},
- {0x843, 0x80000007},
- {0x844, 0x8000000f},
- {0x845, 0x8000001f},
- {0x846, 0x8000003f},
- {0x847, 0x8000007f},
- {0x848, 0x800000ff},
- {0x849, 0x800001ff},
- {0x84a, 0x800003ff},
- {0x84b, 0x800007ff},
- {0x84c, 0x80000fff},
- {0x84d, 0x80001fff},
- {0x84e, 0x80003fff},
- {0x84f, 0x80007fff},
- {0xc60, 0x80008000},
- {0x850, 0x8000ffff},
- {0xc61, 0x80018001},
- {0x851, 0x8001ffff},
- {0xc62, 0x80038003},
- {0x852, 0x8003ffff},
- {0xc63, 0x80078007},
- {0x853, 0x8007ffff},
- {0xc64, 0x800f800f},
- {0x854, 0x800fffff},
- {0xc65, 0x801f801f},
- {0x855, 0x801fffff},
- {0xc66, 0x803f803f},
- {0x856, 0x803fffff},
- {0xc67, 0x807f807f},
- {0x857, 0x807fffff},
- {0xe70, 0x80808080},
- {0xc68, 0x80ff80ff},
- {0x858, 0x80ffffff},
- {0xe71, 0x81818181},
- {0xc69, 0x81ff81ff},
- {0x859, 0x81ffffff},
- {0xe72, 0x83838383},
- {0xc6a, 0x83ff83ff},
- {0x85a, 0x83ffffff},
- {0xe73, 0x87878787},
- {0xc6b, 0x87ff87ff},
- {0x85b, 0x87ffffff},
- {0xf78, 0x88888888},
- {0xe74, 0x8f8f8f8f},
- {0xc6c, 0x8fff8fff},
- {0x85c, 0x8fffffff},
- {0xf79, 0x99999999},
- {0xe75, 0x9f9f9f9f},
- {0xc6d, 0x9fff9fff},
- {0x85d, 0x9fffffff},
- {0xffc, 0xaaaaaaaa},
- {0xf7a, 0xbbbbbbbb},
- {0xe76, 0xbfbfbfbf},
- {0xc6e, 0xbfffbfff},
- {0x85e, 0xbfffffff},
- {0x881, 0xc0000000},
- {0x882, 0xc0000001},
- {0x883, 0xc0000003},
- {0x884, 0xc0000007},
- {0x885, 0xc000000f},
- {0x886, 0xc000001f},
- {0x887, 0xc000003f},
- {0x888, 0xc000007f},
- {0x889, 0xc00000ff},
- {0x88a, 0xc00001ff},
- {0x88b, 0xc00003ff},
- {0x88c, 0xc00007ff},
- {0x88d, 0xc0000fff},
- {0x88e, 0xc0001fff},
- {0x88f, 0xc0003fff},
- {0x890, 0xc0007fff},
- {0xca1, 0xc000c000},
- {0x891, 0xc000ffff},
- {0xca2, 0xc001c001},
- {0x892, 0xc001ffff},
- {0xca3, 0xc003c003},
- {0x893, 0xc003ffff},
- {0xca4, 0xc007c007},
- {0x894, 0xc007ffff},
- {0xca5, 0xc00fc00f},
- {0x895, 0xc00fffff},
- {0xca6, 0xc01fc01f},
- {0x896, 0xc01fffff},
- {0xca7, 0xc03fc03f},
- {0x897, 0xc03fffff},
- {0xca8, 0xc07fc07f},
- {0x898, 0xc07fffff},
- {0xeb1, 0xc0c0c0c0},
- {0xca9, 0xc0ffc0ff},
- {0x899, 0xc0ffffff},
- {0xeb2, 0xc1c1c1c1},
- {0xcaa, 0xc1ffc1ff},
- {0x89a, 0xc1ffffff},
- {0xeb3, 0xc3c3c3c3},
- {0xcab, 0xc3ffc3ff},
- {0x89b, 0xc3ffffff},
- {0xeb4, 0xc7c7c7c7},
- {0xcac, 0xc7ffc7ff},
- {0x89c, 0xc7ffffff},
- {0xfb9, 0xcccccccc},
- {0xeb5, 0xcfcfcfcf},
- {0xcad, 0xcfffcfff},
- {0x89d, 0xcfffffff},
- {0xfba, 0xdddddddd},
- {0xeb6, 0xdfdfdfdf},
- {0xcae, 0xdfffdfff},
- {0x89e, 0xdfffffff},
- {0x8c2, 0xe0000000},
- {0x8c3, 0xe0000001},
- {0x8c4, 0xe0000003},
- {0x8c5, 0xe0000007},
- {0x8c6, 0xe000000f},
- {0x8c7, 0xe000001f},
- {0x8c8, 0xe000003f},
- {0x8c9, 0xe000007f},
- {0x8ca, 0xe00000ff},
- {0x8cb, 0xe00001ff},
- {0x8cc, 0xe00003ff},
- {0x8cd, 0xe00007ff},
- {0x8ce, 0xe0000fff},
- {0x8cf, 0xe0001fff},
- {0x8d0, 0xe0003fff},
- {0x8d1, 0xe0007fff},
- {0xce2, 0xe000e000},
- {0x8d2, 0xe000ffff},
- {0xce3, 0xe001e001},
- {0x8d3, 0xe001ffff},
- {0xce4, 0xe003e003},
- {0x8d4, 0xe003ffff},
- {0xce5, 0xe007e007},
- {0x8d5, 0xe007ffff},
- {0xce6, 0xe00fe00f},
- {0x8d6, 0xe00fffff},
- {0xce7, 0xe01fe01f},
- {0x8d7, 0xe01fffff},
- {0xce8, 0xe03fe03f},
- {0x8d8, 0xe03fffff},
- {0xce9, 0xe07fe07f},
- {0x8d9, 0xe07fffff},
- {0xef2, 0xe0e0e0e0},
- {0xcea, 0xe0ffe0ff},
- {0x8da, 0xe0ffffff},
- {0xef3, 0xe1e1e1e1},
- {0xceb, 0xe1ffe1ff},
- {0x8db, 0xe1ffffff},
- {0xef4, 0xe3e3e3e3},
- {0xcec, 0xe3ffe3ff},
- {0x8dc, 0xe3ffffff},
- {0xef5, 0xe7e7e7e7},
- {0xced, 0xe7ffe7ff},
- {0x8dd, 0xe7ffffff},
- {0xffa, 0xeeeeeeee},
- {0xef6, 0xefefefef},
- {0xcee, 0xefffefff},
- {0x8de, 0xefffffff},
- {0x903, 0xf0000000},
- {0x904, 0xf0000001},
- {0x905, 0xf0000003},
- {0x906, 0xf0000007},
- {0x907, 0xf000000f},
- {0x908, 0xf000001f},
- {0x909, 0xf000003f},
- {0x90a, 0xf000007f},
- {0x90b, 0xf00000ff},
- {0x90c, 0xf00001ff},
- {0x90d, 0xf00003ff},
- {0x90e, 0xf00007ff},
- {0x90f, 0xf0000fff},
- {0x910, 0xf0001fff},
- {0x911, 0xf0003fff},
- {0x912, 0xf0007fff},
- {0xd23, 0xf000f000},
- {0x913, 0xf000ffff},
- {0xd24, 0xf001f001},
- {0x914, 0xf001ffff},
- {0xd25, 0xf003f003},
- {0x915, 0xf003ffff},
- {0xd26, 0xf007f007},
- {0x916, 0xf007ffff},
- {0xd27, 0xf00ff00f},
- {0x917, 0xf00fffff},
- {0xd28, 0xf01ff01f},
- {0x918, 0xf01fffff},
- {0xd29, 0xf03ff03f},
- {0x919, 0xf03fffff},
- {0xd2a, 0xf07ff07f},
- {0x91a, 0xf07fffff},
- {0xf33, 0xf0f0f0f0},
- {0xd2b, 0xf0fff0ff},
- {0x91b, 0xf0ffffff},
- {0xf34, 0xf1f1f1f1},
- {0xd2c, 0xf1fff1ff},
- {0x91c, 0xf1ffffff},
- {0xf35, 0xf3f3f3f3},
- {0xd2d, 0xf3fff3ff},
- {0x91d, 0xf3ffffff},
- {0xf36, 0xf7f7f7f7},
- {0xd2e, 0xf7fff7ff},
- {0x91e, 0xf7ffffff},
- {0x944, 0xf8000000},
- {0x945, 0xf8000001},
- {0x946, 0xf8000003},
- {0x947, 0xf8000007},
- {0x948, 0xf800000f},
- {0x949, 0xf800001f},
- {0x94a, 0xf800003f},
- {0x94b, 0xf800007f},
- {0x94c, 0xf80000ff},
- {0x94d, 0xf80001ff},
- {0x94e, 0xf80003ff},
- {0x94f, 0xf80007ff},
- {0x950, 0xf8000fff},
- {0x951, 0xf8001fff},
- {0x952, 0xf8003fff},
- {0x953, 0xf8007fff},
- {0xd64, 0xf800f800},
- {0x954, 0xf800ffff},
- {0xd65, 0xf801f801},
- {0x955, 0xf801ffff},
- {0xd66, 0xf803f803},
- {0x956, 0xf803ffff},
- {0xd67, 0xf807f807},
- {0x957, 0xf807ffff},
- {0xd68, 0xf80ff80f},
- {0x958, 0xf80fffff},
- {0xd69, 0xf81ff81f},
- {0x959, 0xf81fffff},
- {0xd6a, 0xf83ff83f},
- {0x95a, 0xf83fffff},
- {0xd6b, 0xf87ff87f},
- {0x95b, 0xf87fffff},
- {0xf74, 0xf8f8f8f8},
- {0xd6c, 0xf8fff8ff},
- {0x95c, 0xf8ffffff},
- {0xf75, 0xf9f9f9f9},
- {0xd6d, 0xf9fff9ff},
- {0x95d, 0xf9ffffff},
- {0xf76, 0xfbfbfbfb},
- {0xd6e, 0xfbfffbff},
- {0x95e, 0xfbffffff},
- {0x985, 0xfc000000},
- {0x986, 0xfc000001},
- {0x987, 0xfc000003},
- {0x988, 0xfc000007},
- {0x989, 0xfc00000f},
- {0x98a, 0xfc00001f},
- {0x98b, 0xfc00003f},
- {0x98c, 0xfc00007f},
- {0x98d, 0xfc0000ff},
- {0x98e, 0xfc0001ff},
- {0x98f, 0xfc0003ff},
- {0x990, 0xfc0007ff},
- {0x991, 0xfc000fff},
- {0x992, 0xfc001fff},
- {0x993, 0xfc003fff},
- {0x994, 0xfc007fff},
- {0xda5, 0xfc00fc00},
- {0x995, 0xfc00ffff},
- {0xda6, 0xfc01fc01},
- {0x996, 0xfc01ffff},
- {0xda7, 0xfc03fc03},
- {0x997, 0xfc03ffff},
- {0xda8, 0xfc07fc07},
- {0x998, 0xfc07ffff},
- {0xda9, 0xfc0ffc0f},
- {0x999, 0xfc0fffff},
- {0xdaa, 0xfc1ffc1f},
- {0x99a, 0xfc1fffff},
- {0xdab, 0xfc3ffc3f},
- {0x99b, 0xfc3fffff},
- {0xdac, 0xfc7ffc7f},
- {0x99c, 0xfc7fffff},
- {0xfb5, 0xfcfcfcfc},
- {0xdad, 0xfcfffcff},
- {0x99d, 0xfcffffff},
- {0xfb6, 0xfdfdfdfd},
- {0xdae, 0xfdfffdff},
- {0x99e, 0xfdffffff},
- {0x9c6, 0xfe000000},
- {0x9c7, 0xfe000001},
- {0x9c8, 0xfe000003},
- {0x9c9, 0xfe000007},
- {0x9ca, 0xfe00000f},
- {0x9cb, 0xfe00001f},
- {0x9cc, 0xfe00003f},
- {0x9cd, 0xfe00007f},
- {0x9ce, 0xfe0000ff},
- {0x9cf, 0xfe0001ff},
- {0x9d0, 0xfe0003ff},
- {0x9d1, 0xfe0007ff},
- {0x9d2, 0xfe000fff},
- {0x9d3, 0xfe001fff},
- {0x9d4, 0xfe003fff},
- {0x9d5, 0xfe007fff},
- {0xde6, 0xfe00fe00},
- {0x9d6, 0xfe00ffff},
- {0xde7, 0xfe01fe01},
- {0x9d7, 0xfe01ffff},
- {0xde8, 0xfe03fe03},
- {0x9d8, 0xfe03ffff},
- {0xde9, 0xfe07fe07},
- {0x9d9, 0xfe07ffff},
- {0xdea, 0xfe0ffe0f},
- {0x9da, 0xfe0fffff},
- {0xdeb, 0xfe1ffe1f},
- {0x9db, 0xfe1fffff},
- {0xdec, 0xfe3ffe3f},
- {0x9dc, 0xfe3fffff},
- {0xded, 0xfe7ffe7f},
- {0x9dd, 0xfe7fffff},
- {0xff6, 0xfefefefe},
- {0xdee, 0xfefffeff},
- {0x9de, 0xfeffffff},
- {0xa07, 0xff000000},
- {0xa08, 0xff000001},
- {0xa09, 0xff000003},
- {0xa0a, 0xff000007},
- {0xa0b, 0xff00000f},
- {0xa0c, 0xff00001f},
- {0xa0d, 0xff00003f},
- {0xa0e, 0xff00007f},
- {0xa0f, 0xff0000ff},
- {0xa10, 0xff0001ff},
- {0xa11, 0xff0003ff},
- {0xa12, 0xff0007ff},
- {0xa13, 0xff000fff},
- {0xa14, 0xff001fff},
- {0xa15, 0xff003fff},
- {0xa16, 0xff007fff},
- {0xe27, 0xff00ff00},
- {0xa17, 0xff00ffff},
- {0xe28, 0xff01ff01},
- {0xa18, 0xff01ffff},
- {0xe29, 0xff03ff03},
- {0xa19, 0xff03ffff},
- {0xe2a, 0xff07ff07},
- {0xa1a, 0xff07ffff},
- {0xe2b, 0xff0fff0f},
- {0xa1b, 0xff0fffff},
- {0xe2c, 0xff1fff1f},
- {0xa1c, 0xff1fffff},
- {0xe2d, 0xff3fff3f},
- {0xa1d, 0xff3fffff},
- {0xe2e, 0xff7fff7f},
- {0xa1e, 0xff7fffff},
- {0xa48, 0xff800000},
- {0xa49, 0xff800001},
- {0xa4a, 0xff800003},
- {0xa4b, 0xff800007},
- {0xa4c, 0xff80000f},
- {0xa4d, 0xff80001f},
- {0xa4e, 0xff80003f},
- {0xa4f, 0xff80007f},
- {0xa50, 0xff8000ff},
- {0xa51, 0xff8001ff},
- {0xa52, 0xff8003ff},
- {0xa53, 0xff8007ff},
- {0xa54, 0xff800fff},
- {0xa55, 0xff801fff},
- {0xa56, 0xff803fff},
- {0xa57, 0xff807fff},
- {0xe68, 0xff80ff80},
- {0xa58, 0xff80ffff},
- {0xe69, 0xff81ff81},
- {0xa59, 0xff81ffff},
- {0xe6a, 0xff83ff83},
- {0xa5a, 0xff83ffff},
- {0xe6b, 0xff87ff87},
- {0xa5b, 0xff87ffff},
- {0xe6c, 0xff8fff8f},
- {0xa5c, 0xff8fffff},
- {0xe6d, 0xff9fff9f},
- {0xa5d, 0xff9fffff},
- {0xe6e, 0xffbfffbf},
- {0xa5e, 0xffbfffff},
- {0xa89, 0xffc00000},
- {0xa8a, 0xffc00001},
- {0xa8b, 0xffc00003},
- {0xa8c, 0xffc00007},
- {0xa8d, 0xffc0000f},
- {0xa8e, 0xffc0001f},
- {0xa8f, 0xffc0003f},
- {0xa90, 0xffc0007f},
- {0xa91, 0xffc000ff},
- {0xa92, 0xffc001ff},
- {0xa93, 0xffc003ff},
- {0xa94, 0xffc007ff},
- {0xa95, 0xffc00fff},
- {0xa96, 0xffc01fff},
- {0xa97, 0xffc03fff},
- {0xa98, 0xffc07fff},
- {0xea9, 0xffc0ffc0},
- {0xa99, 0xffc0ffff},
- {0xeaa, 0xffc1ffc1},
- {0xa9a, 0xffc1ffff},
- {0xeab, 0xffc3ffc3},
- {0xa9b, 0xffc3ffff},
- {0xeac, 0xffc7ffc7},
- {0xa9c, 0xffc7ffff},
- {0xead, 0xffcfffcf},
- {0xa9d, 0xffcfffff},
- {0xeae, 0xffdfffdf},
- {0xa9e, 0xffdfffff},
- {0xaca, 0xffe00000},
- {0xacb, 0xffe00001},
- {0xacc, 0xffe00003},
- {0xacd, 0xffe00007},
- {0xace, 0xffe0000f},
- {0xacf, 0xffe0001f},
- {0xad0, 0xffe0003f},
- {0xad1, 0xffe0007f},
- {0xad2, 0xffe000ff},
- {0xad3, 0xffe001ff},
- {0xad4, 0xffe003ff},
- {0xad5, 0xffe007ff},
- {0xad6, 0xffe00fff},
- {0xad7, 0xffe01fff},
- {0xad8, 0xffe03fff},
- {0xad9, 0xffe07fff},
- {0xeea, 0xffe0ffe0},
- {0xada, 0xffe0ffff},
- {0xeeb, 0xffe1ffe1},
- {0xadb, 0xffe1ffff},
- {0xeec, 0xffe3ffe3},
- {0xadc, 0xffe3ffff},
- {0xeed, 0xffe7ffe7},
- {0xadd, 0xffe7ffff},
- {0xeee, 0xffefffef},
- {0xade, 0xffefffff},
- {0xb0b, 0xfff00000},
- {0xb0c, 0xfff00001},
- {0xb0d, 0xfff00003},
- {0xb0e, 0xfff00007},
- {0xb0f, 0xfff0000f},
- {0xb10, 0xfff0001f},
- {0xb11, 0xfff0003f},
- {0xb12, 0xfff0007f},
- {0xb13, 0xfff000ff},
- {0xb14, 0xfff001ff},
- {0xb15, 0xfff003ff},
- {0xb16, 0xfff007ff},
- {0xb17, 0xfff00fff},
- {0xb18, 0xfff01fff},
- {0xb19, 0xfff03fff},
- {0xb1a, 0xfff07fff},
- {0xf2b, 0xfff0fff0},
- {0xb1b, 0xfff0ffff},
- {0xf2c, 0xfff1fff1},
- {0xb1c, 0xfff1ffff},
- {0xf2d, 0xfff3fff3},
- {0xb1d, 0xfff3ffff},
- {0xf2e, 0xfff7fff7},
- {0xb1e, 0xfff7ffff},
- {0xb4c, 0xfff80000},
- {0xb4d, 0xfff80001},
- {0xb4e, 0xfff80003},
- {0xb4f, 0xfff80007},
- {0xb50, 0xfff8000f},
- {0xb51, 0xfff8001f},
- {0xb52, 0xfff8003f},
- {0xb53, 0xfff8007f},
- {0xb54, 0xfff800ff},
- {0xb55, 0xfff801ff},
- {0xb56, 0xfff803ff},
- {0xb57, 0xfff807ff},
- {0xb58, 0xfff80fff},
- {0xb59, 0xfff81fff},
- {0xb5a, 0xfff83fff},
- {0xb5b, 0xfff87fff},
- {0xf6c, 0xfff8fff8},
- {0xb5c, 0xfff8ffff},
- {0xf6d, 0xfff9fff9},
- {0xb5d, 0xfff9ffff},
- {0xf6e, 0xfffbfffb},
- {0xb5e, 0xfffbffff},
- {0xb8d, 0xfffc0000},
- {0xb8e, 0xfffc0001},
- {0xb8f, 0xfffc0003},
- {0xb90, 0xfffc0007},
- {0xb91, 0xfffc000f},
- {0xb92, 0xfffc001f},
- {0xb93, 0xfffc003f},
- {0xb94, 0xfffc007f},
- {0xb95, 0xfffc00ff},
- {0xb96, 0xfffc01ff},
- {0xb97, 0xfffc03ff},
- {0xb98, 0xfffc07ff},
- {0xb99, 0xfffc0fff},
- {0xb9a, 0xfffc1fff},
- {0xb9b, 0xfffc3fff},
- {0xb9c, 0xfffc7fff},
- {0xfad, 0xfffcfffc},
- {0xb9d, 0xfffcffff},
- {0xfae, 0xfffdfffd},
- {0xb9e, 0xfffdffff},
- {0xbce, 0xfffe0000},
- {0xbcf, 0xfffe0001},
- {0xbd0, 0xfffe0003},
- {0xbd1, 0xfffe0007},
- {0xbd2, 0xfffe000f},
- {0xbd3, 0xfffe001f},
- {0xbd4, 0xfffe003f},
- {0xbd5, 0xfffe007f},
- {0xbd6, 0xfffe00ff},
- {0xbd7, 0xfffe01ff},
- {0xbd8, 0xfffe03ff},
- {0xbd9, 0xfffe07ff},
- {0xbda, 0xfffe0fff},
- {0xbdb, 0xfffe1fff},
- {0xbdc, 0xfffe3fff},
- {0xbdd, 0xfffe7fff},
- {0xfee, 0xfffefffe},
- {0xbde, 0xfffeffff},
- {0xc0f, 0xffff0000},
- {0xc10, 0xffff0001},
- {0xc11, 0xffff0003},
- {0xc12, 0xffff0007},
- {0xc13, 0xffff000f},
- {0xc14, 0xffff001f},
- {0xc15, 0xffff003f},
- {0xc16, 0xffff007f},
- {0xc17, 0xffff00ff},
- {0xc18, 0xffff01ff},
- {0xc19, 0xffff03ff},
- {0xc1a, 0xffff07ff},
- {0xc1b, 0xffff0fff},
- {0xc1c, 0xffff1fff},
- {0xc1d, 0xffff3fff},
- {0xc1e, 0xffff7fff},
- {0xc50, 0xffff8000},
- {0xc51, 0xffff8001},
- {0xc52, 0xffff8003},
- {0xc53, 0xffff8007},
- {0xc54, 0xffff800f},
- {0xc55, 0xffff801f},
- {0xc56, 0xffff803f},
- {0xc57, 0xffff807f},
- {0xc58, 0xffff80ff},
- {0xc59, 0xffff81ff},
- {0xc5a, 0xffff83ff},
- {0xc5b, 0xffff87ff},
- {0xc5c, 0xffff8fff},
- {0xc5d, 0xffff9fff},
- {0xc5e, 0xffffbfff},
- {0xc91, 0xffffc000},
- {0xc92, 0xffffc001},
- {0xc93, 0xffffc003},
- {0xc94, 0xffffc007},
- {0xc95, 0xffffc00f},
- {0xc96, 0xffffc01f},
- {0xc97, 0xffffc03f},
- {0xc98, 0xffffc07f},
- {0xc99, 0xffffc0ff},
- {0xc9a, 0xffffc1ff},
- {0xc9b, 0xffffc3ff},
- {0xc9c, 0xffffc7ff},
- {0xc9d, 0xffffcfff},
- {0xc9e, 0xffffdfff},
- {0xcd2, 0xffffe000},
- {0xcd3, 0xffffe001},
- {0xcd4, 0xffffe003},
- {0xcd5, 0xffffe007},
- {0xcd6, 0xffffe00f},
- {0xcd7, 0xffffe01f},
- {0xcd8, 0xffffe03f},
- {0xcd9, 0xffffe07f},
- {0xcda, 0xffffe0ff},
- {0xcdb, 0xffffe1ff},
- {0xcdc, 0xffffe3ff},
- {0xcdd, 0xffffe7ff},
- {0xcde, 0xffffefff},
- {0xd13, 0xfffff000},
- {0xd14, 0xfffff001},
- {0xd15, 0xfffff003},
- {0xd16, 0xfffff007},
- {0xd17, 0xfffff00f},
- {0xd18, 0xfffff01f},
- {0xd19, 0xfffff03f},
- {0xd1a, 0xfffff07f},
- {0xd1b, 0xfffff0ff},
- {0xd1c, 0xfffff1ff},
- {0xd1d, 0xfffff3ff},
- {0xd1e, 0xfffff7ff},
- {0xd54, 0xfffff800},
- {0xd55, 0xfffff801},
- {0xd56, 0xfffff803},
- {0xd57, 0xfffff807},
- {0xd58, 0xfffff80f},
- {0xd59, 0xfffff81f},
- {0xd5a, 0xfffff83f},
- {0xd5b, 0xfffff87f},
- {0xd5c, 0xfffff8ff},
- {0xd5d, 0xfffff9ff},
- {0xd5e, 0xfffffbff},
- {0xd95, 0xfffffc00},
- {0xd96, 0xfffffc01},
- {0xd97, 0xfffffc03},
- {0xd98, 0xfffffc07},
- {0xd99, 0xfffffc0f},
- {0xd9a, 0xfffffc1f},
- {0xd9b, 0xfffffc3f},
- {0xd9c, 0xfffffc7f},
- {0xd9d, 0xfffffcff},
- {0xd9e, 0xfffffdff},
- {0xdd6, 0xfffffe00},
- {0xdd7, 0xfffffe01},
- {0xdd8, 0xfffffe03},
- {0xdd9, 0xfffffe07},
- {0xdda, 0xfffffe0f},
- {0xddb, 0xfffffe1f},
- {0xddc, 0xfffffe3f},
- {0xddd, 0xfffffe7f},
- {0xdde, 0xfffffeff},
- {0xe17, 0xffffff00},
- {0xe18, 0xffffff01},
- {0xe19, 0xffffff03},
- {0xe1a, 0xffffff07},
- {0xe1b, 0xffffff0f},
- {0xe1c, 0xffffff1f},
- {0xe1d, 0xffffff3f},
- {0xe1e, 0xffffff7f},
- {0xe58, 0xffffff80},
- {0xe59, 0xffffff81},
- {0xe5a, 0xffffff83},
- {0xe5b, 0xffffff87},
- {0xe5c, 0xffffff8f},
- {0xe5d, 0xffffff9f},
- {0xe5e, 0xffffffbf},
- {0xe99, 0xffffffc0},
- {0xe9a, 0xffffffc1},
- {0xe9b, 0xffffffc3},
- {0xe9c, 0xffffffc7},
- {0xe9d, 0xffffffcf},
- {0xe9e, 0xffffffdf},
- {0xeda, 0xffffffe0},
- {0xedb, 0xffffffe1},
- {0xedc, 0xffffffe3},
- {0xedd, 0xffffffe7},
- {0xede, 0xffffffef},
- {0xf1b, 0xfffffff0},
- {0xf1c, 0xfffffff1},
- {0xf1d, 0xfffffff3},
- {0xf1e, 0xfffffff7},
- {0xf5c, 0xfffffff8},
- {0xf5d, 0xfffffff9},
- {0xf5e, 0xfffffffb},
- {0xf9d, 0xfffffffc},
- {0xf9e, 0xfffffffd},
- {0xfde, 0xfffffffe},
-};
-
-uint32_t host_arm64_find_imm(uint32_t data)
-{
- int l = 0, r = IMM_NR - 1;
-
- while (l <= r)
- {
- int m = (l + r) >> 1;
-
- if (imm_table[m][1] < data)
- l = m+1;
- else if (imm_table[m][1] > data)
- r = m-1;
- else
- return imm_table[m][0];
- }
- return 0;
-}
diff --git a/src/codegen_backend_arm64_ops.c b/src/codegen_backend_arm64_ops.c
deleted file mode 100644
index 552665a..0000000
--- a/src/codegen_backend_arm64_ops.c
+++ /dev/null
@@ -1,1382 +0,0 @@
-#ifdef __aarch64__
-
-#include "ibm.h"
-#include "codegen.h"
-#include "codegen_allocator.h"
-#include "codegen_backend.h"
-#include "codegen_backend_arm64_defs.h"
-#include "codegen_backend_arm64_ops.h"
-
-
-#define Rt(x) (x)
-#define Rd(x) (x)
-#define Rn(x) ((x) << 5)
-#define Rt2(x) ((x) << 10)
-#define Rm(x) ((x) << 16)
-
-#define shift_imm6(x) ((x) << 10)
-
-#define DATA_OFFSET_UP (1 << 23)
-#define DATA_OFFSET_DOWN (0 << 23)
-
-#define COND_EQ (0x0)
-#define COND_NE (0x1)
-#define COND_CS (0x2)
-#define COND_CC (0x3)
-#define COND_MI (0x4)
-#define COND_PL (0x5)
-#define COND_VS (0x6)
-#define COND_VC (0x7)
-#define COND_HI (0x8)
-#define COND_LS (0x9)
-#define COND_GE (0xa)
-#define COND_LT (0xb)
-#define COND_GT (0xc)
-#define COND_LE (0xd)
-
-#define CSEL_COND(cond) ((cond) << 12)
-
-#define OPCODE_SHIFT 24
-#define OPCODE_ADD_IMM (0x11 << OPCODE_SHIFT)
-#define OPCODE_ADDX_IMM (0x91 << OPCODE_SHIFT)
-#define OPCODE_ADR (0x10 << OPCODE_SHIFT)
-#define OPCODE_B (0x14 << OPCODE_SHIFT)
-#define OPCODE_BCOND (0x54 << OPCODE_SHIFT)
-#define OPCODE_CBNZ (0xb5 << OPCODE_SHIFT)
-#define OPCODE_CBZ (0xb4 << OPCODE_SHIFT)
-#define OPCODE_CMN_IMM (0x31 << OPCODE_SHIFT)
-#define OPCODE_CMNX_IMM (0xb1 << OPCODE_SHIFT)
-#define OPCODE_CMP_IMM (0x71 << OPCODE_SHIFT)
-#define OPCODE_CMPX_IMM (0xf1 << OPCODE_SHIFT)
-#define OPCODE_SUB_IMM (0x51 << OPCODE_SHIFT)
-#define OPCODE_SUBX_IMM (0xd1 << OPCODE_SHIFT)
-#define OPCODE_TBNZ (0x37 << OPCODE_SHIFT)
-#define OPCODE_TBZ (0x36 << OPCODE_SHIFT)
-
-#define OPCODE_AND_IMM (0x024 << 23)
-#define OPCODE_ANDS_IMM (0x0e4 << 23)
-#define OPCODE_EOR_IMM (0x0a4 << 23)
-#define OPCODE_MOVK_W (0x0e5 << 23)
-#define OPCODE_MOVK_X (0x1e5 << 23)
-#define OPCODE_MOVZ_W (0x0a5 << 23)
-#define OPCODE_MOVZ_X (0x1a5 << 23)
-#define OPCODE_ORR_IMM (0x064 << 23)
-
-#define OPCODE_BFI (0x0cc << 22)
-#define OPCODE_LDR_IMM_W (0x2e5 << 22)
-#define OPCODE_LDR_IMM_X (0x3e5 << 22)
-#define OPCODE_LDR_IMM_F64 (0x3f5 << 22)
-#define OPCODE_LDRB_IMM_W (0x0e5 << 22)
-#define OPCODE_LDRH_IMM (0x1e5 << 22)
-#define OPCODE_LDP_POSTIDX_X (0x2a3 << 22)
-#define OPCODE_SBFX (0x04c << 22)
-#define OPCODE_STP_PREIDX_X (0x2a6 << 22)
-#define OPCODE_STR_IMM_W (0x2e4 << 22)
-#define OPCODE_STR_IMM_Q (0x3e4 << 22)
-#define OPCODE_STR_IMM_F64 (0x3f4 << 22)
-#define OPCODE_STRB_IMM (0x0e4 << 22)
-#define OPCODE_STRH_IMM (0x1e4 << 22)
-#define OPCODE_UBFX (0x14c << 22)
-
-#define OPCODE_ADD_LSL (0x058 << 21)
-#define OPCODE_ADD_LSR (0x05a << 21)
-#define OPCODE_ADDX_LSL (0x458 << 21)
-#define OPCODE_AND_ASR (0x054 << 21)
-#define OPCODE_AND_LSL (0x050 << 21)
-#define OPCODE_AND_ROR (0x056 << 21)
-#define OPCODE_ANDS_LSL (0x350 << 21)
-#define OPCODE_CMP_LSL (0x358 << 21)
-#define OPCODE_CSEL (0x0d4 << 21)
-#define OPCODE_EOR_LSL (0x250 << 21)
-#define OPCODE_ORR_ASR (0x154 << 21)
-#define OPCODE_ORR_LSL (0x150 << 21)
-#define OPCODE_ORR_LSR (0x152 << 21)
-#define OPCODE_ORR_ROR (0x156 << 21)
-#define OPCODE_ORRX_LSL (0x550 << 21)
-#define OPCODE_SUB_LSL (0x258 << 21)
-#define OPCODE_SUB_LSR (0x25a << 21)
-#define OPCODE_SUBX_LSL (0x658 << 21)
-
-#define OPCODE_ADD_V8B (0x0e208400)
-#define OPCODE_ADD_V4H (0x0e608400)
-#define OPCODE_ADD_V2S (0x0ea08400)
-#define OPCODE_ADDP_V4S (0x4ea0bc00)
-#define OPCODE_AND_V (0x0e201c00)
-#define OPCODE_ASR (0x1ac02800)
-#define OPCODE_BIC_V (0x0e601c00)
-#define OPCODE_BLR (0xd63f0000)
-#define OPCODE_BR (0xd61f0000)
-#define OPCODE_CMEQ_V8B (0x2e208c00)
-#define OPCODE_CMEQ_V4H (0x2e608c00)
-#define OPCODE_CMEQ_V2S (0x2ea08c00)
-#define OPCODE_CMGT_V8B (0x0e203400)
-#define OPCODE_CMGT_V4H (0x0e603400)
-#define OPCODE_CMGT_V2S (0x0ea03400)
-#define OPCODE_DUP_V2S (0x0e040400)
-#define OPCODE_EOR_V (0x2e201c00)
-#define OPCODE_FABS_D (0x1e60c000)
-#define OPCODE_FADD_D (0x1e602800)
-#define OPCODE_FADD_V2S (0x0e20d400)
-#define OPCODE_FCMEQ_V2S (0x0e20e400)
-#define OPCODE_FCMGE_V2S (0x2e20e400)
-#define OPCODE_FCMGT_V2S (0x2ea0e400)
-#define OPCODE_FCMP_D (0x1e602000)
-#define OPCODE_FCVT_D_S (0x1e22c000)
-#define OPCODE_FCVT_S_D (0x1e624000)
-#define OPCODE_FCVTMS_W_D (0x1e700000)
-#define OPCODE_FCVTMS_X_D (0x9e700000)
-#define OPCODE_FCVTNS_W_D (0x1e600000)
-#define OPCODE_FCVTNS_X_D (0x9e600000)
-#define OPCODE_FCVTPS_W_D (0x1e680000)
-#define OPCODE_FCVTPS_X_D (0x9e680000)
-#define OPCODE_FCVTZS_W_D (0x1e780000)
-#define OPCODE_FCVTZS_X_D (0x9e780000)
-#define OPCODE_FCVTZS_V2S (0x0ea1b800)
-#define OPCODE_FDIV_D (0x1e601800)
-#define OPCODE_FDIV_S (0x1e201800)
-#define OPCODE_FMAX_V2S (0x0e20f400)
-#define OPCODE_FMIN_V2S (0x0ea0f400)
-#define OPCODE_FMOV_D_D (0x1e604000)
-#define OPCODE_FMOV_D_Q (0x9e670000)
-#define OPCODE_FMOV_Q_D (0x9e660000)
-#define OPCODE_FMOV_S_W (0x1e270000)
-#define OPCODE_FMOV_W_S (0x1e260000)
-#define OPCODE_FMOV_S_ONE (0x1e2e1000)
-#define OPCODE_FMUL_D (0x1e600800)
-#define OPCODE_FMUL_V2S (0x2e20dc00)
-#define OPCODE_FNEG_D (0x1e614000)
-#define OPCODE_FRINTX_D (0x1e674000)
-#define OPCODE_FSQRT_D (0x1e61c000)
-#define OPCODE_FSQRT_S (0x1e21c000)
-#define OPCODE_FSUB_D (0x1e603800)
-#define OPCODE_FSUB_V2S (0x0ea0d400)
-#define OPCODE_LDR_REG (0xb8606800)
-#define OPCODE_LDRX_REG (0xf8606800)
-#define OPCODE_LDRB_REG (0x38606800)
-#define OPCODE_LDRH_REG (0x78606800)
-#define OPCODE_LDRX_REG_LSL3 (0xf8607800)
-#define OPCODE_LDR_REG_F32 (0xbc606800)
-#define OPCODE_LDR_REG_F64 (0xfc606800)
-#define OPCODE_LDR_REG_F64_S (0xfc607800)
-#define OPCODE_LSL (0x1ac02000)
-#define OPCODE_LSR (0x1ac02400)
-#define OPCODE_MSR_FPCR (0xd51b4400)
-#define OPCODE_MUL_V4H (0x0e609c00)
-#define OPCODE_NOP (0xd503201f)
-#define OPCODE_ORR_V (0x0ea01c00)
-#define OPCODE_RET (0xd65f0000)
-#define OPCODE_ROR (0x1ac02c00)
-#define OPCODE_SADDLP_V2S_4H (0x0e602800)
-#define OPCODE_SCVTF_D_Q (0x9e620000)
-#define OPCODE_SCVTF_D_W (0x1e620000)
-#define OPCODE_SCVTF_V2S (0x0e21d800)
-#define OPCODE_SQADD_V8B (0x0e200c00)
-#define OPCODE_SQADD_V4H (0x0e600c00)
-#define OPCODE_SQSUB_V8B (0x0e202c00)
-#define OPCODE_SQSUB_V4H (0x0e602c00)
-#define OPCODE_SQXTN_V8B_8H (0x0e214800)
-#define OPCODE_SQXTN_V4H_4S (0x0e614800)
-#define OPCODE_SHL_VD (0x0f005400)
-#define OPCODE_SHL_VQ (0x4f005400)
-#define OPCODE_SHRN (0x0f008400)
-#define OPCODE_SMULL_V4S_4H (0x0e60c000)
-#define OPCODE_SSHR_VD (0x0f000400)
-#define OPCODE_SSHR_VQ (0x4f000400)
-#define OPCODE_STR_REG (0xb8206800)
-#define OPCODE_STRB_REG (0x38206800)
-#define OPCODE_STRH_REG (0x78206800)
-#define OPCODE_STR_REG_F32 (0xbc206800)
-#define OPCODE_STR_REG_F64 (0xfc206800)
-#define OPCODE_STR_REG_F64_S (0xfc207800)
-#define OPCODE_SUB_V8B (0x2e208400)
-#define OPCODE_SUB_V4H (0x2e608400)
-#define OPCODE_SUB_V2S (0x2ea08400)
-#define OPCODE_UQADD_V8B (0x2e200c00)
-#define OPCODE_UQADD_V4H (0x2e600c00)
-#define OPCODE_UQSUB_V8B (0x2e202c00)
-#define OPCODE_UQSUB_V4H (0x2e602c00)
-#define OPCODE_UQXTN_V8B_8H (0x2e214800)
-#define OPCODE_UQXTN_V4H_4S (0x2e614800)
-#define OPCODE_USHR_VD (0x2f000400)
-#define OPCODE_USHR_VQ (0x6f000400)
-#define OPCODE_ZIP1_V8B (0x0e003800)
-#define OPCODE_ZIP1_V4H (0x0e403800)
-#define OPCODE_ZIP1_V2S (0x0e803800)
-#define OPCODE_ZIP2_V8B (0x0e007800)
-#define OPCODE_ZIP2_V4H (0x0e407800)
-#define OPCODE_ZIP2_V2S (0x0e807800)
-
-#define DATPROC_SHIFT(sh) (sh << 10)
-#define DATPROC_IMM_SHIFT(sh) (sh << 22)
-#define MOV_WIDE_HW(hw) (hw << 21)
-
-#define IMM7_X(imm_data) (((imm_data >> 3) & 0x7f) << 15)
-#define IMM12(imm_data) ((imm_data) << 10)
-#define IMM16(imm_data) ((imm_data) << 5)
-
-#define IMMN(immn) ((immn) << 22)
-#define IMMR(immr) ((immr) << 16)
-#define IMMS(imms) ((imms) << 10)
-
-#define IMM_LOGICAL(imm) ((imm) << 10)
-
-#define BIT_TBxZ(bit) ((((bit) & 0x1f) << 19) | (((bit) & 0x20) ? (1 << 31) : 0))
-
-#define OFFSET14(offset) (((offset >> 2) << 5) & 0x0007ffe0)
-#define OFFSET19(offset) (((offset >> 2) << 5) & 0x00ffffe0)
-#define OFFSET20(offset) (((offset & 3) << 29) | ((((offset) & 0x1fffff) >> 2) << 5))
-#define OFFSET26(offset) ((offset >> 2) & 0x03ffffff)
-
-#define OFFSET12_B(offset) (offset << 10)
-#define OFFSET12_H(offset) ((offset >> 1) << 10)
-#define OFFSET12_W(offset) ((offset >> 2) << 10)
-#define OFFSET12_Q(offset) ((offset >> 3) << 10)
-
-#define SHIFT_IMM_V4H(shift) (((shift) | 0x10) << 16)
-#define SHIFT_IMM_V2S(shift) (((shift) | 0x20) << 16)
-#define SHIFT_IMM_V2D(shift) (((shift) | 0x40) << 16)
-
-#define SHRN_SHIFT_IMM_V4S(shift) (((shift) | 0x10) << 16)
-
-#define DUP_ELEMENT(element) ((element) << 19)
-
-/*Returns true if offset fits into 19 bits*/
-static int offset_is_19bit(int offset)
-{
- if (offset >= (1 << (18+2)))
- return 0;
- if (offset < -(1 << (18+2)))
- return 0;
- return 1;
-}
-
-/*Returns true if offset fits into 26 bits*/
-static int offset_is_26bit(int offset)
-{
- if (offset >= (1 << (25+2)))
- return 0;
- if (offset < -(1 << (25+2)))
- return 0;
- return 1;
-}
-
-static inline int imm_is_imm16(uint32_t imm_data)
-{
- if (!(imm_data & 0xffff0000) || !(imm_data & 0x0000ffff))
- return 1;
- return 0;
-}
-static inline int imm_is_imm12(uint32_t imm_data)
-{
- if (!(imm_data & 0xfffff000) || !(imm_data & 0xff000fff))
- return 1;
- return 0;
-}
-
-static void codegen_allocate_new_block(codeblock_t *block);
-
-static inline void codegen_addlong(codeblock_t *block, uint32_t val)
-{
- if (block_pos >= (BLOCK_MAX-4))
- codegen_allocate_new_block(block);
- *(uint32_t *)&block_write_data[block_pos] = val;
- block_pos += 4;
-}
-
-static void codegen_allocate_new_block(codeblock_t *block)
-{
- /*Current block is full. Allocate a new block*/
- struct mem_block_t *new_block = codegen_allocator_allocate(block->head_mem_block, get_block_nr(block));
- uint8_t *new_ptr = codeblock_allocator_get_ptr(new_block);
- uint32_t offset = (uintptr_t)new_ptr - (uintptr_t)&block_write_data[block_pos];
-
- if (!offset_is_26bit(offset))
- fatal("codegen_allocate_new_block - offset out of range %x\n", offset);
- /*Add a jump instruction to the new block*/
- *(uint32_t *)&block_write_data[block_pos] = OPCODE_B | OFFSET26(offset);
-
- /*Set write address to start of new block*/
- block_pos = 0;
- block_write_data = new_ptr;
-}
-
-void codegen_alloc(codeblock_t *block, int size)
-{
- if (block_pos >= (BLOCK_MAX-size))
- codegen_allocate_new_block(block);
-}
-
-void host_arm64_ADD_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data)
-{
- if (!imm_data)
- host_arm64_MOV_REG(block, dst_reg, src_n_reg, 0);
- else if ((int32_t)imm_data < 0 && imm_data != 0x80000000)
- {
- host_arm64_SUB_IMM(block, dst_reg, src_n_reg, -(int32_t)imm_data);
- }
- else if (!(imm_data & 0xff000000))
- {
- if (imm_data & 0xfff)
- {
- codegen_addlong(block, OPCODE_ADD_IMM | Rd(dst_reg) | Rn(src_n_reg) | IMM12(imm_data & 0xfff) | DATPROC_IMM_SHIFT(0));
- if (imm_data & 0xfff000)
- codegen_addlong(block, OPCODE_ADD_IMM | Rd(dst_reg) | Rn(dst_reg) | IMM12((imm_data >> 12) & 0xfff) | DATPROC_IMM_SHIFT(1));
- }
- else if (imm_data & 0xfff000)
- codegen_addlong(block, OPCODE_ADD_IMM | Rd(dst_reg) | Rn(src_n_reg) | IMM12((imm_data >> 12) & 0xfff) | DATPROC_IMM_SHIFT(1));
- }
- else
- {
- host_arm64_MOVZ_IMM(block, REG_W16, imm_data & 0xffff);
- host_arm64_MOVK_IMM(block, REG_W16, imm_data & 0xffff0000);
- codegen_addlong(block, OPCODE_ADD_LSL | Rd(dst_reg) | Rn(src_n_reg) | Rm(REG_W16) | DATPROC_SHIFT(0));
- }
-}
-void host_arm64_ADDX_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint64_t imm_data)
-{
- if (!(imm_data & ~0xffffffull))
- {
- if (imm_data & 0xfff)
- {
- codegen_addlong(block, OPCODE_ADDX_IMM | Rd(dst_reg) | Rn(src_n_reg) | IMM12(imm_data & 0xfff) | DATPROC_IMM_SHIFT(0));
- if (imm_data & 0xfff000)
- codegen_addlong(block, OPCODE_ADDX_IMM | Rd(dst_reg) | Rn(dst_reg) | IMM12((imm_data >> 12) & 0xfff) | DATPROC_IMM_SHIFT(1));
- }
- else if (imm_data & 0xfff000)
- codegen_addlong(block, OPCODE_ADDX_IMM | Rd(dst_reg) | Rn(src_n_reg) | IMM12((imm_data >> 12) & 0xfff) | DATPROC_IMM_SHIFT(1));
- }
- else
- fatal("ADD_IMM_X %016llx\n", imm_data);
-}
-void host_arm64_ADD_REG(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift)
-{
- codegen_addlong(block, OPCODE_ADD_LSL | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg) | DATPROC_SHIFT(shift));
-}
-void host_arm64_ADD_REG_LSR(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift)
-{
- codegen_addlong(block, OPCODE_ADD_LSR | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg) | DATPROC_SHIFT(shift));
-}
-void host_arm64_ADD_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_ADD_V8B | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_ADD_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_ADD_V4H | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_ADD_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_ADD_V2S | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-void host_arm64_ADDP_V4S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_ADDP_V4S | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-void host_arm64_ADR(codeblock_t *block, int dst_reg, int offset)
-{
- codegen_addlong(block, OPCODE_ADR | Rd(dst_reg) | OFFSET20(offset));
-}
-
-void host_arm64_AND_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data)
-{
- uint32_t imm_encoding = host_arm64_find_imm(imm_data);
-
- if (imm_encoding)
- {
- codegen_addlong(block, OPCODE_AND_IMM | Rd(dst_reg) | Rn(src_n_reg) | IMM_LOGICAL(imm_encoding));
- }
- else
- {
- host_arm64_mov_imm(block, REG_W16, imm_data);
- codegen_addlong(block, OPCODE_AND_LSL | Rd(dst_reg) | Rn(src_n_reg) | Rm(REG_W16) | DATPROC_SHIFT(0));
- }
-}
-void host_arm64_AND_REG(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift)
-{
- codegen_addlong(block, OPCODE_AND_LSL | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg) | DATPROC_SHIFT(shift));
-}
-void host_arm64_AND_REG_ASR(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift)
-{
- codegen_addlong(block, OPCODE_AND_ASR | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg) | DATPROC_SHIFT(shift));
-}
-void host_arm64_AND_REG_ROR(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift)
-{
- codegen_addlong(block, OPCODE_AND_ROR | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg) | DATPROC_SHIFT(shift));
-}
-void host_arm64_AND_REG_V(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_AND_V | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-void host_arm64_ANDS_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data)
-{
- uint32_t imm_encoding = host_arm64_find_imm(imm_data);
-
- if (imm_encoding)
- {
- codegen_addlong(block, OPCODE_ANDS_IMM | Rd(dst_reg) | Rn(src_n_reg) | IMM_LOGICAL(imm_encoding));
- }
- else
- {
- host_arm64_mov_imm(block, REG_W16, imm_data);
- codegen_addlong(block, OPCODE_ANDS_LSL | Rd(dst_reg) | Rn(src_n_reg) | Rm(REG_W16) | DATPROC_SHIFT(0));
- }
-}
-
-void host_arm64_ASR(codeblock_t *block, int dst_reg, int src_n_reg, int shift_reg)
-{
- codegen_addlong(block, OPCODE_ASR | Rd(dst_reg) | Rn(src_n_reg) | Rm(shift_reg));
-}
-
-void host_arm64_B(codeblock_t *block, void *dest)
-{
- int offset;
-
- codegen_alloc(block, 4);
- offset = (uintptr_t)dest - (uintptr_t)&block_write_data[block_pos];
-
- if (!offset_is_26bit(offset))
- fatal("host_arm64_B - offset out of range %x\n", offset);
- codegen_addlong(block, OPCODE_B | OFFSET26(offset));
-}
-
-void host_arm64_BFI(codeblock_t *block, int dst_reg, int src_reg, int lsb, int width)
-{
- codegen_addlong(block, OPCODE_BFI | Rd(dst_reg) | Rn(src_reg) | IMMN(0) | IMMR((32 - lsb) & 31) | IMMS((width-1) & 31));
-}
-
-void host_arm64_BLR(codeblock_t *block, int addr_reg)
-{
- codegen_addlong(block, OPCODE_BLR | Rn(addr_reg));
-}
-
-uint32_t *host_arm64_BCC_(codeblock_t *block)
-{
- codegen_alloc(block, 12);
- codegen_addlong(block, OPCODE_BCOND | COND_CS | OFFSET19(8));
- codegen_addlong(block, OPCODE_B);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_arm64_BCS_(codeblock_t *block)
-{
- codegen_alloc(block, 12);
- codegen_addlong(block, OPCODE_BCOND | COND_CC | OFFSET19(8));
- codegen_addlong(block, OPCODE_B);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_arm64_BEQ_(codeblock_t *block)
-{
- codegen_alloc(block, 12);
- codegen_addlong(block, OPCODE_BCOND | COND_NE | OFFSET19(8));
- codegen_addlong(block, OPCODE_B);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_arm64_BGE_(codeblock_t *block)
-{
- codegen_alloc(block, 12);
- codegen_addlong(block, OPCODE_BCOND | COND_LT | OFFSET19(8));
- codegen_addlong(block, OPCODE_B);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_arm64_BGT_(codeblock_t *block)
-{
- codegen_alloc(block, 12);
- codegen_addlong(block, OPCODE_BCOND | COND_LE | OFFSET19(8));
- codegen_addlong(block, OPCODE_B);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_arm64_BHI_(codeblock_t *block)
-{
- codegen_alloc(block, 12);
- codegen_addlong(block, OPCODE_BCOND | COND_LS | OFFSET19(8));
- codegen_addlong(block, OPCODE_B);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_arm64_BLE_(codeblock_t *block)
-{
- codegen_alloc(block, 12);
- codegen_addlong(block, OPCODE_BCOND | COND_GT | OFFSET19(8));
- codegen_addlong(block, OPCODE_B);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_arm64_BLS_(codeblock_t *block)
-{
- codegen_alloc(block, 12);
- codegen_addlong(block, OPCODE_BCOND | COND_HI | OFFSET19(8));
- codegen_addlong(block, OPCODE_B);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_arm64_BLT_(codeblock_t *block)
-{
- codegen_alloc(block, 12);
- codegen_addlong(block, OPCODE_BCOND | COND_GE | OFFSET19(8));
- codegen_addlong(block, OPCODE_B);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_arm64_BMI_(codeblock_t *block)
-{
- codegen_alloc(block, 12);
- codegen_addlong(block, OPCODE_BCOND | COND_PL | OFFSET19(8));
- codegen_addlong(block, OPCODE_B);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_arm64_BNE_(codeblock_t *block)
-{
- codegen_alloc(block, 12);
- codegen_addlong(block, OPCODE_BCOND | COND_EQ | OFFSET19(8));
- codegen_addlong(block, OPCODE_B);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_arm64_BPL_(codeblock_t *block)
-{
- codegen_alloc(block, 12);
- codegen_addlong(block, OPCODE_BCOND | COND_MI | OFFSET19(8));
- codegen_addlong(block, OPCODE_B);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_arm64_BVC_(codeblock_t *block)
-{
- codegen_alloc(block, 12);
- codegen_addlong(block, OPCODE_BCOND | COND_VS | OFFSET19(8));
- codegen_addlong(block, OPCODE_B);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_arm64_BVS_(codeblock_t *block)
-{
- codegen_alloc(block, 12);
- codegen_addlong(block, OPCODE_BCOND | COND_VC | OFFSET19(8));
- codegen_addlong(block, OPCODE_B);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-
-void host_arm64_branch_set_offset(uint32_t *opcode, void *dest)
-{
- int offset = (uintptr_t)dest - (uintptr_t)opcode;
- *opcode |= OFFSET26(offset);
-}
-
-void host_arm64_BR(codeblock_t *block, int addr_reg)
-{
- codegen_addlong(block, OPCODE_BR | Rn(addr_reg));
-}
-
-void host_arm64_BEQ(codeblock_t *block, void *dest)
-{
- uint32_t *opcode = host_arm64_BEQ_(block);
- host_arm64_branch_set_offset(opcode, dest);
-}
-
-void host_arm64_BIC_REG_V(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_BIC_V | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-void host_arm64_CBNZ(codeblock_t *block, int reg, uintptr_t dest)
-{
- int offset;
-
- codegen_alloc(block, 4);
- offset = dest - (uintptr_t)&block_write_data[block_pos];
- if (offset_is_19bit(offset))
- {
- codegen_addlong(block, OPCODE_CBNZ | OFFSET19(offset) | Rt(reg));
- }
- else
- {
- codegen_alloc(block, 12);
- codegen_addlong(block, OPCODE_CBZ | OFFSET19(8) | Rt(reg));
- offset = (uintptr_t)dest - (uintptr_t)&block_write_data[block_pos];
- codegen_addlong(block, OPCODE_B | OFFSET26(offset));
- }
-}
-
-void host_arm64_CMEQ_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_CMEQ_V8B | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_CMEQ_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_CMEQ_V4H | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_CMEQ_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_CMEQ_V2S | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_CMGT_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_CMGT_V8B | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_CMGT_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_CMGT_V4H | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_CMGT_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_CMGT_V2S | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-void host_arm64_CMN_IMM(codeblock_t *block, int src_n_reg, uint32_t imm_data)
-{
- if ((int32_t)imm_data < 0 && imm_data != (1ull << 31))
- {
- host_arm64_CMP_IMM(block, src_n_reg, -(int32_t)imm_data);
- }
- else if (!(imm_data & 0xfffff000))
- {
- codegen_addlong(block, OPCODE_CMN_IMM | Rd(REG_WZR) | Rn(src_n_reg) | IMM12(imm_data & 0xfff) | DATPROC_IMM_SHIFT(0));
- }
- else
- fatal("CMN_IMM %08x\n", imm_data);
-}
-void host_arm64_CMNX_IMM(codeblock_t *block, int src_n_reg, uint64_t imm_data)
-{
- if ((int64_t)imm_data < 0 && imm_data != (1ull << 63))
- {
- host_arm64_CMPX_IMM(block, src_n_reg, -(int64_t)imm_data);
- }
- else if (!(imm_data & 0xfffffffffffff000ull))
- {
- codegen_addlong(block, OPCODE_CMNX_IMM | Rd(REG_XZR) | Rn(src_n_reg) | IMM12(imm_data & 0xfff) | DATPROC_IMM_SHIFT(0));
- }
- else
- fatal("CMNX_IMM %08x\n", imm_data);
-}
-
-void host_arm64_CMP_IMM(codeblock_t *block, int src_n_reg, uint32_t imm_data)
-{
- if ((int32_t)imm_data < 0 && imm_data != (1ull << 31))
- {
- host_arm64_CMN_IMM(block, src_n_reg, -(int32_t)imm_data);
- }
- else if (!(imm_data & 0xfffff000))
- {
- codegen_addlong(block, OPCODE_CMP_IMM | Rd(REG_WZR) | Rn(src_n_reg) | IMM12(imm_data & 0xfff) | DATPROC_IMM_SHIFT(0));
- }
- else
- fatal("CMP_IMM %08x\n", imm_data);
-}
-void host_arm64_CMPX_IMM(codeblock_t *block, int src_n_reg, uint64_t imm_data)
-{
- if ((int64_t)imm_data < 0 && imm_data != (1ull << 63))
- {
- host_arm64_CMNX_IMM(block, src_n_reg, -(int64_t)imm_data);
- }
- else if (!(imm_data & 0xfffffffffffff000ull))
- {
- codegen_addlong(block, OPCODE_CMPX_IMM | Rd(REG_XZR) | Rn(src_n_reg) | IMM12(imm_data & 0xfff) | DATPROC_IMM_SHIFT(0));
- }
- else
- fatal("CMPX_IMM %08x\n", imm_data);
-}
-
-void host_arm64_CMP_REG_LSL(codeblock_t *block, int src_n_reg, int src_m_reg, int shift)
-{
- codegen_addlong(block, OPCODE_CMP_LSL | Rd(0x1f) | Rn(src_n_reg) | Rm(src_m_reg) | DATPROC_SHIFT(shift));
-}
-
-void host_arm64_CSEL_CC(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_CSEL | CSEL_COND(COND_CC) | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_CSEL_EQ(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_CSEL | CSEL_COND(COND_EQ) | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_CSEL_VS(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_CSEL | CSEL_COND(COND_VS) | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-void host_arm64_DUP_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int element)
-{
- codegen_addlong(block, OPCODE_DUP_V2S | Rd(dst_reg) | Rn(src_n_reg) | DUP_ELEMENT(element));
-}
-
-void host_arm64_EOR_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data)
-{
- uint32_t imm_encoding = host_arm64_find_imm(imm_data);
-
- if (imm_encoding)
- {
- codegen_addlong(block, OPCODE_EOR_IMM | Rd(dst_reg) | Rn(src_n_reg) | IMM_LOGICAL(imm_encoding));
- }
- else
- {
- host_arm64_mov_imm(block, REG_W16, imm_data);
- codegen_addlong(block, OPCODE_EOR_LSL | Rd(dst_reg) | Rn(src_n_reg) | Rm(REG_W16) | DATPROC_SHIFT(0));
- }
-}
-void host_arm64_EOR_REG(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift)
-{
- codegen_addlong(block, OPCODE_EOR_LSL | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg) | DATPROC_SHIFT(shift));
-}
-void host_arm64_EOR_REG_V(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_EOR_V | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-void host_arm64_FABS_D(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FABS_D | Rd(dst_reg) | Rn(src_reg));
-}
-
-void host_arm64_FADD_D(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_FADD_D | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_FADD_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_FADD_V2S | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_FCMEQ_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_FCMEQ_V2S | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_FCMGE_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_FCMGE_V2S | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_FCMGT_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_FCMGT_V2S | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-void host_arm64_FCMP_D(codeblock_t *block, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_FCMP_D | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-void host_arm64_FCVT_D_S(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FCVT_D_S | Rd(dst_reg) | Rn(src_reg));
-}
-void host_arm64_FCVT_S_D(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FCVT_S_D | Rd(dst_reg) | Rn(src_reg));
-}
-
-void host_arm64_FCVTMS_W_D(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FCVTMS_W_D | Rd(dst_reg) | Rn(src_reg));
-}
-void host_arm64_FCVTMS_X_D(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FCVTMS_X_D | Rd(dst_reg) | Rn(src_reg));
-}
-void host_arm64_FCVTNS_W_D(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FCVTNS_W_D | Rd(dst_reg) | Rn(src_reg));
-}
-void host_arm64_FCVTNS_X_D(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FCVTNS_X_D | Rd(dst_reg) | Rn(src_reg));
-}
-void host_arm64_FCVTPS_W_D(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FCVTPS_W_D | Rd(dst_reg) | Rn(src_reg));
-}
-void host_arm64_FCVTPS_X_D(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FCVTPS_X_D | Rd(dst_reg) | Rn(src_reg));
-}
-void host_arm64_FCVTZS_W_D(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FCVTZS_W_D | Rd(dst_reg) | Rn(src_reg));
-}
-void host_arm64_FCVTZS_X_D(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FCVTZS_X_D | Rd(dst_reg) | Rn(src_reg));
-}
-void host_arm64_FCVTZS_V2S(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FCVTZS_V2S | Rd(dst_reg) | Rn(src_reg));
-}
-
-void host_arm64_FDIV_D(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_FDIV_D | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_FDIV_S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_FDIV_S | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-void host_arm64_FMAX_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_FMAX_V2S | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_FMIN_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_FMIN_V2S | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-void host_arm64_FMUL_D(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_FMUL_D | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_FMUL_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_FMUL_V2S | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-void host_arm64_FSUB_D(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_FSUB_D | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_FSUB_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_FSUB_V2S | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-void host_arm64_FMOV_D_D(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FMOV_D_D | Rd(dst_reg) | Rn(src_reg));
-}
-void host_arm64_FMOV_D_Q(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FMOV_D_Q | Rd(dst_reg) | Rn(src_reg));
-}
-void host_arm64_FMOV_Q_D(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FMOV_Q_D | Rd(dst_reg) | Rn(src_reg));
-}
-void host_arm64_FMOV_S_W(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FMOV_S_W | Rd(dst_reg) | Rn(src_reg));
-}
-void host_arm64_FMOV_W_S(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FMOV_W_S | Rd(dst_reg) | Rn(src_reg));
-}
-void host_arm64_FMOV_S_ONE(codeblock_t *block, int dst_reg)
-{
- codegen_addlong(block, OPCODE_FMOV_S_ONE | Rd(dst_reg));
-}
-
-void host_arm64_FNEG_D(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FNEG_D | Rd(dst_reg) | Rn(src_reg));
-}
-
-void host_arm64_FRINTX_D(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FRINTX_D | Rd(dst_reg) | Rn(src_reg));
-}
-
-void host_arm64_FSQRT_D(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FSQRT_D | Rd(dst_reg) | Rn(src_reg));
-}
-void host_arm64_FSQRT_S(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_FSQRT_S | Rd(dst_reg) | Rn(src_reg));
-}
-
-void host_arm64_LDP_POSTIDX_X(codeblock_t *block, int src_reg1, int src_reg2, int base_reg, int offset)
-{
- if (!in_range7_x(offset))
- fatal("host_arm64_LDP_POSTIDX out of range7 %i\n", offset);
- codegen_addlong(block, OPCODE_LDP_POSTIDX_X | IMM7_X(offset) | Rn(base_reg) | Rt(src_reg1) | Rt2(src_reg2));
-}
-
-void host_arm64_LDR_IMM_W(codeblock_t *block, int dest_reg, int base_reg, int offset)
-{
- if (!in_range12_w(offset))
- fatal("host_arm64_LDR_IMM_W out of range12 %i\n", offset);
- codegen_addlong(block, OPCODE_LDR_IMM_W | OFFSET12_W(offset) | Rn(base_reg) | Rt(dest_reg));
-}
-void host_arm64_LDR_IMM_X(codeblock_t *block, int dest_reg, int base_reg, int offset)
-{
- if (!in_range12_q(offset))
- fatal("host_arm64_LDR_IMM_X out of range12 %i\n", offset);
- codegen_addlong(block, OPCODE_LDR_IMM_X | OFFSET12_Q(offset) | Rn(base_reg) | Rt(dest_reg));
-}
-
-void host_arm64_LDR_REG(codeblock_t *block, int dest_reg, int base_reg, int offset_reg)
-{
- codegen_addlong(block, OPCODE_LDR_REG | Rn(base_reg) | Rm(offset_reg) | Rt(dest_reg));
-}
-void host_arm64_LDR_REG_X(codeblock_t *block, int dest_reg, int base_reg, int offset_reg)
-{
- codegen_addlong(block, OPCODE_LDRX_REG | Rn(base_reg) | Rm(offset_reg) | Rt(dest_reg));
-}
-
-void host_arm64_LDR_REG_F32(codeblock_t *block, int dest_reg, int base_reg, int offset_reg)
-{
- codegen_addlong(block, OPCODE_LDR_REG_F32 | Rn(base_reg) | Rm(offset_reg) | Rt(dest_reg));
-}
-void host_arm64_LDR_IMM_F64(codeblock_t *block, int dest_reg, int base_reg, int offset)
-{
- codegen_addlong(block, OPCODE_LDR_IMM_F64 | OFFSET12_Q(offset) | Rn(base_reg) | Rt(dest_reg));
-}
-void host_arm64_LDR_REG_F64(codeblock_t *block, int dest_reg, int base_reg, int offset_reg)
-{
- codegen_addlong(block, OPCODE_LDR_REG_F64 | Rn(base_reg) | Rm(offset_reg) | Rt(dest_reg));
-}
-void host_arm64_LDR_REG_F64_S(codeblock_t *block, int dest_reg, int base_reg, int offset_reg)
-{
- codegen_addlong(block, OPCODE_LDR_REG_F64_S | Rn(base_reg) | Rm(offset_reg) | Rt(dest_reg));
-}
-
-void host_arm64_LDRB_IMM_W(codeblock_t *block, int dest_reg, int base_reg, int offset)
-{
- if (!in_range12_b(offset))
- fatal("host_arm64_LDRB_IMM_W out of range12 %i\n", offset);
- codegen_addlong(block, OPCODE_LDRB_IMM_W | OFFSET12_B(offset) | Rn(base_reg) | Rt(dest_reg));
-}
-void host_arm64_LDRB_REG(codeblock_t *block, int dest_reg, int base_reg, int offset_reg)
-{
- codegen_addlong(block, OPCODE_LDRB_REG | Rn(base_reg) | Rm(offset_reg) | Rt(dest_reg));
-}
-
-void host_arm64_LDRH_IMM(codeblock_t *block, int dest_reg, int base_reg, int offset)
-{
- if (!in_range12_h(offset))
- fatal("host_arm64_LDRH_IMM out of range12 %i\n", offset);
- codegen_addlong(block, OPCODE_LDRH_IMM | OFFSET12_H(offset) | Rn(base_reg) | Rt(dest_reg));
-}
-void host_arm64_LDRH_REG(codeblock_t *block, int dest_reg, int base_reg, int offset_reg)
-{
- codegen_addlong(block, OPCODE_LDRH_REG | Rn(base_reg) | Rm(offset_reg) | Rt(dest_reg));
-}
-
-void host_arm64_LDRX_REG_LSL3(codeblock_t *block, int dest_reg, int base_reg, int offset_reg)
-{
- codegen_addlong(block, OPCODE_LDRX_REG_LSL3 | Rn(base_reg) | Rm(offset_reg) | Rt(dest_reg));
-}
-
-void host_arm64_LSL(codeblock_t *block, int dst_reg, int src_n_reg, int shift_reg)
-{
- codegen_addlong(block, OPCODE_LSL | Rd(dst_reg) | Rn(src_n_reg) | Rm(shift_reg));
-}
-
-void host_arm64_LSR(codeblock_t *block, int dst_reg, int src_n_reg, int shift_reg)
-{
- codegen_addlong(block, OPCODE_LSR | Rd(dst_reg) | Rn(src_n_reg) | Rm(shift_reg));
-}
-
-void host_arm64_MOV_REG_ASR(codeblock_t *block, int dst_reg, int src_m_reg, int shift)
-{
- codegen_addlong(block, OPCODE_ORR_ASR | Rd(dst_reg) | Rn(REG_WZR) | Rm(src_m_reg) | DATPROC_SHIFT(shift));
-}
-
-void host_arm64_MOV_REG(codeblock_t *block, int dst_reg, int src_m_reg, int shift)
-{
- if (dst_reg != src_m_reg || shift)
- codegen_addlong(block, OPCODE_ORR_LSL | Rd(dst_reg) | Rn(REG_WZR) | Rm(src_m_reg) | DATPROC_SHIFT(shift));
-}
-
-void host_arm64_MOV_REG_LSR(codeblock_t *block, int dst_reg, int src_m_reg, int shift)
-{
- codegen_addlong(block, OPCODE_ORR_LSR | Rd(dst_reg) | Rn(REG_WZR) | Rm(src_m_reg) | DATPROC_SHIFT(shift));
-}
-void host_arm64_MOV_REG_ROR(codeblock_t *block, int dst_reg, int src_m_reg, int shift)
-{
- codegen_addlong(block, OPCODE_ORR_ROR | Rd(dst_reg) | Rn(REG_WZR) | Rm(src_m_reg) | DATPROC_SHIFT(shift));
-}
-
-void host_arm64_MOVX_IMM(codeblock_t *block, int reg, uint64_t imm_data)
-{
- codegen_addlong(block, OPCODE_MOVZ_X | MOV_WIDE_HW(0) | IMM16(imm_data & 0xffff) | Rd(reg));
- if ((imm_data >> 16) & 0xffff)
- codegen_addlong(block, OPCODE_MOVK_X | MOV_WIDE_HW(1) | IMM16((imm_data >> 16) & 0xffff) | Rd(reg));
- if ((imm_data >> 32) & 0xffff)
- codegen_addlong(block, OPCODE_MOVK_X | MOV_WIDE_HW(2) | IMM16((imm_data >> 32) & 0xffff) | Rd(reg));
- if ((imm_data >> 48) & 0xffff)
- codegen_addlong(block, OPCODE_MOVK_X | MOV_WIDE_HW(3) | IMM16((imm_data >> 48) & 0xffff) | Rd(reg));
-}
-void host_arm64_MOVX_REG(codeblock_t *block, int dst_reg, int src_m_reg, int shift)
-{
- if (dst_reg != src_m_reg)
- codegen_addlong(block, OPCODE_ORRX_LSL | Rd(dst_reg) | Rn(REG_XZR) | Rm(src_m_reg) | DATPROC_SHIFT(shift));
-}
-
-void host_arm64_MOVZ_IMM(codeblock_t *block, int reg, uint32_t imm_data)
-{
- int hw;
-
- if (!imm_is_imm16(imm_data))
- fatal("MOVZ_IMM - imm not representable %08x\n", imm_data);
-
- hw = (imm_data & 0xffff0000) ? 1 : 0;
- if (hw)
- imm_data >>= 16;
-
- codegen_addlong(block, OPCODE_MOVZ_W | MOV_WIDE_HW(hw) | IMM16(imm_data) | Rd(reg));
-}
-
-void host_arm64_MOVK_IMM(codeblock_t *block, int reg, uint32_t imm_data)
-{
- int hw;
-
- if (!imm_is_imm16(imm_data))
- fatal("MOVK_IMM - imm not representable %08x\n", imm_data);
-
- hw = (imm_data & 0xffff0000) ? 1 : 0;
- if (hw)
- imm_data >>= 16;
-
- codegen_addlong(block, OPCODE_MOVK_W | MOV_WIDE_HW(hw) | IMM16(imm_data) | Rd(reg));
-}
-
-void host_arm64_MSR_FPCR(codeblock_t *block, int src_reg)
-{
- codegen_addlong(block, OPCODE_MSR_FPCR | Rd(src_reg));
-}
-
-void host_arm64_MUL_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_MUL_V4H | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-void host_arm64_NOP(codeblock_t *block)
-{
- codegen_addlong(block, OPCODE_NOP);
-}
-
-void host_arm64_ORR_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data)
-{
- uint32_t imm_encoding = host_arm64_find_imm(imm_data);
-
- if (imm_encoding)
- {
- codegen_addlong(block, OPCODE_ORR_IMM | Rd(dst_reg) | Rn(src_n_reg) | IMM_LOGICAL(imm_encoding));
- }
- else
- {
- host_arm64_mov_imm(block, REG_W16, imm_data);
- codegen_addlong(block, OPCODE_ORR_LSL | Rd(dst_reg) | Rn(src_n_reg) | Rm(REG_W16) | DATPROC_SHIFT(0));
- }
-}
-void host_arm64_ORR_REG(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift)
-{
- codegen_addlong(block, OPCODE_ORR_LSL | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg) | DATPROC_SHIFT(shift));
-}
-void host_arm64_ORR_REG_V(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_ORR_V | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-void host_arm64_RET(codeblock_t *block, int reg)
-{
- codegen_addlong(block, OPCODE_RET | Rn(reg));
-}
-
-void host_arm64_ROR(codeblock_t *block, int dst_reg, int src_n_reg, int shift_reg)
-{
- codegen_addlong(block, OPCODE_ROR | Rd(dst_reg) | Rn(src_n_reg) | Rm(shift_reg));
-}
-
-void host_arm64_SADDLP_V2S_4H(codeblock_t *block, int dst_reg, int src_n_reg)
-{
- codegen_addlong(block, OPCODE_SADDLP_V2S_4H | Rd(dst_reg) | Rn(src_n_reg));
-}
-
-void host_arm64_SBFX(codeblock_t *block, int dst_reg, int src_reg, int lsb, int width)
-{
- codegen_addlong(block, OPCODE_SBFX | Rd(dst_reg) | Rn(src_reg) | IMMN(0) | IMMR(lsb) | IMMS((lsb+width-1) & 31));
-}
-
-void host_arm64_SCVTF_D_Q(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_SCVTF_D_Q | Rd(dst_reg) | Rn(src_reg));
-}
-void host_arm64_SCVTF_D_W(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_SCVTF_D_W | Rd(dst_reg) | Rn(src_reg));
-}
-
-void host_arm64_SCVTF_V2S(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_SCVTF_V2S | Rd(dst_reg) | Rn(src_reg));
-}
-
-void host_arm64_SHRN_V4H_4S(codeblock_t *block, int dst_reg, int src_n_reg, int shift)
-{
- if (shift > 16)
- fatal("host_arm64_SHRN_V4H_4S : shift > 16\n");
- codegen_addlong(block, OPCODE_SHRN | Rd(dst_reg) | Rn(src_n_reg) | SHRN_SHIFT_IMM_V4S(16-shift));
-}
-
-void host_arm64_SMULL_V4S_4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_SMULL_V4S_4H | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-void host_arm64_SQADD_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_SQADD_V8B | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_SQADD_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_SQADD_V4H | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_SQSUB_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_SQSUB_V8B | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_SQSUB_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_SQSUB_V4H | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-void host_arm64_SQXTN_V8B_8H(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_SQXTN_V8B_8H | Rd(dst_reg) | Rn(src_reg));
-}
-void host_arm64_SQXTN_V4H_4S(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_SQXTN_V4H_4S | Rd(dst_reg) | Rn(src_reg));
-}
-
-void host_arm64_SHL_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int shift)
-{
- codegen_addlong(block, OPCODE_SHL_VD | Rd(dst_reg) | Rn(src_n_reg) | SHIFT_IMM_V4H(shift));
-}
-void host_arm64_SHL_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int shift)
-{
- codegen_addlong(block, OPCODE_SHL_VD | Rd(dst_reg) | Rn(src_n_reg) | SHIFT_IMM_V2S(shift));
-}
-void host_arm64_SHL_V2D(codeblock_t *block, int dst_reg, int src_n_reg, int shift)
-{
- codegen_addlong(block, OPCODE_SHL_VQ | Rd(dst_reg) | Rn(src_n_reg) | SHIFT_IMM_V2D(shift));
-}
-
-void host_arm64_SSHR_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int shift)
-{
- if (shift > 16)
- fatal("host_arm_USHR_V4H : shift > 16\n");
- codegen_addlong(block, OPCODE_SSHR_VD | Rd(dst_reg) | Rn(src_n_reg) | SHIFT_IMM_V4H(16-shift));
-}
-void host_arm64_SSHR_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int shift)
-{
- if (shift > 32)
- fatal("host_arm_SSHR_V2S : shift > 32\n");
- codegen_addlong(block, OPCODE_SSHR_VD | Rd(dst_reg) | Rn(src_n_reg) | SHIFT_IMM_V2S(32-shift));
-}
-void host_arm64_SSHR_V2D(codeblock_t *block, int dst_reg, int src_n_reg, int shift)
-{
- if (shift > 64)
- fatal("host_arm_SSHR_V2D : shift > 64\n");
- codegen_addlong(block, OPCODE_SSHR_VQ | Rd(dst_reg) | Rn(src_n_reg) | SHIFT_IMM_V2D(64-shift));
-}
-
-void host_arm64_STP_PREIDX_X(codeblock_t *block, int src_reg1, int src_reg2, int base_reg, int offset)
-{
- if (!in_range7_x(offset))
- fatal("host_arm64_STP_PREIDX out of range7 %i\n", offset);
- codegen_addlong(block, OPCODE_STP_PREIDX_X | IMM7_X(offset) | Rn(base_reg) | Rt(src_reg1) | Rt2(src_reg2));
-}
-
-void host_arm64_STR_IMM_W(codeblock_t *block, int dest_reg, int base_reg, int offset)
-{
- if (!in_range12_w(offset))
- fatal("host_arm64_STR_IMM_W out of range12 %i\n", offset);
- codegen_addlong(block, OPCODE_STR_IMM_W | OFFSET12_W(offset) | Rn(base_reg) | Rt(dest_reg));
-}
-void host_arm64_STR_IMM_Q(codeblock_t *block, int dest_reg, int base_reg, int offset)
-{
- if (!in_range12_q(offset))
- fatal("host_arm64_STR_IMM_W out of range12 %i\n", offset);
- codegen_addlong(block, OPCODE_STR_IMM_Q | OFFSET12_Q(offset) | Rn(base_reg) | Rt(dest_reg));
-}
-void host_arm64_STR_REG(codeblock_t *block, int src_reg, int base_reg, int offset_reg)
-{
- codegen_addlong(block, OPCODE_STR_REG | Rn(base_reg) | Rm(offset_reg) | Rt(src_reg));
-}
-
-void host_arm64_STR_REG_F32(codeblock_t *block, int src_reg, int base_reg, int offset_reg)
-{
- codegen_addlong(block, OPCODE_STR_REG_F32 | Rn(base_reg) | Rm(offset_reg) | Rt(src_reg));
-}
-void host_arm64_STR_IMM_F64(codeblock_t *block, int src_reg, int base_reg, int offset)
-{
- codegen_addlong(block, OPCODE_STR_IMM_F64 | OFFSET12_Q(offset) | Rn(base_reg) | Rt(src_reg));
-}
-void host_arm64_STR_REG_F64(codeblock_t *block, int src_reg, int base_reg, int offset_reg)
-{
- codegen_addlong(block, OPCODE_STR_REG_F64 | Rn(base_reg) | Rm(offset_reg) | Rt(src_reg));
-}
-void host_arm64_STR_REG_F64_S(codeblock_t *block, int src_reg, int base_reg, int offset_reg)
-{
- codegen_addlong(block, OPCODE_STR_REG_F64_S | Rn(base_reg) | Rm(offset_reg) | Rt(src_reg));
-}
-
-void host_arm64_STRB_IMM(codeblock_t *block, int dest_reg, int base_reg, int offset)
-{
- if (!in_range12_b(offset))
- fatal("host_arm64_STRB_IMM out of range12 %i\n", offset);
- codegen_addlong(block, OPCODE_STRB_IMM | OFFSET12_B(offset) | Rn(base_reg) | Rt(dest_reg));
-}
-void host_arm64_STRB_REG(codeblock_t *block, int src_reg, int base_reg, int offset_reg)
-{
- codegen_addlong(block, OPCODE_STRB_REG | Rn(base_reg) | Rm(offset_reg) | Rt(src_reg));
-}
-
-void host_arm64_STRH_IMM(codeblock_t *block, int dest_reg, int base_reg, int offset)
-{
- if (!in_range12_h(offset))
- fatal("host_arm64_STRH_IMM out of range12 %i\n", offset);
- codegen_addlong(block, OPCODE_STRH_IMM | OFFSET12_H(offset) | Rn(base_reg) | Rt(dest_reg));
-}
-void host_arm64_STRH_REG(codeblock_t *block, int src_reg, int base_reg, int offset_reg)
-{
- codegen_addlong(block, OPCODE_STRH_REG | Rn(base_reg) | Rm(offset_reg) | Rt(src_reg));
-}
-
-void host_arm64_SUB_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data)
-{
- if (!imm_data)
- host_arm64_MOV_REG(block, dst_reg, src_n_reg, 0);
- else if ((int32_t)imm_data < 0 && imm_data != 0x80000000)
- {
- host_arm64_ADD_IMM(block, dst_reg, src_n_reg, -(int32_t)imm_data);
- }
- else if (!(imm_data & 0xff000000))
- {
- if (imm_data & 0xfff)
- {
- codegen_addlong(block, OPCODE_SUB_IMM | Rd(dst_reg) | Rn(src_n_reg) | IMM12(imm_data & 0xfff) | DATPROC_IMM_SHIFT(0));
- if (imm_data & 0xfff000)
- codegen_addlong(block, OPCODE_SUB_IMM | Rd(dst_reg) | Rn(dst_reg) | IMM12((imm_data >> 12) & 0xfff) | DATPROC_IMM_SHIFT(1));
- }
- else if (imm_data & 0xfff000)
- codegen_addlong(block, OPCODE_SUB_IMM | Rd(dst_reg) | Rn(src_n_reg) | IMM12((imm_data >> 12) & 0xfff) | DATPROC_IMM_SHIFT(1));
- }
- else
- {
- host_arm64_MOVZ_IMM(block, REG_W16, imm_data & 0xffff);
- host_arm64_MOVK_IMM(block, REG_W16, imm_data & 0xffff0000);
- codegen_addlong(block, OPCODE_SUB_LSL | Rd(dst_reg) | Rn(src_n_reg) | Rm(REG_W16) | DATPROC_SHIFT(0));
- }
-}
-void host_arm64_SUB_REG(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift)
-{
- codegen_addlong(block, OPCODE_SUB_LSL | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg) | DATPROC_SHIFT(shift));
-}
-void host_arm64_SUB_REG_LSR(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift)
-{
- codegen_addlong(block, OPCODE_SUB_LSR | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg) | DATPROC_SHIFT(shift));
-}
-void host_arm64_SUB_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_SUB_V8B | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_SUB_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_SUB_V4H | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_SUB_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_SUB_V2S | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-uint32_t *host_arm64_TBNZ(codeblock_t *block, int reg, int bit)
-{
- codegen_alloc(block, 12);
- codegen_addlong(block, OPCODE_TBZ | Rt(reg) | BIT_TBxZ(bit) | OFFSET14(8));
- codegen_addlong(block, OPCODE_B);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-
-void host_arm64_UBFX(codeblock_t *block, int dst_reg, int src_reg, int lsb, int width)
-{
- codegen_addlong(block, OPCODE_UBFX | Rd(dst_reg) | Rn(src_reg) | IMMN(0) | IMMR(lsb) | IMMS((lsb+width-1) & 31));
-}
-
-void host_arm64_UQADD_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_UQADD_V8B | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_UQADD_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_UQADD_V4H | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_UQSUB_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_UQSUB_V8B | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_UQSUB_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_UQSUB_V4H | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-void host_arm64_UQXTN_V8B_8H(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_UQXTN_V8B_8H | Rd(dst_reg) | Rn(src_reg));
-}
-void host_arm64_UQXTN_V4H_4S(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_UQXTN_V4H_4S | Rd(dst_reg) | Rn(src_reg));
-}
-
-void host_arm64_USHR_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int shift)
-{
- if (shift > 16)
- fatal("host_arm_USHR_V4H : shift > 16\n");
- codegen_addlong(block, OPCODE_USHR_VD | Rd(dst_reg) | Rn(src_n_reg) | SHIFT_IMM_V4H(16-shift));
-}
-void host_arm64_USHR_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int shift)
-{
- if (shift > 32)
- fatal("host_arm_USHR_V4S : shift > 32\n");
- codegen_addlong(block, OPCODE_USHR_VD | Rd(dst_reg) | Rn(src_n_reg) | SHIFT_IMM_V2S(32-shift));
-}
-void host_arm64_USHR_V2D(codeblock_t *block, int dst_reg, int src_n_reg, int shift)
-{
- if (shift > 64)
- fatal("host_arm_USHR_V2D : shift > 64\n");
- codegen_addlong(block, OPCODE_USHR_VQ | Rd(dst_reg) | Rn(src_n_reg) | SHIFT_IMM_V2D(64-shift));
-}
-
-void host_arm64_ZIP1_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_ZIP1_V8B | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_ZIP1_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_ZIP1_V4H | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_ZIP1_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_ZIP1_V2S | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_ZIP2_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_ZIP2_V8B | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_ZIP2_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_ZIP2_V4H | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-void host_arm64_ZIP2_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg)
-{
- codegen_addlong(block, OPCODE_ZIP2_V2S | Rd(dst_reg) | Rn(src_n_reg) | Rm(src_m_reg));
-}
-
-void host_arm64_call(codeblock_t *block, void *dst_addr)
-{
- host_arm64_MOVX_IMM(block, REG_X16, (uint64_t)dst_addr);
- host_arm64_BLR(block, REG_X16);
-}
-
-void host_arm64_jump(codeblock_t *block, uintptr_t dst_addr)
-{
- host_arm64_MOVX_IMM(block, REG_X16, (uint64_t)dst_addr);
- host_arm64_BR(block, REG_X16);
-}
-
-void host_arm64_mov_imm(codeblock_t *block, int reg, uint32_t imm_data)
-{
- if (imm_is_imm16(imm_data))
- host_arm64_MOVZ_IMM(block, reg, imm_data);
- else
- {
- host_arm64_MOVZ_IMM(block, reg, imm_data & 0xffff);
- host_arm64_MOVK_IMM(block, reg, imm_data & 0xffff0000);
- }
-}
-
-#endif
diff --git a/src/codegen_backend_arm64_ops.h b/src/codegen_backend_arm64_ops.h
deleted file mode 100644
index 2a514ed..0000000
--- a/src/codegen_backend_arm64_ops.h
+++ /dev/null
@@ -1,264 +0,0 @@
-void host_arm64_ADD_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data);
-void host_arm64_ADD_REG(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift);
-void host_arm64_ADD_REG_LSR(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift);
-void host_arm64_ADD_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_ADD_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_ADD_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_ADDX_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint64_t imm_data);
-
-void host_arm64_ADDP_V4S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-
-void host_arm64_ADR(codeblock_t *block, int dst_reg, int offset);
-
-void host_arm64_AND_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data);
-void host_arm64_AND_REG(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift);
-void host_arm64_AND_REG_ASR(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift);
-void host_arm64_AND_REG_ROR(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift);
-void host_arm64_AND_REG_V(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-
-void host_arm64_ANDS_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data);
-
-void host_arm64_ASR(codeblock_t *block, int dst_reg, int src_n_reg, int shift_reg);
-
-void host_arm64_B(codeblock_t *block, void *dest);
-
-void host_arm64_BFI(codeblock_t *block, int dst_reg, int src_reg, int lsb, int width);
-
-void host_arm64_BLR(codeblock_t *block, int addr_reg);
-
-void host_arm64_BEQ(codeblock_t *block, void *dest);
-
-uint32_t *host_arm64_BCC_(codeblock_t *block);
-uint32_t *host_arm64_BCS_(codeblock_t *block);
-uint32_t *host_arm64_BEQ_(codeblock_t *block);
-uint32_t *host_arm64_BGE_(codeblock_t *block);
-uint32_t *host_arm64_BGT_(codeblock_t *block);
-uint32_t *host_arm64_BHI_(codeblock_t *block);
-uint32_t *host_arm64_BLE_(codeblock_t *block);
-uint32_t *host_arm64_BLS_(codeblock_t *block);
-uint32_t *host_arm64_BLT_(codeblock_t *block);
-uint32_t *host_arm64_BMI_(codeblock_t *block);
-uint32_t *host_arm64_BNE_(codeblock_t *block);
-uint32_t *host_arm64_BPL_(codeblock_t *block);
-uint32_t *host_arm64_BVC_(codeblock_t *block);
-uint32_t *host_arm64_BVS_(codeblock_t *block);
-
-void host_arm64_branch_set_offset(uint32_t *opcode, void *dest);
-
-void host_arm64_BR(codeblock_t *block, int addr_reg);
-
-void host_arm64_BIC_REG_V(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-
-void host_arm64_CBNZ(codeblock_t *block, int reg, uintptr_t dest);
-
-void host_arm64_CMEQ_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_CMEQ_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_CMEQ_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_CMGT_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_CMGT_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_CMGT_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-
-void host_arm64_CMN_IMM(codeblock_t *block, int src_n_reg, uint32_t imm_data);
-void host_arm64_CMNX_IMM(codeblock_t *block, int src_n_reg, uint64_t imm_data);
-
-void host_arm64_CMP_IMM(codeblock_t *block, int src_n_reg, uint32_t imm_data);
-void host_arm64_CMPX_IMM(codeblock_t *block, int src_n_reg, uint64_t imm_data);
-
-#define host_arm64_CMP_REG(block, src_n_reg, src_m_reg) host_arm64_CMP_REG_LSL(block, src_n_reg, src_m_reg, 0)
-void host_arm64_CMP_REG_LSL(codeblock_t *block, int src_n_reg, int src_m_reg, int shift);
-
-void host_arm64_CSEL_CC(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_CSEL_EQ(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_CSEL_VS(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-
-void host_arm64_DUP_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int element);
-
-void host_arm64_EOR_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data);
-void host_arm64_EOR_REG(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift);
-void host_arm64_EOR_REG_V(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-
-void host_arm64_FABS_D(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_arm64_FADD_D(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_FADD_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_FCMEQ_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_FCMGE_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_FCMGT_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_FCMP_D(codeblock_t *block, int src_n_reg, int src_m_reg);
-void host_arm64_FDIV_D(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_FDIV_S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_FMAX_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_FMIN_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_FMUL_D(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_FMUL_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_FSUB_D(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_FSUB_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-
-void host_arm64_FCVT_D_S(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm64_FCVT_S_D(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_arm64_FCVTMS_W_D(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm64_FCVTMS_X_D(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm64_FCVTNS_W_D(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm64_FCVTNS_X_D(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm64_FCVTPS_W_D(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm64_FCVTPS_X_D(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm64_FCVTZS_W_D(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm64_FCVTZS_X_D(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm64_FCVTZS_V2S(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_arm64_FMOV_D_D(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm64_FMOV_D_Q(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm64_FMOV_Q_D(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm64_FMOV_S_W(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm64_FMOV_W_S(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm64_FMOV_S_ONE(codeblock_t *block, int dst_reg);
-
-void host_arm64_FNEG_D(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_arm64_FRINTX_D(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_arm64_FSQRT_D(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm64_FSQRT_S(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_arm64_LDP_POSTIDX_X(codeblock_t *block, int src_reg1, int src_reg2, int base_reg, int offset);
-
-void host_arm64_LDR_IMM_W(codeblock_t *block, int dest_reg, int base_reg, int offset);
-void host_arm64_LDR_IMM_X(codeblock_t *block, int dest_reg, int base_reg, int offset);
-void host_arm64_LDR_REG(codeblock_t *block, int dest_reg, int base_reg, int offset_reg);
-void host_arm64_LDR_REG_X(codeblock_t *block, int dest_reg, int base_reg, int offset_reg);
-
-void host_arm64_LDR_REG_F32(codeblock_t *block, int dest_reg, int base_reg, int offset_reg);
-void host_arm64_LDR_IMM_F64(codeblock_t *block, int dest_reg, int base_reg, int offset);
-void host_arm64_LDR_REG_F64(codeblock_t *block, int dest_reg, int base_reg, int offset_reg);
-void host_arm64_LDR_REG_F64_S(codeblock_t *block, int dest_reg, int base_reg, int offset_reg);
-
-void host_arm64_LDRB_IMM_W(codeblock_t *block, int dest_reg, int base_reg, int offset);
-void host_arm64_LDRB_REG(codeblock_t *block, int dest_reg, int base_reg, int offset_reg);
-
-void host_arm64_LDRH_IMM(codeblock_t *block, int dest_reg, int base_reg, int offset);
-void host_arm64_LDRH_REG(codeblock_t *block, int dest_reg, int base_reg, int offset_reg);
-
-void host_arm64_LDRX_REG_LSL3(codeblock_t *block, int dest_reg, int base_reg, int offset_reg);
-
-void host_arm64_LSL(codeblock_t *block, int dst_reg, int src_n_reg, int shift_reg);
-void host_arm64_LSR(codeblock_t *block, int dst_reg, int src_n_reg, int shift_reg);
-
-void host_arm64_MOV_REG_ASR(codeblock_t *block, int dst_reg, int src_m_reg, int shift);
-void host_arm64_MOV_REG(codeblock_t *block, int dst_reg, int src_m_reg, int shift);
-void host_arm64_MOV_REG_LSR(codeblock_t *block, int dst_reg, int src_m_reg, int shift);
-void host_arm64_MOV_REG_ROR(codeblock_t *block, int dst_reg, int src_m_reg, int shift);
-
-void host_arm64_MOVX_IMM(codeblock_t *block, int reg, uint64_t imm_data);
-void host_arm64_MOVX_REG(codeblock_t *block, int dst_reg, int src_m_reg, int shift);
-
-void host_arm64_MOVZ_IMM(codeblock_t *block, int reg, uint32_t imm_data);
-void host_arm64_MOVK_IMM(codeblock_t *block, int reg, uint32_t imm_data);
-
-void host_arm64_MSR_FPCR(codeblock_t *block, int src_reg);
-
-void host_arm64_MUL_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-
-void host_arm64_NOP(codeblock_t *block);
-
-void host_arm64_ORR_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data);
-void host_arm64_ORR_REG(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift);
-void host_arm64_ORR_REG_V(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-
-void host_arm64_RET(codeblock_t *block, int reg);
-
-void host_arm64_ROR(codeblock_t *block, int dst_reg, int src_n_reg, int shift_reg);
-
-void host_arm64_SADDLP_V2S_4H(codeblock_t *block, int dst_reg, int src_n_reg);
-
-void host_arm64_SBFX(codeblock_t *block, int dst_reg, int src_reg, int lsb, int width);
-
-void host_arm64_SCVTF_D_Q(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm64_SCVTF_D_W(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_arm64_SCVTF_V2S(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_arm64_SQADD_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_SQADD_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_SQSUB_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_SQSUB_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-
-void host_arm64_SQXTN_V8B_8H(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm64_SQXTN_V4H_4S(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_arm64_SHL_V4H(codeblock_t *block, int dst_reg, int src_reg, int shift);
-void host_arm64_SHL_V2S(codeblock_t *block, int dst_reg, int src_reg, int shift);
-void host_arm64_SHL_V2D(codeblock_t *block, int dst_reg, int src_reg, int shift);
-
-void host_arm64_SHRN_V4H_4S(codeblock_t *block, int dst_reg, int src_n_reg, int shift);
-
-void host_arm64_SMULL_V4S_4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-
-void host_arm64_SSHR_V4H(codeblock_t *block, int dst_reg, int src_reg, int shift);
-void host_arm64_SSHR_V2S(codeblock_t *block, int dst_reg, int src_reg, int shift);
-void host_arm64_SSHR_V2D(codeblock_t *block, int dst_reg, int src_reg, int shift);
-
-void host_arm64_STP_PREIDX_X(codeblock_t *block, int src_reg1, int src_reg2, int base_reg, int offset);
-
-void host_arm64_STR_IMM_W(codeblock_t *block, int dest_reg, int base_reg, int offset);
-void host_arm64_STR_IMM_Q(codeblock_t *block, int dest_reg, int base_reg, int offset);
-void host_arm64_STR_REG(codeblock_t *block, int src_reg, int base_reg, int offset_reg);
-
-void host_arm64_STR_REG_F32(codeblock_t *block, int src_reg, int base_reg, int offset_reg);
-void host_arm64_STR_IMM_F64(codeblock_t *block, int src_reg, int base_reg, int offset);
-void host_arm64_STR_REG_F64(codeblock_t *block, int src_reg, int base_reg, int offset_reg);
-void host_arm64_STR_REG_F64_S(codeblock_t *block, int src_reg, int base_reg, int offset_reg);
-
-void host_arm64_STRB_IMM(codeblock_t *block, int dest_reg, int base_reg, int offset);
-void host_arm64_STRB_REG(codeblock_t *block, int src_reg, int base_reg, int offset_reg);
-
-void host_arm64_STRH_IMM(codeblock_t *block, int dest_reg, int base_reg, int offset);
-void host_arm64_STRH_REG(codeblock_t *block, int src_reg, int base_reg, int offset_reg);
-
-void host_arm64_SUB_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint32_t imm_data);
-void host_arm64_SUB_REG(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift);
-void host_arm64_SUB_REG_LSR(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift);
-void host_arm64_SUB_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_SUB_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_SUB_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-
-uint32_t *host_arm64_TBNZ(codeblock_t *block, int reg, int bit);
-
-#define host_arm64_TST_IMM(block, src_n_reg, imm_data) host_arm64_ANDS_IMM(block, REG_XZR, src_n_reg, imm_data)
-
-void host_arm64_UBFX(codeblock_t *block, int dst_reg, int src_reg, int lsb, int width);
-
-void host_arm64_UQADD_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_UQADD_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_UQSUB_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_UQSUB_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-
-void host_arm64_UQXTN_V8B_8H(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm64_UQXTN_V4H_4S(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_arm64_USHR_V4H(codeblock_t *block, int dst_reg, int src_reg, int shift);
-void host_arm64_USHR_V2S(codeblock_t *block, int dst_reg, int src_reg, int shift);
-void host_arm64_USHR_V2D(codeblock_t *block, int dst_reg, int src_reg, int shift);
-
-void host_arm64_ZIP1_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_ZIP1_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_ZIP1_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_ZIP2_V8B(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_ZIP2_V4H(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-void host_arm64_ZIP2_V2S(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg);
-
-void host_arm64_call(codeblock_t *block, void *dst_addr);
-void host_arm64_jump(codeblock_t *block, uintptr_t dst_addr);
-void host_arm64_mov_imm(codeblock_t *block, int reg, uint32_t imm_data);
-
-
-#define in_range7_x(offset) (((offset) >= -0x200) && ((offset) < (0x200)) && !((offset) & 7))
-#define in_range12_b(offset) (((offset) >= 0) && ((offset) < 0x1000))
-#define in_range12_h(offset) (((offset) >= 0) && ((offset) < 0x2000) && !((offset) & 1))
-#define in_range12_w(offset) (((offset) >= 0) && ((offset) < 0x4000) && !((offset) & 3))
-#define in_range12_q(offset) (((offset) >= 0) && ((offset) < 0x8000) && !((offset) & 7))
-
-
-void codegen_direct_read_8(codeblock_t *block, int host_reg, void *p);
-
-void codegen_alloc(codeblock_t *block, int size);
\ No newline at end of file
diff --git a/src/codegen_backend_arm64_uops.c b/src/codegen_backend_arm64_uops.c
deleted file mode 100644
index 73623f0..0000000
--- a/src/codegen_backend_arm64_uops.c
+++ /dev/null
@@ -1,3368 +0,0 @@
-#ifdef __aarch64__
-
-#include "ibm.h"
-#include "x86.h"
-#include "x87.h"
-#include "386_common.h"
-#include "codegen.h"
-#include "codegen_backend.h"
-#include "codegen_backend_arm64_defs.h"
-#include "codegen_backend_arm64_ops.h"
-#include "codegen_ir_defs.h"
-
-#define OFFSET19(offset) (((offset >> 2) << 5) & 0x00ffffe0)
-
-#define HOST_REG_GET(reg) (IREG_GET_REG(reg) & 0x1f)
-
-#define REG_IS_L(size) (size == IREG_SIZE_L)
-#define REG_IS_W(size) (size == IREG_SIZE_W)
-#define REG_IS_B(size) (size == IREG_SIZE_B)
-#define REG_IS_BH(size) (size == IREG_SIZE_BH)
-#define REG_IS_D(size) (size == IREG_SIZE_D)
-#define REG_IS_Q(size) (size == IREG_SIZE_Q)
-
-static int codegen_ADD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm64_ADD_REG(block, dest_reg, src_reg_a, src_reg_b, 0);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm64_ADD_REG(block, REG_TEMP, src_reg_a, src_reg_b, 0);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm64_ADD_REG(block, REG_TEMP, src_reg_a, src_reg_b, 0);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_BH(src_size_b))
- {
- host_arm64_ADD_REG_LSR(block, REG_TEMP, src_reg_a, src_reg_b, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm64_ADD_REG_LSR(block, REG_TEMP, src_reg_b, src_reg_a, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_BH(src_size_b))
- {
- host_arm64_AND_IMM(block, REG_TEMP, src_reg_a, 0x0000ff00);
- host_arm64_ADD_REG(block, REG_TEMP, REG_TEMP, src_reg_b, 0);
- host_arm64_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("ADD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-
-static int codegen_ADD_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm64_ADD_IMM(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm64_ADD_IMM(block, REG_TEMP, src_reg, uop->imm_data);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm64_ADD_IMM(block, REG_TEMP, src_reg, uop->imm_data);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm64_ADD_IMM(block, REG_TEMP, src_reg, uop->imm_data << 8);
- host_arm64_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("ADD_IMM %x %x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-
-static int codegen_ADD_LSHIFT(codeblock_t *block, uop_t *uop)
-{
- host_arm64_ADD_REG(block, uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real, uop->imm_data);
- return 0;
-}
-
-static int codegen_AND(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_AND_REG_V(block, dest_reg, src_reg_a, src_reg_b);
- }
- else if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm64_AND_REG(block, dest_reg, src_reg_a, src_reg_b, 0);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm64_ORR_IMM(block, REG_TEMP, src_reg_b, 0xffff0000);
- host_arm64_AND_REG(block, dest_reg, src_reg_a, REG_TEMP, 0);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm64_ORR_IMM(block, REG_TEMP, src_reg_b, 0xffffff00);
- host_arm64_AND_REG(block, dest_reg, src_reg_a, REG_TEMP, 0);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_BH(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm64_ORR_IMM(block, REG_TEMP, src_reg_b, 0xffff00ff);
- host_arm64_AND_REG_ASR(block, dest_reg, src_reg_a, REG_TEMP, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_B(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm64_ORR_IMM(block, REG_TEMP, src_reg_b, 0xffffff00);
- host_arm64_AND_REG_ROR(block, dest_reg, src_reg_a, REG_TEMP, 24);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_BH(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm64_ORR_IMM(block, REG_TEMP, src_reg_b, 0xffff00ff);
- host_arm64_AND_REG(block, dest_reg, src_reg_a, REG_TEMP, 0);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm64_AND_REG(block, REG_TEMP, src_reg_a, src_reg_b, 0);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm64_AND_REG(block, REG_TEMP, src_reg_a, src_reg_b, 0);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_BH(src_size_b))
- {
- host_arm64_ORR_IMM(block, REG_TEMP, src_reg_b, 0xffff00ff);
- host_arm64_AND_REG_ROR(block, REG_TEMP, src_reg_a, REG_TEMP, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_B(dest_size) && REG_IS_BH(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm64_ORR_IMM(block, REG_TEMP, src_reg_a, 0xffff00ff);
- host_arm64_AND_REG_ROR(block, REG_TEMP, src_reg_b, REG_TEMP, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_B(dest_size) && REG_IS_BH(src_size_a) && REG_IS_BH(src_size_b))
- {
- host_arm64_AND_REG(block, REG_TEMP, src_reg_a, src_reg_b, 0);
- host_arm64_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else
- fatal("AND %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_AND_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm64_AND_IMM(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm64_AND_IMM(block, dest_reg, src_reg, uop->imm_data | 0xffff0000);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm64_AND_IMM(block, dest_reg, src_reg, uop->imm_data | 0xffffff00);
- }
- else if (REG_IS_B(dest_size) && REG_IS_BH(src_size))
- {
- host_arm64_MOV_REG_LSR(block, REG_TEMP, src_reg, 8);
- host_arm64_AND_IMM(block, REG_TEMP, REG_TEMP, uop->imm_data);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm64_AND_IMM(block, dest_reg, src_reg, (uop->imm_data << 8) | 0xffff00ff);
- }
- else
- fatal("AND_IMM %x %x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-
-static int codegen_ANDN(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_BIC_REG_V(block, dest_reg, src_reg_b, src_reg_a);
- }
- else
- fatal("ANDN %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-
-static int codegen_CALL_FUNC(codeblock_t *block, uop_t *uop)
-{
- host_arm64_call(block, uop->p);
-
- return 0;
-}
-
-static int codegen_CALL_FUNC_RESULT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (!REG_IS_L(dest_size))
- fatal("CALL_FUNC_RESULT %02x\n", uop->dest_reg_a_real);
- host_arm64_call(block, uop->p);
- host_arm64_MOV_REG(block, dest_reg, REG_W0, 0);
-
- return 0;
-}
-
-static int codegen_CALL_INSTRUCTION_FUNC(codeblock_t *block, uop_t *uop)
-{
- host_arm64_call(block, uop->p);
- host_arm64_CBNZ(block, REG_X0, (uintptr_t)codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_CMP_IMM_JZ(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_arm64_CMP_IMM(block, src_reg, uop->imm_data);
- }
- else
- fatal("CMP_IMM_JZ %02x\n", uop->src_reg_a_real);
- host_arm64_BEQ(block, uop->p);
-
- return 0;
-}
-
-static int codegen_CMP_IMM_JNZ_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_arm64_CMP_IMM(block, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(src_size))
- {
- host_arm64_AND_IMM(block, REG_TEMP, src_reg, 0xffff);
- host_arm64_CMP_IMM(block, REG_TEMP, uop->imm_data);
- }
- else
- fatal("CMP_IMM_JNZ_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm64_BNE_(block);
-
- return 0;
-}
-static int codegen_CMP_IMM_JZ_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_arm64_CMP_IMM(block, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(src_size))
- {
- host_arm64_AND_IMM(block, REG_TEMP, src_reg, 0xffff);
- host_arm64_CMP_IMM(block, REG_TEMP, uop->imm_data);
- }
- else
- fatal("CMP_IMM_JZ_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm64_BEQ_(block);
-
- return 0;
-}
-
-static int codegen_CMP_JB(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
- uint32_t *jump_p;
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm64_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else
- fatal("CMP_JB %02x\n", uop->src_reg_a_real);
-
- jump_p = host_arm64_BCC_(block);
- host_arm64_branch_set_offset(jump_p, uop->p);
-
- return 0;
-}
-static int codegen_CMP_JNBE(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
- uint32_t *jump_p;
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm64_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else
- fatal("CMP_JNBE %02x\n", uop->src_reg_a_real);
-
- jump_p = host_arm64_BHI_(block);
- host_arm64_branch_set_offset(jump_p, uop->p);
-
- return 0;
-}
-
-static int codegen_CMP_JNB_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm64_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 16);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 24);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JNB_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm64_BCS_(block);
-
- return 0;
-}
-static int codegen_CMP_JNBE_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm64_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 16);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 24);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JNBE_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm64_BHI_(block);
-
- return 0;
-}
-static int codegen_CMP_JNL_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm64_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 16);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 24);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JNL_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm64_BGE_(block);
-
- return 0;
-}
-static int codegen_CMP_JNLE_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm64_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 16);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 24);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JNLE_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm64_BGT_(block);
-
- return 0;
-}
-static int codegen_CMP_JNO_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm64_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 16);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 24);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JNO_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm64_BVC_(block);
-
- return 0;
-}
-static int codegen_CMP_JNZ_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm64_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 16);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 24);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JNZ_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm64_BNE_(block);
-
- return 0;
-}
-static int codegen_CMP_JB_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm64_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 16);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 24);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JB_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm64_BCC_(block);
-
- return 0;
-}
-static int codegen_CMP_JBE_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm64_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 16);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 24);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JBE_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm64_BLS_(block);
-
- return 0;
-}
-static int codegen_CMP_JL_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm64_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 16);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 24);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JL_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm64_BLT_(block);
-
- return 0;
-}
-static int codegen_CMP_JLE_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm64_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 16);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 24);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JLE_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm64_BLE_(block);
-
- return 0;
-}
-static int codegen_CMP_JO_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm64_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 16);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 24);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JO_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm64_BVS_(block);
-
- return 0;
-}
-static int codegen_CMP_JZ_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm64_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 16);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg_a, 24);
- host_arm64_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JZ_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm64_BEQ_(block);
-
- return 0;
-}
-
-static int codegen_FABS(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a))
- {
- host_arm64_FABS_D(block, dest_reg, src_reg_a);
- }
- else
- fatal("codegen_FABS %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_FCHS(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a))
- {
- host_arm64_FNEG_D(block, dest_reg, src_reg_a);
- }
- else
- fatal("codegen_FCHS %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_FSQRT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a))
- {
- host_arm64_FSQRT_D(block, dest_reg, src_reg_a);
- }
- else
- fatal("codegen_FSQRT %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_FTST(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_W(dest_size) && REG_IS_D(src_size_a))
- {
- host_arm64_FSUB_D(block, REG_V_TEMP, REG_V_TEMP, REG_V_TEMP);
- host_arm64_MOVZ_IMM(block, dest_reg, 0);
- host_arm64_FCMP_D(block, src_reg_a, REG_V_TEMP);
- host_arm64_ORR_IMM(block, REG_TEMP, dest_reg, C3);
- host_arm64_ORR_IMM(block, REG_TEMP2, dest_reg, C0);
- host_arm64_CSEL_EQ(block, dest_reg, REG_TEMP, dest_reg);
- host_arm64_ORR_IMM(block, REG_TEMP, dest_reg, C0|C2|C3);
- host_arm64_CSEL_CC(block, dest_reg, REG_TEMP2, dest_reg);
- host_arm64_CSEL_VS(block, dest_reg, REG_TEMP, dest_reg);
- }
- else
- fatal("codegen_FTST %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-
-static int codegen_FADD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b))
- {
- host_arm64_FADD_D(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("codegen_FADD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_FCOM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_W(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b))
- {
- host_arm64_MOVZ_IMM(block, dest_reg, 0);
- host_arm64_FCMP_D(block, src_reg_a, src_reg_b);
- host_arm64_ORR_IMM(block, REG_TEMP, dest_reg, C3);
- host_arm64_ORR_IMM(block, REG_TEMP2, dest_reg, C0);
- host_arm64_CSEL_EQ(block, dest_reg, REG_TEMP, dest_reg);
- host_arm64_ORR_IMM(block, REG_TEMP, dest_reg, C0|C2|C3);
- host_arm64_CSEL_CC(block, dest_reg, REG_TEMP2, dest_reg);
- host_arm64_CSEL_VS(block, dest_reg, REG_TEMP, dest_reg);
- }
- else
- fatal("codegen_FCOM %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_FDIV(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b))
- {
- host_arm64_FDIV_D(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("codegen_FDIV %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_FMUL(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b))
- {
- host_arm64_FMUL_D(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("codegen_FMUL %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_FSUB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b))
- {
- host_arm64_FSUB_D(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("codegen_FSUB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-
-static int codegen_FP_ENTER(codeblock_t *block, uop_t *uop)
-{
- uint32_t *branch_ptr;
-
- if (!in_range12_w((uintptr_t)&cr0 - (uintptr_t)&cpu_state))
- fatal("codegen_FP_ENTER - out of range\n");
-
- host_arm64_LDR_IMM_W(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cr0 - (uintptr_t)&cpu_state);
- host_arm64_TST_IMM(block, REG_TEMP, 0xc);
- branch_ptr = host_arm64_BEQ_(block);
-
- host_arm64_mov_imm(block, REG_TEMP, uop->imm_data);
- host_arm64_STR_IMM_W(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.oldpc - (uintptr_t)&cpu_state);
- host_arm64_mov_imm(block, REG_ARG0, 7);
- host_arm64_call(block, x86_int);
- host_arm64_B(block, codegen_exit_rout);
-
- host_arm64_branch_set_offset(branch_ptr, &block_write_data[block_pos]);
-
- return 0;
-}
-static int codegen_MMX_ENTER(codeblock_t *block, uop_t *uop)
-{
- uint32_t *branch_ptr;
-
- if (!in_range12_w((uintptr_t)&cr0 - (uintptr_t)&cpu_state))
- fatal("codegen_MMX_ENTER - out of range\n");
-
- host_arm64_LDR_IMM_W(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cr0 - (uintptr_t)&cpu_state);
- host_arm64_TST_IMM(block, REG_TEMP, 0xc);
- branch_ptr = host_arm64_BEQ_(block);
-
- host_arm64_mov_imm(block, REG_TEMP, uop->imm_data);
- host_arm64_STR_IMM_W(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.oldpc - (uintptr_t)&cpu_state);
- host_arm64_mov_imm(block, REG_ARG0, 7);
- host_arm64_call(block, x86_int);
- host_arm64_B(block, codegen_exit_rout);
-
- host_arm64_branch_set_offset(branch_ptr, &block->data[block_pos]);
-
- host_arm64_mov_imm(block, REG_TEMP, 0x01010101);
- host_arm64_STR_IMM_W(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.tag[0] - (uintptr_t)&cpu_state);
- host_arm64_STR_IMM_W(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.tag[4] - (uintptr_t)&cpu_state);
- host_arm64_STR_IMM_W(block, REG_WZR, REG_CPUSTATE, (uintptr_t)&cpu_state.TOP - (uintptr_t)&cpu_state);
- host_arm64_STRB_IMM(block, REG_WZR, REG_CPUSTATE, (uintptr_t)&cpu_state.ismmx - (uintptr_t)&cpu_state);
-
- return 0;
-}
-
-static int codegen_JMP(codeblock_t *block, uop_t *uop)
-{
- host_arm64_jump(block, (uintptr_t)uop->p);
-
- return 0;
-}
-
-static int codegen_LOAD_FUNC_ARG0(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_W(src_size))
- {
- host_arm64_AND_IMM(block, REG_ARG0, src_reg, 0xffff);
- }
- else
- fatal("codegen_LOAD_FUNC_ARG0 %02x\n", uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG1(codeblock_t *block, uop_t *uop)
-{
- fatal("codegen_LOAD_FUNC_ARG1 %02x\n", uop->src_reg_a_real);
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG2(codeblock_t *block, uop_t *uop)
-{
- fatal("codegen_LOAD_FUNC_ARG2 %02x\n", uop->src_reg_a_real);
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG3(codeblock_t *block, uop_t *uop)
-{
- fatal("codegen_LOAD_FUNC_ARG3 %02x\n", uop->src_reg_a_real);
- return 0;
-}
-
-static int codegen_LOAD_FUNC_ARG0_IMM(codeblock_t *block, uop_t *uop)
-{
- host_arm64_mov_imm(block, REG_ARG0, uop->imm_data);
-
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG1_IMM(codeblock_t *block, uop_t *uop)
-{
- host_arm64_mov_imm(block, REG_ARG1, uop->imm_data);
-
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG2_IMM(codeblock_t *block, uop_t *uop)
-{
- host_arm64_mov_imm(block, REG_ARG2, uop->imm_data);
-
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG3_IMM(codeblock_t *block, uop_t *uop)
-{
- host_arm64_mov_imm(block, REG_ARG3, uop->imm_data);
-
- return 0;
-}
-
-static int codegen_LOAD_SEG(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (!REG_IS_W(src_size))
- fatal("LOAD_SEG %02x %p\n", uop->src_reg_a_real, uop->p);
-
- host_arm64_MOVX_IMM(block, REG_ARG1, (uint64_t)uop->p);
- host_arm64_AND_IMM(block, REG_ARG0, src_reg, 0xffff);
- host_arm64_call(block, (void *)loadseg);
- host_arm64_CBNZ(block, REG_X0, (uintptr_t)codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_MEM_LOAD_ABS(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), seg_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- host_arm64_ADD_IMM(block, REG_X0, seg_reg, uop->imm_data);
- if (REG_IS_B(dest_size) || REG_IS_BH(dest_size))
- {
- host_arm64_call(block, codegen_mem_load_byte);
- }
- else if (REG_IS_W(dest_size))
- {
- host_arm64_call(block, codegen_mem_load_word);
- }
- else if (REG_IS_L(dest_size))
- {
- host_arm64_call(block, codegen_mem_load_long);
- }
- else
- fatal("MEM_LOAD_ABS - %02x\n", uop->dest_reg_a_real);
- host_arm64_CBNZ(block, REG_X1, (uintptr_t)codegen_exit_rout);
- if (REG_IS_B(dest_size))
- {
- host_arm64_BFI(block, dest_reg, REG_X0, 0, 8);
- }
- else if (REG_IS_BH(dest_size))
- {
- host_arm64_BFI(block, dest_reg, REG_X0, 8, 8);
- }
- else if (REG_IS_W(dest_size))
- {
- host_arm64_BFI(block, dest_reg, REG_X0, 0, 16);
- }
- else if (REG_IS_L(dest_size))
- {
- host_arm64_MOV_REG(block, dest_reg, REG_X0, 0);
- }
-
- return 0;
-}
-static int codegen_MEM_LOAD_REG(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- host_arm64_ADD_REG(block, REG_X0, seg_reg, addr_reg, 0);
- if (uop->imm_data)
- host_arm64_ADD_IMM(block, REG_X0, REG_X0, uop->imm_data);
- if (REG_IS_B(dest_size) || REG_IS_BH(dest_size))
- {
- host_arm64_call(block, codegen_mem_load_byte);
- }
- else if (REG_IS_W(dest_size))
- {
- host_arm64_call(block, codegen_mem_load_word);
- }
- else if (REG_IS_L(dest_size))
- {
- host_arm64_call(block, codegen_mem_load_long);
- }
- else if (REG_IS_Q(dest_size))
- {
- host_arm64_call(block, codegen_mem_load_quad);
- }
- else
- fatal("MEM_LOAD_REG - %02x\n", uop->dest_reg_a_real);
- host_arm64_CBNZ(block, REG_X1, (uintptr_t)codegen_exit_rout);
- if (REG_IS_B(dest_size))
- {
- host_arm64_BFI(block, dest_reg, REG_X0, 0, 8);
- }
- else if (REG_IS_BH(dest_size))
- {
- host_arm64_BFI(block, dest_reg, REG_X0, 8, 8);
- }
- else if (REG_IS_W(dest_size))
- {
- host_arm64_BFI(block, dest_reg, REG_X0, 0, 16);
- }
- else if (REG_IS_L(dest_size))
- {
- host_arm64_MOV_REG(block, dest_reg, REG_X0, 0);
- }
- else if (REG_IS_Q(dest_size))
- {
- host_arm64_FMOV_D_D(block, dest_reg, REG_V_TEMP);
- }
-
- return 0;
-}
-static int codegen_MEM_LOAD_DOUBLE(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (!REG_IS_D(dest_size))
- fatal("MEM_LOAD_DOUBLE - %02x\n", uop->dest_reg_a_real);
-
- host_arm64_ADD_REG(block, REG_X0, seg_reg, addr_reg, 0);
- if (uop->imm_data)
- host_arm64_ADD_IMM(block, REG_X0, REG_X0, uop->imm_data);
- host_arm64_call(block, codegen_mem_load_double);
- host_arm64_CBNZ(block, REG_X1, (uintptr_t)codegen_exit_rout);
- host_arm64_FMOV_D_D(block, dest_reg, REG_V_TEMP);
-
- return 0;
-}
-static int codegen_MEM_LOAD_SINGLE(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (!REG_IS_D(dest_size))
- fatal("MEM_LOAD_DOUBLE - %02x\n", uop->dest_reg_a_real);
-
- host_arm64_ADD_REG(block, REG_X0, seg_reg, addr_reg, 0);
- if (uop->imm_data)
- host_arm64_ADD_IMM(block, REG_X0, REG_X0, uop->imm_data);
- host_arm64_call(block, codegen_mem_load_single);
- host_arm64_CBNZ(block, REG_X1, (uintptr_t)codegen_exit_rout);
- host_arm64_FCVT_D_S(block, dest_reg, REG_V_TEMP);
-
- return 0;
-}
-
-static int codegen_MEM_STORE_ABS(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_b_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_b_real);
-
- host_arm64_ADD_IMM(block, REG_W0, seg_reg, uop->imm_data);
- if (REG_IS_B(src_size))
- {
- host_arm64_AND_IMM(block, REG_W1, src_reg, 0xff);
- host_arm64_call(block, codegen_mem_store_byte);
- }
- else if (REG_IS_BH(src_size))
- {
- host_arm64_UBFX(block, REG_W1, src_reg, 8, 8);
- host_arm64_call(block, codegen_mem_store_byte);
- }
- else if (REG_IS_W(src_size))
- {
- host_arm64_AND_IMM(block, REG_W1, src_reg, 0xffff);
- host_arm64_call(block, codegen_mem_store_word);
- }
- else if (REG_IS_L(src_size))
- {
- host_arm64_MOV_REG(block, REG_W1, src_reg, 0);
- host_arm64_call(block, codegen_mem_store_long);
- }
- else
- fatal("MEM_STORE_ABS - %02x\n", uop->dest_reg_a_real);
- host_arm64_CBNZ(block, REG_X1, (uintptr_t)codegen_exit_rout);
-
- return 0;
-}
-static int codegen_MEM_STORE_REG(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real), src_reg = HOST_REG_GET(uop->src_reg_c_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_c_real);
-
- host_arm64_ADD_REG(block, REG_W0, seg_reg, addr_reg, 0);
- if (uop->imm_data)
- host_arm64_ADD_IMM(block, REG_X0, REG_X0, uop->imm_data);
- if (REG_IS_B(src_size))
- {
- host_arm64_AND_IMM(block, REG_W1, src_reg, 0xff);
- host_arm64_call(block, codegen_mem_store_byte);
- }
- else if (REG_IS_BH(src_size))
- {
- host_arm64_UBFX(block, REG_W1, src_reg, 8, 8);
- host_arm64_call(block, codegen_mem_store_byte);
- }
- else if (REG_IS_W(src_size))
- {
- host_arm64_AND_IMM(block, REG_W1, src_reg, 0xffff);
- host_arm64_call(block, codegen_mem_store_word);
- }
- else if (REG_IS_L(src_size))
- {
- host_arm64_MOV_REG(block, REG_W1, src_reg, 0);
- host_arm64_call(block, codegen_mem_store_long);
- }
- else if (REG_IS_Q(src_size))
- {
- host_arm64_FMOV_D_D(block, REG_V_TEMP, src_reg);
- host_arm64_call(block, codegen_mem_store_quad);
- }
- else
- fatal("MEM_STORE_REG - %02x\n", uop->src_reg_c_real);
- host_arm64_CBNZ(block, REG_X1, (uintptr_t)codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_MEM_STORE_IMM_8(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
-
- host_arm64_ADD_REG(block, REG_W0, seg_reg, addr_reg, 0);
- host_arm64_mov_imm(block, REG_W1, uop->imm_data);
- host_arm64_call(block, codegen_mem_store_byte);
- host_arm64_CBNZ(block, REG_X1, (uintptr_t)codegen_exit_rout);
-
- return 0;
-}
-static int codegen_MEM_STORE_IMM_16(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
-
- host_arm64_ADD_REG(block, REG_W0, seg_reg, addr_reg, 0);
- host_arm64_mov_imm(block, REG_W1, uop->imm_data);
- host_arm64_call(block, codegen_mem_store_word);
- host_arm64_CBNZ(block, REG_X1, (uintptr_t)codegen_exit_rout);
-
- return 0;
-}
-static int codegen_MEM_STORE_IMM_32(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
-
- host_arm64_ADD_REG(block, REG_W0, seg_reg, addr_reg, 0);
- host_arm64_mov_imm(block, REG_W1, uop->imm_data);
- host_arm64_call(block, codegen_mem_store_long);
- host_arm64_CBNZ(block, REG_X1, (uintptr_t)codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_MEM_STORE_SINGLE(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real), src_reg = HOST_REG_GET(uop->src_reg_c_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_c_real);
-
- if (!REG_IS_D(src_size))
- fatal("MEM_STORE_REG - %02x\n", uop->dest_reg_a_real);
-
- host_arm64_ADD_REG(block, REG_W0, seg_reg, addr_reg, 0);
- if (uop->imm_data)
- host_arm64_ADD_IMM(block, REG_X0, REG_X0, uop->imm_data);
- host_arm64_FCVT_S_D(block, REG_V_TEMP, src_reg);
- host_arm64_call(block, codegen_mem_store_single);
- host_arm64_CBNZ(block, REG_X1, (uintptr_t)codegen_exit_rout);
-
- return 0;
-}
-static int codegen_MEM_STORE_DOUBLE(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real), src_reg = HOST_REG_GET(uop->src_reg_c_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_c_real);
-
- if (!REG_IS_D(src_size))
- fatal("MEM_STORE_REG - %02x\n", uop->dest_reg_a_real);
-
- host_arm64_ADD_REG(block, REG_W0, seg_reg, addr_reg, 0);
- if (uop->imm_data)
- host_arm64_ADD_IMM(block, REG_X0, REG_X0, uop->imm_data);
- host_arm64_FMOV_D_D(block, REG_V_TEMP, src_reg);
- host_arm64_call(block, codegen_mem_store_double);
- host_arm64_CBNZ(block, REG_X1, (uintptr_t)codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_MOV(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm64_MOV_REG(block, dest_reg, src_reg, 0);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm64_BFI(block, dest_reg, src_reg, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm64_BFI(block, dest_reg, src_reg, 0, 8);
- }
- else if (REG_IS_B(dest_size) && REG_IS_BH(src_size))
- {
- host_arm64_MOV_REG_LSR(block, REG_TEMP, src_reg, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_B(src_size))
- {
- host_arm64_BFI(block, dest_reg, src_reg, 8, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm64_MOV_REG_LSR(block, REG_TEMP, src_reg, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else if (REG_IS_D(dest_size) && REG_IS_D(src_size))
- {
- host_arm64_FMOV_D_D(block, dest_reg, src_reg);
- }
- else if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- host_arm64_FMOV_D_D(block, dest_reg, src_reg);
- }
- else
- fatal("MOV %x %x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_MOV_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_L(dest_size))
- {
- host_arm64_mov_imm(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size))
- {
- host_arm64_MOVK_IMM(block, dest_reg, uop->imm_data & 0xffff);
- }
- else if (REG_IS_B(dest_size))
- {
- host_arm64_MOVZ_IMM(block, REG_TEMP, uop->imm_data & 0xff);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size))
- {
- host_arm64_MOVZ_IMM(block, REG_TEMP, uop->imm_data & 0xff);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("MOV_IMM %x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-static int codegen_MOV_PTR(codeblock_t *block, uop_t *uop)
-{
- host_arm64_MOVX_IMM(block, uop->dest_reg_a_real, (uint64_t)uop->p);
-
- return 0;
-}
-
-static int codegen_MOVSX(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_B(src_size))
- {
- host_arm64_SBFX(block, dest_reg, src_reg, 0, 8);
- }
- else if (REG_IS_L(dest_size) && REG_IS_BH(src_size))
- {
- host_arm64_SBFX(block, dest_reg, src_reg, 8, 8);
- }
- else if (REG_IS_L(dest_size) && REG_IS_W(src_size))
- {
- host_arm64_SBFX(block, dest_reg, src_reg, 0, 16);
- }
- else if (REG_IS_W(dest_size) && REG_IS_B(src_size))
- {
- host_arm64_SBFX(block, REG_TEMP, src_reg, 0, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_W(dest_size) && REG_IS_BH(src_size))
- {
- host_arm64_SBFX(block, REG_TEMP, src_reg, 8, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else
- fatal("MOVSX %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_MOVZX(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_L(src_size))
- {
- host_arm64_FMOV_D_Q(block, dest_reg, src_reg);
- }
- else if (REG_IS_L(dest_size) && REG_IS_Q(src_size))
- {
- host_arm64_FMOV_W_S(block, dest_reg, src_reg);
- }
- else if (REG_IS_L(dest_size) && REG_IS_B(src_size))
- {
- host_arm64_AND_IMM(block, dest_reg, src_reg, 0xff);
- }
- else if (REG_IS_L(dest_size) && REG_IS_BH(src_size))
- {
- host_arm64_UBFX(block, dest_reg, src_reg, 8, 8);
- }
- else if (REG_IS_L(dest_size) && REG_IS_W(src_size))
- {
- host_arm64_AND_IMM(block, dest_reg, src_reg, 0xffff);
- }
- else if (REG_IS_W(dest_size) && REG_IS_B(src_size))
- {
- host_arm64_AND_IMM(block, REG_TEMP, src_reg, 0xff);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_W(dest_size) && REG_IS_BH(src_size))
- {
- host_arm64_UBFX(block, REG_TEMP, src_reg, 8, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else
- fatal("MOVZX %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-
-static int codegen_MOV_DOUBLE_INT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_D(dest_size) && REG_IS_L(src_size))
- {
- host_arm64_SCVTF_D_W(block, dest_reg, src_reg);
- }
- else if (REG_IS_D(dest_size) && REG_IS_W(src_size))
- {
- host_arm64_SBFX(block, REG_TEMP, src_reg, 0, 16);
- host_arm64_SCVTF_D_W(block, dest_reg, REG_TEMP);
- }
- else if (REG_IS_D(dest_size) && REG_IS_Q(src_size))
- {
- host_arm64_FMOV_Q_D(block, REG_TEMP, src_reg);
- host_arm64_SCVTF_D_Q(block, dest_reg, REG_TEMP);
- }
- else
- fatal("MOV_DOUBLE_INT %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_MOV_INT_DOUBLE(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_D(src_size))
- {
- host_arm64_FMOV_D_D(block, REG_V_TEMP, src_reg);
- host_arm64_call(block, codegen_fp_round);
- host_arm64_MOV_REG(block, dest_reg, REG_TEMP, 0);
- }
- else if (REG_IS_W(dest_size) && REG_IS_D(src_size))
- {
- host_arm64_FMOV_D_D(block, REG_V_TEMP, src_reg);
- host_arm64_call(block, codegen_fp_round);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else
- fatal("MOV_INT_DOUBLE %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_MOV_INT_DOUBLE_64(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), src_64_reg = HOST_REG_GET(uop->src_reg_b_real), tag_reg = HOST_REG_GET(uop->src_reg_c_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real), src_64_size = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_D(src_size) && REG_IS_Q(src_64_size))
- {
- uint32_t *branch_offset;
-
- /*If TAG_UINT64 is set then the source is MM[]. Otherwise it is a double in ST()*/
- host_arm64_FMOV_D_D(block, dest_reg, src_64_reg);
- branch_offset = host_arm64_TBNZ(block, tag_reg, 7);
-
- host_arm64_FMOV_D_D(block, REG_V_TEMP, src_reg);
- host_arm64_call(block, codegen_fp_round_quad);
- host_arm64_FMOV_D_Q(block, dest_reg, REG_TEMP);
-
- host_arm64_branch_set_offset(branch_offset, &block_write_data[block_pos]);
- }
- else
- fatal("MOV_INT_DOUBLE_64 %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_MOV_REG_PTR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- host_arm64_MOVX_IMM(block, REG_TEMP, (uint64_t)uop->p);
- if (REG_IS_L(dest_size))
- {
- host_arm64_LDR_IMM_W(block, dest_reg, REG_TEMP, 0);
- }
- else
- fatal("MOV_REG_PTR %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-static int codegen_MOVZX_REG_PTR_8(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- host_arm64_MOVX_IMM(block, REG_TEMP, (uint64_t)uop->p);
- if (REG_IS_L(dest_size))
- {
- host_arm64_LDRB_IMM_W(block, dest_reg, REG_TEMP, 0);
- }
- else if (REG_IS_W(dest_size))
- {
- host_arm64_LDRB_IMM_W(block, REG_TEMP, REG_TEMP, 0);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size))
- {
- host_arm64_LDRB_IMM_W(block, REG_TEMP, REG_TEMP, 0);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else
- fatal("MOVZX_REG_PTR_8 %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-static int codegen_MOVZX_REG_PTR_16(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- host_arm64_MOVX_IMM(block, REG_TEMP, (uint64_t)uop->p);
- if (REG_IS_L(dest_size))
- {
- host_arm64_LDRH_IMM(block, dest_reg, REG_TEMP, 0);
- }
- else if (REG_IS_W(dest_size))
- {
- host_arm64_LDRH_IMM(block, REG_TEMP, REG_TEMP, 0);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else
- fatal("MOVZX_REG_PTR_16 %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-
-static int codegen_NOP(codeblock_t *block, uop_t *uop)
-{
- return 0;
-}
-
-static int codegen_OR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_ORR_REG_V(block, dest_reg, src_reg_a, src_reg_b);
- }
- else if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm64_ORR_REG(block, dest_reg, src_reg_a, src_reg_b, 0);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm64_ORR_REG(block, REG_TEMP, src_reg_a, src_reg_b, 0);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm64_AND_IMM(block, REG_TEMP, src_reg_b, 0xff);
- host_arm64_ORR_REG(block, dest_reg, src_reg_a, REG_TEMP, 0);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_BH(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm64_UBFX(block, REG_TEMP, src_reg_b, 8, 8);
- host_arm64_ORR_REG(block, dest_reg, src_reg_a, REG_TEMP, 0);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_B(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm64_AND_IMM(block, REG_TEMP, src_reg_b, 0xff);
- host_arm64_ORR_REG(block, dest_reg, src_reg_a, REG_TEMP, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_BH(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm64_UBFX(block, REG_TEMP, src_reg_b, 8, 8);
- host_arm64_ORR_REG(block, dest_reg, src_reg_a, REG_TEMP, 8);
- }
- else
- fatal("OR %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_OR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm64_ORR_IMM(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size) && dest_reg == src_reg)
- {
- host_arm64_ORR_IMM(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size) && dest_reg == src_reg)
- {
- host_arm64_ORR_IMM(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size) && dest_reg == src_reg)
- {
- host_arm64_ORR_IMM(block, dest_reg, src_reg, uop->imm_data << 8);
- }
- else
- fatal("OR_IMM %x %x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-
-static int codegen_PACKSSWB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_arm64_SQXTN_V8B_8H(block, REG_V_TEMP, src_reg_b);
- host_arm64_SQXTN_V8B_8H(block, dest_reg, dest_reg);
- host_arm64_ZIP1_V2S(block, dest_reg, dest_reg, REG_V_TEMP);
- }
- else
- fatal("PACKSSWB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PACKSSDW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_arm64_SQXTN_V4H_4S(block, REG_V_TEMP, src_reg_b);
- host_arm64_SQXTN_V4H_4S(block, dest_reg, dest_reg);
- host_arm64_ZIP1_V2S(block, dest_reg, dest_reg, REG_V_TEMP);
- }
- else
- fatal("PACKSSDW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PACKUSWB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_arm64_UQXTN_V8B_8H(block, REG_V_TEMP, src_reg_b);
- host_arm64_UQXTN_V8B_8H(block, dest_reg, dest_reg);
- host_arm64_ZIP1_V2S(block, dest_reg, dest_reg, REG_V_TEMP);
- }
- else
- fatal("PACKUSWB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-
-static int codegen_PADDB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_ADD_V8B(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PADDB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PADDW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_ADD_V4H(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PADDW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PADDD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_ADD_V2S(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PADDD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PADDSB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_SQADD_V8B(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PADDSB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PADDSW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_SQADD_V4H(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PADDSW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PADDUSB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_UQADD_V8B(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PADDUSB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PADDUSW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_UQADD_V4H(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PADDUSW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-
-static int codegen_PCMPEQB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_CMEQ_V8B(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PCMPEQB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PCMPEQW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_CMEQ_V4H(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PCMPEQW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PCMPEQD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_CMEQ_V2S(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PCMPEQD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PCMPGTB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_CMGT_V8B(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PCMPGTB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PCMPGTW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_CMGT_V4H(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PCMPGTW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PCMPGTD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_CMGT_V2S(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PCMPGTD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-
-static int codegen_PF2ID(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a))
- {
- host_arm64_FCVTZS_V2S(block, dest_reg, src_reg_a);
- }
- else
- fatal("PF2ID %02x %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-static int codegen_PFADD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_FADD_V2S(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PFADD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PFCMPEQ(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_FCMEQ_V2S(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PFCMPEQ %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PFCMPGE(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_FCMGE_V2S(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PFCMPGE %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PFCMPGT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_FCMGT_V2S(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PFCMPGT %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PFMAX(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_FMAX_V2S(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PFMAX %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PFMIN(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_FMIN_V2S(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PFMIN %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PFMUL(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_FMUL_V2S(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PFMUL %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PFRCP(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a))
- {
- /*TODO: This could be improved (use VRECPE/VRECPS)*/
- host_arm64_FMOV_S_ONE(block, REG_V_TEMP);
- host_arm64_FDIV_S(block, dest_reg, REG_V_TEMP, src_reg_a);
- host_arm64_DUP_V2S(block, dest_reg, dest_reg, 0);
- }
- else
- fatal("PFRCP %02x %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-static int codegen_PFRSQRT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a))
- {
- /*TODO: This could be improved (use VRSQRTE/VRSQRTS)*/
- host_arm64_FSQRT_S(block, REG_V_TEMP, src_reg_a);
- host_arm64_FMOV_S_ONE(block, REG_V_TEMP);
- host_arm64_FDIV_S(block, dest_reg, dest_reg, REG_V_TEMP);
- host_arm64_DUP_V2S(block, dest_reg, dest_reg, 0);
- }
- else
- fatal("PFRSQRT %02x %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-static int codegen_PFSUB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_FSUB_V2S(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PFSUB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PI2FD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a))
- {
- host_arm64_SCVTF_V2S(block, dest_reg, src_reg_a);
- }
- else
- fatal("PI2FD %02x %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-
-static int codegen_PMADDWD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_SMULL_V4S_4H(block, REG_V_TEMP, src_reg_a, src_reg_b);
- host_arm64_ADDP_V4S(block, dest_reg, REG_V_TEMP, REG_V_TEMP);
- }
- else
- fatal("PMULHW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PMULHW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_SMULL_V4S_4H(block, dest_reg, src_reg_a, src_reg_b);
- host_arm64_SHRN_V4H_4S(block, dest_reg, dest_reg, 16);
- }
- else
- fatal("PMULHW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PMULLW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_MUL_V4H(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PMULLW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-
-static int codegen_PSLLW_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- if (uop->imm_data == 0)
- host_arm64_FMOV_D_D(block, dest_reg, src_reg);
- else if (uop->imm_data > 15)
- host_arm64_EOR_REG_V(block, dest_reg, dest_reg, dest_reg);
- else
- host_arm64_SHL_V4H(block, dest_reg, src_reg, uop->imm_data);
- }
- else
- fatal("PSLLW_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_PSLLD_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- if (uop->imm_data == 0)
- host_arm64_FMOV_D_D(block, dest_reg, src_reg);
- else if (uop->imm_data > 31)
- host_arm64_EOR_REG_V(block, dest_reg, dest_reg, dest_reg);
- else
- host_arm64_SHL_V2S(block, dest_reg, src_reg, uop->imm_data);
- }
- else
- fatal("PSLLD_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_PSLLQ_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- if (uop->imm_data == 0)
- host_arm64_FMOV_D_D(block, dest_reg, src_reg);
- else if (uop->imm_data > 63)
- host_arm64_EOR_REG_V(block, dest_reg, dest_reg, dest_reg);
- else
- host_arm64_SHL_V2D(block, dest_reg, src_reg, uop->imm_data);
- }
- else
- fatal("PSLLQ_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_PSRAW_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- if (uop->imm_data == 0)
- host_arm64_FMOV_D_D(block, dest_reg, src_reg);
- else if (uop->imm_data > 15)
- host_arm64_SSHR_V4H(block, dest_reg, src_reg, 15);
- else
- host_arm64_SSHR_V4H(block, dest_reg, src_reg, uop->imm_data);
- }
- else
- fatal("PSRAW_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_PSRAD_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- if (uop->imm_data == 0)
- host_arm64_FMOV_D_D(block, dest_reg, src_reg);
- else if (uop->imm_data > 31)
- host_arm64_SSHR_V2S(block, dest_reg, src_reg, 31);
- else
- host_arm64_SSHR_V2S(block, dest_reg, src_reg, uop->imm_data);
- }
- else
- fatal("PSRAD_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_PSRAQ_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- if (uop->imm_data == 0)
- host_arm64_FMOV_D_D(block, dest_reg, src_reg);
- else if (uop->imm_data > 63)
- host_arm64_SSHR_V2D(block, dest_reg, src_reg, 63);
- else
- host_arm64_SSHR_V2D(block, dest_reg, src_reg, uop->imm_data);
- }
- else
- fatal("PSRAQ_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_PSRLW_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- if (uop->imm_data == 0)
- host_arm64_FMOV_D_D(block, dest_reg, src_reg);
- else if (uop->imm_data > 15)
- host_arm64_EOR_REG_V(block, dest_reg, dest_reg, dest_reg);
- else
- host_arm64_USHR_V4H(block, dest_reg, src_reg, uop->imm_data);
- }
- else
- fatal("PSRLW_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_PSRLD_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- if (uop->imm_data == 0)
- host_arm64_FMOV_D_D(block, dest_reg, src_reg);
- else if (uop->imm_data > 31)
- host_arm64_EOR_REG_V(block, dest_reg, dest_reg, dest_reg);
- else
- host_arm64_USHR_V2S(block, dest_reg, src_reg, uop->imm_data);
- }
- else
- fatal("PSRLD_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_PSRLQ_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- if (uop->imm_data == 0)
- host_arm64_FMOV_D_D(block, dest_reg, src_reg);
- else if (uop->imm_data > 63)
- host_arm64_EOR_REG_V(block, dest_reg, dest_reg, dest_reg);
- else
- host_arm64_USHR_V2D(block, dest_reg, src_reg, uop->imm_data);
- }
- else
- fatal("PSRLQ_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-
-static int codegen_PSUBB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_SUB_V8B(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PSUBB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PSUBW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_SUB_V4H(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PSUBW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PSUBD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_SUB_V2S(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PSUBD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PSUBSB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_SQSUB_V8B(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PSUBSB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PSUBSW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_SQSUB_V4H(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PSUBSW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PSUBUSB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_UQSUB_V8B(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PSUBUSB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PSUBUSW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_UQSUB_V4H(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PSUBUSW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-
-static int codegen_PUNPCKHBW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_ZIP2_V8B(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PUNPCKHBW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PUNPCKHWD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_ZIP2_V4H(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PUNPCKHWD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PUNPCKHDQ(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_ZIP2_V2S(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PUNPCKHDQ %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PUNPCKLBW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_ZIP1_V8B(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PUNPCKLBW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PUNPCKLWD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_ZIP1_V4H(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PUNPCKLWD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PUNPCKLDQ(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_ZIP1_V2S(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PUNPCKLDQ %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-
-static int codegen_ROL(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm64_mov_imm(block, REG_TEMP2, 32);
- host_arm64_SUB_REG(block, REG_TEMP2, REG_TEMP2, shift_reg, 0);
- host_arm64_ROR(block, dest_reg, src_reg, REG_TEMP2);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm64_mov_imm(block, REG_TEMP2, 16);
- host_arm64_UBFX(block, REG_TEMP, src_reg, 0, 16);
- host_arm64_SUB_REG(block, REG_TEMP2, REG_TEMP2, shift_reg, 0);
- host_arm64_ORR_REG(block, REG_TEMP, REG_TEMP, REG_TEMP, 16);
- host_arm64_ROR(block, REG_TEMP, REG_TEMP, REG_TEMP2);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- cs = cs;
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm64_mov_imm(block, REG_TEMP2, 8);
- host_arm64_SUB_REG(block, REG_TEMP2, REG_TEMP2, shift_reg, 0);
- host_arm64_UBFX(block, REG_TEMP, src_reg, 0, 8);
- host_arm64_AND_IMM(block, REG_TEMP2, REG_TEMP2, 7);
- host_arm64_ORR_REG(block, REG_TEMP, REG_TEMP, REG_TEMP, 8);
- host_arm64_LSR(block, REG_TEMP, REG_TEMP, REG_TEMP2);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm64_mov_imm(block, REG_TEMP2, 8);
- host_arm64_SUB_REG(block, REG_TEMP2, REG_TEMP2, shift_reg, 0);
- host_arm64_UBFX(block, REG_TEMP, src_reg, 8, 8);
- host_arm64_AND_IMM(block, REG_TEMP2, REG_TEMP2, 7);
- host_arm64_ORR_REG(block, REG_TEMP, REG_TEMP, REG_TEMP, 8);
- host_arm64_LSR(block, REG_TEMP, REG_TEMP, REG_TEMP2);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("ROL %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_ROL_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (!(uop->imm_data & 31))
- {
- if (src_reg != dest_reg)
- host_arm64_MOV_REG(block, dest_reg, src_reg, 0);
- }
- else
- {
- host_arm64_MOV_REG_ROR(block, dest_reg, src_reg, 32 - (uop->imm_data & 31));
- }
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if ((uop->imm_data & 15) == 0)
- {
- if (src_reg != dest_reg)
- host_arm64_BFI(block, dest_reg, src_reg, 0, 16);
- }
- else
- {
- host_arm64_UBFX(block, REG_TEMP, src_reg, 0, 16);
- host_arm64_ORR_REG(block, REG_TEMP, REG_TEMP, REG_TEMP, 16);
- host_arm64_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, 16-(uop->imm_data & 15));
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if ((uop->imm_data & 7) == 0)
- {
- if (src_reg != dest_reg)
- host_arm64_BFI(block, dest_reg, src_reg, 0, 8);
- }
- else
- {
- host_arm64_UBFX(block, REG_TEMP, src_reg, 0, 8);
- host_arm64_ORR_REG(block, REG_TEMP, REG_TEMP, REG_TEMP, 8);
- host_arm64_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, 8-(uop->imm_data & 7));
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- if ((uop->imm_data & 7) == 0)
- {
- if (src_reg != dest_reg)
- fatal("ROL_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
- }
- else
- {
- host_arm64_UBFX(block, REG_TEMP, src_reg, 8, 8);
- host_arm64_ORR_REG(block, REG_TEMP, REG_TEMP, REG_TEMP, 8);
- host_arm64_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, 8-(uop->imm_data & 7));
- host_arm64_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- }
- else
- fatal("ROL_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_ROR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm64_ROR(block, dest_reg, src_reg, shift_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm64_UBFX(block, REG_TEMP, src_reg, 0, 16);
- host_arm64_AND_IMM(block, REG_TEMP2, shift_reg, 15);
- host_arm64_ORR_REG(block, REG_TEMP, REG_TEMP, REG_TEMP, 16);
- host_arm64_LSR(block, REG_TEMP, REG_TEMP, REG_TEMP2);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm64_UBFX(block, REG_TEMP, src_reg, 0, 8);
- host_arm64_AND_IMM(block, REG_TEMP2, shift_reg, 7);
- host_arm64_ORR_REG(block, REG_TEMP, REG_TEMP, REG_TEMP, 8);
- host_arm64_LSR(block, REG_TEMP, REG_TEMP, REG_TEMP2);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm64_UBFX(block, REG_TEMP, src_reg, 8, 8);
- host_arm64_AND_IMM(block, REG_TEMP2, shift_reg, 7);
- host_arm64_ORR_REG(block, REG_TEMP, REG_TEMP, REG_TEMP, 8);
- host_arm64_LSR(block, REG_TEMP, REG_TEMP, REG_TEMP2);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("ROR %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_ROR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (!(uop->imm_data & 31))
- {
- if (src_reg != dest_reg)
- host_arm64_MOV_REG(block, dest_reg, src_reg, 0);
- }
- else
- {
- host_arm64_MOV_REG_ROR(block, dest_reg, src_reg, uop->imm_data & 31);
- }
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if ((uop->imm_data & 15) == 0)
- {
- if (src_reg != dest_reg)
- fatal("ROR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
- }
- else
- {
- host_arm64_UBFX(block, REG_TEMP, src_reg, 0, 16);
- host_arm64_ORR_REG(block, REG_TEMP, REG_TEMP, REG_TEMP, 16);
- host_arm64_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, uop->imm_data & 15);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if ((uop->imm_data & 7) == 0)
- {
- if (src_reg != dest_reg)
- fatal("ROR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
- }
- else
- {
- host_arm64_UBFX(block, REG_TEMP, src_reg, 0, 8);
- host_arm64_ORR_REG(block, REG_TEMP, REG_TEMP, REG_TEMP, 8);
- host_arm64_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, uop->imm_data & 7);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- if ((uop->imm_data & 7) == 0)
- {
- if (src_reg != dest_reg)
- fatal("ROR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
- }
- else
- {
- host_arm64_UBFX(block, REG_TEMP, src_reg, 8, 8);
- host_arm64_ORR_REG(block, REG_TEMP, REG_TEMP, REG_TEMP, 8);
- host_arm64_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, uop->imm_data & 7);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- }
- else
- fatal("ROR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-
-static int codegen_SAR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm64_ASR(block, dest_reg, src_reg, shift_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg, 16);
- host_arm64_ASR(block, REG_TEMP, REG_TEMP, shift_reg);
- host_arm64_UBFX(block, REG_TEMP, REG_TEMP, 16, 16);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg, 24);
- host_arm64_ASR(block, REG_TEMP, REG_TEMP, shift_reg);
- host_arm64_UBFX(block, REG_TEMP, REG_TEMP, 24, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg, 16);
- host_arm64_ASR(block, REG_TEMP, REG_TEMP, shift_reg);
- host_arm64_UBFX(block, REG_TEMP, REG_TEMP, 24, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("SAR %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_SAR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm64_MOV_REG_ASR(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg, 16);
- host_arm64_MOV_REG_ASR(block, REG_TEMP, REG_TEMP, uop->imm_data);
- host_arm64_UBFX(block, REG_TEMP, REG_TEMP, 16, 16);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg, 24);
- host_arm64_MOV_REG_ASR(block, REG_TEMP, REG_TEMP, uop->imm_data);
- host_arm64_UBFX(block, REG_TEMP, REG_TEMP, 24, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg, 16);
- host_arm64_MOV_REG_ASR(block, REG_TEMP, REG_TEMP, uop->imm_data);
- host_arm64_UBFX(block, REG_TEMP, REG_TEMP, 24, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("SAR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_SHL(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm64_LSL(block, dest_reg, src_reg, shift_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm64_LSL(block, REG_TEMP, src_reg, shift_reg);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm64_LSL(block, REG_TEMP, src_reg, shift_reg);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm64_UBFX(block, REG_TEMP, src_reg, 8, 8);
- host_arm64_LSL(block, REG_TEMP, REG_TEMP, shift_reg);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("SHL %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_SHL_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm64_MOV_REG(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg, uop->imm_data);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm64_MOV_REG(block, REG_TEMP, src_reg, uop->imm_data);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm64_UBFX(block, REG_TEMP, src_reg, 8, 8);
- host_arm64_MOV_REG(block, REG_TEMP, REG_TEMP, uop->imm_data);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("SHL_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_SHR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm64_LSR(block, dest_reg, src_reg, shift_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm64_AND_IMM(block, REG_TEMP, src_reg, 0xffff);
- host_arm64_LSR(block, REG_TEMP, REG_TEMP, shift_reg);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm64_AND_IMM(block, REG_TEMP, src_reg, 0xff);
- host_arm64_LSR(block, REG_TEMP, REG_TEMP, shift_reg);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm64_UBFX(block, REG_TEMP, src_reg, 8, 8);
- host_arm64_LSR(block, REG_TEMP, REG_TEMP, shift_reg);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("SHR %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_SHR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm64_MOV_REG_LSR(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm64_AND_IMM(block, REG_TEMP, src_reg, 0xffff);
- host_arm64_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, uop->imm_data);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm64_AND_IMM(block, REG_TEMP, src_reg, 0xff);
- host_arm64_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, uop->imm_data);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm64_UBFX(block, REG_TEMP, src_reg, 8, 8);
- host_arm64_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, uop->imm_data);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("SHR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-
-static int codegen_STORE_PTR_IMM(codeblock_t *block, uop_t *uop)
-{
- host_arm64_mov_imm(block, REG_W16, uop->imm_data);
-
- if (in_range12_w((uintptr_t)uop->p - (uintptr_t)&cpu_state))
- host_arm64_STR_IMM_W(block, REG_W16, REG_CPUSTATE, (uintptr_t)uop->p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_STORE_PTR_IMM - not in range\n");
-
- return 0;
-}
-static int codegen_STORE_PTR_IMM_8(codeblock_t *block, uop_t *uop)
-{
- host_arm64_mov_imm(block, REG_W16, uop->imm_data);
-
- if (in_range12_b((uintptr_t)uop->p - (uintptr_t)&cpu_state))
- host_arm64_STRB_IMM(block, REG_W16, REG_CPUSTATE, (uintptr_t)uop->p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_STORE_PTR_IMM - not in range\n");
-
- return 0;
-}
-
-static int codegen_SUB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm64_SUB_REG(block, dest_reg, src_reg_a, src_reg_b, 0);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm64_SUB_REG(block, REG_TEMP, src_reg_a, src_reg_b, 0);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm64_SUB_REG(block, REG_TEMP, src_reg_a, src_reg_b, 0);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_BH(src_size_b))
- {
- host_arm64_SUB_REG_LSR(block, REG_TEMP, src_reg_a, src_reg_b, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_B(dest_size) && REG_IS_BH(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm64_SUB_REG(block, REG_TEMP, src_reg_a, src_reg_b, 8);
- host_arm64_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_B(dest_size) && REG_IS_BH(src_size_a) && REG_IS_BH(src_size_b))
- {
- host_arm64_MOV_REG_LSR(block, REG_TEMP, src_reg_a, 8);
- host_arm64_SUB_REG_LSR(block, REG_TEMP, REG_TEMP, src_reg_b, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm64_SUB_REG(block, REG_TEMP, src_reg_a, src_reg_b, 8);
- host_arm64_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_BH(src_size_b))
- {
- host_arm64_MOV_REG_LSR(block, REG_TEMP, src_reg_a, 8);
- host_arm64_SUB_REG_LSR(block, REG_TEMP, REG_TEMP, src_reg_b, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("SUB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_SUB_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm64_SUB_IMM(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm64_SUB_IMM(block, REG_TEMP, src_reg, uop->imm_data);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm64_SUB_IMM(block, REG_TEMP, src_reg, uop->imm_data);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_B(dest_size) && REG_IS_BH(src_size))
- {
- host_arm64_SUB_IMM(block, REG_TEMP, src_reg, uop->imm_data << 8);
- host_arm64_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm64_SUB_IMM(block, REG_TEMP, src_reg, uop->imm_data << 8);
- host_arm64_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, 8);
- host_arm64_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("SUB_IMM %x %x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-
-static int codegen_TEST_JNS_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_arm64_TST_IMM(block, src_reg, 1 << 31);
- }
- else if (REG_IS_W(src_size))
- {
- host_arm64_TST_IMM(block, src_reg, 1 << 15);
- }
- else if (REG_IS_B(src_size))
- {
- host_arm64_TST_IMM(block, src_reg, 1 << 7);
- }
- else
- fatal("TEST_JNS_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm64_BEQ_(block);
-
- return 0;
-}
-static int codegen_TEST_JS_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_arm64_TST_IMM(block, src_reg, 1 << 31);
- }
- else if (REG_IS_W(src_size))
- {
- host_arm64_TST_IMM(block, src_reg, 1 << 15);
- }
- else if (REG_IS_B(src_size))
- {
- host_arm64_TST_IMM(block, src_reg, 1 << 7);
- }
- else
- fatal("TEST_JS_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm64_BNE_(block);
-
- return 0;
-}
-
-static int codegen_XOR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm64_EOR_REG_V(block, dest_reg, src_reg_a, src_reg_b);
- }
- else if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm64_EOR_REG(block, dest_reg, src_reg_a, src_reg_b, 0);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm64_AND_IMM(block, REG_TEMP, src_reg_b, 0xffff);
- host_arm64_EOR_REG(block, dest_reg, src_reg_a, REG_TEMP, 0);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm64_AND_IMM(block, REG_TEMP, src_reg_b, 0xff);
- host_arm64_EOR_REG(block, dest_reg, src_reg_a, REG_TEMP, 0);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_BH(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm64_UBFX(block, REG_TEMP, src_reg_b, 8, 8);
- host_arm64_EOR_REG(block, dest_reg, src_reg_a, REG_TEMP, 0);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_B(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm64_AND_IMM(block, REG_TEMP, src_reg_b, 0xff);
- host_arm64_EOR_REG(block, dest_reg, src_reg_a, REG_TEMP, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_BH(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm64_UBFX(block, REG_TEMP, src_reg_b, 8, 8);
- host_arm64_EOR_REG(block, dest_reg, src_reg_a, REG_TEMP, 8);
- }
- else
- fatal("XOR %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_XOR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm64_EOR_IMM(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size) && dest_reg == src_reg)
- {
- host_arm64_EOR_IMM(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size) && dest_reg == src_reg)
- {
- host_arm64_EOR_IMM(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size) && dest_reg == src_reg)
- {
- host_arm64_EOR_IMM(block, dest_reg, src_reg, uop->imm_data << 8);
- }
- else
- fatal("XOR_IMM %x %x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-
-const uOpFn uop_handlers[UOP_MAX] =
-{
- [UOP_CALL_FUNC & UOP_MASK] = codegen_CALL_FUNC,
- [UOP_CALL_FUNC_RESULT & UOP_MASK] = codegen_CALL_FUNC_RESULT,
- [UOP_CALL_INSTRUCTION_FUNC & UOP_MASK] = codegen_CALL_INSTRUCTION_FUNC,
-
- [UOP_JMP & UOP_MASK] = codegen_JMP,
-
- [UOP_LOAD_SEG & UOP_MASK] = codegen_LOAD_SEG,
-
- [UOP_LOAD_FUNC_ARG_0 & UOP_MASK] = codegen_LOAD_FUNC_ARG0,
- [UOP_LOAD_FUNC_ARG_1 & UOP_MASK] = codegen_LOAD_FUNC_ARG1,
- [UOP_LOAD_FUNC_ARG_2 & UOP_MASK] = codegen_LOAD_FUNC_ARG2,
- [UOP_LOAD_FUNC_ARG_3 & UOP_MASK] = codegen_LOAD_FUNC_ARG3,
-
- [UOP_LOAD_FUNC_ARG_0_IMM & UOP_MASK] = codegen_LOAD_FUNC_ARG0_IMM,
- [UOP_LOAD_FUNC_ARG_1_IMM & UOP_MASK] = codegen_LOAD_FUNC_ARG1_IMM,
- [UOP_LOAD_FUNC_ARG_2_IMM & UOP_MASK] = codegen_LOAD_FUNC_ARG2_IMM,
- [UOP_LOAD_FUNC_ARG_3_IMM & UOP_MASK] = codegen_LOAD_FUNC_ARG3_IMM,
-
- [UOP_STORE_P_IMM & UOP_MASK] = codegen_STORE_PTR_IMM,
- [UOP_STORE_P_IMM_8 & UOP_MASK] = codegen_STORE_PTR_IMM_8,
-
- [UOP_MEM_LOAD_ABS & UOP_MASK] = codegen_MEM_LOAD_ABS,
- [UOP_MEM_LOAD_REG & UOP_MASK] = codegen_MEM_LOAD_REG,
- [UOP_MEM_LOAD_SINGLE & UOP_MASK] = codegen_MEM_LOAD_SINGLE,
- [UOP_MEM_LOAD_DOUBLE & UOP_MASK] = codegen_MEM_LOAD_DOUBLE,
-
- [UOP_MEM_STORE_ABS & UOP_MASK] = codegen_MEM_STORE_ABS,
- [UOP_MEM_STORE_REG & UOP_MASK] = codegen_MEM_STORE_REG,
- [UOP_MEM_STORE_IMM_8 & UOP_MASK] = codegen_MEM_STORE_IMM_8,
- [UOP_MEM_STORE_IMM_16 & UOP_MASK] = codegen_MEM_STORE_IMM_16,
- [UOP_MEM_STORE_IMM_32 & UOP_MASK] = codegen_MEM_STORE_IMM_32,
- [UOP_MEM_STORE_SINGLE & UOP_MASK] = codegen_MEM_STORE_SINGLE,
- [UOP_MEM_STORE_DOUBLE & UOP_MASK] = codegen_MEM_STORE_DOUBLE,
-
- [UOP_MOV & UOP_MASK] = codegen_MOV,
- [UOP_MOV_PTR & UOP_MASK] = codegen_MOV_PTR,
- [UOP_MOV_IMM & UOP_MASK] = codegen_MOV_IMM,
- [UOP_MOVSX & UOP_MASK] = codegen_MOVSX,
- [UOP_MOVZX & UOP_MASK] = codegen_MOVZX,
- [UOP_MOV_DOUBLE_INT & UOP_MASK] = codegen_MOV_DOUBLE_INT,
- [UOP_MOV_INT_DOUBLE & UOP_MASK] = codegen_MOV_INT_DOUBLE,
- [UOP_MOV_INT_DOUBLE_64 & UOP_MASK] = codegen_MOV_INT_DOUBLE_64,
- [UOP_MOV_REG_PTR & UOP_MASK] = codegen_MOV_REG_PTR,
- [UOP_MOVZX_REG_PTR_8 & UOP_MASK] = codegen_MOVZX_REG_PTR_8,
- [UOP_MOVZX_REG_PTR_16 & UOP_MASK] = codegen_MOVZX_REG_PTR_16,
-
- [UOP_ADD & UOP_MASK] = codegen_ADD,
- [UOP_ADD_IMM & UOP_MASK] = codegen_ADD_IMM,
- [UOP_ADD_LSHIFT & UOP_MASK] = codegen_ADD_LSHIFT,
- [UOP_AND & UOP_MASK] = codegen_AND,
- [UOP_AND_IMM & UOP_MASK] = codegen_AND_IMM,
- [UOP_ANDN & UOP_MASK] = codegen_ANDN,
- [UOP_OR & UOP_MASK] = codegen_OR,
- [UOP_OR_IMM & UOP_MASK] = codegen_OR_IMM,
- [UOP_SUB & UOP_MASK] = codegen_SUB,
- [UOP_SUB_IMM & UOP_MASK] = codegen_SUB_IMM,
- [UOP_XOR & UOP_MASK] = codegen_XOR,
- [UOP_XOR_IMM & UOP_MASK] = codegen_XOR_IMM,
-
- [UOP_SAR & UOP_MASK] = codegen_SAR,
- [UOP_SAR_IMM & UOP_MASK] = codegen_SAR_IMM,
- [UOP_SHL & UOP_MASK] = codegen_SHL,
- [UOP_SHL_IMM & UOP_MASK] = codegen_SHL_IMM,
- [UOP_SHR & UOP_MASK] = codegen_SHR,
- [UOP_SHR_IMM & UOP_MASK] = codegen_SHR_IMM,
- [UOP_ROL & UOP_MASK] = codegen_ROL,
- [UOP_ROL_IMM & UOP_MASK] = codegen_ROL_IMM,
- [UOP_ROR & UOP_MASK] = codegen_ROR,
- [UOP_ROR_IMM & UOP_MASK] = codegen_ROR_IMM,
-
- [UOP_CMP_IMM_JZ & UOP_MASK] = codegen_CMP_IMM_JZ,
-
- [UOP_CMP_JB & UOP_MASK] = codegen_CMP_JB,
- [UOP_CMP_JNBE & UOP_MASK] = codegen_CMP_JNBE,
-
- [UOP_CMP_JNB_DEST & UOP_MASK] = codegen_CMP_JNB_DEST,
- [UOP_CMP_JNBE_DEST & UOP_MASK] = codegen_CMP_JNBE_DEST,
- [UOP_CMP_JNL_DEST & UOP_MASK] = codegen_CMP_JNL_DEST,
- [UOP_CMP_JNLE_DEST & UOP_MASK] = codegen_CMP_JNLE_DEST,
- [UOP_CMP_JNO_DEST & UOP_MASK] = codegen_CMP_JNO_DEST,
- [UOP_CMP_JNZ_DEST & UOP_MASK] = codegen_CMP_JNZ_DEST,
- [UOP_CMP_JB_DEST & UOP_MASK] = codegen_CMP_JB_DEST,
- [UOP_CMP_JBE_DEST & UOP_MASK] = codegen_CMP_JBE_DEST,
- [UOP_CMP_JL_DEST & UOP_MASK] = codegen_CMP_JL_DEST,
- [UOP_CMP_JLE_DEST & UOP_MASK] = codegen_CMP_JLE_DEST,
- [UOP_CMP_JO_DEST & UOP_MASK] = codegen_CMP_JO_DEST,
- [UOP_CMP_JZ_DEST & UOP_MASK] = codegen_CMP_JZ_DEST,
-
- [UOP_CMP_IMM_JNZ_DEST & UOP_MASK] = codegen_CMP_IMM_JNZ_DEST,
- [UOP_CMP_IMM_JZ_DEST & UOP_MASK] = codegen_CMP_IMM_JZ_DEST,
-
- [UOP_TEST_JNS_DEST & UOP_MASK] = codegen_TEST_JNS_DEST,
- [UOP_TEST_JS_DEST & UOP_MASK] = codegen_TEST_JS_DEST,
-
- [UOP_FP_ENTER & UOP_MASK] = codegen_FP_ENTER,
- [UOP_MMX_ENTER & UOP_MASK] = codegen_MMX_ENTER,
-
- [UOP_FADD & UOP_MASK] = codegen_FADD,
- [UOP_FCOM & UOP_MASK] = codegen_FCOM,
- [UOP_FDIV & UOP_MASK] = codegen_FDIV,
- [UOP_FMUL & UOP_MASK] = codegen_FMUL,
- [UOP_FSUB & UOP_MASK] = codegen_FSUB,
-
- [UOP_FABS & UOP_MASK] = codegen_FABS,
- [UOP_FCHS & UOP_MASK] = codegen_FCHS,
- [UOP_FSQRT & UOP_MASK] = codegen_FSQRT,
- [UOP_FTST & UOP_MASK] = codegen_FTST,
-
- [UOP_PACKSSWB & UOP_MASK] = codegen_PACKSSWB,
- [UOP_PACKSSDW & UOP_MASK] = codegen_PACKSSDW,
- [UOP_PACKUSWB & UOP_MASK] = codegen_PACKUSWB,
-
- [UOP_PADDB & UOP_MASK] = codegen_PADDB,
- [UOP_PADDW & UOP_MASK] = codegen_PADDW,
- [UOP_PADDD & UOP_MASK] = codegen_PADDD,
- [UOP_PADDSB & UOP_MASK] = codegen_PADDSB,
- [UOP_PADDSW & UOP_MASK] = codegen_PADDSW,
- [UOP_PADDUSB & UOP_MASK] = codegen_PADDUSB,
- [UOP_PADDUSW & UOP_MASK] = codegen_PADDUSW,
-
- [UOP_PCMPEQB & UOP_MASK] = codegen_PCMPEQB,
- [UOP_PCMPEQW & UOP_MASK] = codegen_PCMPEQW,
- [UOP_PCMPEQD & UOP_MASK] = codegen_PCMPEQD,
- [UOP_PCMPGTB & UOP_MASK] = codegen_PCMPGTB,
- [UOP_PCMPGTW & UOP_MASK] = codegen_PCMPGTW,
- [UOP_PCMPGTD & UOP_MASK] = codegen_PCMPGTD,
-
- [UOP_PF2ID & UOP_MASK] = codegen_PF2ID,
- [UOP_PFADD & UOP_MASK] = codegen_PFADD,
- [UOP_PFCMPEQ & UOP_MASK] = codegen_PFCMPEQ,
- [UOP_PFCMPGE & UOP_MASK] = codegen_PFCMPGE,
- [UOP_PFCMPGT & UOP_MASK] = codegen_PFCMPGT,
- [UOP_PFMAX & UOP_MASK] = codegen_PFMAX,
- [UOP_PFMIN & UOP_MASK] = codegen_PFMIN,
- [UOP_PFMUL & UOP_MASK] = codegen_PFMUL,
- [UOP_PFRCP & UOP_MASK] = codegen_PFRCP,
- [UOP_PFRSQRT & UOP_MASK] = codegen_PFRSQRT,
- [UOP_PFSUB & UOP_MASK] = codegen_PFSUB,
- [UOP_PI2FD & UOP_MASK] = codegen_PI2FD,
-
- [UOP_PMADDWD & UOP_MASK] = codegen_PMADDWD,
- [UOP_PMULHW & UOP_MASK] = codegen_PMULHW,
- [UOP_PMULLW & UOP_MASK] = codegen_PMULLW,
-
- [UOP_PSLLW_IMM & UOP_MASK] = codegen_PSLLW_IMM,
- [UOP_PSLLD_IMM & UOP_MASK] = codegen_PSLLD_IMM,
- [UOP_PSLLQ_IMM & UOP_MASK] = codegen_PSLLQ_IMM,
- [UOP_PSRAW_IMM & UOP_MASK] = codegen_PSRAW_IMM,
- [UOP_PSRAD_IMM & UOP_MASK] = codegen_PSRAD_IMM,
- [UOP_PSRAQ_IMM & UOP_MASK] = codegen_PSRAQ_IMM,
- [UOP_PSRLW_IMM & UOP_MASK] = codegen_PSRLW_IMM,
- [UOP_PSRLD_IMM & UOP_MASK] = codegen_PSRLD_IMM,
- [UOP_PSRLQ_IMM & UOP_MASK] = codegen_PSRLQ_IMM,
-
- [UOP_PSUBB & UOP_MASK] = codegen_PSUBB,
- [UOP_PSUBW & UOP_MASK] = codegen_PSUBW,
- [UOP_PSUBD & UOP_MASK] = codegen_PSUBD,
- [UOP_PSUBSB & UOP_MASK] = codegen_PSUBSB,
- [UOP_PSUBSW & UOP_MASK] = codegen_PSUBSW,
- [UOP_PSUBUSB & UOP_MASK] = codegen_PSUBUSB,
- [UOP_PSUBUSW & UOP_MASK] = codegen_PSUBUSW,
-
- [UOP_PUNPCKHBW & UOP_MASK] = codegen_PUNPCKHBW,
- [UOP_PUNPCKHWD & UOP_MASK] = codegen_PUNPCKHWD,
- [UOP_PUNPCKHDQ & UOP_MASK] = codegen_PUNPCKHDQ,
- [UOP_PUNPCKLBW & UOP_MASK] = codegen_PUNPCKLBW,
- [UOP_PUNPCKLWD & UOP_MASK] = codegen_PUNPCKLWD,
- [UOP_PUNPCKLDQ & UOP_MASK] = codegen_PUNPCKLDQ,
-
- [UOP_NOP_BARRIER & UOP_MASK] = codegen_NOP
-};
-
-void codegen_direct_read_8(codeblock_t *block, int host_reg, void *p)
-{
- if (in_range12_b((uintptr_t)p - (uintptr_t)&cpu_state))
- host_arm64_LDRB_IMM_W(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_direct_read_8 - not in range\n");
-}
-void codegen_direct_read_16(codeblock_t *block, int host_reg, void *p)
-{
- if (in_range12_h((uintptr_t)p - (uintptr_t)&cpu_state))
- host_arm64_LDRH_IMM(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_direct_read_16 - not in range\n");
-}
-void codegen_direct_read_32(codeblock_t *block, int host_reg, void *p)
-{
- if (in_range12_w((uintptr_t)p - (uintptr_t)&cpu_state))
- host_arm64_LDR_IMM_W(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_direct_read_32 - not in range\n");
-}
-void codegen_direct_read_64(codeblock_t *block, int host_reg, void *p)
-{
- if (in_range12_q((uintptr_t)p - (uintptr_t)&cpu_state))
- host_arm64_LDR_IMM_F64(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_direct_read_double - not in range\n");
-}
-void codegen_direct_read_pointer(codeblock_t *block, int host_reg, void *p)
-{
- if (in_range12_q((uintptr_t)p - (uintptr_t)&cpu_state))
- host_arm64_LDR_IMM_X(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_direct_read_pointer - not in range\n");
-}
-void codegen_direct_read_double(codeblock_t *block, int host_reg, void *p)
-{
- if (in_range12_q((uintptr_t)p - (uintptr_t)&cpu_state))
- host_arm64_LDR_IMM_F64(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_direct_read_double - not in range\n");
-}
-void codegen_direct_read_st_8(codeblock_t *block, int host_reg, void *base, int reg_idx)
-{
- host_arm64_LDR_IMM_W(block, REG_TEMP, REG_XSP, IREG_TOP_diff_stack_offset);
- host_arm64_ADD_IMM(block, REG_TEMP, REG_TEMP, reg_idx);
- host_arm64_ADDX_IMM(block, REG_TEMP2, REG_CPUSTATE, (uintptr_t)base - (uintptr_t)&cpu_state);
- host_arm64_AND_IMM(block, REG_TEMP, REG_TEMP, 7);
- host_arm64_LDRB_REG(block, host_reg, REG_TEMP2, REG_TEMP);
-}
-void codegen_direct_read_st_64(codeblock_t *block, int host_reg, void *base, int reg_idx)
-{
- host_arm64_LDR_IMM_W(block, REG_TEMP, REG_XSP, IREG_TOP_diff_stack_offset);
- host_arm64_ADD_IMM(block, REG_TEMP, REG_TEMP, reg_idx);
- host_arm64_ADDX_IMM(block, REG_TEMP2, REG_CPUSTATE, (uintptr_t)base - (uintptr_t)&cpu_state);
- host_arm64_AND_IMM(block, REG_TEMP, REG_TEMP, 7);
- host_arm64_LDR_REG_F64_S(block, host_reg, REG_TEMP2, REG_TEMP);
-}
-void codegen_direct_read_st_double(codeblock_t *block, int host_reg, void *base, int reg_idx)
-{
- host_arm64_LDR_IMM_W(block, REG_TEMP, REG_XSP, IREG_TOP_diff_stack_offset);
- host_arm64_ADD_IMM(block, REG_TEMP, REG_TEMP, reg_idx);
- host_arm64_ADDX_IMM(block, REG_TEMP2, REG_CPUSTATE, (uintptr_t)base - (uintptr_t)&cpu_state);
- host_arm64_AND_IMM(block, REG_TEMP, REG_TEMP, 7);
- host_arm64_LDR_REG_F64_S(block, host_reg, REG_TEMP2, REG_TEMP);
-}
-
-void codegen_direct_write_8(codeblock_t *block, void *p, int host_reg)
-{
- if (in_range12_b((uintptr_t)p - (uintptr_t)&cpu_state))
- host_arm64_STRB_IMM(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_direct_write_8 - not in range\n");
-}
-void codegen_direct_write_16(codeblock_t *block, void *p, int host_reg)
-{
- if (in_range12_h((uintptr_t)p - (uintptr_t)&cpu_state))
- host_arm64_STRH_IMM(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_direct_write_16 - not in range\n");
-}
-void codegen_direct_write_32(codeblock_t *block, void *p, int host_reg)
-{
- if (in_range12_w((uintptr_t)p - (uintptr_t)&cpu_state))
- host_arm64_STR_IMM_W(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_direct_write_32 - not in range\n");
-}
-void codegen_direct_write_64(codeblock_t *block, void *p, int host_reg)
-{
- if (in_range12_q((uintptr_t)p - (uintptr_t)&cpu_state))
- host_arm64_STR_IMM_F64(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_direct_write_double - not in range\n");
-}
-void codegen_direct_write_double(codeblock_t *block, void *p, int host_reg)
-{
- if (in_range12_q((uintptr_t)p - (uintptr_t)&cpu_state))
- host_arm64_STR_IMM_F64(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_direct_write_double - not in range\n");
-}
-void codegen_direct_write_st_8(codeblock_t *block, void *base, int reg_idx, int host_reg)
-{
- host_arm64_LDR_IMM_W(block, REG_TEMP, REG_XSP, IREG_TOP_diff_stack_offset);
- host_arm64_ADD_IMM(block, REG_TEMP, REG_TEMP, reg_idx);
- host_arm64_ADDX_IMM(block, REG_TEMP2, REG_CPUSTATE, (uintptr_t)base - (uintptr_t)&cpu_state);
- host_arm64_AND_IMM(block, REG_TEMP, REG_TEMP, 7);
- host_arm64_STRB_REG(block, host_reg, REG_TEMP2, REG_TEMP);
-}
-void codegen_direct_write_st_64(codeblock_t *block, void *base, int reg_idx, int host_reg)
-{
- host_arm64_LDR_IMM_W(block, REG_TEMP, REG_XSP, IREG_TOP_diff_stack_offset);
- host_arm64_ADD_IMM(block, REG_TEMP, REG_TEMP, reg_idx);
- host_arm64_ADDX_IMM(block, REG_TEMP2, REG_CPUSTATE, (uintptr_t)base - (uintptr_t)&cpu_state);
- host_arm64_AND_IMM(block, REG_TEMP, REG_TEMP, 7);
- host_arm64_STR_REG_F64_S(block, host_reg, REG_TEMP2, REG_TEMP);
-}
-void codegen_direct_write_st_double(codeblock_t *block, void *base, int reg_idx, int host_reg)
-{
- host_arm64_LDR_IMM_W(block, REG_TEMP, REG_XSP, IREG_TOP_diff_stack_offset);
- host_arm64_ADD_IMM(block, REG_TEMP, REG_TEMP, reg_idx);
- host_arm64_ADDX_IMM(block, REG_TEMP2, REG_CPUSTATE, (uintptr_t)base - (uintptr_t)&cpu_state);
- host_arm64_AND_IMM(block, REG_TEMP, REG_TEMP, 7);
- host_arm64_STR_REG_F64_S(block, host_reg, REG_TEMP2, REG_TEMP);
-}
-
-void codegen_direct_write_ptr(codeblock_t *block, void *p, int host_reg)
-{
- if (in_range12_q((uintptr_t)p - (uintptr_t)&cpu_state))
- host_arm64_STR_IMM_Q(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_direct_write_ptr - not in range\n");
-}
-
-void codegen_direct_read_16_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- if (in_range12_h(stack_offset))
- host_arm64_LDRH_IMM(block, host_reg, REG_XSP, stack_offset);
- else
- fatal("codegen_direct_read_32_stack - not in range\n");
-}
-void codegen_direct_read_32_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- if (in_range12_w(stack_offset))
- host_arm64_LDR_IMM_W(block, host_reg, REG_XSP, stack_offset);
- else
- fatal("codegen_direct_read_32_stack - not in range\n");
-}
-void codegen_direct_read_pointer_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- if (in_range12_q(stack_offset))
- host_arm64_LDR_IMM_X(block, host_reg, REG_XSP, stack_offset);
- else
- fatal("codegen_direct_read_pointer_stack - not in range\n");
-}
-void codegen_direct_read_64_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- host_arm64_LDR_IMM_F64(block, host_reg, REG_XSP, stack_offset);
-}
-void codegen_direct_read_double_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- host_arm64_LDR_IMM_F64(block, host_reg, REG_XSP, stack_offset);
-}
-
-void codegen_direct_write_32_stack(codeblock_t *block, int stack_offset, int host_reg)
-{
- if (in_range12_w(stack_offset))
- host_arm64_STR_IMM_W(block, host_reg, REG_XSP, stack_offset);
- else
- fatal("codegen_direct_write_32_stack - not in range\n");
-}
-void codegen_direct_write_64_stack(codeblock_t *block, int stack_offset, int host_reg)
-{
- host_arm64_STR_IMM_F64(block, host_reg, REG_XSP, stack_offset);
-}
-void codegen_direct_write_double_stack(codeblock_t *block, int stack_offset, int host_reg)
-{
- host_arm64_STR_IMM_F64(block, host_reg, REG_XSP, stack_offset);
-}
-
-void codegen_set_jump_dest(codeblock_t *block, void *p)
-{
- host_arm64_branch_set_offset(p, &block_write_data[block_pos]);
-}
-#endif
diff --git a/src/codegen_backend_arm_defs.h b/src/codegen_backend_arm_defs.h
deleted file mode 100644
index 2f50129..0000000
--- a/src/codegen_backend_arm_defs.h
+++ /dev/null
@@ -1,89 +0,0 @@
-#define REG_R0 0
-#define REG_R1 1
-#define REG_R2 2
-#define REG_R3 3
-#define REG_R4 4
-#define REG_R5 5
-#define REG_R6 6
-#define REG_R7 7
-#define REG_R8 8
-#define REG_R9 9
-#define REG_R10 10
-#define REG_R11 11
-#define REG_R12 12
-#define REG_HOST_SP 13
-#define REG_LR 14
-#define REG_PC 15
-
-#define REG_ARG0 REG_R0
-#define REG_ARG1 REG_R1
-#define REG_ARG2 REG_R2
-#define REG_ARG3 REG_R3
-
-#define REG_CPUSTATE REG_R10
-
-#define REG_TEMP REG_R3
-#define REG_TEMP2 REG_R2
-
-#define REG_D0 0
-#define REG_D1 1
-#define REG_D2 2
-#define REG_D3 3
-#define REG_D4 4
-#define REG_D5 5
-#define REG_D6 6
-#define REG_D7 7
-#define REG_D8 8
-#define REG_D9 9
-#define REG_D10 10
-#define REG_D11 11
-#define REG_D12 12
-#define REG_D13 13
-#define REG_D14 14
-#define REG_D15 15
-
-#define REG_D_TEMP REG_D0
-#define REG_Q_TEMP REG_D0
-#define REG_Q_TEMP_2 REG_D2
-
-#define REG_MASK_R0 (1 << REG_R0)
-#define REG_MASK_R1 (1 << REG_R1)
-#define REG_MASK_R2 (1 << REG_R2)
-#define REG_MASK_R3 (1 << REG_R3)
-#define REG_MASK_R4 (1 << REG_R4)
-#define REG_MASK_R5 (1 << REG_R5)
-#define REG_MASK_R6 (1 << REG_R6)
-#define REG_MASK_R7 (1 << REG_R7)
-#define REG_MASK_R8 (1 << REG_R8)
-#define REG_MASK_R9 (1 << REG_R9)
-#define REG_MASK_R10 (1 << REG_R10)
-#define REG_MASK_R11 (1 << REG_R11)
-#define REG_MASK_R12 (1 << REG_R12)
-#define REG_MASK_SP (1 << REG_HOST_SP)
-#define REG_MASK_LR (1 << REG_LR)
-#define REG_MASK_PC (1 << REG_PC)
-
-#define REG_MASK_LOCAL (REG_MASK_R4 | REG_MASK_R5 | REG_MASK_R6 | REG_MASK_R7 | \
- REG_MASK_R8 | REG_MASK_R9 | REG_MASK_R10 | REG_MASK_R11)
-
-#define CODEGEN_HOST_REGS 7
-#define CODEGEN_HOST_FP_REGS 8
-
-extern void *codegen_mem_load_byte;
-extern void *codegen_mem_load_word;
-extern void *codegen_mem_load_long;
-extern void *codegen_mem_load_quad;
-extern void *codegen_mem_load_single;
-extern void *codegen_mem_load_double;
-
-extern void *codegen_mem_store_byte;
-extern void *codegen_mem_store_word;
-extern void *codegen_mem_store_long;
-extern void *codegen_mem_store_quad;
-extern void *codegen_mem_store_single;
-extern void *codegen_mem_store_double;
-
-extern void *codegen_fp_round;
-
-extern void *codegen_gpf_rout;
-extern void *codegen_exit_rout;
diff --git a/src/codegen_backend_arm_ops.c b/src/codegen_backend_arm_ops.c
deleted file mode 100644
index 9be45f2..0000000
--- a/src/codegen_backend_arm_ops.c
+++ /dev/null
@@ -1,1272 +0,0 @@
-#ifdef __ARM_EABI__
-
-#include "ibm.h"
-#include "codegen.h"
-#include "codegen_allocator.h"
-#include "codegen_backend.h"
-#include "codegen_backend_arm_defs.h"
-#include "codegen_backend_arm_ops.h"
-
-#define Rm(x) (x)
-#define Rs(x) ((x) << 8)
-#define Rd(x) ((x) << 12)
-#define Rt(x) ((x) << 12)
-#define Rn(x) ((x) << 16)
-#define Rt2(x) ((x) << 16)
-
-#define Vm(x) (x)
-#define Vd(x) ((x) << 12)
-#define Vn(x) ((x) << 16)
-
-#define DATA_OFFSET_UP (1 << 23)
-#define DATA_OFFSET_DOWN (0 << 23)
-
-#define OPCODE_SHIFT 20
-#define OPCODE_ADD_IMM (0x28 << OPCODE_SHIFT)
-#define OPCODE_ADD_REG (0x08 << OPCODE_SHIFT)
-#define OPCODE_AND_IMM (0x20 << OPCODE_SHIFT)
-#define OPCODE_AND_REG (0x00 << OPCODE_SHIFT)
-#define OPCODE_B (0xa0 << OPCODE_SHIFT)
-#define OPCODE_BIC_IMM (0x3c << OPCODE_SHIFT)
-#define OPCODE_BIC_REG (0x1c << OPCODE_SHIFT)
-#define OPCODE_BL (0xb0 << OPCODE_SHIFT)
-#define OPCODE_CMN_IMM (0x37 << OPCODE_SHIFT)
-#define OPCODE_CMN_REG (0x17 << OPCODE_SHIFT)
-#define OPCODE_CMP_IMM (0x35 << OPCODE_SHIFT)
-#define OPCODE_CMP_REG (0x15 << OPCODE_SHIFT)
-#define OPCODE_EOR_IMM (0x22 << OPCODE_SHIFT)
-#define OPCODE_EOR_REG (0x02 << OPCODE_SHIFT)
-#define OPCODE_LDMIA_WB (0x8b << OPCODE_SHIFT)
-#define OPCODE_LDR_IMM (0x51 << OPCODE_SHIFT)
-#define OPCODE_LDR_IMM_POST (0x41 << OPCODE_SHIFT)
-#define OPCODE_LDR_REG (0x79 << OPCODE_SHIFT)
-#define OPCODE_LDRB_IMM (0x55 << OPCODE_SHIFT)
-#define OPCODE_LDRB_REG (0x7d << OPCODE_SHIFT)
-#define OPCODE_MOV_IMM (0x3a << OPCODE_SHIFT)
-#define OPCODE_MOVT_IMM (0x34 << OPCODE_SHIFT)
-#define OPCODE_MOVW_IMM (0x30 << OPCODE_SHIFT)
-#define OPCODE_MOV_REG (0x1a << OPCODE_SHIFT)
-#define OPCODE_MVN_REG (0x1e << OPCODE_SHIFT)
-#define OPCODE_ORR_IMM (0x38 << OPCODE_SHIFT)
-#define OPCODE_ORR_REG (0x18 << OPCODE_SHIFT)
-#define OPCODE_RSB_IMM (0x26 << OPCODE_SHIFT)
-#define OPCODE_RSB_REG (0x06 << OPCODE_SHIFT)
-#define OPCODE_STMDB_WB (0x92 << OPCODE_SHIFT)
-#define OPCODE_STR_IMM (0x50 << OPCODE_SHIFT)
-#define OPCODE_STR_IMM_WB (0x52 << OPCODE_SHIFT)
-#define OPCODE_STR_REG (0x78 << OPCODE_SHIFT)
-#define OPCODE_STRB_IMM (0x54 << OPCODE_SHIFT)
-#define OPCODE_STRB_REG (0x7c << OPCODE_SHIFT)
-#define OPCODE_SUB_IMM (0x24 << OPCODE_SHIFT)
-#define OPCODE_SUB_REG (0x04 << OPCODE_SHIFT)
-#define OPCODE_TST_IMM (0x31 << OPCODE_SHIFT)
-#define OPCODE_TST_REG (0x11 << OPCODE_SHIFT)
-
-#define OPCODE_BFI 0xe7c00010
-#define OPCODE_BLX 0xe12fff30
-#define OPCODE_BX 0xe12fff10
-#define OPCODE_LDRH_IMM 0xe1d000b0
-#define OPCODE_LDRH_REG 0xe19000b0
-#define OPCODE_STRH_IMM 0xe1c000b0
-#define OPCODE_STRH_REG 0xe18000b0
-#define OPCODE_SXTB 0xe6af0070
-#define OPCODE_SXTH 0xe6bf0070
-#define OPCODE_UADD8 0xe6500f90
-#define OPCODE_UADD16 0xe6500f10
-#define OPCODE_USUB8 0xe6500ff0
-#define OPCODE_USUB16 0xe6500f70
-#define OPCODE_UXTB 0xe6ef0070
-#define OPCODE_UXTH 0xe6ff0070
-#define OPCODE_VABS_D 0xeeb00bc0
-#define OPCODE_VADD 0xee300b00
-#define OPCODE_VADD_I8 0xf2000800
-#define OPCODE_VADD_I16 0xf2100800
-#define OPCODE_VADD_I32 0xf2200800
-#define OPCODE_VADD_F32 0xf2000d00
-#define OPCODE_VAND_D 0xf2000110
-#define OPCODE_VBIC_D 0xf2100110
-#define OPCODE_VCEQ_F32 0xf2000e00
-#define OPCODE_VCEQ_I8 0xf3000810
-#define OPCODE_VCEQ_I16 0xf3100810
-#define OPCODE_VCEQ_I32 0xf3200810
-#define OPCODE_VCGE_F32 0xf3000e00
-#define OPCODE_VCGT_F32 0xf3200e00
-#define OPCODE_VCGT_S8 0xf2000300
-#define OPCODE_VCGT_S16 0xf2100300
-#define OPCODE_VCGT_S32 0xf2200300
-#define OPCODE_VCMP_D 0xeeb40b40
-#define OPCODE_VCVT_D_IS 0xeeb80bc0
-#define OPCODE_VCVT_D_S 0xeeb70ac0
-#define OPCODE_VCVT_F32_S32 0xf3bb0700
-#define OPCODE_VCVT_IS_D 0xeebd0bc0
-#define OPCODE_VCVT_S32_F32 0xf3bb0600
-#define OPCODE_VCVT_S_D 0xeeb70bc0
-#define OPCODE_VCVTR_IS_D 0xeebd0b40
-#define OPCODE_VDIV 0xee800b00
-#define OPCODE_VDIV_S 0xee800a00
-#define OPCODE_VDUP_32 0xf3b40c00
-#define OPCODE_VEOR_D 0xf3000110
-#define OPCODE_VLDR_D 0xed900b00
-#define OPCODE_VLDR_S 0xed900a00
-#define OPCODE_VMAX_F32 0xf200f00
-#define OPCODE_VMIN_F32 0xf220f00
-#define OPCODE_VMOV_32_S 0xee100a10
-#define OPCODE_VMOV_64_D 0xec500b10
-#define OPCODE_VMOV_D_64 0xec400b10
-#define OPCODE_VMOV_S_32 0xee000a10
-#define OPCODE_VMOV_D_D 0xeeb00b40
-#define OPCODE_VMOVN_I32 0xf3b60200
-#define OPCODE_VMOVN_I64 0xf3ba0200
-#define OPCODE_VMOV_F32_ONE 0xf2870f10
-#define OPCODE_VMRS_APSR 0xeef1fa10
-#define OPCODE_VMSR_FPSCR 0xeee10a10
-#define OPCODE_VMUL 0xee200b00
-#define OPCODE_VMUL_F32 0xf3000d10
-#define OPCODE_VMUL_S16 0xf2100910
-#define OPCODE_VMULL_S16 0xf2900c00
-#define OPCODE_VNEG_D 0xeeb10b40
-#define OPCODE_VORR_D 0xf2200110
-#define OPCODE_VPADDL_S16 0xf3b40200
-#define OPCODE_VPADDL_S32 0xf3b80200
-#define OPCODE_VPADDL_Q_S32 0xf3b80240
-#define OPCODE_VQADD_S8 0xf2000010
-#define OPCODE_VQADD_S16 0xf2100010
-#define OPCODE_VQADD_U8 0xf3000010
-#define OPCODE_VQADD_U16 0xf3100010
-#define OPCODE_VQMOVN_S16 0xf3b20280
-#define OPCODE_VQMOVN_S32 0xf3b60280
-#define OPCODE_VQMOVN_U16 0xf3b202c0
-#define OPCODE_VQSUB_S8 0xf2000210
-#define OPCODE_VQSUB_S16 0xf2100210
-#define OPCODE_VQSUB_U8 0xf3000210
-#define OPCODE_VQSUB_U16 0xf3100210
-#define OPCODE_VSHL_D_IMM_16 0xf2900510
-#define OPCODE_VSHL_D_IMM_32 0xf2a00510
-#define OPCODE_VSHL_D_IMM_64 0xf2800590
-#define OPCODE_VSHR_D_S16 0xf2900010
-#define OPCODE_VSHR_D_S32 0xf2a00010
-#define OPCODE_VSHR_D_S64 0xf2800090
-#define OPCODE_VSHR_D_U16 0xf3900010
-#define OPCODE_VSHR_D_U32 0xf3a00010
-#define OPCODE_VSHR_D_U64 0xf3800090
-#define OPCODE_VSHRN 0xf2800810
-#define OPCODE_VSQRT_D 0xeeb10bc0
-#define OPCODE_VSQRT_S 0xeeb10ac0
-#define OPCODE_VSTR_D 0xed800b00
-#define OPCODE_VSTR_S 0xed800a00
-#define OPCODE_VSUB 0xee300b40
-#define OPCODE_VSUB_I8 0xf3000800
-#define OPCODE_VSUB_I16 0xf3100800
-#define OPCODE_VSUB_I32 0xf3200800
-#define OPCODE_VSUB_F32 0xf3000d00
-#define OPCODE_VZIP_D8 0xf3b20180
-#define OPCODE_VZIP_D16 0xf3b60180
-#define OPCODE_VZIP_D32 0xf3ba0080
-
-#define B_OFFSET(x) (((x) >> 2) & 0xffffff)
-
-#define SHIFT_TYPE_SHIFT 5
-#define SHIFT_TYPE_LSL (0 << SHIFT_TYPE_SHIFT)
-#define SHIFT_TYPE_LSR (1 << SHIFT_TYPE_SHIFT)
-#define SHIFT_TYPE_ASR (2 << SHIFT_TYPE_SHIFT)
-#define SHIFT_TYPE_ROR (3 << SHIFT_TYPE_SHIFT)
-
-#define SHIFT_TYPE_IMM (0 << 4)
-#define SHIFT_TYPE_REG (1 << 4)
-
-#define SHIFT_IMM_SHIFT 7
-#define SHIFT_ASR_IMM(x) (SHIFT_TYPE_ASR | SHIFT_TYPE_IMM | ((x) << SHIFT_IMM_SHIFT))
-#define SHIFT_LSL_IMM(x) (SHIFT_TYPE_LSL | SHIFT_TYPE_IMM | ((x) << SHIFT_IMM_SHIFT))
-#define SHIFT_LSR_IMM(x) (SHIFT_TYPE_LSR | SHIFT_TYPE_IMM | ((x) << SHIFT_IMM_SHIFT))
-#define SHIFT_ROR_IMM(x) (SHIFT_TYPE_ROR | SHIFT_TYPE_IMM | ((x) << SHIFT_IMM_SHIFT))
-
-#define SHIFT_ASR_REG(x) (SHIFT_TYPE_ASR | SHIFT_TYPE_REG | Rs(x))
-#define SHIFT_LSL_REG(x) (SHIFT_TYPE_LSL | SHIFT_TYPE_REG | Rs(x))
-#define SHIFT_LSR_REG(x) (SHIFT_TYPE_LSR | SHIFT_TYPE_REG | Rs(x))
-#define SHIFT_ROR_REG(x) (SHIFT_TYPE_ROR | SHIFT_TYPE_REG | Rs(x))
-
-#define BFI_lsb(lsb) ((lsb) << 7)
-#define BFI_msb(msb) ((msb) << 16)
-
-#define UXTB_ROTATE(rotate) (((rotate) >> 3) << 10)
-
-#define MOVT_IMM(imm) (((imm) & 0xfff) | (((imm) & 0xf000) << 4))
-#define MOVW_IMM(imm) (((imm) & 0xfff) | (((imm) & 0xf000) << 4))
-
-#define LDRH_IMM(imm) (((imm) & 0xf) | (((imm) & 0xf0) << 4))
-#define STRH_IMM(imm) LDRH_IMM(imm)
-
-#define VSHIFT_IMM(shift) ((shift) << 16)
-
-#define VSHIFT_IMM_32(shift) (((16 - (shift)) | 0x10) << 16)
-
-#define VDUP_32_IMM(imm) ((imm) << 19)
-
-static void codegen_allocate_new_block(codeblock_t *block);
-
-static inline void codegen_addlong(codeblock_t *block, uint32_t val)
-{
- if (block_pos >= (BLOCK_MAX-4))
- codegen_allocate_new_block(block);
- *(uint32_t *)&block_write_data[block_pos] = val;
- block_pos += 4;
-}
-
-static void codegen_allocate_new_block(codeblock_t *block)
-{
- /*Current block is full. Allocate a new block*/
- struct mem_block_t *new_block = codegen_allocator_allocate(block->head_mem_block, get_block_nr(block));
- uint8_t *new_ptr = codeblock_allocator_get_ptr(new_block);
- uint32_t offset = ((uintptr_t)new_ptr - (uintptr_t)&block_write_data[block_pos]) - 8;
-
- /*Add a jump instruction to the new block*/
- *(uint32_t *)&block_write_data[block_pos] = COND_AL | OPCODE_B | B_OFFSET(offset);
-
- /*Set write address to start of new block*/
- block_pos = 0;
- block_write_data = new_ptr;
-}
-
-static inline void codegen_alloc_4(codeblock_t *block)
-{
- if (block_pos >= (BLOCK_MAX-4))
- codegen_allocate_new_block(block);
-}
-
-void codegen_alloc(codeblock_t *block, int size)
-{
- if (block_pos >= (BLOCK_MAX-size))
- codegen_allocate_new_block(block);
-}
-
-static inline uint32_t arm_data_offset(int offset)
-{
- if (offset < -0xffc || offset > 0xffc)
- fatal("arm_data_offset out of range - %i\n", offset);
-
- if (offset >= 0)
- return offset | DATA_OFFSET_UP;
- return (-offset) | DATA_OFFSET_DOWN;
-}
-
-static inline int get_arm_imm(uint32_t imm_data, uint32_t *arm_imm)
-{
- int shift = 0;
-//pclog("get_arm_imm - imm_data=%08x\n", imm_data);
- if (!(imm_data & 0xffff))
- {
- shift += 16;
- imm_data >>= 16;
- }
- if (!(imm_data & 0xff))
- {
- shift += 8;
- imm_data >>= 8;
- }
- if (!(imm_data & 0xf))
- {
- shift += 4;
- imm_data >>= 4;
- }
- if (!(imm_data & 0x3))
- {
- shift += 2;
- imm_data >>= 2;
- }
- if (imm_data > 0xff) /*Note - should handle rotation round the word*/
- return 0;
-//pclog(" imm_data=%02x shift=%i\n", imm_data, shift);
- *arm_imm = imm_data | ((((32 - shift) >> 1) & 15) << 8);
- return 1;
-}
-
-static inline int in_range(void *addr, void *base)
-{
- int diff = (uintptr_t)addr - (uintptr_t)base;
-
- if (diff < -4095 || diff > 4095)
- return 0;
- return 1;
-}
-
-void host_arm_ADD_REG_LSL(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift);
-void host_arm_AND_REG_LSL(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift);
-void host_arm_EOR_REG_LSL(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift);
-//void host_arm_ORR_REG_LSL(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift);
-void host_arm_SUB_REG_LSL(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift);
-
-void host_arm_ADD_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t imm)
-{
- uint32_t arm_imm;
-
- if ((int32_t)imm < 0 && imm != 0x80000000)
- {
- host_arm_SUB_IMM(block, dst_reg, src_reg, -(int32_t)imm);
- }
- else if (get_arm_imm(imm, &arm_imm))
- {
- codegen_addlong(block, COND_AL | OPCODE_ADD_IMM | Rd(dst_reg) | Rn(src_reg) | arm_imm);
- }
- else
- {
- host_arm_MOV_IMM(block, REG_TEMP, imm);
- host_arm_ADD_REG_LSL(block, dst_reg, src_reg, REG_TEMP, 0);
- }
-}
-
-void host_arm_ADD_REG_LSL(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_ADD_REG | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m) | SHIFT_LSL_IMM(shift));
-}
-void host_arm_ADD_REG_LSR(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_ADD_REG | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m) | SHIFT_LSR_IMM(shift));
-}
-
-void host_arm_AND_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t imm)
-{
- uint32_t arm_imm;
-
- if (get_arm_imm(imm, &arm_imm))
- {
- codegen_addlong(block, COND_AL | OPCODE_AND_IMM | Rd(dst_reg) | Rn(src_reg) | arm_imm);
- }
- else if (get_arm_imm(~imm, &arm_imm))
- {
- codegen_addlong(block, COND_AL | OPCODE_BIC_IMM | Rd(dst_reg) | Rn(src_reg) | arm_imm);
- }
- else
- {
- host_arm_MOV_IMM(block, REG_TEMP, imm);
- host_arm_AND_REG_LSL(block, dst_reg, src_reg, REG_TEMP, 0);
- }
-}
-
-void host_arm_AND_REG_LSL(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_AND_REG | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m) | SHIFT_LSL_IMM(shift));
-}
-void host_arm_AND_REG_LSR(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_AND_REG | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m) | SHIFT_LSR_IMM(shift));
-}
-
-void host_arm_B(codeblock_t *block, uintptr_t dest_addr)
-{
- uint32_t offset;
-
- codegen_alloc_4(block);
- offset = (dest_addr - (uintptr_t)&block_write_data[block_pos]) - 8;
-
- if ((offset & 0xfe000000) && (offset & 0xfe000000) != 0xfe000000)
- {
- host_arm_MOV_IMM(block, REG_R3, dest_addr);
- host_arm_BX(block, REG_R3);
- }
- else
- codegen_addlong(block, COND_AL | OPCODE_B | B_OFFSET(offset));
-}
-
-void host_arm_BFI(codeblock_t *block, int dst_reg, int src_reg, int lsb, int width)
-{
- codegen_addlong(block, OPCODE_BFI | Rd(dst_reg) | Rm(src_reg) | BFI_lsb(lsb) | BFI_msb((lsb + width) - 1));
-}
-
-void host_arm_BIC_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t imm)
-{
- uint32_t arm_imm;
-
- if (get_arm_imm(imm, &arm_imm))
- {
- codegen_addlong(block, COND_AL | OPCODE_BIC_IMM | Rd(dst_reg) | Rn(src_reg) | arm_imm);
- }
- else if (get_arm_imm(~imm, &arm_imm))
- {
- codegen_addlong(block, COND_AL | OPCODE_AND_IMM | Rd(dst_reg) | Rn(src_reg) | arm_imm);
- }
- else
- {
- host_arm_MOV_IMM(block, REG_TEMP, imm);
- host_arm_BIC_REG_LSL(block, dst_reg, src_reg, REG_TEMP, 0);
- }
-}
-void host_arm_BIC_REG_LSL(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_BIC_REG | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m) | SHIFT_LSL_IMM(shift));
-}
-void host_arm_BIC_REG_LSR(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_BIC_REG | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m) | SHIFT_LSR_IMM(shift));
-}
-
-void host_arm_BL(codeblock_t *block, uintptr_t dest_addr)
-{
- uint32_t offset;
-
- codegen_alloc_4(block);
- offset = (dest_addr - (uintptr_t)&block_write_data[block_pos]) - 8;
-
- if ((offset & 0xfe000000) && (offset & 0xfe000000) != 0xfe000000)
- {
- host_arm_MOV_IMM(block, REG_R3, dest_addr);
- host_arm_BLX(block, REG_R3);
- }
- else
- codegen_addlong(block, COND_AL | OPCODE_BL | B_OFFSET(offset));
-}
-void host_arm_BL_r1(codeblock_t *block, uintptr_t dest_addr)
-{
- uint32_t offset;
-
- codegen_alloc_4(block);
- offset = (dest_addr - (uintptr_t)&block_write_data[block_pos]) - 8;
-
- if ((offset & 0xfe000000) && (offset & 0xfe000000) != 0xfe000000)
- {
- host_arm_MOV_IMM(block, REG_R1, dest_addr);
- host_arm_BLX(block, REG_R1);
- }
- else
- codegen_addlong(block, COND_AL | OPCODE_BL | B_OFFSET(offset));
-}
-void host_arm_BLX(codeblock_t *block, int addr_reg)
-{
- codegen_addlong(block, OPCODE_BLX | Rm(addr_reg));
-}
-
-uint32_t *host_arm_BCC_(codeblock_t *block)
-{
- codegen_addlong(block, COND_CC | OPCODE_B);
-
- return (uint32_t *)&block_write_data[block_pos - 4];
-}
-uint32_t *host_arm_BCS_(codeblock_t *block)
-{
- codegen_addlong(block, COND_CS | OPCODE_B);
-
- return (uint32_t *)&block_write_data[block_pos - 4];
-}
-uint32_t *host_arm_BEQ_(codeblock_t *block)
-{
- codegen_addlong(block, COND_EQ | OPCODE_B);
-
- return (uint32_t *)&block_write_data[block_pos - 4];
-}
-uint32_t *host_arm_BGE_(codeblock_t *block)
-{
- codegen_addlong(block, COND_GE | OPCODE_B);
-
- return (uint32_t *)&block_write_data[block_pos - 4];
-}
-uint32_t *host_arm_BGT_(codeblock_t *block)
-{
- codegen_addlong(block, COND_GT | OPCODE_B);
-
- return (uint32_t *)&block_write_data[block_pos - 4];
-}
-uint32_t *host_arm_BHI_(codeblock_t *block)
-{
- codegen_addlong(block, COND_HI | OPCODE_B);
-
- return (uint32_t *)&block_write_data[block_pos - 4];
-}
-uint32_t *host_arm_BLE_(codeblock_t *block)
-{
- codegen_addlong(block, COND_LE | OPCODE_B);
-
- return (uint32_t *)&block_write_data[block_pos - 4];
-}
-uint32_t *host_arm_BLS_(codeblock_t *block)
-{
- codegen_addlong(block, COND_LS | OPCODE_B);
-
- return (uint32_t *)&block_write_data[block_pos - 4];
-}
-uint32_t *host_arm_BLT_(codeblock_t *block)
-{
- codegen_addlong(block, COND_LT | OPCODE_B);
-
- return (uint32_t *)&block_write_data[block_pos - 4];
-}
-uint32_t *host_arm_BMI_(codeblock_t *block)
-{
- codegen_addlong(block, COND_MI | OPCODE_B);
-
- return (uint32_t *)&block_write_data[block_pos - 4];
-}
-uint32_t *host_arm_BNE_(codeblock_t *block)
-{
- codegen_addlong(block, COND_NE | OPCODE_B);
-
- return (uint32_t *)&block_write_data[block_pos - 4];
-}
-uint32_t *host_arm_BPL_(codeblock_t *block)
-{
- codegen_addlong(block, COND_PL | OPCODE_B);
-
- return (uint32_t *)&block_write_data[block_pos - 4];
-}
-uint32_t *host_arm_BVC_(codeblock_t *block)
-{
- codegen_addlong(block, COND_VC | OPCODE_B);
-
- return (uint32_t *)&block_write_data[block_pos - 4];
-}
-uint32_t *host_arm_BVS_(codeblock_t *block)
-{
- codegen_addlong(block, COND_VS | OPCODE_B);
-
- return (uint32_t *)&block_write_data[block_pos - 4];
-}
-
-void host_arm_BEQ(codeblock_t *block, uintptr_t dest_addr)
-{
- uint32_t offset;
-
- codegen_alloc_4(block);
- offset = (dest_addr - (uintptr_t)&block_write_data[block_pos]) - 8;
-
- if ((offset & 0xfe000000) && (offset & 0xfe000000) != 0xfe000000)
- fatal("host_arm_BEQ - out of range %08x %i\n", offset, offset);
-
- codegen_addlong(block, COND_EQ | OPCODE_B | B_OFFSET(offset));
-}
-void host_arm_BNE(codeblock_t *block, uintptr_t dest_addr)
-{
- uint32_t offset;
-
- codegen_alloc_4(block);
- offset = (dest_addr - (uintptr_t)&block_write_data[block_pos]) - 8;
-
- if ((offset & 0xfe000000) && (offset & 0xfe000000) != 0xfe000000)
- fatal("host_arm_BNE - out of range %08x %i\n", offset, offset);
-
- codegen_addlong(block, COND_NE | OPCODE_B | B_OFFSET(offset));
-}
-
-void host_arm_BX(codeblock_t *block, int addr_reg)
-{
- codegen_addlong(block, OPCODE_BLX | Rm(addr_reg));
-}
-
-void host_arm_CMN_IMM(codeblock_t *block, int src_reg, uint32_t imm)
-{
- uint32_t arm_imm;
-
- if ((int32_t)imm < 0 && imm != 0x80000000)
- {
- host_arm_CMP_IMM(block, src_reg, -(int32_t)imm);
- }
- else if (get_arm_imm(imm, &arm_imm))
- {
- codegen_addlong(block, COND_AL | OPCODE_CMN_IMM | Rn(src_reg) | arm_imm);
- }
- else
- {
- host_arm_MOV_IMM(block, REG_TEMP, imm);
- host_arm_CMN_REG_LSL(block, src_reg, REG_TEMP, 0);
- }
-}
-void host_arm_CMN_REG_LSL(codeblock_t *block, int src_reg_n, int src_reg_m, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_CMN_REG | Rn(src_reg_n) | Rm(src_reg_m) | SHIFT_LSL_IMM(shift));
-}
-
-void host_arm_CMP_IMM(codeblock_t *block, int src_reg, uint32_t imm)
-{
- uint32_t arm_imm;
-
- if ((int32_t)imm < 0 && imm != 0x80000000)
- {
- host_arm_CMN_IMM(block, src_reg, -(int32_t)imm);
- }
- else if (get_arm_imm(imm, &arm_imm))
- {
- codegen_addlong(block, COND_AL | OPCODE_CMP_IMM | Rn(src_reg) | arm_imm);
- }
- else
- {
- host_arm_MOV_IMM(block, REG_TEMP, imm);
- host_arm_CMP_REG_LSL(block, src_reg, REG_TEMP, 0);
- }
-}
-void host_arm_CMP_REG_LSL(codeblock_t *block, int src_reg_n, int src_reg_m, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_CMP_REG | Rn(src_reg_n) | Rm(src_reg_m) | SHIFT_LSL_IMM(shift));
-}
-
-void host_arm_EOR_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t imm)
-{
- uint32_t arm_imm;
-
- if (get_arm_imm(imm, &arm_imm))
- {
- codegen_addlong(block, COND_AL | OPCODE_EOR_IMM | Rd(dst_reg) | Rn(src_reg) | arm_imm);
- }
- else
- {
- host_arm_MOV_IMM(block, REG_TEMP, imm);
- host_arm_EOR_REG_LSL(block, dst_reg, src_reg, REG_TEMP, 0);
- }
-}
-
-void host_arm_EOR_REG_LSL(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_EOR_REG | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m) | SHIFT_LSL_IMM(shift));
-}
-
-void host_arm_LDMIA_WB(codeblock_t *block, int addr_reg, uint32_t reg_mask)
-{
- codegen_addlong(block, COND_AL | OPCODE_LDMIA_WB | Rn(addr_reg) | reg_mask);
-}
-
-void host_arm_LDR_IMM(codeblock_t *block, int dst_reg, int addr_reg, int offset)
-{
- codegen_addlong(block, COND_AL | OPCODE_LDR_IMM | Rn(addr_reg) | Rd(dst_reg) | arm_data_offset(offset));
-}
-void host_arm_LDR_IMM_POST(codeblock_t *block, int dst_reg, int addr_reg, int offset)
-{
- codegen_addlong(block, COND_AL | OPCODE_LDR_IMM_POST | Rn(addr_reg) | Rd(dst_reg) | arm_data_offset(offset));
-}
-void host_arm_LDR_REG_LSL(codeblock_t *block, int dst_reg, int addr_reg, int offset_reg, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_LDR_REG | Rn(addr_reg) | Rd(dst_reg) | Rm(offset_reg) | SHIFT_LSL_IMM(shift));
-}
-
-void host_arm_LDRB_ABS(codeblock_t *block, int dst_reg, void *p)
-{
- if (in_range(p, &cpu_state))
- host_arm_LDRB_IMM(block, dst_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- fatal("LDRB_ABS - not in range\n");
-}
-void host_arm_LDRB_IMM(codeblock_t *block, int dst_reg, int addr_reg, int offset)
-{
- codegen_addlong(block, COND_AL | OPCODE_LDRB_IMM | Rn(addr_reg) | Rd(dst_reg) | arm_data_offset(offset));
-}
-void host_arm_LDRB_REG_LSL(codeblock_t *block, int dst_reg, int addr_reg, int offset_reg, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_LDRB_REG | Rn(addr_reg) | Rd(dst_reg) | Rm(offset_reg) | SHIFT_LSL_IMM(shift));
-}
-
-void host_arm_LDRH_IMM(codeblock_t *block, int dst_reg, int addr_reg, int offset)
-{
- codegen_addlong(block, COND_AL | OPCODE_LDRH_IMM | Rn(addr_reg) | Rd(dst_reg) | LDRH_IMM(offset));
-}
-void host_arm_LDRH_REG(codeblock_t *block, int dst_reg, int addr_reg, int offset_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_LDRH_REG | Rn(addr_reg) | Rd(dst_reg) | Rm(offset_reg));
-}
-
-void host_arm_MOV_IMM(codeblock_t *block, int dst_reg, uint32_t imm)
-{
- uint32_t arm_imm;
-
- if (get_arm_imm(imm, &arm_imm))
- {
- codegen_addlong(block, COND_AL | OPCODE_MOV_IMM | Rd(dst_reg) | arm_imm);
- }
- else
- {
- host_arm_MOVW_IMM(block, dst_reg, imm & 0xffff);
- if (imm >> 16)
- host_arm_MOVT_IMM(block, dst_reg, imm >> 16);
- }
-}
-
-void host_arm_MOV_REG_ASR(codeblock_t *block, int dst_reg, int src_reg, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_MOV_REG | Rd(dst_reg) | Rm(src_reg) | SHIFT_ASR_IMM(shift));
-}
-void host_arm_MOV_REG_ASR_REG(codeblock_t *block, int dst_reg, int src_reg, int shift_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_MOV_REG | Rd(dst_reg) | Rm(src_reg) | SHIFT_ASR_REG(shift_reg));
-}
-void host_arm_MOV_REG_LSL(codeblock_t *block, int dst_reg, int src_reg, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_MOV_REG | Rd(dst_reg) | Rm(src_reg) | SHIFT_LSL_IMM(shift));
-}
-void host_arm_MOV_REG_LSL_REG(codeblock_t *block, int dst_reg, int src_reg, int shift_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_MOV_REG | Rd(dst_reg) | Rm(src_reg) | SHIFT_LSL_REG(shift_reg));
-}
-void host_arm_MOV_REG_LSR(codeblock_t *block, int dst_reg, int src_reg, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_MOV_REG | Rd(dst_reg) | Rm(src_reg) | SHIFT_LSR_IMM(shift));
-}
-void host_arm_MOV_REG_LSR_REG(codeblock_t *block, int dst_reg, int src_reg, int shift_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_MOV_REG | Rd(dst_reg) | Rm(src_reg) | SHIFT_LSR_REG(shift_reg));
-}
-void host_arm_MOV_REG_ROR(codeblock_t *block, int dst_reg, int src_reg, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_MOV_REG | Rd(dst_reg) | Rm(src_reg) | SHIFT_ROR_IMM(shift));
-}
-void host_arm_MOV_REG_ROR_REG(codeblock_t *block, int dst_reg, int src_reg, int shift_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_MOV_REG | Rd(dst_reg) | Rm(src_reg) | SHIFT_ROR_REG(shift_reg));
-}
-
-void host_arm_MOVT_IMM(codeblock_t *block, int dst_reg, uint16_t imm)
-{
- codegen_addlong(block, COND_AL | OPCODE_MOVT_IMM | Rd(dst_reg) | MOVT_IMM(imm));
-}
-void host_arm_MOVW_IMM(codeblock_t *block, int dst_reg, uint16_t imm)
-{
- codegen_addlong(block, COND_AL | OPCODE_MOVW_IMM | Rd(dst_reg) | MOVW_IMM(imm));
-}
-
-void host_arm_MVN_REG_LSL(codeblock_t *block, int dst_reg, int src_reg, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_MVN_REG | Rd(dst_reg) | Rm(src_reg) | SHIFT_LSL_IMM(shift));
-}
-
-void host_arm_ORR_IMM_cond(codeblock_t *block, uint32_t cond, int dst_reg, int src_reg, uint32_t imm)
-{
- uint32_t arm_imm;
-
- if (get_arm_imm(imm, &arm_imm))
- {
- codegen_addlong(block, cond | OPCODE_ORR_IMM | Rd(dst_reg) | Rn(src_reg) | arm_imm);
- }
- else
- {
- host_arm_MOV_IMM(block, REG_TEMP, imm);
- host_arm_ORR_REG_LSL_cond(block, cond, dst_reg, src_reg, REG_TEMP, 0);
- }
-}
-
-void host_arm_ORR_REG_LSL_cond(codeblock_t *block, uint32_t cond, int dst_reg, int src_reg_n, int src_reg_m, int shift)
-{
- codegen_addlong(block, cond | OPCODE_ORR_REG | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m) | SHIFT_LSL_IMM(shift));
-}
-
-void host_arm_RSB_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t imm)
-{
- uint32_t arm_imm;
-
- if (get_arm_imm(imm, &arm_imm))
- {
- codegen_addlong(block, COND_AL | OPCODE_RSB_IMM | Rd(dst_reg) | Rn(src_reg) | arm_imm);
- }
- else
- {
- host_arm_MOV_IMM(block, REG_TEMP, imm);
- host_arm_RSB_REG_LSL(block, dst_reg, src_reg, REG_TEMP, 0);
- }
-}
-void host_arm_RSB_REG_LSL(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_RSB_REG | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m) | SHIFT_LSL_IMM(shift));
-}
-void host_arm_RSB_REG_LSR(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_RSB_REG | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m) | SHIFT_LSR_IMM(shift));
-}
-
-void host_arm_STMDB_WB(codeblock_t *block, int addr_reg, uint32_t reg_mask)
-{
- codegen_addlong(block, COND_AL | OPCODE_STMDB_WB | Rn(addr_reg) | reg_mask);
-}
-
-void host_arm_STR_IMM(codeblock_t *block, int src_reg, int addr_reg, int offset)
-{
- codegen_addlong(block, COND_AL | OPCODE_STR_IMM | Rn(addr_reg) | Rd(src_reg) | arm_data_offset(offset));
-}
-void host_arm_STR_IMM_WB(codeblock_t *block, int src_reg, int addr_reg, int offset)
-{
- codegen_addlong(block, COND_AL | OPCODE_STR_IMM_WB | Rn(addr_reg) | Rd(src_reg) | arm_data_offset(offset));
-}
-void host_arm_STR_REG_LSL(codeblock_t *block, int src_reg, int addr_reg, int offset_reg, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_STR_REG | Rn(addr_reg) | Rd(src_reg) | Rm(offset_reg) | SHIFT_LSL_IMM(shift));
-}
-
-void host_arm_STRB_IMM(codeblock_t *block, int src_reg, int addr_reg, int offset)
-{
- codegen_addlong(block, COND_AL | OPCODE_STRB_IMM | Rn(addr_reg) | Rd(src_reg) | arm_data_offset(offset));
-}
-void host_arm_STRB_REG_LSL(codeblock_t *block, int src_reg, int addr_reg, int offset_reg, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_STRB_REG | Rn(addr_reg) | Rd(src_reg) | Rm(offset_reg) | SHIFT_LSL_IMM(shift));
-}
-
-void host_arm_STRH_IMM(codeblock_t *block, int dst_reg, int addr_reg, int offset)
-{
- codegen_addlong(block, COND_AL | OPCODE_STRH_IMM | Rn(addr_reg) | Rd(dst_reg) | STRH_IMM(offset));
-}
-void host_arm_STRH_REG(codeblock_t *block, int src_reg, int addr_reg, int offset_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_STRH_REG | Rn(addr_reg) | Rd(src_reg) | Rm(offset_reg));
-}
-
-void host_arm_SUB_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t imm)
-{
- uint32_t arm_imm;
-
- if ((int32_t)imm < 0 && imm != 0x80000000)
- {
- host_arm_ADD_IMM(block, dst_reg, src_reg, -(int32_t)imm);
- }
- else if (get_arm_imm(imm, &arm_imm))
- {
- codegen_addlong(block, COND_AL | OPCODE_SUB_IMM | Rd(dst_reg) | Rn(src_reg) | arm_imm);
- }
- else
- {
- host_arm_MOV_IMM(block, REG_TEMP, imm);
- host_arm_SUB_REG_LSL(block, dst_reg, src_reg, REG_TEMP, 0);
- }
-}
-
-void host_arm_SUB_REG_LSL(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_SUB_REG | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m) | SHIFT_LSL_IMM(shift));
-}
-void host_arm_SUB_REG_LSR(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift)
-{
- codegen_addlong(block, COND_AL | OPCODE_SUB_REG | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m) | SHIFT_LSR_IMM(shift));
-}
-
-void host_arm_SXTB(codeblock_t *block, int dst_reg, int src_reg, int rotate)
-{
- codegen_addlong(block, OPCODE_SXTB | Rd(dst_reg) | Rm(src_reg) | UXTB_ROTATE(rotate));
-}
-void host_arm_SXTH(codeblock_t *block, int dst_reg, int src_reg, int rotate)
-{
- codegen_addlong(block, OPCODE_SXTH | Rd(dst_reg) | Rm(src_reg) | UXTB_ROTATE(rotate));
-}
-
-void host_arm_TST_IMM(codeblock_t *block, int src_reg, uint32_t imm)
-{
- uint32_t arm_imm;
-
- if (get_arm_imm(imm, &arm_imm))
- {
- codegen_addlong(block, COND_AL | OPCODE_TST_IMM | Rn(src_reg) | arm_imm);
- }
- else
- {
- host_arm_MOV_IMM(block, REG_TEMP, imm);
- host_arm_TST_REG(block, src_reg, REG_TEMP);
- }
-}
-void host_arm_TST_REG(codeblock_t *block, int src_reg1, int src_reg2)
-{
- codegen_addlong(block, COND_AL | OPCODE_TST_REG | Rn(src_reg1) | Rm(src_reg2));
-}
-
-void host_arm_UADD8(codeblock_t *block, int dst_reg, int src_reg_a, int src_reg_b)
-{
- codegen_addlong(block, COND_AL | OPCODE_UADD8 | Rd(dst_reg) | Rn(src_reg_a) | Rm(src_reg_b));
-}
-
-void host_arm_UADD16(codeblock_t *block, int dst_reg, int src_reg_a, int src_reg_b)
-{
- codegen_addlong(block, COND_AL | OPCODE_UADD16 | Rd(dst_reg) | Rn(src_reg_a) | Rm(src_reg_b));
-}
-
-void host_arm_USUB8(codeblock_t *block, int dst_reg, int src_reg_a, int src_reg_b)
-{
- codegen_addlong(block, COND_AL | OPCODE_USUB8 | Rd(dst_reg) | Rn(src_reg_a) | Rm(src_reg_b));
-}
-
-void host_arm_USUB16(codeblock_t *block, int dst_reg, int src_reg_a, int src_reg_b)
-{
- codegen_addlong(block, COND_AL | OPCODE_USUB16 | Rd(dst_reg) | Rn(src_reg_a) | Rm(src_reg_b));
-}
-
-void host_arm_UXTB(codeblock_t *block, int dst_reg, int src_reg, int rotate)
-{
- codegen_addlong(block, OPCODE_UXTB | Rd(dst_reg) | Rm(src_reg) | UXTB_ROTATE(rotate));
-}
-
-void host_arm_UXTH(codeblock_t *block, int dst_reg, int src_reg, int rotate)
-{
- codegen_addlong(block, OPCODE_UXTH | Rd(dst_reg) | Rm(src_reg) | UXTB_ROTATE(rotate));
-}
-
-void host_arm_VABS_D(codeblock_t *block, int dest_reg, int src_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_VABS_D | Vd(dest_reg) | Vm(src_reg));
-}
-
-void host_arm_VADD_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, COND_AL | OPCODE_VADD | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VADD_F32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, COND_AL | OPCODE_VADD_F32 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VADD_I8(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VADD_I8 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VADD_I16(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VADD_I16 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VADD_I32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VADD_I32 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VAND_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VAND_D | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VBIC_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VBIC_D | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VCMP_D(codeblock_t *block, int src_reg_d, int src_reg_m)
-{
- codegen_addlong(block, COND_AL | OPCODE_VCMP_D | Rd(src_reg_d) | Rm(src_reg_m));
-}
-
-void host_arm_VCEQ_F32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VCEQ_F32 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VCEQ_I8(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VCEQ_I8 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VCEQ_I16(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VCEQ_I16 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VCEQ_I32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VCEQ_I32 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VCGE_F32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VCGE_F32 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VCGT_F32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VCGT_F32 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VCGT_S8(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VCGT_S8 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VCGT_S16(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VCGT_S16 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VCGT_S32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VCGT_S32 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-
-void host_arm_VCVT_D_IS(codeblock_t *block, int dest_reg, int src_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_VCVT_D_IS | Vd(dest_reg) | Vm(src_reg));
-}
-void host_arm_VCVT_D_S(codeblock_t *block, int dest_reg, int src_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_VCVT_D_S | Vd(dest_reg) | Vm(src_reg));
-}
-void host_arm_VCVT_F32_S32(codeblock_t *block, int dest_reg, int src_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_VCVT_F32_S32 | Vd(dest_reg) | Vm(src_reg));
-}
-void host_arm_VCVT_IS_D(codeblock_t *block, int dest_reg, int src_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_VCVT_IS_D | Vd(dest_reg) | Vm(src_reg));
-}
-void host_arm_VCVT_S32_F32(codeblock_t *block, int dest_reg, int src_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_VCVT_S32_F32 | Vd(dest_reg) | Vm(src_reg));
-}
-void host_arm_VCVT_S_D(codeblock_t *block, int dest_reg, int src_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_VCVT_S_D | Vd(dest_reg) | Vm(src_reg));
-}
-void host_arm_VCVTR_IS_D(codeblock_t *block, int dest_reg, int src_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_VCVTR_IS_D | Vd(dest_reg) | Vm(src_reg));
-}
-void host_arm_VDIV_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, COND_AL | OPCODE_VDIV | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VDIV_S(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, COND_AL | OPCODE_VDIV_S | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VDUP_32(codeblock_t *block, int dst_reg, int src_reg_m, int imm)
-{
- codegen_addlong(block, COND_AL | OPCODE_VDUP_32 | Rd(dst_reg) | Rm(src_reg_m) | VDUP_32_IMM(imm));
-}
-void host_arm_VEOR_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VEOR_D | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VLDR_D(codeblock_t *block, int dest_reg, int base_reg, int offset)
-{
- if ((offset > 1020) || (offset & 3))
- fatal("VLDR_D bad offset %i\n", offset);
- codegen_addlong(block, COND_AL | OPCODE_VLDR_D | Rd(dest_reg) | Rn(base_reg) | (offset >> 2));
-}
-void host_arm_VLDR_S(codeblock_t *block, int dest_reg, int base_reg, int offset)
-{
- if ((offset > 1020) || (offset & 3))
- fatal("VLDR_S bad offset %i\n", offset);
- codegen_addlong(block, COND_AL | OPCODE_VLDR_S | Rd(dest_reg) | Rn(base_reg) | (offset >> 2));
-}
-void host_arm_VMOV_32_S(codeblock_t *block, int dest_reg, int src_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_VMOV_32_S | Rt(dest_reg) | Vn(src_reg));
-}
-void host_arm_VMOV_64_D(codeblock_t *block, int dest_reg_low, int dest_reg_high, int src_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_VMOV_64_D | Rt(dest_reg_low) | Rt2(dest_reg_high) | Vm(src_reg));
-}
-void host_arm_VMOV_D_64(codeblock_t *block, int dest_reg, int src_reg_low, int src_reg_high)
-{
- codegen_addlong(block, COND_AL | OPCODE_VMOV_D_64 | Vm(dest_reg) | Rt(src_reg_low) | Rt2(src_reg_high));
-}
-void host_arm_VMOV_S_32(codeblock_t *block, int dest_reg, int src_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_VMOV_S_32 | Vn(dest_reg) | Rt(src_reg));
-}
-void host_arm_VMOV_D_D(codeblock_t *block, int dest_reg, int src_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_VMOV_D_D | Vd(dest_reg) | Vm(src_reg));
-}
-void host_arm_VMOVN_I32(codeblock_t *block, int dest_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_VMOVN_I32 | Vd(dest_reg) | Vm(src_reg));
-}
-void host_arm_VMOVN_I64(codeblock_t *block, int dest_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_VMOVN_I64 | Vd(dest_reg) | Vm(src_reg));
-}
-void host_arm_VMOV_F32_ONE(codeblock_t *block, int dst_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_VMOV_F32_ONE | Rd(dst_reg));
-}
-void host_arm_VMSR_FPSCR(codeblock_t *block, int src_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_VMSR_FPSCR | Rd(src_reg));
-}
-void host_arm_VMRS_APSR(codeblock_t *block)
-{
- codegen_addlong(block, COND_AL | OPCODE_VMRS_APSR);
-}
-
-void host_arm_VMAX_F32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VMAX_F32 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VMIN_F32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VMIN_F32 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-
-void host_arm_VMUL_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, COND_AL | OPCODE_VMUL | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VMUL_F32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, COND_AL | OPCODE_VMUL_F32 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VMUL_S16(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VMUL_S16 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VMULL_S16(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VMULL_S16 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-
-void host_arm_VNEG_D(codeblock_t *block, int dest_reg, int src_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_VNEG_D | Vd(dest_reg) | Vm(src_reg));
-}
-
-void host_arm_VORR_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VORR_D | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-
-void host_arm_VPADDL_S16(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_VPADDL_S16 | Vd(dst_reg) | Vm(src_reg));
-}
-void host_arm_VPADDL_S32(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_VPADDL_S32 | Vd(dst_reg) | Vm(src_reg));
-}
-void host_arm_VPADDL_Q_S32(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_VPADDL_Q_S32 | Vd(dst_reg) | Vm(src_reg));
-}
-
-void host_arm_VQADD_S8(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VQADD_S8 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VQADD_S16(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VQADD_S16 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VQADD_U8(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VQADD_U8 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VQADD_U16(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VQADD_U16 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VQSUB_S8(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VQSUB_S8 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VQSUB_S16(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VQSUB_S16 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VQSUB_U8(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VQSUB_U8 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VQSUB_U16(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VQSUB_U16 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-
-void host_arm_VQMOVN_S16(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_VQMOVN_S16 | Vd(dst_reg) | Vm(src_reg));
-}
-void host_arm_VQMOVN_S32(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_VQMOVN_S32 | Vd(dst_reg) | Vm(src_reg));
-}
-void host_arm_VQMOVN_U16(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_addlong(block, OPCODE_VQMOVN_U16 | Vd(dst_reg) | Vm(src_reg));
-}
-
-void host_arm_VSHL_D_IMM_16(codeblock_t *block, int dst_reg, int src_reg, int shift)
-{
- if (shift > 15)
- fatal("host_arm_VSHL_D_IMM_16 : shift > 15\n");
- codegen_addlong(block, OPCODE_VSHL_D_IMM_16 | Vd(dst_reg) | Vm(src_reg) | VSHIFT_IMM(shift));
-}
-void host_arm_VSHL_D_IMM_32(codeblock_t *block, int dst_reg, int src_reg, int shift)
-{
- if (shift > 31)
- fatal("host_arm_VSHL_D_IMM_32 : shift > 31\n");
- codegen_addlong(block, OPCODE_VSHL_D_IMM_32 | Vd(dst_reg) | Vm(src_reg) | VSHIFT_IMM(shift));
-}
-void host_arm_VSHL_D_IMM_64(codeblock_t *block, int dst_reg, int src_reg, int shift)
-{
- if (shift > 63)
- fatal("host_arm_VSHL_D_IMM_64 : shift > 63\n");
- codegen_addlong(block, OPCODE_VSHL_D_IMM_64 | Vd(dst_reg) | Vm(src_reg) | VSHIFT_IMM(shift));
-}
-void host_arm_VSHR_D_S16(codeblock_t *block, int dst_reg, int src_reg, int shift)
-{
- if (shift > 15)
- fatal("host_arm_VSHR_SD_IMM_16 : shift > 15\n");
- codegen_addlong(block, OPCODE_VSHR_D_S16 | Vd(dst_reg) | Vm(src_reg) | VSHIFT_IMM(16-shift));
-}
-void host_arm_VSHR_D_S32(codeblock_t *block, int dst_reg, int src_reg, int shift)
-{
- if (shift > 31)
- fatal("host_arm_VSHR_SD_IMM_32 : shift > 31\n");
- codegen_addlong(block, OPCODE_VSHR_D_S32 | Vd(dst_reg) | Vm(src_reg) | VSHIFT_IMM(32-shift));
-}
-void host_arm_VSHR_D_S64(codeblock_t *block, int dst_reg, int src_reg, int shift)
-{
- if (shift > 63)
- fatal("host_arm_VSHR_SD_IMM_64 : shift > 63\n");
- codegen_addlong(block, OPCODE_VSHR_D_S64 | Vd(dst_reg) | Vm(src_reg) | VSHIFT_IMM(64-shift));
-}
-void host_arm_VSHR_D_U16(codeblock_t *block, int dst_reg, int src_reg, int shift)
-{
- if (shift > 15)
- fatal("host_arm_VSHR_UD_IMM_16 : shift > 15\n");
- codegen_addlong(block, OPCODE_VSHR_D_U16 | Vd(dst_reg) | Vm(src_reg) | VSHIFT_IMM(16-shift));
-}
-void host_arm_VSHR_D_U32(codeblock_t *block, int dst_reg, int src_reg, int shift)
-{
- if (shift > 31)
- fatal("host_arm_VSHR_UD_IMM_32 : shift > 31\n");
- codegen_addlong(block, OPCODE_VSHR_D_U32 | Vd(dst_reg) | Vm(src_reg) | VSHIFT_IMM(32-shift));
-}
-void host_arm_VSHR_D_U64(codeblock_t *block, int dst_reg, int src_reg, int shift)
-{
- if (shift > 63)
- fatal("host_arm_VSHR_UD_IMM_64 : shift > 63\n");
- codegen_addlong(block, OPCODE_VSHR_D_U64 | Vd(dst_reg) | Vm(src_reg) | VSHIFT_IMM(64-shift));
-}
-void host_arm_VSHRN_32(codeblock_t *block, int dst_reg, int src_reg, int shift)
-{
- if (shift > 16)
- fatal("host_arm_VSHRN_32 : shift > 16\n");
- codegen_addlong(block, OPCODE_VSHRN | Vd(dst_reg) | Vm(src_reg) | VSHIFT_IMM_32(16-shift));
-}
-
-void host_arm_VSQRT_D(codeblock_t *block, int dest_reg, int src_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_VSQRT_D | Vd(dest_reg) | Vm(src_reg));
-}
-void host_arm_VSQRT_S(codeblock_t *block, int dest_reg, int src_reg)
-{
- codegen_addlong(block, COND_AL | OPCODE_VSQRT_S | Vd(dest_reg) | Vm(src_reg));
-}
-
-void host_arm_VSTR_D(codeblock_t *block, int src_reg, int base_reg, int offset)
-{
- if ((offset > 1020) || (offset & 3))
- fatal("VSTR_D bad offset %i\n", offset);
- codegen_addlong(block, COND_AL | OPCODE_VSTR_D | Rd(src_reg) | Rn(base_reg) | (offset >> 2));
-}
-void host_arm_VSTR_S(codeblock_t *block, int src_reg, int base_reg, int offset)
-{
- if ((offset > 1020) || (offset & 3))
- fatal("VSTR_S bad offset %i\n", offset);
- codegen_addlong(block, COND_AL | OPCODE_VSTR_S | Rd(src_reg) | Rn(base_reg) | (offset >> 2));
-}
-void host_arm_VSUB_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, COND_AL | OPCODE_VSUB | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VSUB_F32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, COND_AL | OPCODE_VSUB_F32 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VSUB_I8(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VSUB_I8 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VSUB_I16(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VSUB_I16 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-void host_arm_VSUB_I32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m)
-{
- codegen_addlong(block, OPCODE_VSUB_I32 | Rd(dst_reg) | Rn(src_reg_n) | Rm(src_reg_m));
-}
-
-void host_arm_VZIP_D8(codeblock_t *block, int d_reg, int m_reg)
-{
- codegen_addlong(block, OPCODE_VZIP_D8 | Vd(d_reg) | Vm(m_reg));
-}
-void host_arm_VZIP_D16(codeblock_t *block, int d_reg, int m_reg)
-{
- codegen_addlong(block, OPCODE_VZIP_D16 | Vd(d_reg) | Vm(m_reg));
-}
-void host_arm_VZIP_D32(codeblock_t *block, int d_reg, int m_reg)
-{
- codegen_addlong(block, OPCODE_VZIP_D32 | Vd(d_reg) | Vm(m_reg));
-}
-
-#endif
diff --git a/src/codegen_backend_arm_ops.h b/src/codegen_backend_arm_ops.h
deleted file mode 100644
index 7627f51..0000000
--- a/src/codegen_backend_arm_ops.h
+++ /dev/null
@@ -1,252 +0,0 @@
-#define COND_SHIFT 28
-#define COND_EQ (0x0 << COND_SHIFT)
-#define COND_NE (0x1 << COND_SHIFT)
-#define COND_CS (0x2 << COND_SHIFT)
-#define COND_CC (0x3 << COND_SHIFT)
-#define COND_MI (0x4 << COND_SHIFT)
-#define COND_PL (0x5 << COND_SHIFT)
-#define COND_VS (0x6 << COND_SHIFT)
-#define COND_VC (0x7 << COND_SHIFT)
-#define COND_HI (0x8 << COND_SHIFT)
-#define COND_LS (0x9 << COND_SHIFT)
-#define COND_GE (0xa << COND_SHIFT)
-#define COND_LT (0xb << COND_SHIFT)
-#define COND_GT (0xc << COND_SHIFT)
-#define COND_LE (0xd << COND_SHIFT)
-#define COND_AL (0xe << COND_SHIFT)
-
-void host_arm_ADD_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t imm);
-#define host_arm_ADD_REG(block, dst_reg, src_reg_n, src_reg_m) host_arm_ADD_REG_LSL(block, dst_reg, src_reg_n, src_reg_m, 0)
-void host_arm_ADD_REG_LSL(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift);
-void host_arm_ADD_REG_LSR(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift);
-
-void host_arm_AND_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t imm);
-void host_arm_AND_REG_LSL(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift);
-void host_arm_AND_REG_LSR(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift);
-
-void host_arm_B(codeblock_t *block, uintptr_t dest_addr);
-
-void host_arm_BFI(codeblock_t *block, int dst_reg, int src_reg, int lsb, int width);
-
-void host_arm_BIC_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t imm);
-void host_arm_BIC_REG_LSL(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift);
-void host_arm_BIC_REG_LSR(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift);
-
-void host_arm_BL(codeblock_t *block, uintptr_t dest_addr);
-void host_arm_BL_r1(codeblock_t *block, uintptr_t dest_addr);
-void host_arm_BLX(codeblock_t *block, int addr_reg);
-
-uint32_t *host_arm_BCC_(codeblock_t *block);
-uint32_t *host_arm_BCS_(codeblock_t *block);
-uint32_t *host_arm_BEQ_(codeblock_t *block);
-uint32_t *host_arm_BGE_(codeblock_t *block);
-uint32_t *host_arm_BGT_(codeblock_t *block);
-uint32_t *host_arm_BHI_(codeblock_t *block);
-uint32_t *host_arm_BLE_(codeblock_t *block);
-uint32_t *host_arm_BLS_(codeblock_t *block);
-uint32_t *host_arm_BLT_(codeblock_t *block);
-uint32_t *host_arm_BMI_(codeblock_t *block);
-uint32_t *host_arm_BNE_(codeblock_t *block);
-uint32_t *host_arm_BPL_(codeblock_t *block);
-uint32_t *host_arm_BVC_(codeblock_t *block);
-uint32_t *host_arm_BVS_(codeblock_t *block);
-
-void host_arm_BEQ(codeblock_t *block, uintptr_t dest_addr);
-void host_arm_BNE(codeblock_t *block, uintptr_t dest_addr);
-
-void host_arm_BX(codeblock_t *block, int addr_reg);
-
-void host_arm_CMN_IMM(codeblock_t *block, int src_reg, uint32_t imm);
-void host_arm_CMN_REG_LSL(codeblock_t *block, int src_reg_n, int src_reg_m, int shift);
-
-void host_arm_CMP_IMM(codeblock_t *block, int src_reg, uint32_t imm);
-#define host_arm_CMP_REG(block, src_reg_n, src_reg_m) host_arm_CMP_REG_LSL(block, src_reg_n, src_reg_m, 0)
-void host_arm_CMP_REG_LSL(codeblock_t *block, int src_reg_n, int src_reg_m, int shift);
-
-void host_arm_EOR_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t imm);
-void host_arm_EOR_REG_LSL(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift);
-
-void host_arm_LDMIA_WB(codeblock_t *block, int addr_reg, uint32_t reg_mask);
-
-void host_arm_LDR_IMM(codeblock_t *block, int dst_reg, int addr_reg, int offset);
-void host_arm_LDR_IMM_POST(codeblock_t *block, int dst_reg, int addr_reg, int offset);
-#define host_arm_LDR_REG(block, dst_reg, addr_reg, offset_reg) host_arm_LDR_REG_LSL(block, dst_reg, addr_reg, offset_reg, 0)
-void host_arm_LDR_REG_LSL(codeblock_t *block, int dst_reg, int addr_reg, int offset_reg, int shift);
-
-void host_arm_LDRB_ABS(codeblock_t *block, int dst, void *p);
-void host_arm_LDRB_IMM(codeblock_t *block, int dst_reg, int addr_reg, int offset);
-#define host_arm_LDRB_REG(block, dst_reg, addr_reg, offset_reg) host_arm_LDRB_REG_LSL(block, dst_reg, addr_reg, offset_reg, 0)
-void host_arm_LDRB_REG_LSL(codeblock_t *block, int dst_reg, int addr_reg, int offset_reg, int shift);
-
-void host_arm_LDRH_IMM(codeblock_t *block, int dst_reg, int addr_reg, int offset);
-void host_arm_LDRH_REG(codeblock_t *block, int dst_reg, int addr_reg, int offset_reg);
-
-void host_arm_MOV_IMM(codeblock_t *block, int dst_reg, uint32_t imm);
-#define host_arm_MOV_REG(block, dst_reg, src_reg) host_arm_MOV_REG_LSL(block, dst_reg, src_reg, 0)
-void host_arm_MOV_REG_ASR(codeblock_t *block, int dst_reg, int src_reg, int shift);
-void host_arm_MOV_REG_ASR_REG(codeblock_t *block, int dst_reg, int src_reg, int shift_reg);
-void host_arm_MOV_REG_LSL(codeblock_t *block, int dst_reg, int src_reg, int shift);
-void host_arm_MOV_REG_LSL_REG(codeblock_t *block, int dst_reg, int src_reg, int shift_reg);
-void host_arm_MOV_REG_LSR(codeblock_t *block, int dst_reg, int src_reg, int shift);
-void host_arm_MOV_REG_LSR_REG(codeblock_t *block, int dst_reg, int src_reg, int shift_reg);
-void host_arm_MOV_REG_ROR(codeblock_t *block, int dst_reg, int src_reg, int shift);
-void host_arm_MOV_REG_ROR_REG(codeblock_t *block, int dst_reg, int src_reg, int shift_reg);
-void host_arm_MOVT_IMM(codeblock_t *block, int dst_reg, uint16_t imm);
-void host_arm_MOVW_IMM(codeblock_t *block, int dst_reg, uint16_t imm);
-
-void host_arm_MVN_REG_LSL(codeblock_t *block, int dst_reg, int src_reg, int shift);
-
-#define host_arm_NOP(block) host_arm_MOV_REG(block, REG_R0, REG_R0)
-
-void host_arm_ORR_IMM_cond(codeblock_t *block, uint32_t cond, int dst_reg, int src_reg, uint32_t imm);
-void host_arm_ORR_REG_LSL_cond(codeblock_t *block, uint32_t cond, int dst_reg, int src_reg_n, int src_reg_m, int shift);
-
-#define host_arm_ORR_IMM(block, dst_reg, src_reg, imm) host_arm_ORR_IMM_cond(block, COND_AL, dst_reg, src_reg, imm)
-#define host_arm_ORR_REG_LSL(block, dst_reg, src_reg_a, src_reg_b, shift) host_arm_ORR_REG_LSL_cond(block, COND_AL, dst_reg, src_reg_a, src_reg_b, shift)
-
-#define host_arm_ORRCC_IMM(block, dst_reg, src_reg, imm) host_arm_ORR_IMM_cond(block, COND_CC, dst_reg, src_reg, imm)
-#define host_arm_ORREQ_IMM(block, dst_reg, src_reg, imm) host_arm_ORR_IMM_cond(block, COND_EQ, dst_reg, src_reg, imm)
-#define host_arm_ORRVS_IMM(block, dst_reg, src_reg, imm) host_arm_ORR_IMM_cond(block, COND_VS, dst_reg, src_reg, imm)
-
-void host_arm_RSB_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t imm);
-void host_arm_RSB_REG_LSL(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift);
-void host_arm_RSB_REG_LSR(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift);
-
-void host_arm_STMDB_WB(codeblock_t *block, int addr_reg, uint32_t reg_mask);
-
-void host_arm_STR_IMM(codeblock_t *block, int src_reg, int addr_reg, int offset);
-void host_arm_STR_IMM_WB(codeblock_t *block, int src_reg, int addr_reg, int offset);
-#define host_arm_STR_REG(block, src_reg, addr_reg, offset_reg) host_arm_STR_REG_LSL(block, src_reg, addr_reg, offset_reg, 0)
-void host_arm_STR_REG_LSL(codeblock_t *block, int src_reg, int addr_reg, int offset_reg, int shift);
-
-void host_arm_STRB_IMM(codeblock_t *block, int src_reg, int addr_reg, int offset);
-#define host_arm_STRB_REG(block, src_reg, addr_reg, offset_reg) host_arm_STRB_REG_LSL(block, src_reg, addr_reg, offset_reg, 0)
-void host_arm_STRB_REG_LSL(codeblock_t *block, int src_reg, int addr_reg, int offset_reg, int shift);
-
-void host_arm_STRH_IMM(codeblock_t *block, int src_reg, int addr_reg, int offset);
-void host_arm_STRH_REG(codeblock_t *block, int src_reg, int addr_reg, int offset_reg);
-
-void host_arm_SUB_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t imm);
-void host_arm_SUB_REG_LSL(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift);
-void host_arm_SUB_REG_LSR(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m, int shift);
-
-void host_arm_SXTB(codeblock_t *block, int dst_reg, int src_reg, int rotate);
-void host_arm_SXTH(codeblock_t *block, int dst_reg, int src_reg, int rotate);
-
-void host_arm_TST_IMM(codeblock_t *block, int src_reg1, uint32_t imm);
-void host_arm_TST_REG(codeblock_t *block, int src_reg1, int src_reg2);
-
-void host_arm_UADD8(codeblock_t *block, int dst_reg, int src_reg_a, int src_reg_b);
-void host_arm_UADD16(codeblock_t *block, int dst_reg, int src_reg_a, int src_reg_b);
-
-void host_arm_USUB8(codeblock_t *block, int dst_reg, int src_reg_a, int src_reg_b);
-void host_arm_USUB16(codeblock_t *block, int dst_reg, int src_reg_a, int src_reg_b);
-
-void host_arm_UXTB(codeblock_t *block, int dst_reg, int src_reg, int rotate);
-void host_arm_UXTH(codeblock_t *block, int dst_reg, int src_reg, int rotate);
-
-void host_arm_VABS_D(codeblock_t *block, int dest_reg, int src_reg);
-
-void host_arm_VADD_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VADD_I8(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VADD_I16(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VADD_I32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VADD_F32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VAND_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VBIC_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VCMP_D(codeblock_t *block, int src_reg_d, int src_reg_m);
-
-void host_arm_VCEQ_F32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VCEQ_I8(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VCEQ_I16(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VCEQ_I32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VCGE_F32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VCGT_F32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VCGT_S8(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VCGT_S16(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VCGT_S32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-
-void host_arm_VCHS_D(codeblock_t *block, int dest_reg, int src_reg);
-
-void host_arm_VCVT_D_IS(codeblock_t *block, int dest_reg, int src_reg);
-void host_arm_VCVT_D_S(codeblock_t *block, int dest_reg, int src_reg);
-void host_arm_VCVT_F32_S32(codeblock_t *block, int dest_reg, int src_reg);
-void host_arm_VCVT_IS_D(codeblock_t *block, int dest_reg, int src_reg);
-void host_arm_VCVT_S32_F32(codeblock_t *block, int dest_reg, int src_reg);
-void host_arm_VCVT_S_D(codeblock_t *block, int dest_reg, int src_reg);
-void host_arm_VCVTR_IS_D(codeblock_t *block, int dest_reg, int src_reg);
-void host_arm_VDIV_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VDIV_S(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VDUP_32(codeblock_t *block, int dst_reg, int src_reg_m, int imm);
-void host_arm_VEOR_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VLDR_D(codeblock_t *block, int dest_reg, int base_reg, int offset);
-void host_arm_VLDR_S(codeblock_t *block, int dest_reg, int base_reg, int offset);
-
-void host_arm_VMOV_32_S(codeblock_t *block, int dest_reg, int src_reg);
-void host_arm_VMOV_64_D(codeblock_t *block, int dest_reg_low, int dest_reg_high, int src_reg);
-void host_arm_VMOV_D_64(codeblock_t *block, int dest_reg, int src_reg_low, int src_reg_high);
-void host_arm_VMOV_S_32(codeblock_t *block, int dest_reg, int src_reg);
-void host_arm_VMOV_D_D(codeblock_t *block, int dest_reg, int src_reg);
-void host_arm_VMOVN_I32(codeblock_t *block, int dest_reg, int src_reg);
-void host_arm_VMOVN_I64(codeblock_t *block, int dest_reg, int src_reg);
-
-void host_arm_VMRS_APSR(codeblock_t *block);
-void host_arm_VMSR_FPSCR(codeblock_t *block, int src_reg);
-
-void host_arm_VMAX_F32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VMIN_F32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-
-void host_arm_VMOV_F32_ONE(codeblock_t *block, int dst_reg);
-
-void host_arm_VMUL_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VMUL_F32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VMUL_S16(codeblock_t *block, int dest_reg, int src_reg_n, int src_reg_m);
-void host_arm_VMULL_S16(codeblock_t *block, int dest_reg, int src_reg_n, int src_reg_m);
-
-void host_arm_VNEG_D(codeblock_t *block, int dest_reg, int src_reg);
-
-void host_arm_VORR_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-
-void host_arm_VPADDL_S16(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm_VPADDL_S32(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm_VPADDL_Q_S32(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_arm_VQADD_S8(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VQADD_U8(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VQADD_S16(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VQADD_U16(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VQSUB_S8(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VQSUB_U8(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VQSUB_S16(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VQSUB_U16(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-
-void host_arm_VQMOVN_S16(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm_VQMOVN_S32(codeblock_t *block, int dst_reg, int src_reg);
-void host_arm_VQMOVN_U16(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_arm_VSHL_D_IMM_16(codeblock_t *block, int dest_reg, int src_reg, int shift);
-void host_arm_VSHL_D_IMM_32(codeblock_t *block, int dest_reg, int src_reg, int shift);
-void host_arm_VSHL_D_IMM_64(codeblock_t *block, int dest_reg, int src_reg, int shift);
-void host_arm_VSHR_D_S16(codeblock_t *block, int dest_reg, int src_reg, int shift);
-void host_arm_VSHR_D_S32(codeblock_t *block, int dest_reg, int src_reg, int shift);
-void host_arm_VSHR_D_S64(codeblock_t *block, int dest_reg, int src_reg, int shift);
-void host_arm_VSHR_D_U16(codeblock_t *block, int dest_reg, int src_reg, int shift);
-void host_arm_VSHR_D_U32(codeblock_t *block, int dest_reg, int src_reg, int shift);
-void host_arm_VSHR_D_U64(codeblock_t *block, int dest_reg, int src_reg, int shift);
-void host_arm_VSHRN_32(codeblock_t *block, int dest_reg, int src_reg, int shift);
-
-void host_arm_VSQRT_D(codeblock_t *block, int dest_reg, int src_reg);
-void host_arm_VSQRT_S(codeblock_t *block, int dest_reg, int src_reg);
-
-void host_arm_VSTR_D(codeblock_t *block, int src_reg, int base_reg, int offset);
-void host_arm_VSTR_S(codeblock_t *block, int src_reg, int base_reg, int offset);
-void host_arm_VSUB_D(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VSUB_F32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VSUB_S(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VSUB_I8(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VSUB_I16(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-void host_arm_VSUB_I32(codeblock_t *block, int dst_reg, int src_reg_n, int src_reg_m);
-
-void host_arm_VZIP_D8(codeblock_t *block, int d_reg, int m_reg);
-void host_arm_VZIP_D16(codeblock_t *block, int d_reg, int m_reg);
-void host_arm_VZIP_D32(codeblock_t *block, int d_reg, int m_reg);
diff --git a/src/codegen_backend_arm_uops.c b/src/codegen_backend_arm_uops.c
deleted file mode 100644
index 19706cd..0000000
--- a/src/codegen_backend_arm_uops.c
+++ /dev/null
@@ -1,3500 +0,0 @@
-#ifdef __ARM_EABI__
-
-#include
-#include "ibm.h"
-#include "x86.h"
-#include "x87.h"
-#include "386_common.h"
-#include "codegen.h"
-#include "codegen_allocator.h"
-#include "codegen_backend.h"
-#include "codegen_backend_arm_defs.h"
-#include "codegen_backend_arm_ops.h"
-#include "codegen_ir_defs.h"
-
-static inline int get_arm_imm(uint32_t imm_data, uint32_t *arm_imm)
-{
- int shift = 0;
-//pclog("get_arm_imm - imm_data=%08x\n", imm_data);
- if (!(imm_data & 0xffff))
- {
- shift += 16;
- imm_data >>= 16;
- }
- if (!(imm_data & 0xff))
- {
- shift += 8;
- imm_data >>= 8;
- }
- if (!(imm_data & 0xf))
- {
- shift += 4;
- imm_data >>= 4;
- }
- if (!(imm_data & 0x3))
- {
- shift += 2;
- imm_data >>= 2;
- }
- if (imm_data > 0xff) /*Note - should handle rotation round the word*/
- return 0;
-//pclog(" imm_data=%02x shift=%i\n", imm_data, shift);
- *arm_imm = imm_data | ((((32 - shift) >> 1) & 15) << 8);
- return 1;
-}
-
-static inline int in_range(void *addr, void *base)
-{
- int diff = (uintptr_t)addr - (uintptr_t)base;
-
- if (diff < -4095 || diff > 4095)
- return 0;
- return 1;
-}
-
-static inline int in_range_h(void *addr, void *base)
-{
- int diff = (uintptr_t)addr - (uintptr_t)base;
-
- if (diff < 0 || diff > 255)
- return 0;
- return 1;
-}
-
-void host_arm_call(codeblock_t *block, void *dst_addr)
-{
- host_arm_MOV_IMM(block, REG_R3, (uintptr_t)dst_addr);
- host_arm_BLX(block, REG_R3);
-}
-
-void host_arm_nop(codeblock_t *block)
-{
- host_arm_MOV_REG_LSL(block, REG_R0, REG_R0, 0);
-}
-
-#define HOST_REG_GET(reg) (IREG_GET_REG(reg) & 0xf)
-
-#define REG_IS_L(size) (size == IREG_SIZE_L)
-#define REG_IS_W(size) (size == IREG_SIZE_W)
-#define REG_IS_B(size) (size == IREG_SIZE_B)
-#define REG_IS_BH(size) (size == IREG_SIZE_BH)
-#define REG_IS_D(size) (size == IREG_SIZE_D)
-#define REG_IS_Q(size) (size == IREG_SIZE_Q)
-
-static int codegen_ADD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm_ADD_REG_LSL(block, dest_reg, src_reg_a, src_reg_b, 0);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm_ADD_REG(block, REG_TEMP, src_reg_a, src_reg_b);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm_ADD_REG(block, REG_TEMP, src_reg_a, src_reg_b);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_BH(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm_UXTB(block, REG_TEMP, src_reg_b, 8);
- host_arm_UADD8(block, dest_reg, src_reg_a, REG_TEMP);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_BH(src_size_b))
- {
- host_arm_ADD_REG_LSR(block, REG_TEMP, src_reg_a, src_reg_b, 8);
- host_arm_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_B(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm_UXTB(block, REG_TEMP, src_reg_b, 0);
- host_arm_MOV_REG_LSL(block, REG_TEMP, REG_TEMP, 8);
- host_arm_UADD8(block, dest_reg, src_reg_a, REG_TEMP);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_BH(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm_AND_IMM(block, REG_TEMP, src_reg_b, 0x0000ff00);
- host_arm_UADD8(block, dest_reg, src_reg_a, REG_TEMP);
- }
- else
- fatal("ADD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_ADD_IMM(codeblock_t *block, uop_t *uop)
-{
-// host_arm_ADD_IMM(block, uop->dest_reg_a_real, uop->src_reg_a_real, uop->imm_data);
-// return 0;
-
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm_ADD_IMM(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm_ADD_IMM(block, REG_TEMP, src_reg, uop->imm_data);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm_ADD_IMM(block, REG_TEMP, src_reg, uop->imm_data);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size) && src_reg == dest_reg)
- {
- host_arm_MOV_IMM(block, REG_TEMP, uop->imm_data << 8);
- host_arm_UADD8(block, dest_reg, src_reg, REG_TEMP);
- }
- else
- fatal("ADD_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-
-}
-static int codegen_ADD_LSHIFT(codeblock_t *block, uop_t *uop)
-{
- host_arm_ADD_REG_LSL(block, uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real, uop->imm_data);
- return 0;
-}
-
-static int codegen_AND(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VAND_D(block, dest_reg, src_reg_a, src_reg_b);
- }
- else if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm_AND_REG_LSL(block, dest_reg, src_reg_a, src_reg_b, 0);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm_MVN_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- host_arm_BIC_REG_LSR(block, dest_reg, src_reg_a, REG_TEMP, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm_MVN_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- host_arm_BIC_REG_LSR(block, dest_reg, src_reg_a, REG_TEMP, 24);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_BH(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm_MVN_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- host_arm_BIC_REG_LSR(block, dest_reg, src_reg_a, REG_TEMP, 24);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_B(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm_MVN_REG_LSL(block, REG_TEMP, src_reg_b, 8);
- host_arm_AND_IMM(block, REG_TEMP, REG_TEMP, 0x0000ff00);
- host_arm_BIC_REG_LSL(block, dest_reg, src_reg_a, REG_TEMP, 0);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_BH(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm_MVN_REG_LSL(block, REG_TEMP, src_reg_b, 0);
- host_arm_AND_IMM(block, REG_TEMP, REG_TEMP, 0x0000ff00);
- host_arm_BIC_REG_LSL(block, dest_reg, src_reg_a, REG_TEMP, 0);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm_AND_REG_LSL(block, REG_TEMP, src_reg_a, src_reg_b, 0);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm_AND_REG_LSL(block, REG_TEMP, src_reg_a, src_reg_b, 0);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_BH(src_size_b))
- {
- host_arm_AND_REG_LSR(block, REG_TEMP, src_reg_a, src_reg_b, 8);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_B(dest_size) && REG_IS_BH(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm_AND_REG_LSR(block, REG_TEMP, src_reg_b, src_reg_a, 8);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_B(dest_size) && REG_IS_BH(src_size_a) && REG_IS_BH(src_size_b))
- {
- host_arm_AND_REG_LSL(block, REG_TEMP, src_reg_a, src_reg_b, 0);
- host_arm_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, 8);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else
- fatal("AND %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_AND_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm_AND_IMM(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size) && dest_reg == src_reg)
- {
- host_arm_AND_IMM(block, dest_reg, src_reg, uop->imm_data | 0xffff0000);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size) && dest_reg == src_reg)
- {
- host_arm_AND_IMM(block, dest_reg, src_reg, uop->imm_data | 0xffffff00);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size) && dest_reg == src_reg)
- {
- host_arm_AND_IMM(block, dest_reg, src_reg, (uop->imm_data << 8) | 0xffff00ff);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm_AND_IMM(block, REG_TEMP, src_reg, uop->imm_data);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm_AND_IMM(block, REG_TEMP, src_reg, uop->imm_data);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_B(dest_size) && REG_IS_BH(src_size))
- {
- host_arm_MOV_REG_LSR(block, REG_TEMP, src_reg, 8);
- host_arm_AND_IMM(block, REG_TEMP, REG_TEMP, uop->imm_data);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else
- fatal("AND_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_ANDN(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VBIC_D(block, dest_reg, src_reg_b, src_reg_a);
- }
- else
- fatal("ANDN %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-
-static int codegen_CALL_FUNC(codeblock_t *block, uop_t *uop)
-{
- host_arm_call(block, uop->p);
-
- return 0;
-}
-
-static int codegen_CALL_FUNC_RESULT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (!REG_IS_L(dest_size))
- fatal("CALL_FUNC_RESULT %02x\n", uop->dest_reg_a_real);
- host_arm_call(block, uop->p);
- host_arm_MOV_REG(block, dest_reg, REG_R0);
-
- return 0;
-}
-
-static int codegen_CALL_INSTRUCTION_FUNC(codeblock_t *block, uop_t *uop)
-{
- host_arm_call(block, uop->p);
- host_arm_TST_REG(block, REG_R0, REG_R0);
- host_arm_BNE(block, (uintptr_t)codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_CMP_IMM_JZ(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_arm_CMP_IMM(block, src_reg, uop->imm_data);
- }
- else
- fatal("CMP_IMM_JZ %02x\n", uop->src_reg_a_real);
- host_arm_BEQ(block, (uintptr_t)uop->p);
-
- return 0;
-}
-
-static int codegen_CMP_IMM_JNZ_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_arm_CMP_IMM(block, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(src_size))
- {
- host_arm_UXTH(block, REG_TEMP, src_reg, 0);
- host_arm_CMP_IMM(block, REG_TEMP, uop->imm_data);
- }
- else
- fatal("CMP_IMM_JNZ_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm_BNE_(block);
-
- return 0;
-}
-static int codegen_CMP_IMM_JZ_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_arm_CMP_IMM(block, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(src_size))
- {
- host_arm_UXTH(block, REG_TEMP, src_reg, 0);
- host_arm_CMP_IMM(block, REG_TEMP, uop->imm_data);
- }
- else
- fatal("CMP_IMM_JZ_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm_BEQ_(block);
-
- return 0;
-}
-
-static int codegen_CMP_JB(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
- uint32_t *jump_p;
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else
- fatal("CMP_JB %02x\n", uop->src_reg_a_real);
-
- jump_p = host_arm_BCC_(block);
- *jump_p |= ((((uintptr_t)uop->p - (uintptr_t)jump_p) - 8) & 0x3fffffc) >> 2;
-
- return 0;
-}
-static int codegen_CMP_JNBE(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
- uint32_t *jump_p;
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else
- fatal("CMP_JNBE %02x\n", uop->src_reg_a_real);
-
- jump_p = host_arm_BHI_(block);
- *jump_p |= ((((uintptr_t)uop->p - (uintptr_t)jump_p) - 8) & 0x3fffffc) >> 2;
-
- return 0;
-}
-
-static int codegen_CMP_JNB_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 16);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 24);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JNB_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm_BCS_(block);
-
- return 0;
-}
-static int codegen_CMP_JNBE_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 16);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 24);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JNBE_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm_BHI_(block);
-
- return 0;
-}
-static int codegen_CMP_JNL_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 16);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 24);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JNL_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm_BGE_(block);
-
- return 0;
-}
-static int codegen_CMP_JNLE_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 16);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 24);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JNLE_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm_BGT_(block);
-
- return 0;
-}
-static int codegen_CMP_JNO_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 16);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 24);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JNO_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm_BVC_(block);
-
- return 0;
-}
-static int codegen_CMP_JNZ_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 16);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 24);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JNZ_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm_BNE_(block);
-
- return 0;
-}
-static int codegen_CMP_JB_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 16);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 24);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JB_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm_BCC_(block);
-
- return 0;
-}
-static int codegen_CMP_JBE_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 16);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 24);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JBE_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm_BLS_(block);
-
- return 0;
-}
-static int codegen_CMP_JL_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 16);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 24);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JL_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm_BLT_(block);
-
- return 0;
-}
-static int codegen_CMP_JLE_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 16);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 24);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JLE_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm_BLE_(block);
-
- return 0;
-}
-static int codegen_CMP_JO_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 16);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 24);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JO_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm_BVS_(block);
-
- return 0;
-}
-static int codegen_CMP_JZ_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm_CMP_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 16);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 16);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg_a, 24);
- host_arm_CMP_REG_LSL(block, REG_TEMP, src_reg_b, 24);
- }
- else
- fatal("CMP_JZ_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm_BEQ_(block);
-
- return 0;
-}
-
-static int codegen_FABS(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a))
- {
- host_arm_VABS_D(block, dest_reg, src_reg_a);
- }
- else
- fatal("codegen_FABS %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_FCHS(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a))
- {
- host_arm_VNEG_D(block, dest_reg, src_reg_a);
- }
- else
- fatal("codegen_FCHS %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_FSQRT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a))
- {
- host_arm_VSQRT_D(block, dest_reg, src_reg_a);
- }
- else
- fatal("codegen_FSQRT %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_FTST(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_W(dest_size) && REG_IS_D(src_size_a))
- {
- host_arm_VSUB_D(block, REG_D_TEMP, REG_D_TEMP, REG_D_TEMP);
- host_arm_VCMP_D(block, src_reg_a, REG_D_TEMP);
- host_arm_MOV_IMM(block, dest_reg, 0);
- host_arm_VMRS_APSR(block);
- host_arm_ORREQ_IMM(block, dest_reg, dest_reg, C3);
- host_arm_ORRCC_IMM(block, dest_reg, dest_reg, C0);
- host_arm_ORRVS_IMM(block, dest_reg, dest_reg, C0|C2|C3);
- }
- else
- fatal("codegen_FTST %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-
-static int codegen_FADD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b))
- {
- host_arm_VADD_D(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("codegen_FADD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_FCOM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_W(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b))
- {
- host_arm_VCMP_D(block, src_reg_a, src_reg_b);
- host_arm_MOV_IMM(block, dest_reg, 0);
- host_arm_VMRS_APSR(block);
- host_arm_ORREQ_IMM(block, dest_reg, dest_reg, C3);
- host_arm_ORRCC_IMM(block, dest_reg, dest_reg, C0);
- host_arm_ORRVS_IMM(block, dest_reg, dest_reg, C0|C2|C3);
- }
- else
- fatal("codegen_FCOM %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_FDIV(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b))
- {
- host_arm_VDIV_D(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("codegen_FDIV %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_FMUL(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b))
- {
- host_arm_VMUL_D(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("codegen_FMUL %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_FSUB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b))
- {
- host_arm_VSUB_D(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("codegen_FSUB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-
-static int codegen_FP_ENTER(codeblock_t *block, uop_t *uop)
-{
- uint32_t *branch_ptr;
-
- if (!in_range(&cr0, &cpu_state))
- fatal("codegen_FP_ENTER - out of range\n");
-
- host_arm_LDR_IMM(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cr0 - (uintptr_t)&cpu_state);
- host_arm_TST_IMM(block, REG_TEMP, 0xc);
- branch_ptr = host_arm_BEQ_(block);
-
- host_arm_MOV_IMM(block, REG_TEMP, uop->imm_data);
- host_arm_STR_IMM(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.oldpc - (uintptr_t)&cpu_state);
- host_arm_MOV_IMM(block, REG_ARG0, 7);
- host_arm_call(block, x86_int);
- host_arm_B(block, (uintptr_t)codegen_exit_rout);
-
- *branch_ptr |= ((((uintptr_t)&block_write_data[block_pos] - (uintptr_t)branch_ptr) - 8) & 0x3fffffc) >> 2;
-
- return 0;
-}
-static int codegen_MMX_ENTER(codeblock_t *block, uop_t *uop)
-{
- uint32_t *branch_ptr;
-
- if (!in_range(&cr0, &cpu_state))
- fatal("codegen_MMX_ENTER - out of range\n");
-
- host_arm_LDR_IMM(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cr0 - (uintptr_t)&cpu_state);
- host_arm_TST_IMM(block, REG_TEMP, 0xc);
- branch_ptr = host_arm_BEQ_(block);
-
- host_arm_MOV_IMM(block, REG_TEMP, uop->imm_data);
- host_arm_STR_IMM(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.oldpc - (uintptr_t)&cpu_state);
- host_arm_MOV_IMM(block, REG_ARG0, 7);
- host_arm_call(block, x86_int);
- host_arm_B(block, (uintptr_t)codegen_exit_rout);
-
- *branch_ptr |= ((((uintptr_t)&block_write_data[block_pos] - (uintptr_t)branch_ptr) - 8) & 0x3fffffc) >> 2;
-
- host_arm_MOV_IMM(block, REG_TEMP, 0x01010101);
- host_arm_STR_IMM(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.tag[0] - (uintptr_t)&cpu_state);
- host_arm_STR_IMM(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.tag[4] - (uintptr_t)&cpu_state);
- host_arm_MOV_IMM(block, REG_TEMP, 0);
- host_arm_STR_IMM(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.TOP - (uintptr_t)&cpu_state);
- host_arm_STRB_IMM(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.ismmx - (uintptr_t)&cpu_state);
-
- return 0;
-}
-
-static int codegen_JMP(codeblock_t *block, uop_t *uop)
-{
- host_arm_B(block, (uintptr_t)uop->p);
-
- return 0;
-}
-
-static int codegen_LOAD_FUNC_ARG0(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_W(src_size))
- {
- host_arm_UXTH(block, REG_ARG0, src_reg, 0);
- }
- else
- fatal("codegen_LOAD_FUNC_ARG0 %02x\n", uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG1(codeblock_t *block, uop_t *uop)
-{
- fatal("codegen_LOAD_FUNC_ARG1 %02x\n", uop->src_reg_a_real);
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG2(codeblock_t *block, uop_t *uop)
-{
- fatal("codegen_LOAD_FUNC_ARG2 %02x\n", uop->src_reg_a_real);
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG3(codeblock_t *block, uop_t *uop)
-{
- fatal("codegen_LOAD_FUNC_ARG3 %02x\n", uop->src_reg_a_real);
- return 0;
-}
-
-static int codegen_LOAD_FUNC_ARG0_IMM(codeblock_t *block, uop_t *uop)
-{
- host_arm_MOV_IMM(block, REG_ARG0, uop->imm_data);
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG1_IMM(codeblock_t *block, uop_t *uop)
-{
- host_arm_MOV_IMM(block, REG_ARG1, uop->imm_data);
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG2_IMM(codeblock_t *block, uop_t *uop)
-{
- host_arm_MOV_IMM(block, REG_ARG2, uop->imm_data);
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG3_IMM(codeblock_t *block, uop_t *uop)
-{
- host_arm_MOV_IMM(block, REG_ARG3, uop->imm_data);
- return 0;
-}
-
-static int codegen_LOAD_SEG(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (!REG_IS_W(src_size))
- fatal("LOAD_SEG %02x %p\n", uop->src_reg_a_real, uop->p);
- host_arm_UXTH(block, REG_ARG0, src_reg, 0);
- host_arm_MOV_IMM(block, REG_ARG1, (uint32_t)uop->p);
- host_arm_call(block, loadseg);
- host_arm_TST_REG(block, REG_R0, REG_R0);
- host_arm_BNE(block, (uintptr_t)codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_MEM_LOAD_ABS(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), seg_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- host_arm_ADD_IMM(block, REG_R0, seg_reg, uop->imm_data);
- if (REG_IS_B(dest_size) || REG_IS_BH(dest_size))
- {
- host_arm_BL(block, (uintptr_t)codegen_mem_load_byte);
- }
- else if (REG_IS_W(dest_size))
- {
- host_arm_BL(block, (uintptr_t)codegen_mem_load_word);
- }
- else if (REG_IS_L(dest_size))
- {
- host_arm_BL(block, (uintptr_t)codegen_mem_load_long);
- }
- else
- fatal("MEM_LOAD_ABS - %02x\n", uop->dest_reg_a_real);
- host_arm_TST_REG(block, REG_R1, REG_R1);
- host_arm_BNE(block, (uintptr_t)codegen_exit_rout);
- if (REG_IS_B(dest_size))
- {
- host_arm_BFI(block, dest_reg, REG_R0, 0, 8);
- }
- else if (REG_IS_BH(dest_size))
- {
- host_arm_BFI(block, dest_reg, REG_R0, 8, 8);
- }
- else if (REG_IS_W(dest_size))
- {
- host_arm_BFI(block, dest_reg, REG_R0, 0, 16);
- }
- else if (REG_IS_L(dest_size))
- {
- host_arm_MOV_REG(block, dest_reg, REG_R0);
- }
-
- return 0;
-}
-
-static int codegen_MEM_LOAD_REG(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- host_arm_ADD_REG(block, REG_R0, seg_reg, addr_reg);
- if (uop->imm_data)
- host_arm_ADD_IMM(block, REG_R0, REG_R0, uop->imm_data);
- if (REG_IS_B(dest_size) || REG_IS_BH(dest_size))
- {
- host_arm_BL(block, (uintptr_t)codegen_mem_load_byte);
- }
- else if (REG_IS_W(dest_size))
- {
- host_arm_BL(block, (uintptr_t)codegen_mem_load_word);
- }
- else if (REG_IS_L(dest_size))
- {
- host_arm_BL(block, (uintptr_t)codegen_mem_load_long);
- }
- else if (REG_IS_Q(dest_size))
- {
- host_arm_BL(block, (uintptr_t)codegen_mem_load_quad);
- }
- else
- fatal("MEM_LOAD_REG - %02x\n", uop->dest_reg_a_real);
- host_arm_TST_REG(block, REG_R1, REG_R1);
- host_arm_BNE(block, (uintptr_t)codegen_exit_rout);
- if (REG_IS_B(dest_size))
- {
- host_arm_BFI(block, dest_reg, REG_R0, 0, 8);
- }
- else if (REG_IS_BH(dest_size))
- {
- host_arm_BFI(block, dest_reg, REG_R0, 8, 8);
- }
- else if (REG_IS_W(dest_size))
- {
- host_arm_BFI(block, dest_reg, REG_R0, 0, 16);
- }
- else if (REG_IS_L(dest_size))
- {
- host_arm_MOV_REG(block, dest_reg, REG_R0);
- }
- else if (REG_IS_Q(dest_size))
- {
- host_arm_VMOV_D_D(block, dest_reg, REG_D_TEMP);
- }
-
- return 0;
-}
-static int codegen_MEM_LOAD_SINGLE(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (!REG_IS_D(dest_size))
- fatal("MEM_LOAD_SINGLE - %02x\n", uop->dest_reg_a_real);
-
- host_arm_ADD_REG(block, REG_R0, seg_reg, addr_reg);
- if (uop->imm_data)
- host_arm_ADD_IMM(block, REG_R0, REG_R0, uop->imm_data);
- host_arm_BL(block, (uintptr_t)codegen_mem_load_single);
- host_arm_TST_REG(block, REG_R1, REG_R1);
- host_arm_BNE(block, (uintptr_t)codegen_exit_rout);
- host_arm_VCVT_D_S(block, dest_reg, REG_D_TEMP);
-
- return 0;
-}
-static int codegen_MEM_LOAD_DOUBLE(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (!REG_IS_D(dest_size))
- fatal("MEM_LOAD_DOUBLE - %02x\n", uop->dest_reg_a_real);
-
- host_arm_ADD_REG(block, REG_R0, seg_reg, addr_reg);
- if (uop->imm_data)
- host_arm_ADD_IMM(block, REG_R0, REG_R0, uop->imm_data);
- host_arm_BL(block, (uintptr_t)codegen_mem_load_double);
- host_arm_TST_REG(block, REG_R1, REG_R1);
- host_arm_BNE(block, (uintptr_t)codegen_exit_rout);
- host_arm_VMOV_D_D(block, dest_reg, REG_D_TEMP);
-
- return 0;
-}
-
-static int codegen_MEM_STORE_ABS(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_b_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_b_real);
-
- host_arm_ADD_IMM(block, REG_R0, seg_reg, uop->imm_data);
- if (REG_IS_B(src_size))
- {
- host_arm_MOV_REG(block, REG_R1, src_reg);
- host_arm_BL(block, (uintptr_t)codegen_mem_store_byte);
- }
- else if (REG_IS_W(src_size))
- {
- host_arm_MOV_REG(block, REG_R1, src_reg);
- host_arm_BL(block, (uintptr_t)codegen_mem_store_word);
- }
- else if (REG_IS_L(src_size))
- {
- host_arm_MOV_REG(block, REG_R1, src_reg);
- host_arm_BL(block, (uintptr_t)codegen_mem_store_long);
- }
- else
- fatal("MEM_STORE_ABS - %02x\n", uop->src_reg_b_real);
- host_arm_TST_REG(block, REG_R1, REG_R1);
- host_arm_BNE(block, (uintptr_t)codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_MEM_STORE_REG(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real), src_reg = HOST_REG_GET(uop->src_reg_c_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_c_real);
-
- host_arm_ADD_REG(block, REG_R0, seg_reg, addr_reg);
- if (uop->imm_data)
- host_arm_ADD_IMM(block, REG_R0, REG_R0, uop->imm_data);
- if (REG_IS_B(src_size))
- {
- host_arm_MOV_REG(block, REG_R1, src_reg);
- host_arm_BL(block, (uintptr_t)codegen_mem_store_byte);
- }
- else if (REG_IS_BH(src_size))
- {
- host_arm_MOV_REG_LSR(block, REG_R1, src_reg, 8);
- host_arm_BL(block, (uintptr_t)codegen_mem_store_byte);
- }
- else if (REG_IS_W(src_size))
- {
- host_arm_MOV_REG(block, REG_R1, src_reg);
- host_arm_BL(block, (uintptr_t)codegen_mem_store_word);
- }
- else if (REG_IS_L(src_size))
- {
- host_arm_MOV_REG(block, REG_R1, src_reg);
- host_arm_BL(block, (uintptr_t)codegen_mem_store_long);
- }
- else if (REG_IS_Q(src_size))
- {
- host_arm_VMOV_D_D(block, REG_D_TEMP, src_reg);
- host_arm_BL(block, (uintptr_t)codegen_mem_store_quad);
- }
- else
- fatal("MEM_STORE_REG - %02x\n", uop->src_reg_c_real);
- host_arm_TST_REG(block, REG_R1, REG_R1);
- host_arm_BNE(block, (uintptr_t)codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_MEM_STORE_IMM_8(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
-
- host_arm_ADD_REG(block, REG_R0, seg_reg, addr_reg);
- host_arm_MOV_IMM(block, REG_R1, uop->imm_data);
- host_arm_BL(block, (uintptr_t)codegen_mem_store_byte);
- host_arm_TST_REG(block, REG_R1, REG_R1);
- host_arm_BNE(block, (uintptr_t)codegen_exit_rout);
-
- return 0;
-}
-static int codegen_MEM_STORE_IMM_16(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
-
- host_arm_ADD_REG(block, REG_R0, seg_reg, addr_reg);
- host_arm_MOV_IMM(block, REG_R1, uop->imm_data);
- host_arm_BL(block, (uintptr_t)codegen_mem_store_word);
- host_arm_TST_REG(block, REG_R1, REG_R1);
- host_arm_BNE(block, (uintptr_t)codegen_exit_rout);
-
- return 0;
-}
-static int codegen_MEM_STORE_IMM_32(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
-
- host_arm_ADD_REG(block, REG_R0, seg_reg, addr_reg);
- host_arm_MOV_IMM(block, REG_R1, uop->imm_data);
- host_arm_BL(block, (uintptr_t)codegen_mem_store_long);
- host_arm_TST_REG(block, REG_R1, REG_R1);
- host_arm_BNE(block, (uintptr_t)codegen_exit_rout);
-
- return 0;
-}
-static int codegen_MEM_STORE_SINGLE(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real), src_reg = HOST_REG_GET(uop->src_reg_c_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_c_real);
-
- if (!REG_IS_D(src_size))
- fatal("MEM_STORE_REG - %02x\n", uop->dest_reg_a_real);
-
- host_arm_ADD_REG(block, REG_R0, seg_reg, addr_reg);
- if (uop->imm_data)
- host_arm_ADD_IMM(block, REG_R0, REG_R0, uop->imm_data);
- host_arm_VCVT_S_D(block, REG_D_TEMP, src_reg);
- host_arm_BL(block, (uintptr_t)codegen_mem_store_single);
- host_arm_TST_REG(block, REG_R1, REG_R1);
- host_arm_BNE(block, (uintptr_t)codegen_exit_rout);
-
- return 0;
-}
-static int codegen_MEM_STORE_DOUBLE(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real), src_reg = HOST_REG_GET(uop->src_reg_c_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_c_real);
-
- if (!REG_IS_D(src_size))
- fatal("MEM_STORE_REG - %02x\n", uop->dest_reg_a_real);
-
- host_arm_ADD_REG(block, REG_R0, seg_reg, addr_reg);
- if (uop->imm_data)
- host_arm_ADD_IMM(block, REG_R0, REG_R0, uop->imm_data);
- host_arm_VMOV_D_D(block, REG_D_TEMP, src_reg);
- host_arm_BL(block, (uintptr_t)codegen_mem_store_double);
- host_arm_TST_REG(block, REG_R1, REG_R1);
- host_arm_BNE(block, (uintptr_t)codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_MOV(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm_MOV_REG_LSL(block, dest_reg, src_reg, 0);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm_BFI(block, dest_reg, src_reg, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm_BFI(block, dest_reg, src_reg, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_B(src_size))
- {
- host_arm_BFI(block, dest_reg, src_reg, 8, 8);
- }
- else if (REG_IS_B(dest_size) && REG_IS_BH(src_size))
- {
- host_arm_MOV_REG_LSR(block, REG_TEMP, src_reg, 8);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm_MOV_REG_LSR(block, REG_TEMP, src_reg, 8);
- host_arm_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else if (REG_IS_D(dest_size) && REG_IS_D(src_size))
- {
- host_arm_VMOV_D_D(block, dest_reg, src_reg);
- }
- else if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- host_arm_VMOV_D_D(block, dest_reg, src_reg);
- }
- else
- fatal("MOV %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-
-static int codegen_MOV_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_L(dest_size))
- {
- host_arm_MOV_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size))
- {
- host_arm_MOVW_IMM(block, REG_TEMP, uop->imm_data);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size))
- {
- host_arm_AND_IMM(block, dest_reg, dest_reg, ~0x000000ff);
- host_arm_ORR_IMM(block, dest_reg, dest_reg, uop->imm_data);
- }
- else if (REG_IS_BH(dest_size))
- {
- host_arm_AND_IMM(block, dest_reg, dest_reg, ~0x0000ff00);
- host_arm_ORR_IMM(block, dest_reg, dest_reg, uop->imm_data << 8);
- }
- else
- fatal("MOV_IMM %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-static int codegen_MOV_PTR(codeblock_t *block, uop_t *uop)
-{
- host_arm_MOV_IMM(block, uop->dest_reg_a_real, (uintptr_t)uop->p);
-
- return 0;
-}
-
-static int codegen_MOVSX(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_B(src_size))
- {
- host_arm_SXTB(block, dest_reg, src_reg, 0);
- }
- else if (REG_IS_L(dest_size) && REG_IS_BH(src_size))
- {
- host_arm_SXTB(block, dest_reg, src_reg, 8);
- }
- else if (REG_IS_L(dest_size) && REG_IS_W(src_size))
- {
- host_arm_SXTH(block, dest_reg, src_reg, 0);
- }
- else if (REG_IS_W(dest_size) && REG_IS_B(src_size))
- {
- host_arm_SXTB(block, REG_TEMP, src_reg, 0);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_W(dest_size) && REG_IS_BH(src_size))
- {
- host_arm_SXTB(block, REG_TEMP, src_reg, 8);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else
- fatal("MOVSX %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_MOVZX(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_L(src_size))
- {
- host_arm_MOV_IMM(block, REG_TEMP, 0);
- host_arm_VMOV_D_64(block, dest_reg, src_reg, REG_TEMP);
- }
- else if (REG_IS_L(dest_size) && REG_IS_Q(src_size))
- {
- host_arm_VMOV_32_S(block, dest_reg, src_reg);
- }
- else if (REG_IS_L(dest_size) && REG_IS_B(src_size))
- {
- host_arm_UXTB(block, dest_reg, src_reg, 0);
- }
- else if (REG_IS_L(dest_size) && REG_IS_BH(src_size))
- {
- host_arm_UXTB(block, dest_reg, src_reg, 8);
- }
- else if (REG_IS_L(dest_size) && REG_IS_W(src_size))
- {
- host_arm_UXTH(block, dest_reg, src_reg, 0);
- }
- else if (REG_IS_W(dest_size) && REG_IS_B(src_size))
- {
- if (src_reg == dest_reg)
- host_arm_BIC_IMM(block, dest_reg, dest_reg, 0xff00);
- else
- {
- host_arm_UXTB(block, REG_TEMP, src_reg, 0);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- }
- else if (REG_IS_W(dest_size) && REG_IS_BH(src_size))
- {
- host_arm_MOV_REG_LSR(block, REG_TEMP, src_reg, 8);
- host_arm_BIC_IMM(block, dest_reg, dest_reg, 0xff00);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else
- fatal("MOVZX %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static double int64_to_double(int64_t a)
-{
- return (double)a;
-}
-static int codegen_MOV_DOUBLE_INT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_D(dest_size) && REG_IS_L(src_size))
- {
- host_arm_VMOV_S_32(block, REG_D_TEMP, src_reg);
- host_arm_VCVT_D_IS(block, dest_reg, REG_D_TEMP);
- }
- else if (REG_IS_D(dest_size) && REG_IS_W(src_size))
- {
- host_arm_SXTH(block, REG_TEMP, src_reg, 0);
- host_arm_VMOV_S_32(block, REG_D_TEMP, REG_TEMP);
- host_arm_VCVT_D_IS(block, dest_reg, REG_D_TEMP);
- }
- else if (REG_IS_D(dest_size) && REG_IS_Q(src_size))
- {
- /*ARMv7 has no instructions to convert a 64-bit integer to a double.
- For simplicity, call a C function and let the compiler do it.*/
- host_arm_VMOV_64_D(block, REG_R0, REG_R1, src_reg);
- host_arm_BL(block, (uintptr_t)int64_to_double); /*Input - R0/R1, Output - D0*/
- host_arm_VMOV_D_D(block, dest_reg, REG_D0);
- }
- else
- fatal("MOV_DOUBLE_INT %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_MOV_INT_DOUBLE(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_D(src_size))
- {
- host_arm_VMOV_D_D(block, REG_D_TEMP, src_reg);
- host_arm_BL(block, (uintptr_t)codegen_fp_round);
- host_arm_VMOV_32_S(block, dest_reg, REG_D_TEMP);
- }
- else if (REG_IS_W(dest_size) && REG_IS_D(src_size))
- {
- host_arm_VMOV_D_D(block, REG_D_TEMP, src_reg);
- host_arm_BL(block, (uintptr_t)codegen_fp_round);
- host_arm_VMOV_32_S(block, REG_TEMP, REG_D_TEMP);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else
- fatal("MOV_INT_DOUBLE %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int64_t x87_fround64(double b)
-{
- int64_t a, c;
-
- switch ((cpu_state.npxc >> 10) & 3)
- {
- case 0: /*Nearest*/
- a = (int64_t)floor(b);
- c = (int64_t)floor(b + 1.0);
- if ((b - a) < (c - b))
- return a;
- else if ((b - a) > (c - b))
- return c;
- else
- return (a & 1) ? c : a;
- case 1: /*Down*/
- return (int64_t)floor(b);
- case 2: /*Up*/
- return (int64_t)ceil(b);
- case 3: /*Chop*/
- return (int64_t)b;
- }
-
- return 0;
-}
-static int codegen_MOV_INT_DOUBLE_64(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), src_64_reg = HOST_REG_GET(uop->src_reg_b_real), tag_reg = HOST_REG_GET(uop->src_reg_c_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real), src_64_size = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_D(src_size) && REG_IS_Q(src_64_size))
- {
- uint32_t *branch_offset;
-
- /*If TAG_UINT64 is set then the source is MM[]. Otherwise it is a double in ST()*/
- host_arm_VMOV_D_D(block, dest_reg, src_64_reg);
- host_arm_TST_IMM(block, tag_reg, TAG_UINT64);
- branch_offset = host_arm_BNE_(block);
-
- /*VFP/NEON has no instructions to convert a float to 64-bit integer,
- so call out to C.*/
- host_arm_VMOV_D_D(block, REG_D0, src_reg);
- host_arm_call(block, x87_fround64);
- host_arm_VMOV_D_64(block, REG_D_TEMP, REG_R0, REG_R1);
-
- *branch_offset |= ((((uintptr_t)&block_write_data[block_pos] - (uintptr_t)branch_offset) - 8) & 0x3fffffc) >> 2;
- }
- else
- fatal("MOV_INT_DOUBLE_64 %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_MOV_REG_PTR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- host_arm_MOV_IMM(block, REG_TEMP, (uintptr_t)uop->p);
- if (REG_IS_L(dest_size))
- {
- host_arm_LDR_IMM(block, dest_reg, REG_TEMP, 0);
- }
- else
- fatal("MOV_REG_PTR %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-static int codegen_MOVZX_REG_PTR_8(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- host_arm_MOV_IMM(block, REG_TEMP, (uintptr_t)uop->p);
- if (REG_IS_L(dest_size))
- {
- host_arm_LDRB_IMM(block, dest_reg, REG_TEMP, 0);
- }
- else if (REG_IS_W(dest_size))
- {
- host_arm_LDRB_IMM(block, REG_TEMP, REG_TEMP, 0);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size))
- {
- host_arm_LDRB_IMM(block, REG_TEMP, REG_TEMP, 0);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else
- fatal("MOVZX_REG_PTR_8 %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-static int codegen_MOVZX_REG_PTR_16(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- host_arm_MOV_IMM(block, REG_TEMP, (uintptr_t)uop->p);
- if (REG_IS_L(dest_size))
- {
- host_arm_LDRH_IMM(block, dest_reg, REG_TEMP, 0);
- }
- else if (REG_IS_W(dest_size))
- {
- host_arm_LDRH_IMM(block, REG_TEMP, REG_TEMP, 0);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else
- fatal("MOVZX_REG_PTR_16 %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-
-static int codegen_NOP(codeblock_t *block, uop_t *uop)
-{
- return 0;
-}
-
-static int codegen_OR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VORR_D(block, dest_reg, src_reg_a, src_reg_b);
- }
- else if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm_ORR_REG_LSL(block, dest_reg, src_reg_a, src_reg_b, 0);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm_ORR_REG_LSL(block, REG_TEMP, src_reg_a, src_reg_b, 0);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm_UXTB(block, REG_TEMP, src_reg_b, 0);
- host_arm_ORR_REG_LSL(block, dest_reg, src_reg_a, REG_TEMP, 0);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_BH(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm_UXTB(block, REG_TEMP, src_reg_b, 8);
- host_arm_ORR_REG_LSL(block, dest_reg, src_reg_a, REG_TEMP, 0);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_B(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm_UXTB(block, REG_TEMP, src_reg_b, 0);
- host_arm_ORR_REG_LSL(block, dest_reg, src_reg_a, REG_TEMP, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_BH(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm_UXTB(block, REG_TEMP, src_reg_b, 8);
- host_arm_ORR_REG_LSL(block, dest_reg, src_reg_a, REG_TEMP, 8);
- }
- else
- fatal("OR %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_OR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm_ORR_IMM(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size) && dest_reg == src_reg)
- {
- host_arm_ORR_IMM(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size) && dest_reg == src_reg)
- {
- host_arm_ORR_IMM(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size) && dest_reg == src_reg)
- {
- host_arm_ORR_IMM(block, dest_reg, src_reg, uop->imm_data << 8);
- }
- else
- fatal("OR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-
-static int codegen_PACKSSWB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VMOV_D_D(block, REG_Q_TEMP, src_reg_a);
- host_arm_VMOV_D_D(block, REG_Q_TEMP_2, src_reg_b);
- host_arm_VQMOVN_S16(block, dest_reg, REG_Q_TEMP);
- host_arm_VQMOVN_S16(block, REG_D_TEMP, REG_Q_TEMP_2);
- host_arm_VZIP_D32(block, dest_reg, REG_D_TEMP);
- }
- else
- fatal("PACKSSWB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PACKSSDW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VMOV_D_D(block, REG_Q_TEMP, src_reg_a);
- host_arm_VMOV_D_D(block, REG_Q_TEMP_2, src_reg_b);
- host_arm_VQMOVN_S32(block, dest_reg, REG_Q_TEMP);
- host_arm_VQMOVN_S32(block, REG_D_TEMP, REG_Q_TEMP_2);
- host_arm_VZIP_D32(block, dest_reg, REG_D_TEMP);
- }
- else
- fatal("PACKSSDW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PACKUSWB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VMOV_D_D(block, REG_Q_TEMP, src_reg_a);
- host_arm_VMOV_D_D(block, REG_Q_TEMP_2, src_reg_b);
- host_arm_VQMOVN_U16(block, dest_reg, REG_Q_TEMP);
- host_arm_VQMOVN_U16(block, REG_D_TEMP, REG_Q_TEMP_2);
- host_arm_VZIP_D32(block, dest_reg, REG_D_TEMP);
- }
- else
- fatal("PACKUSWB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-
-static int codegen_PADDB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VADD_I8(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PADDB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PADDW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VADD_I16(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PADDW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PADDD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VADD_I32(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PADDD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PADDSB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VQADD_S8(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PADDSB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PADDSW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VQADD_S16(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PADDSW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PADDUSB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VQADD_U8(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PADDUSB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PADDUSW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VQADD_U16(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PADDUSW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-
-static int codegen_PCMPEQB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VCEQ_I8(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PCMPEQB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PCMPEQW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VCEQ_I16(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PCMPEQW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PCMPEQD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VCEQ_I32(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PCMPEQD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PCMPGTB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VCGT_S8(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PCMPGTB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PCMPGTW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VCGT_S16(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PCMPGTW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PCMPGTD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VCGT_S32(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PCMPGTD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-
-static int codegen_PF2ID(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a))
- {
- host_arm_VCVT_S32_F32(block, dest_reg, src_reg_a);
- }
- else
- fatal("PF2ID %02x %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-static int codegen_PFADD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VADD_F32(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PFADD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PFCMPEQ(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VCEQ_F32(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PFCMPEQ %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PFCMPGE(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VCGE_F32(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PFCMPGE %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PFCMPGT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VCGT_F32(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PFCMPGT %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PFMAX(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VMAX_F32(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PFMAX %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PFMIN(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VMIN_F32(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PFMIN %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PFMUL(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VMUL_F32(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PFMUL %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PFRCP(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a))
- {
- /*TODO: This could be improved (use VRECPE/VRECPS)*/
- host_arm_VMOV_F32_ONE(block, REG_D_TEMP);
- host_arm_VDIV_S(block, dest_reg, REG_D_TEMP, src_reg_a);
- host_arm_VDUP_32(block, dest_reg, dest_reg, 0);
- }
- else
- fatal("PFRCP %02x %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-static int codegen_PFRSQRT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a))
- {
- /*TODO: This could be improved (use VRSQRTE/VRSQRTS)*/
- host_arm_VSQRT_S(block, REG_D_TEMP, src_reg_a);
- host_arm_VMOV_F32_ONE(block, REG_D_TEMP);
- host_arm_VDIV_S(block, dest_reg, dest_reg, REG_D_TEMP);
- host_arm_VDUP_32(block, dest_reg, dest_reg, 0);
- }
- else
- fatal("PFRSQRT %02x %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-static int codegen_PFSUB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VSUB_F32(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PFSUB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PI2FD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a))
- {
- host_arm_VCVT_F32_S32(block, dest_reg, src_reg_a);
- }
- else
- fatal("PI2FD %02x %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-
-static int codegen_PMADDWD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VMULL_S16(block, REG_Q_TEMP, src_reg_a, src_reg_b);
- host_arm_VPADDL_Q_S32(block, REG_Q_TEMP, REG_Q_TEMP);
- host_arm_VMOVN_I64(block, dest_reg, REG_Q_TEMP);
- }
- else
- fatal("PMULHW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PMULHW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VMULL_S16(block, REG_Q_TEMP, src_reg_a, src_reg_b);
- host_arm_VSHRN_32(block, dest_reg, REG_Q_TEMP, 16);
- }
- else
- fatal("PMULHW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PMULLW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VMUL_S16(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PMULLW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-
-static int codegen_PSLLW_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- if (uop->imm_data == 0)
- host_arm_VMOV_D_D(block, dest_reg, src_reg);
- else if (uop->imm_data > 15)
- host_arm_VEOR_D(block, dest_reg, dest_reg, dest_reg);
- else
- host_arm_VSHL_D_IMM_16(block, dest_reg, src_reg, uop->imm_data);
- }
- else
- fatal("PSLLW_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_PSLLD_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- if (uop->imm_data == 0)
- host_arm_VMOV_D_D(block, dest_reg, src_reg);
- else if (uop->imm_data > 31)
- host_arm_VEOR_D(block, dest_reg, dest_reg, dest_reg);
- else
- host_arm_VSHL_D_IMM_32(block, dest_reg, src_reg, uop->imm_data);
- }
- else
- fatal("PSLLD_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_PSLLQ_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- if (uop->imm_data == 0)
- host_arm_VMOV_D_D(block, dest_reg, src_reg);
- else if (uop->imm_data > 63)
- host_arm_VEOR_D(block, dest_reg, dest_reg, dest_reg);
- else
- host_arm_VSHL_D_IMM_64(block, dest_reg, src_reg, uop->imm_data);
- }
- else
- fatal("PSLLQ_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_PSRAW_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- if (uop->imm_data == 0)
- host_arm_VMOV_D_D(block, dest_reg, src_reg);
- else if (uop->imm_data > 15)
- host_arm_VSHR_D_S16(block, dest_reg, src_reg, 15);
- else
- host_arm_VSHR_D_S16(block, dest_reg, src_reg, uop->imm_data);
- }
- else
- fatal("PSRAW_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_PSRAD_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- if (uop->imm_data == 0)
- host_arm_VMOV_D_D(block, dest_reg, src_reg);
- else if (uop->imm_data > 31)
- host_arm_VSHR_D_S32(block, dest_reg, src_reg, 31);
- else
- host_arm_VSHR_D_S32(block, dest_reg, src_reg, uop->imm_data);
- }
- else
- fatal("PSRAD_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_PSRAQ_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- if (uop->imm_data == 0)
- host_arm_VMOV_D_D(block, dest_reg, src_reg);
- else if (uop->imm_data > 63)
- host_arm_VSHR_D_S64(block, dest_reg, src_reg, 63);
- else
- host_arm_VSHR_D_S64(block, dest_reg, src_reg, uop->imm_data);
- }
- else
- fatal("PSRAQ_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_PSRLW_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- if (uop->imm_data == 0)
- host_arm_VMOV_D_D(block, dest_reg, src_reg);
- else if (uop->imm_data > 15)
- host_arm_VEOR_D(block, dest_reg, dest_reg, dest_reg);
- else
- host_arm_VSHR_D_U16(block, dest_reg, src_reg, uop->imm_data);
- }
- else
- fatal("PSRLW_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_PSRLD_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- if (uop->imm_data == 0)
- host_arm_VMOV_D_D(block, dest_reg, src_reg);
- else if (uop->imm_data > 31)
- host_arm_VEOR_D(block, dest_reg, dest_reg, dest_reg);
- else
- host_arm_VSHR_D_U32(block, dest_reg, src_reg, uop->imm_data);
- }
- else
- fatal("PSRLD_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_PSRLQ_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- if (uop->imm_data == 0)
- host_arm_VMOV_D_D(block, dest_reg, src_reg);
- else if (uop->imm_data > 63)
- host_arm_VEOR_D(block, dest_reg, dest_reg, dest_reg);
- else
- host_arm_VSHR_D_U64(block, dest_reg, src_reg, uop->imm_data);
- }
- else
- fatal("PSRLQ_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-
-static int codegen_PSUBB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VSUB_I8(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PSUBB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PSUBW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VSUB_I16(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PSUBW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PSUBD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VSUB_I32(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PSUBD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PSUBSB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VQSUB_S8(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PSUBSB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PSUBSW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VQSUB_S16(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PSUBSW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PSUBUSB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VQSUB_U8(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PSUBUSB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PSUBUSW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VQSUB_U16(block, dest_reg, src_reg_a, src_reg_b);
- }
- else
- fatal("PSUBUSW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-
-static int codegen_PUNPCKHBW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VMOV_D_D(block, REG_D_TEMP, src_reg_b);
- if (dest_reg != src_reg_a)
- host_arm_VMOV_D_D(block, dest_reg, src_reg_a);
- host_arm_VZIP_D8(block, dest_reg, REG_D_TEMP);
- host_arm_VMOV_D_D(block, dest_reg, REG_D_TEMP);
- }
- else
- fatal("PUNPCKHBW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PUNPCKHWD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VMOV_D_D(block, REG_D_TEMP, src_reg_b);
- if (dest_reg != src_reg_a)
- host_arm_VMOV_D_D(block, dest_reg, src_reg_a);
- host_arm_VZIP_D16(block, dest_reg, REG_D_TEMP);
- host_arm_VMOV_D_D(block, dest_reg, REG_D_TEMP);
- }
- else
- fatal("PUNPCKHWD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PUNPCKHDQ(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VMOV_D_D(block, REG_D_TEMP, src_reg_b);
- if (dest_reg != src_reg_a)
- host_arm_VMOV_D_D(block, dest_reg, src_reg_a);
- host_arm_VZIP_D32(block, dest_reg, REG_D_TEMP);
- host_arm_VMOV_D_D(block, dest_reg, REG_D_TEMP);
- }
- else
- fatal("PUNPCKHDQ %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PUNPCKLBW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VMOV_D_D(block, REG_D_TEMP, src_reg_b);
- if (dest_reg != src_reg_a)
- host_arm_VMOV_D_D(block, dest_reg, src_reg_a);
- host_arm_VZIP_D8(block, dest_reg, REG_D_TEMP);
- }
- else
- fatal("PUNPCKLBW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PUNPCKLWD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VMOV_D_D(block, REG_D_TEMP, src_reg_b);
- if (dest_reg != src_reg_a)
- host_arm_VMOV_D_D(block, dest_reg, src_reg_a);
- host_arm_VZIP_D16(block, dest_reg, REG_D_TEMP);
- }
- else
- fatal("PUNPCKLWD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_PUNPCKLDQ(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VMOV_D_D(block, REG_D_TEMP, src_reg_b);
- if (dest_reg != src_reg_a)
- host_arm_VMOV_D_D(block, dest_reg, src_reg_a);
- host_arm_VZIP_D32(block, dest_reg, REG_D_TEMP);
- }
- else
- fatal("PUNPCKLDQ %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-
-static int codegen_ROL(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm_RSB_IMM(block, REG_TEMP2, shift_reg, 32);
- host_arm_MOV_REG_ROR_REG(block, dest_reg, src_reg, REG_TEMP2);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm_UXTH(block, REG_TEMP, src_reg, 0);
- host_arm_RSB_IMM(block, REG_TEMP2, shift_reg, 16);
- host_arm_ORR_REG_LSL(block, REG_TEMP, REG_TEMP, REG_TEMP, 16);
- host_arm_MOV_REG_ROR_REG(block, REG_TEMP, REG_TEMP, REG_TEMP2);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm_RSB_IMM(block, REG_TEMP2, shift_reg, 8);
- host_arm_UXTB(block, REG_TEMP, src_reg, 0);
- host_arm_AND_IMM(block, REG_TEMP2, REG_TEMP2, 7);
- host_arm_ORR_REG_LSL(block, REG_TEMP, REG_TEMP, REG_TEMP, 8);
- host_arm_MOV_REG_LSR_REG(block, REG_TEMP, REG_TEMP, REG_TEMP2);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm_RSB_IMM(block, REG_TEMP2, shift_reg, 8);
- host_arm_UXTB(block, REG_TEMP, src_reg, 8);
- host_arm_AND_IMM(block, REG_TEMP2, REG_TEMP2, 7);
- host_arm_ORR_REG_LSL(block, REG_TEMP, REG_TEMP, REG_TEMP, 8);
- host_arm_MOV_REG_LSR_REG(block, REG_TEMP, REG_TEMP, REG_TEMP2);
- host_arm_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("ROL %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_ROL_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (!(uop->imm_data & 31))
- {
- if (src_reg != dest_reg)
- host_arm_MOV_REG(block, dest_reg, src_reg);
- }
- else
- {
- host_arm_MOV_REG_ROR(block, dest_reg, src_reg, 32 - (uop->imm_data & 31));
- }
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if ((uop->imm_data & 15) == 0)
- {
- if (src_reg != dest_reg)
- host_arm_BFI(block, dest_reg, src_reg, 0, 16);
- }
- else
- {
- host_arm_UXTH(block, REG_TEMP, src_reg, 0);
- host_arm_ORR_REG_LSL(block, REG_TEMP, REG_TEMP, REG_TEMP, 16);
- host_arm_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, 16-(uop->imm_data & 15));
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if ((uop->imm_data & 7) == 0)
- {
- if (src_reg != dest_reg)
- host_arm_BFI(block, dest_reg, src_reg, 0, 8);
- }
- else
- {
- host_arm_UXTB(block, REG_TEMP, src_reg, 0);
- host_arm_ORR_REG_LSL(block, REG_TEMP, REG_TEMP, REG_TEMP, 8);
- host_arm_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, 8-(uop->imm_data & 7));
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- if ((uop->imm_data & 7) == 0)
- {
- if (src_reg != dest_reg)
- fatal("ROL_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
- }
- else
- {
- host_arm_UXTB(block, REG_TEMP, src_reg, 8);
- host_arm_ORR_REG_LSL(block, REG_TEMP, REG_TEMP, REG_TEMP, 8);
- host_arm_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, 8-(uop->imm_data & 7));
- host_arm_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- }
- else
- fatal("ROL_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_ROR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm_MOV_REG_ROR_REG(block, dest_reg, src_reg, shift_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm_UXTH(block, REG_TEMP, src_reg, 0);
- host_arm_AND_IMM(block, REG_TEMP2, shift_reg, 15);
- host_arm_ORR_REG_LSL(block, REG_TEMP, REG_TEMP, REG_TEMP, 16);
- host_arm_MOV_REG_LSR_REG(block, REG_TEMP, REG_TEMP, REG_TEMP2);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm_UXTB(block, REG_TEMP, src_reg, 0);
- host_arm_AND_IMM(block, REG_TEMP2, shift_reg, 7);
- host_arm_ORR_REG_LSL(block, REG_TEMP, REG_TEMP, REG_TEMP, 8);
- host_arm_MOV_REG_LSR_REG(block, REG_TEMP, REG_TEMP, REG_TEMP2);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm_UXTB(block, REG_TEMP, src_reg, 8);
- host_arm_AND_IMM(block, REG_TEMP2, shift_reg, 7);
- host_arm_ORR_REG_LSL(block, REG_TEMP, REG_TEMP, REG_TEMP, 8);
- host_arm_MOV_REG_LSR_REG(block, REG_TEMP, REG_TEMP, REG_TEMP2);
- host_arm_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("ROR %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_ROR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (!(uop->imm_data & 31))
- {
- if (src_reg != dest_reg)
- host_arm_MOV_REG(block, dest_reg, src_reg);
- }
- else
- {
- host_arm_MOV_REG_ROR(block, dest_reg, src_reg, uop->imm_data & 31);
- }
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if ((uop->imm_data & 15) == 0)
- {
- if (src_reg != dest_reg)
- fatal("ROR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
- }
- else
- {
- host_arm_UXTH(block, REG_TEMP, src_reg, 0);
- host_arm_ORR_REG_LSL(block, REG_TEMP, REG_TEMP, REG_TEMP, 16);
- host_arm_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, uop->imm_data & 15);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if ((uop->imm_data & 7) == 0)
- {
- if (src_reg != dest_reg)
- fatal("ROR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
- }
- else
- {
- host_arm_UXTB(block, REG_TEMP, src_reg, 0);
- host_arm_ORR_REG_LSL(block, REG_TEMP, REG_TEMP, REG_TEMP, 8);
- host_arm_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, uop->imm_data & 7);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- if ((uop->imm_data & 7) == 0)
- {
- if (src_reg != dest_reg)
- fatal("ROR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
- }
- else
- {
- host_arm_UXTB(block, REG_TEMP, src_reg, 8);
- host_arm_ORR_REG_LSL(block, REG_TEMP, REG_TEMP, REG_TEMP, 8);
- host_arm_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, uop->imm_data & 7);
- host_arm_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- }
- else
- fatal("ROR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-
-static int codegen_SAR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm_MOV_REG_ASR_REG(block, dest_reg, src_reg, shift_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg, 16);
- host_arm_MOV_REG_ASR_REG(block, REG_TEMP, REG_TEMP, shift_reg);
- host_arm_UXTH(block, REG_TEMP, REG_TEMP, 16);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg, 24);
- host_arm_MOV_REG_ASR_REG(block, REG_TEMP, REG_TEMP, shift_reg);
- host_arm_UXTB(block, REG_TEMP, REG_TEMP, 24);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg, 16);
- host_arm_MOV_REG_ASR_REG(block, REG_TEMP, REG_TEMP, shift_reg);
- host_arm_UXTB(block, REG_TEMP, REG_TEMP, 24);
- host_arm_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("SAR %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_SAR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm_MOV_REG_ASR(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg, 16);
- host_arm_MOV_REG_ASR(block, REG_TEMP, REG_TEMP, uop->imm_data);
- host_arm_UXTH(block, REG_TEMP, REG_TEMP, 16);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg, 24);
- host_arm_MOV_REG_ASR(block, REG_TEMP, REG_TEMP, uop->imm_data);
- host_arm_UXTB(block, REG_TEMP, REG_TEMP, 24);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg, 16);
- host_arm_MOV_REG_ASR(block, REG_TEMP, REG_TEMP, uop->imm_data);
- host_arm_UXTB(block, REG_TEMP, REG_TEMP, 24);
- host_arm_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("SAR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_SHL(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm_MOV_REG_LSL_REG(block, dest_reg, src_reg, shift_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm_MOV_REG_LSL_REG(block, REG_TEMP, src_reg, shift_reg);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm_MOV_REG_LSL_REG(block, REG_TEMP, src_reg, shift_reg);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm_UXTB(block, REG_TEMP, src_reg, 8);
- host_arm_MOV_REG_LSL_REG(block, REG_TEMP, REG_TEMP, shift_reg);
- host_arm_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("SHL %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_SHL_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm_MOV_REG_LSL(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg, uop->imm_data);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm_MOV_REG_LSL(block, REG_TEMP, src_reg, uop->imm_data);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm_UXTB(block, REG_TEMP, src_reg, 8);
- host_arm_MOV_REG_LSL(block, REG_TEMP, REG_TEMP, uop->imm_data);
- host_arm_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("SHL_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_SHR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm_MOV_REG_LSR_REG(block, dest_reg, src_reg, shift_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm_UXTH(block, REG_TEMP, src_reg, 0);
- host_arm_MOV_REG_LSR_REG(block, REG_TEMP, REG_TEMP, shift_reg);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm_UXTB(block, REG_TEMP, src_reg, 0);
- host_arm_MOV_REG_LSR_REG(block, REG_TEMP, REG_TEMP, shift_reg);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm_UXTB(block, REG_TEMP, src_reg, 8);
- host_arm_MOV_REG_LSR_REG(block, REG_TEMP, REG_TEMP, shift_reg);
- host_arm_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("SHR %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-static int codegen_SHR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm_MOV_REG_LSR(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm_UXTH(block, REG_TEMP, src_reg, 0);
- host_arm_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, uop->imm_data);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm_UXTB(block, REG_TEMP, src_reg, 0);
- host_arm_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, uop->imm_data);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm_UXTB(block, REG_TEMP, src_reg, 8);
- host_arm_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, uop->imm_data);
- host_arm_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("SHR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-
-static int codegen_STORE_PTR_IMM(codeblock_t *block, uop_t *uop)
-{
- host_arm_MOV_IMM(block, REG_R0, uop->imm_data);
-
- if (in_range(uop->p, &cpu_state))
- host_arm_STR_IMM(block, REG_R0, REG_CPUSTATE, (uintptr_t)uop->p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_STORE_PTR_IMM - not in range\n");
-
- return 0;
-}
-static int codegen_STORE_PTR_IMM_8(codeblock_t *block, uop_t *uop)
-{
- host_arm_MOV_IMM(block, REG_R0, uop->imm_data);
- if (in_range(uop->p, &cpu_state))
- host_arm_STRB_IMM(block, REG_R0, REG_CPUSTATE, (uintptr_t)uop->p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_STORE_PTR_IMM - not in range\n");
-
- return 0;
-}
-
-static int codegen_SUB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm_SUB_REG_LSL(block, dest_reg, src_reg_a, src_reg_b, 0);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_arm_SUB_REG_LSL(block, REG_TEMP, src_reg_a, src_reg_b, 0);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm_SUB_REG_LSL(block, REG_TEMP, src_reg_a, src_reg_b, 0);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_BH(src_size_b))
- {
- host_arm_SUB_REG_LSR(block, REG_TEMP, src_reg_a, src_reg_b, 8);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_B(dest_size) && REG_IS_BH(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm_RSB_REG_LSR(block, REG_TEMP, src_reg_b, src_reg_a, 8);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_B(dest_size) && REG_IS_BH(src_size_a) && REG_IS_BH(src_size_b))
- {
- host_arm_SUB_REG_LSL(block, REG_TEMP, src_reg_a, src_reg_b, 0);
- host_arm_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, 8);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_B(src_size_b))
- {
- host_arm_RSB_REG_LSR(block, REG_TEMP, src_reg_b, src_reg_a, 8);
- host_arm_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_BH(src_size_b))
- {
- host_arm_MOV_REG_LSR(block, REG_TEMP, src_reg_a, 8);
- host_arm_SUB_REG_LSR(block, REG_TEMP, REG_TEMP, src_reg_b, 8);
- host_arm_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("SUB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-
-// host_arm_SUB_REG_LSL(block, uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real, 0);
-// return 0;
-}
-static int codegen_SUB_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm_SUB_IMM(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_arm_SUB_IMM(block, REG_TEMP, src_reg, uop->imm_data);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 16);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_arm_SUB_IMM(block, REG_TEMP, src_reg, uop->imm_data);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_B(dest_size) && REG_IS_BH(src_size))
- {
- host_arm_SUB_IMM(block, REG_TEMP, src_reg, uop->imm_data << 8);
- host_arm_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, 8);
- host_arm_BFI(block, dest_reg, REG_TEMP, 0, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size))
- {
- host_arm_SUB_IMM(block, REG_TEMP, src_reg, uop->imm_data << 8);
- host_arm_MOV_REG_LSR(block, REG_TEMP, REG_TEMP, 8);
- host_arm_BFI(block, dest_reg, REG_TEMP, 8, 8);
- }
- else
- fatal("SUB_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-
-static int codegen_TEST_JNS_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_arm_TST_IMM(block, src_reg, 1 << 31);
- }
- else if (REG_IS_W(src_size))
- {
- host_arm_TST_IMM(block, src_reg, 1 << 15);
- }
- else if (REG_IS_B(src_size))
- {
- host_arm_TST_IMM(block, src_reg, 1 << 7);
- }
- else
- fatal("TEST_JNS_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm_BEQ_(block);
-
- return 0;
-}
-static int codegen_TEST_JS_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_arm_TST_IMM(block, src_reg, 1 << 31);
- }
- else if (REG_IS_W(src_size))
- {
- host_arm_TST_IMM(block, src_reg, 1 << 15);
- }
- else if (REG_IS_B(src_size))
- {
- host_arm_TST_IMM(block, src_reg, 1 << 7);
- }
- else
- fatal("TEST_JS_DEST %02x\n", uop->src_reg_a_real);
-
- uop->p = host_arm_BNE_(block);
-
- return 0;
-}
-
-static int codegen_XOR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_arm_VEOR_D(block, dest_reg, src_reg_a, src_reg_b);
- }
- else if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_arm_EOR_REG_LSL(block, dest_reg, src_reg_a, src_reg_b, 0);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm_UXTH(block, REG_TEMP, src_reg_b, 0);
- host_arm_EOR_REG_LSL(block, dest_reg, src_reg_a, REG_TEMP, 0);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm_UXTB(block, REG_TEMP, src_reg_b, 0);
- host_arm_EOR_REG_LSL(block, dest_reg, src_reg_a, REG_TEMP, 0);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_BH(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm_UXTB(block, REG_TEMP, src_reg_b, 8);
- host_arm_EOR_REG_LSL(block, dest_reg, src_reg_a, REG_TEMP, 0);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_B(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm_UXTB(block, REG_TEMP, src_reg_b, 0);
- host_arm_EOR_REG_LSL(block, dest_reg, src_reg_a, REG_TEMP, 8);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size_a) && REG_IS_BH(src_size_b) && dest_reg == src_reg_a)
- {
- host_arm_UXTB(block, REG_TEMP, src_reg_b, 8);
- host_arm_EOR_REG_LSL(block, dest_reg, src_reg_a, REG_TEMP, 8);
- }
- else
- fatal("XOR %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-
- return 0;
-}
-static int codegen_XOR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_arm_EOR_IMM(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size) && dest_reg == src_reg)
- {
- host_arm_EOR_IMM(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size) && dest_reg == src_reg)
- {
- host_arm_EOR_IMM(block, dest_reg, src_reg, uop->imm_data);
- }
- else if (REG_IS_BH(dest_size) && REG_IS_BH(src_size) && dest_reg == src_reg)
- {
- host_arm_EOR_IMM(block, dest_reg, src_reg, uop->imm_data << 8);
- }
- else
- fatal("XOR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-
- return 0;
-}
-
-const uOpFn uop_handlers[UOP_MAX] =
-{
- [UOP_CALL_FUNC & UOP_MASK] = codegen_CALL_FUNC,
- [UOP_CALL_FUNC_RESULT & UOP_MASK] = codegen_CALL_FUNC_RESULT,
- [UOP_CALL_INSTRUCTION_FUNC & UOP_MASK] = codegen_CALL_INSTRUCTION_FUNC,
-
- [UOP_JMP & UOP_MASK] = codegen_JMP,
-
- [UOP_LOAD_SEG & UOP_MASK] = codegen_LOAD_SEG,
-
- [UOP_LOAD_FUNC_ARG_0 & UOP_MASK] = codegen_LOAD_FUNC_ARG0,
- [UOP_LOAD_FUNC_ARG_1 & UOP_MASK] = codegen_LOAD_FUNC_ARG1,
- [UOP_LOAD_FUNC_ARG_2 & UOP_MASK] = codegen_LOAD_FUNC_ARG2,
- [UOP_LOAD_FUNC_ARG_3 & UOP_MASK] = codegen_LOAD_FUNC_ARG3,
-
- [UOP_LOAD_FUNC_ARG_0_IMM & UOP_MASK] = codegen_LOAD_FUNC_ARG0_IMM,
- [UOP_LOAD_FUNC_ARG_1_IMM & UOP_MASK] = codegen_LOAD_FUNC_ARG1_IMM,
- [UOP_LOAD_FUNC_ARG_2_IMM & UOP_MASK] = codegen_LOAD_FUNC_ARG2_IMM,
- [UOP_LOAD_FUNC_ARG_3_IMM & UOP_MASK] = codegen_LOAD_FUNC_ARG3_IMM,
-
- [UOP_STORE_P_IMM & UOP_MASK] = codegen_STORE_PTR_IMM,
- [UOP_STORE_P_IMM_8 & UOP_MASK] = codegen_STORE_PTR_IMM_8,
-
- [UOP_MEM_LOAD_ABS & UOP_MASK] = codegen_MEM_LOAD_ABS,
- [UOP_MEM_LOAD_REG & UOP_MASK] = codegen_MEM_LOAD_REG,
- [UOP_MEM_LOAD_SINGLE & UOP_MASK] = codegen_MEM_LOAD_SINGLE,
- [UOP_MEM_LOAD_DOUBLE & UOP_MASK] = codegen_MEM_LOAD_DOUBLE,
-
- [UOP_MEM_STORE_ABS & UOP_MASK] = codegen_MEM_STORE_ABS,
- [UOP_MEM_STORE_REG & UOP_MASK] = codegen_MEM_STORE_REG,
- [UOP_MEM_STORE_IMM_8 & UOP_MASK] = codegen_MEM_STORE_IMM_8,
- [UOP_MEM_STORE_IMM_16 & UOP_MASK] = codegen_MEM_STORE_IMM_16,
- [UOP_MEM_STORE_IMM_32 & UOP_MASK] = codegen_MEM_STORE_IMM_32,
- [UOP_MEM_STORE_SINGLE & UOP_MASK] = codegen_MEM_STORE_SINGLE,
- [UOP_MEM_STORE_DOUBLE & UOP_MASK] = codegen_MEM_STORE_DOUBLE,
-
- [UOP_MOV & UOP_MASK] = codegen_MOV,
- [UOP_MOV_PTR & UOP_MASK] = codegen_MOV_PTR,
- [UOP_MOV_IMM & UOP_MASK] = codegen_MOV_IMM,
- [UOP_MOVSX & UOP_MASK] = codegen_MOVSX,
- [UOP_MOVZX & UOP_MASK] = codegen_MOVZX,
- [UOP_MOV_DOUBLE_INT & UOP_MASK] = codegen_MOV_DOUBLE_INT,
- [UOP_MOV_INT_DOUBLE & UOP_MASK] = codegen_MOV_INT_DOUBLE,
- [UOP_MOV_INT_DOUBLE_64 & UOP_MASK] = codegen_MOV_INT_DOUBLE_64,
- [UOP_MOV_REG_PTR & UOP_MASK] = codegen_MOV_REG_PTR,
- [UOP_MOVZX_REG_PTR_8 & UOP_MASK] = codegen_MOVZX_REG_PTR_8,
- [UOP_MOVZX_REG_PTR_16 & UOP_MASK] = codegen_MOVZX_REG_PTR_16,
-
- [UOP_ADD & UOP_MASK] = codegen_ADD,
- [UOP_ADD_IMM & UOP_MASK] = codegen_ADD_IMM,
- [UOP_ADD_LSHIFT & UOP_MASK] = codegen_ADD_LSHIFT,
- [UOP_AND & UOP_MASK] = codegen_AND,
- [UOP_AND_IMM & UOP_MASK] = codegen_AND_IMM,
- [UOP_ANDN & UOP_MASK] = codegen_ANDN,
- [UOP_OR & UOP_MASK] = codegen_OR,
- [UOP_OR_IMM & UOP_MASK] = codegen_OR_IMM,
- [UOP_SUB & UOP_MASK] = codegen_SUB,
- [UOP_SUB_IMM & UOP_MASK] = codegen_SUB_IMM,
- [UOP_XOR & UOP_MASK] = codegen_XOR,
- [UOP_XOR_IMM & UOP_MASK] = codegen_XOR_IMM,
-
- [UOP_SAR & UOP_MASK] = codegen_SAR,
- [UOP_SAR_IMM & UOP_MASK] = codegen_SAR_IMM,
- [UOP_SHL & UOP_MASK] = codegen_SHL,
- [UOP_SHL_IMM & UOP_MASK] = codegen_SHL_IMM,
- [UOP_SHR & UOP_MASK] = codegen_SHR,
- [UOP_SHR_IMM & UOP_MASK] = codegen_SHR_IMM,
- [UOP_ROL & UOP_MASK] = codegen_ROL,
- [UOP_ROL_IMM & UOP_MASK] = codegen_ROL_IMM,
- [UOP_ROR & UOP_MASK] = codegen_ROR,
- [UOP_ROR_IMM & UOP_MASK] = codegen_ROR_IMM,
-
- [UOP_CMP_IMM_JZ & UOP_MASK] = codegen_CMP_IMM_JZ,
-
- [UOP_CMP_JB & UOP_MASK] = codegen_CMP_JB,
- [UOP_CMP_JNBE & UOP_MASK] = codegen_CMP_JNBE,
-
- [UOP_CMP_JNB_DEST & UOP_MASK] = codegen_CMP_JNB_DEST,
- [UOP_CMP_JNBE_DEST & UOP_MASK] = codegen_CMP_JNBE_DEST,
- [UOP_CMP_JNL_DEST & UOP_MASK] = codegen_CMP_JNL_DEST,
- [UOP_CMP_JNLE_DEST & UOP_MASK] = codegen_CMP_JNLE_DEST,
- [UOP_CMP_JNO_DEST & UOP_MASK] = codegen_CMP_JNO_DEST,
- [UOP_CMP_JNZ_DEST & UOP_MASK] = codegen_CMP_JNZ_DEST,
- [UOP_CMP_JB_DEST & UOP_MASK] = codegen_CMP_JB_DEST,
- [UOP_CMP_JBE_DEST & UOP_MASK] = codegen_CMP_JBE_DEST,
- [UOP_CMP_JL_DEST & UOP_MASK] = codegen_CMP_JL_DEST,
- [UOP_CMP_JLE_DEST & UOP_MASK] = codegen_CMP_JLE_DEST,
- [UOP_CMP_JO_DEST & UOP_MASK] = codegen_CMP_JO_DEST,
- [UOP_CMP_JZ_DEST & UOP_MASK] = codegen_CMP_JZ_DEST,
-
- [UOP_CMP_IMM_JNZ_DEST & UOP_MASK] = codegen_CMP_IMM_JNZ_DEST,
- [UOP_CMP_IMM_JZ_DEST & UOP_MASK] = codegen_CMP_IMM_JZ_DEST,
-
- [UOP_TEST_JNS_DEST & UOP_MASK] = codegen_TEST_JNS_DEST,
- [UOP_TEST_JS_DEST & UOP_MASK] = codegen_TEST_JS_DEST,
-
- [UOP_FP_ENTER & UOP_MASK] = codegen_FP_ENTER,
- [UOP_MMX_ENTER & UOP_MASK] = codegen_MMX_ENTER,
-
- [UOP_FADD & UOP_MASK] = codegen_FADD,
- [UOP_FCOM & UOP_MASK] = codegen_FCOM,
- [UOP_FDIV & UOP_MASK] = codegen_FDIV,
- [UOP_FMUL & UOP_MASK] = codegen_FMUL,
- [UOP_FSUB & UOP_MASK] = codegen_FSUB,
-
- [UOP_FABS & UOP_MASK] = codegen_FABS,
- [UOP_FCHS & UOP_MASK] = codegen_FCHS,
- [UOP_FSQRT & UOP_MASK] = codegen_FSQRT,
- [UOP_FTST & UOP_MASK] = codegen_FTST,
-
- [UOP_PACKSSWB & UOP_MASK] = codegen_PACKSSWB,
- [UOP_PACKSSDW & UOP_MASK] = codegen_PACKSSDW,
- [UOP_PACKUSWB & UOP_MASK] = codegen_PACKUSWB,
-
- [UOP_PADDB & UOP_MASK] = codegen_PADDB,
- [UOP_PADDW & UOP_MASK] = codegen_PADDW,
- [UOP_PADDD & UOP_MASK] = codegen_PADDD,
- [UOP_PADDSB & UOP_MASK] = codegen_PADDSB,
- [UOP_PADDSW & UOP_MASK] = codegen_PADDSW,
- [UOP_PADDUSB & UOP_MASK] = codegen_PADDUSB,
- [UOP_PADDUSW & UOP_MASK] = codegen_PADDUSW,
-
- [UOP_PCMPEQB & UOP_MASK] = codegen_PCMPEQB,
- [UOP_PCMPEQW & UOP_MASK] = codegen_PCMPEQW,
- [UOP_PCMPEQD & UOP_MASK] = codegen_PCMPEQD,
- [UOP_PCMPGTB & UOP_MASK] = codegen_PCMPGTB,
- [UOP_PCMPGTW & UOP_MASK] = codegen_PCMPGTW,
- [UOP_PCMPGTD & UOP_MASK] = codegen_PCMPGTD,
-
- [UOP_PF2ID & UOP_MASK] = codegen_PF2ID,
- [UOP_PFADD & UOP_MASK] = codegen_PFADD,
- [UOP_PFCMPEQ & UOP_MASK] = codegen_PFCMPEQ,
- [UOP_PFCMPGE & UOP_MASK] = codegen_PFCMPGE,
- [UOP_PFCMPGT & UOP_MASK] = codegen_PFCMPGT,
- [UOP_PFMAX & UOP_MASK] = codegen_PFMAX,
- [UOP_PFMIN & UOP_MASK] = codegen_PFMIN,
- [UOP_PFMUL & UOP_MASK] = codegen_PFMUL,
- [UOP_PFRCP & UOP_MASK] = codegen_PFRCP,
- [UOP_PFRSQRT & UOP_MASK] = codegen_PFRSQRT,
- [UOP_PFSUB & UOP_MASK] = codegen_PFSUB,
- [UOP_PI2FD & UOP_MASK] = codegen_PI2FD,
-
- [UOP_PMADDWD & UOP_MASK] = codegen_PMADDWD,
- [UOP_PMULHW & UOP_MASK] = codegen_PMULHW,
- [UOP_PMULLW & UOP_MASK] = codegen_PMULLW,
-
- [UOP_PSLLW_IMM & UOP_MASK] = codegen_PSLLW_IMM,
- [UOP_PSLLD_IMM & UOP_MASK] = codegen_PSLLD_IMM,
- [UOP_PSLLQ_IMM & UOP_MASK] = codegen_PSLLQ_IMM,
- [UOP_PSRAW_IMM & UOP_MASK] = codegen_PSRAW_IMM,
- [UOP_PSRAD_IMM & UOP_MASK] = codegen_PSRAD_IMM,
- [UOP_PSRAQ_IMM & UOP_MASK] = codegen_PSRAQ_IMM,
- [UOP_PSRLW_IMM & UOP_MASK] = codegen_PSRLW_IMM,
- [UOP_PSRLD_IMM & UOP_MASK] = codegen_PSRLD_IMM,
- [UOP_PSRLQ_IMM & UOP_MASK] = codegen_PSRLQ_IMM,
-
- [UOP_PSUBB & UOP_MASK] = codegen_PSUBB,
- [UOP_PSUBW & UOP_MASK] = codegen_PSUBW,
- [UOP_PSUBD & UOP_MASK] = codegen_PSUBD,
- [UOP_PSUBSB & UOP_MASK] = codegen_PSUBSB,
- [UOP_PSUBSW & UOP_MASK] = codegen_PSUBSW,
- [UOP_PSUBUSB & UOP_MASK] = codegen_PSUBUSB,
- [UOP_PSUBUSW & UOP_MASK] = codegen_PSUBUSW,
-
- [UOP_PUNPCKHBW & UOP_MASK] = codegen_PUNPCKHBW,
- [UOP_PUNPCKHWD & UOP_MASK] = codegen_PUNPCKHWD,
- [UOP_PUNPCKHDQ & UOP_MASK] = codegen_PUNPCKHDQ,
- [UOP_PUNPCKLBW & UOP_MASK] = codegen_PUNPCKLBW,
- [UOP_PUNPCKLWD & UOP_MASK] = codegen_PUNPCKLWD,
- [UOP_PUNPCKLDQ & UOP_MASK] = codegen_PUNPCKLDQ,
-
- [UOP_NOP_BARRIER & UOP_MASK] = codegen_NOP
-};
-
-void codegen_direct_read_8(codeblock_t *block, int host_reg, void *p)
-{
- if (in_range_h(p, &cpu_state))
- host_arm_LDRB_IMM(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_direct_read_8 - not in range\n");
-}
-void codegen_direct_read_16(codeblock_t *block, int host_reg, void *p)
-{
- if (in_range_h(p, &cpu_state))
- host_arm_LDRH_IMM(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- {
- host_arm_MOV_IMM(block, REG_R3, (uintptr_t)p - (uintptr_t)&cpu_state);
- host_arm_LDRH_REG(block, host_reg, REG_CPUSTATE, REG_R3);
- }
-}
-void codegen_direct_read_32(codeblock_t *block, int host_reg, void *p)
-{
- if (in_range(p, &cpu_state))
- host_arm_LDR_IMM(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_direct_read_32 - not in range\n");
-}
-void codegen_direct_read_pointer(codeblock_t *block, int host_reg, void *p)
-{
- codegen_direct_read_32(block, host_reg, p);
-}
-void codegen_direct_read_64(codeblock_t *block, int host_reg, void *p)
-{
- host_arm_VLDR_D(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
-}
-void codegen_direct_read_double(codeblock_t *block, int host_reg, void *p)
-{
- host_arm_VLDR_D(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
-}
-void codegen_direct_read_st_8(codeblock_t *block, int host_reg, void *base, int reg_idx)
-{
- host_arm_LDR_IMM(block, REG_TEMP, REG_HOST_SP, IREG_TOP_diff_stack_offset);
- host_arm_ADD_IMM(block, REG_TEMP, REG_TEMP, reg_idx);
- host_arm_AND_IMM(block, REG_TEMP, REG_TEMP, 7);
- host_arm_ADD_REG_LSL(block, REG_TEMP, REG_CPUSTATE, REG_TEMP, 3);
- host_arm_LDRB_IMM(block, host_reg, REG_TEMP, (uintptr_t)base - (uintptr_t)&cpu_state);
-}
-void codegen_direct_read_st_64(codeblock_t *block, int host_reg, void *base, int reg_idx)
-{
- host_arm_LDR_IMM(block, REG_TEMP, REG_HOST_SP, IREG_TOP_diff_stack_offset);
- host_arm_ADD_IMM(block, REG_TEMP, REG_TEMP, reg_idx);
- host_arm_AND_IMM(block, REG_TEMP, REG_TEMP, 7);
- host_arm_ADD_REG_LSL(block, REG_TEMP, REG_CPUSTATE, REG_TEMP, 3);
- host_arm_VLDR_D(block, host_reg, REG_TEMP, (uintptr_t)base - (uintptr_t)&cpu_state);
-}
-void codegen_direct_read_st_double(codeblock_t *block, int host_reg, void *base, int reg_idx)
-{
- host_arm_LDR_IMM(block, REG_TEMP, REG_HOST_SP, IREG_TOP_diff_stack_offset);
- host_arm_ADD_IMM(block, REG_TEMP, REG_TEMP, reg_idx);
- host_arm_AND_IMM(block, REG_TEMP, REG_TEMP, 7);
- host_arm_ADD_REG_LSL(block, REG_TEMP, REG_CPUSTATE, REG_TEMP, 3);
- host_arm_VLDR_D(block, host_reg, REG_TEMP, (uintptr_t)base - (uintptr_t)&cpu_state);
-}
-
-void codegen_direct_write_8(codeblock_t *block, void *p, int host_reg)
-{
- if (in_range(p, &cpu_state))
- host_arm_STRB_IMM(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_direct_write_8 - not in range\n");
-}
-void codegen_direct_write_16(codeblock_t *block, void *p, int host_reg)
-{
- if (in_range_h(p, &cpu_state))
- host_arm_STRH_IMM(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- {
- host_arm_MOV_IMM(block, REG_R3, (uintptr_t)p - (uintptr_t)&cpu_state);
- host_arm_STRH_REG(block, host_reg, REG_CPUSTATE, REG_R3);
- }
-}
-void codegen_direct_write_32(codeblock_t *block, void *p, int host_reg)
-{
- if (in_range(p, &cpu_state))
- host_arm_STR_IMM(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_direct_write_32 - not in range\n");
-}
-void codegen_direct_write_64(codeblock_t *block, void *p, int host_reg)
-{
- host_arm_VSTR_D(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
-}
-void codegen_direct_write_double(codeblock_t *block, void *p, int host_reg)
-{
- host_arm_VSTR_D(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
-}
-void codegen_direct_write_st_8(codeblock_t *block, void *base, int reg_idx, int host_reg)
-{
- host_arm_LDR_IMM(block, REG_TEMP, REG_HOST_SP, IREG_TOP_diff_stack_offset);
- host_arm_ADD_IMM(block, REG_TEMP, REG_TEMP, reg_idx);
- host_arm_AND_IMM(block, REG_TEMP, REG_TEMP, 7);
- host_arm_ADD_REG_LSL(block, REG_TEMP, REG_CPUSTATE, REG_TEMP, 3);
- host_arm_STRB_IMM(block, host_reg, REG_TEMP, (uintptr_t)base - (uintptr_t)&cpu_state);
-}
-void codegen_direct_write_st_64(codeblock_t *block, void *base, int reg_idx, int host_reg)
-{
- host_arm_LDR_IMM(block, REG_TEMP, REG_HOST_SP, IREG_TOP_diff_stack_offset);
- host_arm_ADD_IMM(block, REG_TEMP, REG_TEMP, reg_idx);
- host_arm_AND_IMM(block, REG_TEMP, REG_TEMP, 7);
- host_arm_ADD_REG_LSL(block, REG_TEMP, REG_CPUSTATE, REG_TEMP, 3);
- host_arm_VSTR_D(block, host_reg, REG_TEMP, (uintptr_t)base - (uintptr_t)&cpu_state);
-}
-void codegen_direct_write_st_double(codeblock_t *block, void *base, int reg_idx, int host_reg)
-{
- host_arm_LDR_IMM(block, REG_TEMP, REG_HOST_SP, IREG_TOP_diff_stack_offset);
- host_arm_ADD_IMM(block, REG_TEMP, REG_TEMP, reg_idx);
- host_arm_AND_IMM(block, REG_TEMP, REG_TEMP, 7);
- host_arm_ADD_REG_LSL(block, REG_TEMP, REG_CPUSTATE, REG_TEMP, 3);
- host_arm_VSTR_D(block, host_reg, REG_TEMP, (uintptr_t)base - (uintptr_t)&cpu_state);
-}
-
-void codegen_direct_write_ptr(codeblock_t *block, void *p, int host_reg)
-{
- if (in_range(p, &cpu_state))
- host_arm_STR_IMM(block, host_reg, REG_CPUSTATE, (uintptr_t)p - (uintptr_t)&cpu_state);
- else
- fatal("codegen_direct_write_ptr - not in range\n");
-}
-
-void codegen_direct_read_16_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- if (stack_offset >= 0 && stack_offset < 256)
- host_arm_LDRH_IMM(block, host_reg, REG_HOST_SP, stack_offset);
- else
- fatal("codegen_direct_read_32 - not in range\n");
-}
-void codegen_direct_read_32_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- if (stack_offset >= 0 && stack_offset < 4096)
- host_arm_LDR_IMM(block, host_reg, REG_HOST_SP, stack_offset);
- else
- fatal("codegen_direct_read_32 - not in range\n");
-}
-void codegen_direct_read_pointer_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- codegen_direct_read_32_stack(block, host_reg, stack_offset);
-}
-void codegen_direct_read_64_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- host_arm_VLDR_D(block, host_reg, REG_HOST_SP, stack_offset);
-}
-void codegen_direct_read_double_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- host_arm_VLDR_D(block, host_reg, REG_HOST_SP, stack_offset);
-}
-
-void codegen_direct_write_32_stack(codeblock_t *block, int stack_offset, int host_reg)
-{
- if (stack_offset >= 0 && stack_offset < 4096)
- host_arm_STR_IMM(block, host_reg, REG_HOST_SP, stack_offset);
- else
- fatal("codegen_direct_write_32 - not in range\n");
-}
-void codegen_direct_write_64_stack(codeblock_t *block, int stack_offset, int host_reg)
-{
- host_arm_VSTR_D(block, host_reg, REG_HOST_SP, stack_offset);
-}
-void codegen_direct_write_double_stack(codeblock_t *block, int stack_offset, int host_reg)
-{
- host_arm_VSTR_D(block, host_reg, REG_HOST_SP, stack_offset);
-}
-
-void codegen_set_jump_dest(codeblock_t *block, void *p)
-{
- *(uint32_t *)p |= ((((uintptr_t)&block_write_data[block_pos] - (uintptr_t)p) - 8) & 0x3fffffc) >> 2;
-}
-#endif
diff --git a/src/codegen_backend_x86-64.c b/src/codegen_backend_x86-64.c
deleted file mode 100644
index a214b69..0000000
--- a/src/codegen_backend_x86-64.c
+++ /dev/null
@@ -1,383 +0,0 @@
-#ifdef __amd64__
-
-#include "ibm.h"
-#include "codegen.h"
-#include "codegen_allocator.h"
-#include "codegen_backend.h"
-#include "codegen_backend_x86-64_defs.h"
-#include "codegen_backend_x86-64_ops.h"
-#include "codegen_backend_x86-64_ops_sse.h"
-#include "codegen_reg.h"
-#include "x86.h"
-
-#if defined(__linux__) || defined(__APPLE__)
-#include
-#include
-#include
-#endif
-#if defined WIN32 || defined _WIN32 || defined _WIN32
-#include
-#endif
-
-void *codegen_mem_load_byte;
-void *codegen_mem_load_word;
-void *codegen_mem_load_long;
-void *codegen_mem_load_quad;
-void *codegen_mem_load_single;
-void *codegen_mem_load_double;
-
-void *codegen_mem_store_byte;
-void *codegen_mem_store_word;
-void *codegen_mem_store_long;
-void *codegen_mem_store_quad;
-void *codegen_mem_store_single;
-void *codegen_mem_store_double;
-
-void *codegen_gpf_rout;
-void *codegen_exit_rout;
-
-host_reg_def_t codegen_host_reg_list[CODEGEN_HOST_REGS] =
-{
- /*Note: while EAX and EDX are normally volatile registers under x86
- calling conventions, the recompiler will explicitly save and restore
- them across funcion calls*/
- {REG_EAX, 0},
- {REG_EBX, 0},
- {REG_EDX, 0}
-};
-
-host_reg_def_t codegen_host_fp_reg_list[CODEGEN_HOST_FP_REGS] =
-{
-#if WIN64
- /*Windows x86-64 calling convention preserves XMM6-XMM15*/
- {REG_XMM6, 0},
- {REG_XMM7, 0},
-#else
- /*System V AMD64 calling convention does not preserve any XMM registers*/
- {REG_XMM6, HOST_REG_FLAG_VOLATILE},
- {REG_XMM7, HOST_REG_FLAG_VOLATILE},
-#endif
- {REG_XMM1, HOST_REG_FLAG_VOLATILE},
- {REG_XMM2, HOST_REG_FLAG_VOLATILE},
- {REG_XMM3, HOST_REG_FLAG_VOLATILE},
- {REG_XMM4, HOST_REG_FLAG_VOLATILE},
- {REG_XMM5, HOST_REG_FLAG_VOLATILE}
-};
-
-static void build_load_routine(codeblock_t *block, int size, int is_float)
-{
- uint8_t *branch_offset;
- uint8_t *misaligned_offset;
-
- /*In - ESI = address
- Out - ECX = data, ESI = abrt*/
- /*MOV ECX, ESI
- SHR ESI, 12
- MOV RSI, [readlookup2+ESI*4]
- CMP ESI, -1
- JNZ +
- MOVZX ECX, B[RSI+RCX]
- XOR ESI,ESI
- RET
- * PUSH EAX
- PUSH EDX
- PUSH ECX
- CALL readmembl
- POP ECX
- POP EDX
- POP EAX
- MOVZX ECX, AL
- RET
- */
- host_x86_MOV32_REG_REG(block, REG_ECX, REG_ESI);
- host_x86_SHR32_IMM(block, REG_ESI, 12);
- host_x86_MOV64_REG_IMM(block, REG_RDI, (uint64_t)(uintptr_t)readlookup2);
- host_x86_MOV64_REG_BASE_INDEX_SHIFT(block, REG_RSI, REG_RDI, REG_RSI, 3);
- if (size != 1)
- {
- host_x86_TEST32_REG_IMM(block, REG_ECX, size-1);
- misaligned_offset = host_x86_JNZ_short(block);
- }
- host_x86_CMP64_REG_IMM(block, REG_RSI, (uint32_t)-1);
- branch_offset = host_x86_JZ_short(block);
- if (size == 1 && !is_float)
- host_x86_MOVZX_BASE_INDEX_32_8(block, REG_ECX, REG_RSI, REG_RCX);
- else if (size == 2 && !is_float)
- host_x86_MOVZX_BASE_INDEX_32_16(block, REG_ECX, REG_RSI, REG_RCX);
- else if (size == 4 && !is_float)
- host_x86_MOV32_REG_BASE_INDEX(block, REG_ECX, REG_RSI, REG_RCX);
- else if (size == 4 && is_float)
- host_x86_CVTSS2SD_XREG_BASE_INDEX(block, REG_XMM_TEMP, REG_RSI, REG_RCX);
- else if (size == 8)
- host_x86_MOVQ_XREG_BASE_INDEX(block, REG_XMM_TEMP, REG_RSI, REG_RCX);
- else
- fatal("build_load_routine: size=%i\n", size);
- host_x86_XOR32_REG_REG(block, REG_ESI, REG_ESI);
- host_x86_RET(block);
-
- *branch_offset = (uint8_t)((uintptr_t)&block_write_data[block_pos] - (uintptr_t)branch_offset) - 1;
- if (size != 1)
- *misaligned_offset = (uint8_t)((uintptr_t)&block_write_data[block_pos] - (uintptr_t)misaligned_offset) - 1;
- host_x86_PUSH(block, REG_RAX);
- host_x86_PUSH(block, REG_RDX);
-#if WIN64
- host_x86_SUB64_REG_IMM(block, REG_RSP, 0x20);
- //host_x86_MOV32_REG_REG(block, REG_ECX, uop->imm_data);
-#else
- host_x86_MOV32_REG_REG(block, REG_EDI, REG_ECX);
-#endif
- if (size == 1 && !is_float)
- {
- host_x86_CALL(block, (void *)readmembl);
- host_x86_MOVZX_REG_32_8(block, REG_ECX, REG_EAX);
- }
- else if (size == 2 && !is_float)
- {
- host_x86_CALL(block, (void *)readmemwl);
- host_x86_MOVZX_REG_32_16(block, REG_ECX, REG_EAX);
- }
- else if (size == 4 && !is_float)
- {
- host_x86_CALL(block, (void *)readmemll);
- host_x86_MOV32_REG_REG(block, REG_ECX, REG_EAX);
- }
- else if (size == 4 && is_float)
- {
- host_x86_CALL(block, (void *)readmemll);
- host_x86_MOVD_XREG_REG(block, REG_XMM_TEMP, REG_EAX);
- host_x86_CVTSS2SD_XREG_XREG(block, REG_XMM_TEMP, REG_XMM_TEMP);
- }
- else if (size == 8)
- {
- host_x86_CALL(block, (void *)readmemql);
- host_x86_MOVQ_XREG_REG(block, REG_XMM_TEMP, REG_RAX);
- }
-#if WIN64
- host_x86_ADD64_REG_IMM(block, REG_RSP, 0x20);
-#endif
- host_x86_POP(block, REG_RDX);
- host_x86_POP(block, REG_RAX);
- host_x86_MOVZX_REG_ABS_32_8(block, REG_ESI, &cpu_state.abrt);
- host_x86_RET(block);
-}
-
-static void build_store_routine(codeblock_t *block, int size, int is_float)
-{
- uint8_t *branch_offset;
- uint8_t *misaligned_offset;
-
- /*In - ECX = data, ESI = address
- Out - ESI = abrt
- Corrupts EDI*/
- /*MOV EDI, ESI
- SHR ESI, 12
- MOV ESI, [writelookup2+ESI*4]
- CMP ESI, -1
- JNZ +
- MOV [RSI+RDI], ECX
- XOR ESI,ESI
- RET
- * PUSH EAX
- PUSH EDX
- PUSH ECX
- CALL writemembl
- POP ECX
- POP EDX
- POP EAX
- MOVZX ECX, AL
- RET
- */
- host_x86_MOV32_REG_REG(block, REG_EDI, REG_ESI);
- host_x86_SHR32_IMM(block, REG_ESI, 12);
- host_x86_MOV64_REG_IMM(block, REG_R8, (uint64_t)(uintptr_t)writelookup2);
- host_x86_MOV64_REG_BASE_INDEX_SHIFT(block, REG_RSI, REG_R8, REG_RSI, 3);
- if (size != 1)
- {
- host_x86_TEST32_REG_IMM(block, REG_EDI, size-1);
- misaligned_offset = host_x86_JNZ_short(block);
- }
- host_x86_CMP64_REG_IMM(block, REG_RSI, (uint32_t)-1);
- branch_offset = host_x86_JZ_short(block);
- if (size == 1 && !is_float)
- host_x86_MOV8_BASE_INDEX_REG(block, REG_RSI, REG_RDI, REG_ECX);
- else if (size == 2 && !is_float)
- host_x86_MOV16_BASE_INDEX_REG(block, REG_RSI, REG_RDI, REG_ECX);
- else if (size == 4 && !is_float)
- host_x86_MOV32_BASE_INDEX_REG(block, REG_RSI, REG_RDI, REG_ECX);
- else if (size == 4 && is_float)
- host_x86_MOVD_BASE_INDEX_XREG(block, REG_RSI, REG_RDI, REG_XMM_TEMP);
- else if (size == 8)
- host_x86_MOVQ_BASE_INDEX_XREG(block, REG_RSI, REG_RDI, REG_XMM_TEMP);
- else
- fatal("build_store_routine: size=%i\n", size);
- host_x86_XOR32_REG_REG(block, REG_ESI, REG_ESI);
- host_x86_RET(block);
-
- *branch_offset = (uint8_t)((uintptr_t)&block_write_data[block_pos] - (uintptr_t)branch_offset) - 1;
- if (size != 1)
- *misaligned_offset = (uint8_t)((uintptr_t)&block_write_data[block_pos] - (uintptr_t)misaligned_offset) - 1;
- host_x86_PUSH(block, REG_RAX);
- host_x86_PUSH(block, REG_RDX);
-#if WIN64
- host_x86_SUB64_REG_IMM(block, REG_RSP, 0x28);
- if (size == 4 && is_float)
- host_x86_MOVD_REG_XREG(block, REG_EDX, REG_XMM_TEMP); //data
- else if (size == 8)
- host_x86_MOVQ_REG_XREG(block, REG_RDX, REG_XMM_TEMP); //data
- else
- host_x86_MOV32_REG_REG(block, REG_EDX, REG_ECX); //data
- host_x86_MOV32_REG_REG(block, REG_ECX, REG_EDI); //address
-#else
- host_x86_SUB64_REG_IMM(block, REG_RSP, 0x8);
- //host_x86_MOV32_REG_REG(block, REG_EDI, REG_ECX); //address
- if (size == 4 && is_float)
- host_x86_MOVD_REG_XREG(block, REG_ESI, REG_XMM_TEMP); //data
- else if (size == 8)
- host_x86_MOVQ_REG_XREG(block, REG_RSI, REG_XMM_TEMP); //data
- else
- host_x86_MOV32_REG_REG(block, REG_ESI, REG_ECX); //data
-#endif
- if (size == 1)
- host_x86_CALL(block, (void *)writemembl);
- else if (size == 2)
- host_x86_CALL(block, (void *)writememwl);
- else if (size == 4)
- host_x86_CALL(block, (void *)writememll);
- else if (size == 8)
- host_x86_CALL(block, (void *)writememql);
-#if WIN64
- host_x86_ADD64_REG_IMM(block, REG_RSP, 0x28);
-#else
- host_x86_ADD64_REG_IMM(block, REG_RSP, 0x8);
-#endif
- host_x86_POP(block, REG_RDX);
- host_x86_POP(block, REG_RAX);
- host_x86_MOVZX_REG_ABS_32_8(block, REG_ESI, &cpu_state.abrt);
- host_x86_RET(block);
-}
-
-static void build_loadstore_routines(codeblock_t *block)
-{
- codegen_mem_load_byte = &codeblock[block_current].data[block_pos];
- build_load_routine(block, 1, 0);
- codegen_mem_load_word = &codeblock[block_current].data[block_pos];
- build_load_routine(block, 2, 0);
- codegen_mem_load_long = &codeblock[block_current].data[block_pos];
- build_load_routine(block, 4, 0);
- codegen_mem_load_quad = &codeblock[block_current].data[block_pos];
- build_load_routine(block, 8, 0);
- codegen_mem_load_single = &codeblock[block_current].data[block_pos];
- build_load_routine(block, 4, 1);
- codegen_mem_load_double = &codeblock[block_current].data[block_pos];
- build_load_routine(block, 8, 1);
-
- codegen_mem_store_byte = &codeblock[block_current].data[block_pos];
- build_store_routine(block, 1, 0);
- codegen_mem_store_word = &codeblock[block_current].data[block_pos];
- build_store_routine(block, 2, 0);
- codegen_mem_store_long = &codeblock[block_current].data[block_pos];
- build_store_routine(block, 4, 0);
- codegen_mem_store_quad = &codeblock[block_current].data[block_pos];
- build_store_routine(block, 8, 0);
- codegen_mem_store_single = &codeblock[block_current].data[block_pos];
- build_store_routine(block, 4, 1);
- codegen_mem_store_double = &codeblock[block_current].data[block_pos];
- build_store_routine(block, 8, 1);
-}
-
-void codegen_backend_init()
-{
- codeblock_t *block;
- int c;
-
- codeblock = malloc(BLOCK_SIZE * sizeof(codeblock_t));
- codeblock_hash = malloc(HASH_SIZE * sizeof(codeblock_t *));
-
- memset(codeblock, 0, BLOCK_SIZE * sizeof(codeblock_t));
- memset(codeblock_hash, 0, HASH_SIZE * sizeof(codeblock_t *));
-
- for (c = 0; c < BLOCK_SIZE; c++)
- codeblock[c].pc = BLOCK_PC_INVALID;
-
-// pclog("Codegen is %p\n", (void *)pages[0xfab12 >> 12].block);
-
- block_current = 0;
- block_pos = 0;
- block = &codeblock[block_current];
- codeblock[block_current].head_mem_block = codegen_allocator_allocate(NULL, block_current);
- codeblock[block_current].data = codeblock_allocator_get_ptr(codeblock[block_current].head_mem_block);
- block_write_data = codeblock[block_current].data;
- build_loadstore_routines(&codeblock[block_current]);
-
- codegen_gpf_rout = &codeblock[block_current].data[block_pos];
-#if WIN64
- host_x86_XOR32_REG_REG(block, REG_ECX, REG_ECX);
- host_x86_XOR32_REG_REG(block, REG_EDX, REG_EDX);
-#else
- host_x86_XOR32_REG_REG(block, REG_EDI, REG_EDI);
- host_x86_XOR32_REG_REG(block, REG_ESI, REG_ESI);
-#endif
- host_x86_CALL(block, (void *)x86gpf);
- codegen_exit_rout = &codeblock[block_current].data[block_pos];
- host_x86_ADD64_REG_IMM(block, REG_RSP, 0x38);
- host_x86_POP(block, REG_R15);
- host_x86_POP(block, REG_R14);
- host_x86_POP(block, REG_R13);
- host_x86_POP(block, REG_R12);
- host_x86_POP(block, REG_RDI);
- host_x86_POP(block, REG_RSI);
- host_x86_POP(block, REG_RBP);
- host_x86_POP(block, REG_RDX);
- host_x86_RET(block);
-
- block_write_data = NULL;
-
- asm(
- "stmxcsr %0\n"
- : "=m" (cpu_state.old_fp_control)
- );
- cpu_state.trunc_fp_control = cpu_state.old_fp_control | 0x6000;
-}
-
-void codegen_set_rounding_mode(int mode)
-{
- cpu_state.new_fp_control = (cpu_state.old_fp_control & ~0x6000) | (mode << 13);
-}
-
-void codegen_backend_prologue(codeblock_t *block)
-{
- block_pos = BLOCK_START; /*Entry code*/
- host_x86_PUSH(block, REG_RBX);
- host_x86_PUSH(block, REG_RBP);
- host_x86_PUSH(block, REG_RSI);
- host_x86_PUSH(block, REG_RDI);
- host_x86_PUSH(block, REG_R12);
- host_x86_PUSH(block, REG_R13);
- host_x86_PUSH(block, REG_R14);
- host_x86_PUSH(block, REG_R15);
- host_x86_SUB64_REG_IMM(block, REG_RSP, 0x38);
- host_x86_MOV64_REG_IMM(block, REG_RBP, ((uintptr_t)&cpu_state) + 128);
- if (block->flags & CODEBLOCK_HAS_FPU)
- {
- host_x86_MOV32_REG_ABS(block, REG_EAX, &cpu_state.TOP);
- host_x86_SUB32_REG_IMM(block, REG_EAX, block->TOP);
- host_x86_MOV32_BASE_OFFSET_REG(block, REG_RSP, IREG_TOP_diff_stack_offset, REG_EAX);
- }
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- host_x86_MOV64_REG_IMM(block, REG_R12, (uintptr_t)ram);
-}
-
-void codegen_backend_epilogue(codeblock_t *block)
-{
- host_x86_ADD64_REG_IMM(block, REG_RSP, 0x38);
- host_x86_POP(block, REG_R15);
- host_x86_POP(block, REG_R14);
- host_x86_POP(block, REG_R13);
- host_x86_POP(block, REG_R12);
- host_x86_POP(block, REG_RDI);
- host_x86_POP(block, REG_RSI);
- host_x86_POP(block, REG_RBP);
- host_x86_POP(block, REG_RDX);
- host_x86_RET(block);
-}
-#endif
diff --git a/src/codegen_backend_x86-64.h b/src/codegen_backend_x86-64.h
deleted file mode 100644
index 3339224..0000000
--- a/src/codegen_backend_x86-64.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#include "codegen_backend_x86-64_defs.h"
-
-#define BLOCK_SIZE 0x4000
-#define BLOCK_MASK 0x3fff
-#define BLOCK_START 0
-
-#define HASH_SIZE 0x20000
-#define HASH_MASK 0x1ffff
-
-#define HASH(l) ((l) & 0x1ffff)
-
-#define BLOCK_MAX 0x3c0
-
-#define CODEGEN_BACKEND_HAS_MOV_IMM
diff --git a/src/codegen_backend_x86-64_defs.h b/src/codegen_backend_x86-64_defs.h
deleted file mode 100644
index 8856887..0000000
--- a/src/codegen_backend_x86-64_defs.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*RBP = cpu_state + 128
- R12 = ram (if block->flags & CODEBLOCK_NO_IMMEDIATES)*/
-#define REG_AX 0
-#define REG_CX 1
-#define REG_DX 2
-#define REG_BX 3
-#define REG_SP 4
-#define REG_BP 5
-#define REG_SI 6
-#define REG_DI 7
-
-#define REG_EAX 0
-#define REG_ECX 1
-#define REG_EDX 2
-#define REG_EBX 3
-#define REG_ESP 4
-#define REG_EBP 5
-#define REG_ESI 6
-#define REG_EDI 7
-
-#define REG_RAX 0
-#define REG_RCX 1
-#define REG_RDX 2
-#define REG_RBX 3
-#define REG_RSP 4
-#define REG_RBP 5
-#define REG_RSI 6
-#define REG_RDI 7
-#define REG_R8 8
-#define REG_R9 9
-#define REG_R10 10
-#define REG_R11 11
-#define REG_R12 12
-#define REG_R13 13
-#define REG_R14 14
-#define REG_R15 15
-
-#define REG_XMM0 0
-#define REG_XMM1 1
-#define REG_XMM2 2
-#define REG_XMM3 3
-#define REG_XMM4 4
-#define REG_XMM5 5
-#define REG_XMM6 6
-#define REG_XMM7 7
-
-#define REG_XMM_TEMP REG_XMM0
-
-#define CODEGEN_HOST_REGS 3
-#define CODEGEN_HOST_FP_REGS 7
-
-extern void *codegen_mem_load_byte;
-extern void *codegen_mem_load_word;
-extern void *codegen_mem_load_long;
-extern void *codegen_mem_load_quad;
-extern void *codegen_mem_load_single;
-extern void *codegen_mem_load_double;
-
-extern void *codegen_mem_store_byte;
-extern void *codegen_mem_store_word;
-extern void *codegen_mem_store_long;
-extern void *codegen_mem_store_quad;
-extern void *codegen_mem_store_single;
-extern void *codegen_mem_store_double;
-
-extern void *codegen_gpf_rout;
-extern void *codegen_exit_rout;
diff --git a/src/codegen_backend_x86-64_ops.c b/src/codegen_backend_x86-64_ops.c
deleted file mode 100644
index 41a88b2..0000000
--- a/src/codegen_backend_x86-64_ops.c
+++ /dev/null
@@ -1,1827 +0,0 @@
-#ifdef __amd64__
-
-#include "ibm.h"
-#include "codegen.h"
-#include "codegen_allocator.h"
-#include "codegen_backend.h"
-#include "codegen_backend_x86-64_defs.h"
-#include "codegen_backend_x86-64_ops.h"
-#include "codegen_backend_x86-64_ops_helpers.h"
-
-#define RM_OP_ADD 0x00
-#define RM_OP_OR 0x08
-#define RM_OP_AND 0x20
-#define RM_OP_SUB 0x28
-#define RM_OP_XOR 0x30
-#define RM_OP_CMP 0x38
-
-#define RM_OP_ROL 0x00
-#define RM_OP_ROR 0x08
-#define RM_OP_SHL 0x20
-#define RM_OP_SHR 0x28
-#define RM_OP_SAR 0x38
-
-static inline void call(codeblock_t *block, uintptr_t func)
-{
- uintptr_t diff;
-
- codegen_alloc_bytes(block, 5);
- diff = func - (uintptr_t)&block_write_data[block_pos + 5];
-
- if (diff >= -0x80000000 && diff < 0x7fffffff)
- {
- codegen_addbyte(block, 0xE8); /*CALL*/
- codegen_addlong(block, (uint32_t)diff);
- }
- else
- {
- codegen_alloc_bytes(block, 13);
- codegen_addbyte2(block, 0x49, 0xb9); /*MOV R9, func*/
- codegen_addquad(block, func);
- codegen_addbyte3(block, 0x41, 0xff, 0xd1); /*CALL R9*/
- }
-}
-
-static inline void jmp(codeblock_t *block, uintptr_t func)
-{
- uintptr_t diff;
-
- codegen_alloc_bytes(block, 5);
- diff = func - (uintptr_t)&block_write_data[block_pos + 5];
-
- if (diff >= -0x80000000 && diff < 0x7fffffff)
- {
- codegen_addbyte(block, 0xe9); /*JMP*/
- codegen_addlong(block, (uint32_t)diff);
- }
- else
- {
- codegen_alloc_bytes(block, 13);
- codegen_addbyte2(block, 0x49, 0xb9); /*MOV R9, func*/
- codegen_addquad(block, func);
- codegen_addbyte3(block, 0x41, 0xff, 0xe1); /*JMP R9*/
- }
-}
-
-void host_x86_ADD8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data)
-{
- if (dst_reg & 8)
- fatal("host_x86_ADD8_REG_IMM - dst_reg & 8\n");
-
- if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x04, imm_data); /*ADD EAX, imm_data*/
- }
- else
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x80, 0xc0 | RM_OP_ADD | (dst_reg & 7), imm_data); /*ADD dst_reg, imm_data*/
- }
-}
-void host_x86_ADD16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data)
-{
- if (dst_reg & 8)
- fatal("host_x86_ADD16_REG_IMM - dst_reg & 8\n");
-
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x83, 0xc0 | RM_OP_ADD | (dst_reg & 7), imm_data & 0xff); /*ADD dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte2(block, 0x66, 0x05); /*AND AX, imm_data*/
- codegen_addword(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte3(block, 0x66, 0x81, 0xc0 | RM_OP_ADD | (dst_reg & 7)); /*ADD dst_reg, imm_data*/
- codegen_addword(block, imm_data);
- }
-}
-void host_x86_ADD32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data)
-{
- if (dst_reg & 8)
- fatal("host_x86_ADD32_REG_IMM - dst_reg & 8\n");
-
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x83, 0xc0 | RM_OP_ADD | (dst_reg & 7), imm_data & 0xff); /*ADD dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x05); /*ADD EAX, imm_data*/
- codegen_addlong(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x81, 0xc0 | RM_OP_ADD | (dst_reg & 7)); /*ADD dst_reg, imm_data*/
- codegen_addlong(block, imm_data);
- }
-}
-void host_x86_ADD64_REG_IMM(codeblock_t *block, int dst_reg, uint64_t imm_data)
-{
- if (dst_reg & 8)
- fatal("host_x86_ADD64_REG_IMM - dst_reg & 8\n");
-
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x48, 0x83, 0xc0 | RM_OP_ADD | (dst_reg & 7), imm_data & 0xff); /*ADD dst_reg, imm_data*/
- }
- else
- fatal("ADD64_REG_IMM !is_imm8 %016llx\n", imm_data);
-}
-void host_x86_ADD8_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_ADD8_REG_REG - dst_reg & 8\n");
-
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x00, 0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3)); /*ADD dst_reg, src_reg*/
-}
-void host_x86_ADD16_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_ADD16_REG_REG - dst_reg & 8\n");
-
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0x01, 0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3)); /*ADD dst_reg, src_reg*/
-}
-void host_x86_ADD32_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_ADD32_REG_REG - dst_reg & 8\n");
-
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x01, 0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3)); /*ADD dst_reg, src_reg*/
-}
-
-void host_x86_AND8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data)
-{
- if (dst_reg & 8)
- fatal("host_x86_AND8_REG_IMM - dst_reg & 8\n");
-
- if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x24, imm_data); /*AND EAX, imm_data*/
- }
- else
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x80, 0xc0 | RM_OP_AND | (dst_reg & 7), imm_data); /*AND dst_reg, imm_data*/
- }
-}
-void host_x86_AND16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data)
-{
- if (dst_reg & 8)
- fatal("host_x86_AND16_REG_IMM - dst_reg & 8\n");
-
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x83, 0xc0 | RM_OP_AND | (dst_reg & 7), imm_data & 0xff); /*AND dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte2(block, 0x66, 0x25); /*AND AX, imm_data*/
- codegen_addword(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte3(block, 0x66, 0x81, 0xc0 | RM_OP_AND | (dst_reg & 7)); /*AND dst_reg, imm_data*/
- codegen_addword(block, imm_data);
- }
-}
-void host_x86_AND32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data)
-{
- if (dst_reg & 8)
- fatal("host_x86_AND32_REG_IMM - dst_reg & 8\n");
-
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x83, 0xc0 | RM_OP_AND | (dst_reg & 7), imm_data & 0xff); /*AND dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x25); /*AND EAX, imm_data*/
- codegen_addlong(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x81, 0xc0 | RM_OP_AND | (dst_reg & 7)); /*AND dst_reg, imm_data*/
- codegen_addlong(block, imm_data);
- }
-}
-void host_x86_AND8_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_AND8_REG_REG - dst_reg & 8\n");
-
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x20, 0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3)); /*AND dst_reg, src_reg*/
-}
-void host_x86_AND16_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_AND16_REG_REG - dst_reg & 8\n");
-
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0x21, 0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3)); /*AND dst_reg, src_reg*/
-}
-void host_x86_AND32_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_AND32_REG_REG - dst_reg & 8\n");
-
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x21, 0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3)); /*AND dst_reg, src_reg*/
-}
-
-void host_x86_CALL(codeblock_t *block, void *p)
-{
- call(block, (uintptr_t)p);
-}
-
-void host_x86_CMP16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data)
-{
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x83, 0xc0 | RM_OP_CMP | dst_reg, imm_data & 0xff); /*CMP dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte2(block, 0x66, 0x3d); /*CMP AX, imm_data*/
- codegen_addword(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte3(block, 0x66, 0x81, 0xc0 | RM_OP_CMP | dst_reg); /*CMP dst_reg, imm_data*/
- codegen_addword(block, imm_data);
- }
-}
-void host_x86_CMP32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data)
-{
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x83, 0xc0 | RM_OP_CMP | dst_reg, imm_data & 0xff); /*CMP dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x3d); /*CMP EAX, imm_data*/
- codegen_addlong(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x81, 0xc0 | RM_OP_CMP | dst_reg); /*CMP dst_reg, imm_data*/
- codegen_addlong(block, imm_data);
- }
-}
-void host_x86_CMP64_REG_IMM(codeblock_t *block, int dst_reg, uint64_t imm_data)
-{
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x48, 0x83, 0xc0 | RM_OP_CMP | dst_reg, imm_data & 0xff); /*CMP dst_reg, imm_data*/
- }
- else
- fatal("CMP64_REG_IMM not 8-bit imm\n");
-}
-
-void host_x86_CMP8_REG_REG(codeblock_t *block, int src_reg_a, int src_reg_b)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x38, 0xc0 | src_reg_a | (src_reg_b << 3)); /*CMP src_reg_a, src_reg_b*/
-}
-void host_x86_CMP16_REG_REG(codeblock_t *block, int src_reg_a, int src_reg_b)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0x39, 0xc0 | src_reg_a | (src_reg_b << 3)); /*CMP src_reg_a, src_reg_b*/
-}
-void host_x86_CMP32_REG_REG(codeblock_t *block, int src_reg_a, int src_reg_b)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x39, 0xc0 | src_reg_a | (src_reg_b << 3)); /*CMP src_reg_a, src_reg_b*/
-}
-
-void host_x86_JMP(codeblock_t *block, void *p)
-{
- jmp(block, (uintptr_t)p);
-}
-
-void host_x86_JNZ(codeblock_t *block, void *p)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x85); /*JNZ*/
- codegen_addlong(block, (uintptr_t)p - (uintptr_t)&block_write_data[block_pos + 4]);
-}
-void host_x86_JZ(codeblock_t *block, void *p)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x84); /*JZ*/
- codegen_addlong(block, (uintptr_t)p - (uintptr_t)&block_write_data[block_pos + 4]);
-}
-
-uint8_t *host_x86_JNZ_short(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x75, 0); /*JNZ*/
- return &block_write_data[block_pos-1];
-}
-uint8_t *host_x86_JS_short(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x78, 0); /*JS*/
- return &block_write_data[block_pos-1];
-}
-uint8_t *host_x86_JZ_short(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x74, 0); /*JZ*/
- return &block_write_data[block_pos-1];
-}
-
-uint32_t *host_x86_JNB_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x83); /*JNB*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JNBE_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x87); /*JNBE*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JNL_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x8d); /*JNL*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JNLE_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x8f); /*JNLE*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JNO_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x81); /*JNO*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JNS_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x89); /*JNS*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JNZ_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x85); /*JNZ*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JB_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x82); /*JB*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JBE_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x86); /*JBE*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JL_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x8c); /*JL*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JLE_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x8e); /*JLE*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JO_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x80); /*JO*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JS_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x88); /*JS*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JZ_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x84); /*JZ*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-
-void host_x86_LAHF(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 1);
- codegen_addbyte(block, 0x9f); /*LAHF*/
-}
-
-void host_x86_LEA_REG_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t offset)
-{
- if (offset)
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x8d, 0x80 | (dst_reg << 3) | src_reg); /*LEA dst_reg, [offset+src_reg]*/
- codegen_addlong(block, offset);
- }
- else
- {
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x8d, 0x00 | (dst_reg << 3) | src_reg); /*LEA dst_reg, [src_reg]*/
- }
-}
-void host_x86_LEA_REG_REG(codeblock_t *block, int dst_reg, int src_reg_a, int src_reg_b)
-{
- if ((dst_reg & 8) || (src_reg_a & 8) || (src_reg_b & 8))
- fatal("host_x86_LEA_REG_REG - bad reg\n");
-
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x8d, 0x04 | ((dst_reg & 7) << 3), /*LEA dst_reg, [Rsrc_reg_a + Rsrc_reg_b]*/
- ((src_reg_b & 7) << 3) | (src_reg_a & 7));
-}
-void host_x86_LEA_REG_REG_SHIFT(codeblock_t *block, int dst_reg, int src_reg_a, int src_reg_b, int shift)
-{
- if ((dst_reg & 8) || (src_reg_a & 8) || (src_reg_b & 8))
- fatal("host_x86_LEA_REG_REG_SHIFT - bad reg\n");
-
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x8d, 0x04 | ((dst_reg & 7) << 3), /*LEA dst_reg, [Rsrc_reg_a + Rsrc_reg_b * (1 << shift)]*/
- (shift << 6) | ((src_reg_b & 7) << 3) | (src_reg_a & 7));
-}
-
-void host_x86_MOV8_ABS_IMM(codeblock_t *block, void *p, uint32_t imm_data)
-{
- int64_t offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte3(block, 0xc6, 0x45, offset); /*MOVB offset[RBP], imm_data*/
- codegen_addbyte(block, imm_data);
- }
- else
- {
- if ((uintptr_t)p >> 32)
- fatal("host_x86_MOV8_ABS_IMM - out of range %p\n", p);
- codegen_alloc_bytes(block, 8);
- codegen_addbyte3(block, 0xc6, 0x04, 0x25); /*MOVB p, imm_data*/
- codegen_addlong(block, (uint32_t)(uintptr_t)p);
- codegen_addbyte(block, imm_data);
- }
-}
-void host_x86_MOV16_ABS_IMM(codeblock_t *block, void *p, uint16_t imm_data)
-{
- int64_t offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte4(block, 0x66, 0xc7, 0x45, offset); /*MOV offset[RBP], imm_data*/
- codegen_addword(block, imm_data);
- }
- else
- {
- if ((uintptr_t)p >> 32)
- fatal("host_x86_MOV32_ABS_IMM - out of range %p\n", p);
- codegen_alloc_bytes(block, 10);
- codegen_addbyte4(block, 0x66, 0xc7, 0x04, 0x25); /*MOV p, imm_data*/
- codegen_addlong(block, (uint32_t)(uintptr_t)p);
- codegen_addword(block, imm_data);
- }
-}
-void host_x86_MOV32_ABS_IMM(codeblock_t *block, void *p, uint32_t imm_data)
-{
- int64_t offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0xc7, 0x45, offset); /*MOV offset[RBP], imm_data*/
- codegen_addlong(block, imm_data);
- }
- else
- {
- if ((uintptr_t)p >> 32)
- fatal("host_x86_MOV32_ABS_IMM - out of range %p\n", p);
- codegen_alloc_bytes(block, 11);
- codegen_addbyte3(block, 0xc7, 0x04, 0x25); /*MOV p, imm_data*/
- codegen_addlong(block, (uint32_t)(uintptr_t)p);
- codegen_addlong(block, imm_data);
- }
-}
-
-void host_x86_MOV8_ABS_REG(codeblock_t *block, void *p, int src_reg)
-{
- int64_t offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (src_reg & 8)
- fatal("host_x86_MOV8_ABS_REG - bad reg\n");
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x88, 0x45 | ((src_reg & 7) << 3), offset); /*MOVB offset[RBP], src_reg*/
- }
- else
- {
- if ((uintptr_t)p >> 32)
- fatal("host_x86_MOV8_ABS_REG - out of range %p\n", p);
- codegen_alloc_bytes(block, 6);
- codegen_addbyte(block, 0x88); /*MOVB [p], src_reg*/
- codegen_addbyte(block, 0x05 | ((src_reg & 7) << 3));
- codegen_addlong(block, (uint32_t)(uintptr_t)p);
- }
-}
-void host_x86_MOV16_ABS_REG(codeblock_t *block, void *p, int src_reg)
-{
- int64_t offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (src_reg & 8)
- fatal("host_x86_MOV16_ABS_REG - bad reg\n");
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x89, 0x45 | ((src_reg & 7) << 3), offset); /*MOV offset[RBP], src_reg*/
- }
- else if (offset < (1ull << 32))
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0x66, 0x89, 0x85 | ((src_reg & 7) << 3)); /*MOV offset[RBP], src_reg*/
- codegen_addlong(block, offset);
- }
- else
- {
- if ((uintptr_t)p >> 32)
- fatal("host_x86_MOV32_ABS_REG - out of range %p\n", p);
- }
-}
-void host_x86_MOV32_ABS_REG(codeblock_t *block, void *p, int src_reg)
-{
- int64_t offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (src_reg & 8)
- fatal("host_x86_MOV32_ABS_REG - bad reg\n");
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x89, 0x45 | ((src_reg & 7) << 3), offset); /*MOV offset[RBP], src_reg*/
- }
- else if (offset < (1ull << 32))
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x89, 0x85 | ((src_reg & 7) << 3)); /*MOV offset[RBP], src_reg*/
- codegen_addlong(block, offset);
- }
- else
- {
- if ((uintptr_t)p >> 32)
- fatal("host_x86_MOV32_ABS_REG - out of range %p\n", p);
- codegen_alloc_bytes(block, 6);
- codegen_addbyte(block, 0x89); /*MOV [p], src_reg*/
- codegen_addbyte(block, 0x05 | ((src_reg & 7) << 3));
- codegen_addlong(block, (uint32_t)(uintptr_t)p);
- }
-}
-void host_x86_MOV64_ABS_REG(codeblock_t *block, void *p, int src_reg)
-{
- int64_t offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (src_reg & 8)
- fatal("host_x86_MOV64_ABS_REG - bad reg\n");
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x48, 0x89, 0x45 | ((src_reg & 7) << 3), offset); /*MOV offset[RBP], src_reg*/
- }
- else
- {
- if ((uintptr_t)p >> 32)
- fatal("host_x86_MOV64_ABS_REG - out of range %p\n", p);
- codegen_alloc_bytes(block, 8);
- codegen_addbyte4(block, 0x48, 0x89, 0x04 | ((src_reg & 7) << 3), 0x25); /*MOV [p], src_reg*/
- codegen_addlong(block, (uint32_t)(uintptr_t)p);
- }
-}
-
-void host_x86_MOV8_ABS_REG_REG_SHIFT_REG(codeblock_t *block, uint32_t addr, int base_reg, int index_reg, int shift, int src_reg)
-{
- if ((src_reg & 8) || (base_reg & 8) | (index_reg & 8))
- fatal("host_x86_MOV8_BASE_INDEX_REG reg & 8\n");
- if (addr < 0x80 || addr >= 0xffffff80)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x88, 0x44 | (src_reg << 3), base_reg | (index_reg << 3) | (shift << 6), addr & 0xff); /*MOV addr[base_reg + idx_reg << shift], src_reg*/
- }
- else
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0x88, 0x84 | (src_reg << 3), base_reg | (index_reg << 3) | (shift << 6)); /*MOV addr[base_reg + idx_reg << shift], src_reg*/
- codegen_addlong(block, addr);
- }
-}
-
-void host_x86_MOV8_BASE_INDEX_REG(codeblock_t *block, int base_reg, int index_reg, int src_reg)
-{
- if ((src_reg & 8) || (base_reg & 8) | (index_reg & 8))
- fatal("host_x86_MOV8_BASE_INDEX_REG reg & 8\n");
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x88, 0x04 | (src_reg << 3), (index_reg << 3) | base_reg); /*MOV B[base_reg + index_reg], src_reg*/
-}
-void host_x86_MOV16_BASE_INDEX_REG(codeblock_t *block, int base_reg, int index_reg, int src_reg)
-{
- if ((src_reg & 8) || (base_reg & 8) | (index_reg & 8))
- fatal("host_x86_MOV8_BASE_INDEX_REG reg & 8\n");
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x89, 0x04 | (src_reg << 3), (index_reg << 3) | base_reg); /*MOV W[base_reg + index_reg], src_reg*/
-}
-void host_x86_MOV32_BASE_INDEX_REG(codeblock_t *block, int base_reg, int index_reg, int src_reg)
-{
- if ((src_reg & 8) || (base_reg & 8) | (index_reg & 8))
- fatal("host_x86_MOV8_BASE_INDEX_REG reg & 8\n");
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x89, 0x04 | (src_reg << 3), (index_reg << 3) | base_reg); /*MOV L[base_reg + index_reg], src_reg*/
-}
-
-void host_x86_MOV8_REG_ABS(codeblock_t *block, int dst_reg, void *p)
-{
- int64_t offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
- int64_t ram_offset = (uintptr_t)p - (uintptr_t)ram;
-
- if (dst_reg & 8)
- fatal("host_x86_MOV8_REG_ABS reg & 8\n");
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x8a, 0x45 | ((dst_reg & 7) << 3), offset); /*MOV dst_reg, offset[RBP]*/
- }
- else if (offset < (1ull << 32))
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x8a, 0x85 | ((dst_reg & 7) << 3)); /*MOV dst_reg, offset[RBP]*/
- codegen_addlong(block, offset);
- }
- else if ((ram_offset < (1ull << 32)) && (block->flags & CODEBLOCK_NO_IMMEDIATES))
- {
- codegen_alloc_bytes(block, 8);
- codegen_addbyte4(block, 0x41, 0x8a, 0x84 | ((dst_reg & 7) << 3), 0x24); /*MOV dst_reg, ram_offset[R12]*/
- codegen_addlong(block, ram_offset);
- }
- else
- {
- fatal("host_x86_MOV8_REG_ABS - out of range\n");
- }
-}
-void host_x86_MOV16_REG_ABS(codeblock_t *block, int dst_reg, void *p)
-{
- int64_t offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
- int64_t ram_offset = (uintptr_t)p - (uintptr_t)ram;
-
- if (dst_reg & 8)
- fatal("host_x86_MOV16_REG_ABS reg & 8\n");
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x8b, 0x45 | ((dst_reg & 7) << 3), offset); /*MOV dst_reg, offset[RBP]*/
- }
- else if (offset < (1ull << 32))
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0x66, 0x8b, 0x85 | ((dst_reg & 7) << 3)); /*MOV dst_reg, offset[RBP]*/
- codegen_addlong(block, offset);
- }
- else if ((ram_offset < (1ull << 32)) && (block->flags & CODEBLOCK_NO_IMMEDIATES))
- {
- codegen_alloc_bytes(block, 9);
- codegen_addbyte4(block, 0x66, 0x41, 0x8b, 0x84 | ((dst_reg & 7) << 3)); /*MOV dst_reg, ram_offset[R12]*/
- codegen_addbyte(block, 0x24);
- codegen_addlong(block, ram_offset);
- }
- else
- {
- fatal("host_x86_MOV16_REG_ABS - out of range\n");
- codegen_alloc_bytes(block, 10);
- codegen_addbyte2(block, 0x49, 0xb9); /*MOV R9, p*/
- codegen_addquad(block, (uintptr_t)p);
- codegen_alloc_bytes(block, 1);
- codegen_addbyte4(block, 0x66, 0x41, 0x8b, 0x01 | ((dst_reg & 7) << 3)); /*MOV dst_reg, [r9]*/
- }
-}
-void host_x86_MOV32_REG_ABS(codeblock_t *block, int dst_reg, void *p)
-{
- int64_t offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
- int64_t ram_offset = (uintptr_t)p - (uintptr_t)ram;
-
- if (dst_reg & 8)
- fatal("host_x86_MOV32_REG_ABS reg & 8\n");
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x8b, 0x45 | ((dst_reg & 7) << 3), offset); /*MOV dst_reg, offset[RBP]*/
- }
- else if (offset < (1ull << 32))
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x8b, 0x85 | ((dst_reg & 7) << 3)); /*MOV dst_reg, offset[RBP]*/
- codegen_addlong(block, offset);
- }
- else if ((ram_offset < (1ull << 32)) && (block->flags & CODEBLOCK_NO_IMMEDIATES))
- {
- codegen_alloc_bytes(block, 8);
- codegen_addbyte4(block, 0x41, 0x8b, 0x84 | ((dst_reg & 7) << 3), 0x24); /*MOV dst_reg, ram_offset[R12]*/
- codegen_addlong(block, ram_offset);
- }
- else
- {
- fatal("host_x86_MOV32_REG_ABS - out of range\n");
- codegen_alloc_bytes(block, 6);
- codegen_addbyte(block, 0x8b); /*MOV [p], src_reg*/
- codegen_addbyte(block, 0x05 | ((dst_reg & 7) << 3));
- codegen_addlong(block, (uint32_t)(uintptr_t)p);
- }
-}
-void host_x86_MOV64_REG_ABS(codeblock_t *block, int dst_reg, void *p)
-{
- int64_t offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (dst_reg & 8)
- fatal("host_x86_MOV64_REG_ABS reg & 8\n");
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x48, 0x8b, 0x45 | ((dst_reg & 7) << 3), offset); /*MOV dst_reg, offset[RBP]*/
- }
- else if (offset < (1ull << 32))
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0x48, 0x8b, 0x85 | ((dst_reg & 7) << 3)); /*MOV dst_reg, offset[RBP]*/
- codegen_addlong(block, offset);
- }
- else
- fatal("host_x86_MOV64_REG_ABS - out of range\n");
-}
-
-void host_x86_MOV8_REG_ABS_REG_REG_SHIFT(codeblock_t *block, int dst_reg, uint32_t addr, int base_reg, int index_reg, int shift)
-{
- if ((dst_reg & 8) || (base_reg & 8) | (index_reg & 8))
- fatal("host_x86_MOV8_REG_ABS_REG_REG_SHIFT reg & 8\n");
- if (addr < 0x80 || addr >= 0xffffff80)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x8a, 0x44 | (dst_reg << 3), base_reg | (index_reg << 3) | (shift << 6), addr & 0xff); /*MOV addr[base_reg + idx_reg << shift], src_reg*/
- }
- else
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0x8a, 0x84 | (dst_reg << 3), base_reg | (index_reg << 3) | (shift << 6)); /*MOV addr[base_reg + idx_reg << shift], src_reg*/
- codegen_addlong(block, addr);
- }
-}
-
-void host_x86_MOV32_REG_BASE_INDEX(codeblock_t *block, int dst_reg, int base_reg, int index_reg)
-{
- if ((dst_reg & 8) || (base_reg & 8) | (index_reg & 8))
- fatal("host_x86_MOV32_REG_BASE_INDEX reg & 8\n");
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x8b, 0x04 | (dst_reg << 3), (index_reg << 3) | base_reg); /*MOV dst_reg, Q[base_reg + index_reg]*/
-}
-
-void host_x86_MOV64_REG_BASE_INDEX_SHIFT(codeblock_t *block, int dst_reg, int base_reg, int index_reg, int scale)
-{
- if ((dst_reg & 8) || (index_reg & 8))
- fatal("host_x86_MOV64_REG_BASE_INDEX_SHIFT reg & 8\n");
- codegen_alloc_bytes(block, 4);
- if (base_reg & 8)
- codegen_addbyte4(block, 0x49, 0x8b, 0x04 | ((dst_reg & 7) << 3), (scale << 6) | ((index_reg & 7) << 3) | (base_reg & 7)); /*MOV dst_reg, Q[base_reg + index_reg << scale]*/
- else
- codegen_addbyte4(block, 0x48, 0x8b, 0x04 | ((dst_reg & 7) << 3), (scale << 6) | ((index_reg & 7) << 3) | (base_reg & 7)); /*MOV dst_reg, Q[base_reg + index_reg << scale]*/
-}
-
-void host_x86_MOV16_REG_BASE_OFFSET(codeblock_t *block, int dst_reg, int base_reg, int offset)
-{
- if ((dst_reg & 8) || (base_reg & 8))
- fatal("host_x86_MOV16_REG_BASE_OFFSET reg & 8\n");
-
- if (offset >= -128 && offset < 127)
- {
- if (base_reg == REG_RSP)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x66);
- codegen_addbyte4(block, 0x8b, 0x40 | base_reg | (dst_reg << 3), 0x24, offset);
- }
- else
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x8b, 0x40 | base_reg | (dst_reg << 3), offset);
- }
- }
- else
- fatal("MOV16_REG_BASE_OFFSET - offset %i\n", offset);
-}
-void host_x86_MOV32_REG_BASE_OFFSET(codeblock_t *block, int dst_reg, int base_reg, int offset)
-{
- if ((dst_reg & 8) || (base_reg & 8))
- fatal("host_x86_MOV32_REG_BASE_OFFSET reg & 8\n");
-
- if (offset >= -128 && offset < 127)
- {
- if (base_reg == REG_RSP)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x8b, 0x40 | base_reg | (dst_reg << 3), 0x24, offset);
- }
- else
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x8b, 0x40 | base_reg | (dst_reg << 3), offset);
- }
- }
- else
- fatal("MOV32_REG_BASE_OFFSET - offset %i\n", offset);
-}
-void host_x86_MOV64_REG_BASE_OFFSET(codeblock_t *block, int dst_reg, int base_reg, int offset)
-{
- if ((dst_reg & 8) || (base_reg & 8))
- fatal("host_x86_MOV64_REG_BASE_OFFSET reg & 8\n");
-
- if (offset >= -128 && offset < 127)
- {
- if (base_reg == REG_RSP)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x48);
- codegen_addbyte4(block, 0x8b, 0x40 | base_reg | (dst_reg << 3), 0x24, offset);
- }
- else
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x48, 0x8b, 0x40 | base_reg | (dst_reg << 3), offset);
- }
- }
- else
- fatal("MOV32_REG_BASE_OFFSET - offset %i\n", offset);
-}
-
-void host_x86_MOV32_BASE_OFFSET_REG(codeblock_t *block, int base_reg, int offset, int src_reg)
-{
- if ((src_reg & 8) || (base_reg & 8))
- fatal("host_x86_MOV32_BASE_OFFSET_REG reg & 8\n");
-
- if (offset >= -128 && offset < 127)
- {
- if (base_reg == REG_RSP)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x89, 0x40 | base_reg | (src_reg << 3), 0x24, offset);
- }
- else
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x89, 0x40 | base_reg | (src_reg << 3), offset);
- }
- }
- else
- fatal("MOV32_BASE_OFFSET_REG - offset %i\n", offset);
-}
-void host_x86_MOV64_BASE_OFFSET_REG(codeblock_t *block, int base_reg, int offset, int src_reg)
-{
- if ((src_reg & 8) || (base_reg & 8))
- fatal("host_x86_MOV64_BASE_OFFSET_REG reg & 8\n");
-
- if (offset >= -128 && offset < 127)
- {
- if (base_reg == REG_RSP)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x48);
- codegen_addbyte4(block, 0x89, 0x40 | base_reg | (src_reg << 3), 0x24, offset);
- }
- else
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x48, 0x89, 0x40 | base_reg | (src_reg << 3), offset);
- }
- }
- else
- fatal("MOV64_BASE_OFFSET_REG - offset %i\n", offset);
-}
-
-void host_x86_MOV32_BASE_OFFSET_IMM(codeblock_t *block, int base_reg, int offset, uint32_t imm_data)
-{
- if (base_reg & 8)
- fatal("host_x86_MOV32_BASE_OFFSET_IMM reg & 8\n");
-
- if (offset >= -128 && offset < 127)
- {
- if (base_reg == REG_RSP)
- {
- codegen_alloc_bytes(block, 8);
- codegen_addbyte4(block, 0xc7, 0x40 | base_reg, 0x24, offset);
- codegen_addlong(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0xc7, 0x40 | base_reg, offset);
- codegen_addlong(block, imm_data);
- }
- }
- else
- fatal("MOV32_BASE_OFFSET_IMM - offset %i\n", offset);
-}
-
-void host_x86_MOV8_REG_IMM(codeblock_t *block, int reg, uint16_t imm_data)
-{
- if (reg >= 8)
- fatal("host_x86_MOV8_REG_IMM reg >= 4\n");
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xb0 | reg, imm_data); /*MOV reg, imm_data*/
-}
-void host_x86_MOV16_REG_IMM(codeblock_t *block, int reg, uint16_t imm_data)
-{
- if (reg & 8)
- fatal("host_x86_MOV16_REG_IMM reg & 8\n");
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x66, 0xb8 | (reg & 7)); /*MOV reg, imm_data*/
- codegen_addword(block, imm_data);
-}
-void host_x86_MOV32_REG_IMM(codeblock_t *block, int reg, uint32_t imm_data)
-{
- if (reg & 8)
- fatal("host_x86_MOV32_REG_IMM reg & 8\n");
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0xb8 | (reg & 7)); /*MOV reg, imm_data*/
- codegen_addlong(block, imm_data);
-}
-
-void host_x86_MOV64_REG_IMM(codeblock_t *block, int reg, uint64_t imm_data)
-{
- if (reg & 8)
- {
- codegen_alloc_bytes(block, 10);
- codegen_addbyte2(block, 0x49, 0xb8 | (reg & 7)); /*MOVQ reg, imm_data*/
- codegen_addquad(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 10);
- codegen_addbyte2(block, 0x48, 0xb8 | (reg & 7)); /*MOVQ reg, imm_data*/
- codegen_addquad(block, imm_data);
- }
-}
-
-void host_x86_MOV8_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_MOV8_REG_REG - bad reg\n");
-
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x88, 0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
-}
-void host_x86_MOV16_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_MOV16_REG_REG - bad reg\n");
-
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0x89, 0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
-}
-void host_x86_MOV32_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_MOV32_REG_REG - bad reg\n");
-
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x89, 0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
-}
-
-void host_x86_MOV32_STACK_IMM(codeblock_t *block, int32_t offset, uint32_t imm_data)
-{
- if (!offset)
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0xc7, 0x04, 0x24); /*MOV [ESP], imm_data*/
- codegen_addlong(block, imm_data);
- }
- else if (offset >= -0x80 && offset < 0x80)
- {
- codegen_alloc_bytes(block, 8);
- codegen_addbyte4(block, 0xc7, 0x44, 0x24, offset & 0xff); /*MOV offset[ESP], imm_data*/
- codegen_addlong(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 11);
- codegen_addbyte3(block, 0xc7, 0x84, 0x24); /*MOV offset[ESP], imm_data*/
- codegen_addlong(block, offset);
- codegen_addlong(block, imm_data);
- }
-}
-
-void host_x86_MOVSX_REG_16_8(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xbe, 0xc0 | (dst_reg << 3) | src_reg); /*MOVSX dst_reg, src_reg*/
-}
-void host_x86_MOVSX_REG_32_8(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0xbe, 0xc0 | (dst_reg << 3) | src_reg); /*MOVSX dst_reg, src_reg*/
-}
-void host_x86_MOVSX_REG_32_16(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0xbf, 0xc0 | (dst_reg << 3) | src_reg); /*MOVSX dst_reg, src_reg*/
-}
-
-void host_x86_MOVZX_BASE_INDEX_32_8(codeblock_t *block, int dst_reg, int base_reg, int index_reg)
-{
- if ((dst_reg & 8) || (base_reg & 8) | (index_reg & 8))
- fatal("host_x86_MOVZX_BASE_INDEX_32_8 reg & 8\n");
-
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x0f, 0xb6, 0x04 | (dst_reg << 3), (index_reg << 3) | base_reg);
-}
-void host_x86_MOVZX_BASE_INDEX_32_16(codeblock_t *block, int dst_reg, int base_reg, int index_reg)
-{
- if ((dst_reg & 8) || (base_reg & 8) | (index_reg & 8))
- fatal("host_x86_MOVZX_BASE_INDEX_32_16 reg & 8\n");
-
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x0f, 0xb7, 0x04 | (dst_reg << 3), (index_reg << 3) | base_reg);
-}
-
-void host_x86_MOVZX_REG_16_8(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_MOVZX_REG_16_8 - bad reg\n");
-
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xb6, 0xc0 | (dst_reg << 3) | src_reg); /*MOVZX dst_reg, src_reg*/
-}
-void host_x86_MOVZX_REG_32_8(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_MOVZX_REG_32_8 - bad reg\n");
-
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0xb6, 0xc0 | (dst_reg << 3) | src_reg); /*MOVZX dst_reg, src_reg*/
-}
-void host_x86_MOVZX_REG_32_16(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_MOVZX_REG_16_8 - bad reg\n");
-
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0xb7, 0xc0 | (dst_reg << 3) | src_reg); /*MOVZX dst_reg, src_reg*/
-}
-
-void host_x86_MOVZX_REG_ABS_16_8(codeblock_t *block, int dst_reg, void *p)
-{
- int64_t offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
- int64_t ram_offset = (uintptr_t)p - (uintptr_t)ram;
-
- if (dst_reg & 8)
- fatal("host_x86_MOVZX_REG_ABS_16_8 - bad reg\n");
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x66);
- codegen_addbyte4(block, 0x0f, 0xb6, 0x45 | ((dst_reg & 7) << 3), offset); /*MOVZX dst_reg, offset[RBP]*/
- }
- else if ((ram_offset < (1ull << 32)) && (block->flags & CODEBLOCK_NO_IMMEDIATES))
- {
- codegen_alloc_bytes(block, 10);
- codegen_addbyte2(block, 0x66, 0x41);
- codegen_addbyte4(block, 0x0f, 0xb6, 0x84 | ((dst_reg & 7) << 3), 0x24); /*MOVZX dst_reg, ram_offset[R12]*/
- codegen_addlong(block, ram_offset);
- }
- else
- {
- codegen_alloc_bytes(block, 10);
- codegen_addbyte2(block, 0x49, 0xb9); /*MOV R9, p*/
- codegen_addquad(block, (uintptr_t)p);
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x66);
- codegen_addbyte4(block, 0x41, 0x0f, 0xb6, 0x01 | ((dst_reg & 7) << 3)); /*MOVZX dst_reg, [r9]*/
- }
-}
-void host_x86_MOVZX_REG_ABS_32_8(codeblock_t *block, int dst_reg, void *p)
-{
- int64_t offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
- int64_t ram_offset = (uintptr_t)p - (uintptr_t)ram;
-
-// if (dst_reg & 8)
-// fatal("host_x86_MOVZX_REG_ABS_32_8 - bad reg\n");
-
- if (offset >= -128 && offset < 127)
- {
- if (dst_reg & 8)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x44);
- codegen_addbyte4(block, 0x0f, 0xb6, 0x45 | ((dst_reg & 7) << 3), offset); /*MOVZX dst_reg, offset[RBP]*/
- }
- else
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x0f, 0xb6, 0x45 | ((dst_reg & 7) << 3), offset); /*MOVZX dst_reg, offset[RBP]*/
- }
- }
- else if ((ram_offset < (1ull << 32)) && (block->flags & CODEBLOCK_NO_IMMEDIATES))
- {
- if (dst_reg & 8)
- fatal("host_x86_MOVZX_REG_ABS_32_8 - bad reg\n");
-
- codegen_alloc_bytes(block, 9);
- codegen_addbyte(block, 0x41);
- codegen_addbyte4(block, 0x0f, 0xb6, 0x84 | ((dst_reg & 7) << 3), 0x24); /*MOVZX dst_reg, ram_offset[R12]*/
- codegen_addlong(block, ram_offset);
- }
- else
- {
- if (dst_reg & 8)
- fatal("host_x86_MOVZX_REG_ABS_32_8 - bad reg\n");
-
- codegen_alloc_bytes(block, 10);
- codegen_addbyte2(block, 0x49, 0xb9); /*MOV R9, p*/
- codegen_addquad(block, (uintptr_t)p);
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x41, 0x0f, 0xb6, 0x01 | ((dst_reg & 7) << 3)); /*MOVZX dst_reg, [r9]*/
- }
-}
-void host_x86_MOVZX_REG_ABS_32_16(codeblock_t *block, int dst_reg, void *p)
-{
- int64_t offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
- int64_t ram_offset = (uintptr_t)p - (uintptr_t)ram;
-
- if (dst_reg & 8)
- fatal("host_x86_MOVZX_REG_ABS_32_16 - bad reg\n");
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x0f, 0xb7, 0x45 | ((dst_reg & 7) << 3), offset); /*MOVZX dst_reg, offset[RBP]*/
- }
- else if ((ram_offset < (1ull << 32)) && (block->flags & CODEBLOCK_NO_IMMEDIATES))
- {
- codegen_alloc_bytes(block, 9);
- codegen_addbyte(block, 0x41);
- codegen_addbyte4(block, 0x0f, 0xb7, 0x84 | ((dst_reg & 7) << 3), 0x24); /*MOVZX dst_reg, ram_offset[R12]*/
- codegen_addlong(block, ram_offset);
- }
- else
- {
- codegen_alloc_bytes(block, 10);
- codegen_addbyte2(block, 0x49, 0xb9); /*MOV R9, p*/
- codegen_addquad(block, (uintptr_t)p);
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x41, 0x0f, 0xb7, 0x01 | ((dst_reg & 7) << 3)); /*MOVZX dst_reg, [r9]*/
- }
-}
-
-void host_x86_NOP(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 1);
- codegen_addbyte(block, 0x90); /*NOP*/
-}
-
-void host_x86_OR8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data)
-{
- if (dst_reg & 8)
- fatal("host_x86_OR8_REG_IMM - dst_reg & 8\n");
-
- if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x0c, imm_data); /*OR EAX, imm_data*/
- }
- else
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x80, 0xc0 | RM_OP_OR | (dst_reg & 7), imm_data); /*OR dst_reg, imm_data*/
- }
-}
-void host_x86_OR16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data)
-{
- if (dst_reg & 8)
- fatal("host_x86_OR16_REG_IMM - dst_reg & 8\n");
-
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x83, 0xc0 | RM_OP_OR | (dst_reg & 7), imm_data & 0xff); /*OR dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte2(block, 0x66, 0x0d); /*OR AX, imm_data*/
- codegen_addword(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte3(block, 0x66, 0x81, 0xc0 | RM_OP_OR | (dst_reg & 7)); /*OR dst_reg, imm_data*/
- codegen_addword(block, imm_data);
- }
-}
-void host_x86_OR32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data)
-{
- if (dst_reg & 8)
- fatal("host_x86_OR32_REG_IMM - dst_reg & 8\n");
-
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x83, 0xc0 | RM_OP_OR | (dst_reg & 7), imm_data & 0xff); /*OR dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x0d); /*OR EAX, imm_data*/
- codegen_addlong(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x81, 0xc0 | RM_OP_OR | (dst_reg & 7)); /*OR dst_reg, imm_data*/
- codegen_addlong(block, imm_data);
- }
-}
-void host_x86_OR8_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_OR8_REG_IMM - dst_reg & 8\n");
-
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x08, 0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3)); /*OR dst_reg, src_reg*/
-}
-void host_x86_OR16_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_OR16_REG_IMM - dst_reg & 8\n");
-
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0x09, 0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3)); /*OR dst_reg, src_reg*/
-}
-void host_x86_OR32_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_OR32_REG_IMM - dst_reg & 8\n");
-
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x09, 0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3)); /*OR dst_reg, src_reg*/
-}
-
-void host_x86_POP(codeblock_t *block, int dst_reg)
-{
- if (dst_reg & 8)
- {
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x41, 0x58 | (dst_reg & 7)); /*POP reg*/
- }
- else
- {
- codegen_alloc_bytes(block, 1);
- codegen_addbyte(block, 0x58 | dst_reg); /*POP reg*/
- }
-}
-
-void host_x86_PUSH(codeblock_t *block, int src_reg)
-{
- if (src_reg & 8)
- {
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x41, 0x50 | (src_reg & 7)); /*PUSH reg*/
- }
- else
- {
- codegen_alloc_bytes(block, 1);
- codegen_addbyte(block, 0x50 | src_reg); /*PUSH reg*/
- }
-}
-
-void host_x86_RET(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 1);
- codegen_addbyte(block, 0xc3); /*RET*/
-}
-
-void host_x86_ROL8_CL(codeblock_t *block, int dst_reg)
-{
- if (dst_reg & 8)
- fatal("ROL8 CL & 8\n");
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd2, 0xc0 | RM_OP_ROL | dst_reg); /*SHL dst_reg, CL*/
-}
-void host_x86_ROL16_CL(codeblock_t *block, int dst_reg)
-{
- if (dst_reg & 8)
- fatal("ROL16 CL & 8\n");
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0xd3, 0xc0 | RM_OP_ROL | dst_reg); /*SHL dst_reg, CL*/
-}
-void host_x86_ROL32_CL(codeblock_t *block, int dst_reg)
-{
- if (dst_reg & 8)
- fatal("ROL32 CL & 8\n");
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd3, 0xc0 | RM_OP_ROL | dst_reg); /*SHL dst_reg, CL*/
-}
-
-void host_x86_ROL8_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- if (dst_reg & 8)
- fatal("ROL8 imm & 8\n");
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc0, 0xc0 | RM_OP_ROL | dst_reg, shift); /*SHL dst_reg, shift*/
-}
-void host_x86_ROL16_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- if (dst_reg & 8)
- fatal("ROL16 imm & 8\n");
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0xc1, 0xc0 | RM_OP_ROL | dst_reg, shift); /*SHL dst_reg, shift*/
-}
-void host_x86_ROL32_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- if (dst_reg & 8)
- fatal("ROL32 imm & 8\n");
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc1, 0xc0 | RM_OP_ROL | dst_reg, shift); /*SHL dst_reg, shift*/
-}
-
-void host_x86_ROR8_CL(codeblock_t *block, int dst_reg)
-{
- if (dst_reg & 8)
- fatal("ROR8 CL & 8\n");
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd2, 0xc0 | RM_OP_ROR | dst_reg); /*SHR dst_reg, CL*/
-}
-void host_x86_ROR16_CL(codeblock_t *block, int dst_reg)
-{
- if (dst_reg & 8)
- fatal("ROR16 CL & 8\n");
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0xd3, 0xc0 | RM_OP_ROR | dst_reg); /*SHR dst_reg, CL*/
-}
-void host_x86_ROR32_CL(codeblock_t *block, int dst_reg)
-{
- if (dst_reg & 8)
- fatal("ROR32 CL & 8\n");
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd3, 0xc0 | RM_OP_ROR | dst_reg); /*SHR dst_reg, CL*/
-}
-
-void host_x86_ROR8_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- if (dst_reg & 8)
- fatal("ROR8 imm & 8\n");
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc0, 0xc0 | RM_OP_ROR | dst_reg, shift); /*SHR dst_reg, shift*/
-}
-void host_x86_ROR16_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- if (dst_reg & 8)
- fatal("ROR16 imm & 8\n");
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0xc1, 0xc0 | RM_OP_ROR | dst_reg, shift); /*SHR dst_reg, shift*/
-}
-void host_x86_ROR32_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- if (dst_reg & 8)
- fatal("ROR32 im & 8\n");
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc1, 0xc0 | RM_OP_ROR | dst_reg, shift); /*SHR dst_reg, shift*/
-}
-
-void host_x86_SAR8_CL(codeblock_t *block, int dst_reg)
-{
- if (dst_reg & 8)
- fatal("SAR8 CL & 8\n");
-
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd2, 0xc0 | RM_OP_SAR | dst_reg); /*SAR dst_reg, CL*/
-}
-void host_x86_SAR16_CL(codeblock_t *block, int dst_reg)
-{
- if (dst_reg & 8)
- fatal("SAR16 CL & 8\n");
-
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0xd3, 0xc0 | RM_OP_SAR | dst_reg); /*SAR dst_reg, CL*/
-}
-void host_x86_SAR32_CL(codeblock_t *block, int dst_reg)
-{
- if (dst_reg & 8)
- fatal("SAR32 CL & 8\n");
-
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd3, 0xc0 | RM_OP_SAR | dst_reg); /*SAR dst_reg, CL*/
-}
-
-void host_x86_SAR8_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- if (dst_reg & 8)
- fatal("SAR8 imm & 8\n");
-
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc0, 0xc0 | RM_OP_SAR | dst_reg, shift); /*SAR dst_reg, shift*/
-}
-void host_x86_SAR16_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- if (dst_reg & 8)
- fatal("SAR16 imm & 8\n");
-
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0xc1, 0xc0 | RM_OP_SAR | dst_reg, shift); /*SAR dst_reg, shift*/
-}
-void host_x86_SAR32_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- if (dst_reg & 8)
- fatal("SAR32 imm & 8\n");
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc1, 0xc0 | RM_OP_SAR | dst_reg, shift); /*SAR dst_reg, shift*/
-}
-
-void host_x86_SHL8_CL(codeblock_t *block, int dst_reg)
-{
- if (dst_reg & 8)
- fatal("SHL8 CL & 8\n");
-
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd2, 0xc0 | RM_OP_SHL | dst_reg); /*SHL dst_reg, CL*/
-}
-void host_x86_SHL16_CL(codeblock_t *block, int dst_reg)
-{
- if (dst_reg & 8)
- fatal("SHL16 CL & 8\n");
-
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0xd3, 0xc0 | RM_OP_SHL | dst_reg); /*SHL dst_reg, CL*/
-}
-void host_x86_SHL32_CL(codeblock_t *block, int dst_reg)
-{
- if (dst_reg & 8)
- fatal("SHL32 CL & 8\n");
-
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd3, 0xc0 | RM_OP_SHL | dst_reg); /*SHL dst_reg, CL*/
-}
-
-void host_x86_SHL8_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- if (dst_reg & 8)
- fatal("SHL8 imm & 8\n");
-
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc0, 0xc0 | RM_OP_SHL | dst_reg, shift); /*SHL dst_reg, shift*/
-}
-void host_x86_SHL16_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- if (dst_reg & 8)
- fatal("SHL16 imm & 8\n");
-
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0xc1, 0xc0 | RM_OP_SHL | dst_reg, shift); /*SHL dst_reg, shift*/
-}
-void host_x86_SHL32_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- if (dst_reg & 8)
- fatal("SHL32 imm & 8\n");
-
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc1, 0xc0 | RM_OP_SHL | dst_reg, shift); /*SHL dst_reg, shift*/
-}
-
-void host_x86_SHR8_CL(codeblock_t *block, int dst_reg)
-{
- if (dst_reg & 8)
- fatal("SHR8 CL & 8\n");
-
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd2, 0xc0 | RM_OP_SHR | dst_reg); /*SHR dst_reg, CL*/
-}
-void host_x86_SHR16_CL(codeblock_t *block, int dst_reg)
-{
- if (dst_reg & 8)
- fatal("SHR16 CL & 8\n");
-
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0xd3, 0xc0 | RM_OP_SHR | dst_reg); /*SHR dst_reg, CL*/
-}
-void host_x86_SHR32_CL(codeblock_t *block, int dst_reg)
-{
- if (dst_reg & 8)
- fatal("SHR32 CL & 8\n");
-
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd3, 0xc0 | RM_OP_SHR | dst_reg); /*SHR dst_reg, CL*/
-}
-
-void host_x86_SHR8_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- if (dst_reg & 8)
- fatal("SHR8 imm & 8\n");
-
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc0, 0xc0 | RM_OP_SHR | dst_reg, shift); /*SHR dst_reg, shift*/
-}
-void host_x86_SHR16_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- if (dst_reg & 8)
- fatal("SHR16 imm & 8\n");
-
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0xc1, 0xc0 | RM_OP_SHR | dst_reg, shift); /*SHR dst_reg, shift*/
-}
-void host_x86_SHR32_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- if (dst_reg & 8)
- fatal("SHR32 imm & 8\n");
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc1, 0xc0 | RM_OP_SHR | dst_reg, shift); /*SHR dst_reg, shift*/
-}
-
-void host_x86_SUB8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data)
-{
- if (dst_reg & 8)
- fatal("host_x86_SUB8_REG_IMM - dst_reg & 8\n");
-
- if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x2c, imm_data); /*SUB EAX, imm_data*/
- }
- else
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x80, 0xc0 | RM_OP_SUB | (dst_reg & 7), imm_data); /*SUB dst_reg, imm_data*/
- }
-}
-void host_x86_SUB16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data)
-{
- if (dst_reg & 8)
- fatal("host_x86_SUB16_REG_IMM - dst_reg & 8\n");
-
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x83, 0xc0 | RM_OP_SUB | (dst_reg & 7), imm_data & 0xff); /*SUB dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte2(block, 0x66, 0x2d); /*SUB AX, imm_data*/
- codegen_addword(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte3(block, 0x66, 0x81, 0xc0 | RM_OP_SUB | (dst_reg & 7)); /*SUB dst_reg, imm_data*/
- codegen_addword(block, imm_data);
- }
-}
-void host_x86_SUB32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data)
-{
- if (dst_reg & 8)
- fatal("host_x86_SUB32_REG_IMM - dst_reg & 8\n");
-
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x83, 0xc0 | RM_OP_SUB | (dst_reg & 7), imm_data & 0xff); /*SUB dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x2d); /*SUB EAX, imm_data*/
- codegen_addlong(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x81, 0xc0 | RM_OP_SUB | (dst_reg & 7)); /*SUB dst_reg, imm_data*/
- codegen_addlong(block, imm_data);
- }
-}
-void host_x86_SUB64_REG_IMM(codeblock_t *block, int dst_reg, uint64_t imm_data)
-{
- if (dst_reg & 8)
- fatal("host_x86_SUB64_REG_IMM - dst_reg & 8\n");
-
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x48, 0x83, 0xc0 | RM_OP_SUB | (dst_reg & 7), imm_data & 0xff); /*SUB dst_reg, imm_data*/
- }
- else
- fatal("SUB64_REG_IMM !is_imm8 %016llx\n", imm_data);
-}
-void host_x86_SUB8_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_SUB8_REG_REG - dst_reg & 8\n");
-
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x28, 0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3)); /*SUB dst_reg, src_reg*/
-}
-void host_x86_SUB16_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_SUB16_REG_REG - dst_reg & 8\n");
-
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0x29, 0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3)); /*SUB dst_reg, src_reg*/
-}
-void host_x86_SUB32_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_SUB32_REG_REG - dst_reg & 8\n");
-
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x29, 0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3)); /*SUB dst_reg, src_reg*/
-}
-
-#define MODRM_MOD_REG(rm, reg) (0xc0 | reg | (rm << 3))
-
-void host_x86_TEST8_REG(codeblock_t *block, int src_host_reg, int dst_host_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x84, MODRM_MOD_REG(dst_host_reg, src_host_reg)); /*TEST dst_host_reg, src_host_reg*/
-}
-void host_x86_TEST16_REG(codeblock_t *block, int src_host_reg, int dst_host_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0x85, MODRM_MOD_REG(dst_host_reg, src_host_reg)); /*TEST dst_host_reg, src_host_reg*/
-}
-void host_x86_TEST32_REG(codeblock_t *block, int src_reg, int dst_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_TEST32_REG - bad reg\n");
-
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x85, MODRM_MOD_REG(dst_reg, src_reg)); /*TEST dst_host_reg, src_host_reg*/
-}
-void host_x86_TEST32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data)
-{
- if (dst_reg & 8)
- fatal("TEST32_REG_IMM reg & 8\n");
- if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0xa9); /*TEST EAX, imm_data*/
- codegen_addlong(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0xf7, 0xc0 | dst_reg); /*TEST dst_reg, imm_data*/
- codegen_addlong(block, imm_data);
- }
-}
-
-void host_x86_XOR8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data)
-{
- if (dst_reg & 8)
- fatal("host_x86_XOR8_REG_IMM - dst_reg & 8\n");
-
- if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x34, imm_data); /*XOR EAX, imm_data*/
- }
- else
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x80, 0xc0 | RM_OP_XOR | (dst_reg & 7), imm_data); /*XOR dst_reg, imm_data*/
- }
-}
-void host_x86_XOR16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data)
-{
- if (dst_reg & 8)
- fatal("host_x86_XOR16_REG_IMM - dst_reg & 8\n");
-
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x83, 0xc0 | RM_OP_XOR | (dst_reg & 7), imm_data & 0xff); /*XOR dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte2(block, 0x66, 0x35); /*XOR AX, imm_data*/
- codegen_addword(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte3(block, 0x66, 0x81, 0xc0 | RM_OP_XOR | (dst_reg & 7)); /*XOR dst_reg, imm_data*/
- codegen_addword(block, imm_data);
- }
-}
-void host_x86_XOR32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data)
-{
- if (dst_reg & 8)
- fatal("host_x86_XOR32_REG_IMM - dst_reg & 8\n");
-
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x83, 0xc0 | RM_OP_XOR | (dst_reg & 7), imm_data & 0xff); /*XOR dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x35); /*XOR EAX, imm_data*/
- codegen_addlong(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x81, 0xc0 | RM_OP_XOR | (dst_reg & 7)); /*XOR dst_reg, imm_data*/
- codegen_addlong(block, imm_data);
- }
-}
-void host_x86_XOR8_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_XOR8_REG_IMM - dst_reg & 8\n");
-
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x30, 0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3)); /*XOR dst_reg, src_reg*/
-}
-void host_x86_XOR16_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_XOR16_REG_IMM - dst_reg & 8\n");
-
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0x31, 0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3)); /*XOR dst_reg, src_reg*/
-}
-void host_x86_XOR32_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- if ((dst_reg & 8) || (src_reg & 8))
- fatal("host_x86_XOR32_REG_IMM - dst_reg & 8\n");
-
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x31, 0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3)); /*XOR dst_reg, src_reg*/
-}
-
-#endif
diff --git a/src/codegen_backend_x86-64_ops.h b/src/codegen_backend_x86-64_ops.h
deleted file mode 100644
index e1db22a..0000000
--- a/src/codegen_backend_x86-64_ops.h
+++ /dev/null
@@ -1,196 +0,0 @@
-void host_x86_ADD8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data);
-void host_x86_ADD16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data);
-void host_x86_ADD32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data);
-void host_x86_ADD64_REG_IMM(codeblock_t *block, int dst_reg, uint64_t imm_data);
-
-void host_x86_ADD8_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_ADD16_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_ADD32_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_AND8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data);
-void host_x86_AND16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data);
-void host_x86_AND32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data);
-
-void host_x86_AND8_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_AND16_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_AND32_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_CALL(codeblock_t *block, void *p);
-
-void host_x86_CMP16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data);
-void host_x86_CMP32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data);
-void host_x86_CMP64_REG_IMM(codeblock_t *block, int dst_reg, uint64_t imm_data);
-
-void host_x86_CMP8_REG_REG(codeblock_t *block, int src_reg_a, int src_reg_b);
-void host_x86_CMP16_REG_REG(codeblock_t *block, int src_reg_a, int src_reg_b);
-void host_x86_CMP32_REG_REG(codeblock_t *block, int src_reg_a, int src_reg_b);
-
-void host_x86_JMP(codeblock_t *block, void *p);
-
-void host_x86_JNZ(codeblock_t *block, void *p);
-void host_x86_JZ(codeblock_t *block, void *p);
-
-uint8_t *host_x86_JNZ_short(codeblock_t *block);
-uint8_t *host_x86_JS_short(codeblock_t *block);
-uint8_t *host_x86_JZ_short(codeblock_t *block);
-
-uint32_t *host_x86_JNB_long(codeblock_t *block);
-uint32_t *host_x86_JNBE_long(codeblock_t *block);
-uint32_t *host_x86_JNL_long(codeblock_t *block);
-uint32_t *host_x86_JNLE_long(codeblock_t *block);
-uint32_t *host_x86_JNO_long(codeblock_t *block);
-uint32_t *host_x86_JNS_long(codeblock_t *block);
-uint32_t *host_x86_JNZ_long(codeblock_t *block);
-uint32_t *host_x86_JB_long(codeblock_t *block);
-uint32_t *host_x86_JBE_long(codeblock_t *block);
-uint32_t *host_x86_JL_long(codeblock_t *block);
-uint32_t *host_x86_JLE_long(codeblock_t *block);
-uint32_t *host_x86_JO_long(codeblock_t *block);
-uint32_t *host_x86_JS_long(codeblock_t *block);
-uint32_t *host_x86_JZ_long(codeblock_t *block);
-
-void host_x86_LAHF(codeblock_t *block);
-
-void host_x86_LEA_REG_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t offset);
-void host_x86_LEA_REG_REG(codeblock_t *block, int dst_reg, int src_reg_a, int src_reg_b);
-void host_x86_LEA_REG_REG_SHIFT(codeblock_t *block, int dst_reg, int src_reg_a, int src_reg_b, int shift);
-
-void host_x86_MOV8_ABS_IMM(codeblock_t *block, void *p, uint32_t imm_data);
-void host_x86_MOV16_ABS_IMM(codeblock_t *block, void *p, uint16_t imm_data);
-void host_x86_MOV32_ABS_IMM(codeblock_t *block, void *p, uint32_t imm_data);
-
-void host_x86_MOV8_ABS_REG(codeblock_t *block, void *p, int src_reg);
-void host_x86_MOV16_ABS_REG(codeblock_t *block, void *p, int src_reg);
-void host_x86_MOV32_ABS_REG(codeblock_t *block, void *p, int src_reg);
-void host_x86_MOV64_ABS_REG(codeblock_t *block, void *p, int src_reg);
-
-void host_x86_MOV8_ABS_REG_REG_SHIFT_REG(codeblock_t *block, uint32_t addr, int base_reg, int index_reg, int shift, int src_reg);
-
-void host_x86_MOV8_BASE_INDEX_REG(codeblock_t *block, int dst_reg, int base_reg, int index_reg);
-void host_x86_MOV16_BASE_INDEX_REG(codeblock_t *block, int dst_reg, int base_reg, int index_reg);
-void host_x86_MOV32_BASE_INDEX_REG(codeblock_t *block, int dst_reg, int base_reg, int index_reg);
-
-void host_x86_MOV32_BASE_OFFSET_REG(codeblock_t *block, int base_reg, int offset, int src_reg);
-void host_x86_MOV64_BASE_OFFSET_REG(codeblock_t *block, int base_reg, int offset, int src_reg);
-
-void host_x86_MOV32_BASE_OFFSET_IMM(codeblock_t *block, int base_reg, int offset, uint32_t imm_data);
-
-void host_x86_MOV8_REG_ABS(codeblock_t *block, int dst_reg, void *p);
-void host_x86_MOV16_REG_ABS(codeblock_t *block, int dst_reg, void *p);
-void host_x86_MOV32_REG_ABS(codeblock_t *block, int dst_reg, void *p);
-void host_x86_MOV64_REG_ABS(codeblock_t *block, int dst_reg, void *p);
-
-void host_x86_MOV8_REG_ABS_REG_REG_SHIFT(codeblock_t *block, int dst_reg, uint32_t addr, int base_reg, int index_reg, int shift);
-
-void host_x86_MOV32_REG_BASE_INDEX(codeblock_t *block, int dst_reg, int base_reg, int index_reg);
-
-void host_x86_MOV64_REG_BASE_INDEX_SHIFT(codeblock_t *block, int dst_reg, int base_reg, int index_reg, int scale);
-
-void host_x86_MOV16_REG_BASE_OFFSET(codeblock_t *block, int dst_reg, int base_reg, int offset);
-void host_x86_MOV32_REG_BASE_OFFSET(codeblock_t *block, int dst_reg, int base_reg, int offset);
-void host_x86_MOV64_REG_BASE_OFFSET(codeblock_t *block, int dst_reg, int base_reg, int offset);
-
-void host_x86_MOV8_REG_IMM(codeblock_t *block, int reg, uint16_t imm_data);
-void host_x86_MOV16_REG_IMM(codeblock_t *block, int reg, uint16_t imm_data);
-void host_x86_MOV32_REG_IMM(codeblock_t *block, int reg, uint32_t imm_data);
-
-void host_x86_MOV64_REG_IMM(codeblock_t *block, int reg, uint64_t imm_data);
-
-void host_x86_MOV8_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MOV16_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MOV32_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_MOV32_STACK_IMM(codeblock_t *block, int32_t offset, uint32_t imm_data);
-
-void host_x86_MOVSX_REG_16_8(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MOVSX_REG_32_8(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MOVSX_REG_32_16(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_MOVZX_BASE_INDEX_32_8(codeblock_t *block, int dst_reg, int base_reg, int index_reg);
-void host_x86_MOVZX_BASE_INDEX_32_16(codeblock_t *block, int dst_reg, int base_reg, int index_reg);
-
-void host_x86_MOVZX_REG_16_8(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MOVZX_REG_32_8(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MOVZX_REG_32_16(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_MOVZX_REG_ABS_16_8(codeblock_t *block, int dst_reg, void *p);
-void host_x86_MOVZX_REG_ABS_32_8(codeblock_t *block, int dst_reg, void *p);
-void host_x86_MOVZX_REG_ABS_32_16(codeblock_t *block, int dst_reg, void *p);
-
-void host_x86_NOP(codeblock_t *block);
-
-void host_x86_OR8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data);
-void host_x86_OR16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data);
-void host_x86_OR32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data);
-
-void host_x86_OR8_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_OR16_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_OR32_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_POP(codeblock_t *block, int src_reg);
-
-void host_x86_PUSH(codeblock_t *block, int src_reg);
-
-void host_x86_RET(codeblock_t *block);
-
-void host_x86_ROL8_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_ROL16_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_ROL32_IMM(codeblock_t *block, int dst_reg, int shift);
-
-void host_x86_ROL8_CL(codeblock_t *block, int dst_reg);
-void host_x86_ROL16_CL(codeblock_t *block, int dst_reg);
-void host_x86_ROL32_CL(codeblock_t *block, int dst_reg);
-
-void host_x86_ROR8_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_ROR16_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_ROR32_IMM(codeblock_t *block, int dst_reg, int shift);
-
-void host_x86_ROR8_CL(codeblock_t *block, int dst_reg);
-void host_x86_ROR16_CL(codeblock_t *block, int dst_reg);
-void host_x86_ROR32_CL(codeblock_t *block, int dst_reg);
-
-void host_x86_SAR8_CL(codeblock_t *block, int dst_reg);
-void host_x86_SAR16_CL(codeblock_t *block, int dst_reg);
-void host_x86_SAR32_CL(codeblock_t *block, int dst_reg);
-
-void host_x86_SAR8_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_SAR16_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_SAR32_IMM(codeblock_t *block, int dst_reg, int shift);
-
-void host_x86_SHL8_CL(codeblock_t *block, int dst_reg);
-void host_x86_SHL16_CL(codeblock_t *block, int dst_reg);
-void host_x86_SHL32_CL(codeblock_t *block, int dst_reg);
-
-void host_x86_SHL8_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_SHL16_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_SHL32_IMM(codeblock_t *block, int dst_reg, int shift);
-
-void host_x86_SHR8_CL(codeblock_t *block, int dst_reg);
-void host_x86_SHR16_CL(codeblock_t *block, int dst_reg);
-void host_x86_SHR32_CL(codeblock_t *block, int dst_reg);
-
-void host_x86_SHR8_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_SHR16_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_SHR32_IMM(codeblock_t *block, int dst_reg, int shift);
-
-void host_x86_SUB8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data);
-void host_x86_SUB16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data);
-void host_x86_SUB32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data);
-void host_x86_SUB64_REG_IMM(codeblock_t *block, int dst_reg, uint64_t imm_data);
-
-void host_x86_SUB8_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_SUB16_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_SUB32_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_TEST8_REG(codeblock_t *block, int src_host_reg, int dst_host_reg);
-void host_x86_TEST16_REG(codeblock_t *block, int src_host_reg, int dst_host_reg);
-void host_x86_TEST32_REG(codeblock_t *block, int src_reg, int dst_reg);
-void host_x86_TEST32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data);
-
-void host_x86_XOR8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data);
-void host_x86_XOR16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data);
-void host_x86_XOR32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data);
-
-void host_x86_XOR8_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_XOR16_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_XOR32_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
diff --git a/src/codegen_backend_x86-64_ops_helpers.h b/src/codegen_backend_x86-64_ops_helpers.h
deleted file mode 100644
index 4e63bbd..0000000
--- a/src/codegen_backend_x86-64_ops_helpers.h
+++ /dev/null
@@ -1,102 +0,0 @@
-#define JMP_LEN_BYTES 5
-
-static inline void codegen_addbyte(codeblock_t *block, uint8_t val)
-{
- if (block_pos >= BLOCK_MAX)
- {
- fatal("codegen_addbyte over! %i\n", block_pos);
-// CPU_BLOCK_END();
- }
- block_write_data[block_pos++] = val;
-}
-static inline void codegen_addbyte2(codeblock_t *block, uint8_t vala, uint8_t valb)
-{
- if (block_pos > (BLOCK_MAX-2))
- {
- fatal("codegen_addbyte2 over! %i\n", block_pos);
- CPU_BLOCK_END();
- }
- block_write_data[block_pos++] = vala;
- block_write_data[block_pos++] = valb;
-}
-static inline void codegen_addbyte3(codeblock_t *block, uint8_t vala, uint8_t valb, uint8_t valc)
-{
- if (block_pos > (BLOCK_MAX-3))
- {
- fatal("codegen_addbyte3 over! %i\n", block_pos);
- CPU_BLOCK_END();
- }
- block_write_data[block_pos++] = vala;
- block_write_data[block_pos++] = valb;
- block_write_data[block_pos++] = valc;
-}
-static inline void codegen_addbyte4(codeblock_t *block, uint8_t vala, uint8_t valb, uint8_t valc, uint8_t vald)
-{
- if (block_pos > (BLOCK_MAX-4))
- {
- fatal("codegen_addbyte4 over! %i\n", block_pos);
- CPU_BLOCK_END();
- }
- block_write_data[block_pos++] = vala;
- block_write_data[block_pos++] = valb;
- block_write_data[block_pos++] = valc;
- block_write_data[block_pos++] = vald;
-}
-
-static inline void codegen_addword(codeblock_t *block, uint16_t val)
-{
- if (block_pos > (BLOCK_MAX-2))
- {
- fatal("codegen_addword over! %i\n", block_pos);
- CPU_BLOCK_END();
- }
- *(uint16_t *)&block_write_data[block_pos] = val;
- block_pos += 2;
-}
-
-static inline void codegen_addlong(codeblock_t *block, uint32_t val)
-{
- if (block_pos > (BLOCK_MAX-4))
- {
- fatal("codegen_addlong over! %i\n", block_pos);
- CPU_BLOCK_END();
- }
- *(uint32_t *)&block_write_data[block_pos] = val;
- block_pos += 4;
-}
-
-static inline void codegen_addquad(codeblock_t *block, uint64_t val)
-{
- if (block_pos > (BLOCK_MAX-8))
- {
- fatal("codegen_addquad over! %i\n", block_pos);
- CPU_BLOCK_END();
- }
- *(uint64_t *)&block_write_data[block_pos] = val;
- block_pos += 8;
-}
-
-static inline void codegen_alloc_bytes(codeblock_t *block, int size)
-{
- if (block_pos > ((BLOCK_MAX - size) - JMP_LEN_BYTES))
- {
- /*Current block is full. Allocate a new block*/
- struct mem_block_t *new_block = codegen_allocator_allocate(block->head_mem_block, get_block_nr(block));
- uint8_t *new_ptr = codeblock_allocator_get_ptr(new_block);
-
- /*Add a jump instruction to the new block*/
- codegen_addbyte(block, 0xe9); /*JMP*/
- codegen_addlong(block, (uintptr_t)new_ptr - (uintptr_t)&block_write_data[block_pos + 4]);
-
- /*Set write address to start of new block*/
- block_pos = 0;
- block_write_data = new_ptr;
- }
-}
-
-static inline int is_imm8(uint32_t imm_data)
-{
- if (imm_data <= 0x7f || imm_data >= 0xffffff80)
- return 1;
- return 0;
-}
diff --git a/src/codegen_backend_x86-64_ops_sse.c b/src/codegen_backend_x86-64_ops_sse.c
deleted file mode 100644
index cdff2c6..0000000
--- a/src/codegen_backend_x86-64_ops_sse.c
+++ /dev/null
@@ -1,614 +0,0 @@
-#ifdef __amd64__
-
-#include "ibm.h"
-#include "codegen.h"
-#include "codegen_allocator.h"
-#include "codegen_backend.h"
-#include "codegen_backend_x86-64_defs.h"
-#include "codegen_backend_x86-64_ops_sse.h"
-#include "codegen_backend_x86-64_ops_helpers.h"
-
-void host_x86_ADDPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0x58, 0xc0 | src_reg | (dst_reg << 3)); /*ADDPS dst_reg, src_reg*/
-}
-void host_x86_ADDSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf2, 0x0f, 0x58, 0xc0 | src_reg | (dst_reg << 3));
-}
-
-void host_x86_CMPPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg, int type)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x0f, 0xc2, 0xc0 | src_reg | (dst_reg << 3), type); /*CMPPS dst_reg, src_reg, type*/
-}
-
-void host_x86_COMISD_XREG_XREG(codeblock_t *block, int src_reg_a, int src_reg_b)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x2e, 0xc0 | src_reg_b | (src_reg_a << 3));
-}
-
-void host_x86_CVTDQ2PS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0x5b, 0xc0 | src_reg | (dst_reg << 3)); /*CVTDQ2PS dst_reg, src_reg*/
-}
-void host_x86_CVTPS2DQ_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x5b, 0xc0 | src_reg | (dst_reg << 3)); /*CVTPS2DQ dst_reg, src_reg*/
-}
-
-void host_x86_CVTSD2SI_REG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf2, 0x0f, 0x2d, 0xc0 | src_reg | (dst_reg << 3)); /*CVTSD2SI dst_reg, src_reg*/
-}
-void host_x86_CVTSD2SI_REG64_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0xf2, 0x48, 0x0f, 0x2d); /*CVTSD2SI dst_reg, src_reg*/
- codegen_addbyte(block, 0xc0 | src_reg | (dst_reg << 3));
-}
-void host_x86_CVTSD2SS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf2, 0x0f, 0x5a, 0xc0 | src_reg | (dst_reg << 3));
-}
-
-void host_x86_CVTSI2SD_XREG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf2, 0x0f, 0x2a, 0xc0 | src_reg | (dst_reg << 3)); /*CVTSI2SD dst_reg, src_reg*/
-}
-void host_x86_CVTSI2SS_XREG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x2a, 0xc0 | src_reg | (dst_reg << 3)); /*CVTSI2SD dst_reg, src_reg*/
-}
-void host_x86_CVTSI2SD_XREG_REG64(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0xf2, 0x48, 0x0f, 0x2a); /*CVTSI2SD dst_reg, src_reg*/
- codegen_addbyte(block, 0xc0 | src_reg | (dst_reg << 3));
-}
-
-void host_x86_CVTSS2SD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x5a, 0xc0 | src_reg | (dst_reg << 3));
-}
-void host_x86_CVTSS2SD_XREG_BASE_INDEX(codeblock_t *block, int dst_reg, int base_reg, int idx_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x5a, 0x04 | (dst_reg << 3)); /*CVTSS2SD XMMx, [base_reg + idx_reg]*/
- codegen_addbyte(block, base_reg | (idx_reg << 3));
-}
-
-void host_x86_DIVSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf2, 0x0f, 0x5e, 0xc0 | src_reg | (dst_reg << 3));
-}
-void host_x86_DIVSS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x5e, 0xc0 | src_reg | (dst_reg << 3)); /*DIVSS dst_reg, src_reg*/
-}
-
-void host_x86_LDMXCSR(codeblock_t *block, void *p)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x0f, 0xae, 0x50 | REG_EBP, offset); /*LDMXCSR offset[EBP]*/
- }
- else if (offset < (1ull << 32))
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0x0f, 0xae, 0x90 | REG_EBP); /*LDMXCSR offset[EBP]*/
- codegen_addlong(block, offset);
- }
- else
- {
- fatal("host_x86_LDMXCSR - out of range %p\n", p);
- }
-}
-
-void host_x86_MAXSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf2, 0x0f, 0x5f, 0xc0 | src_reg | (dst_reg << 3)); /*MAXSD dst_reg, src_reg*/
-}
-
-void host_x86_MOVD_BASE_INDEX_XREG(codeblock_t *block, int base_reg, int idx_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x7e, 0x04 | (src_reg << 3)); /*MOVD XMMx, [base_reg + idx_reg]*/
- codegen_addbyte(block, base_reg | (idx_reg << 3));
-}
-void host_x86_MOVD_REG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x7e, 0xc0 | dst_reg | (src_reg << 3));
-}
-void host_x86_MOVD_XREG_BASE_INDEX(codeblock_t *block, int dst_reg, int base_reg, int idx_reg)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x6e, 0x04 | (dst_reg << 3)); /*MOVD XMMx, [base_reg + idx_reg]*/
- codegen_addbyte(block, base_reg | (idx_reg << 3));
-}
-void host_x86_MOVD_XREG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x6e, 0xc0 | src_reg | (dst_reg << 3));
-}
-
-void host_x86_MOVQ_ABS_XREG(codeblock_t *block, void *p, int src_reg)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (src_reg & 8)
- fatal("host_x86_MOVQ_ABS_REG reg & 8\n");
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0xd6, 0x45 | (src_reg << 3)); /*MOVQ offset[EBP], src_reg*/
- codegen_addbyte(block, offset);
- }
- else
- {
- if ((uintptr_t)p >> 32)
- fatal("host_x86_MOVQ_ABS_REG - out of range %p\n", p);
- codegen_alloc_bytes(block, 9);
- codegen_addbyte4(block, 0x66, 0x0f, 0xd6, 0x04 | (src_reg << 3)); /*MOVQ [p], src_reg*/
- codegen_addbyte(block, 0x25);
- codegen_addlong(block, (uint32_t)(uintptr_t)p);
- }
-}
-void host_x86_MOVQ_ABS_REG_REG_SHIFT_XREG(codeblock_t *block, uint32_t addr, int src_reg_a, int src_reg_b, int shift, int src_reg)
-{
- if ((src_reg & 8) || (src_reg_a & 8) || (src_reg_b & 8))
- fatal("host_x86_MOVQ_ABS_REG_REG_SHIFT_REG - bad reg\n");
-
- if (addr < 0x80 || addr >= 0xffffff80)
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte3(block, 0x66, 0x0f, 0xd6); /*MOVQ addr[src_reg_a + src_reg_b << shift], XMMx*/
- codegen_addbyte3(block, 0x44 | (src_reg << 3), src_reg_a | (src_reg_b << 3) | (shift << 6), addr & 0xff);
- }
- else
- {
- codegen_alloc_bytes(block, 9);
- codegen_addbyte3(block, 0x66, 0x0f, 0xd6); /*MOVQ addr[src_reg_a + src_reg_b << shift], XMMx*/
- codegen_addbyte2(block, 0x84 | (src_reg << 3), src_reg_a | (src_reg_b << 3) | (shift << 6));
- codegen_addlong(block, addr);
- }
-}
-
-void host_x86_MOVQ_BASE_INDEX_XREG(codeblock_t *block, int base_reg, int idx_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0xd6, 0x04 | (src_reg << 3)); /*MOVD XMMx, [base_reg + idx_reg]*/
- codegen_addbyte(block, base_reg | (idx_reg << 3));
-}
-void host_x86_MOVQ_BASE_OFFSET_XREG(codeblock_t *block, int base_reg, int offset, int src_reg)
-{
- if (offset >= -128 && offset < 127)
- {
- if (base_reg == REG_RSP)
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte4(block, 0x66, 0x0f, 0xd6, 0x44 | (src_reg << 3)); /*MOVQ [RSP + offset], XMMx*/
- codegen_addbyte2(block, 0x24, offset);
- }
- else
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0xd6, 0x40 | base_reg | (src_reg << 3)); /*MOVQ [base_reg + offset], XMMx*/
- codegen_addbyte(block, offset);
- }
- }
- else
- fatal("MOVQ_BASE_OFFSET_XREG - offset %i\n", offset);
-}
-
-void host_x86_MOVQ_XREG_ABS(codeblock_t *block, int dst_reg, void *p)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (dst_reg & 8)
- fatal("host_x86_MOVQ_REG_ABS reg & 8\n");
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x7e, 0x45 | (dst_reg << 3)); /*MOVQ offset[EBP], src_reg*/
- codegen_addbyte(block, offset);
- }
- else
- {
- if ((uintptr_t)p >> 32)
- fatal("host_x86_MOVQ_REG_ABS - out of range %p\n", p);
- codegen_alloc_bytes(block, 9);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x7e, 0x04 | (dst_reg << 3)); /*MOVQ [p], src_reg*/
- codegen_addbyte(block, 0x25);
- codegen_addlong(block, (uint32_t)(uintptr_t)p);
- }
-}
-void host_x86_MOVQ_XREG_ABS_REG_REG_SHIFT(codeblock_t *block, int dst_reg, uint32_t addr, int src_reg_a, int src_reg_b, int shift)
-{
- if ((dst_reg & 8) || (src_reg_a & 8) || (src_reg_b & 8))
- fatal("host_x86_MOVQ_REG_ABS_REG_REG_SHIFT - bad reg\n");
-
- if (addr < 0x80 || addr >= 0xffffff80)
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte3(block, 0xf3, 0x0f, 0x7e); /*MOVQ XMMx, addr[src_reg_a + src_reg_b << shift]*/
- codegen_addbyte3(block, 0x44 | (dst_reg << 3), src_reg_a | (src_reg_b << 3) | (shift << 6), addr & 0xff);
- }
- else
- {
- codegen_alloc_bytes(block, 9);
- codegen_addbyte3(block, 0xf3, 0x0f, 0x7e); /*MOVQ XMMx, addr[src_reg_a + src_reg_b << shift]*/
- codegen_addbyte2(block, 0x84 | (dst_reg << 3), src_reg_a | (src_reg_b << 3) | (shift << 6));
- codegen_addlong(block, addr);
- }
-}
-void host_x86_MOVQ_XREG_BASE_INDEX(codeblock_t *block, int dst_reg, int base_reg, int idx_reg)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x7e, 0x04 | (dst_reg << 3)); /*MOVQ XMMx, [base_reg + idx_reg]*/
- codegen_addbyte(block, base_reg | (idx_reg << 3));
-}
-void host_x86_MOVQ_XREG_BASE_OFFSET(codeblock_t *block, int dst_reg, int base_reg, int offset)
-{
- if (offset >= -128 && offset < 127)
- {
- if (base_reg == REG_ESP)
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x7e, 0x44 | (dst_reg << 3)); /*MOVQ XMMx, [ESP + offset]*/
- codegen_addbyte2(block, 0x24, offset);
- }
- else
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x7e, 0x40 | base_reg | (dst_reg << 3)); /*MOVQ XMMx, [base_reg + offset]*/
- codegen_addbyte(block, offset);
- }
- }
- else
- fatal("MOVQ_REG_BASE_OFFSET - offset %i\n", offset);
-}
-
-void host_x86_MOVQ_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x7e, 0xc0 | src_reg | (dst_reg << 3)); /*MOVQ dst_reg, src_reg*/
-}
-
-void host_x86_MOVQ_REG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x48, 0x0f, 0x7e); /*MOVQ dst_reg, src_reg*/
- codegen_addbyte(block, 0xc0 | dst_reg | (src_reg << 3));
-}
-void host_x86_MOVQ_XREG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x48, 0x0f, 0x6e); /*MOVQ dst_reg, src_reg*/
- codegen_addbyte(block, 0xc0 | src_reg | (dst_reg << 3));
-}
-
-void host_x86_MAXPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0x5f, 0xc0 | src_reg | (dst_reg << 3)); /*MAXPS dst_reg, src_reg*/
-}
-void host_x86_MINPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0x5d, 0xc0 | src_reg | (dst_reg << 3)); /*MINPS dst_reg, src_reg*/
-}
-
-void host_x86_MULPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0x59, 0xc0 | src_reg | (dst_reg << 3)); /*MULPS dst_reg, src_reg*/
-}
-void host_x86_MULSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf2, 0x0f, 0x59, 0xc0 | src_reg | (dst_reg << 3));
-}
-
-void host_x86_PACKSSWB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 9);
- codegen_addbyte4(block, 0x66, 0x0f, 0x63, 0xc0 | src_reg | (dst_reg << 3)); /*PACKSSWB dst_reg, src_reg*/
- codegen_addbyte4(block, 0x66, 0x0f, 0x70, 0xc0 | dst_reg | (dst_reg << 3)); /*PSHUFD dst_reg, dst_reg, 0x88 (move bits 64-95 to 32-63)*/
- codegen_addbyte(block, 0x88);
-}
-void host_x86_PACKSSDW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 9);
- codegen_addbyte4(block, 0x66, 0x0f, 0x6b, 0xc0 | src_reg | (dst_reg << 3)); /*PACKSSDW dst_reg, src_reg*/
- codegen_addbyte4(block, 0x66, 0x0f, 0x70, 0xc0 | dst_reg | (dst_reg << 3)); /*PSHUFD dst_reg, dst_reg, 0x88 (move bits 64-95 to 32-63)*/
- codegen_addbyte(block, 0x88);
-}
-void host_x86_PACKUSWB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 9);
- codegen_addbyte4(block, 0x66, 0x0f, 0x67, 0xc0 | src_reg | (dst_reg << 3)); /*PACKUSWB dst_reg, src_reg*/
- codegen_addbyte4(block, 0x66, 0x0f, 0x70, 0xc0 | dst_reg | (dst_reg << 3)); /*PSHUFD dst_reg, dst_reg, 0x88 (move bits 64-95 to 32-63)*/
- codegen_addbyte(block, 0x88);
-}
-
-void host_x86_PADDB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xfc, 0xc0 | src_reg | (dst_reg << 3)); /*PADDB dst_reg, src_reg*/
-}
-void host_x86_PADDW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xfd, 0xc0 | src_reg | (dst_reg << 3)); /*PADDW dst_reg, src_reg*/
-}
-void host_x86_PADDD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xfe, 0xc0 | src_reg | (dst_reg << 3)); /*PADDD dst_reg, src_reg*/
-}
-void host_x86_PADDSB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xec, 0xc0 | src_reg | (dst_reg << 3)); /*PADDSB dst_reg, src_reg*/
-}
-void host_x86_PADDSW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xed, 0xc0 | src_reg | (dst_reg << 3)); /*PADDSW dst_reg, src_reg*/
-}
-void host_x86_PADDUSB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xdc, 0xc0 | src_reg | (dst_reg << 3)); /*PADDUSB dst_reg, src_reg*/
-}
-void host_x86_PADDUSW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xdd, 0xc0 | src_reg | (dst_reg << 3)); /*PADDUSW dst_reg, src_reg*/
-}
-
-void host_x86_PAND_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xdb, 0xc0 | src_reg | (dst_reg << 3)); /*PAND dst_reg, src_reg*/
-}
-void host_x86_PANDN_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xdf, 0xc0 | src_reg | (dst_reg << 3)); /*PANDN dst_reg, src_reg*/
-}
-void host_x86_POR_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xeb, 0xc0 | src_reg | (dst_reg << 3)); /*POR dst_reg, src_reg*/
-}
-void host_x86_PXOR_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xef, 0xc0 | src_reg | (dst_reg << 3)); /*PXOR dst_reg, src_reg*/
-}
-
-void host_x86_PCMPEQB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x74, 0xc0 | src_reg | (dst_reg << 3)); /*PCMPEQB dst_reg, src_reg*/
-}
-void host_x86_PCMPEQW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x75, 0xc0 | src_reg | (dst_reg << 3)); /*PCMPEQW dst_reg, src_reg*/
-}
-void host_x86_PCMPEQD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x76, 0xc0 | src_reg | (dst_reg << 3)); /*PCMPEQD dst_reg, src_reg*/
-}
-void host_x86_PCMPGTB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x64, 0xc0 | src_reg | (dst_reg << 3)); /*PCMPGTB dst_reg, src_reg*/
-}
-void host_x86_PCMPGTW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x65, 0xc0 | src_reg | (dst_reg << 3)); /*PCMPGTW dst_reg, src_reg*/
-}
-void host_x86_PCMPGTD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x66, 0xc0 | src_reg | (dst_reg << 3)); /*PCMPGTD dst_reg, src_reg*/
-}
-
-void host_x86_PMADDWD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xf5, 0xc0 | src_reg | (dst_reg << 3)); /*PMULLW dst_reg, src_reg*/
-}
-void host_x86_PMULHW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xe5, 0xc0 | src_reg | (dst_reg << 3)); /*PMULLW dst_reg, src_reg*/
-}
-void host_x86_PMULLW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xd5, 0xc0 | src_reg | (dst_reg << 3)); /*PMULLW dst_reg, src_reg*/
-}
-
-void host_x86_PSLLW_XREG_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x71, 0xc0 | 0x30 | dst_reg); /*PSLLW dst_reg, imm*/
- codegen_addbyte(block, shift);
-}
-void host_x86_PSLLD_XREG_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x72, 0xc0 | 0x30 | dst_reg); /*PSLLD dst_reg, imm*/
- codegen_addbyte(block, shift);
-}
-void host_x86_PSLLQ_XREG_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x73, 0xc0 | 0x30 | dst_reg); /*PSLLD dst_reg, imm*/
- codegen_addbyte(block, shift);
-}
-void host_x86_PSRAW_XREG_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x71, 0xc0 | 0x20 | dst_reg); /*PSRAW dst_reg, imm*/
- codegen_addbyte(block, shift);
-}
-void host_x86_PSRAD_XREG_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x72, 0xc0 | 0x20 | dst_reg); /*PSRAD dst_reg, imm*/
- codegen_addbyte(block, shift);
-}
-void host_x86_PSRAQ_XREG_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x73, 0xc0 | 0x20 | dst_reg); /*PSRAD dst_reg, imm*/
- codegen_addbyte(block, shift);
-}
-void host_x86_PSRLW_XREG_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x71, 0xc0 | 0x10 | dst_reg); /*PSRLW dst_reg, imm*/
- codegen_addbyte(block, shift);
-}
-void host_x86_PSRLD_XREG_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x72, 0xc0 | 0x10 | dst_reg); /*PSRLD dst_reg, imm*/
- codegen_addbyte(block, shift);
-}
-void host_x86_PSRLQ_XREG_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x73, 0xc0 | 0x10 | dst_reg); /*PSRLD dst_reg, imm*/
- codegen_addbyte(block, shift);
-}
-
-void host_x86_PSUBB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xf8, 0xc0 | src_reg | (dst_reg << 3)); /*PADDB dst_reg, src_reg*/
-}
-void host_x86_PSUBW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xf9, 0xc0 | src_reg | (dst_reg << 3)); /*PADDW dst_reg, src_reg*/
-}
-void host_x86_PSUBD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xfa, 0xc0 | src_reg | (dst_reg << 3)); /*PADDD dst_reg, src_reg*/
-}
-void host_x86_PSUBSB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xe8, 0xc0 | src_reg | (dst_reg << 3)); /*PSUBSB dst_reg, src_reg*/
-}
-void host_x86_PSUBSW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xe9, 0xc0 | src_reg | (dst_reg << 3)); /*PSUBSW dst_reg, src_reg*/
-}
-void host_x86_PSUBUSB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xd8, 0xc0 | src_reg | (dst_reg << 3)); /*PSUBUSB dst_reg, src_reg*/
-}
-void host_x86_PSUBUSW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xd9, 0xc0 | src_reg | (dst_reg << 3)); /*PSUBUSW dst_reg, src_reg*/
-}
-
-void host_x86_PUNPCKHBW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 9);
- codegen_addbyte4(block, 0x66, 0x0f, 0x60, 0xc0 | src_reg | (dst_reg << 3)); /*PUNPCKLBW dst_reg, src_reg*/
- codegen_addbyte4(block, 0x66, 0x0f, 0x70, 0xc0 | dst_reg | (dst_reg << 3)); /*PSHUFD dst_reg, dst_reg, 0xee (move top 64-bits to low 64-bits)*/
- codegen_addbyte(block, 0xee);
-}
-void host_x86_PUNPCKHWD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 9);
- codegen_addbyte4(block, 0x66, 0x0f, 0x61, 0xc0 | src_reg | (dst_reg << 3)); /*PUNPCKLWD dst_reg, src_reg*/
- codegen_addbyte4(block, 0x66, 0x0f, 0x70, 0xc0 | dst_reg | (dst_reg << 3)); /*PSHUFD dst_reg, dst_reg, 0xee (move top 64-bits to low 64-bits)*/
- codegen_addbyte(block, 0xee);
-}
-void host_x86_PUNPCKHDQ_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 9);
- codegen_addbyte4(block, 0x66, 0x0f, 0x62, 0xc0 | src_reg | (dst_reg << 3)); /*PUNPCKLDQ dst_reg, src_reg*/
- codegen_addbyte4(block, 0x66, 0x0f, 0x70, 0xc0 | dst_reg | (dst_reg << 3)); /*PSHUFD dst_reg, dst_reg, 0xee (move top 64-bits to low 64-bits)*/
- codegen_addbyte(block, 0xee);
-}
-void host_x86_PUNPCKLBW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x60, 0xc0 | src_reg | (dst_reg << 3)); /*PUNPCKLBW dst_reg, src_reg*/
-}
-void host_x86_PUNPCKLWD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x61, 0xc0 | src_reg | (dst_reg << 3)); /*PUNPCKLWD dst_reg, src_reg*/
-}
-void host_x86_PUNPCKLDQ_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x62, 0xc0 | src_reg | (dst_reg << 3)); /*PUNPCKLDQ dst_reg, src_reg*/
-}
-
-void host_x86_SQRTSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf2, 0x0f, 0x51, 0xc0 | src_reg | (dst_reg << 3)); /*SQRTSD dst_reg, src_reg*/
-}
-void host_x86_SQRTSS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x51, 0xc0 | src_reg | (dst_reg << 3)); /*SQRTSS dst_reg, src_reg*/
-}
-
-void host_x86_SUBPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0x5c, 0xc0 | src_reg | (dst_reg << 3)); /*SUBPS dst_reg, src_reg*/
-}
-void host_x86_SUBSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf2, 0x0f, 0x5c, 0xc0 | src_reg | (dst_reg << 3));
-}
-
-void host_x86_UNPCKLPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0x14, 0xc0 | src_reg | (dst_reg << 3));
-}
-
-#endif
diff --git a/src/codegen_backend_x86-64_ops_sse.h b/src/codegen_backend_x86-64_ops_sse.h
deleted file mode 100644
index 39e39f4..0000000
--- a/src/codegen_backend_x86-64_ops_sse.h
+++ /dev/null
@@ -1,114 +0,0 @@
-void host_x86_ADDPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_ADDSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-#define CMPPS_EQ 0
-#define CMPPS_NLT 5
-#define CMPPS_NLE 6
-void host_x86_CMPPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg, int type);
-
-void host_x86_COMISD_XREG_XREG(codeblock_t *block, int src_reg_a, int src_reg_b);
-
-void host_x86_CVTDQ2PS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_CVTPS2DQ_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_CVTSD2SI_REG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_CVTSD2SI_REG64_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_CVTSD2SS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_CVTSI2SD_XREG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_CVTSI2SD_XREG_REG64(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_CVTSI2SS_XREG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_CVTSS2SD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_CVTSS2SD_XREG_BASE_INDEX(codeblock_t *block, int dst_reg, int base_reg, int idx_reg);
-
-void host_x86_DIVSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_DIVSS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_LDMXCSR(codeblock_t *block, void *p);
-
-void host_x86_MAXSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_MOVD_BASE_INDEX_XREG(codeblock_t *block, int base_reg, int idx_reg, int src_reg);
-void host_x86_MOVD_REG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MOVD_XREG_BASE_INDEX(codeblock_t *block, int dst_reg, int base_reg, int idx_reg);
-void host_x86_MOVD_XREG_REG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_MOVQ_ABS_XREG(codeblock_t *block, void *p, int src_reg);
-void host_x86_MOVQ_ABS_REG_REG_SHIFT_XREG(codeblock_t *block, uint32_t addr, int src_reg_a, int src_reg_b, int shift, int src_reg);
-void host_x86_MOVQ_BASE_INDEX_XREG(codeblock_t *block, int base_reg, int idx_reg, int src_reg);
-void host_x86_MOVQ_BASE_OFFSET_XREG(codeblock_t *block, int base_reg, int offset, int src_reg);
-void host_x86_MOVQ_XREG_ABS(codeblock_t *block, int dst_reg, void *p);
-void host_x86_MOVQ_XREG_ABS_REG_REG_SHIFT(codeblock_t *block, int dst_reg, uint32_t addr, int src_reg_a, int src_reg_b, int shift);
-void host_x86_MOVQ_XREG_BASE_INDEX(codeblock_t *block, int dst_reg, int base_reg, int idx_reg);
-void host_x86_MOVQ_XREG_BASE_OFFSET(codeblock_t *block, int dst_reg, int base_reg, int offset);
-
-void host_x86_MOVQ_REG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MOVQ_XREG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MOVQ_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_MAXPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MINPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_MULPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MULSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MULSS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_PACKSSWB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PACKSSDW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PACKUSWB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_PADDB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PADDW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PADDD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PADDSB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PADDSW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PADDUSB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PADDUSW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_PAND_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PANDN_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_POR_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PXOR_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_PCMPEQB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PCMPEQW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PCMPEQD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PCMPGTB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PCMPGTW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PCMPGTD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_PMADDWD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PMULHW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PMULLW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_PSLLW_XREG_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_PSLLD_XREG_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_PSLLQ_XREG_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_PSRAW_XREG_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_PSRAD_XREG_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_PSRAQ_XREG_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_PSRLW_XREG_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_PSRLD_XREG_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_PSRLQ_XREG_IMM(codeblock_t *block, int dst_reg, int shift);
-
-void host_x86_PSUBB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PSUBW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PSUBD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PSUBSB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PSUBSW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PSUBUSB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PSUBUSW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_PUNPCKHBW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PUNPCKHWD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PUNPCKHDQ_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PUNPCKLBW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PUNPCKLWD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PUNPCKLDQ_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_SQRTSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_SQRTSS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_SUBPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_SUBSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_UNPCKLPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
diff --git a/src/codegen_backend_x86-64_uops.c b/src/codegen_backend_x86-64_uops.c
deleted file mode 100644
index b2ca7dc..0000000
--- a/src/codegen_backend_x86-64_uops.c
+++ /dev/null
@@ -1,3161 +0,0 @@
-#ifdef __amd64__
-
-#include "ibm.h"
-#include "x86.h"
-#include "x87.h"
-#include "386_common.h"
-#include "codegen.h"
-#include "codegen_backend.h"
-#include "codegen_backend_x86-64_defs.h"
-#include "codegen_backend_x86-64_ops.h"
-#include "codegen_backend_x86-64_ops_sse.h"
-#include "codegen_ir_defs.h"
-
-#define STACK_ARG0 (0)
-#define STACK_ARG1 (4)
-#define STACK_ARG2 (8)
-#define STACK_ARG3 (12)
-
-#define HOST_REG_GET(reg) ((IREG_GET_SIZE(reg) == IREG_SIZE_BH) ? (IREG_GET_REG((reg) & 3) | 4) : (IREG_GET_REG(reg) & 7))
-
-#define REG_IS_L(size) (size == IREG_SIZE_L)
-#define REG_IS_W(size) (size == IREG_SIZE_W)
-#define REG_IS_B(size) (size == IREG_SIZE_B || size == IREG_SIZE_BH)
-#define REG_IS_BH(size) (size == IREG_SIZE_BH)
-#define REG_IS_D(size) (size == IREG_SIZE_D)
-#define REG_IS_Q(size) (size == IREG_SIZE_Q)
-
-static int codegen_ADD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- if (dest_reg != src_reg_a)
- host_x86_LEA_REG_REG(block, dest_reg, src_reg_a, src_reg_b);
- else
- host_x86_ADD32_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- if (dest_reg != src_reg_a)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg_a);
- host_x86_ADD16_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- if (dest_reg != src_reg_a)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg_a);
- host_x86_ADD8_REG_REG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("ADD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_ADD_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (dest_reg != src_reg)
- host_x86_LEA_REG_IMM(block, dest_reg, src_reg, uop->imm_data);
- else
- host_x86_ADD32_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (dest_reg != src_reg)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_ADD16_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (dest_reg != src_reg)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_ADD8_REG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("ADD_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_ADD_LSHIFT(codeblock_t *block, uop_t *uop)
-{
- if (!uop->imm_data)
- {
- if (uop->dest_reg_a_real == uop->src_reg_a_real)
- host_x86_ADD32_REG_REG(block, uop->dest_reg_a_real, uop->src_reg_b_real);
- else
- host_x86_LEA_REG_REG(block, uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
- }
- else if (uop->imm_data < 4)
- host_x86_LEA_REG_REG_SHIFT(block, uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real, uop->imm_data);
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_ADD_LSHIFT - shift out of range %i\n", uop->imm_data);
-#endif
- return 0;
-}
-
-static int codegen_AND(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PAND_XREG_XREG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- if (dest_reg != src_reg_a)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg_a);
- host_x86_AND32_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- if (dest_reg != src_reg_a)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg_a);
- host_x86_AND16_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- if (dest_reg != src_reg_a)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg_a);
- host_x86_AND8_REG_REG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("AND %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_AND_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (dest_reg != src_reg)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_AND32_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (dest_reg != src_reg)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_AND16_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (dest_reg != src_reg)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_AND8_REG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("AND_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_ANDN(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), /*src_reg_a = HOST_REG_GET(uop->src_reg_a_real), */src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PANDN_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("ANDN %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_CALL_FUNC(codeblock_t *block, uop_t *uop)
-{
- host_x86_CALL(block, uop->p);
-
- return 0;
-}
-
-static int codegen_CALL_FUNC_RESULT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
-
-#ifdef RECOMPILER_DEBUG
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
- if (!REG_IS_L(dest_size))
- fatal("CALL_FUNC_RESULT %02x\n", uop->dest_reg_a_real);
-#endif
- host_x86_CALL(block, uop->p);
- host_x86_MOV32_REG_REG(block, dest_reg, REG_EAX);
-
- return 0;
-}
-
-static int codegen_CALL_INSTRUCTION_FUNC(codeblock_t *block, uop_t *uop)
-{
- host_x86_CALL(block, uop->p);
- host_x86_TEST32_REG(block, REG_EAX, REG_EAX);
- host_x86_JNZ(block, codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_CMP_IMM_JZ(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_x86_CMP32_REG_IMM(block, src_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_IMM_JZ %02x\n", uop->src_reg_a_real);
-#endif
- host_x86_JZ(block, uop->p);
-
- return 0;
-}
-
-static int codegen_CMP_IMM_JNZ_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_x86_CMP32_REG_IMM(block, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(src_size))
- {
- host_x86_CMP16_REG_IMM(block, src_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_IMM_JNZ_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JNZ_long(block);
-
- return 0;
-}
-static int codegen_CMP_IMM_JZ_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_x86_CMP32_REG_IMM(block, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(src_size))
- {
- host_x86_CMP16_REG_IMM(block, src_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_IMM_JZ_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JZ_long(block);
-
- return 0;
-}
-
-static int codegen_CMP_JB(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
- uint32_t *jump_p;
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JB %02x\n", uop->src_reg_a_real);
-#endif
- jump_p = host_x86_JB_long(block);
- *jump_p = (uintptr_t)uop->p - ((uintptr_t)jump_p + 4);
-
- return 0;
-}
-static int codegen_CMP_JNBE(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
- uint32_t *jump_p;
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JNBE %02x\n", uop->src_reg_a_real);
-#endif
- jump_p = host_x86_JNBE_long(block);
- *jump_p = (uintptr_t)uop->p - ((uintptr_t)jump_p + 4);
-
- return 0;
-}
-
-static int codegen_CMP_JNB_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JNB_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JNB_long(block);
-
- return 0;
-}
-static int codegen_CMP_JNBE_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JNBE_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JNBE_long(block);
-
- return 0;
-}
-static int codegen_CMP_JNL_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JNL_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JNL_long(block);
-
- return 0;
-}
-static int codegen_CMP_JNLE_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JNLE_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JNLE_long(block);
-
- return 0;
-}
-static int codegen_CMP_JNO_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JNO_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JNO_long(block);
-
- return 0;
-}
-static int codegen_CMP_JNZ_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JNZ_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JNZ_long(block);
-
- return 0;
-}
-static int codegen_CMP_JB_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JB_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JB_long(block);
-
- return 0;
-}
-static int codegen_CMP_JBE_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JBE_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JBE_long(block);
-
- return 0;
-}
-static int codegen_CMP_JL_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JL_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JL_long(block);
-
- return 0;
-}
-static int codegen_CMP_JLE_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JLE_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JLE_long(block);
-
- return 0;
-}
-static int codegen_CMP_JO_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JO_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JO_long(block);
-
- return 0;
-}
-static int codegen_CMP_JZ_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JZ_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JZ_long(block);
-
- return 0;
-}
-
-static int codegen_FABS(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && dest_reg == src_reg_a)
- {
- host_x86_PXOR_XREG_XREG(block, REG_XMM_TEMP, REG_XMM_TEMP);
- host_x86_SUBSD_XREG_XREG(block, REG_XMM_TEMP, dest_reg);
- host_x86_MAXSD_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_FABS %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_FCHS(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a))
- {
- host_x86_MOVQ_XREG_XREG(block, REG_XMM_TEMP, src_reg_a);
- host_x86_PXOR_XREG_XREG(block, dest_reg, dest_reg);
- host_x86_SUBSD_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_FCHS %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_FSQRT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a))
- {
- host_x86_SQRTSD_XREG_XREG(block, dest_reg, src_reg_a);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_FSQRT %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_FTST(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_W(dest_size) && REG_IS_D(src_size_a))
- {
- host_x86_PXOR_XREG_XREG(block, REG_XMM_TEMP, REG_XMM_TEMP);
- if (dest_reg != REG_EAX)
- host_x86_MOV32_REG_REG(block, REG_ECX, REG_EAX);
- host_x86_XOR32_REG_REG(block, REG_EAX, REG_EAX);
- host_x86_COMISD_XREG_XREG(block, src_reg_a, REG_XMM_TEMP);
- host_x86_LAHF(block);
- host_x86_AND16_REG_IMM(block, REG_EAX, C0|C2|C3);
- if (dest_reg != REG_EAX)
- {
- host_x86_MOV16_REG_REG(block, dest_reg, REG_EAX);
- host_x86_MOV32_REG_REG(block, REG_EAX, REG_ECX);
- }
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_FTST %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_FADD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b) && dest_reg == src_reg_a)
- {
- host_x86_ADDSD_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_FADD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_FCOM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_W(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b))
- {
- if (dest_reg != REG_EAX)
- host_x86_MOV32_REG_REG(block, REG_ECX, REG_EAX);
- host_x86_XOR32_REG_REG(block, REG_EAX, REG_EAX);
- host_x86_COMISD_XREG_XREG(block, src_reg_a, src_reg_b);
- host_x86_LAHF(block);
- host_x86_AND16_REG_IMM(block, REG_EAX, C0|C2|C3);
- if (dest_reg != REG_EAX)
- {
- host_x86_MOV16_REG_REG(block, dest_reg, REG_EAX);
- host_x86_MOV32_REG_REG(block, REG_EAX, REG_ECX);
- }
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_FCOM %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_FDIV(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b) && dest_reg == src_reg_a)
- {
- host_x86_DIVSD_XREG_XREG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b))
- {
- host_x86_MOVQ_XREG_XREG(block, REG_XMM_TEMP, src_reg_a);
- host_x86_DIVSD_XREG_XREG(block, REG_XMM_TEMP, src_reg_b);
- host_x86_MOVQ_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_FDIV %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_FMUL(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b) && dest_reg == src_reg_a)
- {
- host_x86_MULSD_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_FMUL %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_FSUB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b) && dest_reg == src_reg_a)
- {
- host_x86_SUBSD_XREG_XREG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b))
- {
- host_x86_MOVQ_XREG_XREG(block, REG_XMM_TEMP, src_reg_a);
- host_x86_SUBSD_XREG_XREG(block, REG_XMM_TEMP, src_reg_b);
- host_x86_MOVQ_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_FSUB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_FP_ENTER(codeblock_t *block, uop_t *uop)
-{
- uint32_t *branch_offset;
-
- host_x86_MOV32_REG_ABS(block, REG_ECX, &cr0);
- host_x86_TEST32_REG_IMM(block, REG_ECX, 0xc);
- branch_offset = host_x86_JZ_long(block);
- host_x86_MOV32_ABS_IMM(block, &cpu_state.oldpc, uop->imm_data);
-#if WIN64
- host_x86_MOV32_REG_IMM(block, REG_ECX, 7);
-#else
- host_x86_MOV32_REG_IMM(block, REG_EDI, 7);
-#endif
- host_x86_CALL(block, x86_int);
- host_x86_JMP(block, codegen_exit_rout);
- *branch_offset = (uint32_t)((uintptr_t)&block_write_data[block_pos] - (uintptr_t)branch_offset) - 4;
-
- return 0;
-}
-static int codegen_MMX_ENTER(codeblock_t *block, uop_t *uop)
-{
- uint32_t *branch_offset;
-
- host_x86_MOV32_REG_ABS(block, REG_ECX, &cr0);
- host_x86_TEST32_REG_IMM(block, REG_ECX, 0xc);
- branch_offset = host_x86_JZ_long(block);
- host_x86_MOV32_ABS_IMM(block, &cpu_state.oldpc, uop->imm_data);
-#if WIN64
- host_x86_MOV32_REG_IMM(block, REG_ECX, 7);
-#else
- host_x86_MOV32_REG_IMM(block, REG_EDI, 7);
-#endif
- host_x86_CALL(block, x86_int);
- host_x86_JMP(block, codegen_exit_rout);
- *branch_offset = (uint32_t)((uintptr_t)&block_write_data[block_pos] - (uintptr_t)branch_offset) - 4;
- host_x86_MOV32_ABS_IMM(block, &cpu_state.tag[0], 0x01010101);
- host_x86_MOV32_ABS_IMM(block, &cpu_state.tag[4], 0x01010101);
- host_x86_MOV32_ABS_IMM(block, &cpu_state.TOP, 0);
- host_x86_MOV8_ABS_IMM(block, &cpu_state.ismmx, 1);
-
- return 0;
-}
-
-static int codegen_JMP(codeblock_t *block, uop_t *uop)
-{
- host_x86_JMP(block, uop->p);
-
- return 0;
-}
-
-static int codegen_LOAD_FUNC_ARG0(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_W(src_size))
- {
-#if WIN64
- host_x86_MOVZX_REG_32_16(block, REG_ECX, src_reg);
-#else
- host_x86_MOVZX_REG_32_16(block, REG_EDI, src_reg);
-#endif
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_LOAD_FUNC_ARG0 %02x\n", uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG1(codeblock_t *block, uop_t *uop)
-{
-#ifdef RECOMPILER_DEBUG
- fatal("codegen_LOAD_FUNC_ARG1 %02x\n", uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG2(codeblock_t *block, uop_t *uop)
-{
-#ifdef RECOMPILER_DEBUG
- fatal("codegen_LOAD_FUNC_ARG2 %02x\n", uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG3(codeblock_t *block, uop_t *uop)
-{
-#ifdef RECOMPILER_DEBUG
- fatal("codegen_LOAD_FUNC_ARG3 %02x\n", uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_LOAD_FUNC_ARG0_IMM(codeblock_t *block, uop_t *uop)
-{
-#if WIN64
- host_x86_MOV32_REG_IMM(block, REG_ECX, uop->imm_data);
-#else
- host_x86_MOV32_REG_IMM(block, REG_EDI, uop->imm_data);
-#endif
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG1_IMM(codeblock_t *block, uop_t *uop)
-{
-#if WIN64
- host_x86_MOV32_REG_IMM(block, REG_EDX, uop->imm_data);
-#else
- host_x86_MOV32_REG_IMM(block, REG_ESI, uop->imm_data);
-#endif
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG2_IMM(codeblock_t *block, uop_t *uop)
-{
-#ifdef RECOMPILER_DEBUG
- fatal("codegen_LOAD_FUNC_ARG2_IMM\n");
-#endif
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG3_IMM(codeblock_t *block, uop_t *uop)
-{
-#ifdef RECOMPILER_DEBUG
- fatal("codegen_LOAD_FUNC_ARG3_IMM\n");
-#endif
- return 0;
-}
-
-static int codegen_LOAD_SEG(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
-
-#ifdef RECOMPILER_DEBUG
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
- if (!REG_IS_W(src_size))
- fatal("LOAD_SEG %02x %p\n", uop->src_reg_a_real, uop->p);
-#endif
-#if WIN64
- host_x86_MOV16_REG_REG(block, REG_CX, src_reg);
- host_x86_MOV64_REG_IMM(block, REG_EDX, (uint64_t)uop->p);
-#else
- host_x86_MOV16_REG_REG(block, REG_DI, src_reg);
- host_x86_MOV64_REG_IMM(block, REG_ESI, (uint64_t)uop->p);
-#endif
- host_x86_CALL(block, (void *)loadseg);
- host_x86_TEST32_REG(block, REG_EAX, REG_EAX);
- host_x86_JNZ(block, codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_MEM_LOAD_ABS(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), seg_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- host_x86_LEA_REG_IMM(block, REG_ESI, seg_reg, uop->imm_data);
- if (REG_IS_B(dest_size))
- {
- host_x86_CALL(block, codegen_mem_load_byte);
- }
- else if (REG_IS_W(dest_size))
- {
- host_x86_CALL(block, codegen_mem_load_word);
- }
- else if (REG_IS_L(dest_size))
- {
- host_x86_CALL(block, codegen_mem_load_long);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MEM_LOAD_ABS - %02x\n", uop->dest_reg_a_real);
-#endif
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
- if (REG_IS_B(dest_size))
- {
- host_x86_MOV8_REG_REG(block, dest_reg, REG_ECX);
- }
- else if (REG_IS_W(dest_size))
- {
- host_x86_MOV16_REG_REG(block, dest_reg, REG_ECX);
- }
- else if (REG_IS_L(dest_size))
- {
- host_x86_MOV32_REG_REG(block, dest_reg, REG_ECX);
- }
-
- return 0;
-}
-static int codegen_MEM_LOAD_REG(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- host_x86_LEA_REG_REG(block, REG_ESI, seg_reg, addr_reg);
- if (uop->imm_data)
- host_x86_ADD32_REG_IMM(block, REG_ESI, uop->imm_data);
- if (REG_IS_B(dest_size))
- {
- host_x86_CALL(block, codegen_mem_load_byte);
- }
- else if (REG_IS_W(dest_size))
- {
- host_x86_CALL(block, codegen_mem_load_word);
- }
- else if (REG_IS_L(dest_size))
- {
- host_x86_CALL(block, codegen_mem_load_long);
- }
- else if (REG_IS_Q(dest_size))
- {
- host_x86_CALL(block, codegen_mem_load_quad);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MEM_LOAD_REG - %02x\n", uop->dest_reg_a_real);
-#endif
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
- if (REG_IS_B(dest_size))
- {
- host_x86_MOV8_REG_REG(block, dest_reg, REG_ECX);
- }
- else if (REG_IS_W(dest_size))
- {
- host_x86_MOV16_REG_REG(block, dest_reg, REG_ECX);
- }
- else if (REG_IS_L(dest_size))
- {
- host_x86_MOV32_REG_REG(block, dest_reg, REG_ECX);
- }
- else if (REG_IS_Q(dest_size))
- {
- host_x86_MOVQ_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
- }
-
- return 0;
-}
-static int codegen_MEM_LOAD_SINGLE(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
-
-#ifdef RECOMPILER_DEBUG
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
- if (!REG_IS_D(dest_size))
- fatal("MEM_LOAD_SINGLE - %02x\n", uop->dest_reg_a_real);
-#endif
- host_x86_LEA_REG_REG(block, REG_ESI, seg_reg, addr_reg);
- if (uop->imm_data)
- host_x86_ADD32_REG_IMM(block, REG_ESI, uop->imm_data);
- host_x86_CALL(block, codegen_mem_load_single);
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
- host_x86_MOVQ_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
-
- return 0;
-}
-static int codegen_MEM_LOAD_DOUBLE(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
-
-#ifdef RECOMPILER_DEBUG
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
- if (!REG_IS_D(dest_size))
- fatal("MEM_LOAD_DOUBLE - %02x\n", uop->dest_reg_a_real);
-#endif
- host_x86_LEA_REG_REG(block, REG_ESI, seg_reg, addr_reg);
- if (uop->imm_data)
- host_x86_ADD32_REG_IMM(block, REG_ESI, uop->imm_data);
- host_x86_CALL(block, codegen_mem_load_double);
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
- host_x86_MOVQ_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
-
- return 0;
-}
-
-static int codegen_MEM_STORE_ABS(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_b_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_b_real);
-
- host_x86_LEA_REG_IMM(block, REG_ESI, seg_reg, uop->imm_data);
- if (REG_IS_B(src_size))
- {
- host_x86_MOV8_REG_REG(block, REG_ECX, src_reg);
- host_x86_CALL(block, codegen_mem_store_byte);
- }
- else if (REG_IS_W(src_size))
- {
- host_x86_MOV16_REG_REG(block, REG_ECX, src_reg);
- host_x86_CALL(block, codegen_mem_store_word);
- }
- else if (REG_IS_L(src_size))
- {
- host_x86_MOV32_REG_REG(block, REG_ECX, src_reg);
- host_x86_CALL(block, codegen_mem_store_long);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MEM_STORE_ABS - %02x\n", uop->src_reg_b_real);
-#endif
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_MEM_STORE_IMM_8(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
-
- host_x86_LEA_REG_REG(block, REG_ESI, seg_reg, addr_reg);
- host_x86_MOV8_REG_IMM(block, REG_ECX, uop->imm_data);
- host_x86_CALL(block, codegen_mem_store_byte);
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
-
- return 0;
-}
-static int codegen_MEM_STORE_IMM_16(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
-
- host_x86_LEA_REG_REG(block, REG_ESI, seg_reg, addr_reg);
- host_x86_MOV16_REG_IMM(block, REG_ECX, uop->imm_data);
- host_x86_CALL(block, codegen_mem_store_word);
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
-
- return 0;
-}
-static int codegen_MEM_STORE_IMM_32(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
-
- host_x86_LEA_REG_REG(block, REG_ESI, seg_reg, addr_reg);
- host_x86_MOV32_REG_IMM(block, REG_ECX, uop->imm_data);
- host_x86_CALL(block, codegen_mem_store_long);
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_MEM_STORE_REG(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real), src_reg = HOST_REG_GET(uop->src_reg_c_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_c_real);
-
- host_x86_LEA_REG_REG(block, REG_ESI, seg_reg, addr_reg);
- if (uop->imm_data)
- host_x86_ADD32_REG_IMM(block, REG_ESI, uop->imm_data);
- if (REG_IS_B(src_size))
- {
- host_x86_MOV8_REG_REG(block, REG_ECX, src_reg);
- host_x86_CALL(block, codegen_mem_store_byte);
- }
- else if (REG_IS_W(src_size))
- {
- host_x86_MOV16_REG_REG(block, REG_ECX, src_reg);
- host_x86_CALL(block, codegen_mem_store_word);
- }
- else if (REG_IS_L(src_size))
- {
- host_x86_MOV32_REG_REG(block, REG_ECX, src_reg);
- host_x86_CALL(block, codegen_mem_store_long);
- }
- else if (REG_IS_Q(src_size))
- {
- host_x86_MOVQ_XREG_XREG(block, REG_XMM_TEMP, src_reg);
- host_x86_CALL(block, codegen_mem_store_quad);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MEM_STORE_REG - %02x\n", uop->src_reg_b_real);
-#endif
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_MEM_STORE_SINGLE(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real), src_reg = HOST_REG_GET(uop->src_reg_c_real);
-
-#ifdef RECOMPILER_DEBUG
- int src_size = IREG_GET_SIZE(uop->src_reg_c_real);
- if (!REG_IS_D(src_size))
- fatal("MEM_STORE_SINGLE - %02x\n", uop->src_reg_b_real);
-#endif
- host_x86_LEA_REG_REG(block, REG_ESI, seg_reg, addr_reg);
- if (uop->imm_data)
- host_x86_ADD32_REG_IMM(block, REG_ESI, uop->imm_data);
- host_x86_CVTSD2SS_XREG_XREG(block, REG_XMM_TEMP, src_reg);
- host_x86_CALL(block, codegen_mem_store_single);
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
-
- return 0;
-}
-static int codegen_MEM_STORE_DOUBLE(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real), src_reg = HOST_REG_GET(uop->src_reg_c_real);
-
-#ifdef RECOMPILER_DEBUG
- int src_size = IREG_GET_SIZE(uop->src_reg_c_real);
- if (!REG_IS_D(src_size))
- fatal("MEM_STORE_DOUBLE - %02x\n", uop->src_reg_b_real);
-#endif
- host_x86_LEA_REG_REG(block, REG_ESI, seg_reg, addr_reg);
- if (uop->imm_data)
- host_x86_ADD32_REG_IMM(block, REG_ESI, uop->imm_data);
- host_x86_MOVQ_XREG_XREG(block, REG_XMM_TEMP, src_reg);
- host_x86_CALL(block, codegen_mem_store_double);
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_MOV(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- }
- else if (REG_IS_D(dest_size) && REG_IS_D(src_size))
- {
- host_x86_MOVQ_XREG_XREG(block, dest_reg, src_reg);
- }
- else if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- host_x86_MOVQ_XREG_XREG(block, dest_reg, src_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MOV %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_MOV_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_L(dest_size))
- {
- host_x86_MOV32_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size))
- {
- host_x86_MOV16_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size))
- {
- host_x86_MOV8_REG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MOV_IMM %02x\n", uop->dest_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_MOV_PTR(codeblock_t *block, uop_t *uop)
-{
- host_x86_MOV64_REG_IMM(block, uop->dest_reg_a_real, (uint64_t)uop->p);
- return 0;
-}
-static int codegen_MOV_REG_PTR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_L(dest_size))
- {
- host_x86_MOV32_REG_ABS(block, dest_reg, uop->p);
- }
- else
- fatal("MOV_REG_PTR %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-static int codegen_MOVZX_REG_PTR_8(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_L(dest_size))
- {
- host_x86_MOVZX_REG_ABS_32_8(block, dest_reg, uop->p);
- }
- else if (REG_IS_W(dest_size))
- {
- host_x86_MOVZX_REG_ABS_16_8(block, dest_reg, uop->p);
- }
- else if (REG_IS_B(dest_size))
- {
- host_x86_MOV8_REG_ABS(block, dest_reg, uop->p);
- }
- else
- fatal("MOVZX_REG_PTR_8 %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-static int codegen_MOVZX_REG_PTR_16(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_L(dest_size))
- {
- host_x86_MOVZX_REG_ABS_32_16(block, dest_reg, uop->p);
- }
- else if (REG_IS_W(dest_size))
- {
- host_x86_MOV16_REG_ABS(block, dest_reg, uop->p);
- }
- else
- fatal("MOVZX_REG_PTR_16 %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-static int codegen_MOVSX(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_W(src_size))
- {
- host_x86_MOVSX_REG_32_16(block, dest_reg, src_reg);
- }
- else if (REG_IS_L(dest_size) && REG_IS_B(src_size))
- {
- host_x86_MOVSX_REG_32_8(block, dest_reg, src_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_B(src_size))
- {
- host_x86_MOVSX_REG_16_8(block, dest_reg, src_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MOVSX %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_MOVZX(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_L(src_size))
- {
- host_x86_MOVD_XREG_REG(block, dest_reg, src_reg);
- }
- else if (REG_IS_L(dest_size) && REG_IS_Q(src_size))
- {
- host_x86_MOVD_REG_XREG(block, dest_reg, src_reg);
- }
- else if (REG_IS_L(dest_size) && REG_IS_W(src_size))
- {
- host_x86_MOVZX_REG_32_16(block, dest_reg, src_reg);
- }
- else if (REG_IS_L(dest_size) && REG_IS_B(src_size))
- {
- host_x86_MOVZX_REG_32_8(block, dest_reg, src_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_B(src_size))
- {
- host_x86_MOVZX_REG_16_8(block, dest_reg, src_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MOVZX %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_MOV_DOUBLE_INT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_D(dest_size) && REG_IS_L(src_size))
- {
- host_x86_CVTSI2SD_XREG_REG(block, dest_reg, src_reg);
- }
- else if (REG_IS_D(dest_size) && REG_IS_W(src_size))
- {
- host_x86_MOVSX_REG_32_16(block, REG_ECX, src_reg);
- host_x86_CVTSI2SD_XREG_REG(block, dest_reg, REG_ECX);
- }
- else if (REG_IS_D(dest_size) && REG_IS_Q(src_size))
- {
- host_x86_MOVQ_REG_XREG(block, REG_RCX, src_reg);
- host_x86_CVTSI2SD_XREG_REG64(block, dest_reg, REG_RCX);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MOV_DOUBLE_INT %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_MOV_INT_DOUBLE(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_D(src_size))
- {
- host_x86_LDMXCSR(block, &cpu_state.new_fp_control);
- host_x86_CVTSD2SI_REG_XREG(block, dest_reg, src_reg);
- host_x86_LDMXCSR(block, &cpu_state.old_fp_control);
- }
- else if (REG_IS_W(dest_size) && REG_IS_D(src_size))
- {
- host_x86_LDMXCSR(block, &cpu_state.new_fp_control);
- host_x86_CVTSD2SI_REG_XREG(block, REG_ECX, src_reg);
- host_x86_MOV16_REG_REG(block, dest_reg, REG_ECX);
- host_x86_LDMXCSR(block, &cpu_state.old_fp_control);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MOV_INT_DOUBLE %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_MOV_INT_DOUBLE_64(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), src_64_reg = HOST_REG_GET(uop->src_reg_b_real), tag_reg = HOST_REG_GET(uop->src_reg_c_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real), src_64_size = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_D(src_size) && REG_IS_Q(src_64_size))
- {
- uint32_t *branch_offset;
-
- /*If TAG_UINT64 is set then the source is MM[]. Otherwise it is a double in ST()*/
- host_x86_MOVQ_XREG_XREG(block, dest_reg, src_64_reg);
- host_x86_TEST8_REG(block, tag_reg, tag_reg);
- branch_offset = host_x86_JS_long(block);
-
- host_x86_LDMXCSR(block, &cpu_state.new_fp_control);
- host_x86_CVTSD2SI_REG64_XREG(block, REG_RCX, src_reg);
- host_x86_LDMXCSR(block, &cpu_state.old_fp_control);
- host_x86_MOVQ_XREG_REG(block, dest_reg, REG_RCX);
-
- *branch_offset = (uint32_t)((uintptr_t)&block_write_data[block_pos] - (uintptr_t)branch_offset) - 4;
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MOV_INT_DOUBLE_64 %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_NOP(codeblock_t *block, uop_t *uop)
-{
- return 0;
-}
-
-static int codegen_OR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_POR_XREG_XREG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- if (dest_reg != src_reg_a)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg_a);
- host_x86_OR32_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- if (dest_reg != src_reg_a)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg_a);
- host_x86_OR16_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- if (dest_reg != src_reg_a)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg_a);
- host_x86_OR8_REG_REG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("OR %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_OR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_x86_OR32_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_x86_OR16_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_x86_OR8_REG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("OR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_PACKSSWB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PACKSSWB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PACKSSWB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PACKSSDW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PACKSSDW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PACKSSDW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PACKUSWB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PACKUSWB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PACKUSWB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_PADDB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PADDB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PADDB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PADDW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PADDW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PADDW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PADDD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PADDD_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PADDD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PADDSB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PADDSB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PADDSB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PADDSW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PADDSW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PADDSW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PADDUSB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PADDUSB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PADDUSB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PADDUSW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PADDUSW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PADDUSW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_PCMPEQB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PCMPEQB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PCMPEQB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PCMPEQW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PCMPEQW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PCMPEQW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PCMPEQD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PCMPEQD_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PCMPEQD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PCMPGTB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PCMPGTB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PCMPGTB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PCMPGTW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PCMPGTW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PCMPGTW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PCMPGTD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PCMPGTD_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PCMPGTD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_PF2ID(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a))
- {
- host_x86_LDMXCSR(block, &cpu_state.trunc_fp_control);
- host_x86_CVTPS2DQ_XREG_XREG(block, dest_reg, src_reg_a);
- host_x86_LDMXCSR(block, &cpu_state.old_fp_control);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PF2ID %02x %02x\n", uop->dest_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PFADD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_ADDPS_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFADD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PFCMPEQ(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_CMPPS_XREG_XREG(block, dest_reg, src_reg_b, CMPPS_EQ);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFCMPEQ %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PFCMPGE(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_CMPPS_XREG_XREG(block, dest_reg, src_reg_b, CMPPS_NLT);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFCMPGE %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PFCMPGT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_CMPPS_XREG_XREG(block, dest_reg, src_reg_b, CMPPS_NLE);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFCMPGT %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PFMAX(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_MAXPS_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFMAX %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PFMIN(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_MINPS_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFMIN %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PFMUL(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_MULPS_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFMUL %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PFRCP(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a))
- {
- /*TODO: This could be improved (use RCPSS + iteration)*/
- host_x86_MOV32_REG_IMM(block, REG_ECX, 1);
- host_x86_MOVQ_XREG_XREG(block, REG_XMM_TEMP, src_reg_a);
- host_x86_CVTSI2SS_XREG_REG(block, dest_reg, REG_ECX);
- host_x86_DIVSS_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
- host_x86_UNPCKLPS_XREG_XREG(block, dest_reg, dest_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFRCP %02x %02x\n", uop->dest_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PFRSQRT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a))
- {
- /*TODO: This could be improved (use RSQRTSS + iteration)*/
- host_x86_SQRTSS_XREG_XREG(block, REG_XMM_TEMP, src_reg_a);
- host_x86_MOV32_REG_IMM(block, REG_ECX, 1);
- host_x86_CVTSI2SS_XREG_REG(block, dest_reg, REG_ECX);
- host_x86_DIVSS_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
- host_x86_UNPCKLPS_XREG_XREG(block, dest_reg, dest_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFRSQRT %02x %02x\n", uop->dest_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PFSUB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_SUBPS_XREG_XREG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_x86_MOVQ_XREG_XREG(block, REG_XMM_TEMP, src_reg_a);
- host_x86_SUBPS_XREG_XREG(block, REG_XMM_TEMP, src_reg_b);
- host_x86_MOVQ_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFSUB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PI2FD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a))
- {
- host_x86_CVTDQ2PS_XREG_XREG(block, dest_reg, src_reg_a);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PI2FD %02x %02x\n", uop->dest_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_PMADDWD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PMADDWD_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PMULHW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PMULHW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PMULHW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PMULHW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PMULLW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PMULLW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PMULLW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_PSLLW_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_Q(dest_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSLLW_XREG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSLLW_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PSLLD_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_Q(dest_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSLLD_XREG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSLLD_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PSLLQ_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_Q(dest_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSLLQ_XREG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSLLQ_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PSRAW_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_Q(dest_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSRAW_XREG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSRAW_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PSRAD_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_Q(dest_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSRAD_XREG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSRAD_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PSRAQ_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_Q(dest_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSRAQ_XREG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSRAQ_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PSRLW_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_Q(dest_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSRLW_XREG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSRLW_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PSRLD_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_Q(dest_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSRLD_XREG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSRLD_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PSRLQ_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_Q(dest_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSRLQ_XREG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSRLQ_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_PSUBB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSUBB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSUBB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PSUBW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSUBW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSUBW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PSUBD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSUBD_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSUBD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PSUBSB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSUBSB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSUBSB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PSUBSW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSUBSW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSUBSW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PSUBUSB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSUBUSB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSUBUSB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PSUBUSW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSUBUSW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSUBUSW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_PUNPCKHBW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PUNPCKHBW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PUNPCKHBW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PUNPCKHWD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PUNPCKHWD_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PUNPCKHWD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PUNPCKHDQ(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PUNPCKHDQ_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PUNPCKHDQ %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PUNPCKLBW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PUNPCKLBW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PUNPCKLBW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PUNPCKLWD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PUNPCKLWD_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PUNPCKLWD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PUNPCKLDQ(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PUNPCKLDQ_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PUNPCKLDQ %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_ROL(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- host_x86_MOV32_REG_REG(block, REG_ECX, shift_reg);
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_ROL32_CL(block, dest_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_ROL16_CL(block, dest_reg);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_ROL8_CL(block, dest_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("ROL %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_ROL_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_ROL32_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_ROL16_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_ROL8_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("ROL_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_ROR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- host_x86_MOV32_REG_REG(block, REG_ECX, shift_reg);
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_ROR32_CL(block, dest_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_ROR16_CL(block, dest_reg);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_ROR8_CL(block, dest_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("ROR %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_ROR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_ROR32_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_ROR16_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_ROR8_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("ROR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_SAR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- host_x86_MOV32_REG_REG(block, REG_ECX, shift_reg);
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_SAR32_CL(block, dest_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_SAR16_CL(block, dest_reg);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_SAR8_CL(block, dest_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("SAR %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_SAR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_SAR32_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_SAR16_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_SAR8_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("SAR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_SHL(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- host_x86_MOV32_REG_REG(block, REG_ECX, shift_reg);
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_SHL32_CL(block, dest_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_SHL16_CL(block, dest_reg);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_SHL8_CL(block, dest_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("SHL %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_SHL_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_SHL32_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_SHL16_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_SHL8_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("SHL_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_SHR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- host_x86_MOV32_REG_REG(block, REG_ECX, shift_reg);
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_SHR32_CL(block, dest_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_SHR16_CL(block, dest_reg);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_SHR8_CL(block, dest_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("SHR %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_SHR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_SHR32_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_SHR16_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_SHR8_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("SHR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_STORE_PTR_IMM(codeblock_t *block, uop_t *uop)
-{
-#ifdef RECOMPILER_DEBUG
- if (((uintptr_t)uop->p) >> 32)
- fatal("STORE_PTR_IMM 64-bit addr\n");
-#endif
- host_x86_MOV32_ABS_IMM(block, uop->p, uop->imm_data);
- return 0;
-}
-static int codegen_STORE_PTR_IMM_8(codeblock_t *block, uop_t *uop)
-{
-#ifdef RECOMPILER_DEBUG
- if (((uintptr_t)uop->p) >> 32)
- fatal("STORE_PTR_IMM_8 64-bit addr\n");
-#endif
- host_x86_MOV8_ABS_IMM(block, uop->p, uop->imm_data);
- return 0;
-}
-
-static int codegen_SUB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- if (dest_reg != src_reg_a)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg_a);
- host_x86_SUB32_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- if (dest_reg != src_reg_a)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg_a);
- host_x86_SUB16_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- if (dest_reg != src_reg_a)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg_a);
- host_x86_SUB8_REG_REG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("SUB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_SUB_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (dest_reg != src_reg)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_SUB32_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (dest_reg != src_reg)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_SUB16_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (dest_reg != src_reg)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_SUB8_REG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("SUB_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_TEST_JNS_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_x86_TEST32_REG(block, src_reg, src_reg);
- }
- else if (REG_IS_W(src_size))
- {
- host_x86_TEST16_REG(block, src_reg, src_reg);
- }
- else if (REG_IS_B(src_size))
- {
- host_x86_TEST8_REG(block, src_reg, src_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("TEST_JNS_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JNS_long(block);
-
- return 0;
-}
-static int codegen_TEST_JS_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_x86_TEST32_REG(block, src_reg, src_reg);
- }
- else if (REG_IS_W(src_size))
- {
- host_x86_TEST16_REG(block, src_reg, src_reg);
- }
- else if (REG_IS_B(src_size))
- {
- host_x86_TEST8_REG(block, src_reg, src_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("TEST_JS_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JS_long(block);
-
- return 0;
-}
-
-static int codegen_XOR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PXOR_XREG_XREG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_XOR32_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_XOR16_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_XOR8_REG_REG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("XOR %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_XOR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_x86_XOR32_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_x86_XOR16_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_x86_XOR8_REG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("XOR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-const uOpFn uop_handlers[UOP_MAX] =
-{
- [UOP_CALL_FUNC & UOP_MASK] = codegen_CALL_FUNC,
- [UOP_CALL_FUNC_RESULT & UOP_MASK] = codegen_CALL_FUNC_RESULT,
- [UOP_CALL_INSTRUCTION_FUNC & UOP_MASK] = codegen_CALL_INSTRUCTION_FUNC,
-
- [UOP_JMP & UOP_MASK] = codegen_JMP,
-
- [UOP_LOAD_SEG & UOP_MASK] = codegen_LOAD_SEG,
-
- [UOP_LOAD_FUNC_ARG_0 & UOP_MASK] = codegen_LOAD_FUNC_ARG0,
- [UOP_LOAD_FUNC_ARG_1 & UOP_MASK] = codegen_LOAD_FUNC_ARG1,
- [UOP_LOAD_FUNC_ARG_2 & UOP_MASK] = codegen_LOAD_FUNC_ARG2,
- [UOP_LOAD_FUNC_ARG_3 & UOP_MASK] = codegen_LOAD_FUNC_ARG3,
-
- [UOP_LOAD_FUNC_ARG_0_IMM & UOP_MASK] = codegen_LOAD_FUNC_ARG0_IMM,
- [UOP_LOAD_FUNC_ARG_1_IMM & UOP_MASK] = codegen_LOAD_FUNC_ARG1_IMM,
- [UOP_LOAD_FUNC_ARG_2_IMM & UOP_MASK] = codegen_LOAD_FUNC_ARG2_IMM,
- [UOP_LOAD_FUNC_ARG_3_IMM & UOP_MASK] = codegen_LOAD_FUNC_ARG3_IMM,
-
- [UOP_STORE_P_IMM & UOP_MASK] = codegen_STORE_PTR_IMM,
- [UOP_STORE_P_IMM_8 & UOP_MASK] = codegen_STORE_PTR_IMM_8,
-
- [UOP_MEM_LOAD_ABS & UOP_MASK] = codegen_MEM_LOAD_ABS,
- [UOP_MEM_LOAD_REG & UOP_MASK] = codegen_MEM_LOAD_REG,
- [UOP_MEM_LOAD_SINGLE & UOP_MASK] = codegen_MEM_LOAD_SINGLE,
- [UOP_MEM_LOAD_DOUBLE & UOP_MASK] = codegen_MEM_LOAD_DOUBLE,
-
- [UOP_MEM_STORE_ABS & UOP_MASK] = codegen_MEM_STORE_ABS,
- [UOP_MEM_STORE_REG & UOP_MASK] = codegen_MEM_STORE_REG,
- [UOP_MEM_STORE_IMM_8 & UOP_MASK] = codegen_MEM_STORE_IMM_8,
- [UOP_MEM_STORE_IMM_16 & UOP_MASK] = codegen_MEM_STORE_IMM_16,
- [UOP_MEM_STORE_IMM_32 & UOP_MASK] = codegen_MEM_STORE_IMM_32,
- [UOP_MEM_STORE_SINGLE & UOP_MASK] = codegen_MEM_STORE_SINGLE,
- [UOP_MEM_STORE_DOUBLE & UOP_MASK] = codegen_MEM_STORE_DOUBLE,
-
- [UOP_MOV & UOP_MASK] = codegen_MOV,
- [UOP_MOV_PTR & UOP_MASK] = codegen_MOV_PTR,
- [UOP_MOV_IMM & UOP_MASK] = codegen_MOV_IMM,
- [UOP_MOVSX & UOP_MASK] = codegen_MOVSX,
- [UOP_MOVZX & UOP_MASK] = codegen_MOVZX,
- [UOP_MOV_DOUBLE_INT & UOP_MASK] = codegen_MOV_DOUBLE_INT,
- [UOP_MOV_INT_DOUBLE & UOP_MASK] = codegen_MOV_INT_DOUBLE,
- [UOP_MOV_INT_DOUBLE_64 & UOP_MASK] = codegen_MOV_INT_DOUBLE_64,
- [UOP_MOV_REG_PTR & UOP_MASK] = codegen_MOV_REG_PTR,
- [UOP_MOVZX_REG_PTR_8 & UOP_MASK] = codegen_MOVZX_REG_PTR_8,
- [UOP_MOVZX_REG_PTR_16 & UOP_MASK] = codegen_MOVZX_REG_PTR_16,
-
- [UOP_ADD & UOP_MASK] = codegen_ADD,
- [UOP_ADD_IMM & UOP_MASK] = codegen_ADD_IMM,
- [UOP_ADD_LSHIFT & UOP_MASK] = codegen_ADD_LSHIFT,
- [UOP_AND & UOP_MASK] = codegen_AND,
- [UOP_ANDN & UOP_MASK] = codegen_ANDN,
- [UOP_AND_IMM & UOP_MASK] = codegen_AND_IMM,
- [UOP_OR & UOP_MASK] = codegen_OR,
- [UOP_OR_IMM & UOP_MASK] = codegen_OR_IMM,
- [UOP_SUB & UOP_MASK] = codegen_SUB,
- [UOP_SUB_IMM & UOP_MASK] = codegen_SUB_IMM,
- [UOP_XOR & UOP_MASK] = codegen_XOR,
- [UOP_XOR_IMM & UOP_MASK] = codegen_XOR_IMM,
-
- [UOP_SAR & UOP_MASK] = codegen_SAR,
- [UOP_SAR_IMM & UOP_MASK] = codegen_SAR_IMM,
- [UOP_SHL & UOP_MASK] = codegen_SHL,
- [UOP_SHL_IMM & UOP_MASK] = codegen_SHL_IMM,
- [UOP_SHR & UOP_MASK] = codegen_SHR,
- [UOP_SHR_IMM & UOP_MASK] = codegen_SHR_IMM,
- [UOP_ROL & UOP_MASK] = codegen_ROL,
- [UOP_ROL_IMM & UOP_MASK] = codegen_ROL_IMM,
- [UOP_ROR & UOP_MASK] = codegen_ROR,
- [UOP_ROR_IMM & UOP_MASK] = codegen_ROR_IMM,
-
- [UOP_CMP_IMM_JZ & UOP_MASK] = codegen_CMP_IMM_JZ,
-
- [UOP_CMP_JB & UOP_MASK] = codegen_CMP_JB,
- [UOP_CMP_JNBE & UOP_MASK] = codegen_CMP_JNBE,
-
- [UOP_CMP_JNB_DEST & UOP_MASK] = codegen_CMP_JNB_DEST,
- [UOP_CMP_JNBE_DEST & UOP_MASK] = codegen_CMP_JNBE_DEST,
- [UOP_CMP_JNL_DEST & UOP_MASK] = codegen_CMP_JNL_DEST,
- [UOP_CMP_JNLE_DEST & UOP_MASK] = codegen_CMP_JNLE_DEST,
- [UOP_CMP_JNO_DEST & UOP_MASK] = codegen_CMP_JNO_DEST,
- [UOP_CMP_JNZ_DEST & UOP_MASK] = codegen_CMP_JNZ_DEST,
- [UOP_CMP_JB_DEST & UOP_MASK] = codegen_CMP_JB_DEST,
- [UOP_CMP_JBE_DEST & UOP_MASK] = codegen_CMP_JBE_DEST,
- [UOP_CMP_JL_DEST & UOP_MASK] = codegen_CMP_JL_DEST,
- [UOP_CMP_JLE_DEST & UOP_MASK] = codegen_CMP_JLE_DEST,
- [UOP_CMP_JO_DEST & UOP_MASK] = codegen_CMP_JO_DEST,
- [UOP_CMP_JZ_DEST & UOP_MASK] = codegen_CMP_JZ_DEST,
-
- [UOP_CMP_IMM_JNZ_DEST & UOP_MASK] = codegen_CMP_IMM_JNZ_DEST,
- [UOP_CMP_IMM_JZ_DEST & UOP_MASK] = codegen_CMP_IMM_JZ_DEST,
-
- [UOP_TEST_JNS_DEST & UOP_MASK] = codegen_TEST_JNS_DEST,
- [UOP_TEST_JS_DEST & UOP_MASK] = codegen_TEST_JS_DEST,
-
- [UOP_FP_ENTER & UOP_MASK] = codegen_FP_ENTER,
- [UOP_MMX_ENTER & UOP_MASK] = codegen_MMX_ENTER,
-
- [UOP_FADD & UOP_MASK] = codegen_FADD,
- [UOP_FCOM & UOP_MASK] = codegen_FCOM,
- [UOP_FDIV & UOP_MASK] = codegen_FDIV,
- [UOP_FMUL & UOP_MASK] = codegen_FMUL,
- [UOP_FSUB & UOP_MASK] = codegen_FSUB,
-
- [UOP_FABS & UOP_MASK] = codegen_FABS,
- [UOP_FCHS & UOP_MASK] = codegen_FCHS,
- [UOP_FSQRT & UOP_MASK] = codegen_FSQRT,
- [UOP_FTST & UOP_MASK] = codegen_FTST,
-
- [UOP_PACKSSWB & UOP_MASK] = codegen_PACKSSWB,
- [UOP_PACKSSDW & UOP_MASK] = codegen_PACKSSDW,
- [UOP_PACKUSWB & UOP_MASK] = codegen_PACKUSWB,
-
- [UOP_PADDB & UOP_MASK] = codegen_PADDB,
- [UOP_PADDW & UOP_MASK] = codegen_PADDW,
- [UOP_PADDD & UOP_MASK] = codegen_PADDD,
- [UOP_PADDSB & UOP_MASK] = codegen_PADDSB,
- [UOP_PADDSW & UOP_MASK] = codegen_PADDSW,
- [UOP_PADDUSB & UOP_MASK] = codegen_PADDUSB,
- [UOP_PADDUSW & UOP_MASK] = codegen_PADDUSW,
-
- [UOP_PCMPEQB & UOP_MASK] = codegen_PCMPEQB,
- [UOP_PCMPEQW & UOP_MASK] = codegen_PCMPEQW,
- [UOP_PCMPEQD & UOP_MASK] = codegen_PCMPEQD,
- [UOP_PCMPGTB & UOP_MASK] = codegen_PCMPGTB,
- [UOP_PCMPGTW & UOP_MASK] = codegen_PCMPGTW,
- [UOP_PCMPGTD & UOP_MASK] = codegen_PCMPGTD,
-
- [UOP_PF2ID & UOP_MASK] = codegen_PF2ID,
- [UOP_PFADD & UOP_MASK] = codegen_PFADD,
- [UOP_PFCMPEQ & UOP_MASK] = codegen_PFCMPEQ,
- [UOP_PFCMPGE & UOP_MASK] = codegen_PFCMPGE,
- [UOP_PFCMPGT & UOP_MASK] = codegen_PFCMPGT,
- [UOP_PFMAX & UOP_MASK] = codegen_PFMAX,
- [UOP_PFMIN & UOP_MASK] = codegen_PFMIN,
- [UOP_PFMUL & UOP_MASK] = codegen_PFMUL,
- [UOP_PFRCP & UOP_MASK] = codegen_PFRCP,
- [UOP_PFRSQRT & UOP_MASK] = codegen_PFRSQRT,
- [UOP_PFSUB & UOP_MASK] = codegen_PFSUB,
- [UOP_PI2FD & UOP_MASK] = codegen_PI2FD,
-
- [UOP_PMADDWD & UOP_MASK] = codegen_PMADDWD,
- [UOP_PMULHW & UOP_MASK] = codegen_PMULHW,
- [UOP_PMULLW & UOP_MASK] = codegen_PMULLW,
-
- [UOP_PSLLW_IMM & UOP_MASK] = codegen_PSLLW_IMM,
- [UOP_PSLLD_IMM & UOP_MASK] = codegen_PSLLD_IMM,
- [UOP_PSLLQ_IMM & UOP_MASK] = codegen_PSLLQ_IMM,
- [UOP_PSRAW_IMM & UOP_MASK] = codegen_PSRAW_IMM,
- [UOP_PSRAD_IMM & UOP_MASK] = codegen_PSRAD_IMM,
- [UOP_PSRAQ_IMM & UOP_MASK] = codegen_PSRAQ_IMM,
- [UOP_PSRLW_IMM & UOP_MASK] = codegen_PSRLW_IMM,
- [UOP_PSRLD_IMM & UOP_MASK] = codegen_PSRLD_IMM,
- [UOP_PSRLQ_IMM & UOP_MASK] = codegen_PSRLQ_IMM,
-
- [UOP_PSUBB & UOP_MASK] = codegen_PSUBB,
- [UOP_PSUBW & UOP_MASK] = codegen_PSUBW,
- [UOP_PSUBD & UOP_MASK] = codegen_PSUBD,
- [UOP_PSUBSB & UOP_MASK] = codegen_PSUBSB,
- [UOP_PSUBSW & UOP_MASK] = codegen_PSUBSW,
- [UOP_PSUBUSB & UOP_MASK] = codegen_PSUBUSB,
- [UOP_PSUBUSW & UOP_MASK] = codegen_PSUBUSW,
-
- [UOP_PUNPCKHBW & UOP_MASK] = codegen_PUNPCKHBW,
- [UOP_PUNPCKHWD & UOP_MASK] = codegen_PUNPCKHWD,
- [UOP_PUNPCKHDQ & UOP_MASK] = codegen_PUNPCKHDQ,
- [UOP_PUNPCKLBW & UOP_MASK] = codegen_PUNPCKLBW,
- [UOP_PUNPCKLWD & UOP_MASK] = codegen_PUNPCKLWD,
- [UOP_PUNPCKLDQ & UOP_MASK] = codegen_PUNPCKLDQ,
-
- [UOP_NOP_BARRIER & UOP_MASK] = codegen_NOP
-};
-
-void codegen_direct_read_8(codeblock_t *block, int host_reg, void *p)
-{
- host_x86_MOV8_REG_ABS(block, host_reg, p);
-}
-void codegen_direct_read_16(codeblock_t *block, int host_reg, void *p)
-{
- host_x86_MOV16_REG_ABS(block, host_reg, p);
-}
-void codegen_direct_read_32(codeblock_t *block, int host_reg, void *p)
-{
- host_x86_MOV32_REG_ABS(block, host_reg, p);
-}
-void codegen_direct_read_64(codeblock_t *block, int host_reg, void *p)
-{
- host_x86_MOVQ_XREG_ABS(block, host_reg, p);
-}
-void codegen_direct_read_pointer(codeblock_t *block, int host_reg, void *p)
-{
- host_x86_MOV64_REG_ABS(block, host_reg, p);
-}
-void codegen_direct_read_double(codeblock_t *block, int host_reg, void *p)
-{
- host_x86_MOVQ_XREG_ABS(block, host_reg, p);
-}
-void codegen_direct_read_st_8(codeblock_t *block, int host_reg, void *base, int reg_idx)
-{
- int offset = (uintptr_t)base - (((uintptr_t)&cpu_state) + 128);
-
- host_x86_MOV32_REG_BASE_OFFSET(block, REG_ECX, REG_RSP, IREG_TOP_diff_stack_offset);
- host_x86_ADD32_REG_IMM(block, REG_ECX, reg_idx);
- host_x86_AND32_REG_IMM(block, REG_ECX, 7);
- host_x86_MOV8_REG_ABS_REG_REG_SHIFT(block, host_reg, offset, REG_RBP, REG_ECX, 0);
-}
-void codegen_direct_read_st_64(codeblock_t *block, int host_reg, void *base, int reg_idx)
-{
- int offset = (uintptr_t)base - (((uintptr_t)&cpu_state) + 128);
-
- host_x86_MOV32_REG_BASE_OFFSET(block, REG_ECX, REG_RSP, IREG_TOP_diff_stack_offset);
- host_x86_ADD32_REG_IMM(block, REG_ECX, reg_idx);
- host_x86_AND32_REG_IMM(block, REG_ECX, 7);
- host_x86_MOVQ_XREG_ABS_REG_REG_SHIFT(block, host_reg, offset, REG_RBP, REG_ECX, 3);
-}
-void codegen_direct_read_st_double(codeblock_t *block, int host_reg, void *base, int reg_idx)
-{
- int offset = (uintptr_t)base - (((uintptr_t)&cpu_state) + 128);
-
- host_x86_MOV32_REG_BASE_OFFSET(block, REG_ECX, REG_RSP, IREG_TOP_diff_stack_offset);
- host_x86_ADD32_REG_IMM(block, REG_ECX, reg_idx);
- host_x86_AND32_REG_IMM(block, REG_ECX, 7);
- host_x86_MOVQ_XREG_ABS_REG_REG_SHIFT(block, host_reg, offset, REG_RBP, REG_ECX, 3);
-}
-
-void codegen_direct_write_8(codeblock_t *block, void *p, int host_reg)
-{
- host_x86_MOV8_ABS_REG(block, p, host_reg);
-}
-void codegen_direct_write_16(codeblock_t *block, void *p, int host_reg)
-{
- host_x86_MOV16_ABS_REG(block, p, host_reg);
-}
-void codegen_direct_write_32(codeblock_t *block, void *p, int host_reg)
-{
- host_x86_MOV32_ABS_REG(block, p, host_reg);
-}
-void codegen_direct_write_64(codeblock_t *block, void *p, int host_reg)
-{
- host_x86_MOVQ_ABS_XREG(block, p, host_reg);
-}
-void codegen_direct_write_pointer(codeblock_t *block, void *p, int host_reg)
-{
- host_x86_MOV64_ABS_REG(block, p, host_reg);
-}
-void codegen_direct_write_double(codeblock_t *block, void *p, int host_reg)
-{
- host_x86_MOVQ_ABS_XREG(block, p, host_reg);
-}
-void codegen_direct_write_st_8(codeblock_t *block, void *base, int reg_idx, int host_reg)
-{
- int offset = (uintptr_t)base - (((uintptr_t)&cpu_state) + 128);
-
- host_x86_MOV32_REG_BASE_OFFSET(block, REG_ECX, REG_RSP, IREG_TOP_diff_stack_offset);
- host_x86_ADD32_REG_IMM(block, REG_ECX, reg_idx);
- host_x86_AND32_REG_IMM(block, REG_ECX, 7);
- host_x86_MOV8_ABS_REG_REG_SHIFT_REG(block, offset, REG_RBP, REG_ECX, 0, host_reg);
-}
-void codegen_direct_write_st_64(codeblock_t *block, void *base, int reg_idx, int host_reg)
-{
- int offset = (uintptr_t)base - (((uintptr_t)&cpu_state) + 128);
-
- host_x86_MOV32_REG_BASE_OFFSET(block, REG_ECX, REG_RSP, IREG_TOP_diff_stack_offset);
- host_x86_ADD32_REG_IMM(block, REG_ECX, reg_idx);
- host_x86_AND32_REG_IMM(block, REG_ECX, 7);
- host_x86_MOVQ_ABS_REG_REG_SHIFT_XREG(block, offset, REG_RBP, REG_ECX, 3, host_reg);
-}
-void codegen_direct_write_st_double(codeblock_t *block, void *base, int reg_idx, int host_reg)
-{
- int offset = (uintptr_t)base - (((uintptr_t)&cpu_state) + 128);
-
- host_x86_MOV32_REG_BASE_OFFSET(block, REG_ECX, REG_RSP, IREG_TOP_diff_stack_offset);
- host_x86_ADD32_REG_IMM(block, REG_ECX, reg_idx);
- host_x86_AND32_REG_IMM(block, REG_ECX, 7);
- host_x86_MOVQ_ABS_REG_REG_SHIFT_XREG(block, offset, REG_RBP, REG_ECX, 3, host_reg);
-}
-
-void codegen_direct_write_ptr(codeblock_t *block, void *p, int host_reg)
-{
- host_x86_MOV64_ABS_REG(block, p, host_reg);
-}
-
-void codegen_direct_read_16_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- host_x86_MOV16_REG_BASE_OFFSET(block, host_reg, REG_ESP, stack_offset);
-}
-void codegen_direct_read_32_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- host_x86_MOV32_REG_BASE_OFFSET(block, host_reg, REG_RSP, stack_offset);
-}
-void codegen_direct_read_64_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- host_x86_MOVQ_XREG_BASE_OFFSET(block, host_reg, REG_RSP, stack_offset);
-}
-void codegen_direct_read_pointer_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- host_x86_MOV64_REG_BASE_OFFSET(block, host_reg, REG_RSP, stack_offset);
-}
-void codegen_direct_read_double_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- host_x86_MOVQ_XREG_BASE_OFFSET(block, host_reg, REG_RSP, stack_offset);
-}
-
-void codegen_direct_write_32_stack(codeblock_t *block, int stack_offset, int host_reg)
-{
- host_x86_MOV32_BASE_OFFSET_REG(block, REG_RSP, stack_offset, host_reg);
-}
-void codegen_direct_write_64_stack(codeblock_t *block, int stack_offset, int host_reg)
-{
- host_x86_MOVQ_BASE_OFFSET_XREG(block, REG_RSP, stack_offset, host_reg);
-}
-void codegen_direct_write_pointer_stack(codeblock_t *block, int stack_offset, int host_reg)
-{
- host_x86_MOV64_BASE_OFFSET_REG(block, REG_RSP, stack_offset, host_reg);
-}
-void codegen_direct_write_double_stack(codeblock_t *block, int stack_offset, int host_reg)
-{
- host_x86_MOVQ_BASE_OFFSET_XREG(block, REG_RSP, stack_offset, host_reg);
-}
-
-void codegen_set_jump_dest(codeblock_t *block, void *p)
-{
- *(uint32_t *)p = (uintptr_t)&block_write_data[block_pos] - ((uintptr_t)p + 4);
-}
-
-void codegen_direct_write_8_imm(codeblock_t *block, void *p, uint8_t imm_data)
-{
- host_x86_MOV8_ABS_IMM(block, p, imm_data);
-}
-void codegen_direct_write_16_imm(codeblock_t *block, void *p, uint16_t imm_data)
-{
- host_x86_MOV16_ABS_IMM(block, p, imm_data);
-}
-void codegen_direct_write_32_imm(codeblock_t *block, void *p, uint32_t imm_data)
-{
- host_x86_MOV32_ABS_IMM(block, p, imm_data);
-}
-void codegen_direct_write_32_imm_stack(codeblock_t *block, int stack_offset, uint32_t imm_data)
-{
- host_x86_MOV32_BASE_OFFSET_IMM(block, REG_ESP, stack_offset, imm_data);
-}
-
-#endif
diff --git a/src/codegen_backend_x86.c b/src/codegen_backend_x86.c
deleted file mode 100644
index 2fd0565..0000000
--- a/src/codegen_backend_x86.c
+++ /dev/null
@@ -1,369 +0,0 @@
-#if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined WIN32 || defined _WIN32 || defined _WIN32
-
-#include
-#include "ibm.h"
-#include "codegen.h"
-#include "codegen_allocator.h"
-#include "codegen_backend.h"
-#include "codegen_backend_x86_defs.h"
-#include "codegen_backend_x86_ops.h"
-#include "codegen_backend_x86_ops_sse.h"
-#include "codegen_reg.h"
-#include "x86.h"
-
-#if defined(__linux__) || defined(__APPLE__)
-#include
-#include
-#endif
-#if defined WIN32 || defined _WIN32 || defined _WIN32
-#include
-#endif
-
-void *codegen_mem_load_byte;
-void *codegen_mem_load_word;
-void *codegen_mem_load_long;
-void *codegen_mem_load_quad;
-void *codegen_mem_load_single;
-void *codegen_mem_load_double;
-
-void *codegen_mem_store_byte;
-void *codegen_mem_store_word;
-void *codegen_mem_store_long;
-void *codegen_mem_store_quad;
-void *codegen_mem_store_single;
-void *codegen_mem_store_double;
-
-void *codegen_gpf_rout;
-void *codegen_exit_rout;
-
-host_reg_def_t codegen_host_reg_list[CODEGEN_HOST_REGS] =
-{
- /*Note: while EAX and EDX are normally volatile registers under x86
- calling conventions, the recompiler will explicitly save and restore
- them across funcion calls*/
- {REG_EAX, 0},
- {REG_EBX, 0},
- {REG_EDX, 0}
-};
-
-host_reg_def_t codegen_host_fp_reg_list[CODEGEN_HOST_FP_REGS] =
-{
- {REG_XMM0, HOST_REG_FLAG_VOLATILE},
- {REG_XMM1, HOST_REG_FLAG_VOLATILE},
- {REG_XMM2, HOST_REG_FLAG_VOLATILE},
- {REG_XMM3, HOST_REG_FLAG_VOLATILE},
- {REG_XMM4, HOST_REG_FLAG_VOLATILE},
- {REG_XMM5, HOST_REG_FLAG_VOLATILE}
-};
-
-static void build_load_routine(codeblock_t *block, int size, int is_float)
-{
- uint8_t *branch_offset;
- uint8_t *misaligned_offset = NULL;
-
- /*In - ESI = address
- Out - ECX = data, ESI = abrt*/
- /*MOV ECX, ESI
- SHR ESI, 12
- MOV ESI, [readlookup2+ESI*4]
- CMP ESI, -1
- JNZ +
- MOVZX ECX, B[ESI+ECX]
- XOR ESI,ESI
- RET
- * PUSH EAX
- PUSH EDX
- PUSH ECX
- CALL readmembl
- POP ECX
- POP EDX
- POP EAX
- MOVZX ECX, AL
- RET
- */
- host_x86_MOV32_REG_REG(block, REG_ECX, REG_ESI);
- host_x86_SHR32_IMM(block, REG_ESI, 12);
- host_x86_MOV32_REG_ABS_INDEX_SHIFT(block, REG_ESI, readlookup2, REG_ESI, 2);
- if (size != 1)
- {
- host_x86_TEST32_REG_IMM(block, REG_ECX, size-1);
- misaligned_offset = host_x86_JNZ_short(block);
- }
- host_x86_CMP32_REG_IMM(block, REG_ESI, (uint32_t)-1);
- branch_offset = host_x86_JZ_short(block);
- if (size == 1 && !is_float)
- host_x86_MOVZX_BASE_INDEX_32_8(block, REG_ECX, REG_ESI, REG_ECX);
- else if (size == 2 && !is_float)
- host_x86_MOVZX_BASE_INDEX_32_16(block, REG_ECX, REG_ESI, REG_ECX);
- else if (size == 4 && !is_float)
- host_x86_MOV32_REG_BASE_INDEX(block, REG_ECX, REG_ESI, REG_ECX);
- else if (size == 4 && is_float)
- host_x86_CVTSS2SD_XREG_BASE_INDEX(block, REG_XMM_TEMP, REG_ESI, REG_ECX);
- else if (size == 8)
- host_x86_MOVQ_XREG_BASE_INDEX(block, REG_XMM_TEMP, REG_ESI, REG_ECX);
- else
- fatal("build_load_routine: size=%i\n", size);
- host_x86_XOR32_REG_REG(block, REG_ESI, REG_ESI);
- host_x86_RET(block);
-
- *branch_offset = (uint8_t)((uintptr_t)&block_write_data[block_pos] - (uintptr_t)branch_offset) - 1;
- if (size != 1)
- *misaligned_offset = (uint8_t)((uintptr_t)&block_write_data[block_pos] - (uintptr_t)misaligned_offset) - 1;
- host_x86_PUSH(block, REG_EAX);
- host_x86_PUSH(block, REG_EDX);
- host_x86_PUSH(block, REG_ECX);
- if (size == 1)
- host_x86_CALL(block, (void *)readmembl);
- else if (size == 2)
- host_x86_CALL(block, (void *)readmemwl);
- else if (size == 4)
- host_x86_CALL(block, (void *)readmemll);
- else if (size == 8)
- host_x86_CALL(block, (void *)readmemql);
- host_x86_POP(block, REG_ECX);
- if (size == 1 && !is_float)
- host_x86_MOVZX_REG_32_8(block, REG_ECX, REG_EAX);
- else if (size == 2 && !is_float)
- host_x86_MOVZX_REG_32_16(block, REG_ECX, REG_EAX);
- else if (size == 4 && !is_float)
- host_x86_MOV32_REG_REG(block, REG_ECX, REG_EAX);
- else if (size == 4 && is_float)
- {
- host_x86_MOVD_XREG_REG(block, REG_XMM_TEMP, REG_EAX);
- host_x86_CVTSS2SD_XREG_XREG(block, REG_XMM_TEMP, REG_XMM_TEMP);
- }
- else if (size == 8)
- {
- host_x86_MOVD_XREG_REG(block, REG_XMM_TEMP, REG_EAX);
- host_x86_MOVD_XREG_REG(block, REG_XMM_TEMP2, REG_EDX);
- host_x86_UNPCKLPS_XREG_XREG(block, REG_XMM_TEMP, REG_XMM_TEMP2);
- }
- host_x86_POP(block, REG_EDX);
- host_x86_POP(block, REG_EAX);
- host_x86_MOVZX_REG_ABS_32_8(block, REG_ESI, &cpu_state.abrt);
- host_x86_RET(block);
- block_pos = (block_pos + 63) & ~63;
-}
-
-static void build_store_routine(codeblock_t *block, int size, int is_float)
-{
- uint8_t *branch_offset;
- uint8_t *misaligned_offset = NULL;
-
- /*In - ECX = data, ESI = address
- Out - ESI = abrt
- Corrupts EDI*/
- /*MOV EDI, ESI
- SHR ESI, 12
- MOV ESI, [writelookup2+ESI*4]
- CMP ESI, -1
- JNZ +
- MOV [ESI+EDI], ECX
- XOR ESI,ESI
- RET
- * PUSH EAX
- PUSH EDX
- PUSH ECX
- CALL writemembl
- POP ECX
- POP EDX
- POP EAX
- MOVZX ECX, AL
- RET
- */
- host_x86_MOV32_REG_REG(block, REG_EDI, REG_ESI);
- host_x86_SHR32_IMM(block, REG_ESI, 12);
- host_x86_MOV32_REG_ABS_INDEX_SHIFT(block, REG_ESI, writelookup2, REG_ESI, 2);
- if (size != 1)
- {
- host_x86_TEST32_REG_IMM(block, REG_EDI, size-1);
- misaligned_offset = host_x86_JNZ_short(block);
- }
- host_x86_CMP32_REG_IMM(block, REG_ESI, (uint32_t)-1);
- branch_offset = host_x86_JZ_short(block);
- if (size == 1 && !is_float)
- host_x86_MOV8_BASE_INDEX_REG(block, REG_ESI, REG_EDI, REG_ECX);
- else if (size == 2 && !is_float)
- host_x86_MOV16_BASE_INDEX_REG(block, REG_ESI, REG_EDI, REG_ECX);
- else if (size == 4 && !is_float)
- host_x86_MOV32_BASE_INDEX_REG(block, REG_ESI, REG_EDI, REG_ECX);
- else if (size == 4 && is_float)
- host_x86_MOVD_BASE_INDEX_XREG(block, REG_ESI, REG_EDI, REG_XMM_TEMP);
- else if (size == 8)
- host_x86_MOVQ_BASE_INDEX_XREG(block, REG_ESI, REG_EDI, REG_XMM_TEMP);
- else
- fatal("build_store_routine: size=%i is_float=%i\n", size, is_float);
- host_x86_XOR32_REG_REG(block, REG_ESI, REG_ESI);
- host_x86_RET(block);
-
- *branch_offset = (uint8_t)((uintptr_t)&block_write_data[block_pos] - (uintptr_t)branch_offset) - 1;
- if (size != 1)
- *misaligned_offset = (uint8_t)((uintptr_t)&block_write_data[block_pos] - (uintptr_t)misaligned_offset) - 1;
- if (size == 4 && is_float)
- host_x86_MOVD_REG_XREG(block, REG_ECX, REG_XMM_TEMP);
- host_x86_PUSH(block, REG_EAX);
- host_x86_PUSH(block, REG_EDX);
- host_x86_PUSH(block, REG_ECX);
- if (size == 8)
- {
- host_x86_MOVQ_STACK_OFFSET_XREG(block, -8, REG_XMM_TEMP);
- host_x86_SUB32_REG_IMM(block, REG_ESP, 8);
- }
- host_x86_PUSH(block, REG_EDI);
- if (size == 1)
- host_x86_CALL(block, (void *)writemembl);
- else if (size == 2)
- host_x86_CALL(block, (void *)writememwl);
- else if (size == 4)
- host_x86_CALL(block, (void *)writememll);
- else if (size == 8)
- host_x86_CALL(block, (void *)writememql);
- host_x86_POP(block, REG_EDI);
- if (size == 8)
- host_x86_ADD32_REG_IMM(block, REG_ESP, 8);
- host_x86_POP(block, REG_ECX);
- host_x86_POP(block, REG_EDX);
- host_x86_POP(block, REG_EAX);
- host_x86_MOVZX_REG_ABS_32_8(block, REG_ESI, &cpu_state.abrt);
- host_x86_RET(block);
- block_pos = (block_pos + 63) & ~63;
-}
-
-static void build_loadstore_routines(codeblock_t *block)
-{
- codegen_mem_load_byte = &codeblock[block_current].data[block_pos];
- build_load_routine(block, 1, 0);
- codegen_mem_load_word = &codeblock[block_current].data[block_pos];
- build_load_routine(block, 2, 0);
- codegen_mem_load_long = &codeblock[block_current].data[block_pos];
- build_load_routine(block, 4, 0);
- codegen_mem_load_quad = &codeblock[block_current].data[block_pos];
- build_load_routine(block, 8, 0);
- codegen_mem_load_single = &codeblock[block_current].data[block_pos];
- build_load_routine(block, 4, 1);
- codegen_mem_load_double = &codeblock[block_current].data[block_pos];
- build_load_routine(block, 8, 1);
-
- codegen_mem_store_byte = &codeblock[block_current].data[block_pos];
- build_store_routine(block, 1, 0);
- codegen_mem_store_word = &codeblock[block_current].data[block_pos];
- build_store_routine(block, 2, 0);
- codegen_mem_store_long = &codeblock[block_current].data[block_pos];
- build_store_routine(block, 4, 0);
- codegen_mem_store_quad = &codeblock[block_current].data[block_pos];
- build_store_routine(block, 8, 0);
- codegen_mem_store_single = &codeblock[block_current].data[block_pos];
- build_store_routine(block, 4, 1);
- codegen_mem_store_double = &codeblock[block_current].data[block_pos];
- build_store_routine(block, 8, 1);
-}
-
-void codegen_backend_init()
-{
- codeblock_t *block;
- int c;
-#if defined(__linux__) || defined(__APPLE__)
- void *start;
- size_t len;
- long pagesize = sysconf(_SC_PAGESIZE);
- long pagemask = ~(pagesize - 1);
-#endif
-pclog("sizeof(codeblock_t)=%i\n", sizeof(codeblock_t));
-pclog(" offsetof(codeblock_t, pc)=%i\n", offsetof(codeblock_t, pc));
-pclog(" offsetof(codeblock_t, _cs)=%i\n", offsetof(codeblock_t, _cs));
-pclog(" offsetof(codeblock_t, phys)=%i\n", offsetof(codeblock_t, phys));
-pclog(" offsetof(codeblock_t, phys_2)=%i\n", offsetof(codeblock_t, phys_2));
-pclog(" offsetof(codeblock_t, status)=%i\n", offsetof(codeblock_t, status));
-pclog(" offsetof(codeblock_t, flags)=%i\n", offsetof(codeblock_t, flags));
-pclog(" offsetof(codeblock_t, ins)=%i\n", offsetof(codeblock_t, ins));
-pclog(" offsetof(codeblock_t, TOP)=%i\n", offsetof(codeblock_t, TOP));
-pclog(" offsetof(codeblock_t, parent)=%i\n", offsetof(codeblock_t, parent));
-pclog(" offsetof(codeblock_t, left)=%i\n", offsetof(codeblock_t, left));
-pclog(" offsetof(codeblock_t, right)=%i\n", offsetof(codeblock_t, right));
-pclog(" offsetof(codeblock_t, data)=%i\n", offsetof(codeblock_t, data));
-pclog(" offsetof(codeblock_t, page_mask)=%i\n", offsetof(codeblock_t, page_mask));
-pclog(" offsetof(codeblock_t, page_mask2)=%i\n", offsetof(codeblock_t, page_mask2));
-pclog(" offsetof(codeblock_t, dirty_mask)=%i\n", offsetof(codeblock_t, dirty_mask));
-pclog(" offsetof(codeblock_t, dirty_mask2)=%i\n", offsetof(codeblock_t, dirty_mask2));
-pclog(" offsetof(codeblock_t, prev)=%i\n", offsetof(codeblock_t, prev));
-pclog(" offsetof(codeblock_t, next)=%i\n", offsetof(codeblock_t, next));
-pclog(" offsetof(codeblock_t, prev_2)=%i\n", offsetof(codeblock_t, prev_2));
-pclog(" offsetof(codeblock_t, next_2)=%i\n", offsetof(codeblock_t, next_2));
- codeblock = malloc(BLOCK_SIZE * sizeof(codeblock_t));
- codeblock_hash = malloc(HASH_SIZE * sizeof(codeblock_t *));
-
- memset(codeblock, 0, BLOCK_SIZE * sizeof(codeblock_t));
- memset(codeblock_hash, 0, HASH_SIZE * sizeof(codeblock_t *));
-
- for (c = 0; c < BLOCK_SIZE; c++)
- codeblock[c].pc = BLOCK_PC_INVALID;
-
-// pclog("Codegen is %p\n", (void *)pages[0xfab12 >> 12].block);
-
- block_current = 0;
- block_pos = 0;
- block = &codeblock[block_current];
- block->head_mem_block = codegen_allocator_allocate(NULL, block_current);
- block->data = codeblock_allocator_get_ptr(block->head_mem_block);
- block_write_data = block->data;
- build_loadstore_routines(block);
-
- codegen_gpf_rout = &codeblock[block_current].data[block_pos];
- host_x86_MOV32_STACK_IMM(block, STACK_ARG0, 0);
- host_x86_MOV32_STACK_IMM(block, STACK_ARG1, 0);
- host_x86_CALL(block, (void *)x86gpf);
- codegen_exit_rout = &codeblock[block_current].data[block_pos];
- host_x86_ADD32_REG_IMM(block, REG_ESP, 64);
- host_x86_POP(block, REG_EDI);
- host_x86_POP(block, REG_ESI);
- host_x86_POP(block, REG_EBP);
- host_x86_POP(block, REG_EDX);
- host_x86_RET(block);
- block_write_data = NULL;
-
- cpu_state.old_fp_control = 0;
- asm(
- "fstcw %0\n"
- "stmxcsr %1\n"
- : "=m" (cpu_state.old_fp_control2),
- "=m" (cpu_state.old_fp_control)
- );
- cpu_state.trunc_fp_control = cpu_state.old_fp_control | 0x6000;
-}
-
-void codegen_set_rounding_mode(int mode)
-{
- /*SSE*/
- cpu_state.new_fp_control = (cpu_state.old_fp_control & ~0x6000) | (mode << 13);
- /*x87 - used for double -> i64 conversions*/
- cpu_state.new_fp_control2 = (cpu_state.old_fp_control2 & ~0x0c00) | (mode << 10);
-}
-
-void codegen_backend_prologue(codeblock_t *block)
-{
- block_pos = BLOCK_START; /*Entry code*/
- host_x86_PUSH(block, REG_EBX);
- host_x86_PUSH(block, REG_EBP);
- host_x86_PUSH(block, REG_ESI);
- host_x86_PUSH(block, REG_EDI);
- host_x86_SUB32_REG_IMM(block, REG_ESP, 64);
- host_x86_MOV32_REG_IMM(block, REG_EBP, ((uintptr_t)&cpu_state) + 128);
- if (block->flags & CODEBLOCK_HAS_FPU)
- {
- host_x86_MOV32_REG_ABS(block, REG_EAX, &cpu_state.TOP);
- host_x86_SUB32_REG_IMM(block, REG_EAX, block->TOP);
- host_x86_MOV32_BASE_OFFSET_REG(block, REG_ESP, IREG_TOP_diff_stack_offset, REG_EAX);
- }
-}
-
-void codegen_backend_epilogue(codeblock_t *block)
-{
- host_x86_ADD32_REG_IMM(block, REG_ESP, 64);
- host_x86_POP(block, REG_EDI);
- host_x86_POP(block, REG_ESI);
- host_x86_POP(block, REG_EBP);
- host_x86_POP(block, REG_EDX);
- host_x86_RET(block);
-}
-
-#endif
diff --git a/src/codegen_backend_x86.h b/src/codegen_backend_x86.h
deleted file mode 100644
index 7f9f233..0000000
--- a/src/codegen_backend_x86.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#include "codegen_backend_x86_defs.h"
-
-#define BLOCK_SIZE 0x10000
-#define BLOCK_MASK 0xffff
-#define BLOCK_START 0
-
-#define HASH_SIZE 0x20000
-#define HASH_MASK 0x1ffff
-
-#define HASH(l) ((l) & 0x1ffff)
-
-#define BLOCK_MAX 0x3c0
-
-#define CODEGEN_BACKEND_HAS_MOV_IMM
diff --git a/src/codegen_backend_x86_defs.h b/src/codegen_backend_x86_defs.h
deleted file mode 100644
index 8999ca3..0000000
--- a/src/codegen_backend_x86_defs.h
+++ /dev/null
@@ -1,50 +0,0 @@
-#ifndef _CODEGEN_BACKEND_X86_DEFS_H_
-#define _CODEGEN_BACKEND_X86_DEFS_H_
-
-#define REG_EAX 0
-#define REG_ECX 1
-#define REG_EDX 2
-#define REG_EBX 3
-#define REG_ESP 4
-#define REG_EBP 5
-#define REG_ESI 6
-#define REG_EDI 7
-
-#define REG_XMM0 0
-#define REG_XMM1 1
-#define REG_XMM2 2
-#define REG_XMM3 3
-#define REG_XMM4 4
-#define REG_XMM5 5
-#define REG_XMM6 6
-#define REG_XMM7 7
-
-#define REG_XMM_TEMP REG_XMM7
-#define REG_XMM_TEMP2 REG_XMM6
-
-#define CODEGEN_HOST_REGS 3
-#define CODEGEN_HOST_FP_REGS 6
-
-extern void *codegen_mem_load_byte;
-extern void *codegen_mem_load_word;
-extern void *codegen_mem_load_long;
-extern void *codegen_mem_load_quad;
-extern void *codegen_mem_load_single;
-extern void *codegen_mem_load_double;
-
-extern void *codegen_mem_store_byte;
-extern void *codegen_mem_store_word;
-extern void *codegen_mem_store_long;
-extern void *codegen_mem_store_quad;
-extern void *codegen_mem_store_single;
-extern void *codegen_mem_store_double;
-
-extern void *codegen_gpf_rout;
-extern void *codegen_exit_rout;
-
-#define STACK_ARG0 (0)
-#define STACK_ARG1 (4)
-#define STACK_ARG2 (8)
-#define STACK_ARG3 (12)
-
-#endif
diff --git a/src/codegen_backend_x86_ops.c b/src/codegen_backend_x86_ops.c
deleted file mode 100644
index 7c8a18d..0000000
--- a/src/codegen_backend_x86_ops.c
+++ /dev/null
@@ -1,1330 +0,0 @@
-#if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined WIN32 || defined _WIN32 || defined _WIN32
-
-#include "ibm.h"
-#include "codegen.h"
-#include "codegen_allocator.h"
-#include "codegen_backend.h"
-#include "codegen_backend_x86_defs.h"
-#include "codegen_backend_x86_ops.h"
-#include "codegen_backend_x86_ops_helpers.h"
-
-#define RM_OP_ADD 0x00
-#define RM_OP_OR 0x08
-#define RM_OP_AND 0x20
-#define RM_OP_SUB 0x28
-#define RM_OP_XOR 0x30
-#define RM_OP_CMP 0x38
-
-#define RM_OP_ROL 0x00
-#define RM_OP_ROR 0x08
-#define RM_OP_SHL 0x20
-#define RM_OP_SHR 0x28
-#define RM_OP_SAR 0x38
-
-void host_x86_ADD32_REG_ABS(codeblock_t *block, int dst_reg, void *p)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x03, 0x45 | (dst_reg << 3), offset); /*MOV offset[EBP], src_reg*/
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte(block, 0x03); /*MOV [p], src_reg*/
- codegen_addbyte(block, 0x05 | (dst_reg << 3));
- codegen_addlong(block, (uint32_t)p);
- }
-}
-
-void host_x86_ADD8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data)
-{
- if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x04, imm_data); /*ADD AL, imm_data*/
- }
- else
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x80, 0xc0 | RM_OP_ADD | dst_reg, imm_data); /*ADD dst_reg, imm_data*/
- }
-}
-void host_x86_ADD16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data)
-{
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x83, 0xc0 | RM_OP_ADD | dst_reg, imm_data & 0xff); /*ADD dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte2(block, 0x66, 0x05); /*ADD AX, imm_data*/
- codegen_addword(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte3(block, 0x66, 0x81, 0xc0 | RM_OP_ADD | dst_reg); /*ADD dst_reg, imm_data*/
- codegen_addword(block, imm_data);
- }
-}
-void host_x86_ADD32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data)
-{
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x83, 0xc0 | RM_OP_ADD | dst_reg, imm_data & 0xff); /*ADD dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x05); /*ADD EAX, imm_data*/
- codegen_addlong(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x81, 0xc0 | RM_OP_ADD | dst_reg); /*ADD dst_reg, imm_data*/
- codegen_addlong(block, imm_data);
- }
-}
-
-void host_x86_ADD8_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x00, 0xc0 | dst_reg | (src_reg << 3)); /*ADD dst_reg, src_reg*/
-}
-void host_x86_ADD16_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0x01, 0xc0 | dst_reg | (src_reg << 3)); /*ADD dst_reg, src_reg*/
-}
-void host_x86_ADD32_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte2(block, 0x01, 0xc0 | dst_reg | (src_reg << 3)); /*ADD dst_reg, src_reg*/
-}
-
-void host_x86_AND8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data)
-{
- if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x24, imm_data); /*AND AL, imm_data*/
- }
- else
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x80, 0xc0 | RM_OP_AND | dst_reg, imm_data); /*AND dst_reg, imm_data*/
- }
-}
-void host_x86_AND16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data)
-{
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x83, 0xc0 | RM_OP_AND | dst_reg, imm_data & 0xff); /*AND dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x66, 0x25); /*AND AX, imm_data*/
- codegen_addword(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte3(block, 0x66, 0x81, 0xc0 | RM_OP_AND | dst_reg); /*AND dst_reg, imm_data*/
- codegen_addword(block, imm_data);
- }
-}
-void host_x86_AND32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data)
-{
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x83, 0xc0 | RM_OP_AND | dst_reg, imm_data & 0xff); /*AND dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x25); /*AND EAX, imm_data*/
- codegen_addlong(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x81, 0xc0 | RM_OP_AND | dst_reg); /*AND dst_reg, imm_data*/
- codegen_addlong(block, imm_data);
- }
-}
-
-void host_x86_AND8_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x20, 0xc0 | dst_reg | (src_reg << 3)); /*AND dst_reg, src_reg_b*/
-}
-void host_x86_AND16_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0x21, 0xc0 | dst_reg | (src_reg << 3)); /*AND dst_reg, src_reg_b*/
-}
-void host_x86_AND32_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x21, 0xc0 | dst_reg | (src_reg << 3)); /*AND dst_reg, src_reg_b*/
-}
-
-void host_x86_CALL(codeblock_t *block, void *p)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0xe8); /*CALL*/
- codegen_addlong(block, (uintptr_t)p - (uintptr_t)&block_write_data[block_pos + 4]);
-}
-
-void host_x86_CMP16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data)
-{
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x83, 0xc0 | RM_OP_CMP | dst_reg, imm_data & 0xff); /*CMP dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte2(block, 0x66, 0x3d); /*CMP AX, imm_data*/
- codegen_addword(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte3(block, 0x66, 0x81, 0xc0 | RM_OP_CMP | dst_reg); /*CMP dst_reg, imm_data*/
- codegen_addword(block, imm_data);
- }
-}
-void host_x86_CMP32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data)
-{
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x83, 0xc0 | RM_OP_CMP | dst_reg, imm_data & 0xff); /*CMP dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x3d); /*CMP EAX, imm_data*/
- codegen_addlong(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x81, 0xc0 | RM_OP_CMP | dst_reg); /*CMP dst_reg, imm_data*/
- codegen_addlong(block, imm_data);
- }
-}
-
-void host_x86_CMP8_REG_REG(codeblock_t *block, int src_reg_a, int src_reg_b)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x38, 0xc0 | src_reg_a | (src_reg_b << 3)); /*CMP src_reg_a, src_reg_b*/
-}
-void host_x86_CMP16_REG_REG(codeblock_t *block, int src_reg_a, int src_reg_b)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0x39, 0xc0 | src_reg_a | (src_reg_b << 3)); /*CMP src_reg_a, src_reg_b*/
-}
-void host_x86_CMP32_REG_REG(codeblock_t *block, int src_reg_a, int src_reg_b)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x39, 0xc0 | src_reg_a | (src_reg_b << 3)); /*CMP src_reg_a, src_reg_b*/
-}
-
-void host_x86_INC32_ABS(codeblock_t *block, void *p)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0xff, 0x05); /*INC p*/
- codegen_addlong(block, (uint32_t)p);
-}
-
-void host_x86_JMP(codeblock_t *block, void *p)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0xe9); /*JMP*/
- codegen_addlong(block, (uintptr_t)p - (uintptr_t)&block_write_data[block_pos + 4]);
-}
-uint32_t *host_x86_JMP_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0xe9); /*JMP*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-
-void host_x86_JNZ(codeblock_t *block, void *p)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x85); /*JNZ*/
- codegen_addlong(block, (uintptr_t)p - (uintptr_t)&block_write_data[block_pos + 4]);
-}
-void host_x86_JZ(codeblock_t *block, void *p)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x84); /*JZ*/
- codegen_addlong(block, (uintptr_t)p - (uintptr_t)&block_write_data[block_pos + 4]);
-}
-
-uint8_t *host_x86_JNZ_short(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x75, 0); /*JNZ*/
- return &block_write_data[block_pos-1];
-}
-uint8_t *host_x86_JS_short(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x78, 0); /*JS*/
- return &block_write_data[block_pos-1];
-}
-uint8_t *host_x86_JZ_short(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x74, 0); /*JZ*/
- return &block_write_data[block_pos-1];
-}
-
-uint32_t *host_x86_JNB_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x83); /*JNB*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JNBE_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x87); /*JNBE*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JNL_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x8d); /*JNL*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JNLE_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x8f); /*JNLE*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JNO_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x81); /*JNO*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JNS_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x89); /*JNS*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JNZ_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x85); /*JNZ*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JB_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x82); /*JB*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JBE_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x86); /*JBE*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JL_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x8c); /*JL*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JLE_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x8e); /*JLE*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JO_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x80); /*JO*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JS_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x88); /*JS*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-uint32_t *host_x86_JZ_long(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x0f, 0x84); /*JZ*/
- codegen_addlong(block, 0);
- return (uint32_t *)&block_write_data[block_pos-4];
-}
-
-void host_x86_LAHF(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 1);
- codegen_addbyte(block, 0x9f); /*LAHF*/
-}
-
-void host_x86_LEA_REG_IMM(codeblock_t *block, int dst_reg, int src_reg, uint32_t offset)
-{
- if (offset)
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x8d, 0x80 | (dst_reg << 3) | src_reg); /*LEA dst_reg, [offset+src_reg]*/
- codegen_addlong(block, offset);
- }
- else
- {
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x8d, 0x00 | (dst_reg << 3) | src_reg); /*LEA dst_reg, [src_reg]*/
- }
-}
-
-void host_x86_LEA_REG_REG(codeblock_t *block, int dst_reg, int src_reg_a, int src_reg_b)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x8d, 0x04 | (dst_reg << 3), (src_reg_b << 3) | src_reg_a); /*LEA dst_reg, [src_reg_a + src_reg_b]*/
-}
-void host_x86_LEA_REG_REG_SHIFT(codeblock_t *block, int dst_reg, int src_reg_a, int src_reg_b, int shift)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x8d, 0x04 | (dst_reg << 3), (shift << 6) | (src_reg_b << 3) | src_reg_a); /*LEA dst_reg, [src_reg_a + src_reg_b * (1 << shift)]*/
-}
-
-void host_x86_MOV8_ABS_IMM(codeblock_t *block, void *p, uint32_t imm_data)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte3(block, 0xc6, 0x45, offset); /*MOVB offset[EBP], imm_data*/
- codegen_addbyte(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte2(block, 0xc6, 0x05); /*MOVB p, imm_data*/
- codegen_addlong(block, (uint32_t)p);
- codegen_addbyte(block, imm_data);
- }
-}
-void host_x86_MOV16_ABS_IMM(codeblock_t *block, void *p, uint16_t imm_data)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte4(block, 0x66, 0xc7, 0x45, offset); /*MOV offset[EBP], imm_data*/
- codegen_addword(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 9);
- codegen_addbyte3(block, 0x66, 0xc7, 0x05); /*MOV p, imm_data*/
- codegen_addlong(block, (uint32_t)p);
- codegen_addword(block, imm_data);
- }
-}
-void host_x86_MOV32_ABS_IMM(codeblock_t *block, void *p, uint32_t imm_data)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0xc7, 0x45, offset); /*MOV offset[EBP], imm_data*/
- codegen_addlong(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 10);
- codegen_addbyte2(block, 0xc7, 0x05); /*MOV p, imm_data*/
- codegen_addlong(block, (uint32_t)p);
- codegen_addlong(block, imm_data);
- }
-}
-
-void host_x86_MOV8_ABS_REG(codeblock_t *block, void *p, int src_reg)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x88, 0x45 | (src_reg << 3), offset); /*MOVB offset[EBP], src_reg*/
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte(block, 0x88); /*MOVB [p], src_reg*/
- codegen_addbyte(block, 0x05 | (src_reg << 3));
- codegen_addlong(block, (uint32_t)p);
- }
-}
-void host_x86_MOV16_ABS_REG(codeblock_t *block, void *p, int src_reg)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x89, 0x45 | (src_reg << 3), offset); /*MOV offset[EBP], src_reg*/
- }
- else
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0x66, 0x89, 0x05 | (src_reg << 3)); /*MOV [p], src_reg*/
- codegen_addlong(block, (uint32_t)p);
- }
-}
-void host_x86_MOV32_ABS_REG(codeblock_t *block, void *p, int src_reg)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x89, 0x45 | (src_reg << 3), offset); /*MOV offset[EBP], src_reg*/
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte(block, 0x89); /*MOV [p], src_reg*/
- codegen_addbyte(block, 0x05 | (src_reg << 3));
- codegen_addlong(block, (uint32_t)p);
- }
-}
-
-void host_x86_MOV8_ABS_REG_REG_SHIFT_REG(codeblock_t *block, uint32_t addr, int base_reg, int idx_reg, int shift, int src_reg)
-{
- if (addr < 0x80 || addr >= 0xffffff80)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x88, 0x44 | (src_reg << 3), base_reg | (idx_reg << 3) | (shift << 6), addr & 0xff); /*MOV addr[base_reg + idx_reg << shift], src_reg*/
- }
- else
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0x88, 0x84 | (src_reg << 3), base_reg | (idx_reg << 3) | (shift << 6)); /*MOV addr[base_reg + idx_reg << shift], src_reg*/
- codegen_addlong(block, addr);
- }
-}
-
-void host_x86_MOV8_BASE_INDEX_REG(codeblock_t *block, int base_reg, int idx_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x88, 0x04 | (src_reg << 3), base_reg | (idx_reg << 3)); /*MOV B[base_reg + idx_reg], src_reg*/
-}
-void host_x86_MOV16_BASE_INDEX_REG(codeblock_t *block, int base_reg, int idx_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x89, 0x04 | (src_reg << 3), base_reg | (idx_reg << 3)); /*MOV W[base_reg + idx_reg], src_reg*/
-}
-void host_x86_MOV32_BASE_INDEX_REG(codeblock_t *block, int base_reg, int idx_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x89, 0x04 | (src_reg << 3), base_reg | (idx_reg << 3)); /*MOV L[base_reg + idx_reg], src_reg*/
-}
-
-void host_x86_MOV8_REG_ABS(codeblock_t *block, int dst_reg, void *p)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x8a, 0x45 | (dst_reg << 3), offset); /*MOV offset[EBP], src_reg*/
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte(block, 0x8a); /*MOV [p], src_reg*/
- codegen_addbyte(block, 0x05 | (dst_reg << 3));
- codegen_addlong(block, (uint32_t)p);
- }
-}
-void host_x86_MOV16_REG_ABS(codeblock_t *block, int dst_reg, void *p)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x8b, 0x45 | (dst_reg << 3), offset); /*MOV offset[EBP], src_reg*/
- }
- else
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0x66, 0x8b, 0x05 | (dst_reg << 3)); /*MOV [p], src_reg*/
- codegen_addlong(block, (uint32_t)p);
- }
-}
-void host_x86_MOV32_REG_ABS(codeblock_t *block, int dst_reg, void *p)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x8b, 0x45 | (dst_reg << 3), offset); /*MOV offset[EBP], src_reg*/
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte(block, 0x8b); /*MOV [p], src_reg*/
- codegen_addbyte(block, 0x05 | (dst_reg << 3));
- codegen_addlong(block, (uint32_t)p);
- }
-}
-
-void host_x86_MOV32_REG_ABS_INDEX_SHIFT(codeblock_t *block, int dst_reg, void *p, int idx_reg, int shift)
-{
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0x8b, 0x04 | (dst_reg << 3), (shift << 6) | (idx_reg << 3) | 0x05); /*MOV dst_reg, [p + idx_reg << shift]*/
- codegen_addlong(block, (uint32_t)p);
-}
-
-void host_x86_MOV8_REG_ABS_REG_REG_SHIFT(codeblock_t *block, int dst_reg, uint32_t addr, int base_reg, int idx_reg, int shift)
-{
- if (addr < 0x80 || addr >= 0xffffff80)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x8a, 0x44 | (dst_reg << 3), base_reg | (idx_reg << 3) | (shift << 6), addr & 0xff); /*MOV addr[base_reg + idx_reg << shift], src_reg*/
- }
- else
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0x8a, 0x84 | (dst_reg << 3), base_reg | (idx_reg << 3) | (shift << 6)); /*MOV addr[base_reg + idx_reg << shift], src_reg*/
- codegen_addlong(block, addr);
- }
-}
-
-void host_x86_MOV32_REG_BASE_INDEX(codeblock_t *block, int dst_reg, int base_reg, int idx_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x8b, 0x04 | (dst_reg << 3), base_reg | (idx_reg << 3)); /*MOV dst_reg, L[base_reg + idx_reg]*/
-}
-
-void host_x86_MOV16_REG_BASE_OFFSET(codeblock_t *block, int dst_reg, int base_reg, int offset)
-{
- if (offset >= -128 && offset < 127)
- {
- if (base_reg == REG_ESP)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x66);
- codegen_addbyte4(block, 0x8b, 0x40 | base_reg | (dst_reg << 3), 0x24, offset);
- }
- else
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x8b, 0x40 | base_reg | (dst_reg << 3), offset);
- }
- }
- else
- fatal("MOV16_REG_BASE_OFFSET - offset %i\n", offset);
-}
-void host_x86_MOV32_REG_BASE_OFFSET(codeblock_t *block, int dst_reg, int base_reg, int offset)
-{
- if (offset >= -128 && offset < 127)
- {
- if (base_reg == REG_ESP)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x8b, 0x40 | base_reg | (dst_reg << 3), 0x24, offset);
- }
- else
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x8b, 0x40 | base_reg | (dst_reg << 3), offset);
- }
- }
- else
- fatal("MOV32_REG_BASE_OFFSET - offset %i\n", offset);
-}
-
-void host_x86_MOV16_BASE_OFFSET_REG(codeblock_t *block, int base_reg, int offset, int src_reg)
-{
- if (offset >= -128 && offset < 127)
- {
- if (base_reg == REG_ESP)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x66);
- codegen_addbyte4(block, 0x89, 0x40 | base_reg | (src_reg << 3), 0x24, offset);
- }
- else
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x89, 0x40 | base_reg | (src_reg << 3), offset);
- }
- }
- else
- fatal("MOV16_BASE_OFFSET_REG - offset %i\n", offset);
-}
-void host_x86_MOV32_BASE_OFFSET_REG(codeblock_t *block, int base_reg, int offset, int src_reg)
-{
- if (offset >= -128 && offset < 127)
- {
- if (base_reg == REG_ESP)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x89, 0x40 | base_reg | (src_reg << 3), 0x24, offset);
- }
- else
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x89, 0x40 | base_reg | (src_reg << 3), offset);
- }
- }
- else
- fatal("MOV32_BASE_OFFSET_REG - offset %i\n", offset);
-}
-
-void host_x86_MOV32_BASE_OFFSET_IMM(codeblock_t *block, int base_reg, int offset, uint32_t imm_data)
-{
- if (offset >= -128 && offset < 127)
- {
- if (base_reg == REG_ESP)
- {
- codegen_alloc_bytes(block, 8);
- codegen_addbyte4(block, 0xc7, 0x40 | base_reg, 0x24, offset);
- codegen_addlong(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0xc7, 0x40 | base_reg, offset);
- codegen_addlong(block, imm_data);
- }
- }
- else
- fatal("MOV32_BASE_OFFSET_IMM - offset %i\n", offset);
-}
-
-void host_x86_MOV8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xb0 + dst_reg, imm_data); /*MOV reg, imm_data*/
-}
-void host_x86_MOV16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data)
-{
- if (!imm_data)
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0x31, 0xc0 | dst_reg | (dst_reg << 3)); /*XOR dst_reg, dst_reg*/
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x66, 0xb8 + dst_reg); /*MOV reg, imm_data*/
- codegen_addword(block, imm_data);
- }
-}
-void host_x86_MOV32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data)
-{
- if (!imm_data)
- {
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x31, 0xc0 | dst_reg | (dst_reg << 3)); /*XOR dst_reg, dst_reg*/
- }
- else
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0xb8 + dst_reg); /*MOV reg, imm_data*/
- codegen_addlong(block, imm_data);
- }
-}
-
-void host_x86_MOV8_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x88, 0xc0 | dst_reg | (src_reg << 3));
-}
-void host_x86_MOV16_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0x89, 0xc0 | dst_reg | (src_reg << 3));
-}
-void host_x86_MOV32_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x89, 0xc0 | dst_reg | (src_reg << 3));
-}
-
-void host_x86_MOV32_STACK_IMM(codeblock_t *block, int32_t offset, uint32_t imm_data)
-{
- if (!offset)
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0xc7, 0x04, 0x24); /*MOV [ESP], imm_data*/
- codegen_addlong(block, imm_data);
- }
- else if (offset >= -0x80 && offset < 0x80)
- {
- codegen_alloc_bytes(block, 8);
- codegen_addbyte4(block, 0xc7, 0x44, 0x24, offset & 0xff); /*MOV offset[ESP], imm_data*/
- codegen_addlong(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 11);
- codegen_addbyte3(block, 0xc7, 0x84, 0x24); /*MOV offset[ESP], imm_data*/
- codegen_addlong(block, offset);
- codegen_addlong(block, imm_data);
- }
-}
-
-void host_x86_MOVSX_REG_16_8(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xbe, 0xc0 | (dst_reg << 3) | src_reg); /*MOVSX dst_reg, src_reg*/
-}
-void host_x86_MOVSX_REG_32_8(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0xbe, 0xc0 | (dst_reg << 3) | src_reg); /*MOVSX dst_reg, src_reg*/
-}
-void host_x86_MOVSX_REG_32_16(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0xbf, 0xc0 | (dst_reg << 3) | src_reg); /*MOVSX dst_reg, src_reg*/
-}
-
-void host_x86_MOVZX_REG_ABS_16_8(codeblock_t *block, int dst_reg, void *p)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x66);
- codegen_addbyte4(block, 0x0f, 0xb6, 0x45 | (dst_reg << 3), offset); /*MOV dest_reg, [EBP+offset]*/
- }
- else
- {
- codegen_alloc_bytes(block, 8);
- codegen_addbyte4(block, 0x66, 0x0f, 0xb6, 0x05 | (dst_reg << 3)); /*MOVZX dst_reg, [p]*/
- codegen_addlong(block, (uint32_t)p);
- }
-}
-void host_x86_MOVZX_REG_ABS_32_8(codeblock_t *block, int dst_reg, void *p)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x0f, 0xb6, 0x45 | (dst_reg << 3), offset); /*MOV dest_reg, [EBP+offset]*/
- }
- else
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0x0f, 0xb6, 0x05 | (dst_reg << 3)); /*MOVZX dst_reg, [p]*/
- codegen_addlong(block, (uint32_t)p);
- }
-}
-void host_x86_MOVZX_REG_ABS_32_16(codeblock_t *block, int dst_reg, void *p)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x0f, 0xb7, 0x45 | (dst_reg << 3), offset); /*MOV dest_reg, [EBP+offset]*/
- }
- else
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0x0f, 0xb7, 0x05 | (dst_reg << 3)); /*MOVZX dst_reg, [p]*/
- codegen_addlong(block, (uint32_t)p);
- }
-}
-
-void host_x86_MOVZX_REG_16_8(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xb6, 0xc0 | (dst_reg << 3) | src_reg); /*MOVZX dst_reg, src_reg*/
-}
-void host_x86_MOVZX_REG_32_8(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0xb6, 0xc0 | (dst_reg << 3) | src_reg); /*MOVZX dst_reg, src_reg*/
-}
-void host_x86_MOVZX_REG_32_16(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0xb7, 0xc0 | (dst_reg << 3) | src_reg); /*MOVZX dst_reg, src_reg*/
-}
-
-void host_x86_MOVZX_BASE_INDEX_32_8(codeblock_t *block, int dst_reg, int base_reg, int idx_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x0f, 0xb6, 0x04 | (dst_reg << 3), base_reg | (idx_reg << 3)); /*MOVZX dst_reg, B[base_reg + idx_reg]*/
-}
-void host_x86_MOVZX_BASE_INDEX_32_16(codeblock_t *block, int dst_reg, int base_reg, int idx_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x0f, 0xb7, 0x04 | (dst_reg << 3), base_reg | (idx_reg << 3)); /*MOVZX dst_reg, W[base_reg + idx_reg]*/
-}
-
-void host_x86_OR8_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x08, 0xc0 | dst_reg | (src_reg << 3)); /*OR dst_reg, src_reg_b*/
-}
-void host_x86_OR16_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0x09, 0xc0 | dst_reg | (src_reg << 3)); /*OR dst_reg, src_reg_b*/
-}
-void host_x86_OR32_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x09, 0xc0 | dst_reg | (src_reg << 3)); /*OR dst_reg, src_reg_b*/
-}
-
-void host_x86_OR8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data)
-{
- if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x0c, imm_data); /*OR AL, imm_data*/
- }
- else
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x80, 0xc0 | RM_OP_OR | dst_reg, imm_data); /*OR dst_reg, imm_data*/
- }
-}
-void host_x86_OR16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data)
-{
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x83, 0xc0 | RM_OP_OR | dst_reg, imm_data & 0xff); /*OR dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x66, 0x0d); /*OR AX, imm_data*/
- codegen_addword(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0x66, 0x81, 0xc0 | RM_OP_OR | dst_reg); /*OR dst_reg, imm_data*/
- codegen_addword(block, imm_data);
- }
-}
-void host_x86_OR32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data)
-{
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x83, 0xc0 | RM_OP_OR | dst_reg, imm_data & 0xff); /*OR dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x0d); /*OR EAX, imm_data*/
- codegen_addlong(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x81, 0xc0 | RM_OP_OR | dst_reg); /*OR dst_reg, imm_data*/
- codegen_addlong(block, imm_data);
- }
-}
-
-void host_x86_POP(codeblock_t *block, int src_reg)
-{
- codegen_alloc_bytes(block, 1);
- codegen_addbyte(block, 0x58 | src_reg); /*POP reg*/
-}
-
-void host_x86_PUSH(codeblock_t *block, int src_reg)
-{
- codegen_alloc_bytes(block, 1);
- codegen_addbyte(block, 0x50 | src_reg); /*PUSH reg*/
-}
-
-void host_x86_RET(codeblock_t *block)
-{
- codegen_alloc_bytes(block, 1);
- codegen_addbyte(block, 0xc3); /*RET*/
-}
-
-void host_x86_ROL8_CL(codeblock_t *block, int dst_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd2, 0xc0 | RM_OP_ROL | dst_reg); /*SHL dst_reg, CL*/
-}
-void host_x86_ROL16_CL(codeblock_t *block, int dst_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0xd3, 0xc0 | RM_OP_ROL | dst_reg); /*SHL dst_reg, CL*/
-}
-void host_x86_ROL32_CL(codeblock_t *block, int dst_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd3, 0xc0 | RM_OP_ROL | dst_reg); /*SHL dst_reg, CL*/
-}
-
-void host_x86_ROL8_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc0, 0xc0 | RM_OP_ROL | dst_reg, shift); /*SHL dst_reg, shift*/
-}
-void host_x86_ROL16_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0xc1, 0xc0 | RM_OP_ROL | dst_reg, shift); /*SHL dst_reg, shift*/
-}
-void host_x86_ROL32_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc1, 0xc0 | RM_OP_ROL | dst_reg, shift); /*SHL dst_reg, shift*/
-}
-
-void host_x86_ROR8_CL(codeblock_t *block, int dst_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd2, 0xc0 | RM_OP_ROR | dst_reg); /*SHR dst_reg, CL*/
-}
-void host_x86_ROR16_CL(codeblock_t *block, int dst_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0xd3, 0xc0 | RM_OP_ROR | dst_reg); /*SHR dst_reg, CL*/
-}
-void host_x86_ROR32_CL(codeblock_t *block, int dst_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd3, 0xc0 | RM_OP_ROR | dst_reg); /*SHR dst_reg, CL*/
-}
-
-void host_x86_ROR8_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc0, 0xc0 | RM_OP_ROR | dst_reg, shift); /*SHR dst_reg, shift*/
-}
-void host_x86_ROR16_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0xc1, 0xc0 | RM_OP_ROR | dst_reg, shift); /*SHR dst_reg, shift*/
-}
-void host_x86_ROR32_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc1, 0xc0 | RM_OP_ROR | dst_reg, shift); /*SHR dst_reg, shift*/
-}
-
-#define MODRM_MOD_REG(rm, reg) (0xc0 | reg | (rm << 3))
-
-void host_x86_SAR8_CL(codeblock_t *block, int dst_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd2, 0xc0 | RM_OP_SAR | dst_reg); /*SAR dst_reg, CL*/
-}
-void host_x86_SAR16_CL(codeblock_t *block, int dst_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0xd3, 0xc0 | RM_OP_SAR | dst_reg); /*SAR dst_reg, CL*/
-}
-void host_x86_SAR32_CL(codeblock_t *block, int dst_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd3, 0xc0 | RM_OP_SAR | dst_reg); /*SAR dst_reg, CL*/
-}
-
-void host_x86_SAR8_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc0, 0xc0 | RM_OP_SAR | dst_reg, shift); /*SAR dst_reg, shift*/
-}
-void host_x86_SAR16_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0xc1, 0xc0 | RM_OP_SAR | dst_reg, shift); /*SAR dst_reg, shift*/
-}
-void host_x86_SAR32_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc1, 0xc0 | RM_OP_SAR | dst_reg, shift); /*SAR dst_reg, shift*/
-}
-
-void host_x86_SHL8_CL(codeblock_t *block, int dst_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd2, 0xc0 | RM_OP_SHL | dst_reg); /*SHL dst_reg, CL*/
-}
-void host_x86_SHL16_CL(codeblock_t *block, int dst_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0xd3, 0xc0 | RM_OP_SHL | dst_reg); /*SHL dst_reg, CL*/
-}
-void host_x86_SHL32_CL(codeblock_t *block, int dst_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd3, 0xc0 | RM_OP_SHL | dst_reg); /*SHL dst_reg, CL*/
-}
-
-void host_x86_SHL8_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc0, 0xc0 | RM_OP_SHL | dst_reg, shift); /*SHL dst_reg, shift*/
-}
-void host_x86_SHL16_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0xc1, 0xc0 | RM_OP_SHL | dst_reg, shift); /*SHL dst_reg, shift*/
-}
-void host_x86_SHL32_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc1, 0xc0 | RM_OP_SHL | dst_reg, shift); /*SHL dst_reg, shift*/
-}
-
-void host_x86_SHR8_CL(codeblock_t *block, int dst_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd2, 0xc0 | RM_OP_SHR | dst_reg); /*SHR dst_reg, CL*/
-}
-void host_x86_SHR16_CL(codeblock_t *block, int dst_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0xd3, 0xc0 | RM_OP_SHR | dst_reg); /*SHR dst_reg, CL*/
-}
-void host_x86_SHR32_CL(codeblock_t *block, int dst_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xd3, 0xc0 | RM_OP_SHR | dst_reg); /*SHR dst_reg, CL*/
-}
-
-void host_x86_SHR8_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc0, 0xc0 | RM_OP_SHR | dst_reg, shift); /*SHR dst_reg, shift*/
-}
-void host_x86_SHR16_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0xc1, 0xc0 | RM_OP_SHR | dst_reg, shift); /*SHR dst_reg, shift*/
-}
-void host_x86_SHR32_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xc1, 0xc0 | RM_OP_SHR | dst_reg, shift); /*SHR dst_reg, shift*/
-}
-
-void host_x86_SUB8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data)
-{
- if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x2c, imm_data); /*SUB AL, imm_data*/
- }
- else
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x80, 0xc0 | RM_OP_SUB | dst_reg, imm_data); /*SUB dst_reg, imm_data*/
- }
-}
-void host_x86_SUB16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data)
-{
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x83, 0xc0 | RM_OP_SUB | dst_reg, imm_data & 0xff); /*SUB dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte2(block, 0x66, 0x2d); /*SUB AX, imm_data*/
- codegen_addword(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte3(block, 0x66, 0x81, 0xc0 | RM_OP_SUB | dst_reg); /*SUB dst_reg, imm_data*/
- codegen_addword(block, imm_data);
- }
-}
-void host_x86_SUB32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data)
-{
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x83, 0xc0 | RM_OP_SUB | dst_reg, imm_data & 0xff); /*SUB dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x2d); /*SUB EAX, imm_data*/
- codegen_addlong(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x81, 0xc0 | RM_OP_SUB | dst_reg); /*SUB dst_reg, imm_data*/
- codegen_addlong(block, imm_data);
- }
-}
-
-void host_x86_SUB8_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x28, 0xc0 | dst_reg | (src_reg << 3)); /*SUB dst_reg, src_reg*/
-}
-void host_x86_SUB16_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0x29, 0xc0 | dst_reg | (src_reg << 3)); /*SUB dst_reg, src_reg*/
-}
-void host_x86_SUB32_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x29, 0xc0 | dst_reg | (src_reg << 3)); /*SUB dst_reg, src_reg*/
-}
-
-void host_x86_TEST8_REG(codeblock_t *block, int src_host_reg, int dst_host_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x84, MODRM_MOD_REG(dst_host_reg, src_host_reg)); /*TEST dst_host_reg, src_host_reg*/
-}
-void host_x86_TEST16_REG(codeblock_t *block, int src_host_reg, int dst_host_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0x85, MODRM_MOD_REG(dst_host_reg, src_host_reg)); /*TEST dst_host_reg, src_host_reg*/
-}
-void host_x86_TEST32_REG(codeblock_t *block, int src_host_reg, int dst_host_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x85, MODRM_MOD_REG(dst_host_reg, src_host_reg)); /*TEST dst_host_reg, src_host_reg*/
-}
-void host_x86_TEST32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data)
-{
- if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0xa9); /*TEST EAX, imm_data*/
- codegen_addlong(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0xf7, 0xc0 | dst_reg); /*TEST dst_reg, imm_data*/
- codegen_addlong(block, imm_data);
- }
-}
-
-void host_x86_XOR8_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x30, 0xc0 | dst_reg | (src_reg << 3)); /*XOR dst_reg, src_reg*/
-}
-void host_x86_XOR16_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x66, 0x31, 0xc0 | dst_reg | (src_reg << 3)); /*XOR dst_reg, src_reg*/
-}
-void host_x86_XOR32_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x31, 0xc0 | dst_reg | (src_reg << 3)); /*XOR dst_reg, src_reg*/
-}
-
-void host_x86_XOR8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data)
-{
- if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0x34, imm_data); /*XOR AL, imm_data*/
- }
- else
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x80, 0xc0 | RM_OP_XOR | dst_reg, imm_data); /*XOR dst_reg, imm_data*/
- }
-}
-void host_x86_XOR16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data)
-{
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x83, 0xc0 | RM_OP_XOR | dst_reg, imm_data & 0xff); /*XOR dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte2(block, 0x66, 0x35); /*XOR AX, imm_data*/
- codegen_addword(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte3(block, 0x66, 0x81, 0xc0 | RM_OP_XOR | dst_reg); /*XOR dst_reg, imm_data*/
- codegen_addword(block, imm_data);
- }
-}
-void host_x86_XOR32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data)
-{
- if (is_imm8(imm_data))
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x83, 0xc0 | RM_OP_XOR | dst_reg, imm_data & 0xff); /*XOR dst_reg, imm_data*/
- }
- else if (dst_reg == REG_EAX)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte(block, 0x35); /*XOR EAX, imm_data*/
- codegen_addlong(block, imm_data);
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0x81, 0xc0 | RM_OP_XOR | dst_reg); /*XOR dst_reg, imm_data*/
- codegen_addlong(block, imm_data);
- }
-}
-
-#endif
diff --git a/src/codegen_backend_x86_ops.h b/src/codegen_backend_x86_ops.h
deleted file mode 100644
index a6ca19f..0000000
--- a/src/codegen_backend_x86_ops.h
+++ /dev/null
@@ -1,195 +0,0 @@
-void host_x86_ADD32_REG_ABS(codeblock_t *block, int dst_reg, void *p);
-
-void host_x86_ADD8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data);
-void host_x86_ADD16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data);
-void host_x86_ADD32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data);
-
-void host_x86_ADD8_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_ADD16_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_ADD32_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_AND8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data);
-void host_x86_AND16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data);
-void host_x86_AND32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data);
-
-void host_x86_AND8_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_AND16_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_AND32_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_CALL(codeblock_t *block, void *p);
-
-void host_x86_CMP16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data);
-void host_x86_CMP32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data);
-
-void host_x86_CMP8_REG_REG(codeblock_t *block, int src_reg_a, int src_reg_b);
-void host_x86_CMP16_REG_REG(codeblock_t *block, int src_reg_a, int src_reg_b);
-void host_x86_CMP32_REG_REG(codeblock_t *block, int src_reg_a, int src_reg_b);
-
-void host_x86_INC32_ABS(codeblock_t *block, void *p);
-
-void host_x86_JMP(codeblock_t *block, void *p);
-uint32_t *host_x86_JMP_short(codeblock_t *block);
-uint32_t *host_x86_JMP_long(codeblock_t *block);
-
-void host_x86_JNZ(codeblock_t *block, void *p);
-void host_x86_JZ(codeblock_t *block, void *p);
-
-uint8_t *host_x86_JNZ_short(codeblock_t *block);
-uint8_t *host_x86_JS_short(codeblock_t *block);
-uint8_t *host_x86_JZ_short(codeblock_t *block);
-
-uint32_t *host_x86_JNB_long(codeblock_t *block);
-uint32_t *host_x86_JNBE_long(codeblock_t *block);
-uint32_t *host_x86_JNL_long(codeblock_t *block);
-uint32_t *host_x86_JNLE_long(codeblock_t *block);
-uint32_t *host_x86_JNO_long(codeblock_t *block);
-uint32_t *host_x86_JNS_long(codeblock_t *block);
-uint32_t *host_x86_JNZ_long(codeblock_t *block);
-uint32_t *host_x86_JB_long(codeblock_t *block);
-uint32_t *host_x86_JBE_long(codeblock_t *block);
-uint32_t *host_x86_JL_long(codeblock_t *block);
-uint32_t *host_x86_JLE_long(codeblock_t *block);
-uint32_t *host_x86_JO_long(codeblock_t *block);
-uint32_t *host_x86_JS_long(codeblock_t *block);
-uint32_t *host_x86_JZ_long(codeblock_t *block);
-
-void host_x86_LAHF(codeblock_t *block);
-
-void host_x86_LEA_REG_IMM(codeblock_t *block, int dst_reg, int src_reg_a, uint32_t offset);
-void host_x86_LEA_REG_REG(codeblock_t *block, int dst_reg, int src_reg_a, int src_reg_b);
-void host_x86_LEA_REG_REG_SHIFT(codeblock_t *block, int dst_reg, int src_reg_a, int src_reg_b, int shift);
-
-void host_x86_MOV8_ABS_IMM(codeblock_t *block, void *p, uint32_t imm_data);
-void host_x86_MOV16_ABS_IMM(codeblock_t *block, void *p, uint16_t imm_data);
-void host_x86_MOV32_ABS_IMM(codeblock_t *block, void *p, uint32_t imm_data);
-
-void host_x86_MOV8_ABS_REG(codeblock_t *block, void *p, int src_reg);
-void host_x86_MOV16_ABS_REG(codeblock_t *block, void *p, int src_reg);
-void host_x86_MOV32_ABS_REG(codeblock_t *block, void *p, int src_reg);
-
-void host_x86_MOV8_ABS_REG_REG_SHIFT_REG(codeblock_t *block, uint32_t addr, int base_reg, int idx_reg, int shift, int src_reg);
-
-void host_x86_MOV8_BASE_INDEX_REG(codeblock_t *block, int base_reg, int idx_reg, int src_reg);
-void host_x86_MOV16_BASE_INDEX_REG(codeblock_t *block, int base_reg, int idx_reg, int src_reg);
-void host_x86_MOV32_BASE_INDEX_REG(codeblock_t *block, int base_reg, int idx_reg, int src_reg);
-
-void host_x86_MOV16_BASE_OFFSET_REG(codeblock_t *block, int base_reg, int offset, int dst_reg);
-void host_x86_MOV32_BASE_OFFSET_REG(codeblock_t *block, int base_reg, int offset, int dst_reg);
-
-void host_x86_MOV32_BASE_OFFSET_IMM(codeblock_t *block, int base_reg, int offset, uint32_t imm_data);
-
-void host_x86_MOV8_REG_ABS(codeblock_t *block, int dst_reg, void *p);
-void host_x86_MOV16_REG_ABS(codeblock_t *block, int dst_reg, void *p);
-void host_x86_MOV32_REG_ABS(codeblock_t *block, int dst_reg, void *p);
-
-void host_x86_MOV32_REG_ABS_INDEX_SHIFT(codeblock_t *block, int dst_reg, void *p, int idx_reg, int shift);
-
-void host_x86_MOV8_REG_ABS_REG_REG_SHIFT(codeblock_t *block, int dst_addr, uint32_t addr, int base_reg, int idx_reg, int shift);
-
-void host_x86_MOV32_REG_BASE_INDEX(codeblock_t *block, int dst_reg, int base_reg, int idx_reg);
-
-void host_x86_MOV16_REG_BASE_OFFSET(codeblock_t *block, int dst_reg, int base_reg, int offset);
-void host_x86_MOV32_REG_BASE_OFFSET(codeblock_t *block, int dst_reg, int base_reg, int offset);
-
-void host_x86_MOV8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data);
-void host_x86_MOV16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data);
-void host_x86_MOV32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data);
-
-void host_x86_MOV8_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MOV16_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MOV32_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-
-#define host_x86_MOV16_STACK_REG(block, offset, src_reg) host_x86_MOV16_BASE_OFFSET_REG(block, REG_ESP, offset, src_reg)
-
-void host_x86_MOV32_STACK_IMM(codeblock_t *block, int32_t offset, uint32_t imm_data);
-
-void host_x86_MOVSX_REG_16_8(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MOVSX_REG_32_8(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MOVSX_REG_32_16(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_MOVZX_REG_16_8(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MOVZX_REG_32_8(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MOVZX_REG_32_16(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_MOVZX_REG_ABS_16_8(codeblock_t *block, int dst_reg, void *p);
-void host_x86_MOVZX_REG_ABS_32_8(codeblock_t *block, int dst_reg, void *p);
-void host_x86_MOVZX_REG_ABS_32_16(codeblock_t *block, int dst_reg, void *p);
-
-void host_x86_MOVZX_BASE_INDEX_32_8(codeblock_t *block, int dst_reg, int base_reg, int idx_reg);
-void host_x86_MOVZX_BASE_INDEX_32_16(codeblock_t *block, int dst_reg, int base_reg, int idx_reg);
-
-void host_x86_OR8_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_OR16_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_OR32_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_OR8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data);
-void host_x86_OR16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data);
-void host_x86_OR32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data);
-
-void host_x86_POP(codeblock_t *block, int src_reg);
-
-void host_x86_PUSH(codeblock_t *block, int src_reg);
-
-void host_x86_RET(codeblock_t *block);
-
-void host_x86_ROL8_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_ROL16_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_ROL32_IMM(codeblock_t *block, int dst_reg, int shift);
-
-void host_x86_ROL8_CL(codeblock_t *block, int dst_reg);
-void host_x86_ROL16_CL(codeblock_t *block, int dst_reg);
-void host_x86_ROL32_CL(codeblock_t *block, int dst_reg);
-
-void host_x86_ROR8_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_ROR16_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_ROR32_IMM(codeblock_t *block, int dst_reg, int shift);
-
-void host_x86_ROR8_CL(codeblock_t *block, int dst_reg);
-void host_x86_ROR16_CL(codeblock_t *block, int dst_reg);
-void host_x86_ROR32_CL(codeblock_t *block, int dst_reg);
-
-void host_x86_SAR8_CL(codeblock_t *block, int dst_reg);
-void host_x86_SAR16_CL(codeblock_t *block, int dst_reg);
-void host_x86_SAR32_CL(codeblock_t *block, int dst_reg);
-
-void host_x86_SAR8_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_SAR16_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_SAR32_IMM(codeblock_t *block, int dst_reg, int shift);
-
-void host_x86_SHL8_CL(codeblock_t *block, int dst_reg);
-void host_x86_SHL16_CL(codeblock_t *block, int dst_reg);
-void host_x86_SHL32_CL(codeblock_t *block, int dst_reg);
-
-void host_x86_SHL8_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_SHL16_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_SHL32_IMM(codeblock_t *block, int dst_reg, int shift);
-
-void host_x86_SHR8_CL(codeblock_t *block, int dst_reg);
-void host_x86_SHR16_CL(codeblock_t *block, int dst_reg);
-void host_x86_SHR32_CL(codeblock_t *block, int dst_reg);
-
-void host_x86_SHR8_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_SHR16_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_SHR32_IMM(codeblock_t *block, int dst_reg, int shift);
-
-void host_x86_SUB8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data);
-void host_x86_SUB16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data);
-void host_x86_SUB32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data);
-
-void host_x86_SUB8_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_SUB16_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_SUB32_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_TEST8_REG(codeblock_t *block, int src_host_reg, int dst_host_reg);
-void host_x86_TEST16_REG(codeblock_t *block, int src_host_reg, int dst_host_reg);
-void host_x86_TEST32_REG(codeblock_t *block, int src_host_reg, int dst_host_reg);
-
-void host_x86_TEST32_REG_IMM(codeblock_t *block, int src_host_reg, uint32_t imm_data);
-
-void host_x86_XOR8_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_XOR16_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_XOR32_REG_REG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_XOR8_REG_IMM(codeblock_t *block, int dst_reg, uint8_t imm_data);
-void host_x86_XOR16_REG_IMM(codeblock_t *block, int dst_reg, uint16_t imm_data);
-void host_x86_XOR32_REG_IMM(codeblock_t *block, int dst_reg, uint32_t imm_data);
diff --git a/src/codegen_backend_x86_ops_fpu.c b/src/codegen_backend_x86_ops_fpu.c
deleted file mode 100644
index 1c3f990..0000000
--- a/src/codegen_backend_x86_ops_fpu.c
+++ /dev/null
@@ -1,80 +0,0 @@
-#if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined WIN32 || defined _WIN32 || defined _WIN32
-
-#include "ibm.h"
-#include "codegen.h"
-#include "codegen_allocator.h"
-#include "codegen_backend.h"
-#include "codegen_backend_x86_defs.h"
-#include "codegen_backend_x86_ops_fpu.h"
-#include "codegen_backend_x86_ops_helpers.h"
-
-void host_x87_FILDq_BASE(codeblock_t *block, int base_reg)
-{
- if (base_reg == REG_ESP)
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xdf, 0x2c, 0x24); /*FILDq [ESP]*/
- }
- else
- {
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xdf, 0x28 | base_reg); /*FILDq [base_reg]*/
- }
-}
-void host_x87_FISTPq_BASE(codeblock_t *block, int base_reg)
-{
- if (base_reg == REG_ESP)
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xdf, 0x3c, 0x24); /*FISTPq [ESP]*/
- }
- else
- {
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xdf, 0x38 | base_reg); /*FISTPq [base_reg]*/
- }
-}
-void host_x87_FLDCW(codeblock_t *block, void *p)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xd9, 0x68 | REG_EBP, offset); /*FLDCW offset[EBP]*/
- }
- else
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte2(block, 0xd9, 0x2d); /*FLDCW [p]*/
- codegen_addlong(block, (uint32_t)p);
- }
-}
-void host_x87_FLDd_BASE(codeblock_t *block, int base_reg)
-{
- if (base_reg == REG_ESP)
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xdd, 0x04, 0x24); /*FILDq [ESP]*/
- }
- else
- {
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xdd, 0x08 | base_reg); /*FILDq [base_reg]*/
- }
-}
-void host_x87_FSTPd_BASE(codeblock_t *block, int base_reg)
-{
- if (base_reg == REG_ESP)
- {
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0xdd, 0x1c, 0x24); /*FILDq [ESP]*/
- }
- else
- {
- codegen_alloc_bytes(block, 2);
- codegen_addbyte2(block, 0xdd, 0x18 | base_reg); /*FILDq [base_reg]*/
- }
-}
-
-#endif
diff --git a/src/codegen_backend_x86_ops_fpu.h b/src/codegen_backend_x86_ops_fpu.h
deleted file mode 100644
index 3692715..0000000
--- a/src/codegen_backend_x86_ops_fpu.h
+++ /dev/null
@@ -1,5 +0,0 @@
-void host_x87_FILDq_BASE(codeblock_t *block, int base_reg);
-void host_x87_FISTPq_BASE(codeblock_t *block, int base_reg);
-void host_x87_FLDCW(codeblock_t *block, void *p);
-void host_x87_FLDd_BASE(codeblock_t *block, int base_reg);
-void host_x87_FSTPd_BASE(codeblock_t *block, int base_reg);
diff --git a/src/codegen_backend_x86_ops_helpers.h b/src/codegen_backend_x86_ops_helpers.h
deleted file mode 100644
index 9c100ec..0000000
--- a/src/codegen_backend_x86_ops_helpers.h
+++ /dev/null
@@ -1,84 +0,0 @@
-#define JMP_LEN_BYTES 5
-
-static inline void codegen_addbyte(codeblock_t *block, uint8_t val)
-{
- if (block_pos >= BLOCK_MAX)
- fatal("codegen_addbyte over! %i\n", block_pos);
- block_write_data[block_pos++] = val;
-}
-static inline void codegen_addbyte2(codeblock_t *block, uint8_t vala, uint8_t valb)
-{
- if (block_pos > (BLOCK_MAX-2))
- fatal("codegen_addbyte2 over! %i\n", block_pos);
- block_write_data[block_pos++] = vala;
- block_write_data[block_pos++] = valb;
-}
-static inline void codegen_addbyte3(codeblock_t *block, uint8_t vala, uint8_t valb, uint8_t valc)
-{
- if (block_pos > (BLOCK_MAX-3))
- fatal("codegen_addbyte3 over! %i\n", block_pos);
- block_write_data[block_pos++] = vala;
- block_write_data[block_pos++] = valb;
- block_write_data[block_pos++] = valc;
-}
-static inline void codegen_addbyte4(codeblock_t *block, uint8_t vala, uint8_t valb, uint8_t valc, uint8_t vald)
-{
- if (block_pos > (BLOCK_MAX-4))
- fatal("codegen_addbyte4 over! %i\n", block_pos);
- block_write_data[block_pos++] = vala;
- block_write_data[block_pos++] = valb;
- block_write_data[block_pos++] = valc;
- block_write_data[block_pos++] = vald;
-}
-
-static inline void codegen_addword(codeblock_t *block, uint16_t val)
-{
- if (block_pos > (BLOCK_MAX-2))
- fatal("codegen_addword over! %i\n", block_pos);
- *(uint16_t *)&block_write_data[block_pos] = val;
- block_pos += 2;
-}
-
-static inline void codegen_addlong(codeblock_t *block, uint32_t val)
-{
- if (block_pos > (BLOCK_MAX-4))
- fatal("codegen_addlong over! %i\n", block_pos);
- *(uint32_t *)&block_write_data[block_pos] = val;
- block_pos += 4;
-}
-
-static inline void codegen_addquad(codeblock_t *block, uint64_t val)
-{
- if (block_pos > (BLOCK_MAX-8))
- fatal("codegen_addquad over! %i\n", block_pos);
- *(uint64_t *)&block_write_data[block_pos] = val;
- block_pos += 8;
-}
-
-static void codegen_allocate_new_block(codeblock_t *block)
-{
- /*Current block is full. Allocate a new block*/
- struct mem_block_t *new_block = codegen_allocator_allocate(block->head_mem_block, get_block_nr(block));
- uint8_t *new_ptr = codeblock_allocator_get_ptr(new_block);
-
- /*Add a jump instruction to the new block*/
- codegen_addbyte(block, 0xe9); /*JMP*/
- codegen_addlong(block, (uintptr_t)new_ptr - (uintptr_t)&block_write_data[block_pos + 4]);
-
- /*Set write address to start of new block*/
- block_pos = 0;
- block_write_data = new_ptr;
-}
-
-static inline void codegen_alloc_bytes(codeblock_t *block, int size)
-{
- if (block_pos > ((BLOCK_MAX - size) - JMP_LEN_BYTES))
- codegen_allocate_new_block(block);
-}
-
-static inline int is_imm8(uint32_t imm_data)
-{
- if (imm_data <= 0x7f || imm_data >= 0xffffff80)
- return 1;
- return 0;
-}
diff --git a/src/codegen_backend_x86_ops_sse.c b/src/codegen_backend_x86_ops_sse.c
deleted file mode 100644
index 50ec638..0000000
--- a/src/codegen_backend_x86_ops_sse.c
+++ /dev/null
@@ -1,574 +0,0 @@
-#if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined WIN32 || defined _WIN32 || defined _WIN32
-
-#include "ibm.h"
-#include "codegen.h"
-#include "codegen_allocator.h"
-#include "codegen_backend.h"
-#include "codegen_backend_x86_defs.h"
-#include "codegen_backend_x86_ops_sse.h"
-#include "codegen_backend_x86_ops_helpers.h"
-
-void host_x86_ADDPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0x58, 0xc0 | src_reg | (dst_reg << 3)); /*ADDPS dst_reg, src_reg*/
-}
-void host_x86_ADDSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf2, 0x0f, 0x58, 0xc0 | src_reg | (dst_reg << 3));
-}
-
-void host_x86_CMPPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg, int type)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x0f, 0xc2, 0xc0 | src_reg | (dst_reg << 3), type); /*CMPPS dst_reg, src_reg, type*/
-}
-
-void host_x86_COMISD_XREG_XREG(codeblock_t *block, int src_reg_a, int src_reg_b)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x2e, 0xc0 | src_reg_b | (src_reg_a << 3));
-}
-
-void host_x86_CVTDQ2PS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0x5b, 0xc0 | src_reg | (dst_reg << 3)); /*CVTDQ2PS dst_reg, src_reg*/
-}
-void host_x86_CVTPS2DQ_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x5b, 0xc0 | src_reg | (dst_reg << 3)); /*CVTPS2DQ dst_reg, src_reg*/
-}
-
-void host_x86_CVTSD2SI_REG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf2, 0x0f, 0x2d, 0xc0 | src_reg | (dst_reg << 3)); /*CVTSD2SI dst_reg, src_reg*/
-}
-void host_x86_CVTSD2SS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf2, 0x0f, 0x5a, 0xc0 | src_reg | (dst_reg << 3)); /*CVTSD2SS dst_reg, src_reg*/
-}
-
-void host_x86_CVTSI2SD_XREG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf2, 0x0f, 0x2a, 0xc0 | src_reg | (dst_reg << 3)); /*CVTSI2SD dst_reg, src_reg*/
-}
-void host_x86_CVTSI2SS_XREG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x2a, 0xc0 | src_reg | (dst_reg << 3)); /*CVTSI2SD dst_reg, src_reg*/
-}
-
-void host_x86_CVTSS2SD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x5a, 0xc0 | src_reg | (dst_reg << 3));
-}
-void host_x86_CVTSS2SD_XREG_BASE_INDEX(codeblock_t *block, int dst_reg, int base_reg, int idx_reg)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x5a, 0x04 | (dst_reg << 3)); /*CVTSS2SD XMMx, [base_reg + idx_reg]*/
- codegen_addbyte(block, base_reg | (idx_reg << 3));
-}
-
-void host_x86_DIVSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf2, 0x0f, 0x5e, 0xc0 | src_reg | (dst_reg << 3)); /*DIVSD dst_reg, src_reg*/
-}
-void host_x86_DIVSS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x5e, 0xc0 | src_reg | (dst_reg << 3)); /*DIVSS dst_reg, src_reg*/
-}
-
-void host_x86_LDMXCSR(codeblock_t *block, void *p)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x0f, 0xae, 0x50 | REG_EBP, offset); /*LDMXCSR offset[EBP]*/
- }
- else
- {
- codegen_alloc_bytes(block, 7);
- codegen_addbyte3(block, 0x0f, 0xae, 0x15); /*LDMXCSR [p]*/
- codegen_addlong(block, (uint32_t)p);
- }
-}
-
-void host_x86_MAXSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf2, 0x0f, 0x5f, 0xc0 | src_reg | (dst_reg << 3)); /*MAXSD dst_reg, src_reg*/
-}
-
-void host_x86_MOVD_BASE_INDEX_XREG(codeblock_t *block, int base_reg, int idx_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x7e, 0x04 | (src_reg << 3)); /*MOVD XMMx, [base_reg + idx_reg]*/
- codegen_addbyte(block, base_reg | (idx_reg << 3));
-}
-void host_x86_MOVD_REG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x7e, 0xc0 | dst_reg | (src_reg << 3));
-}
-void host_x86_MOVD_XREG_BASE_INDEX(codeblock_t *block, int dst_reg, int base_reg, int idx_reg)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x6e, 0x04 | (dst_reg << 3)); /*MOVD XMMx, [base_reg + idx_reg]*/
- codegen_addbyte(block, base_reg | (idx_reg << 3));
-}
-void host_x86_MOVD_XREG_REG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x6e, 0xc0 | src_reg | (dst_reg << 3));
-}
-
-void host_x86_MOVQ_ABS_XREG(codeblock_t *block, void *p, int src_reg)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0xd6, 0x45 | (src_reg << 3)); /*MOVQ offset[EBP], src_reg*/
- codegen_addbyte(block, offset);
- }
- else
- {
- codegen_alloc_bytes(block, 8);
- codegen_addbyte4(block, 0x66, 0x0f, 0xd6, 0x05 | (src_reg << 3)); /*MOVQ [p], src_reg*/
- codegen_addlong(block, (uint32_t)p);
- }
-}
-void host_x86_MOVQ_ABS_REG_REG_SHIFT_XREG(codeblock_t *block, uint32_t addr, int src_reg_a, int src_reg_b, int shift, int src_reg)
-{
- if (addr < 0x80 || addr >= 0xffffff80)
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte3(block, 0x66, 0x0f, 0xd6); /*MOVQ addr[src_reg_a + src_reg_b << shift], XMMx*/
- codegen_addbyte3(block, 0x44 | (src_reg << 3), src_reg_a | (src_reg_b << 3) | (shift << 6), addr & 0xff);
- }
- else
- {
- codegen_alloc_bytes(block, 9);
- codegen_addbyte3(block, 0x66, 0x0f, 0xd6); /*MOVQ addr[src_reg_a + src_reg_b << shift], XMMx*/
- codegen_addbyte2(block, 0x84 | (src_reg << 3), src_reg_a | (src_reg_b << 3) | (shift << 6));
- codegen_addlong(block, addr);
- }
-}
-void host_x86_MOVQ_BASE_INDEX_XREG(codeblock_t *block, int base_reg, int idx_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0xd6, 0x04 | (src_reg << 3)); /*MOVQ XMMx, [base_reg + idx_reg]*/
- codegen_addbyte(block, base_reg | (idx_reg << 3));
-}
-void host_x86_MOVQ_BASE_OFFSET_XREG(codeblock_t *block, int base_reg, int offset, int src_reg)
-{
- if (offset >= -128 && offset < 127)
- {
- if (base_reg == REG_ESP)
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte4(block, 0x66, 0x0f, 0xd6, 0x44 | (src_reg << 3)); /*MOVQ [ESP + offset], XMMx*/
- codegen_addbyte2(block, 0x24, offset);
- }
- else
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0xd6, 0x40 | base_reg | (src_reg << 3)); /*MOVQ [base_reg + offset], XMMx*/
- codegen_addbyte(block, offset);
- }
- }
- else
- fatal("MOVQ_BASE_OFFSET_XREG - offset %i\n", offset);
-}
-void host_x86_MOVQ_STACK_OFFSET_XREG(codeblock_t *block, int offset, int src_reg)
-{
- if (!offset)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0xd6, 0x04 | (src_reg << 3)); /*MOVQ [ESP], src_reg*/
- codegen_addbyte(block, 0x24);
- }
- else if (offset >= -0x80 && offset < 0x80)
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte4(block, 0x66, 0x0f, 0xd6, 0x44 | (src_reg << 3)); /*MOVQ offset[ESP], src_reg*/
- codegen_addbyte2(block, 0x24, offset & 0xff);
- }
- else
- {
- codegen_alloc_bytes(block, 9);
- codegen_addbyte4(block, 0x66, 0x0f, 0xd6, 0x84 | (src_reg << 3)); /*MOVQ offset[ESP], src_reg*/
- codegen_addbyte(block, 0x24);
- codegen_addlong(block, offset);
- }
-
-}
-
-void host_x86_MOVQ_XREG_ABS(codeblock_t *block, int dst_reg, void *p)
-{
- int offset = (uintptr_t)p - (((uintptr_t)&cpu_state) + 128);
-
- if (offset >= -128 && offset < 127)
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x7e, 0x45 | (dst_reg << 3)); /*MOVQ offset[EBP], src_reg*/
- codegen_addbyte(block, offset);
- }
- else
- {
- codegen_alloc_bytes(block, 8);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x7e, 0x05 | (dst_reg << 3)); /*MOVQ [p], src_reg*/
- codegen_addlong(block, (uint32_t)p);
- }
-}
-void host_x86_MOVQ_XREG_ABS_REG_REG_SHIFT(codeblock_t *block, int dst_reg, uint32_t addr, int src_reg_a, int src_reg_b, int shift)
-{
- if (addr < 0x80 || addr >= 0xffffff80)
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte3(block, 0xf3, 0x0f, 0x7e); /*MOVQ XMMx, addr[src_reg_a + src_reg_b << shift]*/
- codegen_addbyte3(block, 0x44 | (dst_reg << 3), src_reg_a | (src_reg_b << 3) | (shift << 6), addr & 0xff);
- }
- else
- {
- codegen_alloc_bytes(block, 9);
- codegen_addbyte3(block, 0xf3, 0x0f, 0x7e); /*MOVQ XMMx, addr[src_reg_a + src_reg_b << shift]*/
- codegen_addbyte2(block, 0x84 | (dst_reg << 3), src_reg_a | (src_reg_b << 3) | (shift << 6));
- codegen_addlong(block, addr);
- }
-}
-void host_x86_MOVQ_XREG_BASE_INDEX(codeblock_t *block, int dst_reg, int base_reg, int idx_reg)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x7e, 0x04 | (dst_reg << 3)); /*MOVQ XMMx, [base_reg + idx_reg]*/
- codegen_addbyte(block, base_reg | (idx_reg << 3));
-}
-void host_x86_MOVQ_XREG_BASE_OFFSET(codeblock_t *block, int dst_reg, int base_reg, int offset)
-{
- if (offset >= -128 && offset < 127)
- {
- if (base_reg == REG_ESP)
- {
- codegen_alloc_bytes(block, 6);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x7e, 0x44 | (dst_reg << 3)); /*MOVQ XMMx, [ESP + offset]*/
- codegen_addbyte2(block, 0x24, offset);
- }
- else
- {
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x7e, 0x40 | base_reg | (dst_reg << 3)); /*MOVQ XMMx, [base_reg + offset]*/
- codegen_addbyte(block, offset);
- }
- }
- else
- fatal("MOVQ_REG_BASE_OFFSET - offset %i\n", offset);
-}
-void host_x86_MOVQ_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x7e, 0xc0 | src_reg | (dst_reg << 3)); /*MOVQ dst_reg, src_reg*/
-}
-
-void host_x86_MAXPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0x5f, 0xc0 | src_reg | (dst_reg << 3)); /*MAXPS dst_reg, src_reg*/
-}
-void host_x86_MINPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0x5d, 0xc0 | src_reg | (dst_reg << 3)); /*MINPS dst_reg, src_reg*/
-}
-
-void host_x86_MULPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0x59, 0xc0 | src_reg | (dst_reg << 3)); /*MULPS dst_reg, src_reg*/
-}
-void host_x86_MULSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf2, 0x0f, 0x59, 0xc0 | src_reg | (dst_reg << 3));
-}
-
-void host_x86_PACKSSWB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 9);
- codegen_addbyte4(block, 0x66, 0x0f, 0x63, 0xc0 | src_reg | (dst_reg << 3)); /*PACKSSWB dst_reg, src_reg*/
- codegen_addbyte4(block, 0x66, 0x0f, 0x70, 0xc0 | dst_reg | (dst_reg << 3)); /*PSHUFD dst_reg, dst_reg, 0x88 (move bits 64-95 to 32-63)*/
- codegen_addbyte(block, 0x88);
-}
-void host_x86_PACKSSDW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 9);
- codegen_addbyte4(block, 0x66, 0x0f, 0x6b, 0xc0 | src_reg | (dst_reg << 3)); /*PACKSSDW dst_reg, src_reg*/
- codegen_addbyte4(block, 0x66, 0x0f, 0x70, 0xc0 | dst_reg | (dst_reg << 3)); /*PSHUFD dst_reg, dst_reg, 0x88 (move bits 64-95 to 32-63)*/
- codegen_addbyte(block, 0x88);
-}
-void host_x86_PACKUSWB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 9);
- codegen_addbyte4(block, 0x66, 0x0f, 0x67, 0xc0 | src_reg | (dst_reg << 3)); /*PACKUSWB dst_reg, src_reg*/
- codegen_addbyte4(block, 0x66, 0x0f, 0x70, 0xc0 | dst_reg | (dst_reg << 3)); /*PSHUFD dst_reg, dst_reg, 0x88 (move bits 64-95 to 32-63)*/
- codegen_addbyte(block, 0x88);
-}
-
-void host_x86_PADDB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xfc, 0xc0 | src_reg | (dst_reg << 3)); /*PADDB dst_reg, src_reg*/
-}
-void host_x86_PADDW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xfd, 0xc0 | src_reg | (dst_reg << 3)); /*PADDW dst_reg, src_reg*/
-}
-void host_x86_PADDD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xfe, 0xc0 | src_reg | (dst_reg << 3)); /*PADDD dst_reg, src_reg*/
-}
-void host_x86_PADDSB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xec, 0xc0 | src_reg | (dst_reg << 3)); /*PADDSB dst_reg, src_reg*/
-}
-void host_x86_PADDSW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xed, 0xc0 | src_reg | (dst_reg << 3)); /*PADDSW dst_reg, src_reg*/
-}
-void host_x86_PADDUSB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xdc, 0xc0 | src_reg | (dst_reg << 3)); /*PADDUSB dst_reg, src_reg*/
-}
-void host_x86_PADDUSW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xdd, 0xc0 | src_reg | (dst_reg << 3)); /*PADDUSW dst_reg, src_reg*/
-}
-
-void host_x86_PAND_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xdb, 0xc0 | src_reg | (dst_reg << 3)); /*PAND dst_reg, src_reg*/
-}
-void host_x86_PANDN_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xdf, 0xc0 | src_reg | (dst_reg << 3)); /*PANDN dst_reg, src_reg*/
-}
-void host_x86_POR_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xeb, 0xc0 | src_reg | (dst_reg << 3)); /*POR dst_reg, src_reg*/
-}
-void host_x86_PXOR_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xef, 0xc0 | src_reg | (dst_reg << 3)); /*PXOR dst_reg, src_reg*/
-}
-
-void host_x86_PCMPEQB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x74, 0xc0 | src_reg | (dst_reg << 3)); /*PCMPEQB dst_reg, src_reg*/
-}
-void host_x86_PCMPEQW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x75, 0xc0 | src_reg | (dst_reg << 3)); /*PCMPEQW dst_reg, src_reg*/
-}
-void host_x86_PCMPEQD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x76, 0xc0 | src_reg | (dst_reg << 3)); /*PCMPEQD dst_reg, src_reg*/
-}
-void host_x86_PCMPGTB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x64, 0xc0 | src_reg | (dst_reg << 3)); /*PCMPGTB dst_reg, src_reg*/
-}
-void host_x86_PCMPGTW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x65, 0xc0 | src_reg | (dst_reg << 3)); /*PCMPGTW dst_reg, src_reg*/
-}
-void host_x86_PCMPGTD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x66, 0xc0 | src_reg | (dst_reg << 3)); /*PCMPGTD dst_reg, src_reg*/
-}
-
-void host_x86_PMADDWD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xf5, 0xc0 | src_reg | (dst_reg << 3)); /*PMULLW dst_reg, src_reg*/
-}
-void host_x86_PMULHW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xe5, 0xc0 | src_reg | (dst_reg << 3)); /*PMULLW dst_reg, src_reg*/
-}
-void host_x86_PMULLW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xd5, 0xc0 | src_reg | (dst_reg << 3)); /*PMULLW dst_reg, src_reg*/
-}
-
-void host_x86_PSHUFD_XREG_XREG_IMM(codeblock_t *block, int dst_reg, int src_reg, uint8_t shuffle)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x70, 0xc0 | src_reg | (dst_reg << 3)); /*PSHUFD dst_reg, dst_reg, 0xee (move top 64-bits to low 64-bits)*/
- codegen_addbyte(block, shuffle);
-}
-
-void host_x86_PSLLW_XREG_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x71, 0xc0 | 0x30 | dst_reg); /*PSLLW dst_reg, imm*/
- codegen_addbyte(block, shift);
-}
-void host_x86_PSLLD_XREG_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x72, 0xc0 | 0x30 | dst_reg); /*PSLLD dst_reg, imm*/
- codegen_addbyte(block, shift);
-}
-void host_x86_PSLLQ_XREG_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x73, 0xc0 | 0x30 | dst_reg); /*PSLLD dst_reg, imm*/
- codegen_addbyte(block, shift);
-}
-void host_x86_PSRAW_XREG_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x71, 0xc0 | 0x20 | dst_reg); /*PSRAW dst_reg, imm*/
- codegen_addbyte(block, shift);
-}
-void host_x86_PSRAD_XREG_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x72, 0xc0 | 0x20 | dst_reg); /*PSRAD dst_reg, imm*/
- codegen_addbyte(block, shift);
-}
-void host_x86_PSRAQ_XREG_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x73, 0xc0 | 0x20 | dst_reg); /*PSRAD dst_reg, imm*/
- codegen_addbyte(block, shift);
-}
-void host_x86_PSRLW_XREG_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x71, 0xc0 | 0x10 | dst_reg); /*PSRLW dst_reg, imm*/
- codegen_addbyte(block, shift);
-}
-void host_x86_PSRLD_XREG_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x72, 0xc0 | 0x10 | dst_reg); /*PSRLD dst_reg, imm*/
- codegen_addbyte(block, shift);
-}
-void host_x86_PSRLQ_XREG_IMM(codeblock_t *block, int dst_reg, int shift)
-{
- codegen_alloc_bytes(block, 5);
- codegen_addbyte4(block, 0x66, 0x0f, 0x73, 0xc0 | 0x10 | dst_reg); /*PSRLD dst_reg, imm*/
- codegen_addbyte(block, shift);
-}
-
-void host_x86_PSUBB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xf8, 0xc0 | src_reg | (dst_reg << 3)); /*PADDB dst_reg, src_reg*/
-}
-void host_x86_PSUBW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xf9, 0xc0 | src_reg | (dst_reg << 3)); /*PADDW dst_reg, src_reg*/
-}
-void host_x86_PSUBD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xfa, 0xc0 | src_reg | (dst_reg << 3)); /*PADDD dst_reg, src_reg*/
-}
-void host_x86_PSUBSB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xe8, 0xc0 | src_reg | (dst_reg << 3)); /*PSUBSB dst_reg, src_reg*/
-}
-void host_x86_PSUBSW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xe9, 0xc0 | src_reg | (dst_reg << 3)); /*PSUBSW dst_reg, src_reg*/
-}
-void host_x86_PSUBUSB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xd8, 0xc0 | src_reg | (dst_reg << 3)); /*PSUBUSB dst_reg, src_reg*/
-}
-void host_x86_PSUBUSW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0xd9, 0xc0 | src_reg | (dst_reg << 3)); /*PSUBUSW dst_reg, src_reg*/
-}
-
-void host_x86_PUNPCKLBW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x60, 0xc0 | src_reg | (dst_reg << 3)); /*PUNPCKLBW dst_reg, src_reg*/
-}
-void host_x86_PUNPCKLWD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x61, 0xc0 | src_reg | (dst_reg << 3)); /*PUNPCKLWD dst_reg, src_reg*/
-}
-void host_x86_PUNPCKLDQ_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0x66, 0x0f, 0x62, 0xc0 | src_reg | (dst_reg << 3)); /*PUNPCKLDQ dst_reg, src_reg*/
-}
-
-void host_x86_SQRTSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf2, 0x0f, 0x51, 0xc0 | src_reg | (dst_reg << 3)); /*SQRTSD dst_reg, src_reg*/
-}
-void host_x86_SQRTSS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf3, 0x0f, 0x51, 0xc0 | src_reg | (dst_reg << 3)); /*SQRTSS dst_reg, src_reg*/
-}
-
-void host_x86_SUBPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0x5c, 0xc0 | src_reg | (dst_reg << 3)); /*SUBPS dst_reg, src_reg*/
-}
-void host_x86_SUBSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 4);
- codegen_addbyte4(block, 0xf2, 0x0f, 0x5c, 0xc0 | src_reg | (dst_reg << 3));
-}
-
-void host_x86_UNPCKLPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg)
-{
- codegen_alloc_bytes(block, 3);
- codegen_addbyte3(block, 0x0f, 0x14, 0xc0 | src_reg | (dst_reg << 3));
-}
-
-#endif
diff --git a/src/codegen_backend_x86_ops_sse.h b/src/codegen_backend_x86_ops_sse.h
deleted file mode 100644
index e8afdcb..0000000
--- a/src/codegen_backend_x86_ops_sse.h
+++ /dev/null
@@ -1,111 +0,0 @@
-void host_x86_ADDPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_ADDSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-#define CMPPS_EQ 0
-#define CMPPS_NLT 5
-#define CMPPS_NLE 6
-void host_x86_CMPPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg, int type);
-
-void host_x86_COMISD_XREG_XREG(codeblock_t *block, int src_reg_a, int src_reg_b);
-
-void host_x86_CVTDQ2PS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_CVTPS2DQ_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_CVTSD2SI_REG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_CVTSD2SS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_CVTSI2SD_XREG_REG(codeblock_t *block, int dest_reg, int src_reg);
-void host_x86_CVTSI2SS_XREG_REG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_CVTSS2SD_XREG_XREG(codeblock_t *block, int dest_reg, int src_reg);
-void host_x86_CVTSS2SD_XREG_BASE_INDEX(codeblock_t *block, int dst_reg, int base_reg, int idx_reg);
-
-void host_x86_DIVSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_DIVSS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_LDMXCSR(codeblock_t *block, void *p);
-
-void host_x86_MAXSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_MOVD_BASE_INDEX_XREG(codeblock_t *block, int base_reg, int idx_reg, int src_reg);
-void host_x86_MOVD_REG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MOVD_XREG_BASE_INDEX(codeblock_t *block, int dst_reg, int base_reg, int idx_reg);
-void host_x86_MOVD_XREG_REG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_MOVQ_ABS_XREG(codeblock_t *block, void *p, int src_reg);
-void host_x86_MOVQ_ABS_REG_REG_SHIFT_XREG(codeblock_t *block, uint32_t addr, int src_reg_a, int src_reg_b, int shift, int src_reg);
-void host_x86_MOVQ_BASE_INDEX_XREG(codeblock_t *block, int base_reg, int idx_reg, int src_reg);
-void host_x86_MOVQ_BASE_OFFSET_XREG(codeblock_t *block, int base_reg, int offset, int src_reg);
-void host_x86_MOVQ_STACK_OFFSET_XREG(codeblock_t *block, int offset, int src_reg);
-
-void host_x86_MOVQ_XREG_ABS(codeblock_t *block, int dst_reg, void *p);
-void host_x86_MOVQ_XREG_ABS_REG_REG_SHIFT(codeblock_t *block, int dst_reg, uint32_t addr, int src_reg_a, int src_reg_b, int shift);
-void host_x86_MOVQ_XREG_BASE_INDEX(codeblock_t *block, int dst_reg, int base_reg, int idx_reg);
-void host_x86_MOVQ_XREG_BASE_OFFSET(codeblock_t *block, int dst_reg, int base_reg, int offset);
-void host_x86_MOVQ_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_MAXPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MINPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_MULPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_MULSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_PACKSSWB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PACKSSDW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PACKUSWB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_PADDB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PADDW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PADDD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PADDSB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PADDSW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PADDUSB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PADDUSW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_PAND_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PANDN_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_POR_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PXOR_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_PCMPEQB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PCMPEQW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PCMPEQD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PCMPGTB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PCMPGTW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PCMPGTD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_PMADDWD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PMULHW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PMULLW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_PSLLW_XREG_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_PSLLD_XREG_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_PSLLQ_XREG_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_PSRAW_XREG_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_PSRAD_XREG_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_PSRAQ_XREG_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_PSRLW_XREG_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_PSRLD_XREG_IMM(codeblock_t *block, int dst_reg, int shift);
-void host_x86_PSRLQ_XREG_IMM(codeblock_t *block, int dst_reg, int shift);
-
-void host_x86_PSHUFD_XREG_XREG_IMM(codeblock_t *block, int dst_reg, int src_reg, uint8_t shuffle);
-
-void host_x86_PSUBB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PSUBW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PSUBD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PSUBSB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PSUBSW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PSUBUSB_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PSUBUSW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_PUNPCKLBW_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PUNPCKLWD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_PUNPCKLDQ_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_SQRTSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_SQRTSS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_SUBPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-void host_x86_SUBSD_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
-
-void host_x86_UNPCKLPS_XREG_XREG(codeblock_t *block, int dst_reg, int src_reg);
diff --git a/src/codegen_backend_x86_uops.c b/src/codegen_backend_x86_uops.c
deleted file mode 100644
index 94092c3..0000000
--- a/src/codegen_backend_x86_uops.c
+++ /dev/null
@@ -1,3165 +0,0 @@
-#if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined WIN32 || defined _WIN32 || defined _WIN32
-
-#include "ibm.h"
-#include "x86.h"
-#include "x87.h"
-#include "386_common.h"
-#include "codegen.h"
-#include "codegen_allocator.h"
-#include "codegen_backend.h"
-#include "codegen_backend_x86_defs.h"
-#include "codegen_backend_x86_ops.h"
-#include "codegen_backend_x86_ops_fpu.h"
-#include "codegen_backend_x86_ops_sse.h"
-#include "codegen_ir_defs.h"
-
-/*void codegen_debug()
-{
- pclog(" %04x:%04x : %08x %08x %08x %08x\n", CS, cpu_state.pc, AX, BX, CX, DX);
-}*/
-
-#define HOST_REG_IS_L(reg) (IREG_GET_SIZE(reg) == IREG_SIZE_L)
-#define HOST_REG_IS_W(reg) (IREG_GET_SIZE(reg) == IREG_SIZE_W)
-#define HOST_REG_IS_B(reg) (IREG_GET_SIZE(reg) == IREG_SIZE_B && IREG_GET_REG(reg) < 4)
-#define HOST_REG_IS_BH(reg) (IREG_GET_SIZE(reg) == IREG_SIZE_BH && IREG_GET_REG(reg) < 4)
-
-#define HOST_REG_GET(reg) ((IREG_GET_SIZE(reg) == IREG_SIZE_BH) ? (IREG_GET_REG((reg) & 3) | 4) : (IREG_GET_REG(reg) & 7))
-
-#define REG_IS_L(size) (size == IREG_SIZE_L)
-#define REG_IS_W(size) (size == IREG_SIZE_W)
-#define REG_IS_B(size) (size == IREG_SIZE_B || size == IREG_SIZE_BH)
-#define REG_IS_BH(size) (size == IREG_SIZE_BH)
-#define REG_IS_D(size) (size == IREG_SIZE_D)
-#define REG_IS_Q(size) (size == IREG_SIZE_Q)
-
-static int codegen_ADD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_LEA_REG_REG(block, dest_reg, src_reg_a, src_reg_b);
- else
- host_x86_ADD32_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg_a);
- host_x86_ADD16_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg_a);
- host_x86_ADD8_REG_REG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("ADD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_ADD_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_LEA_REG_IMM(block, dest_reg, src_reg, uop->imm_data);
- else
- host_x86_ADD32_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_ADD16_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_ADD8_REG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("ADD_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_ADD_LSHIFT(codeblock_t *block, uop_t *uop)
-{
- if (!uop->imm_data)
- {
- if (uop->dest_reg_a_real == uop->src_reg_a_real)
- host_x86_ADD32_REG_REG(block, uop->dest_reg_a_real, uop->src_reg_b_real);
- else
- host_x86_LEA_REG_REG(block, uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
- }
- else if (uop->imm_data < 4)
- host_x86_LEA_REG_REG_SHIFT(block, uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real, uop->imm_data);
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_ADD_LSHIFT - shift out of range %i\n", uop->imm_data);
-#endif
- return 0;
-}
-
-static int codegen_AND(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PAND_XREG_XREG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg_a);
- host_x86_AND32_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg_a);
- host_x86_AND16_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg_a);
- host_x86_AND8_REG_REG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("AND %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_AND_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_AND32_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_AND16_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_AND8_REG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("AND_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_ANDN(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), /*src_reg_a = HOST_REG_GET(uop->src_reg_a_real), */src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PANDN_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("ANDN %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_CALL_FUNC(codeblock_t *block, uop_t *uop)
-{
- host_x86_CALL(block, uop->p);
-
- return 0;
-}
-
-static int codegen_CALL_FUNC_RESULT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
-#ifdef RECOMPILER_DEBUG
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (!REG_IS_L(dest_size))
- fatal("CALL_FUNC_RESULT %02x\n", uop->dest_reg_a_real);
-#endif
- host_x86_CALL(block, uop->p);
- host_x86_MOV32_REG_REG(block, dest_reg, REG_EAX);
-
- return 0;
-}
-
-static int codegen_CALL_INSTRUCTION_FUNC(codeblock_t *block, uop_t *uop)
-{
- host_x86_CALL(block, uop->p);
- host_x86_TEST32_REG(block, REG_EAX, REG_EAX);
- host_x86_JNZ(block, codegen_exit_rout);
-// host_x86_CALL(block, codegen_debug);
-
- return 0;
-}
-
-static int codegen_CMP_IMM_JZ(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_x86_CMP32_REG_IMM(block, src_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_IMM_JZ %02x\n", uop->src_reg_a_real);
-#endif
- host_x86_JZ(block, uop->p);
-
- return 0;
-}
-
-static int codegen_CMP_IMM_JNZ_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_x86_CMP32_REG_IMM(block, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(src_size))
- {
- host_x86_CMP16_REG_IMM(block, src_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_IMM_JNZ_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JNZ_long(block);
-
- return 0;
-}
-static int codegen_CMP_IMM_JZ_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_x86_CMP32_REG_IMM(block, src_reg, uop->imm_data);
- }
- else if (REG_IS_W(src_size))
- {
- host_x86_CMP16_REG_IMM(block, src_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_IMM_JZ_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JZ_long(block);
-
- return 0;
-}
-
-static int codegen_CMP_JB(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
- uint32_t *jump_p;
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JB %02x\n", uop->src_reg_a_real);
-#endif
- jump_p = host_x86_JB_long(block);
- *jump_p = (uintptr_t)uop->p - ((uintptr_t)jump_p + 4);
-
- return 0;
-}
-static int codegen_CMP_JNBE(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
- uint32_t *jump_p;
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JNBE %02x\n", uop->src_reg_a_real);
-#endif
- jump_p = host_x86_JNBE_long(block);
- *jump_p = (uintptr_t)uop->p - ((uintptr_t)jump_p + 4);
-
- return 0;
-}
-
-static int codegen_CMP_JNB_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JNB_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JNB_long(block);
-
- return 0;
-}
-static int codegen_CMP_JNBE_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JNBE_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JNBE_long(block);
-
- return 0;
-}
-static int codegen_CMP_JNL_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JNL_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JNL_long(block);
-
- return 0;
-}
-static int codegen_CMP_JNLE_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JNLE_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JNLE_long(block);
-
- return 0;
-}
-static int codegen_CMP_JNO_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JNO_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JNO_long(block);
-
- return 0;
-}
-static int codegen_CMP_JNZ_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JNZ_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JNZ_long(block);
-
- return 0;
-}
-static int codegen_CMP_JB_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JB_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JB_long(block);
-
- return 0;
-}
-static int codegen_CMP_JBE_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JBE_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JBE_long(block);
-
- return 0;
-}
-static int codegen_CMP_JL_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JL_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JL_long(block);
-
- return 0;
-}
-static int codegen_CMP_JLE_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JLE_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JLE_long(block);
-
- return 0;
-}
-static int codegen_CMP_JO_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JO_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JO_long(block);
-
- return 0;
-}
-static int codegen_CMP_JZ_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- host_x86_CMP32_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- host_x86_CMP16_REG_REG(block, src_reg_a, src_reg_b);
- }
- else if (REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- host_x86_CMP8_REG_REG(block, src_reg_a, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("CMP_JZ_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JZ_long(block);
-
- return 0;
-}
-
-static int codegen_FABS(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && dest_reg == src_reg_a)
- {
- host_x86_PXOR_XREG_XREG(block, REG_XMM_TEMP, REG_XMM_TEMP);
- host_x86_SUBSD_XREG_XREG(block, REG_XMM_TEMP, dest_reg);
- host_x86_MAXSD_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_FABS %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_FCHS(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a))
- {
- host_x86_MOVQ_XREG_XREG(block, REG_XMM_TEMP, src_reg_a);
- host_x86_PXOR_XREG_XREG(block, dest_reg, dest_reg);
- host_x86_SUBSD_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_FCHS %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_FSQRT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a))
- {
- host_x86_SQRTSD_XREG_XREG(block, dest_reg, src_reg_a);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_FSQRT %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_FTST(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_W(dest_size) && REG_IS_D(src_size_a))
- {
- host_x86_PXOR_XREG_XREG(block, REG_XMM_TEMP, REG_XMM_TEMP);
- if (dest_reg != REG_EAX)
- host_x86_MOV32_REG_REG(block, REG_ECX, REG_EAX);
- host_x86_XOR32_REG_REG(block, REG_EAX, REG_EAX);
- host_x86_COMISD_XREG_XREG(block, src_reg_a, REG_XMM_TEMP);
- host_x86_LAHF(block);
- host_x86_AND16_REG_IMM(block, REG_EAX, C0|C2|C3);
- if (dest_reg != REG_EAX)
- {
- host_x86_MOV16_REG_REG(block, dest_reg, REG_EAX);
- host_x86_MOV32_REG_REG(block, REG_EAX, REG_ECX);
- }
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_FTST %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_FADD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b) && dest_reg == src_reg_a)
- {
- host_x86_ADDSD_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_FADD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_FCOM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_W(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b))
- {
- if (dest_reg != REG_EAX)
- host_x86_MOV32_REG_REG(block, REG_ECX, REG_EAX);
- host_x86_XOR32_REG_REG(block, REG_EAX, REG_EAX);
- host_x86_COMISD_XREG_XREG(block, src_reg_a, src_reg_b);
- host_x86_LAHF(block);
- host_x86_AND16_REG_IMM(block, REG_EAX, C0|C2|C3);
- if (dest_reg != REG_EAX)
- {
- host_x86_MOV16_REG_REG(block, dest_reg, REG_EAX);
- host_x86_MOV32_REG_REG(block, REG_EAX, REG_ECX);
- }
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_FCOM %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_FDIV(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b) && dest_reg == src_reg_a)
- {
- host_x86_DIVSD_XREG_XREG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b))
- {
- host_x86_MOVQ_XREG_XREG(block, REG_XMM_TEMP, src_reg_a);
- host_x86_DIVSD_XREG_XREG(block, REG_XMM_TEMP, src_reg_b);
- host_x86_MOVQ_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_FDIV %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_FMUL(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b) && dest_reg == src_reg_a)
- {
- host_x86_MULSD_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_FMUL %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_FSUB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b) && dest_reg == src_reg_a)
- {
- host_x86_SUBSD_XREG_XREG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_D(dest_size) && REG_IS_D(src_size_a) && REG_IS_D(src_size_b))
- {
- host_x86_MOVQ_XREG_XREG(block, REG_XMM_TEMP, src_reg_a);
- host_x86_SUBSD_XREG_XREG(block, REG_XMM_TEMP, src_reg_b);
- host_x86_MOVQ_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_FSUB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_FP_ENTER(codeblock_t *block, uop_t *uop)
-{
- uint32_t *branch_offset;
-
- host_x86_MOV32_REG_ABS(block, REG_ECX, &cr0);
- host_x86_TEST32_REG_IMM(block, REG_ECX, 0xc);
- branch_offset = host_x86_JZ_long(block);
- host_x86_MOV32_ABS_IMM(block, &cpu_state.oldpc, uop->imm_data);
- host_x86_MOV32_STACK_IMM(block, STACK_ARG0, 7);
- host_x86_CALL(block, x86_int);
- host_x86_JMP(block, codegen_exit_rout);
- *branch_offset = (uint32_t)((uintptr_t)&block_write_data[block_pos] - (uintptr_t)branch_offset) - 4;
-
- return 0;
-}
-
-static int codegen_MMX_ENTER(codeblock_t *block, uop_t *uop)
-{
- uint32_t *branch_offset;
-
- host_x86_MOV32_REG_ABS(block, REG_ECX, &cr0);
- host_x86_TEST32_REG_IMM(block, REG_ECX, 0xc);
- branch_offset = host_x86_JZ_long(block);
- host_x86_MOV32_ABS_IMM(block, &cpu_state.oldpc, uop->imm_data);
- host_x86_MOV32_STACK_IMM(block, STACK_ARG0, 7);
- host_x86_CALL(block, x86_int);
- host_x86_JMP(block, codegen_exit_rout);
- *branch_offset = (uint32_t)((uintptr_t)&block_write_data[block_pos] - (uintptr_t)branch_offset) - 4;
- host_x86_MOV32_ABS_IMM(block, &cpu_state.tag[0], 0x01010101);
- host_x86_MOV32_ABS_IMM(block, &cpu_state.tag[4], 0x01010101);
- host_x86_MOV32_ABS_IMM(block, &cpu_state.TOP, 0);
- host_x86_MOV8_ABS_IMM(block, &cpu_state.ismmx, 1);
-
- return 0;
-}
-
-static int codegen_JMP(codeblock_t *block, uop_t *uop)
-{
- host_x86_JMP(block, uop->p);
-
- return 0;
-}
-static int codegen_JMP_DEST(codeblock_t *block, uop_t *uop)
-{
- uop->p = host_x86_JMP_long(block);
-
- return 0;
-}
-
-static int codegen_LOAD_FUNC_ARG0(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_W(src_size))
- {
- host_x86_MOV16_STACK_REG(block, STACK_ARG0, src_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("codegen_LOAD_FUNC_ARG0 %02x\n", uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG1(codeblock_t *block, uop_t *uop)
-{
-#ifdef RECOMPILER_DEBUG
- fatal("codegen_LOAD_FUNC_ARG1 %02x\n", uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG2(codeblock_t *block, uop_t *uop)
-{
-#ifdef RECOMPILER_DEBUG
- fatal("codegen_LOAD_FUNC_ARG2 %02x\n", uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG3(codeblock_t *block, uop_t *uop)
-{
-#ifdef RECOMPILER_DEBUG
- fatal("codegen_LOAD_FUNC_ARG3 %02x\n", uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_LOAD_FUNC_ARG0_IMM(codeblock_t *block, uop_t *uop)
-{
- host_x86_MOV32_STACK_IMM(block, STACK_ARG0, uop->imm_data);
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG1_IMM(codeblock_t *block, uop_t *uop)
-{
- host_x86_MOV32_STACK_IMM(block, STACK_ARG1, uop->imm_data);
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG2_IMM(codeblock_t *block, uop_t *uop)
-{
- host_x86_MOV32_STACK_IMM(block, STACK_ARG2, uop->imm_data);
- return 0;
-}
-static int codegen_LOAD_FUNC_ARG3_IMM(codeblock_t *block, uop_t *uop)
-{
- host_x86_MOV32_STACK_IMM(block, STACK_ARG3, uop->imm_data);
- return 0;
-}
-
-static int codegen_LOAD_SEG(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
-#ifdef RECOMPILER_DEBUG
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (!REG_IS_W(src_size))
- fatal("LOAD_SEG %02x %p\n", uop->src_reg_a_real, uop->p);
-#endif
- host_x86_MOV16_STACK_REG(block, STACK_ARG0, src_reg);
- host_x86_MOV32_STACK_IMM(block, STACK_ARG1, (uint32_t)uop->p);
- host_x86_CALL(block, loadseg);
- host_x86_TEST32_REG(block, REG_EAX, REG_EAX);
- host_x86_JNZ(block, codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_MEM_LOAD_ABS(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), seg_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- host_x86_LEA_REG_IMM(block, REG_ESI, seg_reg, uop->imm_data);
- if (REG_IS_B(dest_size))
- {
- host_x86_CALL(block, codegen_mem_load_byte);
- }
- else if (REG_IS_W(dest_size))
- {
- host_x86_CALL(block, codegen_mem_load_word);
- }
- else if (REG_IS_L(dest_size))
- {
- host_x86_CALL(block, codegen_mem_load_long);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MEM_LOAD_ABS - %02x\n", uop->dest_reg_a_real);
-#endif
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
- if (REG_IS_B(dest_size))
- {
- host_x86_MOV8_REG_REG(block, dest_reg, REG_ECX);
- }
- else if (REG_IS_W(dest_size))
- {
- host_x86_MOV16_REG_REG(block, dest_reg, REG_ECX);
- }
- else if (REG_IS_L(dest_size))
- {
- host_x86_MOV32_REG_REG(block, dest_reg, REG_ECX);
- }
-
- return 0;
-}
-static int codegen_MEM_LOAD_REG(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- host_x86_LEA_REG_REG(block, REG_ESI, seg_reg, addr_reg);
- if (uop->imm_data)
- host_x86_ADD32_REG_IMM(block, REG_ESI, uop->imm_data);
- if (REG_IS_B(dest_size))
- {
- host_x86_CALL(block, codegen_mem_load_byte);
- }
- else if (REG_IS_W(dest_size))
- {
- host_x86_CALL(block, codegen_mem_load_word);
- }
- else if (REG_IS_L(dest_size))
- {
- host_x86_CALL(block, codegen_mem_load_long);
- }
- else if (REG_IS_Q(dest_size))
- {
- host_x86_CALL(block, codegen_mem_load_quad);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MEM_LOAD_REG - %02x\n", uop->dest_reg_a_real);
-#endif
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
- if (REG_IS_B(dest_size))
- {
- host_x86_MOV8_REG_REG(block, dest_reg, REG_ECX);
- }
- else if (REG_IS_W(dest_size))
- {
- host_x86_MOV16_REG_REG(block, dest_reg, REG_ECX);
- }
- else if (REG_IS_L(dest_size))
- {
- host_x86_MOV32_REG_REG(block, dest_reg, REG_ECX);
- }
- else if (REG_IS_Q(dest_size))
- {
- host_x86_MOVQ_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
- }
-
- return 0;
-}
-static int codegen_MEM_LOAD_SINGLE(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
-#ifdef RECOMPILER_DEBUG
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (!REG_IS_D(dest_size))
- fatal("MEM_LOAD_SINGLE - %02x\n", uop->dest_reg_a_real);
-#endif
- host_x86_LEA_REG_REG(block, REG_ESI, seg_reg, addr_reg);
- if (uop->imm_data)
- host_x86_ADD32_REG_IMM(block, REG_ESI, uop->imm_data);
- host_x86_CALL(block, codegen_mem_load_single);
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
- host_x86_MOVQ_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
-
- return 0;
-}
-
-static int codegen_MEM_LOAD_DOUBLE(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
-#ifdef RECOMPILER_DEBUG
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (!REG_IS_D(dest_size))
- fatal("MEM_LOAD_DOUBLE - %02x\n", uop->dest_reg_a_real);
-#endif
- host_x86_LEA_REG_REG(block, REG_ESI, seg_reg, addr_reg);
- if (uop->imm_data)
- host_x86_ADD32_REG_IMM(block, REG_ESI, uop->imm_data);
- host_x86_CALL(block, codegen_mem_load_double);
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
- host_x86_MOVQ_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
-
- return 0;
-}
-
-static int codegen_MEM_STORE_ABS(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_b_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_b_real);
-
- host_x86_LEA_REG_IMM(block, REG_ESI, seg_reg, uop->imm_data);
- if (REG_IS_B(src_size))
- {
- host_x86_MOV8_REG_REG(block, REG_ECX, src_reg);
- host_x86_CALL(block, codegen_mem_store_byte);
- }
- else if (REG_IS_W(src_size))
- {
- host_x86_MOV16_REG_REG(block, REG_ECX, src_reg);
- host_x86_CALL(block, codegen_mem_store_word);
- }
- else if (REG_IS_L(src_size))
- {
- host_x86_MOV32_REG_REG(block, REG_ECX, src_reg);
- host_x86_CALL(block, codegen_mem_store_long);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MEM_STORE_ABS - %02x\n", uop->src_reg_b_real);
-#endif
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_MEM_STORE_REG(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real), src_reg = HOST_REG_GET(uop->src_reg_c_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_c_real);
-
- host_x86_LEA_REG_REG(block, REG_ESI, seg_reg, addr_reg);
- if (uop->imm_data)
- host_x86_ADD32_REG_IMM(block, REG_ESI, uop->imm_data);
- if (REG_IS_B(src_size))
- {
- host_x86_MOV8_REG_REG(block, REG_ECX, src_reg);
- host_x86_CALL(block, codegen_mem_store_byte);
- }
- else if (REG_IS_W(src_size))
- {
- host_x86_MOV16_REG_REG(block, REG_ECX, src_reg);
- host_x86_CALL(block, codegen_mem_store_word);
- }
- else if (REG_IS_L(src_size))
- {
- host_x86_MOV32_REG_REG(block, REG_ECX, src_reg);
- host_x86_CALL(block, codegen_mem_store_long);
- }
- else if (REG_IS_Q(src_size))
- {
- host_x86_MOVQ_XREG_XREG(block, REG_XMM_TEMP, src_reg);
- host_x86_CALL(block, codegen_mem_store_quad);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MEM_STORE_REG - %02x\n", uop->src_reg_b_real);
-#endif
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_MEM_STORE_IMM_8(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
-
- host_x86_LEA_REG_REG(block, REG_ESI, seg_reg, addr_reg);
- host_x86_MOV8_REG_IMM(block, REG_ECX, uop->imm_data);
- host_x86_CALL(block, codegen_mem_store_byte);
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
-
- return 0;
-}
-static int codegen_MEM_STORE_IMM_16(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
-
- host_x86_LEA_REG_REG(block, REG_ESI, seg_reg, addr_reg);
- host_x86_MOV16_REG_IMM(block, REG_ECX, uop->imm_data);
- host_x86_CALL(block, codegen_mem_store_word);
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
-
- return 0;
-}
-static int codegen_MEM_STORE_IMM_32(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real);
-
- host_x86_LEA_REG_REG(block, REG_ESI, seg_reg, addr_reg);
- host_x86_MOV32_REG_IMM(block, REG_ECX, uop->imm_data);
- host_x86_CALL(block, codegen_mem_store_long);
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_MEM_STORE_SINGLE(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real), src_reg = HOST_REG_GET(uop->src_reg_c_real);
-#ifdef RECOMPILER_DEBUG
- int src_size = IREG_GET_SIZE(uop->src_reg_c_real);
-
- if (!REG_IS_D(src_size))
- fatal("MEM_STORE_SINGLE - %02x\n", uop->src_reg_b_real);
-#endif
- host_x86_LEA_REG_REG(block, REG_ESI, seg_reg, addr_reg);
- if (uop->imm_data)
- host_x86_ADD32_REG_IMM(block, REG_ESI, uop->imm_data);
- host_x86_CVTSD2SS_XREG_XREG(block, REG_XMM_TEMP, src_reg);
- host_x86_CALL(block, codegen_mem_store_single);
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
-
- return 0;
-}
-static int codegen_MEM_STORE_DOUBLE(codeblock_t *block, uop_t *uop)
-{
- int seg_reg = HOST_REG_GET(uop->src_reg_a_real), addr_reg = HOST_REG_GET(uop->src_reg_b_real), src_reg = HOST_REG_GET(uop->src_reg_c_real);
-#ifdef RECOMPILER_DEBUG
- int src_size = IREG_GET_SIZE(uop->src_reg_c_real);
-
- if (!REG_IS_D(src_size))
- fatal("MEM_STORE_DOUBLE - %02x\n", uop->src_reg_b_real);
-#endif
- host_x86_LEA_REG_REG(block, REG_ESI, seg_reg, addr_reg);
- if (uop->imm_data)
- host_x86_ADD32_REG_IMM(block, REG_ESI, uop->imm_data);
- host_x86_MOVQ_XREG_XREG(block, REG_XMM_TEMP, src_reg);
- host_x86_CALL(block, codegen_mem_store_double);
- host_x86_TEST32_REG(block, REG_ESI, REG_ESI);
- host_x86_JNZ(block, codegen_exit_rout);
-
- return 0;
-}
-
-static int codegen_MOV(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- }
- else if (REG_IS_D(dest_size) && REG_IS_D(src_size))
- {
- host_x86_MOVQ_XREG_XREG(block, dest_reg, src_reg);
- }
- else if (REG_IS_Q(dest_size) && REG_IS_Q(src_size))
- {
- host_x86_MOVQ_XREG_XREG(block, dest_reg, src_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MOV %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_MOV_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_L(dest_size))
- {
- host_x86_MOV32_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size))
- {
- host_x86_MOV16_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size))
- {
- host_x86_MOV8_REG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MOV_IMM %02x\n", uop->dest_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_MOV_PTR(codeblock_t *block, uop_t *uop)
-{
- host_x86_MOV32_REG_IMM(block, uop->dest_reg_a_real, (uint32_t)uop->p);
- return 0;
-}
-static int codegen_MOV_REG_PTR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_L(dest_size))
- {
- host_x86_MOV32_REG_ABS(block, dest_reg, uop->p);
- }
- else
- fatal("MOV_REG_PTR %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-static int codegen_MOVZX_REG_PTR_8(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_L(dest_size))
- {
- host_x86_MOVZX_REG_ABS_32_8(block, dest_reg, uop->p);
- }
- else if (REG_IS_W(dest_size))
- {
- host_x86_MOVZX_REG_ABS_16_8(block, dest_reg, uop->p);
- }
- else if (REG_IS_B(dest_size))
- {
- host_x86_MOV8_REG_ABS(block, dest_reg, uop->p);
- }
- else
- fatal("MOVZX_REG_PTR_8 %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-static int codegen_MOVZX_REG_PTR_16(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_L(dest_size))
- {
- host_x86_MOVZX_REG_ABS_32_16(block, dest_reg, uop->p);
- }
- else if (REG_IS_W(dest_size))
- {
- host_x86_MOV16_REG_ABS(block, dest_reg, uop->p);
- }
- else
- fatal("MOVZX_REG_PTR_16 %02x\n", uop->dest_reg_a_real);
-
- return 0;
-}
-static int codegen_MOVSX(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_W(src_size))
- {
- host_x86_MOVSX_REG_32_16(block, dest_reg, src_reg);
- }
- else if (REG_IS_L(dest_size) && REG_IS_B(src_size))
- {
- host_x86_MOVSX_REG_32_8(block, dest_reg, src_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_B(src_size))
- {
- host_x86_MOVSX_REG_16_8(block, dest_reg, src_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MOVSX %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_MOVZX(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_L(src_size))
- {
- host_x86_MOVD_XREG_REG(block, dest_reg, src_reg);
- }
- else if (REG_IS_L(dest_size) && REG_IS_Q(src_size))
- {
- host_x86_MOVD_REG_XREG(block, dest_reg, src_reg);
- }
- else if (REG_IS_L(dest_size) && REG_IS_W(src_size))
- {
- host_x86_MOVZX_REG_32_16(block, dest_reg, src_reg);
- }
- else if (REG_IS_L(dest_size) && REG_IS_B(src_size))
- {
- host_x86_MOVZX_REG_32_8(block, dest_reg, src_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_B(src_size))
- {
- host_x86_MOVZX_REG_16_8(block, dest_reg, src_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MOVZX %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_MOV_DOUBLE_INT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_D(dest_size) && REG_IS_L(src_size))
- {
- host_x86_CVTSI2SD_XREG_REG(block, dest_reg, src_reg);
- }
- else if (REG_IS_D(dest_size) && REG_IS_W(src_size))
- {
- host_x86_MOVSX_REG_32_16(block, REG_ECX, src_reg);
- host_x86_CVTSI2SD_XREG_REG(block, dest_reg, REG_ECX);
- }
- else if (REG_IS_D(dest_size) && REG_IS_Q(src_size))
- {
- /*There is no SSE instruction to convert a 64-bit integer to a floating point value.
- Instead we have to bounce the integer through memory via x87.*/
- host_x86_MOVQ_BASE_OFFSET_XREG(block, REG_ESP, 0, src_reg);
- host_x87_FILDq_BASE(block, REG_ESP);
- host_x87_FSTPd_BASE(block, REG_ESP);
- host_x86_MOVQ_XREG_BASE_OFFSET(block, dest_reg, REG_ESP, 0);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MOV_DOUBLE_INT %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_MOV_INT_DOUBLE(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_D(src_size))
- {
- host_x86_LDMXCSR(block, &cpu_state.new_fp_control);
- host_x86_CVTSD2SI_REG_XREG(block, dest_reg, src_reg);
- host_x86_LDMXCSR(block, &cpu_state.old_fp_control);
- }
- else if (REG_IS_W(dest_size) && REG_IS_D(src_size))
- {
- host_x86_LDMXCSR(block, &cpu_state.new_fp_control);
- host_x86_CVTSD2SI_REG_XREG(block, REG_ECX, src_reg);
- host_x86_MOV16_REG_REG(block, dest_reg, REG_ECX);
- host_x86_LDMXCSR(block, &cpu_state.old_fp_control);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MOV_INT_DOUBLE %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_MOV_INT_DOUBLE_64(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), src_64_reg = HOST_REG_GET(uop->src_reg_b_real), tag_reg = HOST_REG_GET(uop->src_reg_c_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real), src_64_size = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_D(src_size) && REG_IS_Q(src_64_size))
- {
- uint32_t *branch_offset;
-
- /*If TAG_UINT64 is set then the source is MM[]. Otherwise it is a double in ST()*/
- host_x86_MOVQ_XREG_XREG(block, dest_reg, src_64_reg);
- host_x86_TEST8_REG(block, tag_reg, tag_reg);
- branch_offset = host_x86_JS_long(block);
-
- /*There is no SSE instruction to convert a floating point value to a 64-bit integer.
- Instead we have to bounce through memory via x87.*/
- host_x87_FLDCW(block, &cpu_state.new_fp_control2);
- host_x86_MOVQ_BASE_OFFSET_XREG(block, REG_ESP, 0, src_reg);
- host_x87_FLDd_BASE(block, REG_ESP);
- host_x87_FISTPq_BASE(block, REG_ESP);
- host_x86_MOVQ_XREG_BASE_OFFSET(block, dest_reg, REG_ESP, 0);
- host_x87_FLDCW(block, &cpu_state.old_fp_control2);
-
- *branch_offset = (uint32_t)((uintptr_t)&block_write_data[block_pos] - (uintptr_t)branch_offset) - 4;
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("MOV_INT_DOUBLE_64 %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_NOP(codeblock_t *block, uop_t *uop)
-{
- return 0;
-}
-
-static int codegen_OR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_POR_XREG_XREG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg_a);
- host_x86_OR32_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg_a);
- host_x86_OR16_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg_a);
- host_x86_OR8_REG_REG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("OR %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_OR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_L(dest_size) && dest_reg == src_reg)
- {
- host_x86_OR32_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && dest_reg == src_reg)
- {
- host_x86_OR16_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && dest_reg == src_reg)
- {
- host_x86_OR8_REG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("OR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_PACKSSWB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PACKSSWB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PACKSSWB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PACKSSDW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PACKSSDW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PACKSSDW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PACKUSWB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PACKUSWB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PACKUSWB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_PADDB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PADDB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PADDB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PADDW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PADDW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PADDW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PADDD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PADDD_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PADDD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PADDSB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PADDSB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PADDSB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PADDSW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PADDSW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PADDSW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PADDUSB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PADDUSB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PADDUSB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PADDUSW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PADDUSW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PADDUSW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_PCMPEQB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PCMPEQB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PCMPEQB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PCMPEQW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PCMPEQW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PCMPEQW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PCMPEQD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PCMPEQD_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PCMPEQD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PCMPGTB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PCMPGTB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PCMPGTB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PCMPGTW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PCMPGTW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PCMPGTW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PCMPGTD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PCMPGTD_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PCMPGTD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_PF2ID(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a))
- {
- host_x86_LDMXCSR(block, &cpu_state.trunc_fp_control);
- host_x86_CVTPS2DQ_XREG_XREG(block, dest_reg, src_reg_a);
- host_x86_LDMXCSR(block, &cpu_state.old_fp_control);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PF2ID %02x %02x\n", uop->dest_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PFADD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_ADDPS_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFADD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PFCMPEQ(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_CMPPS_XREG_XREG(block, dest_reg, src_reg_b, CMPPS_EQ);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFCMPEQ %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PFCMPGE(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_CMPPS_XREG_XREG(block, dest_reg, src_reg_b, CMPPS_NLT);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFCMPGE %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PFCMPGT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_CMPPS_XREG_XREG(block, dest_reg, src_reg_b, CMPPS_NLE);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFCMPGT %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PFMAX(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_MAXPS_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFMAX %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PFMIN(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_MINPS_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFMIN %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PFMUL(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_MULPS_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFMUL %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PFRCP(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a))
- {
- /*TODO: This could be improved (use RCPSS + iteration)*/
- host_x86_MOV32_REG_IMM(block, REG_ECX, 1);
- host_x86_MOVQ_XREG_XREG(block, REG_XMM_TEMP, src_reg_a);
- host_x86_CVTSI2SS_XREG_REG(block, dest_reg, REG_ECX);
- host_x86_DIVSS_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
- host_x86_UNPCKLPS_XREG_XREG(block, dest_reg, dest_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFRCP %02x %02x\n", uop->dest_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PFRSQRT(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a))
- {
- /*TODO: This could be improved (use RSQRTSS + iteration)*/
- host_x86_SQRTSS_XREG_XREG(block, REG_XMM_TEMP, src_reg_a);
- host_x86_MOV32_REG_IMM(block, REG_ECX, 1);
- host_x86_CVTSI2SS_XREG_REG(block, dest_reg, REG_ECX);
- host_x86_DIVSS_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
- host_x86_UNPCKLPS_XREG_XREG(block, dest_reg, dest_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFRSQRT %02x %02x\n", uop->dest_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PFSUB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_SUBPS_XREG_XREG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b))
- {
- host_x86_MOVQ_XREG_XREG(block, REG_XMM_TEMP, src_reg_a);
- host_x86_SUBPS_XREG_XREG(block, REG_XMM_TEMP, src_reg_b);
- host_x86_MOVQ_XREG_XREG(block, dest_reg, REG_XMM_TEMP);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PFSUB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PI2FD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a))
- {
- host_x86_CVTDQ2PS_XREG_XREG(block, dest_reg, src_reg_a);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PI2FD %02x %02x\n", uop->dest_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_PMADDWD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PMADDWD_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PMULHW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PMULHW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PMULHW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PMULHW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PMULLW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PMULLW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PMULLW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_PSLLW_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_Q(dest_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSLLW_XREG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSLLW_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PSLLD_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_Q(dest_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSLLD_XREG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSLLD_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PSLLQ_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_Q(dest_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSLLQ_XREG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSLLQ_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PSRAW_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_Q(dest_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSRAW_XREG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSRAW_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PSRAD_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_Q(dest_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSRAD_XREG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSRAD_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PSRAQ_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_Q(dest_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSRAQ_XREG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSRAQ_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PSRLW_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_Q(dest_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSRLW_XREG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSRLW_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PSRLD_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_Q(dest_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSRLD_XREG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSRLD_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_PSRLQ_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real);
-
- if (REG_IS_Q(dest_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSRLQ_XREG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSRLQ_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_PSUBB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSUBB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSUBB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PSUBW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSUBW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSUBW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PSUBD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSUBD_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSUBD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PSUBSB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSUBSB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSUBSB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PSUBSW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSUBSW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSUBSW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PSUBUSB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSUBUSB_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSUBUSB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PSUBUSW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PSUBUSW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PSUBUSW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_PUNPCKHBW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PUNPCKLBW_XREG_XREG(block, dest_reg, src_reg_b);
- host_x86_PSHUFD_XREG_XREG_IMM(block, dest_reg, dest_reg, 0xee); /*0xee = move top 64-bits to low 64-bits*/
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PUNPCKHBW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PUNPCKHWD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PUNPCKLWD_XREG_XREG(block, dest_reg, src_reg_b);
- host_x86_PSHUFD_XREG_XREG_IMM(block, dest_reg, dest_reg, 0xee); /*0xee = move top 64-bits to low 64-bits*/
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PUNPCKHWD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PUNPCKHDQ(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PUNPCKLDQ_XREG_XREG(block, dest_reg, src_reg_b);
- host_x86_PSHUFD_XREG_XREG_IMM(block, dest_reg, dest_reg, 0xee); /*0xee = move top 64-bits to low 64-bits*/
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PUNPCKHDQ %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PUNPCKLBW(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PUNPCKLBW_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PUNPCKLBW %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PUNPCKLWD(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PUNPCKLWD_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PUNPCKLWD %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_PUNPCKLDQ(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PUNPCKLDQ_XREG_XREG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("PUNPCKLDQ %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-
-static int codegen_ROL(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- host_x86_MOV32_REG_REG(block, REG_ECX, shift_reg);
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_ROL32_CL(block, dest_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_ROL16_CL(block, dest_reg);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_ROL8_CL(block, dest_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("ROL %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_ROL_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_ROL32_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_ROL16_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_ROL8_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("ROL_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_ROR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- host_x86_MOV32_REG_REG(block, REG_ECX, shift_reg);
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_ROR32_CL(block, dest_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_ROR16_CL(block, dest_reg);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_ROR8_CL(block, dest_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("ROR %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_ROR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_ROR32_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_ROR16_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_ROR8_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("ROR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_SAR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- host_x86_MOV32_REG_REG(block, REG_ECX, shift_reg);
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_SAR32_CL(block, dest_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_SAR16_CL(block, dest_reg);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_SAR8_CL(block, dest_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("SAR %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_SAR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_SAR32_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_SAR16_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_SAR8_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("SAR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_SHL(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- host_x86_MOV32_REG_REG(block, REG_ECX, shift_reg);
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_SHL32_CL(block, dest_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_SHL16_CL(block, dest_reg);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_SHL8_CL(block, dest_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("SHL %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_SHL_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_SHL32_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_SHL16_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_SHL8_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("SHL_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_SHR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real), shift_reg = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- host_x86_MOV32_REG_REG(block, REG_ECX, shift_reg);
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_SHR32_CL(block, dest_reg);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_SHR16_CL(block, dest_reg);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_SHR8_CL(block, dest_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("SHR %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-static int codegen_SHR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_SHR32_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_SHR16_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_SHR8_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("SHR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_STORE_PTR_IMM(codeblock_t *block, uop_t *uop)
-{
- host_x86_MOV32_ABS_IMM(block, uop->p, uop->imm_data);
- return 0;
-}
-static int codegen_STORE_PTR_IMM_8(codeblock_t *block, uop_t *uop)
-{
- host_x86_MOV8_ABS_IMM(block, uop->p, uop->imm_data);
- return 0;
-}
-static int codegen_STORE_PTR_IMM_16(codeblock_t *block, uop_t *uop)
-{
- host_x86_MOV16_ABS_IMM(block, uop->p, uop->imm_data);
- return 0;
-}
-
-static int codegen_SUB(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_a = HOST_REG_GET(uop->src_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg_a);
- host_x86_SUB32_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg_a);
- host_x86_SUB16_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b))
- {
- if (uop->dest_reg_a_real != uop->src_reg_a_real)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg_a);
- host_x86_SUB8_REG_REG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("SUB %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_SUB_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size))
- {
- if (dest_reg != src_reg)
- host_x86_MOV32_REG_REG(block, dest_reg, src_reg);
- host_x86_SUB32_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size))
- {
- if (dest_reg != src_reg)
- host_x86_MOV16_REG_REG(block, dest_reg, src_reg);
- host_x86_SUB16_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size))
- {
- if (dest_reg != src_reg)
- host_x86_MOV8_REG_REG(block, dest_reg, src_reg);
- host_x86_SUB8_REG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("SUB_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-static int codegen_TEST_JNS_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_x86_TEST32_REG(block, src_reg, src_reg);
- }
- else if (REG_IS_W(src_size))
- {
- host_x86_TEST16_REG(block, src_reg, src_reg);
- }
- else if (REG_IS_B(src_size))
- {
- host_x86_TEST8_REG(block, src_reg, src_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("TEST_JNS_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JNS_long(block);
-
- return 0;
-}
-static int codegen_TEST_JS_DEST(codeblock_t *block, uop_t *uop)
-{
- int src_reg = HOST_REG_GET(uop->src_reg_a_real);
- int src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(src_size))
- {
- host_x86_TEST32_REG(block, src_reg, src_reg);
- }
- else if (REG_IS_W(src_size))
- {
- host_x86_TEST16_REG(block, src_reg, src_reg);
- }
- else if (REG_IS_B(src_size))
- {
- host_x86_TEST8_REG(block, src_reg, src_reg);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("TEST_JS_DEST %02x\n", uop->src_reg_a_real);
-#endif
- uop->p = host_x86_JS_long(block);
-
- return 0;
-}
-
-static int codegen_XOR(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real), src_reg_b = HOST_REG_GET(uop->src_reg_b_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size_a = IREG_GET_SIZE(uop->src_reg_a_real), src_size_b = IREG_GET_SIZE(uop->src_reg_b_real);
-
- if (REG_IS_Q(dest_size) && REG_IS_Q(src_size_a) && REG_IS_Q(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_PXOR_XREG_XREG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_L(dest_size) && REG_IS_L(src_size_a) && REG_IS_L(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_XOR32_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size_a) && REG_IS_W(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_XOR16_REG_REG(block, dest_reg, src_reg_b);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size_a) && REG_IS_B(src_size_b) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_XOR8_REG_REG(block, dest_reg, src_reg_b);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("XOR %02x %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real, uop->src_reg_b_real);
-#endif
- return 0;
-}
-static int codegen_XOR_IMM(codeblock_t *block, uop_t *uop)
-{
- int dest_reg = HOST_REG_GET(uop->dest_reg_a_real);
- int dest_size = IREG_GET_SIZE(uop->dest_reg_a_real), src_size = IREG_GET_SIZE(uop->src_reg_a_real);
-
- if (REG_IS_L(dest_size) && REG_IS_L(src_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_XOR32_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_W(dest_size) && REG_IS_W(src_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_XOR16_REG_IMM(block, dest_reg, uop->imm_data);
- }
- else if (REG_IS_B(dest_size) && REG_IS_B(src_size) && uop->dest_reg_a_real == uop->src_reg_a_real)
- {
- host_x86_XOR8_REG_IMM(block, dest_reg, uop->imm_data);
- }
-#ifdef RECOMPILER_DEBUG
- else
- fatal("XOR_IMM %02x %02x\n", uop->dest_reg_a_real, uop->src_reg_a_real);
-#endif
- return 0;
-}
-
-#ifdef DEBUG_EXTRA
-static int codegen_LOG_INSTR(codeblock_t *block, uop_t *uop)
-{
- if (uop->imm_data > 256*256)
- fatal("LOG_INSTR %08x\n", uop->imm_data);
- host_x86_INC32_ABS(block, &instr_counts[uop->imm_data]);
- return 0;
-}
-#endif
-
-const uOpFn uop_handlers[UOP_MAX] =
-{
- [UOP_CALL_FUNC & UOP_MASK] = codegen_CALL_FUNC,
- [UOP_CALL_FUNC_RESULT & UOP_MASK] = codegen_CALL_FUNC_RESULT,
- [UOP_CALL_INSTRUCTION_FUNC & UOP_MASK] = codegen_CALL_INSTRUCTION_FUNC,
-
- [UOP_JMP & UOP_MASK] = codegen_JMP,
- [UOP_JMP_DEST & UOP_MASK] = codegen_JMP_DEST,
-
- [UOP_LOAD_SEG & UOP_MASK] = codegen_LOAD_SEG,
-
- [UOP_LOAD_FUNC_ARG_0 & UOP_MASK] = codegen_LOAD_FUNC_ARG0,
- [UOP_LOAD_FUNC_ARG_1 & UOP_MASK] = codegen_LOAD_FUNC_ARG1,
- [UOP_LOAD_FUNC_ARG_2 & UOP_MASK] = codegen_LOAD_FUNC_ARG2,
- [UOP_LOAD_FUNC_ARG_3 & UOP_MASK] = codegen_LOAD_FUNC_ARG3,
-
- [UOP_LOAD_FUNC_ARG_0_IMM & UOP_MASK] = codegen_LOAD_FUNC_ARG0_IMM,
- [UOP_LOAD_FUNC_ARG_1_IMM & UOP_MASK] = codegen_LOAD_FUNC_ARG1_IMM,
- [UOP_LOAD_FUNC_ARG_2_IMM & UOP_MASK] = codegen_LOAD_FUNC_ARG2_IMM,
- [UOP_LOAD_FUNC_ARG_3_IMM & UOP_MASK] = codegen_LOAD_FUNC_ARG3_IMM,
-
- [UOP_STORE_P_IMM & UOP_MASK] = codegen_STORE_PTR_IMM,
- [UOP_STORE_P_IMM_8 & UOP_MASK] = codegen_STORE_PTR_IMM_8,
- [UOP_STORE_P_IMM_16 & UOP_MASK] = codegen_STORE_PTR_IMM_16,
-
- [UOP_MEM_LOAD_ABS & UOP_MASK] = codegen_MEM_LOAD_ABS,
- [UOP_MEM_LOAD_REG & UOP_MASK] = codegen_MEM_LOAD_REG,
- [UOP_MEM_LOAD_SINGLE & UOP_MASK] = codegen_MEM_LOAD_SINGLE,
- [UOP_MEM_LOAD_DOUBLE & UOP_MASK] = codegen_MEM_LOAD_DOUBLE,
-
- [UOP_MEM_STORE_ABS & UOP_MASK] = codegen_MEM_STORE_ABS,
- [UOP_MEM_STORE_REG & UOP_MASK] = codegen_MEM_STORE_REG,
- [UOP_MEM_STORE_IMM_8 & UOP_MASK] = codegen_MEM_STORE_IMM_8,
- [UOP_MEM_STORE_IMM_16 & UOP_MASK] = codegen_MEM_STORE_IMM_16,
- [UOP_MEM_STORE_IMM_32 & UOP_MASK] = codegen_MEM_STORE_IMM_32,
- [UOP_MEM_STORE_SINGLE & UOP_MASK] = codegen_MEM_STORE_SINGLE,
- [UOP_MEM_STORE_DOUBLE & UOP_MASK] = codegen_MEM_STORE_DOUBLE,
-
- [UOP_MOV & UOP_MASK] = codegen_MOV,
- [UOP_MOV_PTR & UOP_MASK] = codegen_MOV_PTR,
- [UOP_MOV_IMM & UOP_MASK] = codegen_MOV_IMM,
- [UOP_MOVSX & UOP_MASK] = codegen_MOVSX,
- [UOP_MOVZX & UOP_MASK] = codegen_MOVZX,
- [UOP_MOV_DOUBLE_INT & UOP_MASK] = codegen_MOV_DOUBLE_INT,
- [UOP_MOV_INT_DOUBLE & UOP_MASK] = codegen_MOV_INT_DOUBLE,
- [UOP_MOV_INT_DOUBLE_64 & UOP_MASK] = codegen_MOV_INT_DOUBLE_64,
- [UOP_MOV_REG_PTR & UOP_MASK] = codegen_MOV_REG_PTR,
- [UOP_MOVZX_REG_PTR_8 & UOP_MASK] = codegen_MOVZX_REG_PTR_8,
- [UOP_MOVZX_REG_PTR_16 & UOP_MASK] = codegen_MOVZX_REG_PTR_16,
-
- [UOP_ADD & UOP_MASK] = codegen_ADD,
- [UOP_ADD_IMM & UOP_MASK] = codegen_ADD_IMM,
- [UOP_ADD_LSHIFT & UOP_MASK] = codegen_ADD_LSHIFT,
- [UOP_AND & UOP_MASK] = codegen_AND,
- [UOP_AND_IMM & UOP_MASK] = codegen_AND_IMM,
- [UOP_ANDN & UOP_MASK] = codegen_ANDN,
- [UOP_OR & UOP_MASK] = codegen_OR,
- [UOP_OR_IMM & UOP_MASK] = codegen_OR_IMM,
- [UOP_SUB & UOP_MASK] = codegen_SUB,
- [UOP_SUB_IMM & UOP_MASK] = codegen_SUB_IMM,
- [UOP_XOR & UOP_MASK] = codegen_XOR,
- [UOP_XOR_IMM & UOP_MASK] = codegen_XOR_IMM,
-
- [UOP_SAR & UOP_MASK] = codegen_SAR,
- [UOP_SAR_IMM & UOP_MASK] = codegen_SAR_IMM,
- [UOP_SHL & UOP_MASK] = codegen_SHL,
- [UOP_SHL_IMM & UOP_MASK] = codegen_SHL_IMM,
- [UOP_SHR & UOP_MASK] = codegen_SHR,
- [UOP_SHR_IMM & UOP_MASK] = codegen_SHR_IMM,
- [UOP_ROL & UOP_MASK] = codegen_ROL,
- [UOP_ROL_IMM & UOP_MASK] = codegen_ROL_IMM,
- [UOP_ROR & UOP_MASK] = codegen_ROR,
- [UOP_ROR_IMM & UOP_MASK] = codegen_ROR_IMM,
-
- [UOP_CMP_IMM_JZ & UOP_MASK] = codegen_CMP_IMM_JZ,
-
- [UOP_CMP_JB & UOP_MASK] = codegen_CMP_JB,
- [UOP_CMP_JNBE & UOP_MASK] = codegen_CMP_JNBE,
-
- [UOP_CMP_JNB_DEST & UOP_MASK] = codegen_CMP_JNB_DEST,
- [UOP_CMP_JNBE_DEST & UOP_MASK] = codegen_CMP_JNBE_DEST,
- [UOP_CMP_JNL_DEST & UOP_MASK] = codegen_CMP_JNL_DEST,
- [UOP_CMP_JNLE_DEST & UOP_MASK] = codegen_CMP_JNLE_DEST,
- [UOP_CMP_JNO_DEST & UOP_MASK] = codegen_CMP_JNO_DEST,
- [UOP_CMP_JNZ_DEST & UOP_MASK] = codegen_CMP_JNZ_DEST,
- [UOP_CMP_JB_DEST & UOP_MASK] = codegen_CMP_JB_DEST,
- [UOP_CMP_JBE_DEST & UOP_MASK] = codegen_CMP_JBE_DEST,
- [UOP_CMP_JL_DEST & UOP_MASK] = codegen_CMP_JL_DEST,
- [UOP_CMP_JLE_DEST & UOP_MASK] = codegen_CMP_JLE_DEST,
- [UOP_CMP_JO_DEST & UOP_MASK] = codegen_CMP_JO_DEST,
- [UOP_CMP_JZ_DEST & UOP_MASK] = codegen_CMP_JZ_DEST,
-
- [UOP_CMP_IMM_JNZ_DEST & UOP_MASK] = codegen_CMP_IMM_JNZ_DEST,
- [UOP_CMP_IMM_JZ_DEST & UOP_MASK] = codegen_CMP_IMM_JZ_DEST,
-
- [UOP_TEST_JNS_DEST & UOP_MASK] = codegen_TEST_JNS_DEST,
- [UOP_TEST_JS_DEST & UOP_MASK] = codegen_TEST_JS_DEST,
-
- [UOP_FP_ENTER & UOP_MASK] = codegen_FP_ENTER,
- [UOP_MMX_ENTER & UOP_MASK] = codegen_MMX_ENTER,
-
- [UOP_FADD & UOP_MASK] = codegen_FADD,
- [UOP_FDIV & UOP_MASK] = codegen_FDIV,
- [UOP_FMUL & UOP_MASK] = codegen_FMUL,
- [UOP_FSUB & UOP_MASK] = codegen_FSUB,
- [UOP_FCOM & UOP_MASK] = codegen_FCOM,
-
- [UOP_FABS & UOP_MASK] = codegen_FABS,
- [UOP_FCHS & UOP_MASK] = codegen_FCHS,
- [UOP_FSQRT & UOP_MASK] = codegen_FSQRT,
- [UOP_FTST & UOP_MASK] = codegen_FTST,
-
- [UOP_PACKSSWB & UOP_MASK] = codegen_PACKSSWB,
- [UOP_PACKSSDW & UOP_MASK] = codegen_PACKSSDW,
- [UOP_PACKUSWB & UOP_MASK] = codegen_PACKUSWB,
-
- [UOP_PADDB & UOP_MASK] = codegen_PADDB,
- [UOP_PADDW & UOP_MASK] = codegen_PADDW,
- [UOP_PADDD & UOP_MASK] = codegen_PADDD,
- [UOP_PADDSB & UOP_MASK] = codegen_PADDSB,
- [UOP_PADDSW & UOP_MASK] = codegen_PADDSW,
- [UOP_PADDUSB & UOP_MASK] = codegen_PADDUSB,
- [UOP_PADDUSW & UOP_MASK] = codegen_PADDUSW,
-
- [UOP_PCMPEQB & UOP_MASK] = codegen_PCMPEQB,
- [UOP_PCMPEQW & UOP_MASK] = codegen_PCMPEQW,
- [UOP_PCMPEQD & UOP_MASK] = codegen_PCMPEQD,
- [UOP_PCMPGTB & UOP_MASK] = codegen_PCMPGTB,
- [UOP_PCMPGTW & UOP_MASK] = codegen_PCMPGTW,
- [UOP_PCMPGTD & UOP_MASK] = codegen_PCMPGTD,
-
- [UOP_PF2ID & UOP_MASK] = codegen_PF2ID,
- [UOP_PFADD & UOP_MASK] = codegen_PFADD,
- [UOP_PFCMPEQ & UOP_MASK] = codegen_PFCMPEQ,
- [UOP_PFCMPGE & UOP_MASK] = codegen_PFCMPGE,
- [UOP_PFCMPGT & UOP_MASK] = codegen_PFCMPGT,
- [UOP_PFMAX & UOP_MASK] = codegen_PFMAX,
- [UOP_PFMIN & UOP_MASK] = codegen_PFMIN,
- [UOP_PFMUL & UOP_MASK] = codegen_PFMUL,
- [UOP_PFRCP & UOP_MASK] = codegen_PFRCP,
- [UOP_PFRSQRT & UOP_MASK] = codegen_PFRSQRT,
- [UOP_PFSUB & UOP_MASK] = codegen_PFSUB,
- [UOP_PI2FD & UOP_MASK] = codegen_PI2FD,
-
- [UOP_PMADDWD & UOP_MASK] = codegen_PMADDWD,
- [UOP_PMULHW & UOP_MASK] = codegen_PMULHW,
- [UOP_PMULLW & UOP_MASK] = codegen_PMULLW,
-
- [UOP_PSLLW_IMM & UOP_MASK] = codegen_PSLLW_IMM,
- [UOP_PSLLD_IMM & UOP_MASK] = codegen_PSLLD_IMM,
- [UOP_PSLLQ_IMM & UOP_MASK] = codegen_PSLLQ_IMM,
- [UOP_PSRAW_IMM & UOP_MASK] = codegen_PSRAW_IMM,
- [UOP_PSRAD_IMM & UOP_MASK] = codegen_PSRAD_IMM,
- [UOP_PSRAQ_IMM & UOP_MASK] = codegen_PSRAQ_IMM,
- [UOP_PSRLW_IMM & UOP_MASK] = codegen_PSRLW_IMM,
- [UOP_PSRLD_IMM & UOP_MASK] = codegen_PSRLD_IMM,
- [UOP_PSRLQ_IMM & UOP_MASK] = codegen_PSRLQ_IMM,
-
- [UOP_PSUBB & UOP_MASK] = codegen_PSUBB,
- [UOP_PSUBW & UOP_MASK] = codegen_PSUBW,
- [UOP_PSUBD & UOP_MASK] = codegen_PSUBD,
- [UOP_PSUBSB & UOP_MASK] = codegen_PSUBSB,
- [UOP_PSUBSW & UOP_MASK] = codegen_PSUBSW,
- [UOP_PSUBUSB & UOP_MASK] = codegen_PSUBUSB,
- [UOP_PSUBUSW & UOP_MASK] = codegen_PSUBUSW,
-
- [UOP_PUNPCKHBW & UOP_MASK] = codegen_PUNPCKHBW,
- [UOP_PUNPCKHWD & UOP_MASK] = codegen_PUNPCKHWD,
- [UOP_PUNPCKHDQ & UOP_MASK] = codegen_PUNPCKHDQ,
- [UOP_PUNPCKLBW & UOP_MASK] = codegen_PUNPCKLBW,
- [UOP_PUNPCKLWD & UOP_MASK] = codegen_PUNPCKLWD,
- [UOP_PUNPCKLDQ & UOP_MASK] = codegen_PUNPCKLDQ,
-
- [UOP_NOP_BARRIER & UOP_MASK] = codegen_NOP,
-
-#ifdef DEBUG_EXTRA
- [UOP_LOG_INSTR & UOP_MASK] = codegen_LOG_INSTR
-#endif
-};
-
-void codegen_direct_read_8(codeblock_t *block, int host_reg, void *p)
-{
- host_x86_MOV8_REG_ABS(block, host_reg, p);
-}
-void codegen_direct_read_16(codeblock_t *block, int host_reg, void *p)
-{
- host_x86_MOV16_REG_ABS(block, host_reg, p);
-}
-void codegen_direct_read_32(codeblock_t *block, int host_reg, void *p)
-{
- host_x86_MOV32_REG_ABS(block, host_reg, p);
-}
-void codegen_direct_read_pointer(codeblock_t *block, int host_reg, void *p)
-{
- codegen_direct_read_32(block, host_reg, p);
-}
-void codegen_direct_read_64(codeblock_t *block, int host_reg, void *p)
-{
- host_x86_MOVQ_XREG_ABS(block, host_reg, p);
-}
-void codegen_direct_read_double(codeblock_t *block, int host_reg, void *p)
-{
- host_x86_MOVQ_XREG_ABS(block, host_reg, p);
-}
-void codegen_direct_read_st_8(codeblock_t *block, int host_reg, void *base, int reg_idx)
-{
- int offset = (uintptr_t)base - (((uintptr_t)&cpu_state) + 128);
-
- host_x86_MOV32_REG_BASE_OFFSET(block, REG_ECX, REG_ESP, IREG_TOP_diff_stack_offset);
- host_x86_ADD32_REG_IMM(block, REG_ECX, reg_idx);
- host_x86_AND32_REG_IMM(block, REG_ECX, 7);
- host_x86_MOV8_REG_ABS_REG_REG_SHIFT(block, host_reg, offset, REG_EBP, REG_ECX, 0);
-}
-void codegen_direct_read_st_64(codeblock_t *block, int host_reg, void *base, int reg_idx)
-{
- int offset = (uintptr_t)base - (((uintptr_t)&cpu_state) + 128);
-
- host_x86_MOV32_REG_BASE_OFFSET(block, REG_ECX, REG_ESP, IREG_TOP_diff_stack_offset);
- host_x86_ADD32_REG_IMM(block, REG_ECX, reg_idx);
- host_x86_AND32_REG_IMM(block, REG_ECX, 7);
- host_x86_MOVQ_XREG_ABS_REG_REG_SHIFT(block, host_reg, offset, REG_EBP, REG_ECX, 3);
-}
-void codegen_direct_read_st_double(codeblock_t *block, int host_reg, void *base, int reg_idx)
-{
- int offset = (uintptr_t)base - (((uintptr_t)&cpu_state) + 128);
-
- host_x86_MOV32_REG_BASE_OFFSET(block, REG_ECX, REG_ESP, IREG_TOP_diff_stack_offset);
- host_x86_ADD32_REG_IMM(block, REG_ECX, reg_idx);
- host_x86_AND32_REG_IMM(block, REG_ECX, 7);
- host_x86_MOVQ_XREG_ABS_REG_REG_SHIFT(block, host_reg, offset, REG_EBP, REG_ECX, 3);
-}
-
-void codegen_direct_write_8(codeblock_t *block, void *p, int host_reg)
-{
- host_x86_MOV8_ABS_REG(block, p, host_reg);
-}
-void codegen_direct_write_16(codeblock_t *block, void *p, int host_reg)
-{
- host_x86_MOV16_ABS_REG(block, p, host_reg);
-}
-void codegen_direct_write_32(codeblock_t *block, void *p, int host_reg)
-{
- host_x86_MOV32_ABS_REG(block, p, host_reg);
-}
-void codegen_direct_write_64(codeblock_t *block, void *p, int host_reg)
-{
- host_x86_MOVQ_ABS_XREG(block, p, host_reg);
-}
-void codegen_direct_write_double(codeblock_t *block, void *p, int host_reg)
-{
- host_x86_MOVQ_ABS_XREG(block, p, host_reg);
-}
-void codegen_direct_write_st_8(codeblock_t *block, void *base, int reg_idx, int host_reg)
-{
- int offset = (uintptr_t)base - (((uintptr_t)&cpu_state) + 128);
-
- host_x86_MOV32_REG_BASE_OFFSET(block, REG_ECX, REG_ESP, IREG_TOP_diff_stack_offset);
- host_x86_ADD32_REG_IMM(block, REG_ECX, reg_idx);
- host_x86_AND32_REG_IMM(block, REG_ECX, 7);
- host_x86_MOV8_ABS_REG_REG_SHIFT_REG(block, offset, REG_EBP, REG_ECX, 0, host_reg);
-}
-void codegen_direct_write_st_64(codeblock_t *block, void *base, int reg_idx, int host_reg)
-{
- int offset = (uintptr_t)base - (((uintptr_t)&cpu_state) + 128);
-
- host_x86_MOV32_REG_BASE_OFFSET(block, REG_ECX, REG_ESP, IREG_TOP_diff_stack_offset);
- host_x86_ADD32_REG_IMM(block, REG_ECX, reg_idx);
- host_x86_AND32_REG_IMM(block, REG_ECX, 7);
- host_x86_MOVQ_ABS_REG_REG_SHIFT_XREG(block, offset, REG_EBP, REG_ECX, 3, host_reg);
-}
-void codegen_direct_write_st_double(codeblock_t *block, void *base, int reg_idx, int host_reg)
-{
- int offset = (uintptr_t)base - (((uintptr_t)&cpu_state) + 128);
-
- host_x86_MOV32_REG_BASE_OFFSET(block, REG_ECX, REG_ESP, IREG_TOP_diff_stack_offset);
- host_x86_ADD32_REG_IMM(block, REG_ECX, reg_idx);
- host_x86_AND32_REG_IMM(block, REG_ECX, 7);
- host_x86_MOVQ_ABS_REG_REG_SHIFT_XREG(block, offset, REG_EBP, REG_ECX, 3, host_reg);
-}
-
-void codegen_direct_write_ptr(codeblock_t *block, void *p, int host_reg)
-{
- host_x86_MOV32_ABS_REG(block, p, host_reg);
-}
-
-void codegen_direct_read_16_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- host_x86_MOV16_REG_BASE_OFFSET(block, host_reg, REG_ESP, stack_offset);
-}
-void codegen_direct_read_32_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- host_x86_MOV32_REG_BASE_OFFSET(block, host_reg, REG_ESP, stack_offset);
-}
-void codegen_direct_read_pointer_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- codegen_direct_read_32_stack(block, host_reg, stack_offset);
-}
-void codegen_direct_read_64_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- host_x86_MOVQ_XREG_BASE_OFFSET(block, host_reg, REG_ESP, stack_offset);
-}
-void codegen_direct_read_double_stack(codeblock_t *block, int host_reg, int stack_offset)
-{
- host_x86_MOVQ_XREG_BASE_OFFSET(block, host_reg, REG_ESP, stack_offset);
-}
-
-void codegen_direct_write_32_stack(codeblock_t *block, int stack_offset, int host_reg)
-{
- host_x86_MOV32_BASE_OFFSET_REG(block, REG_ESP, stack_offset, host_reg);
-}
-void codegen_direct_write_64_stack(codeblock_t *block, int stack_offset, int host_reg)
-{
- host_x86_MOVQ_BASE_OFFSET_XREG(block, REG_ESP, stack_offset, host_reg);
-}
-void codegen_direct_write_double_stack(codeblock_t *block, int stack_offset, int host_reg)
-{
- host_x86_MOVQ_BASE_OFFSET_XREG(block, REG_ESP, stack_offset, host_reg);
-}
-
-void codegen_set_jump_dest(codeblock_t *block, void *p)
-{
- *(uint32_t *)p = (uintptr_t)&block_write_data[block_pos] - ((uintptr_t)p + 4);
-}
-
-void codegen_direct_write_8_imm(codeblock_t *block, void *p, uint8_t imm_data)
-{
- host_x86_MOV8_ABS_IMM(block, p, imm_data);
-}
-void codegen_direct_write_16_imm(codeblock_t *block, void *p, uint16_t imm_data)
-{
- host_x86_MOV16_ABS_IMM(block, p, imm_data);
-}
-void codegen_direct_write_32_imm(codeblock_t *block, void *p, uint32_t imm_data)
-{
- host_x86_MOV32_ABS_IMM(block, p, imm_data);
-}
-void codegen_direct_write_32_imm_stack(codeblock_t *block, int stack_offset, uint32_t imm_data)
-{
- host_x86_MOV32_BASE_OFFSET_IMM(block, REG_ESP, stack_offset, imm_data);
-}
-
-#endif
diff --git a/src/codegen_block.c b/src/codegen_block.c
deleted file mode 100644
index c8cdc7f..0000000
--- a/src/codegen_block.c
+++ /dev/null
@@ -1,920 +0,0 @@
-#include
-#include "ibm.h"
-#include "cpu.h"
-#include "x86.h"
-#include "x86_flags.h"
-#include "x86_ops.h"
-#include "x87.h"
-#include "mem.h"
-
-#include "386_common.h"
-
-#include "codegen.h"
-#include "codegen_accumulate.h"
-#include "codegen_allocator.h"
-#include "codegen_backend.h"
-#include "codegen_ir.h"
-#include "codegen_reg.h"
-
-uint8_t *block_write_data = NULL;
-
-int codegen_flat_ds, codegen_flat_ss;
-int mmx_ebx_ecx_loaded;
-int codegen_flags_changed = 0;
-int codegen_fpu_entered = 0;
-int codegen_mmx_entered = 0;
-int codegen_fpu_loaded_iq[8];
-x86seg *op_ea_seg;
-int op_ssegs;
-uint32_t op_old_pc;
-
-uint32_t recomp_page = -1;
-
-int block_current = 0;
-static int block_num;
-int block_pos;
-
-int cpu_recomp_flushes, cpu_recomp_flushes_latched;
-int cpu_recomp_evicted, cpu_recomp_evicted_latched;
-int cpu_recomp_reuse, cpu_recomp_reuse_latched;
-int cpu_recomp_removed, cpu_recomp_removed_latched;
-
-uint32_t codegen_endpc;
-
-int codegen_block_cycles;
-static int codegen_block_ins;
-static int codegen_block_full_ins;
-
-static uint32_t last_op32;
-static x86seg *last_ea_seg;
-static int last_ssegs;
-
-#ifdef DEBUG_EXTRA
-uint32_t instr_counts[256*256];
-#endif
-
-static uint16_t block_free_list;
-static void delete_block(codeblock_t *block);
-static void delete_dirty_block(codeblock_t *block);
-
-/*Temporary list of code blocks that have recently been evicted. This allows for
- some historical state to be kept when a block is the target of self-modifying
- code.
-
- The size of this list is limited to DIRTY_LIST_MAX_SIZE blocks. When this is
- exceeded the oldest entry will be moved to the free list.*/
-static uint16_t block_dirty_list_head, block_dirty_list_tail;
-static int dirty_list_size = 0;
-#define DIRTY_LIST_MAX_SIZE 64
-
-static void block_free_list_add(codeblock_t *block)
-{
-#ifndef RELEASE_BUILD
- if (block->flags & CODEBLOCK_IN_DIRTY_LIST)
- fatal("block_free_list_add: block=%p in dirty list\n", block);
-#endif
- if (block_free_list)
- block->next = block_free_list;
- else
- block->next = 0;
- block_free_list = get_block_nr(block);
- block->flags = CODEBLOCK_IN_FREE_LIST;
-// pclog("block_free_list_add: %p %p\n", block, block->next);
-}
-
-static void block_dirty_list_add(codeblock_t *block)
-{
-#ifndef RELEASE_BUILD
- if (block->flags & CODEBLOCK_IN_DIRTY_LIST)
- fatal("block_dirty_list_add: block=%p already in dirty list\n", block);
-#endif
-// pclog("block_dirty_list_add: block=%i size=%i %i head=%i tail=%i\n", get_block_nr(block), dirty_list_size, dirty_list_check_size(), block_dirty_list_head, block_dirty_list_tail);
- if (block_dirty_list_head != BLOCK_INVALID)
- {
- codeblock_t *old_head = &codeblock[block_dirty_list_head];
-
- block->next = block_dirty_list_head;
- block->prev = BLOCK_INVALID;
- block_dirty_list_head = old_head->prev = get_block_nr(block);
-// pclog(" next=%p,%i prev=%i\n", old_head, block->next, old_head->prev);
- }
- else
- {
- /*List empty*/
- block->prev = block->next = BLOCK_INVALID;
- block_dirty_list_head = block_dirty_list_tail = get_block_nr(block);
- }
- block->flags |= CODEBLOCK_IN_DIRTY_LIST;
-// pclog(" block_dirty_list_add: %p flags = %x\n", block, block->flags);
- dirty_list_size++;
- if (dirty_list_size > DIRTY_LIST_MAX_SIZE)
- {
- /*Evict oldest block to the free list*/
- codeblock_t *evict_block = &codeblock[block_dirty_list_tail];
-
-#ifndef RELEASE_BUILD
- if (!(evict_block->flags & CODEBLOCK_IN_DIRTY_LIST))
- fatal("block_dirty_list_add: evict_block=%p %x %x not in dirty list\n", evict_block, evict_block->phys, evict_block->flags);
- if (!block_dirty_list_tail)
- fatal("block_dirty_list_add - !block_dirty_list_tail\n");
- if (evict_block->prev == BLOCK_INVALID)
- fatal("block_dirty_list_add - evict_block->prev == BLOCK_INVALID\n");
-#endif
-
- block_dirty_list_tail = evict_block->prev;
- codeblock[evict_block->prev].next = BLOCK_INVALID;
-
- dirty_list_size--;
- evict_block->flags &= ~CODEBLOCK_IN_DIRTY_LIST;
-// pclog(" block_dirty_list_add: %p flags = %x\n", evict_block, evict_block->flags);
- delete_dirty_block(evict_block);
- }
-
-// pclog("block_free_list_add: %p %p\n", block, block->next);
-}
-
-static void block_dirty_list_remove(codeblock_t *block)
-{
- codeblock_t *prev_block = &codeblock[block->prev];
- codeblock_t *next_block = &codeblock[block->next];
-
-#ifndef RELEASE_BUILD
- if (!(block->flags & CODEBLOCK_IN_DIRTY_LIST))
- fatal("block_dirty_list_remove: block=%p not in dirty list\n", block);
-#endif
-
- /*Is block head of list*/
- if (block->prev == BLOCK_INVALID)
- block_dirty_list_head = block->next;
- else
- prev_block->next = block->next;
-
- /*Is block tail of list?*/
- if (block->next == BLOCK_INVALID)
- block_dirty_list_tail = block->prev;
- else
- next_block->prev = block->prev;
-
- dirty_list_size--;
-#ifndef RELEASE_BUILD
- if (dirty_list_size < 0)
- fatal("remove - dirty_list_size < 0!\n");
-#endif
- block->flags &= ~CODEBLOCK_IN_DIRTY_LIST;
-// pclog(" block_dirty_list_remove: %p flags = %x\n", block, block->flags);
-}
-
-int codegen_purge_purgable_list()
-{
- if (purgable_page_list_head)
- {
- page_t *page = &pages[purgable_page_list_head];
-
- if (page->code_present_mask & page->dirty_mask)
- {
- codegen_check_flush(page, page->dirty_mask, purgable_page_list_head << 12);
-
- if (block_free_list)
- return 1;
- }
- }
- return 0;
-}
-
-static codeblock_t *block_free_list_get()
-{
- codeblock_t *block = NULL;
-
- while (!block_free_list)
- {
- /*Free list is empty, check the dirty list*/
- if (block_dirty_list_tail)
- {
-#ifndef RELEASE_BUILD
- if (dirty_list_size <= 0)
- fatal("get - dirty_list_size <= 0!\n");
-#endif
- /*Reuse oldest block*/
- block = &codeblock[block_dirty_list_tail];
-
-// pclog("block_free_list_get: remove block=%p size=%i\n", block, dirty_list_size);
- block_dirty_list_tail = block->prev;
- if (block->prev == BLOCK_INVALID)
- block_dirty_list_head = BLOCK_INVALID;
- else
- codeblock[block->prev].next = BLOCK_INVALID;
- dirty_list_size--;
- block->flags &= ~CODEBLOCK_IN_DIRTY_LIST;
- delete_dirty_block(block);
- block_free_list = get_block_nr(block);
- break;
- }
- /*Free list is empty - free up a block*/
- if (!codegen_purge_purgable_list())
- codegen_delete_random_block(0);
- }
-
- block = &codeblock[block_free_list];
- block_free_list = block->next;
- block->flags &= ~CODEBLOCK_IN_FREE_LIST;
-// pclog(" block_free_list_get: %p flags = %x\n", block, block->flags);
- block->next = 0;
-// pclog("block_free_list_get: %p %p\n", block, block_free_list);
- return block;
-}
-
-void codegen_init()
-{
- int c;
-
- codegen_allocator_init();
-
- codegen_backend_init();
- block_free_list = 0;
- for (c = 0; c < BLOCK_SIZE; c++)
- block_free_list_add(&codeblock[c]);
- block_dirty_list_head = block_dirty_list_tail = 0;
- dirty_list_size = 0;
-#ifdef DEBUG_EXTRA
- memset(instr_counts, 0, sizeof(instr_counts));
-#endif
-}
-
-void codegen_close()
-{
-#ifdef DEBUG_EXTRA
- pclog("Instruction counts :\n");
- while (1)
- {
- int c;
- uint32_t highest_num = 0, highest_idx = 0;
-
- for (c = 0; c < 256*256; c++)
- {
- if (instr_counts[c] > highest_num)
- {
- highest_num = instr_counts[c];
- highest_idx = c;
- }
- }
- if (!highest_num)
- break;
-
- instr_counts[highest_idx] = 0;
- if (highest_idx > 256)
- pclog(" %02x %02x = %u\n", highest_idx >> 8, highest_idx & 0xff, highest_num);
- else
- pclog(" %02x = %u\n", highest_idx & 0xff, highest_num);
- }
-#endif
-}
-
-void codegen_reset()
-{
- int c;
-
- for (c = 1; c < BLOCK_SIZE; c++)
- {
- codeblock_t *block = &codeblock[c];
-
- if (block->pc != BLOCK_PC_INVALID)
- {
- block->phys = 0;
- block->phys_2 = 0;
- delete_block(block);
- }
- }
-
- memset(codeblock, 0, BLOCK_SIZE * sizeof(codeblock_t));
- memset(codeblock_hash, 0, HASH_SIZE * sizeof(uint16_t));
- mem_reset_page_blocks();
-
- block_free_list = 0;
- for (c = 0; c < BLOCK_SIZE; c++)
- {
- codeblock[c].pc = BLOCK_PC_INVALID;
- block_free_list_add(&codeblock[c]);
- }
-}
-
-void dump_block()
-{
-/* codeblock_t *block = pages[0x119000 >> 12].block;
-
- pclog("dump_block:\n");
- while (block)
- {
- uint32_t start_pc = (block->pc & 0xffc) | (block->phys & ~0xfff);
- uint32_t end_pc = (block->endpc & 0xffc) | (block->phys & ~0xfff);
- pclog(" %p : %08x-%08x %08x-%08x %p %p\n", (void *)block, start_pc, end_pc, block->pc, block->endpc, (void *)block->prev, (void *)block->next);
- if (!block->pc)
- fatal("Dead PC=0\n");
-
- block = block->next;
- }
- pclog("dump_block done\n");*/
-}
-
-static void add_to_block_list(codeblock_t *block)
-{
- uint16_t block_prev_nr = pages[block->phys >> 12].block;
- uint16_t block_nr = get_block_nr(block);
-//pclog("Add to block list %p %08x %llx %x\n", block, block->phys, block->page_mask2, block->flags);
-
-#ifndef RELEASE_BUILD
- if (!block->page_mask)
- fatal("add_to_block_list - mask = 0 %llx %llx\n", block->page_mask,block->page_mask2);
-#endif
- if (block_prev_nr)
- {
- block->next = block_prev_nr;
- codeblock[block_prev_nr].prev = block_nr;
- pages[block->phys >> 12].block = block_nr;
- }
- else
- {
- block->next = BLOCK_INVALID;
- pages[block->phys >> 12].block = block_nr;
- }
-
- if (block->next)
- {
-#ifndef RELEASE_BUILD
- if (codeblock[block->next].pc == BLOCK_PC_INVALID)
- fatal("block->next->pc=BLOCK_PC_INVALID %p %p %x %x\n", (void *)&codeblock[block->next], (void *)codeblock, block_current, block_pos);
-#endif
- }
-
- if (block->page_mask2)
- {
- block->flags |= CODEBLOCK_HAS_PAGE2;
-
- block_prev_nr = pages[block->phys_2 >> 12].block_2;
-
- if (block_prev_nr)
- {
- block->next_2 = block_prev_nr;
- codeblock[block_prev_nr].prev_2 = block_nr;
- pages[block->phys_2 >> 12].block_2 = block_nr;
- }
- else
- {
- block->next_2 = BLOCK_INVALID;
- pages[block->phys_2 >> 12].block_2 = block_nr;
- }
- }
-// pclog(" add_to_block_list: %p flags = %x\n", block, block->flags);
-}
-
-static void remove_from_block_list(codeblock_t *block, uint32_t pc)
-{
- if (!block->page_mask)
- return;
-#ifndef RELEASE_BUILD
- if (block->flags & CODEBLOCK_IN_DIRTY_LIST)
- fatal("remove_from_block_list: in dirty list\n");
-#endif
- if (block->prev)
- {
- codeblock[block->prev].next = block->next;
- if (block->next)
- codeblock[block->next].prev = block->prev;
- }
- else
- {
- pages[block->phys >> 12].block = block->next;
- if (block->next)
- codeblock[block->next].prev = BLOCK_INVALID;
- else
- mem_flush_write_page(block->phys, 0);
- }
-
- if (!(block->flags & CODEBLOCK_HAS_PAGE2))
- {
-#ifndef RELEASE_BUILD
- if (block->prev_2 || block->next_2)
- fatal("Invalid block_2 %x %p %08x\n", block->flags, block, block->phys);
-#endif
- return;
- }
- block->flags &= ~CODEBLOCK_HAS_PAGE2;
-// pclog(" remove_from_block_list: %p flags = %x\n", block, block->flags);
-
- if (block->prev_2)
- {
- codeblock[block->prev_2].next_2 = block->next_2;
- if (block->next_2)
- codeblock[block->next_2].prev_2 = block->prev_2;
- }
- else
- {
-// pclog(" pages.block_2=%p 3 %p %p\n", (void *)block->next_2, (void *)block, (void *)pages[block->phys_2 >> 12].block_2);
- pages[block->phys_2 >> 12].block_2 = block->next_2;
- if (block->next_2)
- codeblock[block->next_2].prev_2 = BLOCK_INVALID;
- else
- mem_flush_write_page(block->phys_2, 0);
- }
-}
-
-static void invalidate_block(codeblock_t *block)
-{
- uint32_t old_pc = block->pc;
-
-#ifndef RELEASE_BUILD
- if (block->flags & CODEBLOCK_IN_DIRTY_LIST)
- fatal("invalidate_block: already in dirty list\n");
- if (block->pc == BLOCK_PC_INVALID)
- fatal("Invalidating deleted block\n");
-#endif
- remove_from_block_list(block, old_pc);
- block_dirty_list_add(block);
- if (block->head_mem_block)
- codegen_allocator_free(block->head_mem_block);
- block->head_mem_block = NULL;
-}
-
-static void delete_block(codeblock_t *block)
-{
- uint32_t old_pc = block->pc;
-
- if (block == &codeblock[codeblock_hash[HASH(block->phys)]])
- codeblock_hash[HASH(block->phys)] = BLOCK_INVALID;
-
-#ifndef RELEASE_BUILD
- if (block->pc == BLOCK_PC_INVALID)
- fatal("Deleting deleted block\n");
-#endif
- block->pc = BLOCK_PC_INVALID;
-
- codeblock_tree_delete(block);
- if (block->flags & CODEBLOCK_IN_DIRTY_LIST)
- block_dirty_list_remove(block);
- else
- remove_from_block_list(block, old_pc);
- if (block->head_mem_block)
- codegen_allocator_free(block->head_mem_block);
- block->head_mem_block = NULL;
- block_free_list_add(block);
-}
-
-static void delete_dirty_block(codeblock_t *block)
-{
- if (block == &codeblock[codeblock_hash[HASH(block->phys)]])
- codeblock_hash[HASH(block->phys)] = BLOCK_INVALID;
-
-#ifndef RELEASE_BUILD
- if (block->pc == BLOCK_PC_INVALID)
- fatal("Deleting deleted block\n");
-#endif
- block->pc = BLOCK_PC_INVALID;
-
- codeblock_tree_delete(block);
- block_free_list_add(block);
-}
-
-void codegen_delete_block(codeblock_t *block)
-{
- if (block->pc != BLOCK_PC_INVALID)
- delete_block(block);
-}
-
-void codegen_delete_random_block(int required_mem_block)
-{
- int block_nr = rand() & BLOCK_MASK;
-
- while (1)
- {
- if (block_nr && block_nr != block_current)
- {
- codeblock_t *block = &codeblock[block_nr];
-
- if (block->pc != BLOCK_PC_INVALID && (!required_mem_block || block->head_mem_block))
- {
- delete_block(block);
- return;
- }
- }
- block_nr = (block_nr + 1) & BLOCK_MASK;
- }
-}
-
-void codegen_check_flush(page_t *page, uint64_t mask, uint32_t phys_addr)
-{
- uint16_t block_nr = page->block;
- int remove_from_evict_list = 0;
- int c;
-
- while (block_nr)
- {
- codeblock_t *block = &codeblock[block_nr];
- uint16_t next_block = block->next;
-
- if (*block->dirty_mask & block->page_mask)
- {
-// pclog("Delete block from codegen_check_flush %08x %08x %016llx %016llx %016llx %02x\n", phys_addr, block->pc, *block->dirty_mask, block->page_mask, *block->dirty_mask & block->page_mask, block->flags);
- invalidate_block(block);
- cpu_recomp_evicted++;
- }
-#ifndef RELEASE_BUILD
- if (block_nr == next_block)
- fatal("Broken 1\n");
-#endif
- block_nr = next_block;
- }
-
- block_nr = page->block_2;
-
- while (block_nr)
- {
- codeblock_t *block = &codeblock[block_nr];
- uint16_t next_block = block->next_2;
-
- if (*block->dirty_mask2 & block->page_mask2)
- {
-// pclog("Delete block from codegen_check_flush2 %08x %08x\n", phys_addr, block->pc);*/
- invalidate_block(block);
- cpu_recomp_evicted++;
- }
-#ifndef RELEASE_BUILD
- if (block_nr == next_block)
- fatal("Broken 2\n");
-#endif
- block_nr = next_block;
- }
-
- if (page->code_present_mask & page->dirty_mask)
- remove_from_evict_list = 1;
- page->code_present_mask &= ~page->dirty_mask;
- page->dirty_mask = 0;
-
- for (c = 0; c < 64; c++)
- {
- if (page->byte_code_present_mask[c] & page->byte_dirty_mask[c])
- remove_from_evict_list = 0;
- page->byte_code_present_mask[c] &= ~page->byte_dirty_mask[c];
- page->byte_dirty_mask[c] = 0;
- }
- if (remove_from_evict_list)
- page_remove_from_evict_list(page);
-}
-
-void codegen_block_init(uint32_t phys_addr)
-{
- codeblock_t *block;
- page_t *page = &pages[phys_addr >> 12];
-
- if (!page->block)
- mem_flush_write_page(phys_addr, cs+cpu_state.pc);
- block = block_free_list_get();
-#ifndef RELEASE_BUILD
- if (!block)
- fatal("codegen_block_init: block_free_list_get() returned NULL\n");
-#endif
- block_current = get_block_nr(block);
-
- block_num = HASH(phys_addr);
- codeblock_hash[block_num] = block_current;
-
- block->ins = 0;
- block->pc = cs + cpu_state.pc;
- block->_cs = cs;
- block->phys = phys_addr;
- block->dirty_mask = &page->dirty_mask;
- block->dirty_mask2 = NULL;
- block->next = block->prev = BLOCK_INVALID;
- block->next_2 = block->prev_2 = BLOCK_INVALID;
- block->page_mask = block->page_mask2 = 0;
- block->flags = CODEBLOCK_STATIC_TOP;
-// pclog(" block_init: %p flags = %x\n", block, block->flags);
- block->status = cpu_cur_status;
-
- recomp_page = block->phys & ~0xfff;
-// pclog("codegen_block_init: %08x\n", block->pc);
- codeblock_tree_add(block);
-}
-
-static ir_data_t *ir_data;
-
-ir_data_t *codegen_get_ir_data()
-{
- return ir_data;
-}
-
-void codegen_block_start_recompile(codeblock_t *block)
-{
- page_t *page = &pages[block->phys >> 12];
-
- if (!page->block)
- mem_flush_write_page(block->phys, cs+cpu_state.pc);
-
- block_num = HASH(block->phys);
- block_current = get_block_nr(block);//block->pnt;
-#ifndef RELEASE_BUILD
- if (block->pc != cs + cpu_state.pc || (block->flags & CODEBLOCK_WAS_RECOMPILED))
- fatal("Recompile to used block!\n");
-#endif
- block->head_mem_block = codegen_allocator_allocate(NULL, block_current);
- block->data = codeblock_allocator_get_ptr(block->head_mem_block);
-
- block->status = cpu_cur_status;
-
- block->page_mask = block->page_mask2 = 0;
- block->ins = 0;
-
- cpu_block_end = 0;
-
-// pclog("New block %i for %08X %03x\n", block_current, cs+pc, block_num);
-
- last_op32 = -1;
- last_ea_seg = NULL;
- last_ssegs = -1;
-
- codegen_block_cycles = 0;
- codegen_timing_block_start();
-
- codegen_block_ins = 0;
- codegen_block_full_ins = 0;
-
- recomp_page = block->phys & ~0xfff;
-
- codegen_flags_changed = 0;
- codegen_fpu_entered = 0;
- codegen_mmx_entered = 0;
-
- codegen_fpu_loaded_iq[0] = codegen_fpu_loaded_iq[1] = codegen_fpu_loaded_iq[2] = codegen_fpu_loaded_iq[3] =
- codegen_fpu_loaded_iq[4] = codegen_fpu_loaded_iq[5] = codegen_fpu_loaded_iq[6] = codegen_fpu_loaded_iq[7] = 0;
-
- cpu_state.seg_ds.checked = cpu_state.seg_es.checked = cpu_state.seg_fs.checked = cpu_state.seg_gs.checked = (cr0 & 1) ? 0 : 1;
-
- block->TOP = cpu_state.TOP & 7;
- block->flags |= CODEBLOCK_WAS_RECOMPILED;
-
- codegen_flat_ds = !(cpu_cur_status & CPU_STATUS_NOTFLATDS);
- codegen_flat_ss = !(cpu_cur_status & CPU_STATUS_NOTFLATSS);
-
- if (block->flags & CODEBLOCK_BYTE_MASK)
- {
- block->dirty_mask = &page->byte_dirty_mask[(block->phys >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK];
- block->dirty_mask2 = NULL;
- }
-
- ir_data = codegen_ir_init();
- ir_data->block = block;
- codegen_reg_reset();
- codegen_accumulate_reset();
- codegen_generate_reset();
-}
-
-
-void codegen_block_remove()
-{
- codeblock_t *block = &codeblock[block_current];
-
- delete_block(block);
- cpu_recomp_removed++;
-
- recomp_page = -1;
-}
-
-void codegen_block_generate_end_mask_recompile()
-{
- codeblock_t *block = &codeblock[block_current];
- page_t *p;
-//pclog("gen_end_mask: %08x %08x %016llx %016llx\n", block->pc, codegen_endpc, block->page_mask,block->page_mask2);
-
- p = &pages[block->phys >> 12];
- if (block->flags & CODEBLOCK_BYTE_MASK)
- {
- int offset = (block->phys >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK;
-
- p->byte_code_present_mask[offset] |= block->page_mask;
- }
- else
- p->code_present_mask |= block->page_mask;
-
- if ((*(block->dirty_mask) & block->page_mask) && !page_in_evict_list(p))
- page_add_to_evict_list(p);
-
- block->phys_2 = -1;
- block->next_2 = block->prev_2 = BLOCK_INVALID;
- if (block->page_mask2)
- {
- block->phys_2 = get_phys_noabrt(codegen_endpc);
- if (block->phys_2 != -1)
- {
- page_t *page_2 = &pages[block->phys_2 >> 12];
-
- if (block->flags & CODEBLOCK_BYTE_MASK)
- {
- int offset = (block->phys_2 >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK;
-
- page_2->byte_code_present_mask[offset] |= block->page_mask2;
- block->dirty_mask2 = &page_2->byte_dirty_mask[offset];
- }
- else
- {
- page_2->code_present_mask |= block->page_mask2;
- block->dirty_mask2 = &page_2->dirty_mask;
- }
- if (((*block->dirty_mask2) & block->page_mask2) && !page_in_evict_list(page_2))
- page_add_to_evict_list(page_2);
-
- if (!pages[block->phys_2 >> 12].block_2)
- mem_flush_write_page(block->phys_2, codegen_endpc);
-
-#ifndef RELEASE_BUILD
- if (!block->page_mask2)
- fatal("!page_mask2\n");
- if (block->next_2)
- {
-// pclog(" next_2->pc=%08x\n", block->next_2->pc);
- if (codeblock[block->next_2].pc == BLOCK_PC_INVALID)
- fatal("block->next_2->pc=BLOCK_PC_INVALID %p\n", (void *)&codeblock[block->next_2]);
- }
-#endif
- }
- else
- {
- /*Second page not present. page_mask2 is most likely set only because
- the recompiler didn't know how long the last instruction was, so
- clear it*/
- block->page_mask2 = 0;
- }
- }
-
-// pclog("block_end: %08x %08x %016llx\n", block->pc, codegen_endpc, block->page_mask);
- recomp_page = -1;
-}
-
-void codegen_block_generate_end_mask_mark()
-{
- codeblock_t *block = &codeblock[block_current];
- uint32_t start_pc;
- uint32_t end_pc;
- page_t *p;
-
-#ifndef RELEASE_BUILD
- if (block->flags & CODEBLOCK_BYTE_MASK)
- fatal("codegen_block_generate_end_mask2() - BYTE_MASK\n");
-#endif
- block->page_mask = 0;
- start_pc = (block->pc & 0xfff) & ~63;
- if ((block->pc ^ codegen_endpc) & ~0xfff)
- end_pc = 0xfff & ~63;
- else
- end_pc = (codegen_endpc & 0xfff) & ~63;
- if (end_pc < start_pc)
- end_pc = 0xfff;
- start_pc >>= PAGE_MASK_SHIFT;
- end_pc >>= PAGE_MASK_SHIFT;
-
-// pclog("block_end: %08x %08x\n", start_pc, end_pc);
- for (; start_pc <= end_pc; start_pc++)
- {
- block->page_mask |= ((uint64_t)1 << start_pc);
-// pclog(" %08x %llx\n", start_pc, block->page_mask);
- }
-
- p = &pages[block->phys >> 12];
- p->code_present_mask |= block->page_mask;
- if ((p->dirty_mask & block->page_mask) && !page_in_evict_list(p))
- page_add_to_evict_list(p);
-
- block->phys_2 = -1;
- block->page_mask2 = 0;
- block->next_2 = block->prev_2 = BLOCK_INVALID;
- if ((block->pc ^ codegen_endpc) & ~0xfff)
- {
- block->phys_2 = get_phys_noabrt(codegen_endpc);
- if (block->phys_2 != -1)
- {
- page_t *page_2 = &pages[block->phys_2 >> 12];
-
- start_pc = 0;
- end_pc = (codegen_endpc & 0xfff) >> PAGE_MASK_SHIFT;
- for (; start_pc <= end_pc; start_pc++)
- block->page_mask2 |= ((uint64_t)1 << start_pc);
-
- page_2->code_present_mask |= block->page_mask2;
- if ((page_2->dirty_mask & block->page_mask2) && !page_in_evict_list(page_2))
- page_add_to_evict_list(page_2);
-
- if (!pages[block->phys_2 >> 12].block_2)
- mem_flush_write_page(block->phys_2, codegen_endpc);
-#ifndef RELEASE_BUILD
- if (!block->page_mask2)
- fatal("!page_mask2\n");
- if (block->next_2)
- {
-// pclog(" next_2->pc=%08x\n", block->next_2->pc);
- if (codeblock[block->next_2].pc == BLOCK_PC_INVALID)
- fatal("block->next_2->pc=BLOCK_PC_INVALID %p\n", (void *)&codeblock[block->next_2]);
- }
-#endif
- block->dirty_mask2 = &page_2->dirty_mask;
- }
- else
- {
- /*Second page not present. page_mask2 is most likely set only because
- the recompiler didn't know how long the last instruction was, so
- clear it*/
- block->page_mask2 = 0;
- }
- }
-
-// pclog("block_end: %08x %08x %016llx\n", block->pc, codegen_endpc, block->page_mask);
- recomp_page = -1;
-}
-
-void codegen_block_end()
-{
- codeblock_t *block = &codeblock[block_current];
-
- codegen_block_generate_end_mask_mark();
- add_to_block_list(block);
-}
-
-void codegen_block_end_recompile(codeblock_t *block)
-{
- codegen_timing_block_end();
- codegen_accumulate(ACCREG_cycles, -codegen_block_cycles);
-
- if (block->flags & CODEBLOCK_IN_DIRTY_LIST)
- block_dirty_list_remove(block);
- else
- remove_from_block_list(block, block->pc);
- block->next = block->prev = BLOCK_INVALID;
- block->next_2 = block->prev_2 = BLOCK_INVALID;
- codegen_block_generate_end_mask_recompile();
- add_to_block_list(block);
-// pclog("End block %i\n", block_num);
-
- if (!(block->flags & CODEBLOCK_HAS_FPU))
- block->flags &= ~CODEBLOCK_STATIC_TOP;
-
- codegen_accumulate_flush(ir_data);
- codegen_ir_compile(ir_data, block);
-}
-
-void codegen_flush()
-{
- return;
-}
-
-void codegen_mark_code_present_multibyte(codeblock_t *block, uint32_t start_pc, int len)
-{
- if (len)
- {
- uint32_t end_pc = start_pc + (len-1);
-
- if (block->flags & CODEBLOCK_BYTE_MASK)
- {
- uint32_t start_pc_masked = start_pc & PAGE_MASK_MASK;
- uint32_t end_pc_masked = end_pc & PAGE_MASK_MASK;
-
- if ((start_pc ^ block->pc) & ~0x3f) /*Starts in second page*/
- {
- for (; start_pc_masked <= end_pc_masked; start_pc_masked++)
- block->page_mask2 |= ((uint64_t)1 << start_pc_masked);
- }
- else if (((start_pc + (len-1)) ^ block->pc) & ~0x3f) /*Crosses both pages*/
- {
- for (; start_pc_masked <= 63; start_pc_masked++)
- block->page_mask |= ((uint64_t)1 << start_pc_masked);
- for (start_pc_masked = 0; start_pc_masked <= end_pc_masked; start_pc_masked++)
- block->page_mask2 |= ((uint64_t)1 << start_pc_masked);
- }
- else /*First page only*/
- {
- for (; start_pc_masked <= end_pc_masked; start_pc_masked++)
- block->page_mask |= ((uint64_t)1 << start_pc_masked);
- }
- }
- else
- {
- uint32_t start_pc_shifted = start_pc >> PAGE_MASK_SHIFT;
- uint32_t end_pc_shifted = end_pc >> PAGE_MASK_SHIFT;
- start_pc_shifted &= PAGE_MASK_MASK;
- end_pc_shifted &= PAGE_MASK_MASK;
-
- if ((start_pc ^ block->pc) & ~0xfff) /*Starts in second page*/
- {
- for (; start_pc_shifted <= end_pc_shifted; start_pc_shifted++)
- block->page_mask2 |= ((uint64_t)1 << start_pc_shifted);
- }
- else if (((start_pc + (len-1)) ^ block->pc) & ~0xfff) /*Crosses both pages*/
- {
- for (; start_pc_shifted <= 63; start_pc_shifted++)
- block->page_mask |= ((uint64_t)1 << start_pc_shifted);
- for (start_pc_shifted = 0; start_pc_shifted <= end_pc_shifted; start_pc_shifted++)
- block->page_mask2 |= ((uint64_t)1 << start_pc_shifted);
- }
- else /*First page only*/
- {
- for (; start_pc_shifted <= end_pc_shifted; start_pc_shifted++)
- block->page_mask |= ((uint64_t)1 << start_pc_shifted);
- }
- }
- }
-}
diff --git a/src/codegen_ir.c b/src/codegen_ir.c
deleted file mode 100644
index e42ac49..0000000
--- a/src/codegen_ir.c
+++ /dev/null
@@ -1,214 +0,0 @@
-#include "ibm.h"
-#include "codegen.h"
-#include "codegen_allocator.h"
-#include "codegen_backend.h"
-#include "codegen_ir.h"
-#include "codegen_reg.h"
-
-extern int has_ea;
-static ir_data_t ir_block;
-
-static int codegen_unroll_start, codegen_unroll_count;
-static int codegen_unroll_first_instruction;
-
-ir_data_t *codegen_ir_init()
-{
- ir_block.wr_pos = 0;
-// pclog("codegen_ir_init %04x:%04x\n", CS,cpu_state.pc);
-
- codegen_unroll_count = 0;
-
- return &ir_block;
-}
-
-void codegen_ir_set_unroll(int count, int start, int first_instruction)
-{
- codegen_unroll_count = count;
- codegen_unroll_start = start;
- codegen_unroll_first_instruction = first_instruction;
-}
-
-static void duplicate_uop(ir_data_t *ir, uop_t *uop, int offset)
-{
- uop_t *new_uop = uop_alloc(ir, uop->type);
-
-// pclog(" uop type %08x\n", uop->type);
- if (!ir_reg_is_invalid(uop->src_reg_a))
- new_uop->src_reg_a = codegen_reg_read(uop->src_reg_a.reg);
- if (!ir_reg_is_invalid(uop->src_reg_b))
- new_uop->src_reg_b = codegen_reg_read(uop->src_reg_b.reg);
- if (!ir_reg_is_invalid(uop->src_reg_c))
- new_uop->src_reg_c = codegen_reg_read(uop->src_reg_c.reg);
- if (!ir_reg_is_invalid(uop->dest_reg_a))
- new_uop->dest_reg_a = codegen_reg_write(uop->dest_reg_a.reg, ir->wr_pos-1);
-
- new_uop->type = uop->type;
- new_uop->imm_data = uop->imm_data;
- new_uop->p = uop->p;
- new_uop->pc = uop->pc;
-
- if (uop->jump_dest_uop != -1)
- {
- new_uop->jump_dest_uop = uop->jump_dest_uop + offset;
- }
-}
-
-void codegen_ir_compile(ir_data_t *ir, codeblock_t *block)
-{
- int jump_target_at_end = -1;
- int c;
-
- if (codegen_unroll_count)
- {
- int unroll_count;
- int unroll_end;
-
- codegen_set_loop_start(ir, codegen_unroll_first_instruction);
- unroll_end = ir->wr_pos;
-
- for (unroll_count = 1; unroll_count < codegen_unroll_count; unroll_count++)
- {
- int offset = ir->wr_pos - codegen_unroll_start;
-// pclog("Unroll from %i to %i, offset %i - iteration %i\n", codegen_unroll_start, ir->wr_pos, offset, unroll_count);
- for (c = codegen_unroll_start; c < unroll_end; c++)
- {
-// pclog(" Duplicate uop %i\n", c);
- duplicate_uop(ir, &ir->uops[c], offset);
- }
- }
- }
-
- codegen_reg_mark_as_required();
- codegen_reg_process_dead_list(ir);
- block_write_data = codeblock_allocator_get_ptr(block->head_mem_block);
- block_pos = 0;
- codegen_backend_prologue(block);
-
- for (c = 0; c < ir->wr_pos; c++)
- {
- uop_t *uop = &ir->uops[c];
-
-// pclog("uOP %i : %08x\n", c, uop->type);
-
- if (uop->type & UOP_TYPE_BARRIER)
- codegen_reg_flush_invalidate(ir, block);
-
- if (uop->type & UOP_TYPE_JUMP_DEST)
- {
- uop_t *uop_dest = uop;
-
- while (uop_dest->jump_list_next != -1)
- {
- uop_dest = &ir->uops[uop_dest->jump_list_next];
- codegen_set_jump_dest(block, uop_dest->p);
- }
- }
-
- if ((uop->type & UOP_MASK) == UOP_INVALID)
- continue;
-
-#ifdef CODEGEN_BACKEND_HAS_MOV_IMM
- if ((uop->type & UOP_MASK) == (UOP_MOV_IMM & UOP_MASK) && reg_is_native_size(uop->dest_reg_a) && !codegen_reg_is_loaded(uop->dest_reg_a) && reg_version[IREG_GET_REG(uop->dest_reg_a.reg)][uop->dest_reg_a.version].refcount <= 0)
- {
- /*Special case for UOP_MOV_IMM - if destination not already in host register
- and won't be used again then just store directly to memory*/
- codegen_reg_write_imm(block, uop->dest_reg_a, uop->imm_data);
- }
- else
-#endif
- if ((uop->type & UOP_MASK) == (UOP_MOV & UOP_MASK) && reg_version[IREG_GET_REG(uop->src_reg_a.reg)][uop->src_reg_a.version].refcount <= 1 &&
- reg_is_native_size(uop->src_reg_a) && reg_is_native_size(uop->dest_reg_a))
- {
- /*Special case for UOP_MOV - if source register won't be used again then
- just rename it to dest register instead of moving*/
- codegen_reg_alloc_register(invalid_ir_reg, uop->src_reg_a, invalid_ir_reg, invalid_ir_reg);
- uop->src_reg_a_real = codegen_reg_alloc_read_reg(block, uop->src_reg_a, NULL);
- codegen_reg_rename(block, uop->src_reg_a, uop->dest_reg_a);
- if (uop->type & UOP_TYPE_ORDER_BARRIER)
- codegen_reg_flush(ir, block);
- }
- else
- {
- if (uop->type & UOP_TYPE_PARAMS_REGS)
- {
- codegen_reg_alloc_register(uop->dest_reg_a, uop->src_reg_a, uop->src_reg_b, uop->src_reg_c);
- if (uop->src_reg_a.reg != IREG_INVALID)
- {
- uop->src_reg_a_real = codegen_reg_alloc_read_reg(block, uop->src_reg_a, NULL);
- }
- if (uop->src_reg_b.reg != IREG_INVALID)
- {
- uop->src_reg_b_real = codegen_reg_alloc_read_reg(block, uop->src_reg_b, NULL);
- }
- if (uop->src_reg_c.reg != IREG_INVALID)
- {
- uop->src_reg_c_real = codegen_reg_alloc_read_reg(block, uop->src_reg_c, NULL);
- }
- }
-
- if (uop->type & UOP_TYPE_ORDER_BARRIER)
- codegen_reg_flush(ir, block);
-
- if (uop->type & UOP_TYPE_PARAMS_REGS)
- {
- if (uop->dest_reg_a.reg != IREG_INVALID)
- {
- uop->dest_reg_a_real = codegen_reg_alloc_write_reg(block, uop->dest_reg_a);
- }
- }
-#ifndef RELEASE_BUILD
- if (!uop_handlers[uop->type & UOP_MASK])
- fatal("!uop_handlers[uop->type & UOP_MASK] %08x\n", uop->type);
-#endif
- uop_handlers[uop->type & UOP_MASK](block, uop);
- }
-
- if (uop->type & UOP_TYPE_JUMP)
- {
- if (uop->jump_dest_uop == ir->wr_pos)
- {
- if (jump_target_at_end == -1)
- jump_target_at_end = c;
- else
- {
- uop_t *uop_dest = &ir->uops[jump_target_at_end];
-
- while (uop_dest->jump_list_next != -1)
- uop_dest = &ir->uops[uop_dest->jump_list_next];
-
- uop_dest->jump_list_next = c;
- }
- }
- else
- {
- uop_t *uop_dest = &ir->uops[uop->jump_dest_uop];
-
- while (uop_dest->jump_list_next != -1)
- uop_dest = &ir->uops[uop_dest->jump_list_next];
-
- uop_dest->jump_list_next = c;
- ir->uops[uop->jump_dest_uop].type |= UOP_TYPE_JUMP_DEST;
- }
- }
- }
-
- codegen_reg_flush_invalidate(ir, block);
-
- if (jump_target_at_end != -1)
- {
- uop_t *uop_dest = &ir->uops[jump_target_at_end];
-
- while (1)
- {
- codegen_set_jump_dest(block, uop_dest->p);
- if (uop_dest->jump_list_next == -1)
- break;
- uop_dest = &ir->uops[uop_dest->jump_list_next];
- }
- }
-
- codegen_backend_epilogue(block);
- block_write_data = NULL;
-// if (has_ea)
-// fatal("IR compilation complete\n");
-}
diff --git a/src/codegen_ir.h b/src/codegen_ir.h
deleted file mode 100644
index 6274816..0000000
--- a/src/codegen_ir.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#include "codegen_ir_defs.h"
-
-ir_data_t *codegen_ir_init();
-
-void codegen_ir_set_unroll(int count, int start, int first_instruction);
-void codegen_ir_compile(ir_data_t *ir, codeblock_t *block);
diff --git a/src/codegen_ir_defs.h b/src/codegen_ir_defs.h
deleted file mode 100644
index b1f4b3c..0000000
--- a/src/codegen_ir_defs.h
+++ /dev/null
@@ -1,817 +0,0 @@
-#ifndef _CODEGEN_IR_DEFS_
-#define _CODEGEN_IR_DEFS_
-
-#include "codegen_reg.h"
-
-#define UOP_REG(reg, size, version) ((reg) | (size) | (version << 8))
-
-/*uOP is a barrier. All previous uOPs must have completed before this one executes.
- All registers must have been written back or discarded.
- This should be used when calling external functions that may change any emulated
- registers.*/
-#define UOP_TYPE_BARRIER (1 << 31)
-
-/*uOP is a barrier. All previous uOPs must have completed before this one executes.
- All registers must have been written back, but do not have to be discarded.
- This should be used when calling functions that preserve registers, but can cause
- the code block to exit (eg memory load/store functions).*/
-#define UOP_TYPE_ORDER_BARRIER (1 << 27)
-
-/*uOP uses source and dest registers*/
-#define UOP_TYPE_PARAMS_REGS (1 << 28)
-/*uOP uses pointer*/
-#define UOP_TYPE_PARAMS_POINTER (1 << 29)
-/*uOP uses immediate data*/
-#define UOP_TYPE_PARAMS_IMM (1 << 30)
-
-/*uOP is a jump, with the destination uOP in uop->jump_dest_uop. The compiler must
- set jump_dest in the destination uOP to the address of the branch offset to be
- written when known.*/
-#define UOP_TYPE_JUMP (1 << 26)
-/*uOP is the destination of a jump, and must set the destination offset of the jump
- at compile time.*/
-#define UOP_TYPE_JUMP_DEST (1 << 25)
-
-
-#define UOP_LOAD_FUNC_ARG_0 (UOP_TYPE_PARAMS_REGS | 0x00)
-#define UOP_LOAD_FUNC_ARG_1 (UOP_TYPE_PARAMS_REGS | 0x01)
-#define UOP_LOAD_FUNC_ARG_2 (UOP_TYPE_PARAMS_REGS | 0x02)
-#define UOP_LOAD_FUNC_ARG_3 (UOP_TYPE_PARAMS_REGS | 0x03)
-#define UOP_LOAD_FUNC_ARG_0_IMM (UOP_TYPE_PARAMS_IMM | 0x08 | UOP_TYPE_BARRIER)
-#define UOP_LOAD_FUNC_ARG_1_IMM (UOP_TYPE_PARAMS_IMM | 0x09 | UOP_TYPE_BARRIER)
-#define UOP_LOAD_FUNC_ARG_2_IMM (UOP_TYPE_PARAMS_IMM | 0x0a | UOP_TYPE_BARRIER)
-#define UOP_LOAD_FUNC_ARG_3_IMM (UOP_TYPE_PARAMS_IMM | 0x0b | UOP_TYPE_BARRIER)
-#define UOP_CALL_FUNC (UOP_TYPE_PARAMS_POINTER | 0x10 | UOP_TYPE_BARRIER)
-/*UOP_CALL_INSTRUCTION_FUNC - call instruction handler at p, check return value and exit block if non-zero*/
-#define UOP_CALL_INSTRUCTION_FUNC (UOP_TYPE_PARAMS_POINTER | 0x11 | UOP_TYPE_BARRIER)
-#define UOP_STORE_P_IMM (UOP_TYPE_PARAMS_IMM | 0x12)
-#define UOP_STORE_P_IMM_8 (UOP_TYPE_PARAMS_IMM | 0x13)
-/*UOP_LOAD_SEG - load segment in src_reg_a to segment p via loadseg(), check return value and exit block if non-zero*/
-#define UOP_LOAD_SEG (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_POINTER | 0x14 | UOP_TYPE_BARRIER)
-/*UOP_JMP - jump to ptr*/
-#define UOP_JMP (UOP_TYPE_PARAMS_POINTER | 0x15 | UOP_TYPE_ORDER_BARRIER)
-/*UOP_CALL_FUNC - call instruction handler at p, dest_reg = return value*/
-#define UOP_CALL_FUNC_RESULT (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_POINTER | 0x16 | UOP_TYPE_BARRIER)
-/*UOP_JMP_DEST - jump to ptr*/
-#define UOP_JMP_DEST (UOP_TYPE_PARAMS_IMM | UOP_TYPE_PARAMS_POINTER | 0x17 | UOP_TYPE_ORDER_BARRIER | UOP_TYPE_JUMP)
-#define UOP_NOP_BARRIER (UOP_TYPE_BARRIER | 0x18)
-#define UOP_STORE_P_IMM_16 (UOP_TYPE_PARAMS_IMM | 0x19)
-
-#ifdef DEBUG_EXTRA
-/*UOP_LOG_INSTR - log non-recompiled instruction in imm_data*/
-#define UOP_LOG_INSTR (UOP_TYPE_PARAMS_IMM | 0x1f)
-#endif
-
-/*UOP_MOV_PTR - dest_reg = p*/
-#define UOP_MOV_PTR (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_POINTER | 0x20)
-/*UOP_MOV_IMM - dest_reg = imm_data*/
-#define UOP_MOV_IMM (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x21)
-/*UOP_MOV - dest_reg = src_reg_a*/
-#define UOP_MOV (UOP_TYPE_PARAMS_REGS | 0x22)
-/*UOP_MOVZX - dest_reg = zero_extend(src_reg_a)*/
-#define UOP_MOVZX (UOP_TYPE_PARAMS_REGS | 0x23)
-/*UOP_MOVSX - dest_reg = sign_extend(src_reg_a)*/
-#define UOP_MOVSX (UOP_TYPE_PARAMS_REGS | 0x24)
-/*UOP_MOV_DOUBLE_INT - dest_reg = (double)src_reg_a*/
-#define UOP_MOV_DOUBLE_INT (UOP_TYPE_PARAMS_REGS | 0x25)
-/*UOP_MOV_INT_DOUBLE - dest_reg = (int)src_reg_a. New rounding control in src_reg_b, old rounding control in src_reg_c*/
-#define UOP_MOV_INT_DOUBLE (UOP_TYPE_PARAMS_REGS | 0x26)
-/*UOP_MOV_INT_DOUBLE_64 - dest_reg = (int)src_reg_a. New rounding control in src_reg_b, old rounding control in src_reg_c*/
-#define UOP_MOV_INT_DOUBLE_64 (UOP_TYPE_PARAMS_REGS | 0x27)
-/*UOP_MOV_REG_PTR - dest_reg = *p*/
-#define UOP_MOV_REG_PTR (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_POINTER | 0x28)
-/*UOP_MOVZX_REG_PTR_8 - dest_reg = *(uint8_t *)p*/
-#define UOP_MOVZX_REG_PTR_8 (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_POINTER | 0x29)
-/*UOP_MOVZX_REG_PTR_16 - dest_reg = *(uint16_t *)p*/
-#define UOP_MOVZX_REG_PTR_16 (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_POINTER | 0x2a)
-/*UOP_ADD - dest_reg = src_reg_a + src_reg_b*/
-#define UOP_ADD (UOP_TYPE_PARAMS_REGS | 0x30)
-/*UOP_ADD_IMM - dest_reg = src_reg_a + immediate*/
-#define UOP_ADD_IMM (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x31)
-/*UOP_AND - dest_reg = src_reg_a & src_reg_b*/
-#define UOP_AND (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x32)
-/*UOP_AND_IMM - dest_reg = src_reg_a & immediate*/
-#define UOP_AND_IMM (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x33)
-/*UOP_ADD_LSHIFT - dest_reg = src_reg_a + (src_reg_b << imm_data)
- Intended for EA calcluations, imm_data must be between 0 and 3*/
-#define UOP_ADD_LSHIFT (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x34)
-/*UOP_OR - dest_reg = src_reg_a | src_reg_b*/
-#define UOP_OR (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x35)
-/*UOP_OR_IMM - dest_reg = src_reg_a | immediate*/
-#define UOP_OR_IMM (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x36)
-/*UOP_SUB - dest_reg = src_reg_a - src_reg_b*/
-#define UOP_SUB (UOP_TYPE_PARAMS_REGS | 0x37)
-/*UOP_SUB_IMM - dest_reg = src_reg_a - immediate*/
-#define UOP_SUB_IMM (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x38)
-/*UOP_XOR - dest_reg = src_reg_a ^ src_reg_b*/
-#define UOP_XOR (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x39)
-/*UOP_XOR_IMM - dest_reg = src_reg_a ^ immediate*/
-#define UOP_XOR_IMM (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x3a)
-/*UOP_ANDN - dest_reg = ~src_reg_a & src_reg_b*/
-#define UOP_ANDN (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x3b)
-/*UOP_MEM_LOAD_ABS - dest_reg = src_reg_a:[immediate]*/
-#define UOP_MEM_LOAD_ABS (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x40 | UOP_TYPE_ORDER_BARRIER)
-/*UOP_MEM_LOAD_REG - dest_reg = src_reg_a:[src_reg_b]*/
-#define UOP_MEM_LOAD_REG (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x41 | UOP_TYPE_ORDER_BARRIER)
-/*UOP_MEM_STORE_ABS - src_reg_a:[immediate] = src_reg_b*/
-#define UOP_MEM_STORE_ABS (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x42 | UOP_TYPE_ORDER_BARRIER)
-/*UOP_MEM_STORE_REG - src_reg_a:[src_reg_b] = src_reg_c*/
-#define UOP_MEM_STORE_REG (UOP_TYPE_PARAMS_REGS | 0x43 | UOP_TYPE_ORDER_BARRIER)
-/*UOP_MEM_STORE_IMM_8 - byte src_reg_a:[src_reg_b] = imm_data*/
-#define UOP_MEM_STORE_IMM_8 (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x44 | UOP_TYPE_ORDER_BARRIER)
-/*UOP_MEM_STORE_IMM_16 - word src_reg_a:[src_reg_b] = imm_data*/
-#define UOP_MEM_STORE_IMM_16 (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x45 | UOP_TYPE_ORDER_BARRIER)
-/*UOP_MEM_STORE_IMM_32 - long src_reg_a:[src_reg_b] = imm_data*/
-#define UOP_MEM_STORE_IMM_32 (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x46 | UOP_TYPE_ORDER_BARRIER)
-/*UOP_MEM_LOAD_SINGLE - dest_reg = (float)src_reg_a:[src_reg_b]*/
-#define UOP_MEM_LOAD_SINGLE (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x47 | UOP_TYPE_ORDER_BARRIER)
-/*UOP_CMP_IMM_JZ - if (src_reg_a == imm_data) then jump to ptr*/
-#define UOP_CMP_IMM_JZ (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | UOP_TYPE_PARAMS_POINTER | 0x48 | UOP_TYPE_ORDER_BARRIER)
-/*UOP_MEM_LOAD_DOUBLE - dest_reg = (double)src_reg_a:[src_reg_b]*/
-#define UOP_MEM_LOAD_DOUBLE (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x49 | UOP_TYPE_ORDER_BARRIER)
-/*UOP_MEM_STORE_SINGLE - src_reg_a:[src_reg_b] = src_reg_c*/
-#define UOP_MEM_STORE_SINGLE (UOP_TYPE_PARAMS_REGS | 0x4a | UOP_TYPE_ORDER_BARRIER)
-/*UOP_MEM_STORE_DOUBLE - src_reg_a:[src_reg_b] = src_reg_c*/
-#define UOP_MEM_STORE_DOUBLE (UOP_TYPE_PARAMS_REGS | 0x4b | UOP_TYPE_ORDER_BARRIER)
-/*UOP_CMP_JB - if (src_reg_a < src_reg_b) then jump to ptr*/
-#define UOP_CMP_JB (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_POINTER | 0x4c | UOP_TYPE_ORDER_BARRIER)
-/*UOP_CMP_JNBE - if (src_reg_a > src_reg_b) then jump to ptr*/
-#define UOP_CMP_JNBE (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_POINTER | 0x4d | UOP_TYPE_ORDER_BARRIER)
-
-/*UOP_SAR - dest_reg = src_reg_a >> src_reg_b*/
-#define UOP_SAR (UOP_TYPE_PARAMS_REGS | 0x50)
-/*UOP_SAR_IMM - dest_reg = src_reg_a >> immediate*/
-#define UOP_SAR_IMM (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x51)
-/*UOP_SHL - dest_reg = src_reg_a << src_reg_b*/
-#define UOP_SHL (UOP_TYPE_PARAMS_REGS | 0x52)
-/*UOP_SHL_IMM - dest_reg = src_reg_a << immediate*/
-#define UOP_SHL_IMM (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x53)
-/*UOP_SHR - dest_reg = src_reg_a >> src_reg_b*/
-#define UOP_SHR (UOP_TYPE_PARAMS_REGS | 0x54)
-/*UOP_SHR_IMM - dest_reg = src_reg_a >> immediate*/
-#define UOP_SHR_IMM (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x55)
-/*UOP_ROL - dest_reg = src_reg_a rotate<< src_reg_b*/
-#define UOP_ROL (UOP_TYPE_PARAMS_REGS | 0x56)
-/*UOP_ROL_IMM - dest_reg = src_reg_a rotate<< immediate*/
-#define UOP_ROL_IMM (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x57)
-/*UOP_ROR - dest_reg = src_reg_a rotate>> src_reg_b*/
-#define UOP_ROR (UOP_TYPE_PARAMS_REGS | 0x58)
-/*UOP_ROR_IMM - dest_reg = src_reg_a rotate>> immediate*/
-#define UOP_ROR_IMM (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | 0x59)
-
-/*UOP_CMP_IMM_JZ_DEST - if (src_reg_a == imm_data) then jump to ptr*/
-#define UOP_CMP_IMM_JZ_DEST (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | UOP_TYPE_PARAMS_POINTER | 0x60 | UOP_TYPE_ORDER_BARRIER | UOP_TYPE_JUMP)
-/*UOP_CMP_IMM_JNZ_DEST - if (src_reg_a != imm_data) then jump to ptr*/
-#define UOP_CMP_IMM_JNZ_DEST (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | UOP_TYPE_PARAMS_POINTER | 0x61 | UOP_TYPE_ORDER_BARRIER | UOP_TYPE_JUMP)
-
-/*UOP_CMP_JB_DEST - if (src_reg_a < src_reg_b) then jump to ptr*/
-#define UOP_CMP_JB_DEST (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | UOP_TYPE_PARAMS_POINTER | 0x62 | UOP_TYPE_ORDER_BARRIER | UOP_TYPE_JUMP)
-/*UOP_CMP_JNB_DEST - if (src_reg_a >= src_reg_b) then jump to ptr*/
-#define UOP_CMP_JNB_DEST (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | UOP_TYPE_PARAMS_POINTER | 0x63 | UOP_TYPE_ORDER_BARRIER | UOP_TYPE_JUMP)
-/*UOP_CMP_JO_DEST - if (src_reg_a < src_reg_b) then jump to ptr*/
-#define UOP_CMP_JO_DEST (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | UOP_TYPE_PARAMS_POINTER | 0x64 | UOP_TYPE_ORDER_BARRIER | UOP_TYPE_JUMP)
-/*UOP_CMP_JNO_DEST - if (src_reg_a >= src_reg_b) then jump to ptr*/
-#define UOP_CMP_JNO_DEST (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | UOP_TYPE_PARAMS_POINTER | 0x65 | UOP_TYPE_ORDER_BARRIER | UOP_TYPE_JUMP)
-/*UOP_CMP_JZ_DEST - if (src_reg_a == src_reg_b) then jump to ptr*/
-#define UOP_CMP_JZ_DEST (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | UOP_TYPE_PARAMS_POINTER | 0x66 | UOP_TYPE_ORDER_BARRIER | UOP_TYPE_JUMP)
-/*UOP_CMP_JNZ_DEST - if (src_reg_a != src_reg_b) then jump to ptr*/
-#define UOP_CMP_JNZ_DEST (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | UOP_TYPE_PARAMS_POINTER | 0x67 | UOP_TYPE_ORDER_BARRIER | UOP_TYPE_JUMP)
-/*UOP_CMP_JL_DEST - if (signed)(src_reg_a < src_reg_b) then jump to ptr*/
-#define UOP_CMP_JL_DEST (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | UOP_TYPE_PARAMS_POINTER | 0x68 | UOP_TYPE_ORDER_BARRIER | UOP_TYPE_JUMP)
-/*UOP_CMP_JNL_DEST - if (signed)(src_reg_a >= src_reg_b) then jump to ptr*/
-#define UOP_CMP_JNL_DEST (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | UOP_TYPE_PARAMS_POINTER | 0x69 | UOP_TYPE_ORDER_BARRIER | UOP_TYPE_JUMP)
-/*UOP_CMP_JBE_DEST - if (src_reg_a <= src_reg_b) then jump to ptr*/
-#define UOP_CMP_JBE_DEST (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | UOP_TYPE_PARAMS_POINTER | 0x6a | UOP_TYPE_ORDER_BARRIER | UOP_TYPE_JUMP)
-/*UOP_CMP_JNBE_DEST - if (src_reg_a > src_reg_b) then jump to ptr*/
-#define UOP_CMP_JNBE_DEST (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | UOP_TYPE_PARAMS_POINTER | 0x6b | UOP_TYPE_ORDER_BARRIER | UOP_TYPE_JUMP)
-/*UOP_CMP_JLE_DEST - if (signed)(src_reg_a <= src_reg_b) then jump to ptr*/
-#define UOP_CMP_JLE_DEST (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | UOP_TYPE_PARAMS_POINTER | 0x6c | UOP_TYPE_ORDER_BARRIER | UOP_TYPE_JUMP)
-/*UOP_CMP_JNLE_DEST - if (signed)(src_reg_a > src_reg_b) then jump to ptr*/
-#define UOP_CMP_JNLE_DEST (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | UOP_TYPE_PARAMS_POINTER | 0x6d | UOP_TYPE_ORDER_BARRIER | UOP_TYPE_JUMP)
-
-
-/*UOP_TEST_JNS_DEST - if (src_reg_a positive) then jump to ptr*/
-#define UOP_TEST_JNS_DEST (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | UOP_TYPE_PARAMS_POINTER | 0x70 | UOP_TYPE_ORDER_BARRIER | UOP_TYPE_JUMP)
-/*UOP_TEST_JS_DEST - if (src_reg_a positive) then jump to ptr*/
-#define UOP_TEST_JS_DEST (UOP_TYPE_PARAMS_REGS | UOP_TYPE_PARAMS_IMM | UOP_TYPE_PARAMS_POINTER | 0x71 | UOP_TYPE_ORDER_BARRIER | UOP_TYPE_JUMP)
-
-/*UOP_FP_ENTER - must be called before any FPU register accessed*/
-#define UOP_FP_ENTER (UOP_TYPE_PARAMS_IMM | 0x80 | UOP_TYPE_BARRIER)
-/*UOP_FADD - (floating point) dest_reg = src_reg_a + src_reg_b*/
-#define UOP_FADD (UOP_TYPE_PARAMS_REGS | 0x81)
-/*UOP_FSUB - (floating point) dest_reg = src_reg_a - src_reg_b*/
-#define UOP_FSUB (UOP_TYPE_PARAMS_REGS | 0x82)
-/*UOP_FMUL - (floating point) dest_reg = src_reg_a * src_reg_b*/
-#define UOP_FMUL (UOP_TYPE_PARAMS_REGS | 0x83)
-/*UOP_FDIV - (floating point) dest_reg = src_reg_a / src_reg_b*/
-#define UOP_FDIV (UOP_TYPE_PARAMS_REGS | 0x84)
-/*UOP_FCOM - dest_reg = flags from compare(src_reg_a, src_reg_b)*/
-#define UOP_FCOM (UOP_TYPE_PARAMS_REGS | 0x85)
-/*UOP_FABS - dest_reg = fabs(src_reg_a)*/
-#define UOP_FABS (UOP_TYPE_PARAMS_REGS | 0x86)
-/*UOP_FCHS - dest_reg = fabs(src_reg_a)*/
-#define UOP_FCHS (UOP_TYPE_PARAMS_REGS | 0x87)
-/*UOP_FTST - dest_reg = flags from compare(src_reg_a, 0)*/
-#define UOP_FTST (UOP_TYPE_PARAMS_REGS | 0x88)
-/*UOP_FSQRT - dest_reg = fsqrt(src_reg_a)*/
-#define UOP_FSQRT (UOP_TYPE_PARAMS_REGS | 0x89)
-
-/*UOP_MMX_ENTER - must be called before any MMX registers accessed*/
-#define UOP_MMX_ENTER (UOP_TYPE_PARAMS_IMM | 0x90 | UOP_TYPE_BARRIER)
-/*UOP_PADDB - (packed byte) dest_reg = src_reg_a + src_reg_b*/
-#define UOP_PADDB (UOP_TYPE_PARAMS_REGS | 0x91)
-/*UOP_PADDW - (packed word) dest_reg = src_reg_a + src_reg_b*/
-#define UOP_PADDW (UOP_TYPE_PARAMS_REGS | 0x92)
-/*UOP_PADDD - (packed long) dest_reg = src_reg_a + src_reg_b*/
-#define UOP_PADDD (UOP_TYPE_PARAMS_REGS | 0x93)
-/*UOP_PADDSB - (packed byte with signed saturation) dest_reg = src_reg_a + src_reg_b*/
-#define UOP_PADDSB (UOP_TYPE_PARAMS_REGS | 0x94)
-/*UOP_PADDSW - (packed word with signed saturation) dest_reg = src_reg_a + src_reg_b*/
-#define UOP_PADDSW (UOP_TYPE_PARAMS_REGS | 0x95)
-/*UOP_PADDUSB - (packed byte with unsigned saturation) dest_reg = src_reg_a + src_reg_b*/
-#define UOP_PADDUSB (UOP_TYPE_PARAMS_REGS | 0x96)
-/*UOP_PADDUSW - (packed word with unsigned saturation) dest_reg = src_reg_a + src_reg_b*/
-#define UOP_PADDUSW (UOP_TYPE_PARAMS_REGS | 0x97)
-/*UOP_PSUBB - (packed byte) dest_reg = src_reg_a - src_reg_b*/
-#define UOP_PSUBB (UOP_TYPE_PARAMS_REGS | 0x98)
-/*UOP_PSUBW - (packed word) dest_reg = src_reg_a - src_reg_b*/
-#define UOP_PSUBW (UOP_TYPE_PARAMS_REGS | 0x99)
-/*UOP_PSUBD - (packed long) dest_reg = src_reg_a - src_reg_b*/
-#define UOP_PSUBD (UOP_TYPE_PARAMS_REGS | 0x9a)
-/*UOP_PSUBSB - (packed byte with signed saturation) dest_reg = src_reg_a - src_reg_b*/
-#define UOP_PSUBSB (UOP_TYPE_PARAMS_REGS | 0x9b)
-/*UOP_PSUBSW - (packed word with signed saturation) dest_reg = src_reg_a - src_reg_b*/
-#define UOP_PSUBSW (UOP_TYPE_PARAMS_REGS | 0x9c)
-/*UOP_PSUBUSB - (packed byte with unsigned saturation) dest_reg = src_reg_a - src_reg_b*/
-#define UOP_PSUBUSB (UOP_TYPE_PARAMS_REGS | 0x9d)
-/*UOP_PSUBUSW - (packed word with unsigned saturation) dest_reg = src_reg_a - src_reg_b*/
-#define UOP_PSUBUSW (UOP_TYPE_PARAMS_REGS | 0x9e)
-/*UOP_PSLLW_IMM - (packed word) dest_reg = src_reg_a << immediate*/
-#define UOP_PSLLW_IMM (UOP_TYPE_PARAMS_REGS | 0x9f)
-/*UOP_PSLLD_IMM - (packed long) dest_reg = src_reg_a << immediate*/
-#define UOP_PSLLD_IMM (UOP_TYPE_PARAMS_REGS | 0xa0)
-/*UOP_PSLLQ_IMM - (packed quad) dest_reg = src_reg_a << immediate*/
-#define UOP_PSLLQ_IMM (UOP_TYPE_PARAMS_REGS | 0xa1)
-/*UOP_PSRAW_IMM - (packed word) dest_reg = src_reg_a >> immediate*/
-#define UOP_PSRAW_IMM (UOP_TYPE_PARAMS_REGS | 0xa2)
-/*UOP_PSRAD_IMM - (packed long) dest_reg = src_reg_a >> immediate*/
-#define UOP_PSRAD_IMM (UOP_TYPE_PARAMS_REGS | 0xa3)
-/*UOP_PSRAQ_IMM - (packed quad) dest_reg = src_reg_a >> immediate*/
-#define UOP_PSRAQ_IMM (UOP_TYPE_PARAMS_REGS | 0xa4)
-/*UOP_PSRLW_IMM - (packed word) dest_reg = src_reg_a >> immediate*/
-#define UOP_PSRLW_IMM (UOP_TYPE_PARAMS_REGS | 0xa5)
-/*UOP_PSRLD_IMM - (packed long) dest_reg = src_reg_a >> immediate*/
-#define UOP_PSRLD_IMM (UOP_TYPE_PARAMS_REGS | 0xa6)
-/*UOP_PSRLQ_IMM - (packed quad) dest_reg = src_reg_a >> immediate*/
-#define UOP_PSRLQ_IMM (UOP_TYPE_PARAMS_REGS | 0xa7)
-/*UOP_PCMPEQB - (packed byte) dest_reg = (src_reg_a == src_reg_b) ? ~0 : 0*/
-#define UOP_PCMPEQB (UOP_TYPE_PARAMS_REGS | 0xa8)
-/*UOP_PCMPEQW - (packed word) dest_reg = (src_reg_a == src_reg_b) ? ~0 : 0*/
-#define UOP_PCMPEQW (UOP_TYPE_PARAMS_REGS | 0xa9)
-/*UOP_PCMPEQD - (packed long) dest_reg = (src_reg_a == src_reg_b) ? ~0 : 0*/
-#define UOP_PCMPEQD (UOP_TYPE_PARAMS_REGS | 0xaa)
-/*UOP_PCMPGTB - (packed signed byte) dest_reg = (src_reg_a > src_reg_b) ? ~0 : 0*/
-#define UOP_PCMPGTB (UOP_TYPE_PARAMS_REGS | 0xab)
-/*UOP_PCMPGTW - (packed signed word) dest_reg = (src_reg_a > src_reg_b) ? ~0 : 0*/
-#define UOP_PCMPGTW (UOP_TYPE_PARAMS_REGS | 0xac)
-/*UOP_PCMPGTD - (packed signed long) dest_reg = (src_reg_a > src_reg_b) ? ~0 : 0*/
-#define UOP_PCMPGTD (UOP_TYPE_PARAMS_REGS | 0xad)
-/*UOP_PUNPCKLBW - (packed byte) dest_reg = interleave low src_reg_a/src_reg_b*/
-#define UOP_PUNPCKLBW (UOP_TYPE_PARAMS_REGS | 0xae)
-/*UOP_PUNPCKLWD - (packed word) dest_reg = interleave low src_reg_a/src_reg_b*/
-#define UOP_PUNPCKLWD (UOP_TYPE_PARAMS_REGS | 0xaf)
-/*UOP_PUNPCKLDQ - (packed long) dest_reg = interleave low src_reg_a/src_reg_b*/
-#define UOP_PUNPCKLDQ (UOP_TYPE_PARAMS_REGS | 0xb0)
-/*UOP_PUNPCKHBW - (packed byte) dest_reg = interleave high src_reg_a/src_reg_b*/
-#define UOP_PUNPCKHBW (UOP_TYPE_PARAMS_REGS | 0xb1)
-/*UOP_PUNPCKHWD - (packed word) dest_reg = interleave high src_reg_a/src_reg_b*/
-#define UOP_PUNPCKHWD (UOP_TYPE_PARAMS_REGS | 0xb2)
-/*UOP_PUNPCKHDQ - (packed long) dest_reg = interleave high src_reg_a/src_reg_b*/
-#define UOP_PUNPCKHDQ (UOP_TYPE_PARAMS_REGS | 0xb3)
-/*UOP_PACKSSWB - dest_reg = interleave src_reg_a/src_reg_b, converting words to bytes with signed saturation*/
-#define UOP_PACKSSWB (UOP_TYPE_PARAMS_REGS | 0xb4)
-/*UOP_PACKSSDW - dest_reg = interleave src_reg_a/src_reg_b, converting longs to words with signed saturation*/
-#define UOP_PACKSSDW (UOP_TYPE_PARAMS_REGS | 0xb5)
-/*UOP_PACKUSWB - dest_reg = interleave src_reg_a/src_reg_b, converting words to bytes with unsigned saturation*/
-#define UOP_PACKUSWB (UOP_TYPE_PARAMS_REGS | 0xb6)
-/*UOP_PMULLW - (packed word) dest_reg = (src_reg_a * src_reg_b) & 0xffff*/
-#define UOP_PMULLW (UOP_TYPE_PARAMS_REGS | 0xb7)
-/*UOP_PMULHW - (packed word) dest_reg = (src_reg_a * src_reg_b) >> 16*/
-#define UOP_PMULHW (UOP_TYPE_PARAMS_REGS | 0xb8)
-/*UOP_PMADDWD - (packed word) dest_reg = (src_reg_a * src_reg_b) >> 16*/
-#define UOP_PMADDWD (UOP_TYPE_PARAMS_REGS | 0xb9)
-
-/*UOP_PFADD - (packed float) dest_reg = src_reg_a + src_reg_b*/
-#define UOP_PFADD (UOP_TYPE_PARAMS_REGS | 0xba)
-/*UOP_PFSUB - (packed float) dest_reg = src_reg_a - src_reg_b*/
-#define UOP_PFSUB (UOP_TYPE_PARAMS_REGS | 0xbb)
-/*UOP_PFMUL - (packed float) dest_reg = src_reg_a * src_reg_b*/
-#define UOP_PFMUL (UOP_TYPE_PARAMS_REGS | 0xbc)
-/*UOP_PFMAX - (packed float) dest_reg = MAX(src_reg_a, src_reg_b)*/
-#define UOP_PFMAX (UOP_TYPE_PARAMS_REGS | 0xbd)
-/*UOP_PFMIN - (packed float) dest_reg = MIN(src_reg_a, src_reg_b)*/
-#define UOP_PFMIN (UOP_TYPE_PARAMS_REGS | 0xbe)
-/*UOP_PFCMPEQ - (packed float) dest_reg = (src_reg_a == src_reg_b) ? ~0 : 0*/
-#define UOP_PFCMPEQ (UOP_TYPE_PARAMS_REGS | 0xbf)
-/*UOP_PFCMPGE - (packed float) dest_reg = (src_reg_a >= src_reg_b) ? ~0 : 0*/
-#define UOP_PFCMPGE (UOP_TYPE_PARAMS_REGS | 0xc0)
-/*UOP_PFCMPGT - (packed float) dest_reg = (src_reg_a > src_reg_b) ? ~0 : 0*/
-#define UOP_PFCMPGT (UOP_TYPE_PARAMS_REGS | 0xc1)
-/*UOP_PF2ID - (packed long)dest_reg = (packed float)src_reg_a*/
-#define UOP_PF2ID (UOP_TYPE_PARAMS_REGS | 0xc2)
-/*UOP_PI2FD - (packed float)dest_reg = (packed long)src_reg_a*/
-#define UOP_PI2FD (UOP_TYPE_PARAMS_REGS | 0xc3)
-/*UOP_PFRCP - (packed float) dest_reg[0] = dest_reg[1] = 1.0 / src_reg[0]*/
-#define UOP_PFRCP (UOP_TYPE_PARAMS_REGS | 0xc4)
-/*UOP_PFRSQRT - (packed float) dest_reg[0] = dest_reg[1] = 1.0 / sqrt(src_reg[0])*/
-#define UOP_PFRSQRT (UOP_TYPE_PARAMS_REGS | 0xc5)
-
-#define UOP_MAX 0xc6
-
-#define UOP_INVALID 0xff
-
-#define UOP_MASK 0xffff
-
-typedef struct uop_t
-{
- uint32_t type;
- ir_reg_t dest_reg_a;
- ir_reg_t src_reg_a;
- ir_reg_t src_reg_b;
- ir_reg_t src_reg_c;
- uint32_t imm_data;
- void *p;
- ir_host_reg_t dest_reg_a_real;
- ir_host_reg_t src_reg_a_real, src_reg_b_real, src_reg_c_real;
- int jump_dest_uop;
- int jump_list_next;
- void *jump_dest;
- uint32_t pc;
-} uop_t;
-
-#define UOP_NR_MAX 4096
-
-typedef struct ir_data_t
-{
- uop_t uops[UOP_NR_MAX];
- int wr_pos;
- struct codeblock_t *block;
-} ir_data_t;
-
-static inline uop_t *uop_alloc(ir_data_t *ir, uint32_t uop_type)
-{
- uop_t *uop;
-
- if (ir->wr_pos >= UOP_NR_MAX)
- fatal("Exceeded uOP max\n");
-
- uop = &ir->uops[ir->wr_pos++];
-
- uop->dest_reg_a = invalid_ir_reg;
- uop->src_reg_a = invalid_ir_reg;
- uop->src_reg_b = invalid_ir_reg;
- uop->src_reg_c = invalid_ir_reg;
-
- uop->pc = cpu_state.oldpc;
-
- uop->jump_dest_uop = -1;
- uop->jump_list_next = -1;
-
- if (uop_type & (UOP_TYPE_BARRIER | UOP_TYPE_ORDER_BARRIER))
- codegen_reg_mark_as_required();
-
- return uop;
-}
-
-static inline void uop_set_jump_dest(ir_data_t *ir, int jump_uop)
-{
- uop_t *uop = &ir->uops[jump_uop];
-
- uop->jump_dest_uop = ir->wr_pos;
-}
-
-static inline int uop_gen(uint32_t uop_type, ir_data_t *ir)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
-
- return ir->wr_pos-1;
-}
-
-static inline int uop_gen_reg_src1(uint32_t uop_type, ir_data_t *ir, int src_reg_a)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->src_reg_a = codegen_reg_read(src_reg_a);
-
- return ir->wr_pos-1;
-}
-
-static inline void uop_gen_reg_src1_arg(uint32_t uop_type, ir_data_t *ir, int arg, int src_reg_a)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->src_reg_a = codegen_reg_read(src_reg_a);
-}
-
-static inline int uop_gen_reg_src1_imm(uint32_t uop_type, ir_data_t *ir, int src_reg, uint32_t imm)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->src_reg_a = codegen_reg_read(src_reg);
- uop->imm_data = imm;
-
- return ir->wr_pos-1;
-}
-
-static inline void uop_gen_reg_dst_imm(uint32_t uop_type, ir_data_t *ir, int dest_reg, uint32_t imm)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->dest_reg_a = codegen_reg_write(dest_reg, ir->wr_pos - 1);
- uop->imm_data = imm;
-}
-
-static inline void uop_gen_reg_dst_pointer(uint32_t uop_type, ir_data_t *ir, int dest_reg, void *p)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->dest_reg_a = codegen_reg_write(dest_reg, ir->wr_pos - 1);
- uop->p = p;
-}
-
-static inline void uop_gen_reg_dst_src1(uint32_t uop_type, ir_data_t *ir, int dest_reg, int src_reg)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->src_reg_a = codegen_reg_read(src_reg);
- uop->dest_reg_a = codegen_reg_write(dest_reg, ir->wr_pos - 1);
-}
-
-static inline void uop_gen_reg_dst_src1_imm(uint32_t uop_type, ir_data_t *ir, int dest_reg, int src_reg_a, uint32_t imm)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->src_reg_a = codegen_reg_read(src_reg_a);
- uop->dest_reg_a = codegen_reg_write(dest_reg, ir->wr_pos - 1);
- uop->imm_data = imm;
-}
-
-static inline void uop_gen_reg_dst_src2(uint32_t uop_type, ir_data_t *ir, int dest_reg, int src_reg_a, int src_reg_b)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->src_reg_a = codegen_reg_read(src_reg_a);
- uop->src_reg_b = codegen_reg_read(src_reg_b);
- uop->dest_reg_a = codegen_reg_write(dest_reg, ir->wr_pos - 1);
-}
-
-static inline void uop_gen_reg_dst_src2_imm(uint32_t uop_type, ir_data_t *ir, int dest_reg, int src_reg_a, int src_reg_b, uint32_t imm)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->src_reg_a = codegen_reg_read(src_reg_a);
- uop->src_reg_b = codegen_reg_read(src_reg_b);
- uop->dest_reg_a = codegen_reg_write(dest_reg, ir->wr_pos - 1);
- uop->imm_data = imm;
-}
-
-static inline void uop_gen_reg_dst_src3(uint32_t uop_type, ir_data_t *ir, int dest_reg, int src_reg_a, int src_reg_b, int src_reg_c)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->src_reg_a = codegen_reg_read(src_reg_a);
- uop->src_reg_b = codegen_reg_read(src_reg_b);
- uop->src_reg_c = codegen_reg_read(src_reg_c);
- uop->dest_reg_a = codegen_reg_write(dest_reg, ir->wr_pos - 1);
-}
-
-static inline void uop_gen_reg_dst_src_imm(uint32_t uop_type, ir_data_t *ir, int dest_reg, int src_reg, uint32_t imm)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->src_reg_a = codegen_reg_read(src_reg);
- uop->dest_reg_a = codegen_reg_write(dest_reg, ir->wr_pos - 1);
- uop->imm_data = imm;
-}
-
-static inline int uop_gen_reg_src2(uint32_t uop_type, ir_data_t *ir, int src_reg_a, int src_reg_b)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->src_reg_a = codegen_reg_read(src_reg_a);
- uop->src_reg_b = codegen_reg_read(src_reg_b);
-
- return ir->wr_pos-1;
-}
-
-static inline void uop_gen_reg_src2_imm(uint32_t uop_type, ir_data_t *ir, int src_reg_a, int src_reg_b, uint32_t imm)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->src_reg_a = codegen_reg_read(src_reg_a);
- uop->src_reg_b = codegen_reg_read(src_reg_b);
- uop->imm_data = imm;
-}
-
-static inline void uop_gen_reg_src3(uint32_t uop_type, ir_data_t *ir, int src_reg_a, int src_reg_b, int src_reg_c)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->src_reg_a = codegen_reg_read(src_reg_a);
- uop->src_reg_b = codegen_reg_read(src_reg_b);
- uop->src_reg_c = codegen_reg_read(src_reg_c);
-}
-
-static inline void uop_gen_reg_src3_imm(uint32_t uop_type, ir_data_t *ir, int src_reg_a, int src_reg_b, int src_reg_c, uint32_t imm)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->src_reg_a = codegen_reg_read(src_reg_a);
- uop->src_reg_b = codegen_reg_read(src_reg_b);
- uop->src_reg_c = codegen_reg_read(src_reg_c);
- uop->imm_data = imm;
-}
-
-static inline void uop_gen_imm(uint32_t uop_type, ir_data_t *ir, uint32_t imm)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->imm_data = imm;
-}
-
-static inline void uop_gen_pointer(uint32_t uop_type, ir_data_t *ir, void *p)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->p = p;
-}
-
-static inline void uop_gen_pointer_imm(uint32_t uop_type, ir_data_t *ir, void *p, uint32_t imm)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->p = p;
- uop->imm_data = imm;
-}
-
-static inline void uop_gen_reg_src_pointer(uint32_t uop_type, ir_data_t *ir, int src_reg_a, void *p)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->src_reg_a = codegen_reg_read(src_reg_a);
- uop->p = p;
-}
-
-static inline void uop_gen_reg_src_pointer_imm(uint32_t uop_type, ir_data_t *ir, int src_reg_a, void *p, uint32_t imm)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->src_reg_a = codegen_reg_read(src_reg_a);
- uop->p = p;
- uop->imm_data = imm;
-}
-
-static inline void uop_gen_reg_src2_pointer(uint32_t uop_type, ir_data_t *ir, int src_reg_a, int src_reg_b, void *p)
-{
- uop_t *uop = uop_alloc(ir, uop_type);
-
- uop->type = uop_type;
- uop->src_reg_a = codegen_reg_read(src_reg_a);
- uop->src_reg_b = codegen_reg_read(src_reg_b);
- uop->p = p;
-}
-
-#define uop_LOAD_FUNC_ARG_REG(ir, arg, reg) uop_gen_reg_src1(UOP_LOAD_FUNC_ARG_0 + arg, ir, reg)
-
-#define uop_LOAD_FUNC_ARG_IMM(ir, arg, imm) uop_gen_imm(UOP_LOAD_FUNC_ARG_0_IMM + arg, ir, imm)
-
-#define uop_ADD(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_ADD, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_ADD_IMM(ir, dst_reg, src_reg, imm) uop_gen_reg_dst_src_imm(UOP_ADD_IMM, ir, dst_reg, src_reg, imm)
-#define uop_ADD_LSHIFT(ir, dst_reg, src_reg_a, src_reg_b, shift) uop_gen_reg_dst_src2_imm(UOP_ADD_LSHIFT, ir, dst_reg, src_reg_a, src_reg_b, shift)
-#define uop_AND(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_AND, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_AND_IMM(ir, dst_reg, src_reg, imm) uop_gen_reg_dst_src_imm(UOP_AND_IMM, ir, dst_reg, src_reg, imm)
-#define uop_ANDN(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_ANDN, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_OR(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_OR, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_OR_IMM(ir, dst_reg, src_reg, imm) uop_gen_reg_dst_src_imm(UOP_OR_IMM, ir, dst_reg, src_reg, imm)
-#define uop_SUB(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_SUB, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_SUB_IMM(ir, dst_reg, src_reg, imm) uop_gen_reg_dst_src_imm(UOP_SUB_IMM, ir, dst_reg, src_reg, imm)
-#define uop_XOR(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_XOR, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_XOR_IMM(ir, dst_reg, src_reg, imm) uop_gen_reg_dst_src_imm(UOP_XOR_IMM, ir, dst_reg, src_reg, imm)
-
-#define uop_SAR(ir, dst_reg, src_reg, shift_reg) uop_gen_reg_dst_src2(UOP_SAR, ir, dst_reg, src_reg, shift_reg)
-#define uop_SAR_IMM(ir, dst_reg, src_reg, imm) uop_gen_reg_dst_src_imm(UOP_SAR_IMM, ir, dst_reg, src_reg, imm)
-#define uop_SHL(ir, dst_reg, src_reg, shift_reg) uop_gen_reg_dst_src2(UOP_SHL, ir, dst_reg, src_reg, shift_reg)
-#define uop_SHL_IMM(ir, dst_reg, src_reg, imm) uop_gen_reg_dst_src_imm(UOP_SHL_IMM, ir, dst_reg, src_reg, imm)
-#define uop_SHR(ir, dst_reg, src_reg, shift_reg) uop_gen_reg_dst_src2(UOP_SHR, ir, dst_reg, src_reg, shift_reg)
-#define uop_SHR_IMM(ir, dst_reg, src_reg, imm) uop_gen_reg_dst_src_imm(UOP_SHR_IMM, ir, dst_reg, src_reg, imm)
-#define uop_ROL(ir, dst_reg, src_reg, shift_reg) uop_gen_reg_dst_src2(UOP_ROL, ir, dst_reg, src_reg, shift_reg)
-#define uop_ROL_IMM(ir, dst_reg, src_reg, imm) uop_gen_reg_dst_src_imm(UOP_ROL_IMM, ir, dst_reg, src_reg, imm)
-#define uop_ROR(ir, dst_reg, src_reg, shift_reg) uop_gen_reg_dst_src2(UOP_ROR, ir, dst_reg, src_reg, shift_reg)
-#define uop_ROR_IMM(ir, dst_reg, src_reg, imm) uop_gen_reg_dst_src_imm(UOP_ROR_IMM, ir, dst_reg, src_reg, imm)
-
-#define uop_CALL_FUNC(ir, p) uop_gen_pointer(UOP_CALL_FUNC, ir, p)
-#define uop_CALL_FUNC_RESULT(ir, dst_reg, p) uop_gen_reg_dst_pointer(UOP_CALL_FUNC_RESULT, ir, dst_reg, p)
-#define uop_CALL_INSTRUCTION_FUNC(ir, p) uop_gen_pointer(UOP_CALL_INSTRUCTION_FUNC, ir, p)
-
-#define uop_CMP_IMM_JZ(ir, src_reg, imm, p) uop_gen_reg_src_pointer_imm(UOP_CMP_IMM_JZ, ir, src_reg, p, imm)
-
-#define uop_CMP_IMM_JNZ_DEST(ir, src_reg, imm) uop_gen_reg_src1_imm(UOP_CMP_IMM_JNZ_DEST, ir, src_reg, imm)
-#define uop_CMP_IMM_JZ_DEST(ir, src_reg, imm) uop_gen_reg_src1_imm(UOP_CMP_IMM_JZ_DEST, ir, src_reg, imm)
-
-#define uop_CMP_JB(ir, src_reg_a, src_reg_b, p) uop_gen_reg_src2_pointer(UOP_CMP_JB, ir, src_reg_a, src_reg_b, p)
-#define uop_CMP_JNBE(ir, src_reg_a, src_reg_b, p) uop_gen_reg_src2_pointer(UOP_CMP_JNBE, ir, src_reg_a, src_reg_b, p)
-
-#define uop_CMP_JNB_DEST(ir, src_reg_a, src_reg_b) uop_gen_reg_src2(UOP_CMP_JNB_DEST, ir, src_reg_a, src_reg_b)
-#define uop_CMP_JNBE_DEST(ir, src_reg_a, src_reg_b) uop_gen_reg_src2(UOP_CMP_JNBE_DEST, ir, src_reg_a, src_reg_b)
-#define uop_CMP_JNL_DEST(ir, src_reg_a, src_reg_b) uop_gen_reg_src2(UOP_CMP_JNL_DEST, ir, src_reg_a, src_reg_b)
-#define uop_CMP_JNLE_DEST(ir, src_reg_a, src_reg_b) uop_gen_reg_src2(UOP_CMP_JNLE_DEST, ir, src_reg_a, src_reg_b)
-#define uop_CMP_JNO_DEST(ir, src_reg_a, src_reg_b) uop_gen_reg_src2(UOP_CMP_JNO_DEST, ir, src_reg_a, src_reg_b)
-#define uop_CMP_JNZ_DEST(ir, src_reg_a, src_reg_b) uop_gen_reg_src2(UOP_CMP_JNZ_DEST, ir, src_reg_a, src_reg_b)
-#define uop_CMP_JB_DEST(ir, src_reg_a, src_reg_b) uop_gen_reg_src2(UOP_CMP_JB_DEST, ir, src_reg_a, src_reg_b)
-#define uop_CMP_JBE_DEST(ir, src_reg_a, src_reg_b) uop_gen_reg_src2(UOP_CMP_JBE_DEST, ir, src_reg_a, src_reg_b)
-#define uop_CMP_JL_DEST(ir, src_reg_a, src_reg_b) uop_gen_reg_src2(UOP_CMP_JL_DEST, ir, src_reg_a, src_reg_b)
-#define uop_CMP_JLE_DEST(ir, src_reg_a, src_reg_b) uop_gen_reg_src2(UOP_CMP_JLE_DEST, ir, src_reg_a, src_reg_b)
-#define uop_CMP_JO_DEST(ir, src_reg_a, src_reg_b) uop_gen_reg_src2(UOP_CMP_JO_DEST, ir, src_reg_a, src_reg_b)
-#define uop_CMP_JZ_DEST(ir, src_reg_a, src_reg_b) uop_gen_reg_src2(UOP_CMP_JZ_DEST, ir, src_reg_a, src_reg_b)
-
-#define uop_FADD(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_FADD, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_FCOM(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_FCOM, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_FDIV(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_FDIV, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_FMUL(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_FMUL, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_FSUB(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_FSUB, ir, dst_reg, src_reg_a, src_reg_b)
-
-#define uop_FABS(ir, dst_reg, src_reg) uop_gen_reg_dst_src1(UOP_FABS, ir, dst_reg, src_reg)
-#define uop_FCHS(ir, dst_reg, src_reg) uop_gen_reg_dst_src1(UOP_FCHS, ir, dst_reg, src_reg)
-#define uop_FSQRT(ir, dst_reg, src_reg) uop_gen_reg_dst_src1(UOP_FSQRT, ir, dst_reg, src_reg)
-#define uop_FTST(ir, dst_reg, src_reg) uop_gen_reg_dst_src1(UOP_FTST, ir, dst_reg, src_reg)
-
-#define uop_FP_ENTER(ir) do { if (!codegen_fpu_entered) uop_gen_imm(UOP_FP_ENTER, ir, cpu_state.oldpc); codegen_fpu_entered = 1; codegen_mmx_entered = 0; } while (0)
-#define uop_MMX_ENTER(ir) do { if (!codegen_mmx_entered) uop_gen_imm(UOP_MMX_ENTER, ir, cpu_state.oldpc); codegen_mmx_entered = 1; codegen_fpu_entered = 0; } while (0)
-
-#define uop_JMP(ir, p) uop_gen_pointer(UOP_JMP, ir, p)
-#define uop_JMP_DEST(ir) uop_gen(UOP_JMP_DEST, ir)
-
-#define uop_LOAD_SEG(ir, p, src_reg) uop_gen_reg_src_pointer(UOP_LOAD_SEG, ir, src_reg, p)
-
-#define uop_MEM_LOAD_ABS(ir, dst_reg, seg_reg, imm) uop_gen_reg_dst_src_imm(UOP_MEM_LOAD_ABS, ir, dst_reg, seg_reg, imm)
-#define uop_MEM_LOAD_REG(ir, dst_reg, seg_reg, addr_reg) uop_gen_reg_dst_src2_imm(UOP_MEM_LOAD_REG, ir, dst_reg, seg_reg, addr_reg, 0)
-#define uop_MEM_LOAD_REG_OFFSET(ir, dst_reg, seg_reg, addr_reg, offset) uop_gen_reg_dst_src2_imm(UOP_MEM_LOAD_REG, ir, dst_reg, seg_reg, addr_reg, offset)
-#define uop_MEM_LOAD_SINGLE(ir, dst_reg, seg_reg, addr_reg) uop_gen_reg_dst_src2_imm(UOP_MEM_LOAD_SINGLE, ir, dst_reg, seg_reg, addr_reg, 0)
-#define uop_MEM_LOAD_DOUBLE(ir, dst_reg, seg_reg, addr_reg) uop_gen_reg_dst_src2_imm(UOP_MEM_LOAD_DOUBLE, ir, dst_reg, seg_reg, addr_reg, 0)
-#define uop_MEM_STORE_ABS(ir, seg_reg, imm, src_reg) uop_gen_reg_src2_imm(UOP_MEM_STORE_ABS, ir, seg_reg, src_reg, imm)
-#define uop_MEM_STORE_REG(ir, seg_reg, addr_reg, src_reg) uop_gen_reg_src3_imm(UOP_MEM_STORE_REG, ir, seg_reg, addr_reg, src_reg, 0)
-#define uop_MEM_STORE_REG_OFFSET(ir, seg_reg, addr_reg, offset, src_reg) uop_gen_reg_src3_imm(UOP_MEM_STORE_REG, ir, seg_reg, addr_reg, src_reg, offset)
-#define uop_MEM_STORE_IMM_8(ir, seg_reg, addr_reg, imm) uop_gen_reg_src2_imm(UOP_MEM_STORE_IMM_8, ir, seg_reg, addr_reg, imm)
-#define uop_MEM_STORE_IMM_16(ir, seg_reg, addr_reg, imm) uop_gen_reg_src2_imm(UOP_MEM_STORE_IMM_16, ir, seg_reg, addr_reg, imm)
-#define uop_MEM_STORE_IMM_32(ir, seg_reg, addr_reg, imm) uop_gen_reg_src2_imm(UOP_MEM_STORE_IMM_32, ir, seg_reg, addr_reg, imm)
-#define uop_MEM_STORE_SINGLE(ir, seg_reg, addr_reg, src_reg) uop_gen_reg_src3_imm(UOP_MEM_STORE_SINGLE, ir, seg_reg, addr_reg, src_reg, 0)
-#define uop_MEM_STORE_DOUBLE(ir, seg_reg, addr_reg, src_reg) uop_gen_reg_src3_imm(UOP_MEM_STORE_DOUBLE, ir, seg_reg, addr_reg, src_reg, 0)
-
-#define uop_MOV(ir, dst_reg, src_reg) uop_gen_reg_dst_src1(UOP_MOV, ir, dst_reg, src_reg)
-#define uop_MOV_IMM(ir, reg, imm) uop_gen_reg_dst_imm(UOP_MOV_IMM, ir, reg, imm)
-#define uop_MOV_PTR(ir, reg, p) uop_gen_reg_dst_pointer(UOP_MOV_PTR, ir, reg, p)
-#define uop_MOV_REG_PTR(ir, reg, p) uop_gen_reg_dst_pointer(UOP_MOV_REG_PTR, ir, reg, p)
-#define uop_MOVZX_REG_PTR_8(ir, reg, p) uop_gen_reg_dst_pointer(UOP_MOVZX_REG_PTR_8, ir, reg, p)
-#define uop_MOVZX_REG_PTR_16(ir, reg, p) uop_gen_reg_dst_pointer(UOP_MOVZX_REG_PTR_16, ir, reg, p)
-#define uop_MOVSX(ir, dst_reg, src_reg) uop_gen_reg_dst_src1(UOP_MOVSX, ir, dst_reg, src_reg)
-#define uop_MOVZX(ir, dst_reg, src_reg) uop_gen_reg_dst_src1(UOP_MOVZX, ir, dst_reg, src_reg)
-#define uop_MOV_DOUBLE_INT(ir, dst_reg, src_reg) uop_gen_reg_dst_src1(UOP_MOV_DOUBLE_INT, ir, dst_reg, src_reg)
-#define uop_MOV_INT_DOUBLE(ir, dst_reg, src_reg/*, nrc, orc*/) uop_gen_reg_dst_src1(UOP_MOV_INT_DOUBLE, ir, dst_reg, src_reg/*, nrc, orc*/)
-#define uop_MOV_INT_DOUBLE_64(ir, dst_reg, src_reg_d, src_reg_q, tag) uop_gen_reg_dst_src3(UOP_MOV_INT_DOUBLE_64, ir, dst_reg, src_reg_d, src_reg_q, tag)
-
-#define uop_NOP_BARRIER(ir) uop_gen(UOP_NOP_BARRIER, ir)
-
-#define uop_PACKSSWB(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PACKSSWB, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PACKSSDW(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PACKSSDW, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PACKUSWB(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PACKUSWB, ir, dst_reg, src_reg_a, src_reg_b)
-
-#define uop_PADDB(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PADDB, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PADDW(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PADDW, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PADDD(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PADDD, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PADDSB(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PADDSB, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PADDSW(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PADDSW, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PADDUSB(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PADDUSB, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PADDUSW(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PADDUSW, ir, dst_reg, src_reg_a, src_reg_b)
-
-#define uop_PCMPEQB(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PCMPEQB, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PCMPEQW(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PCMPEQW, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PCMPEQD(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PCMPEQD, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PCMPGTB(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PCMPGTB, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PCMPGTW(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PCMPGTW, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PCMPGTD(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PCMPGTD, ir, dst_reg, src_reg_a, src_reg_b)
-
-#define uop_PF2ID(ir, dst_reg, src_reg) uop_gen_reg_dst_src1(UOP_PF2ID, ir, dst_reg, src_reg)
-#define uop_PFADD(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PFADD, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PFCMPEQ(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PFCMPEQ, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PFCMPGE(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PFCMPGE, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PFCMPGT(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PFCMPGT, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PFMAX(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PFMAX, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PFMIN(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PFMIN, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PFMUL(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PFMUL, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PFRCP(ir, dst_reg, src_reg) uop_gen_reg_dst_src1(UOP_PFRCP, ir, dst_reg, src_reg)
-#define uop_PFRSQRT(ir, dst_reg, src_reg) uop_gen_reg_dst_src1(UOP_PFRSQRT, ir, dst_reg, src_reg)
-#define uop_PFSUB(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PFSUB, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PI2FD(ir, dst_reg, src_reg) uop_gen_reg_dst_src1(UOP_PI2FD, ir, dst_reg, src_reg)
-
-#define uop_PMADDWD(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PMADDWD, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PMULHW(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PMULHW, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PMULLW(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PMULLW, ir, dst_reg, src_reg_a, src_reg_b)
-
-#define uop_PSLLW_IMM(ir, dst_reg, src_reg, imm) uop_gen_reg_dst_src_imm(UOP_PSLLW_IMM, ir, dst_reg, src_reg, imm)
-#define uop_PSLLD_IMM(ir, dst_reg, src_reg, imm) uop_gen_reg_dst_src_imm(UOP_PSLLD_IMM, ir, dst_reg, src_reg, imm)
-#define uop_PSLLQ_IMM(ir, dst_reg, src_reg, imm) uop_gen_reg_dst_src_imm(UOP_PSLLQ_IMM, ir, dst_reg, src_reg, imm)
-#define uop_PSRAW_IMM(ir, dst_reg, src_reg, imm) uop_gen_reg_dst_src_imm(UOP_PSRAW_IMM, ir, dst_reg, src_reg, imm)
-#define uop_PSRAD_IMM(ir, dst_reg, src_reg, imm) uop_gen_reg_dst_src_imm(UOP_PSRAD_IMM, ir, dst_reg, src_reg, imm)
-#define uop_PSRAQ_IMM(ir, dst_reg, src_reg, imm) uop_gen_reg_dst_src_imm(UOP_PSRAQ_IMM, ir, dst_reg, src_reg, imm)
-#define uop_PSRLW_IMM(ir, dst_reg, src_reg, imm) uop_gen_reg_dst_src_imm(UOP_PSRLW_IMM, ir, dst_reg, src_reg, imm)
-#define uop_PSRLD_IMM(ir, dst_reg, src_reg, imm) uop_gen_reg_dst_src_imm(UOP_PSRLD_IMM, ir, dst_reg, src_reg, imm)
-#define uop_PSRLQ_IMM(ir, dst_reg, src_reg, imm) uop_gen_reg_dst_src_imm(UOP_PSRLQ_IMM, ir, dst_reg, src_reg, imm)
-
-#define uop_PSUBB(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PSUBB, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PSUBW(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PSUBW, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PSUBD(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PSUBD, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PSUBSB(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PSUBSB, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PSUBSW(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PSUBSW, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PSUBUSB(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PSUBUSB, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PSUBUSW(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PSUBUSW, ir, dst_reg, src_reg_a, src_reg_b)
-
-#define uop_PUNPCKHBW(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PUNPCKHBW, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PUNPCKHWD(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PUNPCKHWD, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PUNPCKHDQ(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PUNPCKHDQ, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PUNPCKLBW(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PUNPCKLBW, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PUNPCKLWD(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PUNPCKLWD, ir, dst_reg, src_reg_a, src_reg_b)
-#define uop_PUNPCKLDQ(ir, dst_reg, src_reg_a, src_reg_b) uop_gen_reg_dst_src2(UOP_PUNPCKLDQ, ir, dst_reg, src_reg_a, src_reg_b)
-
-#define uop_STORE_PTR_IMM(ir, p, imm) uop_gen_pointer_imm(UOP_STORE_P_IMM, ir, p, imm)
-#define uop_STORE_PTR_IMM_8(ir, p, imm) uop_gen_pointer_imm(UOP_STORE_P_IMM_8, ir, p, imm)
-#define uop_STORE_PTR_IMM_16(ir, p, imm) uop_gen_pointer_imm(UOP_STORE_P_IMM_16, ir, p, imm)
-
-#define uop_TEST_JNS_DEST(ir, src_reg) uop_gen_reg_src1(UOP_TEST_JNS_DEST, ir, src_reg)
-#define uop_TEST_JS_DEST(ir, src_reg) uop_gen_reg_src1(UOP_TEST_JS_DEST, ir, src_reg)
-
-#ifdef DEBUG_EXTRA
-#define uop_LOG_INSTR(ir, imm) uop_gen_imm(UOP_LOG_INSTR, ir, imm)
-#endif
-
-void codegen_direct_read_8(codeblock_t *block, int host_reg, void *p);
-void codegen_direct_read_16(codeblock_t *block, int host_reg, void *p);
-void codegen_direct_read_32(codeblock_t *block, int host_reg, void *p);
-void codegen_direct_read_64(codeblock_t *block, int host_reg, void *p);
-void codegen_direct_read_pointer(codeblock_t *block, int host_reg, void *p);
-void codegen_direct_read_double(codeblock_t *block, int host_reg, void *p);
-void codegen_direct_read_st_8(codeblock_t *block, int host_reg, void *base, int reg_idx);
-void codegen_direct_read_st_64(codeblock_t *block, int host_reg, void *base, int reg_idx);
-void codegen_direct_read_st_double(codeblock_t *block, int host_reg, void *base, int reg_idx);
-
-void codegen_direct_write_8(codeblock_t *block, void *p, int host_reg);
-void codegen_direct_write_16(codeblock_t *block, void *p, int host_reg);
-void codegen_direct_write_32(codeblock_t *block, void *p, int host_reg);
-void codegen_direct_write_64(codeblock_t *block, void *p, int host_reg);
-void codegen_direct_write_pointer(codeblock_t *block, void *p, int host_reg);
-void codegen_direct_write_ptr(codeblock_t *block, void *p, int host_reg);
-void codegen_direct_write_double(codeblock_t *block, void *p, int host_reg);
-void codegen_direct_write_st_8(codeblock_t *block, void *base, int reg_idx, int host_reg);
-void codegen_direct_write_st_64(codeblock_t *block, void *base, int reg_idx, int host_reg);
-void codegen_direct_write_st_double(codeblock_t *block, void *base, int reg_idx, int host_reg);
-
-void codegen_direct_read_16_stack(codeblock_t *block, int host_reg, int stack_offset);
-void codegen_direct_read_32_stack(codeblock_t *block, int host_reg, int stack_offset);
-void codegen_direct_read_64_stack(codeblock_t *block, int host_reg, int stack_offset);
-void codegen_direct_read_pointer_stack(codeblock_t *block, int host_reg, int stack_offset);
-void codegen_direct_read_double_stack(codeblock_t *block, int host_reg, int stack_offset);
-
-void codegen_direct_write_32_stack(codeblock_t *block, int stack_offset, int host_reg);
-void codegen_direct_write_64_stack(codeblock_t *block, int stack_offset, int host_reg);
-void codegen_direct_write_pointer_stack(codeblock_t *block, int stack_offset, int host_reg);
-void codegen_direct_write_double_stack(codeblock_t *block, int stack_offset, int host_reg);
-
-void codegen_set_jump_dest(codeblock_t *block, void *p);
-
-void codegen_direct_write_8_imm(codeblock_t *block, void *p, uint8_t imm_data);
-void codegen_direct_write_16_imm(codeblock_t *block, void *p, uint16_t imm_data);
-void codegen_direct_write_32_imm(codeblock_t *block, void *p, uint32_t imm_data);
-void codegen_direct_write_32_imm_stack(codeblock_t *block, int stack_offset, uint32_t imm_data);
-
-#endif
diff --git a/src/codegen_ops.c b/src/codegen_ops.c
index 5c63795..e4fb0c4 100644
--- a/src/codegen_ops.c
+++ b/src/codegen_ops.c
@@ -1,150 +1,129 @@
#include "ibm.h"
+#include "x86.h"
+#include "x86_ops.h"
+#include "x86_flags.h"
+#include "x87.h"
+#include "386_common.h"
+#include "cpu.h"
#include "codegen.h"
-#include "codegen_ir.h"
#include "codegen_ops.h"
-#include "codegen_ops_3dnow.h"
+
+#ifdef __amd64__
+#include "codegen_ops_x86-64.h"
+#elif defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined WIN32 || defined _WIN32 || defined _WIN32
+#include "codegen_ops_x86.h"
+#endif
+
#include "codegen_ops_arith.h"
-#include "codegen_ops_branch.h"
-#include "codegen_ops_fpu_arith.h"
-#include "codegen_ops_fpu_constant.h"
-#include "codegen_ops_fpu_loadstore.h"
-#include "codegen_ops_fpu_misc.h"
+#include "codegen_ops_fpu.h"
#include "codegen_ops_jump.h"
#include "codegen_ops_logic.h"
#include "codegen_ops_misc.h"
-#include "codegen_ops_mmx_arith.h"
-#include "codegen_ops_mmx_cmp.h"
-#include "codegen_ops_mmx_loadstore.h"
-#include "codegen_ops_mmx_logic.h"
-#include "codegen_ops_mmx_pack.h"
-#include "codegen_ops_mmx_shift.h"
+#include "codegen_ops_mmx.h"
#include "codegen_ops_mov.h"
#include "codegen_ops_shift.h"
#include "codegen_ops_stack.h"
+#include "codegen_ops_xchg.h"
RecompOpFn recomp_opcodes[512] =
{
/*16-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ ropADD_b_rmw, ropADD_w_rmw, ropADD_b_rm, ropADD_w_rm, ropADD_AL_imm, ropADD_AX_imm, ropPUSH_ES_16, ropPOP_ES_16, ropOR_b_rmw, ropOR_w_rmw, ropOR_b_rm, ropOR_w_rm, ropOR_AL_imm, ropOR_AX_imm, ropPUSH_CS_16, NULL,
-/*10*/ ropADC_b_rmw, ropADC_w_rmw, ropADC_b_rm, ropADC_w_rm, ropADC_AL_imm, ropADC_AX_imm, ropPUSH_SS_16, NULL, ropSBB_b_rmw, ropSBB_w_rmw, ropSBB_b_rm, ropSBB_w_rm, ropSBB_AL_imm, ropSBB_AX_imm, ropPUSH_DS_16, ropPOP_DS_16,
+/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, ropPUSH_SS_16, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropPUSH_DS_16, ropPOP_DS_16,
/*20*/ ropAND_b_rmw, ropAND_w_rmw, ropAND_b_rm, ropAND_w_rm, ropAND_AL_imm, ropAND_AX_imm, NULL, NULL, ropSUB_b_rmw, ropSUB_w_rmw, ropSUB_b_rm, ropSUB_w_rm, ropSUB_AL_imm, ropSUB_AX_imm, NULL, NULL,
/*30*/ ropXOR_b_rmw, ropXOR_w_rmw, ropXOR_b_rm, ropXOR_w_rm, ropXOR_AL_imm, ropXOR_AX_imm, NULL, NULL, ropCMP_b_rmw, ropCMP_w_rmw, ropCMP_b_rm, ropCMP_w_rm, ropCMP_AL_imm, ropCMP_AX_imm, NULL, NULL,
-/*40*/ ropINC_r16, ropINC_r16, ropINC_r16, ropINC_r16, ropINC_r16, ropINC_r16, ropINC_r16, ropINC_r16, ropDEC_r16, ropDEC_r16, ropDEC_r16, ropDEC_r16, ropDEC_r16, ropDEC_r16, ropDEC_r16, ropDEC_r16,
-/*50*/ ropPUSH_r16, ropPUSH_r16, ropPUSH_r16, ropPUSH_r16, ropPUSH_r16, ropPUSH_r16, ropPUSH_r16, ropPUSH_r16, ropPOP_r16, ropPOP_r16, ropPOP_r16, ropPOP_r16, ropPOP_r16, ropPOP_r16, ropPOP_r16, ropPOP_r16,
-/*60*/ ropPUSHA_16, ropPOPA_16, NULL, NULL, NULL, NULL, NULL, NULL, ropPUSH_imm_16, NULL, ropPUSH_imm_16_8,NULL, NULL, NULL, NULL, NULL,
-/*70*/ ropJO_8, ropJNO_8, ropJB_8, ropJNB_8, ropJE_8, ropJNE_8, ropJBE_8, ropJNBE_8, ropJS_8, ropJNS_8, ropJP_8, ropJNP_8, ropJL_8, ropJNL_8, ropJLE_8, ropJNLE_8,
+/*40*/ ropINC_rw, ropINC_rw, ropINC_rw, ropINC_rw, ropINC_rw, ropINC_rw, ropINC_rw, ropINC_rw, ropDEC_rw, ropDEC_rw, ropDEC_rw, ropDEC_rw, ropDEC_rw, ropDEC_rw, ropDEC_rw, ropDEC_rw,
+/*50*/ ropPUSH_16, ropPUSH_16, ropPUSH_16, ropPUSH_16, ropPUSH_16, ropPUSH_16, ropPUSH_16, ropPUSH_16, ropPOP_16, ropPOP_16, ropPOP_16, ropPOP_16, ropPOP_16, ropPOP_16, ropPOP_16, ropPOP_16,
+/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropPUSH_imm_16, NULL, ropPUSH_imm_b16,NULL, NULL, NULL, NULL, NULL,
+/*70*/ ropJO, ropJNO, ropJB, ropJNB, ropJE, ropJNE, ropJBE, ropJNBE, ropJS, ropJNS, ropJP, ropJNP, ropJL, ropJNL, ropJLE, ropJNLE,
-/*80*/ rop80, rop81_w, rop80, rop83_w, ropTEST_b_rm, ropTEST_w_rm, ropXCHG_8, ropXCHG_16, ropMOV_b_r, ropMOV_w_r, ropMOV_r_b, ropMOV_r_w, ropMOV_w_seg, ropLEA_16, ropMOV_seg_w, ropPOP_W,
-/*90*/ ropNOP, ropXCHG_AX, ropXCHG_AX, ropXCHG_AX, ropXCHG_AX, ropXCHG_AX, ropXCHG_AX, ropXCHG_AX, ropCBW, ropCWD, NULL, NULL, ropPUSHF, NULL, NULL, NULL,
-/*a0*/ ropMOV_AL_abs, ropMOV_AX_abs, ropMOV_abs_AL, ropMOV_abs_AX, NULL, NULL, NULL, NULL, ropTEST_AL_imm, ropTEST_AX_imm, NULL, NULL, NULL, NULL, NULL, NULL,
+/*80*/ rop80, rop81_w, rop80, rop83_w, ropTEST_b_rm, ropTEST_w_rm, ropXCHG_b, ropXCHG_w, ropMOV_b_r, ropMOV_w_r, ropMOV_r_b, ropMOV_r_w, ropMOV_w_seg, ropLEA_w, ropMOV_seg_w, NULL,
+/*90*/ ropNOP, ropXCHG_AX_CX, ropXCHG_AX_DX, ropXCHG_AX_BX, ropXCHG_AX_SP, ropXCHG_AX_BP, ropXCHG_AX_SI, ropXCHG_AX_DI, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*a0*/ ropMOV_AL_a, ropMOV_AX_a, ropMOV_a_AL, ropMOV_a_AX, NULL, NULL, NULL, NULL, ropTEST_AL_imm, ropTEST_AX_imm, NULL, NULL, NULL, NULL, NULL, NULL,
/*b0*/ ropMOV_rb_imm, ropMOV_rb_imm, ropMOV_rb_imm, ropMOV_rb_imm, ropMOV_rb_imm, ropMOV_rb_imm, ropMOV_rb_imm, ropMOV_rb_imm, ropMOV_rw_imm, ropMOV_rw_imm, ropMOV_rw_imm, ropMOV_rw_imm, ropMOV_rw_imm, ropMOV_rw_imm, ropMOV_rw_imm, ropMOV_rw_imm,
-/*c0*/ ropC0, ropC1_w, ropRET_imm_16, ropRET_16, ropLES_16, ropLDS_16, ropMOV_b_imm, ropMOV_w_imm, NULL, ropLEAVE_16, ropRETF_imm_16, ropRETF_16, NULL, NULL, NULL, NULL,
-/*d0*/ ropD0, ropD1_w, ropD2, ropD3_w, NULL, NULL, NULL, ropXLAT, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*e0*/ ropLOOPNE, ropLOOPE, ropLOOP, ropJCXZ, NULL, NULL, NULL, NULL, ropCALL_r16, ropJMP_r16, ropJMP_far_16, ropJMP_r8, NULL, NULL, NULL, NULL,
-/*f0*/ NULL, NULL, NULL, NULL, NULL, ropCMC, ropF6, ropF7_16, ropCLC, ropSTC, ropCLI, ropSTI, ropCLD, ropSTD, ropINCDEC, ropFF_16,
+/*c0*/ ropC0, ropC1_w, ropRET_imm_16, ropRET_16, ropLES, ropLDS, ropMOV_b_imm, ropMOV_w_imm, NULL, ropLEAVE_16, NULL, NULL, NULL, NULL, NULL, NULL,
+/*d0*/ ropD0, ropD1_w, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*e0*/ NULL, NULL, ropLOOP, ropJCXZ, NULL, NULL, NULL, NULL, ropCALL_r16, ropJMP_r16, NULL, ropJMP_r8, NULL, NULL, NULL, NULL,
+/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, ropF6, ropF7_w, NULL, NULL, ropCLI, ropSTI, ropCLD, ropSTD, ropFE, ropFF_16,
/*32-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ ropADD_b_rmw, ropADD_l_rmw, ropADD_b_rm, ropADD_l_rm, ropADD_AL_imm, ropADD_EAX_imm, ropPUSH_ES_32, ropPOP_ES_32, ropOR_b_rmw, ropOR_l_rmw, ropOR_b_rm, ropOR_l_rm, ropOR_AL_imm, ropOR_EAX_imm, ropPUSH_CS_32, NULL,
-/*10*/ ropADC_b_rmw, ropADC_l_rmw, ropADC_b_rm, ropADC_l_rm, ropADC_AL_imm, ropADC_EAX_imm, ropPUSH_SS_32, NULL, ropSBB_b_rmw, ropSBB_l_rmw, ropSBB_b_rm, ropSBB_l_rm, ropSBB_AL_imm, ropSBB_EAX_imm, ropPUSH_DS_32, ropPOP_DS_32,
+/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, ropPUSH_SS_32, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropPUSH_DS_32, ropPOP_DS_32,
/*20*/ ropAND_b_rmw, ropAND_l_rmw, ropAND_b_rm, ropAND_l_rm, ropAND_AL_imm, ropAND_EAX_imm, NULL, NULL, ropSUB_b_rmw, ropSUB_l_rmw, ropSUB_b_rm, ropSUB_l_rm, ropSUB_AL_imm, ropSUB_EAX_imm, NULL, NULL,
/*30*/ ropXOR_b_rmw, ropXOR_l_rmw, ropXOR_b_rm, ropXOR_l_rm, ropXOR_AL_imm, ropXOR_EAX_imm, NULL, NULL, ropCMP_b_rmw, ropCMP_l_rmw, ropCMP_b_rm, ropCMP_l_rm, ropCMP_AL_imm, ropCMP_EAX_imm, NULL, NULL,
-/*40*/ ropINC_r32, ropINC_r32, ropINC_r32, ropINC_r32, ropINC_r32, ropINC_r32, ropINC_r32, ropINC_r32, ropDEC_r32, ropDEC_r32, ropDEC_r32, ropDEC_r32, ropDEC_r32, ropDEC_r32, ropDEC_r32, ropDEC_r32,
-/*50*/ ropPUSH_r32, ropPUSH_r32, ropPUSH_r32, ropPUSH_r32, ropPUSH_r32, ropPUSH_r32, ropPUSH_r32, ropPUSH_r32, ropPOP_r32, ropPOP_r32, ropPOP_r32, ropPOP_r32, ropPOP_r32, ropPOP_r32, ropPOP_r32, ropPOP_r32,
-/*60*/ ropPUSHA_32, ropPOPA_32, NULL, NULL, NULL, NULL, NULL, NULL, ropPUSH_imm_32, NULL, ropPUSH_imm_32_8,NULL, NULL, NULL, NULL, NULL,
-/*70*/ ropJO_8, ropJNO_8, ropJB_8, ropJNB_8, ropJE_8, ropJNE_8, ropJBE_8, ropJNBE_8, ropJS_8, ropJNS_8, ropJP_8, ropJNP_8, ropJL_8, ropJNL_8, ropJLE_8, ropJNLE_8,
+/*40*/ ropINC_rl, ropINC_rl, ropINC_rl, ropINC_rl, ropINC_rl, ropINC_rl, ropINC_rl, ropINC_rl, ropDEC_rl, ropDEC_rl, ropDEC_rl, ropDEC_rl, ropDEC_rl, ropDEC_rl, ropDEC_rl, ropDEC_rl,
+/*50*/ ropPUSH_32, ropPUSH_32, ropPUSH_32, ropPUSH_32, ropPUSH_32, ropPUSH_32, ropPUSH_32, ropPUSH_32, ropPOP_32, ropPOP_32, ropPOP_32, ropPOP_32, ropPOP_32, ropPOP_32, ropPOP_32, ropPOP_32,
+/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropPUSH_imm_32, NULL, ropPUSH_imm_b32,NULL, NULL, NULL, NULL, NULL,
+/*70*/ ropJO, ropJNO, ropJB, ropJNB, ropJE, ropJNE, ropJBE, ropJNBE, ropJS, ropJNS, ropJP, ropJNP, ropJL, ropJNL, ropJLE, ropJNLE,
-/*80*/ rop80, rop81_l, rop80, rop83_l, ropTEST_b_rm, ropTEST_l_rm, ropXCHG_8, ropXCHG_32, ropMOV_b_r, ropMOV_l_r, ropMOV_r_b, ropMOV_r_l, ropMOV_l_seg, ropLEA_32, ropMOV_seg_w, ropPOP_L,
-/*90*/ ropNOP, ropXCHG_EAX, ropXCHG_EAX, ropXCHG_EAX, ropXCHG_EAX, ropXCHG_EAX, ropXCHG_EAX, ropXCHG_EAX, ropCWDE, ropCDQ, NULL, NULL, ropPUSHFD, NULL, NULL, NULL,
-/*a0*/ ropMOV_AL_abs, ropMOV_EAX_abs, ropMOV_abs_AL, ropMOV_abs_EAX, NULL, NULL, NULL, NULL, ropTEST_AL_imm, ropTEST_EAX_imm,NULL, NULL, NULL, NULL, NULL, NULL,
+/*80*/ rop80, rop81_l, rop80, rop83_l, ropTEST_b_rm, ropTEST_l_rm, ropXCHG_b, ropXCHG_l, ropMOV_b_r, ropMOV_l_r, ropMOV_r_b, ropMOV_r_l, ropMOV_w_seg, ropLEA_l, ropMOV_seg_w, NULL,
+/*90*/ ropNOP, ropXCHG_EAX_ECX,ropXCHG_EAX_EDX,ropXCHG_EAX_EBX,ropXCHG_EAX_ESP,ropXCHG_EAX_EBP,ropXCHG_EAX_ESI,ropXCHG_EAX_EDI,NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*a0*/ ropMOV_AL_a, ropMOV_EAX_a, ropMOV_a_AL, ropMOV_a_EAX, NULL, NULL, NULL, NULL, ropTEST_AL_imm, ropTEST_EAX_imm,NULL, NULL, NULL, NULL, NULL, NULL,
/*b0*/ ropMOV_rb_imm, ropMOV_rb_imm, ropMOV_rb_imm, ropMOV_rb_imm, ropMOV_rb_imm, ropMOV_rb_imm, ropMOV_rb_imm, ropMOV_rb_imm, ropMOV_rl_imm, ropMOV_rl_imm, ropMOV_rl_imm, ropMOV_rl_imm, ropMOV_rl_imm, ropMOV_rl_imm, ropMOV_rl_imm, ropMOV_rl_imm,
-/*c0*/ ropC0, ropC1_l, ropRET_imm_32, ropRET_32, ropLES_32, ropLDS_32, ropMOV_b_imm, ropMOV_l_imm, NULL, ropLEAVE_32, ropRETF_imm_32, ropRETF_32, NULL, NULL, NULL, NULL,
-/*d0*/ ropD0, ropD1_l, ropD2, ropD3_l, NULL, NULL, NULL, ropXLAT, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*e0*/ ropLOOPNE, ropLOOPE, ropLOOP, ropJCXZ, NULL, NULL, NULL, NULL, ropCALL_r32, ropJMP_r32, ropJMP_far_32, ropJMP_r8, NULL, NULL, NULL, NULL,
-/*f0*/ NULL, NULL, NULL, NULL, NULL, ropCMC, ropF6, ropF7_32, ropCLC, ropSTC, ropCLI, ropSTI, ropCLD, ropSTD, ropINCDEC, ropFF_32
+/*c0*/ ropC0, ropC1_l, ropRET_imm_32, ropRET_32, ropLES, ropLDS, ropMOV_b_imm, ropMOV_l_imm, NULL, ropLEAVE_32, NULL, NULL, NULL, NULL, NULL, NULL,
+/*d0*/ ropD0, ropD1_l, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*e0*/ NULL, NULL, ropLOOP, ropJCXZ, NULL, NULL, NULL, NULL, ropCALL_r32, ropJMP_r32, NULL, ropJMP_r8, NULL, NULL, NULL, NULL,
+/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, ropF6, ropF7_l, NULL, NULL, ropCLI, ropSTI, ropCLD, ropSTD, ropFE, ropFF_32
};
-
RecompOpFn recomp_opcodes_0f[512] =
{
/*16-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*60*/ ropPUNPCKLBW, ropPUNPCKLWD, ropPUNPCKLDQ, ropPACKSSWB, ropPCMPGTB, ropPCMPGTW, ropPCMPGTD, ropPACKUSWB, ropPUNPCKHBW, ropPUNPCKHWD, ropPUNPCKHDQ, ropPACKSSDW, NULL, NULL, ropMOVD_r_d, ropMOVQ_r_q,
-/*70*/ NULL, ropPSxxW_imm, ropPSxxD_imm, ropPSxxQ_imm, ropPCMPEQB, ropPCMPEQW, ropPCMPEQD, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropMOVD_d_r, ropMOVQ_q_r,
-
-/*80*/ ropJO_16, ropJNO_16, ropJB_16, ropJNB_16, ropJE_16, ropJNE_16, ropJBE_16, ropJNBE_16, ropJS_16, ropJNS_16, ropJP_16, ropJNP_16, ropJL_16, ropJNL_16, ropJLE_16, ropJNLE_16,
-/*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*a0*/ ropPUSH_FS_16, ropPOP_FS_16, NULL, NULL, ropSHLD_16_imm, NULL, NULL, NULL, ropPUSH_GS_16, ropPOP_GS_16, NULL, NULL, ropSHRD_16_imm, NULL, NULL, NULL,
-/*b0*/ NULL, NULL, ropLSS_16, NULL, ropLFS_16, ropLGS_16, ropMOVZX_16_8, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropMOVSX_16_8, NULL,
-
-/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*d0*/ NULL, NULL, NULL, NULL, NULL, ropPMULLW, NULL, NULL, ropPSUBUSB, ropPSUBUSW, NULL, ropPAND, ropPADDUSB, ropPADDUSW, NULL, ropPANDN,
-/*e0*/ NULL, NULL, NULL, NULL, NULL, ropPMULHW, NULL, NULL, ropPSUBSB, ropPSUBSW, NULL, ropPOR, ropPADDSB, ropPADDSW, NULL, ropPXOR,
-/*f0*/ NULL, NULL, NULL, NULL, NULL, ropPMADDWD, NULL, NULL, ropPSUBB, ropPSUBW, ropPSUBD, NULL, ropPADDB, ropPADDW, ropPADDD, NULL,
-
- /*32-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-
-/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*60*/ ropPUNPCKLBW, ropPUNPCKLWD, ropPUNPCKLDQ, ropPACKSSWB, ropPCMPGTB, ropPCMPGTW, ropPCMPGTD, ropPACKUSWB, ropPUNPCKHBW, ropPUNPCKHWD, ropPUNPCKHDQ, ropPACKSSDW, NULL, NULL, ropMOVD_r_d, ropMOVQ_r_q,
-/*70*/ NULL, ropPSxxW_imm, ropPSxxD_imm, ropPSxxQ_imm, ropPCMPEQB, ropPCMPEQW, ropPCMPEQD, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropMOVD_d_r, ropMOVQ_q_r,
-
-/*80*/ ropJO_32, ropJNO_32, ropJB_32, ropJNB_32, ropJE_32, ropJNE_32, ropJBE_32, ropJNBE_32, ropJS_32, ropJNS_32, ropJP_32, ropJNP_32, ropJL_32, ropJNL_32, ropJLE_32, ropJNLE_32,
-/*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*a0*/ ropPUSH_FS_32, ropPOP_FS_32, NULL, NULL, ropSHLD_32_imm, NULL, NULL, NULL, ropPUSH_GS_32, ropPOP_GS_32, NULL, NULL, ropSHRD_32_imm, NULL, NULL, NULL,
-/*b0*/ NULL, NULL, ropLSS_32, NULL, ropLFS_32, ropLGS_32, ropMOVZX_32_8, ropMOVZX_32_16, NULL, NULL, NULL, NULL, NULL, NULL, ropMOVSX_32_8, ropMOVSX_32_16,
-
-/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*d0*/ NULL, NULL, NULL, NULL, NULL, ropPMULLW, NULL, NULL, ropPSUBUSB, ropPSUBUSW, NULL, ropPAND, ropPADDUSB, ropPADDUSW, NULL, ropPANDN,
-/*e0*/ NULL, NULL, NULL, NULL, NULL, ropPMULHW, NULL, NULL, ropPSUBSB, ropPSUBSW, NULL, ropPOR, ropPADDSB, ropPADDSW, NULL, ropPXOR,
-/*f0*/ NULL, NULL, NULL, NULL, NULL, ropPMADDWD, NULL, NULL, ropPSUBB, ropPSUBW, ropPSUBD, NULL, ropPADDB, ropPADDW, ropPADDD, NULL,
-};
-
-RecompOpFn recomp_opcodes_3DNOW[256] =
-{
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropPI2FD, NULL, NULL,
-/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropPF2ID, NULL, NULL,
-/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-
/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropEMMS, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*80*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*90*/ ropPFCMPGE, NULL, NULL, NULL, ropPFMIN, NULL, ropPFRCP, ropPFRSQRT, NULL, NULL, ropPFSUB, NULL, NULL, NULL, ropPFADD, NULL,
-/*a0*/ ropPFCMPGT, NULL, NULL, NULL, ropPFMAX, NULL, ropPFRCPIT, ropPFRSQIT1, NULL, NULL, ropPFSUBR, NULL, NULL, NULL, NULL, NULL,
-/*b0*/ ropPFCMPEQ, NULL, NULL, NULL, ropPFMUL, NULL, ropPFRCPIT, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*80*/ ropJO_w, ropJNO_w, ropJB_w, ropJNB_w, ropJE_w, ropJNE_w, ropJBE_w, ropJNBE_w, ropJS_w, ropJNS_w, ropJP_w, ropJNP_w, ropJL_w, ropJNL_w, ropJLE_w, ropJNLE_w,
+/*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*a0*/ ropPUSH_FS_16, ropPOP_FS_16, NULL, NULL, NULL, NULL, NULL, NULL, ropPUSH_GS_16, ropPOP_GS_16, NULL, NULL, NULL, NULL, NULL, NULL,
+/*b0*/ NULL, NULL, ropLSS, NULL, ropLFS, ropLGS, ropMOVZX_w_b, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropMOVSX_w_b, NULL,
/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*e0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+
+ /*32-bit data*/
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/*00*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+
+/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*60*/ ropPUNPCKLBW, ropPUNPCKLWD, ropPUNPCKLDQ, ropPACKSSWB, ropPCMPGTB, ropPCMPGTW, ropPCMPGTD, ropPACKUSWB, ropPUNPCKHBW, ropPUNPCKHWD, ropPUNPCKHDQ, ropPACKSSDW, NULL, NULL, ropMOVD_mm_l, ropMOVQ_mm_q,
+/*70*/ NULL, ropPSxxW_imm, ropPSxxD_imm, ropPSxxQ_imm, ropPCMPEQB, ropPCMPEQW, ropPCMPEQD, ropEMMS, NULL, NULL, NULL, NULL, NULL, NULL, ropMOVD_l_mm, ropMOVQ_q_mm,
+
+/*80*/ ropJO_l, ropJNO_l, ropJB_l, ropJNB_l, ropJE_l, ropJNE_l, ropJBE_l, ropJNBE_l, ropJS_l, ropJNS_l, ropJP_l, ropJNP_l, ropJL_l, ropJNL_l, ropJLE_l, ropJNLE_l,
+/*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*a0*/ ropPUSH_FS_32, ropPOP_FS_32, NULL, NULL, NULL, NULL, NULL, NULL, ropPUSH_GS_32, ropPOP_GS_32, NULL, NULL, NULL, NULL, NULL, NULL,
+/*b0*/ NULL, NULL, ropLSS, NULL, ropLFS, ropLGS, ropMOVZX_l_b, ropMOVZX_l_w, NULL, NULL, NULL, NULL, NULL, NULL, ropMOVSX_l_b, ropMOVSX_l_w,
+
+/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*d0*/ NULL, ropPSRLW, ropPSRLD, ropPSRLQ, NULL, ropPMULLW, NULL, NULL, ropPSUBUSB, ropPSUBUSW, NULL, ropPAND, ropPADDUSB, ropPADDUSW, NULL, ropPANDN,
+/*e0*/ NULL, ropPSRAW, ropPSRAD, NULL, NULL, ropPMULHW, NULL, NULL, ropPSUBSB, ropPSUBSW, NULL, ropPOR, ropPADDSB, ropPADDSW, NULL, ropPXOR,
+/*f0*/ NULL, ropPSLLW, ropPSLLD, ropPSLLQ, NULL, ropPMADDWD, NULL, NULL, ropPSUBB, ropPSUBW, ropPSUBD, NULL, ropPADDB, ropPADDW, ropPADDD, NULL,
};
+
RecompOpFn recomp_opcodes_d8[512] =
{
/*16-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ ropFADDs, ropFADDs, ropFADDs, ropFADDs, ropFADDs, ropFADDs, ropFADDs, ropFADDs, ropFMULs, ropFMULs, ropFMULs, ropFMULs, ropFMULs, ropFMULs, ropFMULs, ropFMULs,
/*10*/ ropFCOMs, ropFCOMs, ropFCOMs, ropFCOMs, ropFCOMs, ropFCOMs, ropFCOMs, ropFCOMs, ropFCOMPs, ropFCOMPs, ropFCOMPs, ropFCOMPs, ropFCOMPs, ropFCOMPs, ropFCOMPs, ropFCOMPs,
/*20*/ ropFSUBs, ropFSUBs, ropFSUBs, ropFSUBs, ropFSUBs, ropFSUBs, ropFSUBs, ropFSUBs, ropFSUBRs, ropFSUBRs, ropFSUBRs, ropFSUBRs, ropFSUBRs, ropFSUBRs, ropFSUBRs, ropFSUBRs,
@@ -166,7 +145,7 @@ RecompOpFn recomp_opcodes_d8[512] =
/*f0*/ ropFDIV, ropFDIV, ropFDIV, ropFDIV, ropFDIV, ropFDIV, ropFDIV, ropFDIV, ropFDIVR, ropFDIVR, ropFDIVR, ropFDIVR, ropFDIVR, ropFDIVR, ropFDIVR, ropFDIVR,
/*32-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ ropFADDs, ropFADDs, ropFADDs, ropFADDs, ropFADDs, ropFADDs, ropFADDs, ropFADDs, ropFMULs, ropFMULs, ropFMULs, ropFMULs, ropFMULs, ropFMULs, ropFMULs, ropFMULs,
/*10*/ ropFCOMs, ropFCOMs, ropFCOMs, ropFCOMs, ropFCOMs, ropFCOMs, ropFCOMs, ropFCOMs, ropFCOMPs, ropFCOMPs, ropFCOMPs, ropFCOMPs, ropFCOMPs, ropFCOMPs, ropFCOMPs, ropFCOMPs,
/*20*/ ropFSUBs, ropFSUBs, ropFSUBs, ropFSUBs, ropFSUBs, ropFSUBs, ropFSUBs, ropFSUBs, ropFSUBRs, ropFSUBRs, ropFSUBRs, ropFSUBRs, ropFSUBRs, ropFSUBRs, ropFSUBRs, ropFSUBRs,
@@ -191,93 +170,93 @@ RecompOpFn recomp_opcodes_d8[512] =
RecompOpFn recomp_opcodes_d9[512] =
{
/*16-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*10*/ ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs,
-/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW,
/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW,
/*40*/ ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*50*/ ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs,
-/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW,
/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW,
/*80*/ ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*90*/ ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs,
-/*a0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*a0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW,
/*b0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW,
/*c0*/ ropFLD, ropFLD, ropFLD, ropFLD, ropFLD, ropFLD, ropFLD, ropFLD, ropFXCH, ropFXCH, ropFXCH, ropFXCH, ropFXCH, ropFXCH, ropFXCH, ropFXCH,
-/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFSTP, ropFSTP, ropFSTP, ropFSTP, ropFSTP, ropFSTP, ropFSTP, ropFSTP,
-/*e0*/ ropFCHS, ropFABS, NULL, NULL, ropFTST, NULL, NULL, NULL, ropFLD1, NULL, NULL, NULL, NULL, NULL, ropFLDZ, NULL,
-/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFSQRT, NULL, NULL, NULL, NULL, NULL,
+/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*e0*/ ropFCHS, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFLD1, ropFLDL2T, ropFLDL2E, ropFLDPI, ropFLDEG2, ropFLDLN2, ropFLDZ, NULL,
+/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*32-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*10*/ ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs,
-/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW,
/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW,
/*40*/ ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*50*/ ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs,
-/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW,
/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW,
/*80*/ ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, ropFLDs, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*90*/ ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs, ropFSTPs,
-/*a0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*a0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW, ropFLDCW,
/*b0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW, ropFSTCW,
/*c0*/ ropFLD, ropFLD, ropFLD, ropFLD, ropFLD, ropFLD, ropFLD, ropFLD, ropFXCH, ropFXCH, ropFXCH, ropFXCH, ropFXCH, ropFXCH, ropFXCH, ropFXCH,
-/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFSTP, ropFSTP, ropFSTP, ropFSTP, ropFSTP, ropFSTP, ropFSTP, ropFSTP,
-/*e0*/ ropFCHS, ropFABS, NULL, NULL, ropFTST, NULL, NULL, NULL, ropFLD1, NULL, NULL, NULL, NULL, NULL, ropFLDZ, NULL,
-/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFSQRT, NULL, NULL, NULL, NULL, NULL,
+/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*e0*/ ropFCHS, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFLD1, ropFLDL2T, ropFLDL2E, ropFLDPI, ropFLDEG2, ropFLDLN2, ropFLDZ, NULL,
+/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
};
RecompOpFn recomp_opcodes_da[512] =
{
/*16-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl,
-/*10*/ ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl,
-/*20*/ ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl,
-/*30*/ ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl,
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/*00*/ ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil,
+/*10*/ ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil,
+/*20*/ ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil,
+/*30*/ ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil,
-/*40*/ ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl,
-/*50*/ ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl,
-/*60*/ ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl,
-/*70*/ ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl,
+/*40*/ ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil,
+/*50*/ ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil,
+/*60*/ ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil,
+/*70*/ ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil,
-/*80*/ ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl,
-/*90*/ ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl,
-/*a0*/ ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl,
-/*b0*/ ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl,
+/*80*/ ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil,
+/*90*/ ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil,
+/*a0*/ ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil,
+/*b0*/ ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil,
/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFUCOMPP, NULL, NULL, NULL, NULL, NULL, NULL,
+/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*e0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*32-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl,
-/*10*/ ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl,
-/*20*/ ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl,
-/*30*/ ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl,
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/*00*/ ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil,
+/*10*/ ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil,
+/*20*/ ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil,
+/*30*/ ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil,
-/*40*/ ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl,
-/*50*/ ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl,
-/*60*/ ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl,
-/*70*/ ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl,
+/*40*/ ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil,
+/*50*/ ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil,
+/*60*/ ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil,
+/*70*/ ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil,
-/*80*/ ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIADDl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl, ropFIMULl,
-/*90*/ ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl, ropFICOMPl,
-/*a0*/ ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl, ropFISUBRl,
-/*b0*/ ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl, ropFIDIVRl,
+/*80*/ ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFADDil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil, ropFMULil,
+/*90*/ ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil, ropFCOMPil,
+/*a0*/ ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil, ropFSUBRil,
+/*b0*/ ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil, ropFDIVRil,
/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFUCOMPP, NULL, NULL, NULL, NULL, NULL, NULL,
+/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*e0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
};
@@ -285,7 +264,7 @@ RecompOpFn recomp_opcodes_da[512] =
RecompOpFn recomp_opcodes_db[512] =
{
/*16-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ ropFILDl, ropFILDl, ropFILDl, ropFILDl, ropFILDl, ropFILDl, ropFILDl, ropFILDl, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*10*/ ropFISTl, ropFISTl, ropFISTl, ropFISTl, ropFISTl, ropFISTl, ropFISTl, ropFISTl, ropFISTPl, ropFISTPl, ropFISTPl, ropFISTPl, ropFISTPl, ropFISTPl, ropFISTPl, ropFISTPl,
/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
@@ -307,8 +286,8 @@ RecompOpFn recomp_opcodes_db[512] =
/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*32-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ ropFILDl, ropFILDl, ropFILDl, ropFILDl, ropFILDl, ropFILDl, ropFILDl, ropFILDl, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/*80*/ ropFILDl, ropFILDl, ropFILDl, ropFILDl, ropFILDl, ropFILDl, ropFILDl, ropFILDl, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*10*/ ropFISTl, ropFISTl, ropFISTl, ropFISTl, ropFISTl, ropFISTl, ropFISTl, ropFISTl, ropFISTPl, ropFISTPl, ropFISTPl, ropFISTPl, ropFISTPl, ropFISTPl, ropFISTPl, ropFISTPl,
/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
@@ -332,7 +311,7 @@ RecompOpFn recomp_opcodes_db[512] =
RecompOpFn recomp_opcodes_dc[512] =
{
/*16-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ ropFADDd, ropFADDd, ropFADDd, ropFADDd, ropFADDd, ropFADDd, ropFADDd, ropFADDd, ropFMULd, ropFMULd, ropFMULd, ropFMULd, ropFMULd, ropFMULd, ropFMULd, ropFMULd,
/*10*/ ropFCOMd, ropFCOMd, ropFCOMd, ropFCOMd, ropFCOMd, ropFCOMd, ropFCOMd, ropFCOMd, ropFCOMPd, ropFCOMPd, ropFCOMPd, ropFCOMPd, ropFCOMPd, ropFCOMPd, ropFCOMPd, ropFCOMPd,
/*20*/ ropFSUBd, ropFSUBd, ropFSUBd, ropFSUBd, ropFSUBd, ropFSUBd, ropFSUBd, ropFSUBd, ropFSUBRd, ropFSUBRd, ropFSUBRd, ropFSUBRd, ropFSUBRd, ropFSUBRd, ropFSUBRd, ropFSUBRd,
@@ -354,7 +333,7 @@ RecompOpFn recomp_opcodes_dc[512] =
/*f0*/ ropFDIVRr, ropFDIVRr, ropFDIVRr, ropFDIVRr, ropFDIVRr, ropFDIVRr, ropFDIVRr, ropFDIVRr, ropFDIVr, ropFDIVr, ropFDIVr, ropFDIVr, ropFDIVr, ropFDIVr, ropFDIVr, ropFDIVr,
/*32-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ ropFADDd, ropFADDd, ropFADDd, ropFADDd, ropFADDd, ropFADDd, ropFADDd, ropFADDd, ropFMULd, ropFMULd, ropFMULd, ropFMULd, ropFMULd, ropFMULd, ropFMULd, ropFMULd,
/*10*/ ropFCOMd, ropFCOMd, ropFCOMd, ropFCOMd, ropFCOMd, ropFCOMd, ropFCOMd, ropFCOMd, ropFCOMPd, ropFCOMPd, ropFCOMPd, ropFCOMPd, ropFCOMPd, ropFCOMPd, ropFCOMPd, ropFCOMPd,
/*20*/ ropFSUBd, ropFSUBd, ropFSUBd, ropFSUBd, ropFSUBd, ropFSUBd, ropFSUBd, ropFSUBd, ropFSUBRd, ropFSUBRd, ropFSUBRd, ropFSUBRd, ropFSUBRd, ropFSUBRd, ropFSUBRd, ropFSUBRd,
@@ -379,68 +358,68 @@ RecompOpFn recomp_opcodes_dc[512] =
RecompOpFn recomp_opcodes_dd[512] =
{
/*16-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*10*/ ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd,
/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW,
+/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*40*/ ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*50*/ ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd,
/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW,
+/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*80*/ ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*90*/ ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd,
/*a0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*b0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW,
+/*b0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*c0*/ ropFFREE, ropFFREE, ropFFREE, ropFFREE, ropFFREE, ropFFREE, ropFFREE, ropFFREE, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*d0*/ ropFST, ropFST, ropFST, ropFST, ropFST, ropFST, ropFST, ropFST, ropFSTP, ropFSTP, ropFSTP, ropFSTP, ropFSTP, ropFSTP, ropFSTP, ropFSTP,
-/*e0*/ ropFUCOM, ropFUCOM, ropFUCOM, ropFUCOM, ropFUCOM, ropFUCOM, ropFUCOM, ropFUCOM, ropFUCOMP, ropFUCOMP, ropFUCOMP, ropFUCOMP, ropFUCOMP, ropFUCOMP, ropFUCOMP, ropFUCOMP,
+/*e0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*32-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*10*/ ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd,
/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW,
+/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*40*/ ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*50*/ ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd,
/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW,
+/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*80*/ ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, ropFLDd, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*90*/ ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd, ropFSTPd,
/*a0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*b0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW, ropFSTSW,
+/*b0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
-/*c0*/ ropFFREE, ropFFREE, ropFFREE, ropFFREE, ropFFREE, ropFFREE, ropFFREE, ropFFREE, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*d0*/ ropFST, ropFST, ropFST, ropFST, ropFST, ropFST, ropFST, ropFST, ropFSTP, ropFSTP, ropFSTP, ropFSTP, ropFSTP, ropFSTP, ropFSTP, ropFSTP,
-/*e0*/ ropFUCOM, ropFUCOM, ropFUCOM, ropFUCOM, ropFUCOM, ropFUCOM, ropFUCOM, ropFUCOM, ropFUCOMP, ropFUCOMP, ropFUCOMP, ropFUCOMP, ropFUCOMP, ropFUCOMP, ropFUCOMP, ropFUCOMP,
+/*e0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
};
RecompOpFn recomp_opcodes_de[512] =
{
/*16-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw,
-/*10*/ ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw,
-/*20*/ ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw,
-/*30*/ ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw,
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/*00*/ ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw,
+/*10*/ ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw,
+/*20*/ ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw,
+/*30*/ ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw,
-/*40*/ ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw,
-/*50*/ ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw,
-/*60*/ ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw,
-/*70*/ ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw,
+/*40*/ ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw,
+/*50*/ ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw,
+/*60*/ ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw,
+/*70*/ ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw,
-/*80*/ ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw,
-/*90*/ ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw,
-/*a0*/ ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw,
-/*b0*/ ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw,
+/*80*/ ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw,
+/*90*/ ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw,
+/*a0*/ ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw,
+/*b0*/ ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw,
/*c0*/ ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFMULP, ropFMULP, ropFMULP, ropFMULP, ropFMULP, ropFMULP, ropFMULP, ropFMULP,
/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFCOMPP, NULL, NULL, NULL, NULL, NULL, NULL,
@@ -448,21 +427,21 @@ RecompOpFn recomp_opcodes_de[512] =
/*f0*/ ropFDIVRP, ropFDIVRP, ropFDIVRP, ropFDIVRP, ropFDIVRP, ropFDIVRP, ropFDIVRP, ropFDIVRP, ropFDIVP, ropFDIVP, ropFDIVP, ropFDIVP, ropFDIVP, ropFDIVP, ropFDIVP, ropFDIVP,
/*32-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
-/*00*/ ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw,
-/*10*/ ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw,
-/*20*/ ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw,
-/*30*/ ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw,
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/*00*/ ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw,
+/*10*/ ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw,
+/*20*/ ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw,
+/*30*/ ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw,
-/*40*/ ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw,
-/*50*/ ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw,
-/*60*/ ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw,
-/*70*/ ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw,
+/*40*/ ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw,
+/*50*/ ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw,
+/*60*/ ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw,
+/*70*/ ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw,
-/*80*/ ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIADDw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw, ropFIMULw,
-/*90*/ ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw, ropFICOMPw,
-/*a0*/ ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw, ropFISUBRw,
-/*b0*/ ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw, ropFIDIVRw,
+/*80*/ ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFADDiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw, ropFMULiw,
+/*90*/ ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw, ropFCOMPiw,
+/*a0*/ ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw, ropFSUBRiw,
+/*b0*/ ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIViw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw, ropFDIVRiw,
/*c0*/ ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFADDP, ropFMULP, ropFMULP, ropFMULP, ropFMULP, ropFMULP, ropFMULP, ropFMULP, ropFMULP,
/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFCOMPP, NULL, NULL, NULL, NULL, NULL, NULL,
@@ -473,7 +452,7 @@ RecompOpFn recomp_opcodes_de[512] =
RecompOpFn recomp_opcodes_df[512] =
{
/*16-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ ropFILDw, ropFILDw, ropFILDw, ropFILDw, ropFILDw, ropFILDw, ropFILDw, ropFILDw, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*10*/ ropFISTw, ropFISTw, ropFISTw, ropFISTw, ropFISTw, ropFISTw, ropFISTw, ropFISTw, ropFISTPw, ropFISTPw, ropFISTPw, ropFISTPw, ropFISTPw, ropFISTPw, ropFISTPw, ropFISTPw,
/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFILDq, ropFILDq, ropFILDq, ropFILDq, ropFILDq, ropFILDq, ropFILDq, ropFILDq,
@@ -495,7 +474,7 @@ RecompOpFn recomp_opcodes_df[512] =
/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*32-bit data*/
-/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
+/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
/*00*/ ropFILDw, ropFILDw, ropFILDw, ropFILDw, ropFILDw, ropFILDw, ropFILDw, ropFILDw, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/*10*/ ropFISTw, ropFISTw, ropFISTw, ropFISTw, ropFISTw, ropFISTw, ropFISTw, ropFISTw, ropFISTPw, ropFISTPw, ropFISTPw, ropFISTPw, ropFISTPw, ropFISTPw, ropFISTPw, ropFISTPw,
/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, ropFILDq, ropFILDq, ropFILDq, ropFILDq, ropFILDq, ropFILDq, ropFILDq, ropFILDq,
diff --git a/src/codegen_ops.h b/src/codegen_ops.h
index 64f3547..3f0d1be 100644
--- a/src/codegen_ops.h
+++ b/src/codegen_ops.h
@@ -1,15 +1,7 @@
-#ifndef _CODEGEN_OPS_H_
-#define _CODEGEN_OPS_H_
-
-#include "codegen.h"
-
-struct ir_data_t;
-
-typedef uint32_t (*RecompOpFn)(codeblock_t *block, struct ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+typedef uint32_t (*RecompOpFn)(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block);
extern RecompOpFn recomp_opcodes[512];
extern RecompOpFn recomp_opcodes_0f[512];
-extern RecompOpFn recomp_opcodes_3DNOW[256];
extern RecompOpFn recomp_opcodes_d8[512];
extern RecompOpFn recomp_opcodes_d9[512];
extern RecompOpFn recomp_opcodes_da[512];
@@ -18,8 +10,6 @@ extern RecompOpFn recomp_opcodes_dc[512];
extern RecompOpFn recomp_opcodes_dd[512];
extern RecompOpFn recomp_opcodes_de[512];
extern RecompOpFn recomp_opcodes_df[512];
-/*extern RecompOpFn recomp_opcodes_REPE[512];
-extern RecompOpFn recomp_opcodes_REPNE[512];*/
#define REG_EAX 0
#define REG_ECX 1
@@ -45,5 +35,3 @@ extern RecompOpFn recomp_opcodes_REPNE[512];*/
#define REG_DH 6
#define REG_BL 3
#define REG_BH 7
-
-#endif
diff --git a/src/codegen_ops_3dnow.c b/src/codegen_ops_3dnow.c
deleted file mode 100644
index 7a2af83..0000000
--- a/src/codegen_ops_3dnow.c
+++ /dev/null
@@ -1,208 +0,0 @@
-#include "ibm.h"
-
-#include "x86.h"
-#include "x86_flags.h"
-#include "386_common.h"
-#include "codegen.h"
-#include "codegen_accumulate.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_3dnow.h"
-#include "codegen_ops_helpers.h"
-
-#define ropParith(func) \
-uint32_t rop ## func(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- int dest_reg = (fetchdat >> 3) & 7; \
- \
- uop_MMX_ENTER(ir); \
- codegen_mark_code_present(block, cs+op_pc, 1); \
- if ((fetchdat & 0xc0) == 0xc0) \
- { \
- int src_reg = fetchdat & 7; \
- uop_ ## func(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_MM(src_reg)); \
- } \
- else \
- { \
- x86seg *target_seg; \
- \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- uop_MEM_LOAD_REG(ir, IREG_temp0_Q, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_ ## func(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); \
- } \
- \
- codegen_mark_code_present(block, cs+op_pc+1, 1); \
- return op_pc + 2; \
-}
-
-ropParith(PFADD)
-ropParith(PFCMPEQ)
-ropParith(PFCMPGE)
-ropParith(PFCMPGT)
-ropParith(PFMAX)
-ropParith(PFMIN)
-ropParith(PFMUL)
-ropParith(PFSUB)
-
-uint32_t ropPF2ID(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- uop_MMX_ENTER(ir);
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_PF2ID(ir, IREG_MM(dest_reg), IREG_MM(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_Q, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_PF2ID(ir, IREG_MM(dest_reg), IREG_temp0_Q);
- }
-
- codegen_mark_code_present(block, cs+op_pc+1, 1);
- return op_pc + 2;
-}
-
-uint32_t ropPFSUBR(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- uop_MMX_ENTER(ir);
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_PFSUB(ir, IREG_MM(dest_reg), IREG_MM(src_reg), IREG_MM(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_Q, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_PFSUB(ir, IREG_MM(dest_reg), IREG_temp0_Q, IREG_MM(dest_reg));
- }
-
- codegen_mark_code_present(block, cs+op_pc+1, 1);
- return op_pc + 2;
-}
-
-uint32_t ropPI2FD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- uop_MMX_ENTER(ir);
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_PI2FD(ir, IREG_MM(dest_reg), IREG_MM(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_Q, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_PI2FD(ir, IREG_MM(dest_reg), IREG_temp0_Q);
- }
-
- codegen_mark_code_present(block, cs+op_pc+1, 1);
- return op_pc + 2;
-}
-
-uint32_t ropPFRCPIT(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- uop_MMX_ENTER(ir);
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_MOV(ir, IREG_MM(dest_reg), IREG_MM(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_MM(dest_reg), ireg_seg_base(target_seg), IREG_eaaddr);
- }
-
- codegen_mark_code_present(block, cs+op_pc+1, 1);
- return op_pc + 2;
-}
-uint32_t ropPFRCP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- uop_MMX_ENTER(ir);
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_PFRCP(ir, IREG_MM(dest_reg), IREG_MM(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_Q, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_PFRCP(ir, IREG_MM(dest_reg), IREG_temp0_Q);
- }
-
- codegen_mark_code_present(block, cs+op_pc+1, 1);
- return op_pc + 2;
-}
-uint32_t ropPFRSQRT(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- uop_MMX_ENTER(ir);
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_PFRSQRT(ir, IREG_MM(dest_reg), IREG_MM(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_Q, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_PFRSQRT(ir, IREG_MM(dest_reg), IREG_temp0_Q);
- }
-
- codegen_mark_code_present(block, cs+op_pc+1, 1);
- return op_pc + 2;
-}
-
-uint32_t ropPFRSQIT1(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_MMX_ENTER(ir);
-
- codegen_mark_code_present(block, cs+op_pc, 2);
- return op_pc + 2;
-}
diff --git a/src/codegen_ops_3dnow.h b/src/codegen_ops_3dnow.h
deleted file mode 100644
index 3b124ae..0000000
--- a/src/codegen_ops_3dnow.h
+++ /dev/null
@@ -1,15 +0,0 @@
-uint32_t ropPF2ID(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPFADD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPFCMPEQ(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPFCMPGE(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPFCMPGT(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPFMAX(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPFMIN(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPFMUL(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPFRCP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPFRCPIT(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPFRSQRT(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPFRSQIT1(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPFSUB(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPFSUBR(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPI2FD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
diff --git a/src/codegen_ops_arith.c b/src/codegen_ops_arith.c
deleted file mode 100644
index 2127c57..0000000
--- a/src/codegen_ops_arith.c
+++ /dev/null
@@ -1,2517 +0,0 @@
-#include "ibm.h"
-
-#include "x86.h"
-#include "x86_flags.h"
-#include "386_common.h"
-#include "codegen.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_arith.h"
-#include "codegen_ops_helpers.h"
-
-static inline void get_cf(ir_data_t *ir, int dest_reg)
-{
- uop_CALL_FUNC_RESULT(ir, dest_reg, CF_SET);
-}
-
-uint32_t ropADC_AL_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint8_t imm_data = fastreadb(cs + op_pc);
-
- get_cf(ir, IREG_temp0);
- uop_MOVZX(ir, IREG_flags_op1, IREG_AL);
- uop_ADD_IMM(ir, IREG_AL, IREG_AL, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op2, imm_data);
- uop_ADD(ir, IREG_AL, IREG_AL, IREG_temp0_B);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADC8);
- uop_MOVZX(ir, IREG_flags_res, IREG_AL);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 1);
- return op_pc + 1;
-}
-uint32_t ropADC_AX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint16_t imm_data = fastreadw(cs + op_pc);
-
- get_cf(ir, IREG_temp0);
- uop_MOVZX(ir, IREG_flags_op1, IREG_AX);
- uop_ADD_IMM(ir, IREG_AX, IREG_AX, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op2, imm_data);
- uop_ADD(ir, IREG_AX, IREG_AX, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADC16);
- uop_MOVZX(ir, IREG_flags_res, IREG_AX);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 2);
- return op_pc + 2;
-}
-uint32_t ropADC_EAX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- fetchdat = fastreadl(cs + op_pc);
-
- get_cf(ir, IREG_temp0);
- uop_MOV(ir, IREG_flags_op1, IREG_EAX);
- uop_ADD_IMM(ir, IREG_EAX, IREG_EAX, fetchdat);
- uop_MOV_IMM(ir, IREG_flags_op2, fetchdat);
- uop_ADD(ir, IREG_EAX, IREG_EAX, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADC32);
- uop_MOV(ir, IREG_flags_res, IREG_EAX);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 4);
- return op_pc + 4;
-}
-uint32_t ropADC_b_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- get_cf(ir, IREG_temp1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_8(src_reg));
- uop_ADD(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_8(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_B);
- uop_ADD(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp0_B);
- }
-
- uop_ADD(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp1_B);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADC8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropADC_b_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- get_cf(ir, IREG_temp1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_8(src_reg));
- uop_ADD(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_8(src_reg));
- uop_ADD(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp1_B);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_ADD(ir, IREG_temp2_B, IREG_temp0_B, IREG_8(src_reg));
- uop_ADD(ir, IREG_temp2_B, IREG_temp2_B, IREG_temp1_B);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp2_B);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_B);
- uop_MOVZX(ir, IREG_flags_op2, IREG_8(src_reg));
- uop_MOVZX(ir, IREG_flags_res, IREG_temp2_B);
- }
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADC8);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropADC_w_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- get_cf(ir, IREG_temp1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_16(src_reg));
- uop_ADD(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_16(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_W);
- uop_ADD(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp0_W);
- }
-
- uop_ADD(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp1_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADC16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropADC_w_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- get_cf(ir, IREG_temp1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_16(src_reg));
- uop_ADD(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_16(src_reg));
- uop_ADD(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_ADD(ir, IREG_temp2_W, IREG_temp0_W, IREG_16(src_reg));
- uop_ADD(ir, IREG_temp2_W, IREG_temp2_W, IREG_temp1_W);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp2_W);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_op2, IREG_16(src_reg));
- uop_MOVZX(ir, IREG_flags_res, IREG_temp2_W);
- }
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADC16);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropADC_l_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- get_cf(ir, IREG_temp1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_MOV(ir, IREG_flags_op2, IREG_32(src_reg));
- uop_ADD(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_32(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_flags_op2, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_ADD(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_flags_op2);
- }
-
- uop_ADD(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADC32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropADC_l_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- get_cf(ir, IREG_temp1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_MOV(ir, IREG_flags_op2, IREG_32(src_reg));
- uop_ADD(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_32(src_reg));
- uop_ADD(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp1);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_ADD(ir, IREG_temp2, IREG_temp0, IREG_32(src_reg));
- uop_ADD(ir, IREG_temp2, IREG_temp2, IREG_temp1);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp2);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- uop_MOV(ir, IREG_flags_op2, IREG_32(src_reg));
- uop_MOV(ir, IREG_flags_res, IREG_temp2);
- }
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADC32);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-
-uint32_t ropADD_AL_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint8_t imm_data = fastreadb(cs + op_pc);
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_AL);
- uop_ADD_IMM(ir, IREG_AL, IREG_AL, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op2, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADD8);
- uop_MOVZX(ir, IREG_flags_res, IREG_AL);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 1);
- return op_pc + 1;
-}
-uint32_t ropADD_AX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint16_t imm_data = fastreadw(cs + op_pc);
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_AX);
- uop_ADD_IMM(ir, IREG_AX, IREG_AX, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op2, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADD16);
- uop_MOVZX(ir, IREG_flags_res, IREG_AX);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 2);
- return op_pc + 2;
-}
-uint32_t ropADD_EAX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_MOV(ir, IREG_flags_op1, IREG_EAX);
-
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- LOAD_IMMEDIATE_FROM_RAM_32(block, ir, IREG_temp0, cs + op_pc);
- uop_ADD(ir, IREG_EAX, IREG_EAX, IREG_temp0);
- uop_MOV(ir, IREG_flags_op2, IREG_temp0);
- }
- else
- {
- fetchdat = fastreadl(cs + op_pc);
- uop_ADD_IMM(ir, IREG_EAX, IREG_EAX, fetchdat);
- uop_MOV_IMM(ir, IREG_flags_op2, fetchdat);
- codegen_mark_code_present(block, cs+op_pc, 4);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADD32);
- uop_MOV(ir, IREG_flags_res, IREG_EAX);
- codegen_flags_changed = 1;
- return op_pc + 4;
-}
-uint32_t ropADD_b_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_8(src_reg));
- uop_ADD(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_8(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_B);
- uop_ADD(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp0_B);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADD8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropADD_b_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_8(src_reg));
- uop_ADD(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_8(src_reg));
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_ADD(ir, IREG_temp1_B, IREG_temp0_B, IREG_8(src_reg));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_B);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_B);
- uop_MOVZX(ir, IREG_flags_op2, IREG_8(src_reg));
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_B);
- }
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADD8);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropADD_w_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_16(src_reg));
- uop_ADD(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_16(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_W);
- uop_ADD(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp0_W);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADD16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropADD_w_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_16(src_reg));
- uop_ADD(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_16(src_reg));
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_ADD(ir, IREG_temp1_W, IREG_temp0_W, IREG_16(src_reg));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_op2, IREG_16(src_reg));
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- }
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADD16);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropADD_l_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_MOV(ir, IREG_flags_op2, IREG_32(src_reg));
- uop_ADD(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_32(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_flags_op2, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_ADD(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_flags_op2);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADD32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropADD_l_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_MOV(ir, IREG_flags_op2, IREG_32(src_reg));
- uop_ADD(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_32(src_reg));
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_ADD(ir, IREG_temp1, IREG_temp0, IREG_32(src_reg));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- uop_MOV(ir, IREG_flags_op2, IREG_32(src_reg));
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- }
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADD32);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-
-uint32_t ropCMP_AL_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint8_t imm_data = fastreadb(cs + op_pc);
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_AL);
- uop_SUB_IMM(ir, IREG_flags_res_B, IREG_AL, imm_data);
- uop_MOVZX(ir, IREG_flags_res, IREG_flags_res_B);
- uop_MOV_IMM(ir, IREG_flags_op2, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB8);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 1);
- return op_pc + 1;
-}
-uint32_t ropCMP_AX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint16_t imm_data = fastreadw(cs + op_pc);
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_AX);
- uop_SUB_IMM(ir, IREG_flags_res_W, IREG_AX, imm_data);
- uop_MOVZX(ir, IREG_flags_res, IREG_flags_res_W);
- uop_MOV_IMM(ir, IREG_flags_op2, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB16);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 2);
- return op_pc + 2;
-}
-uint32_t ropCMP_EAX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- fetchdat = fastreadl(cs + op_pc);
-
- uop_MOV(ir, IREG_flags_op1, IREG_EAX);
- uop_SUB_IMM(ir, IREG_flags_res, IREG_EAX, fetchdat);
- uop_MOV_IMM(ir, IREG_flags_op2, fetchdat);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB32);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 4);
- return op_pc + 4;
-}
-uint32_t ropCMP_b_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_8(src_reg));
- uop_SUB(ir, IREG_flags_res_B, IREG_8(dest_reg), IREG_8(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_B);
- uop_SUB(ir, IREG_flags_res_B, IREG_8(dest_reg), IREG_temp0_B);
- }
-
- uop_MOVZX(ir, IREG_flags_res, IREG_flags_res_B);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB8);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropCMP_b_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_8(src_reg));
- uop_SUB(ir, IREG_flags_res_B, IREG_8(dest_reg), IREG_8(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_B);
- uop_MOVZX(ir, IREG_flags_op2, IREG_8(src_reg));
- uop_SUB(ir, IREG_flags_res_B, IREG_temp0_B, IREG_8(src_reg));
- }
-
- uop_MOVZX(ir, IREG_flags_res, IREG_flags_res_B);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB8);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropCMP_w_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_16(src_reg));
- uop_SUB(ir, IREG_flags_res_W, IREG_16(dest_reg), IREG_16(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_W);
- uop_SUB(ir, IREG_flags_res_W, IREG_16(dest_reg), IREG_temp0_W);
- }
-
- uop_MOVZX(ir, IREG_flags_res, IREG_flags_res_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB16);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropCMP_w_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_16(src_reg));
- uop_SUB(ir, IREG_flags_res_W, IREG_16(dest_reg), IREG_16(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_op2, IREG_16(src_reg));
- uop_SUB(ir, IREG_flags_res_W, IREG_temp0_W, IREG_16(src_reg));
- }
-
- uop_MOVZX(ir, IREG_flags_res, IREG_flags_res_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB16);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropCMP_l_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_MOV(ir, IREG_flags_op2, IREG_32(src_reg));
- uop_SUB(ir, IREG_flags_res, IREG_32(dest_reg), IREG_32(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_MOV(ir, IREG_flags_op2, IREG_temp0);
- uop_SUB(ir, IREG_flags_res, IREG_32(dest_reg), IREG_temp0);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB32);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropCMP_l_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_MOV(ir, IREG_flags_op2, IREG_32(src_reg));
- uop_SUB(ir, IREG_flags_res, IREG_32(dest_reg), IREG_32(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- uop_MOV(ir, IREG_flags_op2, IREG_32(src_reg));
- uop_SUB(ir, IREG_flags_res, IREG_temp0, IREG_32(src_reg));
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB32);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-
-uint32_t ropSBB_AL_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint8_t imm_data = fastreadb(cs + op_pc);
-
- get_cf(ir, IREG_temp0);
- uop_MOVZX(ir, IREG_flags_op1, IREG_AL);
- uop_SUB_IMM(ir, IREG_AL, IREG_AL, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op2, imm_data);
- uop_SUB(ir, IREG_AL, IREG_AL, IREG_temp0_B);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SBC8);
- uop_MOVZX(ir, IREG_flags_res, IREG_AL);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 1);
- return op_pc + 1;
-}
-uint32_t ropSBB_AX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint16_t imm_data = fastreadw(cs + op_pc);
-
- get_cf(ir, IREG_temp0);
- uop_MOVZX(ir, IREG_flags_op1, IREG_AX);
- uop_SUB_IMM(ir, IREG_AX, IREG_AX, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op2, imm_data);
- uop_SUB(ir, IREG_AX, IREG_AX, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SBC16);
- uop_MOVZX(ir, IREG_flags_res, IREG_AX);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 2);
- return op_pc + 2;
-}
-uint32_t ropSBB_EAX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- fetchdat = fastreadl(cs + op_pc);
-
- get_cf(ir, IREG_temp0);
- uop_MOV(ir, IREG_flags_op1, IREG_EAX);
- uop_SUB_IMM(ir, IREG_EAX, IREG_EAX, fetchdat);
- uop_MOV_IMM(ir, IREG_flags_op2, fetchdat);
- uop_SUB(ir, IREG_EAX, IREG_EAX, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SBC32);
- uop_MOV(ir, IREG_flags_res, IREG_EAX);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 4);
- return op_pc + 4;
-}
-uint32_t ropSBB_b_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- get_cf(ir, IREG_temp1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_8(src_reg));
- uop_SUB(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_8(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_B);
- uop_SUB(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp0_B);
- }
-
- uop_SUB(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp1_B);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SBC8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropSBB_b_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- get_cf(ir, IREG_temp1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_8(src_reg));
- uop_SUB(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_8(src_reg));
- uop_SUB(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp1_B);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_SUB(ir, IREG_temp2_B, IREG_temp0_B, IREG_8(src_reg));
- uop_SUB(ir, IREG_temp2_B, IREG_temp2_B, IREG_temp1_B);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp2_B);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_B);
- uop_MOVZX(ir, IREG_flags_op2, IREG_8(src_reg));
- uop_MOVZX(ir, IREG_flags_res, IREG_temp2_B);
- }
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SBC8);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropSBB_w_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- get_cf(ir, IREG_temp1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_16(src_reg));
- uop_SUB(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_16(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_W);
- uop_SUB(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp0_W);
- }
-
- uop_SUB(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp1_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SBC16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropSBB_w_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- get_cf(ir, IREG_temp1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_16(src_reg));
- uop_SUB(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_16(src_reg));
- uop_SUB(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_SUB(ir, IREG_temp2_W, IREG_temp0_W, IREG_16(src_reg));
- uop_SUB(ir, IREG_temp2_W, IREG_temp2_W, IREG_temp1_W);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp2_W);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_op2, IREG_16(src_reg));
- uop_MOVZX(ir, IREG_flags_res, IREG_temp2_W);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SBC16);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropSBB_l_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- get_cf(ir, IREG_temp1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_MOV(ir, IREG_flags_op2, IREG_32(src_reg));
- uop_SUB(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_32(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_flags_op2, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_SUB(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_flags_op2);
- }
-
- uop_SUB(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SBC32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropSBB_l_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- get_cf(ir, IREG_temp1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_MOV(ir, IREG_flags_op2, IREG_32(src_reg));
- uop_SUB(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_32(src_reg));
- uop_SUB(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp1);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_SUB(ir, IREG_temp2, IREG_temp0, IREG_32(src_reg));
- uop_SUB(ir, IREG_temp2, IREG_temp2, IREG_temp1);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp2);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- uop_MOV(ir, IREG_flags_op2, IREG_32(src_reg));
- uop_MOV(ir, IREG_flags_res, IREG_temp2);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SBC32);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-
-uint32_t ropSUB_AL_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint8_t imm_data = fastreadb(cs + op_pc);
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_AL);
- uop_SUB_IMM(ir, IREG_AL, IREG_AL, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op2, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB8);
- uop_MOVZX(ir, IREG_flags_res, IREG_AL);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 1);
- return op_pc + 1;
-}
-uint32_t ropSUB_AX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint16_t imm_data = fastreadw(cs + op_pc);
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_AX);
- uop_SUB_IMM(ir, IREG_AX, IREG_AX, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op2, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB16);
- uop_MOVZX(ir, IREG_flags_res, IREG_AX);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 2);
- return op_pc + 2;
-}
-uint32_t ropSUB_EAX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_MOV(ir, IREG_flags_op1, IREG_EAX);
-
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- LOAD_IMMEDIATE_FROM_RAM_32(block, ir, IREG_temp0, cs + op_pc);
- uop_SUB(ir, IREG_EAX, IREG_EAX, IREG_temp0);
- uop_MOV(ir, IREG_flags_op2, IREG_temp0);
- }
- else
- {
- fetchdat = fastreadl(cs + op_pc);
- codegen_mark_code_present(block, cs+op_pc, 4);
- uop_SUB_IMM(ir, IREG_EAX, IREG_EAX, fetchdat);
- uop_MOV_IMM(ir, IREG_flags_op2, fetchdat);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB32);
- uop_MOV(ir, IREG_flags_res, IREG_EAX);
-
- codegen_flags_changed = 1;
- return op_pc + 4;
-}
-uint32_t ropSUB_b_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_8(src_reg));
- uop_SUB(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_8(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_B);
- uop_SUB(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp0_B);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropSUB_b_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_8(src_reg));
- uop_SUB(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_8(src_reg));
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_SUB(ir, IREG_temp1_B, IREG_temp0_B, IREG_8(src_reg));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_B);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_B);
- uop_MOVZX(ir, IREG_flags_op2, IREG_8(src_reg));
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_B);
- }
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB8);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropSUB_w_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_16(src_reg));
- uop_SUB(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_16(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_W);
- uop_SUB(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp0_W);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropSUB_w_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_MOVZX(ir, IREG_flags_op2, IREG_16(src_reg));
- uop_SUB(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_16(src_reg));
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_SUB(ir, IREG_temp1_W, IREG_temp0_W, IREG_16(src_reg));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_op2, IREG_16(src_reg));
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB16);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropSUB_l_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_MOV(ir, IREG_flags_op2, IREG_32(src_reg));
- uop_SUB(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_32(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_flags_op2, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_SUB(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_flags_op2);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropSUB_l_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_MOV(ir, IREG_flags_op2, IREG_32(src_reg));
- uop_SUB(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_32(src_reg));
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_SUB(ir, IREG_temp1, IREG_temp0, IREG_32(src_reg));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- uop_MOV(ir, IREG_flags_op2, IREG_32(src_reg));
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB32);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-
-uint32_t rop80(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int skip_immediate = 0;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
- uint8_t imm = fastreadb(cs + op_pc + 1);
-
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- skip_immediate = 1;
- LOAD_IMMEDIATE_FROM_RAM_8(block, ir, IREG_temp0_B, cs+op_pc+1);
- }
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ADD*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- uop_ADD(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp0_B);
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_B);
- }
- else
- {
- uop_ADD_IMM(ir, IREG_8(dest_reg), IREG_8(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- }
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADD8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- break;
-
- case 0x08: /*OR*/
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_OR(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp0_B);
- else
- uop_OR_IMM(ir, IREG_8(dest_reg), IREG_8(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- break;
-
- case 0x10: /*ADC*/
- get_cf(ir, IREG_temp1);
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- uop_ADD(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp0_B);
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_B);
- }
- else
- {
- uop_ADD_IMM(ir, IREG_8(dest_reg), IREG_8(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- }
- uop_ADD(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp1_B);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADC8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- break;
-
- case 0x18: /*SBB*/
- get_cf(ir, IREG_temp1);
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- uop_SUB(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp0_B);
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_B);
- }
- else
- {
- uop_SUB_IMM(ir, IREG_8(dest_reg), IREG_8(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- }
- uop_SUB(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp1_B);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SBC8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- break;
-
- case 0x20: /*AND*/
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_AND(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp0_B);
- else
- uop_AND_IMM(ir, IREG_8(dest_reg), IREG_8(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- break;
-
- case 0x28: /*SUB*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- uop_SUB(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp0_B);
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_B);
- }
- else
- {
- uop_SUB_IMM(ir, IREG_8(dest_reg), IREG_8(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- }
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- break;
-
- case 0x30: /*XOR*/
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_XOR(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp0_B);
- else
- uop_XOR_IMM(ir, IREG_8(dest_reg), IREG_8(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- break;
-
- case 0x38: /*CMP*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- uop_SUB(ir, IREG_flags_res_B, IREG_8(dest_reg), IREG_temp0_B);
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_B);
- }
- else
- {
- uop_SUB_IMM(ir, IREG_flags_res_B, IREG_8(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- }
- uop_MOVZX(ir, IREG_flags_res, IREG_flags_res_B);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB8);
- break;
-
- default:
- return 0;
- }
- }
- else
- {
- x86seg *target_seg;
- uint8_t imm;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- if ((fetchdat & 0x38) == 0x38) /*CMP*/
- codegen_check_seg_read(block, ir, target_seg);
- else
- codegen_check_seg_write(block, ir, target_seg);
- imm = fastreadb(cs + op_pc + 1);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ADD*/
- uop_ADD_IMM(ir, IREG_temp1_B, IREG_temp0_B, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_B);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_B);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADD8);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_B);
- break;
-
- case 0x08: /*OR*/
- uop_OR_IMM(ir, IREG_temp0_B, IREG_temp0_B, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_B);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_B);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN8);
- break;
-
- case 0x10: /*ADC*/
- get_cf(ir, IREG_temp2);
- uop_ADD_IMM(ir, IREG_temp1_B, IREG_temp0_B, imm);
- uop_ADD(ir, IREG_temp1_B, IREG_temp1_B, IREG_temp2_B);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_B);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_B);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADC8);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_B);
- break;
-
- case 0x18: /*SBB*/
- get_cf(ir, IREG_temp2);
- uop_SUB_IMM(ir, IREG_temp1_B, IREG_temp0_B, imm);
- uop_SUB(ir, IREG_temp1_B, IREG_temp1_B, IREG_temp2_B);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_B);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_B);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SBC8);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_B);
- break;
-
- case 0x20: /*AND*/
- uop_AND_IMM(ir, IREG_temp0_B, IREG_temp0_B, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_B);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_B);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN8);
- break;
-
- case 0x28: /*SUB*/
- uop_SUB_IMM(ir, IREG_temp1_B, IREG_temp0_B, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_B);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_B);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB8);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_B);
- break;
-
- case 0x30: /*XOR*/
- uop_XOR_IMM(ir, IREG_temp0_B, IREG_temp0_B, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_B);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_B);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN8);
- break;
-
- case 0x38: /*CMP*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_B);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_SUB_IMM(ir, IREG_flags_res_B, IREG_temp0_B, imm);
- uop_MOVZX(ir, IREG_flags_res, IREG_flags_res_B);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB8);
- break;
-
- default:
- return 0;
- }
- }
-
- codegen_flags_changed = 1;
- if (!skip_immediate)
- codegen_mark_code_present(block, cs+op_pc+1, 1);
- return op_pc + 2;
-}
-uint32_t rop81_w(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int skip_immediate = 0;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
- uint16_t imm = fastreadw(cs + op_pc + 1);
-
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- skip_immediate = 1;
- LOAD_IMMEDIATE_FROM_RAM_16(block, ir, IREG_temp0_W, cs+op_pc+1);
- }
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ADD*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- uop_ADD(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_W);
- }
- else
- {
- uop_ADD_IMM(ir, IREG_16(dest_reg), IREG_16(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- }
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADD16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x08: /*OR*/
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_OR(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp0_W);
- else
- uop_OR_IMM(ir, IREG_16(dest_reg), IREG_16(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x10: /*ADC*/
- get_cf(ir, IREG_temp1);
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- uop_ADD(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_W);
- }
- else
- {
- uop_ADD_IMM(ir, IREG_16(dest_reg), IREG_16(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- }
- uop_ADD(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp1_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADC16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x18: /*SBB*/
- get_cf(ir, IREG_temp1);
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- uop_SUB(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_W);
- }
- else
- {
- uop_SUB_IMM(ir, IREG_16(dest_reg), IREG_16(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- }
- uop_SUB(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp1_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SBC16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x20: /*AND*/
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_AND(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp0_W);
- else
- uop_AND_IMM(ir, IREG_16(dest_reg), IREG_16(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x28: /*SUB*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- uop_SUB(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_W);
- }
- else
- {
- uop_SUB_IMM(ir, IREG_16(dest_reg), IREG_16(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- }
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x30: /*XOR*/
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_XOR(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp0_W);
- else
- uop_XOR_IMM(ir, IREG_16(dest_reg), IREG_16(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x38: /*CMP*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- uop_SUB(ir, IREG_flags_res_W, IREG_16(dest_reg), IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_W);
- }
- else
- {
- uop_SUB_IMM(ir, IREG_flags_res_W, IREG_16(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- }
- uop_MOVZX(ir, IREG_flags_res, IREG_flags_res_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB16);
- break;
-
- default:
- return 0;
- }
- }
- else
- {
- x86seg *target_seg;
- uint16_t imm;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- if ((fetchdat & 0x38) == 0x38) /*CMP*/
- codegen_check_seg_read(block, ir, target_seg);
- else
- codegen_check_seg_write(block, ir, target_seg);
- imm = fastreadw(cs + op_pc + 1);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- skip_immediate = 1;
- LOAD_IMMEDIATE_FROM_RAM_16(block, ir, IREG_temp2_W, cs+op_pc+1);
- }
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ADD*/
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_ADD(ir, IREG_temp1_W, IREG_temp0_W, IREG_temp2_W);
- else
- uop_ADD_IMM(ir, IREG_temp1_W, IREG_temp0_W, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp2_W);
- else
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADD16);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- break;
-
- case 0x08: /*OR*/
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_OR(ir, IREG_temp0_W, IREG_temp0_W, IREG_temp2_W);
- else
- uop_OR_IMM(ir, IREG_temp0_W, IREG_temp0_W, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
- break;
-
- case 0x10: /*ADC*/
- get_cf(ir, IREG_temp3);
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_ADD(ir, IREG_temp1_W, IREG_temp0_W, IREG_temp2_W);
- else
- uop_ADD_IMM(ir, IREG_temp1_W, IREG_temp0_W, imm);
- uop_ADD(ir, IREG_temp1_W, IREG_temp1_W, IREG_temp3_W);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp2_W);
- else
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADC16);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- break;
-
- case 0x18: /*SBB*/
- get_cf(ir, IREG_temp3);
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_SUB(ir, IREG_temp1_W, IREG_temp0_W, IREG_temp2_W);
- else
- uop_SUB_IMM(ir, IREG_temp1_W, IREG_temp0_W, imm);
- uop_SUB(ir, IREG_temp1_W, IREG_temp1_W, IREG_temp3_W);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp2_W);
- else
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SBC16);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- break;
-
- case 0x20: /*AND*/
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_AND(ir, IREG_temp0_W, IREG_temp0_W, IREG_temp2_W);
- else
- uop_AND_IMM(ir, IREG_temp0_W, IREG_temp0_W, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
- break;
-
- case 0x28: /*SUB*/
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_SUB(ir, IREG_temp1_W, IREG_temp0_W, IREG_temp2_W);
- else
- uop_SUB_IMM(ir, IREG_temp1_W, IREG_temp0_W, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp2_W);
- else
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB16);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- break;
-
- case 0x30: /*XOR*/
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_XOR(ir, IREG_temp0_W, IREG_temp0_W, IREG_temp2_W);
- else
- uop_XOR_IMM(ir, IREG_temp0_W, IREG_temp0_W, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
- break;
-
- case 0x38: /*CMP*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp2_W);
- uop_SUB(ir, IREG_flags_res_W, IREG_temp0_W, IREG_temp2_W);
- }
- else
- {
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_SUB_IMM(ir, IREG_flags_res_W, IREG_temp0_W, imm);
- }
- uop_MOVZX(ir, IREG_flags_res, IREG_flags_res_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB16);
- break;
-
- default:
- return 0;
- }
- }
-
- codegen_flags_changed = 1;
- if (!skip_immediate)
- codegen_mark_code_present(block, cs+op_pc+1, 2);
- return op_pc + 3;
-}
-uint32_t rop81_l(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int skip_immediate = 0;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
- uint32_t imm = fastreadl(cs + op_pc + 1);
-
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- skip_immediate = 1;
- LOAD_IMMEDIATE_FROM_RAM_32(block, ir, IREG_temp0, cs+op_pc+1);
- }
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ADD*/
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- uop_ADD(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp0);
- uop_MOV(ir, IREG_flags_op2, IREG_temp0);
- }
- else
- {
- uop_ADD_IMM(ir, IREG_32(dest_reg), IREG_32(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- }
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADD32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x08: /*OR*/
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_OR(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp0);
- else
- uop_OR_IMM(ir, IREG_32(dest_reg), IREG_32(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x10: /*ADC*/
- get_cf(ir, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- uop_ADD(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp0);
- uop_MOV(ir, IREG_flags_op2, IREG_temp0);
- }
- else
- {
- uop_ADD_IMM(ir, IREG_32(dest_reg), IREG_32(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- }
- uop_ADD(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADC32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x18: /*SBB*/
- get_cf(ir, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- uop_SUB(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp0);
- uop_MOV(ir, IREG_flags_op2, IREG_temp0);
- }
- else
- {
- uop_SUB_IMM(ir, IREG_32(dest_reg), IREG_32(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- }
- uop_SUB(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SBC32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x20: /*AND*/
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_AND(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp0);
- else
- uop_AND_IMM(ir, IREG_32(dest_reg), IREG_32(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x28: /*SUB*/
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- uop_SUB(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp0);
- uop_MOV(ir, IREG_flags_op2, IREG_temp0);
- }
- else
- {
- uop_SUB_IMM(ir, IREG_32(dest_reg), IREG_32(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- }
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x30: /*XOR*/
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_XOR(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp0);
- else
- uop_XOR_IMM(ir, IREG_32(dest_reg), IREG_32(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x38: /*CMP*/
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- uop_SUB(ir, IREG_flags_res, IREG_32(dest_reg), IREG_temp0);
- uop_MOV(ir, IREG_flags_op2, IREG_temp0);
- }
- else
- {
- uop_SUB_IMM(ir, IREG_flags_res, IREG_32(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- }
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB32);
- break;
-
- default:
- return 0;
- }
- }
- else
- {
- x86seg *target_seg;
- uint32_t imm;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- if ((fetchdat & 0x38) == 0x38) /*CMP*/
- codegen_check_seg_read(block, ir, target_seg);
- else
- codegen_check_seg_write(block, ir, target_seg);
- imm = fastreadl(cs + op_pc + 1);
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
-
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- skip_immediate = 1;
- LOAD_IMMEDIATE_FROM_RAM_32(block, ir, IREG_temp2, cs+op_pc+1);
- }
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ADD*/
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_ADD(ir, IREG_temp1, IREG_temp0, IREG_temp2);
- else
- uop_ADD_IMM(ir, IREG_temp1, IREG_temp0, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- else
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADD32);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- break;
-
- case 0x08: /*OR*/
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_OR(ir, IREG_temp0, IREG_temp0, IREG_temp2);
- else
- uop_OR_IMM(ir, IREG_temp0, IREG_temp0, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
- uop_MOV(ir, IREG_flags_res, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
- break;
-
- case 0x10: /*ADC*/
- get_cf(ir, IREG_temp3);
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_ADD(ir, IREG_temp1, IREG_temp0, IREG_temp2);
- else
- uop_ADD_IMM(ir, IREG_temp1, IREG_temp0, imm);
- uop_ADD(ir, IREG_temp1, IREG_temp1, IREG_temp3);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- else
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADC32);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- break;
-
- case 0x18: /*SBB*/
- get_cf(ir, IREG_temp3);
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_SUB(ir, IREG_temp1, IREG_temp0, IREG_temp2);
- else
- uop_SUB_IMM(ir, IREG_temp1, IREG_temp0, imm);
- uop_SUB(ir, IREG_temp1, IREG_temp1, IREG_temp3);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- else
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SBC32);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- break;
-
- case 0x20: /*AND*/
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_AND(ir, IREG_temp0, IREG_temp0, IREG_temp2);
- else
- uop_AND_IMM(ir, IREG_temp0, IREG_temp0, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
- uop_MOV(ir, IREG_flags_res, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
- break;
-
- case 0x28: /*SUB*/
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_SUB(ir, IREG_temp1, IREG_temp0, IREG_temp2);
- else
- uop_SUB_IMM(ir, IREG_temp1, IREG_temp0, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- else
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB32);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- break;
-
- case 0x30: /*XOR*/
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- uop_XOR(ir, IREG_temp0, IREG_temp0, IREG_temp2);
- else
- uop_XOR_IMM(ir, IREG_temp0, IREG_temp0, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
- uop_MOV(ir, IREG_flags_res, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
- break;
-
- case 0x38: /*CMP*/
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- uop_SUB(ir, IREG_flags_res, IREG_temp0, IREG_temp2);
- }
- else
- {
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_SUB_IMM(ir, IREG_flags_res, IREG_temp0, imm);
- }
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB32);
- break;
-
- default:
- return 0;
- }
- }
-
- codegen_flags_changed = 1;
- if (!skip_immediate)
- codegen_mark_code_present(block, cs+op_pc+1, 4);
- return op_pc + 5;
-}
-
-uint32_t rop83_w(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
- uint16_t imm = (int16_t)(int8_t)fastreadb(cs + op_pc + 1);
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ADD*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_ADD_IMM(ir, IREG_16(dest_reg), IREG_16(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADD16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x08: /*OR*/
- uop_OR_IMM(ir, IREG_16(dest_reg), IREG_16(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x10: /*ADC*/
- get_cf(ir, IREG_temp1);
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_ADD_IMM(ir, IREG_16(dest_reg), IREG_16(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_ADD(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp1_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADC16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x18: /*SBB*/
- get_cf(ir, IREG_temp1);
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_SUB_IMM(ir, IREG_16(dest_reg), IREG_16(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_SUB(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp1_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SBC16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x20: /*AND*/
- uop_AND_IMM(ir, IREG_16(dest_reg), IREG_16(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x28: /*SUB*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_SUB_IMM(ir, IREG_16(dest_reg), IREG_16(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x30: /*XOR*/
- uop_XOR_IMM(ir, IREG_16(dest_reg), IREG_16(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x38: /*CMP*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_SUB_IMM(ir, IREG_flags_res_W, IREG_16(dest_reg), imm);
- uop_MOVZX(ir, IREG_flags_res, IREG_flags_res_W);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB16);
- break;
-
- default:
- return 0;
- }
- }
- else
- {
- x86seg *target_seg;
- uint16_t imm;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- if ((fetchdat & 0x38) == 0x38) /*CMP*/
- codegen_check_seg_read(block, ir, target_seg);
- else
- codegen_check_seg_write(block, ir, target_seg);
- imm = (int16_t)(int8_t)fastreadb(cs + op_pc + 1);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ADD*/
- uop_ADD_IMM(ir, IREG_temp1_W, IREG_temp0_W, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADD16);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- break;
-
- case 0x08: /*OR*/
- uop_OR_IMM(ir, IREG_temp0_W, IREG_temp0_W, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
- break;
-
- case 0x10: /*ADC*/
- get_cf(ir, IREG_temp2);
- uop_ADD_IMM(ir, IREG_temp1_W, IREG_temp0_W, imm);
- uop_ADD(ir, IREG_temp1_W, IREG_temp1_W, IREG_temp2_W);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADC16);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- break;
-
- case 0x18: /*SBB*/
- get_cf(ir, IREG_temp2);
- uop_SUB_IMM(ir, IREG_temp1_W, IREG_temp0_W, imm);
- uop_SUB(ir, IREG_temp1_W, IREG_temp1_W, IREG_temp2_W);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SBC16);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- break;
-
- case 0x20: /*AND*/
- uop_AND_IMM(ir, IREG_temp0_W, IREG_temp0_W, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
- break;
-
- case 0x28: /*SUB*/
- uop_SUB_IMM(ir, IREG_temp1_W, IREG_temp0_W, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB16);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- break;
-
- case 0x30: /*XOR*/
- uop_XOR_IMM(ir, IREG_temp0_W, IREG_temp0_W, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
- break;
-
- case 0x38: /*CMP*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_SUB_IMM(ir, IREG_flags_res_W, IREG_temp0_W, imm);
- uop_MOVZX(ir, IREG_flags_res, IREG_flags_res_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB16);
- break;
-
- default:
- return 0;
- }
- }
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc+1, 1);
- return op_pc + 2;
-}
-uint32_t rop83_l(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
- uint32_t imm = (int32_t)(int8_t)fastreadb(cs + op_pc + 1);
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ADD*/
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_ADD_IMM(ir, IREG_32(dest_reg), IREG_32(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADD32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x08: /*OR*/
- uop_OR_IMM(ir, IREG_32(dest_reg), IREG_32(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x10: /*ADC*/
- get_cf(ir, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_ADD_IMM(ir, IREG_32(dest_reg), IREG_32(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_ADD(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADC32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x18: /*SBB*/
- get_cf(ir, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_SUB_IMM(ir, IREG_32(dest_reg), IREG_32(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_SUB(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SBC32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x20: /*AND*/
- uop_AND_IMM(ir, IREG_32(dest_reg), IREG_32(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x28: /*SUB*/
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_SUB_IMM(ir, IREG_32(dest_reg), IREG_32(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x30: /*XOR*/
- uop_XOR_IMM(ir, IREG_32(dest_reg), IREG_32(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x38: /*CMP*/
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_SUB_IMM(ir, IREG_flags_res, IREG_32(dest_reg), imm);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB32);
- break;
-
- default:
- return 0;
- }
- }
- else
- {
- x86seg *target_seg;
- uint32_t imm;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- if ((fetchdat & 0x38) == 0x38) /*CMP*/
- codegen_check_seg_read(block, ir, target_seg);
- else
- codegen_check_seg_write(block, ir, target_seg);
- imm = (int32_t)(int8_t)fastreadb(cs + op_pc + 1);
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ADD*/
- uop_ADD_IMM(ir, IREG_temp1, IREG_temp0, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADD32);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- break;
-
- case 0x08: /*OR*/
- uop_OR_IMM(ir, IREG_temp0, IREG_temp0, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
- uop_MOV(ir, IREG_flags_res, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
- break;
-
- case 0x10: /*ADC*/
- get_cf(ir, IREG_temp2);
- uop_ADD_IMM(ir, IREG_temp1, IREG_temp0, imm);
- uop_ADD(ir, IREG_temp1, IREG_temp1, IREG_temp2);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ADC32);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- break;
-
- case 0x18: /*SBB*/
- get_cf(ir, IREG_temp2);
- uop_SUB_IMM(ir, IREG_temp1, IREG_temp0, imm);
- uop_SUB(ir, IREG_temp1, IREG_temp1, IREG_temp2);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SBC32);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- break;
-
- case 0x20: /*AND*/
- uop_AND_IMM(ir, IREG_temp0, IREG_temp0, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
- uop_MOV(ir, IREG_flags_res, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
- break;
-
- case 0x28: /*SUB*/
- uop_SUB_IMM(ir, IREG_temp1, IREG_temp0, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB32);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- break;
-
- case 0x30: /*XOR*/
- uop_XOR_IMM(ir, IREG_temp0, IREG_temp0, imm);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
- uop_MOV(ir, IREG_flags_res, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
- break;
-
- case 0x38: /*CMP*/
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_SUB_IMM(ir, IREG_flags_res, IREG_temp0, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB32);
- break;
-
- default:
- return 0;
- }
- }
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc+1, 1);
- return op_pc + 2;
-}
-
-static void rebuild_c(ir_data_t *ir)
-{
- int needs_rebuild = 1;
-
- if (codegen_flags_changed)
- {
- switch (cpu_state.flags_op)
- {
- case FLAGS_INC8: case FLAGS_INC16: case FLAGS_INC32:
- case FLAGS_DEC8: case FLAGS_DEC16: case FLAGS_DEC32:
- needs_rebuild = 0;
- break;
- }
- }
-
- if (needs_rebuild)
- {
- uop_CALL_FUNC(ir, flags_rebuild_c);
- }
-}
-
-uint32_t ropINC_r16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- rebuild_c(ir);
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(opcode & 7));
- uop_ADD_IMM(ir, IREG_16(opcode & 7), IREG_16(opcode & 7), 1);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(opcode & 7));
- uop_MOV_IMM(ir, IREG_flags_op2, 1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_INC16);
- codegen_flags_changed = 1;
-
- return op_pc;
-}
-uint32_t ropINC_r32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- rebuild_c(ir);
-
- uop_MOV(ir, IREG_flags_op1, IREG_32(opcode & 7));
- uop_ADD_IMM(ir, IREG_32(opcode & 7), IREG_32(opcode & 7), 1);
- uop_MOV(ir, IREG_flags_res, IREG_32(opcode & 7));
- uop_MOV_IMM(ir, IREG_flags_op2, 1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_INC32);
- codegen_flags_changed = 1;
-
- return op_pc;
-}
-
-uint32_t ropDEC_r16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- rebuild_c(ir);
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(opcode & 7));
- uop_SUB_IMM(ir, IREG_16(opcode & 7), IREG_16(opcode & 7), 1);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(opcode & 7));
- uop_MOV_IMM(ir, IREG_flags_op2, 1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_DEC16);
- codegen_flags_changed = 1;
-
- return op_pc;
-}
-uint32_t ropDEC_r32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- rebuild_c(ir);
-
- uop_MOV(ir, IREG_flags_op1, IREG_32(opcode & 7));
- uop_SUB_IMM(ir, IREG_32(opcode & 7), IREG_32(opcode & 7), 1);
- uop_MOV(ir, IREG_flags_res, IREG_32(opcode & 7));
- uop_MOV_IMM(ir, IREG_flags_op2, 1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_DEC32);
- codegen_flags_changed = 1;
-
- return op_pc;
-}
-
-uint32_t ropINCDEC(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- codegen_mark_code_present(block, cs+op_pc, 1);
- rebuild_c(ir);
-
- if ((fetchdat & 0xc0) == 0xc0)
- {
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(fetchdat & 7));
- if (fetchdat & 0x38)
- {
- uop_SUB_IMM(ir, IREG_8(fetchdat & 7), IREG_8(fetchdat & 7), 1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_DEC8);
- }
- else
- {
- uop_ADD_IMM(ir, IREG_8(fetchdat & 7), IREG_8(fetchdat & 7), 1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_INC8);
- }
- uop_MOVZX(ir, IREG_flags_res, IREG_8(fetchdat & 7));
- uop_MOV_IMM(ir, IREG_flags_op2, 1);
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
-
- if (fetchdat & 0x38)
- {
- uop_SUB_IMM(ir, IREG_temp1_B, IREG_temp0_B, 1);
- }
- else
- {
- uop_ADD_IMM(ir, IREG_temp1_B, IREG_temp0_B, 1);
- }
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_B);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_B);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_B);
- uop_MOV_IMM(ir, IREG_flags_op2, 1);
- if (fetchdat & 0x38)
- {
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_DEC8);
- }
- else
- {
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_INC8);
- }
- }
-
- return op_pc+1;
-}
diff --git a/src/codegen_ops_arith.h b/src/codegen_ops_arith.h
index 1338102..57c5e8e 100644
--- a/src/codegen_ops_arith.h
+++ b/src/codegen_ops_arith.h
@@ -1,64 +1,1028 @@
-uint32_t ropADC_AL_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropADC_AX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropADC_EAX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropADC_b_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropADC_b_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropADC_w_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropADC_w_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropADC_l_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropADC_l_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+static uint32_t ropINC_rw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg;
+
+ CALL_FUNC((uintptr_t)flags_rebuild_c);
+
+ host_reg = LOAD_REG_W(opcode & 7);
+
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ ADD_HOST_REG_IMM_W(host_reg, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_INC16);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, host_reg);
+ STORE_REG_W_RELEASE(host_reg);
+
+ codegen_flags_changed = 1;
-uint32_t ropADD_AL_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropADD_AX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropADD_EAX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropADD_b_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropADD_b_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropADD_w_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropADD_w_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropADD_l_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropADD_l_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ return op_pc;
+}
+static uint32_t ropINC_rl(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg;
-uint32_t ropCMP_AL_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropCMP_AX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropCMP_EAX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropCMP_b_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropCMP_b_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropCMP_w_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropCMP_w_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropCMP_l_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropCMP_l_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ CALL_FUNC((uintptr_t)flags_rebuild_c);
+
+ host_reg = LOAD_REG_L(opcode & 7);
+
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op1, host_reg);
+ ADD_HOST_REG_IMM(host_reg, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_INC32);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, host_reg);
+ STORE_REG_L_RELEASE(host_reg);
-uint32_t ropSBB_AL_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSBB_AX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSBB_EAX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSBB_b_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSBB_b_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSBB_w_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSBB_w_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSBB_l_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSBB_l_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ codegen_flags_changed = 1;
-uint32_t ropSUB_AL_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSUB_AX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSUB_EAX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSUB_b_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSUB_b_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSUB_w_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSUB_w_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSUB_l_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSUB_l_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ return op_pc;
+}
+static uint32_t ropDEC_rw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg;
+
+ CALL_FUNC((uintptr_t)flags_rebuild_c);
-uint32_t rop80(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t rop81_w(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t rop81_l(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t rop83_w(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t rop83_l(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ host_reg = LOAD_REG_W(opcode & 7);
+
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ SUB_HOST_REG_IMM_W(host_reg, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_DEC16);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, host_reg);
+ STORE_REG_W_RELEASE(host_reg);
+
+ codegen_flags_changed = 1;
+
+ return op_pc;
+}
+static uint32_t ropDEC_rl(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg;
+
+ CALL_FUNC((uintptr_t)flags_rebuild_c);
+
+ host_reg = LOAD_REG_L(opcode & 7);
+
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op1, host_reg);
+ SUB_HOST_REG_IMM(host_reg, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_DEC32);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, host_reg);
+ STORE_REG_L_RELEASE(host_reg);
+
+ codegen_flags_changed = 1;
+
+ return op_pc;
+}
+
+#define ROP_ARITH_RMW(name, op, writeback) \
+ static uint32_t rop ## name ## _b_rmw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+ { \
+ int src_reg, dst_reg; \
+ x86seg *target_seg; \
+ \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ { \
+ dst_reg = LOAD_REG_B(fetchdat & 7); \
+ } \
+ else \
+ { \
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ SAVE_EA(); \
+ MEM_CHECK_WRITE(target_seg); \
+ dst_reg = MEM_LOAD_ADDR_EA_B_NO_ABRT(target_seg); \
+ } \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ ## op ## 8); \
+ src_reg = LOAD_REG_B((fetchdat >> 3) & 7); \
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_op1, dst_reg); \
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_op2, src_reg); \
+ op ## _HOST_REG_B(dst_reg, src_reg); \
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_res, dst_reg); \
+ if (writeback) \
+ { \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ STORE_REG_B_RELEASE(dst_reg); \
+ else \
+ { \
+ LOAD_EA(); \
+ MEM_STORE_ADDR_EA_B_NO_ABRT(target_seg, dst_reg); \
+ } \
+ } \
+ else \
+ RELEASE_REG(dst_reg); \
+ RELEASE_REG(src_reg); \
+ \
+ codegen_flags_changed = 1; \
+ return op_pc + 1; \
+ } \
+ static uint32_t rop ## name ## _w_rmw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+ { \
+ int src_reg, dst_reg; \
+ x86seg *target_seg; \
+ \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ { \
+ dst_reg = LOAD_REG_W(fetchdat & 7); \
+ } \
+ else \
+ { \
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ SAVE_EA(); \
+ MEM_CHECK_WRITE_W(target_seg); \
+ dst_reg = MEM_LOAD_ADDR_EA_W_NO_ABRT(target_seg); \
+ } \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ ## op ## 16); \
+ src_reg = LOAD_REG_W((fetchdat >> 3) & 7); \
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op1, dst_reg); \
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op2, src_reg); \
+ op ## _HOST_REG_W(dst_reg, src_reg); \
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, dst_reg); \
+ if (writeback) \
+ { \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ STORE_REG_W_RELEASE(dst_reg); \
+ else \
+ { \
+ LOAD_EA(); \
+ MEM_STORE_ADDR_EA_W_NO_ABRT(target_seg, dst_reg); \
+ } \
+ } \
+ else \
+ RELEASE_REG(dst_reg); \
+ RELEASE_REG(src_reg); \
+ \
+ codegen_flags_changed = 1; \
+ return op_pc + 1; \
+ } \
+ static uint32_t rop ## name ## _l_rmw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+ { \
+ int src_reg, dst_reg; \
+ x86seg *target_seg; \
+ \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ { \
+ dst_reg = LOAD_REG_L(fetchdat & 7); \
+ } \
+ else \
+ { \
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ SAVE_EA(); \
+ MEM_CHECK_WRITE_L(target_seg); \
+ dst_reg = MEM_LOAD_ADDR_EA_L_NO_ABRT(target_seg); \
+ } \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ ## op ## 32); \
+ src_reg = LOAD_REG_L((fetchdat >> 3) & 7); \
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op1, dst_reg); \
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op2, src_reg); \
+ op ## _HOST_REG_L(dst_reg, src_reg); \
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, dst_reg); \
+ if (writeback) \
+ { \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ STORE_REG_L_RELEASE(dst_reg); \
+ else \
+ { \
+ LOAD_EA(); \
+ MEM_STORE_ADDR_EA_L_NO_ABRT(target_seg, dst_reg); \
+ } \
+ } \
+ else \
+ RELEASE_REG(dst_reg); \
+ RELEASE_REG(src_reg); \
+ \
+ codegen_flags_changed = 1; \
+ return op_pc + 1; \
+ }
+
+#define ROP_ARITH_RM(name, op, writeback) \
+ static uint32_t rop ## name ## _b_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+ { \
+ int src_reg, dst_reg; \
+ \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ { \
+ src_reg = LOAD_REG_B(fetchdat & 7); \
+ } \
+ else \
+ { \
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ MEM_LOAD_ADDR_EA_B(target_seg); \
+ src_reg = 0; \
+ } \
+ \
+ dst_reg = LOAD_REG_B((fetchdat >> 3) & 7); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ ## op ## 8); \
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_op1, dst_reg); \
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_op2, src_reg); \
+ op ## _HOST_REG_B(dst_reg, src_reg); \
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_res, dst_reg); \
+ if (writeback) STORE_REG_B_RELEASE(dst_reg); \
+ else RELEASE_REG(dst_reg); \
+ RELEASE_REG(src_reg); \
+ \
+ codegen_flags_changed = 1; \
+ return op_pc + 1; \
+ } \
+ static uint32_t rop ## name ## _w_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+ { \
+ int src_reg, dst_reg; \
+ \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ { \
+ src_reg = LOAD_REG_W(fetchdat & 7); \
+ } \
+ else \
+ { \
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ MEM_LOAD_ADDR_EA_W(target_seg); \
+ src_reg = 0; \
+ } \
+ \
+ dst_reg = LOAD_REG_W((fetchdat >> 3) & 7); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ ## op ## 16); \
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op1, dst_reg); \
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op2, src_reg); \
+ op ## _HOST_REG_W(dst_reg, src_reg); \
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, dst_reg); \
+ if (writeback) STORE_REG_W_RELEASE(dst_reg); \
+ else RELEASE_REG(dst_reg); \
+ RELEASE_REG(src_reg); \
+ \
+ codegen_flags_changed = 1; \
+ return op_pc + 1; \
+ } \
+ static uint32_t rop ## name ## _l_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+ { \
+ int src_reg, dst_reg; \
+ \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ { \
+ src_reg = LOAD_REG_L(fetchdat & 7); \
+ } \
+ else \
+ { \
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ MEM_LOAD_ADDR_EA_L(target_seg); \
+ src_reg = 0; \
+ } \
+ \
+ dst_reg = LOAD_REG_L((fetchdat >> 3) & 7); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ ## op ## 32); \
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op1, dst_reg); \
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op2, src_reg); \
+ op ## _HOST_REG_L(dst_reg, src_reg); \
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, dst_reg); \
+ if (writeback) STORE_REG_L_RELEASE(dst_reg); \
+ else RELEASE_REG(dst_reg); \
+ RELEASE_REG(src_reg); \
+ \
+ codegen_flags_changed = 1; \
+ return op_pc + 1; \
+ }
+
+ROP_ARITH_RMW(ADD, ADD, 1)
+ROP_ARITH_RMW(SUB, SUB, 1)
+ROP_ARITH_RM(ADD, ADD, 1)
+ROP_ARITH_RM(SUB, SUB, 1)
+
+static uint32_t ropCMP_b_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int src_reg, dst_reg;
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ src_reg = LOAD_REG_B(fetchdat & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ MEM_LOAD_ADDR_EA_B(target_seg);
+ src_reg = 0;
+ }
+
+ dst_reg = LOAD_REG_B((fetchdat >> 3) & 7);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB8);
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_op1, dst_reg);
+ dst_reg = CMP_HOST_REG_B(dst_reg, src_reg);
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_op2, src_reg);
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_res, dst_reg);
+ RELEASE_REG(dst_reg);
+ RELEASE_REG(src_reg);
+
+ codegen_flags_changed = 1;
+ return op_pc + 1;
+}
+static uint32_t ropCMP_w_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int src_reg, dst_reg;
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ src_reg = LOAD_REG_W(fetchdat & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ MEM_LOAD_ADDR_EA_W(target_seg);
+ src_reg = 0;
+ }
+
+ dst_reg = LOAD_REG_W((fetchdat >> 3) & 7);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB16);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op1, dst_reg);
+ dst_reg = CMP_HOST_REG_W(dst_reg, src_reg);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op2, src_reg);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, dst_reg);
+ RELEASE_REG(dst_reg);
+ RELEASE_REG(src_reg);
+
+ codegen_flags_changed = 1;
+ return op_pc + 1;
+}
+static uint32_t ropCMP_l_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int src_reg, dst_reg;
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ src_reg = LOAD_REG_L(fetchdat & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ MEM_LOAD_ADDR_EA_L(target_seg);
+ src_reg = 0;
+ }
+
+ dst_reg = LOAD_REG_L((fetchdat >> 3) & 7);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB32);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op1, dst_reg);
+ dst_reg = CMP_HOST_REG_L(dst_reg, src_reg);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op2, src_reg);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, dst_reg);
+ RELEASE_REG(dst_reg);
+ RELEASE_REG(src_reg);
+
+ codegen_flags_changed = 1;
+ return op_pc + 1;
+}
+
+static uint32_t ropCMP_b_rmw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int src_reg, dst_reg;
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ dst_reg = LOAD_REG_B(fetchdat & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ MEM_LOAD_ADDR_EA_B(target_seg);
+ dst_reg = 0;
+ }
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB8);
+ src_reg = LOAD_REG_B((fetchdat >> 3) & 7);
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_op1, dst_reg);
+ dst_reg = CMP_HOST_REG_B(dst_reg, src_reg);
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_op2, src_reg);
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_res, dst_reg);
+ RELEASE_REG(dst_reg);
+ RELEASE_REG(src_reg);
+
+ codegen_flags_changed = 1;
+ return op_pc + 1;
+}
+static uint32_t ropCMP_w_rmw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int src_reg, dst_reg;
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ dst_reg = LOAD_REG_W(fetchdat & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ MEM_LOAD_ADDR_EA_W(target_seg);
+ dst_reg = 0;
+ } \
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB16);
+ src_reg = LOAD_REG_W((fetchdat >> 3) & 7);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op1, dst_reg);
+ dst_reg = CMP_HOST_REG_W(dst_reg, src_reg);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op2, src_reg);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, dst_reg);
+ RELEASE_REG(dst_reg);
+ RELEASE_REG(src_reg);
+
+ codegen_flags_changed = 1;
+ return op_pc + 1;
+}
+static uint32_t ropCMP_l_rmw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int src_reg, dst_reg;
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ dst_reg = LOAD_REG_L(fetchdat & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ MEM_LOAD_ADDR_EA_L(target_seg);
+ dst_reg = 0;
+ }
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB32);
+ src_reg = LOAD_REG_L((fetchdat >> 3) & 7);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op1, dst_reg);
+ dst_reg = CMP_HOST_REG_L(dst_reg, src_reg);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op2, src_reg);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, dst_reg);
+ RELEASE_REG(dst_reg);
+ RELEASE_REG(src_reg);
+
+ codegen_flags_changed = 1;
+ return op_pc + 1;
+}
-uint32_t ropDEC_r16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropDEC_r32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+static uint32_t ropADD_AL_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_B(REG_AL);
-uint32_t ropINC_r16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropINC_r32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ ADD_HOST_REG_IMM_B(host_reg, fetchdat & 0xff);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, fetchdat & 0xff);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ADD8);
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_res, host_reg);
+ STORE_REG_B_RELEASE(host_reg);
-uint32_t ropINCDEC(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ codegen_flags_changed = 1;
+ return op_pc + 1;
+}
+static uint32_t ropADD_AX_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_W(REG_AX);
+
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ ADD_HOST_REG_IMM_W(host_reg, fetchdat & 0xffff);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, fetchdat & 0xffff);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ADD16);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, host_reg);
+ STORE_REG_W_RELEASE(host_reg);
+
+ codegen_flags_changed = 1;
+ return op_pc + 2;
+}
+static uint32_t ropADD_EAX_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_L(REG_EAX);
+
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op1, host_reg);
+ fetchdat = fastreadl(cs + op_pc);
+ ADD_HOST_REG_IMM(host_reg, fetchdat);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, fetchdat);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ADD32);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, host_reg);
+ STORE_REG_L_RELEASE(host_reg);
+
+ codegen_flags_changed = 1;
+ return op_pc + 4;
+}
+
+static uint32_t ropCMP_AL_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_B(REG_AL);
+
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ host_reg = CMP_HOST_REG_IMM_B(host_reg, fetchdat & 0xff);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, fetchdat & 0xff);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB8);
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_res, host_reg);
+ RELEASE_REG(host_reg);
+
+ codegen_flags_changed = 1;
+ return op_pc + 1;
+}
+static uint32_t ropCMP_AX_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_W(REG_AX);
+
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ host_reg = CMP_HOST_REG_IMM_W(host_reg, fetchdat & 0xffff);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, fetchdat & 0xffff);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB16);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, host_reg);
+ RELEASE_REG(host_reg);
+
+ codegen_flags_changed = 1;
+ return op_pc + 2;
+}
+static uint32_t ropCMP_EAX_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_L(REG_EAX);
+
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op1, host_reg);
+ fetchdat = fastreadl(cs + op_pc);
+ host_reg = CMP_HOST_REG_IMM_L(host_reg, fetchdat);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, fetchdat);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB32);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, host_reg);
+ RELEASE_REG(host_reg);
+
+ codegen_flags_changed = 1;
+ return op_pc + 4;
+}
+
+static uint32_t ropSUB_AL_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_B(REG_AL);
+
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ SUB_HOST_REG_IMM_B(host_reg, fetchdat & 0xff);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, fetchdat & 0xff);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB8);
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_res, host_reg);
+ STORE_REG_B_RELEASE(host_reg);
+
+ codegen_flags_changed = 1;
+ return op_pc + 1;
+}
+static uint32_t ropSUB_AX_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_W(REG_AX);
+
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ SUB_HOST_REG_IMM_W(host_reg, fetchdat & 0xffff);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, fetchdat & 0xffff);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB16);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, host_reg);
+ STORE_REG_W_RELEASE(host_reg);
+
+ codegen_flags_changed = 1;
+ return op_pc + 2;
+}
+static uint32_t ropSUB_EAX_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_L(REG_EAX);
+
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op1, host_reg);
+ fetchdat = fastreadl(cs + op_pc);
+ SUB_HOST_REG_IMM(host_reg, fetchdat);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, fetchdat);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB32);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, host_reg);
+ STORE_REG_L_RELEASE(host_reg);
+
+ codegen_flags_changed = 1;
+ return op_pc + 4;
+}
+
+static uint32_t rop80(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg;
+ uint32_t imm;
+ x86seg *target_seg = NULL;
+
+ if ((fetchdat & 0x30) == 0x10)
+ return 0;
+
+ if ((fetchdat & 0xc0) != 0xc0)
+ {
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ if ((fetchdat & 0x38) == 0x38)
+ {
+ MEM_LOAD_ADDR_EA_B(target_seg);
+ host_reg = 0;
+ }
+ else
+ {
+ SAVE_EA();
+ MEM_CHECK_WRITE(target_seg);
+ host_reg = MEM_LOAD_ADDR_EA_B_NO_ABRT(target_seg);
+ }
+ imm = fastreadb(cs + op_pc + 1);
+ }
+ else
+ {
+ host_reg = LOAD_REG_B(fetchdat & 7);
+ imm = (fetchdat >> 8) & 0xff;
+ }
+
+ switch (fetchdat & 0x38)
+ {
+ case 0x00: /*ADD*/
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ ADD_HOST_REG_IMM_B(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ADD8);
+ break;
+ case 0x08: /*OR*/
+ OR_HOST_REG_IMM(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN8);
+ break;
+ case 0x20: /*AND*/
+ AND_HOST_REG_IMM(host_reg, imm | 0xffffff00);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN8);
+ break;
+ case 0x28: /*SUB*/
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ SUB_HOST_REG_IMM_B(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB8);
+ break;
+ case 0x30: /*XOR*/
+ XOR_HOST_REG_IMM(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN8);
+ break;
+ case 0x38: /*CMP*/
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ host_reg = CMP_HOST_REG_IMM_B(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB8);
+ break;
+ }
+
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_res, host_reg);
+ if ((fetchdat & 0x38) != 0x38)
+ {
+ if ((fetchdat & 0xc0) != 0xc0)
+ {
+ LOAD_EA();
+ MEM_STORE_ADDR_EA_B_NO_ABRT(target_seg, host_reg);
+ }
+ else
+ {
+ STORE_REG_B_RELEASE(host_reg);
+ }
+ }
+ else
+ RELEASE_REG(host_reg);
+
+ codegen_flags_changed = 1;
+ return op_pc + 2;
+}
+
+static uint32_t rop81_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg;
+ uint32_t imm;
+ x86seg *target_seg = NULL;
+
+ if ((fetchdat & 0x30) == 0x10)
+ return 0;
+
+ if ((fetchdat & 0xc0) != 0xc0)
+ {
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ if ((fetchdat & 0x38) == 0x38)
+ {
+ MEM_LOAD_ADDR_EA_W(target_seg);
+ host_reg = 0;
+ }
+ else
+ {
+ SAVE_EA();
+ MEM_CHECK_WRITE_W(target_seg);
+ host_reg = MEM_LOAD_ADDR_EA_W_NO_ABRT(target_seg);
+ }
+ imm = fastreadw(cs + op_pc + 1);
+ }
+ else
+ {
+ host_reg = LOAD_REG_W(fetchdat & 7);
+ imm = (fetchdat >> 8) & 0xffff;
+ }
+
+ switch (fetchdat & 0x38)
+ {
+ case 0x00: /*ADD*/
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ ADD_HOST_REG_IMM_W(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ADD16);
+ break;
+ case 0x08: /*OR*/
+ OR_HOST_REG_IMM(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN16);
+ break;
+ case 0x20: /*AND*/
+ AND_HOST_REG_IMM(host_reg, imm | 0xffff0000);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN16);
+ break;
+ case 0x28: /*SUB*/
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ SUB_HOST_REG_IMM_W(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB16);
+ break;
+ case 0x30: /*XOR*/
+ XOR_HOST_REG_IMM(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN16);
+ break;
+ case 0x38: /*CMP*/
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ host_reg = CMP_HOST_REG_IMM_W(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB16);
+ break;
+ }
+
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, host_reg);
+ if ((fetchdat & 0x38) != 0x38)
+ {
+ if ((fetchdat & 0xc0) != 0xc0)
+ {
+ LOAD_EA();
+ MEM_STORE_ADDR_EA_W_NO_ABRT(target_seg, host_reg);
+ }
+ else
+ {
+ STORE_REG_W_RELEASE(host_reg);
+ }
+ }
+ else
+ RELEASE_REG(host_reg);
+
+ codegen_flags_changed = 1;
+ return op_pc + 3;
+}
+static uint32_t rop81_l(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg;
+ uint32_t imm;
+ x86seg *target_seg = NULL;
+
+ if ((fetchdat & 0x30) == 0x10)
+ return 0;
+
+ if ((fetchdat & 0xc0) != 0xc0)
+ {
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ if ((fetchdat & 0x38) == 0x38)
+ {
+ MEM_LOAD_ADDR_EA_L(target_seg);
+ host_reg = 0;
+ }
+ else
+ {
+ SAVE_EA();
+ MEM_CHECK_WRITE(target_seg);
+ host_reg = MEM_LOAD_ADDR_EA_L_NO_ABRT(target_seg);
+ }
+ }
+ else
+ {
+ host_reg = LOAD_REG_L(fetchdat & 7);
+ }
+ imm = fastreadl(cs + op_pc + 1);
+
+ switch (fetchdat & 0x38)
+ {
+ case 0x00: /*ADD*/
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op1, host_reg);
+ ADD_HOST_REG_IMM(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ADD32);
+ break;
+ case 0x08: /*OR*/
+ OR_HOST_REG_IMM(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN32);
+ break;
+ case 0x20: /*AND*/
+ AND_HOST_REG_IMM(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN32);
+ break;
+ case 0x28: /*SUB*/
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op1, host_reg);
+ SUB_HOST_REG_IMM(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB32);
+ break;
+ case 0x30: /*XOR*/
+ XOR_HOST_REG_IMM(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN32);
+ break;
+ case 0x38: /*CMP*/
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op1, host_reg);
+ host_reg = CMP_HOST_REG_IMM_L(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB32);
+ break;
+ }
+
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, host_reg);
+ if ((fetchdat & 0x38) != 0x38)
+ {
+ if ((fetchdat & 0xc0) != 0xc0)
+ {
+ LOAD_EA();
+ MEM_STORE_ADDR_EA_L_NO_ABRT(target_seg, host_reg);
+ }
+ else
+ {
+ STORE_REG_L_RELEASE(host_reg);
+ }
+ }
+ else
+ RELEASE_REG(host_reg);
+
+ codegen_flags_changed = 1;
+ return op_pc + 5;
+}
+
+static uint32_t rop83_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg;
+ uint32_t imm;
+ x86seg *target_seg = NULL;
+
+ if ((fetchdat & 0x30) == 0x10)
+ return 0;
+
+ if ((fetchdat & 0xc0) != 0xc0)
+ {
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ if ((fetchdat & 0x38) == 0x38)
+ {
+ MEM_LOAD_ADDR_EA_W(target_seg);
+ host_reg = 0;
+ }
+ else
+ {
+ SAVE_EA();
+ MEM_CHECK_WRITE_W(target_seg);
+ host_reg = MEM_LOAD_ADDR_EA_W_NO_ABRT(target_seg);
+ }
+ imm = fastreadb(cs + op_pc + 1);
+ }
+ else
+ {
+ host_reg = LOAD_REG_W(fetchdat & 7);
+ imm = (fetchdat >> 8) & 0xff;
+ }
+
+ if (imm & 0x80)
+ imm |= 0xff80;
+
+ switch (fetchdat & 0x38)
+ {
+ case 0x00: /*ADD*/
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ ADD_HOST_REG_IMM_W(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ADD16);
+ break;
+ case 0x08: /*OR*/
+ OR_HOST_REG_IMM(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN16);
+ break;
+ case 0x20: /*AND*/
+ AND_HOST_REG_IMM(host_reg, imm | 0xffff0000);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN16);
+ break;
+ case 0x28: /*SUB*/
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ SUB_HOST_REG_IMM_W(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB16);
+ break;
+ case 0x30: /*XOR*/
+ XOR_HOST_REG_IMM(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN16);
+ break;
+ case 0x38: /*CMP*/
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ host_reg = CMP_HOST_REG_IMM_W(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB16);
+ break;
+ }
+
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, host_reg);
+ if ((fetchdat & 0x38) != 0x38)
+ {
+ if ((fetchdat & 0xc0) != 0xc0)
+ {
+ LOAD_EA();
+ MEM_STORE_ADDR_EA_W_NO_ABRT(target_seg, host_reg);
+ }
+ else
+ {
+ STORE_REG_W_RELEASE(host_reg);
+ }
+ }
+ else
+ RELEASE_REG(host_reg);
+
+ codegen_flags_changed = 1;
+ return op_pc + 2;
+}
+static uint32_t rop83_l(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg;
+ uint32_t imm;
+ x86seg *target_seg = NULL;
+
+ if ((fetchdat & 0x30) == 0x10)
+ return 0;
+
+ if ((fetchdat & 0xc0) != 0xc0)
+ {
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ if ((fetchdat & 0x38) == 0x38)
+ {
+ MEM_LOAD_ADDR_EA_L(target_seg);
+ host_reg = 0;
+ }
+ else
+ {
+ SAVE_EA();
+ MEM_CHECK_WRITE_L(target_seg);
+ host_reg = MEM_LOAD_ADDR_EA_L_NO_ABRT(target_seg);
+ }
+ imm = fastreadb(cs + op_pc + 1);
+ }
+ else
+ {
+ host_reg = LOAD_REG_L(fetchdat & 7);
+ imm = (fetchdat >> 8) & 0xff;
+ }
+
+ if (imm & 0x80)
+ imm |= 0xffffff80;
+
+ switch (fetchdat & 0x38)
+ {
+ case 0x00: /*ADD*/
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op1, host_reg);
+ ADD_HOST_REG_IMM(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ADD32);
+ break;
+ case 0x08: /*OR*/
+ OR_HOST_REG_IMM(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN32);
+ break;
+ case 0x20: /*AND*/
+ AND_HOST_REG_IMM(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN32);
+ break;
+ case 0x28: /*SUB*/
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op1, host_reg);
+ SUB_HOST_REG_IMM(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB32);
+ break;
+ case 0x30: /*XOR*/
+ XOR_HOST_REG_IMM(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN32);
+ break;
+ case 0x38: /*CMP*/
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op1, host_reg);
+ host_reg = CMP_HOST_REG_IMM_L(host_reg, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, imm);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB32);
+ break;
+ }
+
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, host_reg);
+ if ((fetchdat & 0x38) != 0x38)
+ {
+ if ((fetchdat & 0xc0) != 0xc0)
+ {
+ LOAD_EA();
+ MEM_STORE_ADDR_EA_L_NO_ABRT(target_seg, host_reg);
+ }
+ else
+ {
+ STORE_REG_L_RELEASE(host_reg);
+ }
+ }
+ else
+ RELEASE_REG(host_reg);
+
+ codegen_flags_changed = 1;
+ return op_pc + 2;
+}
diff --git a/src/codegen_ops_branch.c b/src/codegen_ops_branch.c
deleted file mode 100644
index ea9b986..0000000
--- a/src/codegen_ops_branch.c
+++ /dev/null
@@ -1,1011 +0,0 @@
-#include "ibm.h"
-
-#include "x86.h"
-#include "386_common.h"
-#include "x86_flags.h"
-#include "codegen.h"
-#include "codegen_backend.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_helpers.h"
-#include "codegen_ops_mov.h"
-
-static int NF_SET_01()
-{
- return NF_SET() ? 1 : 0;
-}
-static int VF_SET_01()
-{
- return VF_SET() ? 1 : 0;
-}
-
-static int ropJO_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
-{
- int jump_uop;
-
- switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN)
- {
- case FLAGS_ZN8: case FLAGS_ZN16: case FLAGS_ZN32:
- /*Overflow is always zero*/
- return 0;
-
- case FLAGS_SUB8: case FLAGS_DEC8:
- jump_uop = uop_CMP_JNO_DEST(ir, IREG_flags_op1_B, IREG_flags_op2_B);
- break;
-
- case FLAGS_SUB16: case FLAGS_DEC16:
- jump_uop = uop_CMP_JNO_DEST(ir, IREG_flags_op1_W, IREG_flags_op2_W);
- break;
-
- case FLAGS_SUB32: case FLAGS_DEC32:
- jump_uop = uop_CMP_JNO_DEST(ir, IREG_flags_op1, IREG_flags_op2);
- break;
-
- case FLAGS_UNKNOWN:
- default:
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, VF_SET);
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_temp0, 0);
- break;
- }
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- return 0;
-}
-static int ropJNO_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
-{
- int jump_uop;
-
- switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN)
- {
- case FLAGS_ZN8: case FLAGS_ZN16: case FLAGS_ZN32:
- /*Overflow is always zero*/
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- return 0;
-
- case FLAGS_SUB8: case FLAGS_DEC8:
- jump_uop = uop_CMP_JO_DEST(ir, IREG_flags_op1_B, IREG_flags_op2_B);
- break;
-
- case FLAGS_SUB16: case FLAGS_DEC16:
- jump_uop = uop_CMP_JO_DEST(ir, IREG_flags_op1_W, IREG_flags_op2_W);
- break;
-
- case FLAGS_SUB32: case FLAGS_DEC32:
- jump_uop = uop_CMP_JO_DEST(ir, IREG_flags_op1, IREG_flags_op2);
- break;
-
- case FLAGS_UNKNOWN:
- default:
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, VF_SET);
- jump_uop = uop_CMP_IMM_JNZ_DEST(ir, IREG_temp0, 0);
- break;
- }
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- return 0;
-}
-
-static int ropJB_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
-{
- int jump_uop;
- int do_unroll = (CF_SET() && codegen_can_unroll(block, ir, next_pc, dest_addr));
-
- switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN)
- {
- case FLAGS_ZN8: case FLAGS_ZN16: case FLAGS_ZN32:
- /*Carry is always zero*/
- return 0;
-
- case FLAGS_SUB8:
- if (do_unroll)
- jump_uop = uop_CMP_JB_DEST(ir, IREG_flags_op1_B, IREG_flags_op2_B);
- else
- jump_uop = uop_CMP_JNB_DEST(ir, IREG_flags_op1_B, IREG_flags_op2_B);
- break;
-
- case FLAGS_SUB16:
- if (do_unroll)
- jump_uop = uop_CMP_JB_DEST(ir, IREG_flags_op1_W, IREG_flags_op2_W);
- else
- jump_uop = uop_CMP_JNB_DEST(ir, IREG_flags_op1_W, IREG_flags_op2_W);
- break;
-
- case FLAGS_SUB32:
- if (do_unroll)
- jump_uop = uop_CMP_JB_DEST(ir, IREG_flags_op1, IREG_flags_op2);
- else
- jump_uop = uop_CMP_JNB_DEST(ir, IREG_flags_op1, IREG_flags_op2);
- break;
-
- case FLAGS_UNKNOWN:
- default:
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, CF_SET);
- if (do_unroll)
- jump_uop = uop_CMP_IMM_JNZ_DEST(ir, IREG_temp0, 0);
- else
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_temp0, 0);
- break;
- }
- uop_MOV_IMM(ir, IREG_pc, do_unroll ? next_pc : dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- return do_unroll ? 1 : 0;
-}
-static int ropJNB_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
-{
- int jump_uop;
- int do_unroll = (!CF_SET() && codegen_can_unroll(block, ir, next_pc, dest_addr));
-
- switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN)
- {
- case FLAGS_ZN8: case FLAGS_ZN16: case FLAGS_ZN32:
- /*Carry is always zero*/
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- return 0;
-
- case FLAGS_SUB8:
- if (do_unroll)
- jump_uop = uop_CMP_JNB_DEST(ir, IREG_flags_op1_B, IREG_flags_op2_B);
- else
- jump_uop = uop_CMP_JB_DEST(ir, IREG_flags_op1_B, IREG_flags_op2_B);
- break;
-
- case FLAGS_SUB16:
- if (do_unroll)
- jump_uop = uop_CMP_JNB_DEST(ir, IREG_flags_op1_W, IREG_flags_op2_W);
- else
- jump_uop = uop_CMP_JB_DEST(ir, IREG_flags_op1_W, IREG_flags_op2_W);
- break;
-
- case FLAGS_SUB32:
- if (do_unroll)
- jump_uop = uop_CMP_JNB_DEST(ir, IREG_flags_op1, IREG_flags_op2);
- else
- jump_uop = uop_CMP_JB_DEST(ir, IREG_flags_op1, IREG_flags_op2);
- break;
-
- case FLAGS_UNKNOWN:
- default:
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, CF_SET);
- if (do_unroll)
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_temp0, 0);
- else
- jump_uop = uop_CMP_IMM_JNZ_DEST(ir, IREG_temp0, 0);
- break;
- }
- uop_MOV_IMM(ir, IREG_pc, do_unroll ? next_pc : dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- return do_unroll ? 1 : 0;
-}
-
-static int ropJE_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
-{
- int jump_uop;
-
- if (ZF_SET() && codegen_can_unroll(block, ir, next_pc, dest_addr))
- {
- if (!codegen_flags_changed || !flags_res_valid())
- {
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, ZF_SET);
- jump_uop = uop_CMP_IMM_JNZ_DEST(ir, IREG_temp0, 0);
- }
- else
- {
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_flags_res, 0);
- }
- uop_MOV_IMM(ir, IREG_pc, next_pc);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- return 1;
- }
- else
- {
- if (!codegen_flags_changed || !flags_res_valid())
- {
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, ZF_SET);
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_temp0, 0);
- }
- else
- {
- jump_uop = uop_CMP_IMM_JNZ_DEST(ir, IREG_flags_res, 0);
- }
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- }
- return 0;
-}
-int ropJNE_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
-{
- int jump_uop;
-
- if (!ZF_SET() && codegen_can_unroll(block, ir, next_pc, dest_addr))
- {
- if (!codegen_flags_changed || !flags_res_valid())
- {
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, ZF_SET);
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_temp0, 0);
- }
- else
- {
- jump_uop = uop_CMP_IMM_JNZ_DEST(ir, IREG_flags_res, 0);
- }
- uop_MOV_IMM(ir, IREG_pc, next_pc);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- return 1;
- }
- else
- {
- if (!codegen_flags_changed || !flags_res_valid())
- {
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, ZF_SET);
- jump_uop = uop_CMP_IMM_JNZ_DEST(ir, IREG_temp0, 0);
- }
- else
- {
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_flags_res, 0);
- }
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- }
- return 0;
-}
-
-static int ropJBE_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
-{
- int jump_uop, jump_uop2 = -1;
- int do_unroll = ((CF_SET() || ZF_SET()) && codegen_can_unroll(block, ir, next_pc, dest_addr));
-
- switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN)
- {
- case FLAGS_ZN8: case FLAGS_ZN16: case FLAGS_ZN32:
- /*Carry is always zero, so test zero only*/
- if (do_unroll)
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_flags_res, 0);
- else
- jump_uop = uop_CMP_IMM_JNZ_DEST(ir, IREG_flags_res, 0);
- break;
-
- case FLAGS_SUB8:
- if (do_unroll)
- jump_uop = uop_CMP_JBE_DEST(ir, IREG_flags_op1_B, IREG_flags_op2_B);
- else
- jump_uop = uop_CMP_JNBE_DEST(ir, IREG_flags_op1_B, IREG_flags_op2_B);
- break;
- case FLAGS_SUB16:
- if (do_unroll)
- jump_uop = uop_CMP_JBE_DEST(ir, IREG_flags_op1_W, IREG_flags_op2_W);
- else
- jump_uop = uop_CMP_JNBE_DEST(ir, IREG_flags_op1_W, IREG_flags_op2_W);
- break;
- case FLAGS_SUB32:
- if (do_unroll)
- jump_uop = uop_CMP_JBE_DEST(ir, IREG_flags_op1, IREG_flags_op2);
- else
- jump_uop = uop_CMP_JNBE_DEST(ir, IREG_flags_op1, IREG_flags_op2);
- break;
-
- case FLAGS_UNKNOWN:
- default:
- if (do_unroll)
- {
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, CF_SET);
- jump_uop2 = uop_CMP_IMM_JNZ_DEST(ir, IREG_temp0, 0);
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, ZF_SET);
- jump_uop = uop_CMP_IMM_JNZ_DEST(ir, IREG_temp0, 0);
- }
- else
- {
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, CF_SET);
- jump_uop2 = uop_CMP_IMM_JNZ_DEST(ir, IREG_temp0, 0);
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, ZF_SET);
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_temp0, 0);
- }
- break;
- }
- if (do_unroll)
- {
- uop_MOV_IMM(ir, IREG_pc, next_pc);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- if (jump_uop2 != -1)
- uop_set_jump_dest(ir, jump_uop2);
- return 1;
- }
- else
- {
- if (jump_uop2 != -1)
- uop_set_jump_dest(ir, jump_uop2);
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- return 0;
- }
-}
-static int ropJNBE_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
-{
- int jump_uop, jump_uop2 = -1;
- int do_unroll = ((!CF_SET() && !ZF_SET()) && codegen_can_unroll(block, ir, next_pc, dest_addr));
-
- switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN)
- {
- case FLAGS_ZN8: case FLAGS_ZN16: case FLAGS_ZN32:
- /*Carry is always zero, so test zero only*/
- if (do_unroll)
- jump_uop = uop_CMP_IMM_JNZ_DEST(ir, IREG_flags_res, 0);
- else
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_flags_res, 0);
- break;
-
- case FLAGS_SUB8:
- if (do_unroll)
- jump_uop = uop_CMP_JNBE_DEST(ir, IREG_flags_op1_B, IREG_flags_op2_B);
- else
- jump_uop = uop_CMP_JBE_DEST(ir, IREG_flags_op1_B, IREG_flags_op2_B);
- break;
- case FLAGS_SUB16:
- if (do_unroll)
- jump_uop = uop_CMP_JNBE_DEST(ir, IREG_flags_op1_W, IREG_flags_op2_W);
- else
- jump_uop = uop_CMP_JBE_DEST(ir, IREG_flags_op1_W, IREG_flags_op2_W);
- break;
- case FLAGS_SUB32:
- if (do_unroll)
- jump_uop = uop_CMP_JNBE_DEST(ir, IREG_flags_op1, IREG_flags_op2);
- else
- jump_uop = uop_CMP_JBE_DEST(ir, IREG_flags_op1, IREG_flags_op2);
- break;
-
- case FLAGS_UNKNOWN:
- default:
- if (do_unroll)
- {
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, CF_SET);
- jump_uop2 = uop_CMP_IMM_JNZ_DEST(ir, IREG_temp0, 0);
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, ZF_SET);
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_temp0, 0);
- }
- else
- {
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, CF_SET);
- jump_uop = uop_CMP_IMM_JNZ_DEST(ir, IREG_temp0, 0);
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, ZF_SET);
- jump_uop2 = uop_CMP_IMM_JNZ_DEST(ir, IREG_temp0, 0);
- }
- break;
- }
- if (do_unroll)
- {
- if (jump_uop2 != -1)
- uop_set_jump_dest(ir, jump_uop2);
- uop_MOV_IMM(ir, IREG_pc, next_pc);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- return 1;
- }
- else
- {
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- if (jump_uop2 != -1)
- uop_set_jump_dest(ir, jump_uop2);
- return 0;
- }
-}
-
-static int ropJS_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
-{
- int jump_uop;
- int do_unroll = (NF_SET() && codegen_can_unroll(block, ir, next_pc, dest_addr));
-
- switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN)
- {
- case FLAGS_ZN8:
- case FLAGS_ADD8:
- case FLAGS_SUB8:
- case FLAGS_SHL8:
- case FLAGS_SHR8:
- case FLAGS_SAR8:
- case FLAGS_INC8:
- case FLAGS_DEC8:
- if (do_unroll)
- jump_uop = uop_TEST_JS_DEST(ir, IREG_flags_res_B);
- else
- jump_uop = uop_TEST_JNS_DEST(ir, IREG_flags_res_B);
- break;
-
- case FLAGS_ZN16:
- case FLAGS_ADD16:
- case FLAGS_SUB16:
- case FLAGS_SHL16:
- case FLAGS_SHR16:
- case FLAGS_SAR16:
- case FLAGS_INC16:
- case FLAGS_DEC16:
- if (do_unroll)
- jump_uop = uop_TEST_JS_DEST(ir, IREG_flags_res_W);
- else
- jump_uop = uop_TEST_JNS_DEST(ir, IREG_flags_res_W);
- break;
-
- case FLAGS_ZN32:
- case FLAGS_ADD32:
- case FLAGS_SUB32:
- case FLAGS_SHL32:
- case FLAGS_SHR32:
- case FLAGS_SAR32:
- case FLAGS_INC32:
- case FLAGS_DEC32:
- if (do_unroll)
- jump_uop = uop_TEST_JS_DEST(ir, IREG_flags_res);
- else
- jump_uop = uop_TEST_JNS_DEST(ir, IREG_flags_res);
- break;
-
- case FLAGS_UNKNOWN:
- default:
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, NF_SET);
- if (do_unroll)
- jump_uop = uop_CMP_IMM_JNZ_DEST(ir, IREG_temp0, 0);
- else
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_temp0, 0);
- break;
- }
- uop_MOV_IMM(ir, IREG_pc, do_unroll ? next_pc : dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- return do_unroll ? 1 : 0;
-}
-static int ropJNS_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
-{
- int jump_uop;
- int do_unroll = (!NF_SET() && codegen_can_unroll(block, ir, next_pc, dest_addr));
-
- switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN)
- {
- case FLAGS_ZN8:
- case FLAGS_ADD8:
- case FLAGS_SUB8:
- case FLAGS_SHL8:
- case FLAGS_SHR8:
- case FLAGS_SAR8:
- case FLAGS_INC8:
- case FLAGS_DEC8:
- if (do_unroll)
- jump_uop = uop_TEST_JNS_DEST(ir, IREG_flags_res_B);
- else
- jump_uop = uop_TEST_JS_DEST(ir, IREG_flags_res_B);
- break;
-
- case FLAGS_ZN16:
- case FLAGS_ADD16:
- case FLAGS_SUB16:
- case FLAGS_SHL16:
- case FLAGS_SHR16:
- case FLAGS_SAR16:
- case FLAGS_INC16:
- case FLAGS_DEC16:
- if (do_unroll)
- jump_uop = uop_TEST_JNS_DEST(ir, IREG_flags_res_W);
- else
- jump_uop = uop_TEST_JS_DEST(ir, IREG_flags_res_W);
- break;
-
- case FLAGS_ZN32:
- case FLAGS_ADD32:
- case FLAGS_SUB32:
- case FLAGS_SHL32:
- case FLAGS_SHR32:
- case FLAGS_SAR32:
- case FLAGS_INC32:
- case FLAGS_DEC32:
- if (do_unroll)
- jump_uop = uop_TEST_JNS_DEST(ir, IREG_flags_res);
- else
- jump_uop = uop_TEST_JS_DEST(ir, IREG_flags_res);
- break;
-
- case FLAGS_UNKNOWN:
- default:
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, NF_SET);
- if (do_unroll)
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_temp0, 0);
- else
- jump_uop = uop_CMP_IMM_JNZ_DEST(ir, IREG_temp0, 0);
- break;
- }
- uop_MOV_IMM(ir, IREG_pc, do_unroll ? next_pc : dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- return do_unroll ? 1 : 0;
-}
-
-static int ropJP_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
-{
- int jump_uop;
-
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, PF_SET);
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_temp0, 0);
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- return 0;
-}
-static int ropJNP_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
-{
- int jump_uop;
-
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, PF_SET);
- jump_uop = uop_CMP_IMM_JNZ_DEST(ir, IREG_temp0, 0);
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- return 0;
-}
-
-static int ropJL_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
-{
- int jump_uop;
- int do_unroll = ((NF_SET() ? 1 : 0) != (VF_SET() ? 1 : 0) && codegen_can_unroll(block, ir, next_pc, dest_addr));
-
- switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN)
- {
- case FLAGS_ZN8:
- /*V flag is always clear. Condition is true if N is set*/
- if (do_unroll)
- jump_uop = uop_TEST_JS_DEST(ir, IREG_flags_res_B);
- else
- jump_uop = uop_TEST_JNS_DEST(ir, IREG_flags_res_B);
- break;
- case FLAGS_ZN16:
- if (do_unroll)
- jump_uop = uop_TEST_JS_DEST(ir, IREG_flags_res_W);
- else
- jump_uop = uop_TEST_JNS_DEST(ir, IREG_flags_res_W);
- break;
- case FLAGS_ZN32:
- if (do_unroll)
- jump_uop = uop_TEST_JS_DEST(ir, IREG_flags_res);
- else
- jump_uop = uop_TEST_JNS_DEST(ir, IREG_flags_res);
- break;
-
- case FLAGS_SUB8: case FLAGS_DEC8:
- if (do_unroll)
- jump_uop = uop_CMP_JL_DEST(ir, IREG_flags_op1_B, IREG_flags_op2_B);
- else
- jump_uop = uop_CMP_JNL_DEST(ir, IREG_flags_op1_B, IREG_flags_op2_B);
- break;
- case FLAGS_SUB16: case FLAGS_DEC16:
- if (do_unroll)
- jump_uop = uop_CMP_JL_DEST(ir, IREG_flags_op1_W, IREG_flags_op2_W);
- else
- jump_uop = uop_CMP_JNL_DEST(ir, IREG_flags_op1_W, IREG_flags_op2_W);
- break;
- case FLAGS_SUB32: case FLAGS_DEC32:
- if (do_unroll)
- jump_uop = uop_CMP_JL_DEST(ir, IREG_flags_op1, IREG_flags_op2);
- else
- jump_uop = uop_CMP_JNL_DEST(ir, IREG_flags_op1, IREG_flags_op2);
- break;
-
- case FLAGS_UNKNOWN:
- default:
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, NF_SET_01);
- uop_CALL_FUNC_RESULT(ir, IREG_temp1, VF_SET_01);
- if (do_unroll)
- jump_uop = uop_CMP_JNZ_DEST(ir, IREG_temp0, IREG_temp1);
- else
- jump_uop = uop_CMP_JZ_DEST(ir, IREG_temp0, IREG_temp1);
- break;
- }
- if (do_unroll)
- uop_MOV_IMM(ir, IREG_pc, next_pc);
- else
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- return do_unroll ? 1 : 0;
-}
-static int ropJNL_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
-{
- int jump_uop;
- int do_unroll = ((NF_SET() ? 1 : 0) == (VF_SET() ? 1 : 0) && codegen_can_unroll(block, ir, next_pc, dest_addr));
-
- switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN)
- {
- case FLAGS_ZN8:
- /*V flag is always clear. Condition is true if N is set*/
- if (do_unroll)
- jump_uop = uop_TEST_JNS_DEST(ir, IREG_flags_res_B);
- else
- jump_uop = uop_TEST_JS_DEST(ir, IREG_flags_res_B);
- break;
- case FLAGS_ZN16:
- if (do_unroll)
- jump_uop = uop_TEST_JNS_DEST(ir, IREG_flags_res_W);
- else
- jump_uop = uop_TEST_JS_DEST(ir, IREG_flags_res_W);
- break;
- case FLAGS_ZN32:
- if (do_unroll)
- jump_uop = uop_TEST_JNS_DEST(ir, IREG_flags_res);
- else
- jump_uop = uop_TEST_JS_DEST(ir, IREG_flags_res);
- break;
-
- case FLAGS_SUB8: case FLAGS_DEC8:
- if (do_unroll)
- jump_uop = uop_CMP_JNL_DEST(ir, IREG_flags_op1_B, IREG_flags_op2_B);
- else
- jump_uop = uop_CMP_JL_DEST(ir, IREG_flags_op1_B, IREG_flags_op2_B);
- break;
- case FLAGS_SUB16: case FLAGS_DEC16:
- if (do_unroll)
- jump_uop = uop_CMP_JNL_DEST(ir, IREG_flags_op1_W, IREG_flags_op2_W);
- else
- jump_uop = uop_CMP_JL_DEST(ir, IREG_flags_op1_W, IREG_flags_op2_W);
- break;
- case FLAGS_SUB32: case FLAGS_DEC32:
- if (do_unroll)
- jump_uop = uop_CMP_JNL_DEST(ir, IREG_flags_op1, IREG_flags_op2);
- else
- jump_uop = uop_CMP_JL_DEST(ir, IREG_flags_op1, IREG_flags_op2);
- break;
-
- case FLAGS_UNKNOWN:
- default:
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, NF_SET_01);
- uop_CALL_FUNC_RESULT(ir, IREG_temp1, VF_SET_01);
- if (do_unroll)
- jump_uop = uop_CMP_JZ_DEST(ir, IREG_temp0, IREG_temp1);
- else
- jump_uop = uop_CMP_JNZ_DEST(ir, IREG_temp0, IREG_temp1);
- break;
- }
- if (do_unroll)
- uop_MOV_IMM(ir, IREG_pc, next_pc);
- else
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- return do_unroll ? 1 : 0;
-}
-
-static int ropJLE_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
-{
- int jump_uop, jump_uop2 = -1;
- int do_unroll = (((NF_SET() ? 1 : 0) != (VF_SET() ? 1 : 0) || ZF_SET()) && codegen_can_unroll(block, ir, next_pc, dest_addr));
-
- switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN)
- {
- case FLAGS_SUB8: case FLAGS_DEC8:
- if (do_unroll)
- jump_uop = uop_CMP_JLE_DEST(ir, IREG_flags_op1_B, IREG_flags_op2_B);
- else
- jump_uop = uop_CMP_JNLE_DEST(ir, IREG_flags_op1_B, IREG_flags_op2_B);
- break;
- case FLAGS_SUB16: case FLAGS_DEC16:
- if (do_unroll)
- jump_uop = uop_CMP_JLE_DEST(ir, IREG_flags_op1_W, IREG_flags_op2_W);
- else
- jump_uop = uop_CMP_JNLE_DEST(ir, IREG_flags_op1_W, IREG_flags_op2_W);
- break;
- case FLAGS_SUB32: case FLAGS_DEC32:
- if (do_unroll)
- jump_uop = uop_CMP_JLE_DEST(ir, IREG_flags_op1, IREG_flags_op2);
- else
- jump_uop = uop_CMP_JNLE_DEST(ir, IREG_flags_op1, IREG_flags_op2);
- break;
-
- case FLAGS_UNKNOWN:
- default:
- if (do_unroll)
- {
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, ZF_SET);
- jump_uop2 = uop_CMP_IMM_JNZ_DEST(ir, IREG_temp0, 0);
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, NF_SET_01);
- uop_CALL_FUNC_RESULT(ir, IREG_temp1, VF_SET_01);
- jump_uop = uop_CMP_JNZ_DEST(ir, IREG_temp0, IREG_temp1);
- }
- else
- {
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, ZF_SET);
- jump_uop2 = uop_CMP_IMM_JNZ_DEST(ir, IREG_temp0, 0);
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, NF_SET_01);
- uop_CALL_FUNC_RESULT(ir, IREG_temp1, VF_SET_01);
- jump_uop = uop_CMP_JZ_DEST(ir, IREG_temp0, IREG_temp1);
- }
- break;
- }
- if (do_unroll)
- {
- uop_MOV_IMM(ir, IREG_pc, next_pc);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- if (jump_uop2 != -1)
- uop_set_jump_dest(ir, jump_uop2);
- return 1;
- }
- else
- {
- if (jump_uop2 != -1)
- uop_set_jump_dest(ir, jump_uop2);
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- return 0;
- }
-}
-static int ropJNLE_common(codeblock_t *block, ir_data_t *ir, uint32_t dest_addr, uint32_t next_pc)
-{
- int jump_uop, jump_uop2 = -1;
- int do_unroll = ((NF_SET() ? 1 : 0) == (VF_SET() ? 1 : 0) && !ZF_SET() && codegen_can_unroll(block, ir, next_pc, dest_addr));
-
- switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN)
- {
- case FLAGS_SUB8: case FLAGS_DEC8:
- if (do_unroll)
- jump_uop = uop_CMP_JNLE_DEST(ir, IREG_flags_op1_B, IREG_flags_op2_B);
- else
- jump_uop = uop_CMP_JLE_DEST(ir, IREG_flags_op1_B, IREG_flags_op2_B);
- break;
- case FLAGS_SUB16: case FLAGS_DEC16:
- if (do_unroll)
- jump_uop = uop_CMP_JNLE_DEST(ir, IREG_flags_op1_W, IREG_flags_op2_W);
- else
- jump_uop = uop_CMP_JLE_DEST(ir, IREG_flags_op1_W, IREG_flags_op2_W);
- break;
- case FLAGS_SUB32: case FLAGS_DEC32:
- if (do_unroll)
- jump_uop = uop_CMP_JNLE_DEST(ir, IREG_flags_op1, IREG_flags_op2);
- else
- jump_uop = uop_CMP_JLE_DEST(ir, IREG_flags_op1, IREG_flags_op2);
- break;
-
- case FLAGS_UNKNOWN:
- default:
- if (do_unroll)
- {
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, ZF_SET);
- jump_uop2 = uop_CMP_IMM_JNZ_DEST(ir, IREG_temp0, 0);
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, NF_SET_01);
- uop_CALL_FUNC_RESULT(ir, IREG_temp1, VF_SET_01);
- jump_uop = uop_CMP_JZ_DEST(ir, IREG_temp0, IREG_temp1);
- }
- else
- {
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, ZF_SET);
- jump_uop2 = uop_CMP_IMM_JNZ_DEST(ir, IREG_temp0, 0);
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, NF_SET_01);
- uop_CALL_FUNC_RESULT(ir, IREG_temp1, VF_SET_01);
- jump_uop = uop_CMP_JNZ_DEST(ir, IREG_temp0, IREG_temp1);
- }
- break;
- }
- if (do_unroll)
- {
- if (jump_uop2 != -1)
- uop_set_jump_dest(ir, jump_uop2);
- uop_MOV_IMM(ir, IREG_pc, next_pc);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- return 1;
- }
- else
- {
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
- if (jump_uop2 != -1)
- uop_set_jump_dest(ir, jump_uop2);
- return 0;
- }
-}
-
-#define ropJ(cond) \
-uint32_t ropJ ## cond ## _8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- uint32_t offset = (int32_t)(int8_t)fastreadb(cs + op_pc); \
- uint32_t dest_addr = op_pc + 1 + offset; \
- int ret; \
- \
- if (!(op_32 & 0x100)) \
- dest_addr &= 0xffff; \
- ret = ropJ ## cond ## _common(block, ir, dest_addr, op_pc+1); \
- \
- codegen_mark_code_present(block, cs+op_pc, 1); \
- return ret ? dest_addr : (op_pc+1); \
-} \
-uint32_t ropJ ## cond ## _16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- uint32_t offset = (int32_t)(int16_t)fastreadw(cs + op_pc); \
- uint32_t dest_addr = (op_pc + 2 + offset) & 0xffff; \
- int ret; \
- \
- ret = ropJ ## cond ## _common(block, ir, dest_addr, op_pc+2); \
- \
- codegen_mark_code_present(block, cs+op_pc, 2); \
- return ret ? dest_addr : (op_pc+2); \
-} \
-uint32_t ropJ ## cond ## _32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- uint32_t offset = fastreadl(cs + op_pc); \
- uint32_t dest_addr = op_pc + 4 + offset; \
- int ret; \
- \
- ret = ropJ ## cond ## _common(block, ir, dest_addr, op_pc+4); \
- \
- codegen_mark_code_present(block, cs+op_pc, 4); \
- return ret ? dest_addr : (op_pc+4); \
-}
-
-ropJ(O)
-ropJ(NO)
-ropJ(B)
-ropJ(NB)
-ropJ(E)
-ropJ(NE)
-ropJ(BE)
-ropJ(NBE)
-ropJ(S)
-ropJ(NS)
-ropJ(P)
-ropJ(NP)
-ropJ(L)
-ropJ(NL)
-ropJ(LE)
-ropJ(NLE)
-
-
-uint32_t ropJCXZ(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint32_t offset = (int32_t)(int8_t)fastreadb(cs + op_pc);
- uint32_t dest_addr = op_pc + 1 + offset;
- int jump_uop;
-
- if (!(op_32 & 0x100))
- dest_addr &= 0xffff;
-
- if (op_32 & 0x200)
- jump_uop = uop_CMP_IMM_JNZ_DEST(ir, IREG_ECX, 0);
- else
- jump_uop = uop_CMP_IMM_JNZ_DEST(ir, IREG_CX, 0);
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- return op_pc+1;
-}
-
-uint32_t ropLOOP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint32_t offset = (int32_t)(int8_t)fastreadb(cs + op_pc);
- uint32_t dest_addr = op_pc + 1 + offset;
- uint32_t ret_addr;
- int jump_uop;
-
- if (!(op_32 & 0x100))
- dest_addr &= 0xffff;
-
- if (((op_32 & 0x200) ? ECX : CX) != 1 && codegen_can_unroll(block, ir, op_pc+1, dest_addr))
- {
- if (op_32 & 0x200)
- {
- uop_SUB_IMM(ir, IREG_ECX, IREG_ECX, 1);
- jump_uop = uop_CMP_IMM_JNZ_DEST(ir, IREG_ECX, 0);
- }
- else
- {
- uop_SUB_IMM(ir, IREG_CX, IREG_CX, 1);
- jump_uop = uop_CMP_IMM_JNZ_DEST(ir, IREG_CX, 0);
- }
- uop_MOV_IMM(ir, IREG_pc, op_pc+1);
- ret_addr = dest_addr;
- CPU_BLOCK_END();
- }
- else
- {
- if (op_32 & 0x200)
- {
- uop_SUB_IMM(ir, IREG_ECX, IREG_ECX, 1);
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_ECX, 0);
- }
- else
- {
- uop_SUB_IMM(ir, IREG_CX, IREG_CX, 1);
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_CX, 0);
- }
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
- ret_addr = op_pc+1;
- }
- uop_JMP(ir, codegen_exit_rout);
- uop_set_jump_dest(ir, jump_uop);
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- return ret_addr;
-}
-
-uint32_t ropLOOPE(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint32_t offset = (int32_t)(int8_t)fastreadb(cs + op_pc);
- uint32_t dest_addr = op_pc + 1 + offset;
- int jump_uop, jump_uop2;
-
- if (!(op_32 & 0x100))
- dest_addr &= 0xffff;
-
- if (op_32 & 0x200)
- {
- uop_SUB_IMM(ir, IREG_ECX, IREG_ECX, 1);
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_ECX, 0);
- }
- else
- {
- uop_SUB_IMM(ir, IREG_CX, IREG_CX, 1);
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_CX, 0);
- }
- if (!codegen_flags_changed || !flags_res_valid())
- {
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, ZF_SET);
- jump_uop2 = uop_CMP_IMM_JZ_DEST(ir, IREG_temp0, 0);
- }
- else
- {
- jump_uop2 = uop_CMP_IMM_JNZ_DEST(ir, IREG_flags_res, 0);
- }
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- uop_NOP_BARRIER(ir);
- uop_set_jump_dest(ir, jump_uop);
- uop_set_jump_dest(ir, jump_uop2);
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- return op_pc+1;
-}
-uint32_t ropLOOPNE(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint32_t offset = (int32_t)(int8_t)fastreadb(cs + op_pc);
- uint32_t dest_addr = op_pc + 1 + offset;
- int jump_uop, jump_uop2;
-
- if (!(op_32 & 0x100))
- dest_addr &= 0xffff;
-
- if (op_32 & 0x200)
- {
- uop_SUB_IMM(ir, IREG_ECX, IREG_ECX, 1);
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_ECX, 0);
- }
- else
- {
- uop_SUB_IMM(ir, IREG_CX, IREG_CX, 1);
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_CX, 0);
- }
- if (!codegen_flags_changed || !flags_res_valid())
- {
- uop_CALL_FUNC_RESULT(ir, IREG_temp0, ZF_SET);
- jump_uop2 = uop_CMP_IMM_JNZ_DEST(ir, IREG_temp0, 0);
- }
- else
- {
- jump_uop2 = uop_CMP_IMM_JZ_DEST(ir, IREG_flags_res, 0);
- }
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
- uop_JMP(ir, codegen_exit_rout);
- uop_NOP_BARRIER(ir);
- uop_set_jump_dest(ir, jump_uop);
- uop_set_jump_dest(ir, jump_uop2);
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- return op_pc+1;
-}
diff --git a/src/codegen_ops_branch.h b/src/codegen_ops_branch.h
deleted file mode 100644
index a67a2b5..0000000
--- a/src/codegen_ops_branch.h
+++ /dev/null
@@ -1,69 +0,0 @@
-uint32_t ropJB_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJB_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJB_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropJNB_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJNB_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJNB_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropJBE_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJBE_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJBE_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropJNBE_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJNBE_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJNBE_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropJE_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJE_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJE_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropJNE_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJNE_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJNE_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropJL_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJL_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJL_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropJNL_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJNL_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJNL_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropJLE_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJLE_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJLE_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropJNLE_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJNLE_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJNLE_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropJO_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJO_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJO_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropJNO_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJNO_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJNO_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropJP_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJP_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJP_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropJNP_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJNP_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJNP_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropJS_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJS_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJS_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropJNS_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJNS_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJNS_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropJCXZ(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropLOOP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropLOOPE(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropLOOPNE(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
diff --git a/src/codegen_ops_fpu.h b/src/codegen_ops_fpu.h
new file mode 100644
index 0000000..de7cf4c
--- /dev/null
+++ b/src/codegen_ops_fpu.h
@@ -0,0 +1,638 @@
+static uint32_t ropFXCH(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+
+ FP_FXCH(opcode & 7);
+
+ return op_pc;
+}
+
+static uint32_t ropFLD(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+
+ FP_FLD(opcode & 7);
+
+ return op_pc;
+}
+
+static uint32_t ropFST(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+
+ FP_FST(opcode & 7);
+
+ return op_pc;
+}
+static uint32_t ropFSTP(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+
+ FP_FST(opcode & 7);
+ FP_POP();
+
+ return op_pc;
+}
+
+
+static uint32_t ropFLDs(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg;
+
+ FP_ENTER();
+ op_pc--;
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+ MEM_LOAD_ADDR_EA_L(target_seg);
+
+ FP_LOAD_S();
+
+ return op_pc + 1;
+}
+static uint32_t ropFLDd(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg;
+
+ FP_ENTER();
+ op_pc--;
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+ MEM_LOAD_ADDR_EA_Q(target_seg);
+
+ FP_LOAD_D();
+
+ return op_pc + 1;
+}
+
+static uint32_t ropFILDw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg;
+
+ FP_ENTER();
+ op_pc--;
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+ MEM_LOAD_ADDR_EA_W(target_seg);
+
+ FP_LOAD_IW();
+
+ return op_pc + 1;
+}
+static uint32_t ropFILDl(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg;
+
+ FP_ENTER();
+ op_pc--;
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+ MEM_LOAD_ADDR_EA_L(target_seg);
+
+ FP_LOAD_IL();
+
+ return op_pc + 1;
+}
+static uint32_t ropFILDq(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg;
+
+ FP_ENTER();
+ op_pc--;
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+ MEM_LOAD_ADDR_EA_Q(target_seg);
+
+ FP_LOAD_IQ();
+
+ codegen_fpu_loaded_iq[(cpu_state.TOP - 1) & 7] = 1;
+
+ return op_pc + 1;
+}
+
+static uint32_t ropFSTs(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg;
+ int host_reg;
+
+ FP_ENTER();
+ op_pc--;
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ host_reg = FP_LOAD_REG(0);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_WRITE(target_seg);
+
+ MEM_STORE_ADDR_EA_L(target_seg, host_reg);
+
+ return op_pc + 1;
+}
+static uint32_t ropFSTd(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg;
+ int host_reg1, host_reg2;
+
+ FP_ENTER();
+ op_pc--;
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ FP_LOAD_REG_D(0, &host_reg1, &host_reg2);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_WRITE(target_seg);
+ CHECK_SEG_LIMITS(target_seg, 7);
+
+ MEM_STORE_ADDR_EA_Q(target_seg, host_reg1, host_reg2);
+
+ return op_pc + 1;
+}
+
+static uint32_t ropFSTPs(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint32_t new_pc = ropFSTs(opcode, fetchdat, op_32, op_pc, block);
+
+ FP_POP();
+
+ return new_pc;
+}
+static uint32_t ropFSTPd(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint32_t new_pc = ropFSTd(opcode, fetchdat, op_32, op_pc, block);
+
+ FP_POP();
+
+ return new_pc;
+}
+
+#define ropFarith(name, size, load, op) \
+static uint32_t ropF ## name ## size(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+{ \
+ x86seg *target_seg; \
+ \
+ FP_ENTER(); \
+ op_pc--; \
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \
+ \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ \
+ CHECK_SEG_READ(target_seg); \
+ load(target_seg); \
+ \
+ op(FPU_ ## name); \
+ \
+ return op_pc + 1; \
+}
+
+ropFarith(ADD, s, MEM_LOAD_ADDR_EA_L, FP_OP_S);
+ropFarith(DIV, s, MEM_LOAD_ADDR_EA_L, FP_OP_S);
+ropFarith(DIVR, s, MEM_LOAD_ADDR_EA_L, FP_OP_S);
+ropFarith(MUL, s, MEM_LOAD_ADDR_EA_L, FP_OP_S);
+ropFarith(SUB, s, MEM_LOAD_ADDR_EA_L, FP_OP_S);
+ropFarith(SUBR, s, MEM_LOAD_ADDR_EA_L, FP_OP_S);
+ropFarith(ADD, d, MEM_LOAD_ADDR_EA_Q, FP_OP_D);
+ropFarith(DIV, d, MEM_LOAD_ADDR_EA_Q, FP_OP_D);
+ropFarith(DIVR, d, MEM_LOAD_ADDR_EA_Q, FP_OP_D);
+ropFarith(MUL, d, MEM_LOAD_ADDR_EA_Q, FP_OP_D);
+ropFarith(SUB, d, MEM_LOAD_ADDR_EA_Q, FP_OP_D);
+ropFarith(SUBR, d, MEM_LOAD_ADDR_EA_Q, FP_OP_D);
+ropFarith(ADD, iw, MEM_LOAD_ADDR_EA_W, FP_OP_IW);
+ropFarith(DIV, iw, MEM_LOAD_ADDR_EA_W, FP_OP_IW);
+ropFarith(DIVR, iw, MEM_LOAD_ADDR_EA_W, FP_OP_IW);
+ropFarith(MUL, iw, MEM_LOAD_ADDR_EA_W, FP_OP_IW);
+ropFarith(SUB, iw, MEM_LOAD_ADDR_EA_W, FP_OP_IW);
+ropFarith(SUBR, iw, MEM_LOAD_ADDR_EA_W, FP_OP_IW);
+ropFarith(ADD, il, MEM_LOAD_ADDR_EA_L, FP_OP_IL);
+ropFarith(DIV, il, MEM_LOAD_ADDR_EA_L, FP_OP_IL);
+ropFarith(DIVR, il, MEM_LOAD_ADDR_EA_L, FP_OP_IL);
+ropFarith(MUL, il, MEM_LOAD_ADDR_EA_L, FP_OP_IL);
+ropFarith(SUB, il, MEM_LOAD_ADDR_EA_L, FP_OP_IL);
+ropFarith(SUBR, il, MEM_LOAD_ADDR_EA_L, FP_OP_IL);
+
+#define ropFcompare(name, size, load, op) \
+static uint32_t ropF ## name ## size(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+{ \
+ x86seg *target_seg; \
+ \
+ FP_ENTER(); \
+ op_pc--; \
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \
+ \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ \
+ CHECK_SEG_READ(target_seg); \
+ load(target_seg); \
+ \
+ op(); \
+ \
+ return op_pc + 1; \
+} \
+static uint32_t ropF ## name ## P ## size(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+{ \
+ uint32_t new_pc = ropF ## name ## size(opcode, fetchdat, op_32, op_pc, block); \
+ \
+ FP_POP(); \
+ \
+ return new_pc; \
+}
+
+ropFcompare(COM, s, MEM_LOAD_ADDR_EA_L, FP_COMPARE_S);
+ropFcompare(COM, d, MEM_LOAD_ADDR_EA_Q, FP_COMPARE_D);
+ropFcompare(COM, iw, MEM_LOAD_ADDR_EA_W, FP_COMPARE_IW);
+ropFcompare(COM, il, MEM_LOAD_ADDR_EA_L, FP_COMPARE_IL);
+
+/*static uint32_t ropFADDs(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg;
+
+ FP_ENTER();
+ op_pc--;
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+ MEM_LOAD_ADDR_EA_L(target_seg);
+
+ FP_OP_S(FPU_ADD);
+
+ return op_pc + 1;
+}
+static uint32_t ropFDIVs(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg;
+
+ FP_ENTER();
+ op_pc--;
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+ MEM_LOAD_ADDR_EA_L(target_seg);
+
+ FP_OP_S(FPU_DIV);
+
+ return op_pc + 1;
+}
+static uint32_t ropFMULs(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg;
+
+ FP_ENTER();
+ op_pc--;
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+ MEM_LOAD_ADDR_EA_L(target_seg);
+
+ FP_OP_S(FPU_MUL);
+
+ return op_pc + 1;
+}
+static uint32_t ropFSUBs(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg;
+
+ FP_ENTER();
+ op_pc--;
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+ MEM_LOAD_ADDR_EA_L(target_seg);
+
+ FP_OP_S(FPU_SUB);
+
+ return op_pc + 1;
+}*/
+
+
+static uint32_t ropFADD(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_OP_REG(FPU_ADD, 0, opcode & 7);
+
+ return op_pc;
+}
+static uint32_t ropFCOM(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_COMPARE_REG(0, opcode & 7);
+
+ return op_pc;
+}
+static uint32_t ropFDIV(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_OP_REG(FPU_DIV, 0, opcode & 7);
+
+ return op_pc;
+}
+static uint32_t ropFDIVR(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_OP_REG(FPU_DIVR, 0, opcode & 7);
+
+ return op_pc;
+}
+static uint32_t ropFMUL(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_OP_REG(FPU_MUL, 0, opcode & 7);
+
+ return op_pc;
+}
+static uint32_t ropFSUB(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_OP_REG(FPU_SUB, 0, opcode & 7);
+
+ return op_pc;
+}
+static uint32_t ropFSUBR(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_OP_REG(FPU_SUBR, 0, opcode & 7);
+
+ return op_pc;
+}
+
+static uint32_t ropFADDr(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_OP_REG(FPU_ADD, opcode & 7, 0);
+
+ return op_pc;
+}
+static uint32_t ropFDIVr(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_OP_REG(FPU_DIV, opcode & 7, 0);
+
+ return op_pc;
+}
+static uint32_t ropFDIVRr(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_OP_REG(FPU_DIVR, opcode & 7, 0);
+
+ return op_pc;
+}
+static uint32_t ropFMULr(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_OP_REG(FPU_MUL, opcode & 7, 0);
+
+ return op_pc;
+}
+static uint32_t ropFSUBr(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_OP_REG(FPU_SUB, opcode & 7, 0);
+
+ return op_pc;
+}
+static uint32_t ropFSUBRr(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_OP_REG(FPU_SUBR, opcode & 7, 0);
+
+ return op_pc;
+}
+
+static uint32_t ropFADDP(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_OP_REG(FPU_ADD, opcode & 7, 0);
+ FP_POP();
+
+ return op_pc;
+}
+static uint32_t ropFCOMP(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_COMPARE_REG(0, opcode & 7);
+ FP_POP();
+
+ return op_pc;
+}
+static uint32_t ropFDIVP(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_OP_REG(FPU_DIV, opcode & 7, 0);
+ FP_POP();
+
+ return op_pc;
+}
+static uint32_t ropFDIVRP(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_OP_REG(FPU_DIVR, opcode & 7, 0);
+ FP_POP();
+
+ return op_pc;
+}
+static uint32_t ropFMULP(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_OP_REG(FPU_MUL, opcode & 7, 0);
+ FP_POP();
+
+ return op_pc;
+}
+static uint32_t ropFSUBP(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_OP_REG(FPU_SUB, opcode & 7, 0);
+ FP_POP();
+
+ return op_pc;
+}
+static uint32_t ropFSUBRP(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_OP_REG(FPU_SUBR, opcode & 7, 0);
+ FP_POP();
+
+ return op_pc;
+}
+
+static uint32_t ropFCOMPP(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_COMPARE_REG(0, 1);
+ FP_POP2();
+
+ return op_pc;
+}
+
+static uint32_t ropFSTSW_AX(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg;
+
+ FP_ENTER();
+ host_reg = LOAD_VAR_W((uintptr_t)&cpu_state.npxs);
+ STORE_REG_TARGET_W_RELEASE(host_reg, REG_AX);
+
+ return op_pc;
+}
+
+
+static uint32_t ropFISTw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg;
+ int host_reg;
+
+ FP_ENTER();
+ op_pc--;
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ host_reg = FP_LOAD_REG_INT_W(0);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_WRITE(target_seg);
+
+ MEM_STORE_ADDR_EA_W(target_seg, host_reg);
+
+ return op_pc + 1;
+}
+static uint32_t ropFISTl(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg;
+ int host_reg;
+
+ FP_ENTER();
+ op_pc--;
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ host_reg = FP_LOAD_REG_INT(0);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_WRITE(target_seg);
+
+ MEM_STORE_ADDR_EA_L(target_seg, host_reg);
+
+ return op_pc + 1;
+}
+
+static uint32_t ropFISTPw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint32_t new_pc = ropFISTw(opcode, fetchdat, op_32, op_pc, block);
+
+ FP_POP();
+
+ return new_pc;
+}
+static uint32_t ropFISTPl(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint32_t new_pc = ropFISTl(opcode, fetchdat, op_32, op_pc, block);
+
+ FP_POP();
+
+ return new_pc;
+}
+static uint32_t ropFISTPq(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg;
+ int host_reg1, host_reg2;
+
+ FP_ENTER();
+ op_pc--;
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ FP_LOAD_REG_INT_Q(0, &host_reg1, &host_reg2);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_WRITE(target_seg);
+
+ MEM_STORE_ADDR_EA_Q(target_seg, host_reg1, host_reg2);
+
+ FP_POP();
+
+ return op_pc + 1;
+}
+
+
+static uint32_t ropFLDCW(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg;
+
+ FP_ENTER();
+ op_pc--;
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ CHECK_SEG_READ(target_seg);
+
+ MEM_LOAD_ADDR_EA_W(target_seg);
+ STORE_HOST_REG_ADDR_W((uintptr_t)&cpu_state.npxc, 0);
+ UPDATE_NPXC(0);
+
+ return op_pc + 1;
+}
+static uint32_t ropFSTCW(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg;
+ x86seg *target_seg;
+
+ FP_ENTER();
+ op_pc--;
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ CHECK_SEG_WRITE(target_seg);
+
+ host_reg = LOAD_VAR_W((uintptr_t)&cpu_state.npxc);
+ MEM_STORE_ADDR_EA_W(target_seg, host_reg);
+
+ return op_pc + 1;
+}
+
+
+static uint32_t ropFCHS(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ FP_ENTER();
+ FP_FCHS();
+
+ return op_pc;
+}
+
+#define opFLDimm(name, v) \
+ static uint32_t ropFLD ## name(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+ { \
+ static double fp_imm = v; \
+ \
+ FP_ENTER(); \
+ FP_LOAD_IMM_Q(*(uint64_t *)&fp_imm); \
+ \
+ return op_pc; \
+ }
+
+opFLDimm(1, 1.0)
+opFLDimm(L2T, 3.3219280948873623)
+opFLDimm(L2E, 1.4426950408889634);
+opFLDimm(PI, 3.141592653589793);
+opFLDimm(EG2, 0.3010299956639812);
+opFLDimm(LN2, 0.693147180559945);
+opFLDimm(Z, 0.0)
diff --git a/src/codegen_ops_fpu_arith.c b/src/codegen_ops_fpu_arith.c
deleted file mode 100644
index e3bfb28..0000000
--- a/src/codegen_ops_fpu_arith.c
+++ /dev/null
@@ -1,572 +0,0 @@
-#include "ibm.h"
-
-#include "x86.h"
-#include "x86_flags.h"
-#include "386_common.h"
-#include "x87.h"
-#include "codegen.h"
-#include "codegen_accumulate.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_fpu_arith.h"
-#include "codegen_ops_helpers.h"
-
-uint32_t ropFADD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FADD(ir, IREG_ST(0), IREG_ST(0), IREG_ST(src_reg));
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
-
- return op_pc;
-}
-uint32_t ropFADDr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FADD(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
- uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
-
- return op_pc;
-}
-uint32_t ropFADDP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FADD(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
- uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
- fpu_POP(block, ir);
-
- return op_pc;
-}
-
-uint32_t ropFCOM(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(src_reg));
- uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3));
- uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W);
-
- return op_pc;
-}
-uint32_t ropFCOMP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(src_reg));
- uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3));
- uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W);
- fpu_POP(block, ir);
-
- return op_pc;
-}
-uint32_t ropFCOMPP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_FP_ENTER(ir);
- uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(1));
- uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3));
- uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W);
- fpu_POP2(block, ir);
-
- return op_pc;
-}
-
-uint32_t ropFDIV(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FDIV(ir, IREG_ST(0), IREG_ST(0), IREG_ST(src_reg));
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
-
- return op_pc;
-}
-uint32_t ropFDIVR(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FDIV(ir, IREG_ST(0), IREG_ST(src_reg), IREG_ST(0));
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
-
- return op_pc;
-}
-uint32_t ropFDIVr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FDIV(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
- uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
-
- return op_pc;
-}
-uint32_t ropFDIVRr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FDIV(ir, IREG_ST(dest_reg), IREG_ST(0), IREG_ST(dest_reg));
- uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
-
- return op_pc;
-}
-uint32_t ropFDIVP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FDIV(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
- uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
- fpu_POP(block, ir);
-
- return op_pc;
-}
-uint32_t ropFDIVRP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FDIV(ir, IREG_ST(dest_reg), IREG_ST(0), IREG_ST(dest_reg));
- uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
- fpu_POP(block, ir);
-
- return op_pc;
-}
-
-uint32_t ropFMUL(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FMUL(ir, IREG_ST(0), IREG_ST(0), IREG_ST(src_reg));
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
-
- return op_pc;
-}
-uint32_t ropFMULr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FMUL(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
- uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
-
- return op_pc;
-}
-uint32_t ropFMULP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FMUL(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
- uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
- fpu_POP(block, ir);
-
- return op_pc;
-}
-
-uint32_t ropFSUB(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FSUB(ir, IREG_ST(0), IREG_ST(0), IREG_ST(src_reg));
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
-
- return op_pc;
-}
-uint32_t ropFSUBR(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FSUB(ir, IREG_ST(0), IREG_ST(src_reg), IREG_ST(0));
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
-
- return op_pc;
-}
-uint32_t ropFSUBr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FSUB(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
- uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
-
- return op_pc;
-}
-uint32_t ropFSUBRr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FSUB(ir, IREG_ST(dest_reg), IREG_ST(0), IREG_ST(dest_reg));
- uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
-
- return op_pc;
-}
-uint32_t ropFSUBP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FSUB(ir, IREG_ST(dest_reg), IREG_ST(dest_reg), IREG_ST(0));
- uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
- fpu_POP(block, ir);
-
- return op_pc;
-}
-uint32_t ropFSUBRP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FSUB(ir, IREG_ST(dest_reg), IREG_ST(0), IREG_ST(dest_reg));
- uop_MOV_IMM(ir, IREG_tag(dest_reg), TAG_VALID);
- fpu_POP(block, ir);
-
- return op_pc;
-}
-
-uint32_t ropFUCOM(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(src_reg));
- uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3));
- uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W);
-
- return op_pc;
-}
-uint32_t ropFUCOMP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(src_reg));
- uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3));
- uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W);
- fpu_POP(block, ir);
-
- return op_pc;
-}
-uint32_t ropFUCOMPP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_FP_ENTER(ir);
- uop_FCOM(ir, IREG_temp0_W, IREG_ST(0), IREG_ST(1));
- uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3));
- uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W);
- fpu_POP2(block, ir);
-
- return op_pc;
-}
-
-#define ropF_arith_mem(name, load_uop) \
-uint32_t ropFADD ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- x86seg *target_seg; \
- \
- if ((cpu_state.npxc >> 10) & 3) \
- return 0; \
- uop_FP_ENTER(ir); \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- op_pc--; \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_FADD(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
- \
- return op_pc+1; \
-} \
-uint32_t ropFCOM ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- x86seg *target_seg; \
- \
- uop_FP_ENTER(ir); \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- op_pc--; \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_FCOM(ir, IREG_temp1_W, IREG_ST(0), IREG_temp0_D); \
- uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3)); \
- uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp1_W); \
- \
- return op_pc+1; \
-} \
-uint32_t ropFCOMP ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- x86seg *target_seg; \
- \
- uop_FP_ENTER(ir); \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- op_pc--; \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_FCOM(ir, IREG_temp1_W, IREG_ST(0), IREG_temp0_D); \
- uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3)); \
- uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp1_W); \
- fpu_POP(block, ir); \
- \
- return op_pc+1; \
-} \
-uint32_t ropFDIV ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- x86seg *target_seg; \
- \
- uop_FP_ENTER(ir); \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- op_pc--; \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_FDIV(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
- \
- return op_pc+1; \
-} \
-uint32_t ropFDIVR ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- x86seg *target_seg; \
- \
- uop_FP_ENTER(ir); \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- op_pc--; \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_FDIV(ir, IREG_ST(0), IREG_temp0_D, IREG_ST(0)); \
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
- \
- return op_pc+1; \
-} \
-uint32_t ropFMUL ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- x86seg *target_seg; \
- \
- uop_FP_ENTER(ir); \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- op_pc--; \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_FMUL(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
- \
- return op_pc+1; \
-} \
-uint32_t ropFSUB ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- x86seg *target_seg; \
- \
- uop_FP_ENTER(ir); \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- op_pc--; \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_FSUB(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
- \
- return op_pc+1; \
-} \
-uint32_t ropFSUBR ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- x86seg *target_seg; \
- \
- uop_FP_ENTER(ir); \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- op_pc--; \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- load_uop(ir, IREG_temp0_D, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_FSUB(ir, IREG_ST(0), IREG_temp0_D, IREG_ST(0)); \
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
- \
- return op_pc+1; \
-}
-
-ropF_arith_mem(s, uop_MEM_LOAD_SINGLE)
-ropF_arith_mem(d, uop_MEM_LOAD_DOUBLE)
-
-#define ropFI_arith_mem(name, temp_reg) \
-uint32_t ropFIADD ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- x86seg *target_seg; \
- \
- uop_FP_ENTER(ir); \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- op_pc--; \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
- uop_FADD(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
- \
- return op_pc+1; \
-} \
-uint32_t ropFICOM ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- x86seg *target_seg; \
- \
- uop_FP_ENTER(ir); \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- op_pc--; \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
- uop_FCOM(ir, IREG_temp1_W, IREG_ST(0), IREG_temp0_D); \
- uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3)); \
- uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp1_W); \
- \
- return op_pc+1; \
-} \
-uint32_t ropFICOMP ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- x86seg *target_seg; \
- \
- uop_FP_ENTER(ir); \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- op_pc--; \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
- uop_FCOM(ir, IREG_temp1_W, IREG_ST(0), IREG_temp0_D); \
- uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3)); \
- uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp1_W); \
- fpu_POP(block, ir); \
- \
- return op_pc+1; \
-} \
-uint32_t ropFIDIV ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- x86seg *target_seg; \
- \
- uop_FP_ENTER(ir); \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- op_pc--; \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
- uop_FDIV(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
- \
- return op_pc+1; \
-} \
-uint32_t ropFIDIVR ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)\
-{ \
- x86seg *target_seg; \
- \
- uop_FP_ENTER(ir); \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- op_pc--; \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
- uop_FDIV(ir, IREG_ST(0), IREG_temp0_D, IREG_ST(0)); \
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
- \
- return op_pc+1; \
-} \
-uint32_t ropFIMUL ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- x86seg *target_seg; \
- \
- uop_FP_ENTER(ir); \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- op_pc--; \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
- uop_FMUL(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
- \
- return op_pc+1; \
-} \
-uint32_t ropFISUB ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- x86seg *target_seg; \
- \
- uop_FP_ENTER(ir); \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- op_pc--; \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
- uop_FSUB(ir, IREG_ST(0), IREG_ST(0), IREG_temp0_D); \
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
- \
- return op_pc+1; \
-} \
-uint32_t ropFISUBR ## name(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)\
-{ \
- x86seg *target_seg; \
- \
- uop_FP_ENTER(ir); \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- op_pc--; \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- uop_MEM_LOAD_REG(ir, temp_reg, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_MOV_DOUBLE_INT(ir, IREG_temp0_D, temp_reg); \
- uop_FSUB(ir, IREG_ST(0), IREG_temp0_D, IREG_ST(0)); \
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID); \
- \
- return op_pc+1; \
-}
-
-ropFI_arith_mem(l, IREG_temp0)
-ropFI_arith_mem(w, IREG_temp0_W)
-
-
-uint32_t ropFABS(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_FP_ENTER(ir);
- uop_FABS(ir, IREG_ST(0), IREG_ST(0));
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
-
- return op_pc;
-}
-
-uint32_t ropFCHS(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_FP_ENTER(ir);
- uop_FCHS(ir, IREG_ST(0), IREG_ST(0));
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
-
- return op_pc;
-}
-uint32_t ropFSQRT(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_FP_ENTER(ir);
- uop_FSQRT(ir, IREG_ST(0), IREG_ST(0));
- uop_MOV_IMM(ir, IREG_tag(0), TAG_VALID);
-
- return op_pc;
-}
-uint32_t ropFTST(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_FP_ENTER(ir);
- uop_FTST(ir, IREG_temp0_W, IREG_ST(0));
- uop_AND_IMM(ir, IREG_NPXS, IREG_NPXS, ~(C0|C2|C3));
- uop_OR(ir, IREG_NPXS, IREG_NPXS, IREG_temp0_W);
-
- return op_pc;
-}
diff --git a/src/codegen_ops_fpu_arith.h b/src/codegen_ops_fpu_arith.h
deleted file mode 100644
index 60ae273..0000000
--- a/src/codegen_ops_fpu_arith.h
+++ /dev/null
@@ -1,63 +0,0 @@
-uint32_t ropFADD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFADDr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFADDP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFCOM(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFCOMP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFCOMPP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFDIV(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFDIVR(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFDIVr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFDIVRr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFDIVP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFDIVRP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFMUL(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFMULr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFMULP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFSUB(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFSUBR(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFSUBr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFSUBRr(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFSUBP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFSUBRP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFUCOM(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFUCOMP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFUCOMPP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropFADDs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFADDd(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFCOMs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFCOMd(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFCOMPs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFCOMPd(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFDIVs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFDIVd(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFDIVRs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFDIVRd(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFMULs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFMULd(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFSUBs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFSUBd(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFSUBRs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFSUBRd(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropFIADDl(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFIADDw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFICOMl(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFICOMw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFICOMPl(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFICOMPw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFIDIVl(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFIDIVw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFIDIVRl(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFIDIVRw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFIMULl(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFIMULw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFISUBl(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFISUBw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFISUBRl(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFISUBRw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropFABS(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFCHS(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFSQRT(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFTST(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
diff --git a/src/codegen_ops_fpu_constant.c b/src/codegen_ops_fpu_constant.c
deleted file mode 100644
index aa264ce..0000000
--- a/src/codegen_ops_fpu_constant.c
+++ /dev/null
@@ -1,33 +0,0 @@
-#include "ibm.h"
-
-#include "x86.h"
-#include "x86_flags.h"
-#include "386_common.h"
-#include "x87.h"
-#include "codegen.h"
-#include "codegen_accumulate.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_fpu_constant.h"
-#include "codegen_ops_helpers.h"
-
-uint32_t ropFLD1(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_FP_ENTER(ir);
- uop_MOV_IMM(ir, IREG_temp0, 1);
- uop_MOV_DOUBLE_INT(ir, IREG_ST(-1), IREG_temp0);
- uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID);
- fpu_PUSH(block, ir);
-
- return op_pc;
-}
-uint32_t ropFLDZ(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_FP_ENTER(ir);
- uop_MOV_IMM(ir, IREG_temp0, 0);
- uop_MOV_DOUBLE_INT(ir, IREG_ST(-1), IREG_temp0);
- uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID);
- fpu_PUSH(block, ir);
-
- return op_pc;
-}
diff --git a/src/codegen_ops_fpu_constant.h b/src/codegen_ops_fpu_constant.h
deleted file mode 100644
index 29384b5..0000000
--- a/src/codegen_ops_fpu_constant.h
+++ /dev/null
@@ -1,2 +0,0 @@
-uint32_t ropFLD1(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFLDZ(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
diff --git a/src/codegen_ops_fpu_loadstore.c b/src/codegen_ops_fpu_loadstore.c
deleted file mode 100644
index e61e5cb..0000000
--- a/src/codegen_ops_fpu_loadstore.c
+++ /dev/null
@@ -1,231 +0,0 @@
-#include "ibm.h"
-
-#include "x86.h"
-#include "x86_flags.h"
-#include "386_common.h"
-#include "x87.h"
-#include "codegen.h"
-#include "codegen_accumulate.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_fpu_arith.h"
-#include "codegen_ops_helpers.h"
-
-uint32_t ropFLDs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg;
-
- uop_FP_ENTER(ir);
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- op_pc--;
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_SINGLE(ir, IREG_ST(-1), ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID);
- fpu_PUSH(block, ir);
-
- return op_pc+1;
-}
-uint32_t ropFLDd(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg;
-
- uop_FP_ENTER(ir);
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- op_pc--;
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_DOUBLE(ir, IREG_ST(-1), ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID);
- fpu_PUSH(block, ir);
-
- return op_pc+1;
-}
-
-uint32_t ropFSTs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg;
-
- uop_FP_ENTER(ir);
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- op_pc--;
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MEM_STORE_SINGLE(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_ST(0));
-
- return op_pc+1;
-}
-uint32_t ropFSTPs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg;
-
- uop_FP_ENTER(ir);
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- op_pc--;
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MEM_STORE_SINGLE(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_ST(0));
- uop_MOV_IMM(ir, IREG_tag(0), TAG_EMPTY);
- fpu_POP(block, ir);
-
- return op_pc+1;
-}
-uint32_t ropFSTd(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg;
-
- uop_FP_ENTER(ir);
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- op_pc--;
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- CHECK_SEG_LIMITS(block, ir, target_seg, IREG_eaaddr, 7);
- uop_MEM_STORE_DOUBLE(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_ST(0));
-
- return op_pc+1;
-}
-uint32_t ropFSTPd(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg;
-
- uop_FP_ENTER(ir);
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- op_pc--;
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- CHECK_SEG_LIMITS(block, ir, target_seg, IREG_eaaddr, 7);
- uop_MEM_STORE_DOUBLE(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_ST(0));
- uop_MOV_IMM(ir, IREG_tag(0), TAG_EMPTY);
- fpu_POP(block, ir);
-
- return op_pc+1;
-}
-
-
-uint32_t ropFILDw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg;
-
- uop_FP_ENTER(ir);
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- op_pc--;
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOV_DOUBLE_INT(ir, IREG_ST(-1), IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID);
- fpu_PUSH(block, ir);
-
- return op_pc+1;
-}
-uint32_t ropFILDl(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg;
-
- uop_FP_ENTER(ir);
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- op_pc--;
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOV_DOUBLE_INT(ir, IREG_ST(-1), IREG_temp0);
- uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID);
- fpu_PUSH(block, ir);
-
- return op_pc+1;
-}
-uint32_t ropFILDq(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg;
-
- uop_FP_ENTER(ir);
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- op_pc--;
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_ST_i64(-1), ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOV_DOUBLE_INT(ir, IREG_ST(-1), IREG_ST_i64(-1));
- uop_MOV_IMM(ir, IREG_tag(-1), TAG_VALID | TAG_UINT64);
- fpu_PUSH(block, ir);
-
- return op_pc+1;
-}
-
-uint32_t ropFISTw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg;
-
- uop_FP_ENTER(ir);
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- op_pc--;
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MOV_INT_DOUBLE(ir, IREG_temp0_W, IREG_ST(0));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_tag(0), TAG_EMPTY);
-
- return op_pc+1;
-}
-uint32_t ropFISTPw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg;
-
- uop_FP_ENTER(ir);
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- op_pc--;
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MOV_INT_DOUBLE(ir, IREG_temp0_W, IREG_ST(0));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_tag(0), TAG_EMPTY);
- fpu_POP(block, ir);
-
- return op_pc+1;
-}
-uint32_t ropFISTl(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg;
-
- uop_FP_ENTER(ir);
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- op_pc--;
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MOV_INT_DOUBLE(ir, IREG_temp0, IREG_ST(0));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
- uop_MOV_IMM(ir, IREG_tag(0), TAG_EMPTY);
-
- return op_pc+1;
-}
-uint32_t ropFISTPl(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg;
-
- uop_FP_ENTER(ir);
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- op_pc--;
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MOV_INT_DOUBLE(ir, IREG_temp0, IREG_ST(0));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
- uop_MOV_IMM(ir, IREG_tag(0), TAG_EMPTY);
- fpu_POP(block, ir);
-
- return op_pc+1;
-}
-uint32_t ropFISTPq(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg;
-
- uop_FP_ENTER(ir);
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- op_pc--;
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MOV_INT_DOUBLE_64(ir, IREG_temp0_Q, IREG_ST(0), IREG_ST_i64(0), IREG_tag(0));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_Q);
- uop_MOV_IMM(ir, IREG_tag(0), TAG_EMPTY);
- fpu_POP(block, ir);
-
- return op_pc+1;
-}
diff --git a/src/codegen_ops_fpu_loadstore.h b/src/codegen_ops_fpu_loadstore.h
deleted file mode 100644
index b206f96..0000000
--- a/src/codegen_ops_fpu_loadstore.h
+++ /dev/null
@@ -1,17 +0,0 @@
-uint32_t ropFLDs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFLDd(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropFSTs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFSTPs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFSTd(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFSTPd(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropFILDw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFILDl(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFILDq(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropFISTw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFISTPw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFISTl(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFISTPl(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFISTPq(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
diff --git a/src/codegen_ops_fpu_misc.c b/src/codegen_ops_fpu_misc.c
deleted file mode 100644
index 2848ba9..0000000
--- a/src/codegen_ops_fpu_misc.c
+++ /dev/null
@@ -1,111 +0,0 @@
-#include "ibm.h"
-
-#include "x86.h"
-#include "x86_flags.h"
-#include "386_common.h"
-#include "x87.h"
-#include "codegen.h"
-#include "codegen_accumulate.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_fpu_misc.h"
-#include "codegen_ops_helpers.h"
-
-uint32_t ropFFREE(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_MOV(ir, IREG_tag(dest_reg), TAG_EMPTY);
-
- return op_pc;
-}
-
-uint32_t ropFLD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_MOV(ir, IREG_ST(-1), IREG_ST(src_reg));
- uop_MOV(ir, IREG_ST_i64(-1), IREG_ST_i64(src_reg));
- uop_MOV(ir, IREG_tag(-1), IREG_tag(src_reg));
- fpu_PUSH(block, ir);
-
- return op_pc;
-}
-
-uint32_t ropFST(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_MOV(ir, IREG_ST(dest_reg), IREG_ST(0));
- uop_MOV(ir, IREG_ST_i64(dest_reg), IREG_ST_i64(0));
- uop_MOV(ir, IREG_tag(dest_reg), IREG_tag(0));
-
- return op_pc;
-}
-uint32_t ropFSTP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_MOV(ir, IREG_ST(dest_reg), IREG_ST(0));
- uop_MOV(ir, IREG_ST_i64(dest_reg), IREG_ST_i64(0));
- uop_MOV(ir, IREG_tag(dest_reg), IREG_tag(0));
- fpu_POP(block, ir);
-
- return op_pc;
-}
-
-uint32_t ropFSTCW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg;
-
- uop_FP_ENTER(ir);
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- op_pc--;
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_NPXC);
-
- return op_pc+1;
-}
-uint32_t ropFSTSW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg;
-
- uop_FP_ENTER(ir);
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- op_pc--;
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_NPXS);
-
- return op_pc+1;
-}
-uint32_t ropFSTSW_AX(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_FP_ENTER(ir);
- uop_MOV(ir, IREG_AX, IREG_NPXS);
-
- return op_pc;
-}
-
-uint32_t ropFXCH(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = fetchdat & 7;
-
- uop_FP_ENTER(ir);
- uop_MOV(ir, IREG_temp0_D, IREG_ST(0));
- uop_MOV(ir, IREG_temp1_Q, IREG_ST_i64(0));
- uop_MOV(ir, IREG_temp2, IREG_tag(0));
- uop_MOV(ir, IREG_ST(0), IREG_ST(dest_reg));
- uop_MOV(ir, IREG_ST_i64(0), IREG_ST_i64(dest_reg));
- uop_MOV(ir, IREG_tag(0), IREG_tag(dest_reg));
- uop_MOV(ir, IREG_ST(dest_reg), IREG_temp0_D);
- uop_MOV(ir, IREG_ST_i64(dest_reg), IREG_temp1_Q);
- uop_MOV(ir, IREG_tag(dest_reg), IREG_temp2);
-
- return op_pc;
-}
diff --git a/src/codegen_ops_fpu_misc.h b/src/codegen_ops_fpu_misc.h
deleted file mode 100644
index 257aa7a..0000000
--- a/src/codegen_ops_fpu_misc.h
+++ /dev/null
@@ -1,12 +0,0 @@
-uint32_t ropFFREE(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropFLD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropFST(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFSTP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropFSTCW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFSTSW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFSTSW_AX(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropFXCH(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
diff --git a/src/codegen_ops_helpers.c b/src/codegen_ops_helpers.c
deleted file mode 100644
index 896ac29..0000000
--- a/src/codegen_ops_helpers.c
+++ /dev/null
@@ -1,72 +0,0 @@
-#include "ibm.h"
-#include "x86.h"
-#include "386_common.h"
-#include "codegen.h"
-#include "codegen_ir.h"
-#include "codegen_ir_defs.h"
-#include "codegen_reg.h"
-#include "codegen_ops_helpers.h"
-
-void LOAD_IMMEDIATE_FROM_RAM_16_unaligned(codeblock_t *block, ir_data_t *ir, int dest_reg, uint32_t addr)
-{
- /*Word access that crosses two pages. Perform reads from both pages, shift and combine*/
- uop_MOVZX_REG_PTR_8(ir, IREG_temp3_W, get_ram_ptr(addr));
- uop_MOVZX_REG_PTR_8(ir, dest_reg, get_ram_ptr(addr+1));
- uop_SHL_IMM(ir, IREG_temp3_W, IREG_temp3_W, 8);
- uop_OR(ir, dest_reg, dest_reg, IREG_temp3_W);
-}
-
-void LOAD_IMMEDIATE_FROM_RAM_32_unaligned(codeblock_t *block, ir_data_t *ir, int dest_reg, uint32_t addr)
-{
- /*Dword access that crosses two pages. Perform reads from both pages, shift and combine*/
- uop_MOV_REG_PTR(ir, dest_reg, get_ram_ptr(addr & ~3));
- uop_MOV_REG_PTR(ir, IREG_temp3, get_ram_ptr((addr + 4) & ~3));
- uop_SHR_IMM(ir, dest_reg, dest_reg, (addr & 3) * 8);
- uop_SHL_IMM(ir, IREG_temp3, IREG_temp3, (4 - (addr & 3)) * 8);
- uop_OR(ir, dest_reg, dest_reg, IREG_temp3);
-}
-
-#define UNROLL_MAX_REG_REFERENCES 200
-#define UNROLL_MAX_UOPS 1000
-#define UNROLL_MAX_COUNT 10
-int codegen_can_unroll_full(codeblock_t *block, ir_data_t *ir, uint32_t next_pc, uint32_t dest_addr)
-{
- int start;
- int max_unroll;
- int first_instruction;
- int TOP = -1;
-
- /*Check that dest instruction was actually compiled into block*/
- start = codegen_get_instruction_uop(block, dest_addr, &first_instruction, &TOP);
-
- /*Couldn't find any uOPs corresponding to the destination instruction*/
- if (start == -1)
- {
- /*Is instruction jumping to itself?*/
- if (dest_addr != cpu_state.oldpc)
- {
-// pclog("Couldn't find start. start_pc=%08x end_pc=%08x dest_pc=%08x wr_pos=%i loop_size=%i\n", block->pc-cs, next_pc, dest_addr, ir->wr_pos, ir->wr_pos-start);
- return 0;
- }
- else
- {
- start = ir->wr_pos;
- TOP = cpu_state.TOP;
- }
- }
-
- if (TOP != cpu_state.TOP)
- return 0;
-
- max_unroll = UNROLL_MAX_UOPS / ((ir->wr_pos-start)+6);
- if (max_unroll > (UNROLL_MAX_REG_REFERENCES / max_version_refcount))
- max_unroll = (UNROLL_MAX_REG_REFERENCES / max_version_refcount);
- if (max_unroll > UNROLL_MAX_COUNT)
- max_unroll = UNROLL_MAX_COUNT;
- if (max_unroll <= 1)
- return 0;
-
- codegen_ir_set_unroll(max_unroll, start, first_instruction);
-
- return 1;
-}
diff --git a/src/codegen_ops_helpers.h b/src/codegen_ops_helpers.h
deleted file mode 100644
index ae3e5ed..0000000
--- a/src/codegen_ops_helpers.h
+++ /dev/null
@@ -1,126 +0,0 @@
-#include "386_common.h"
-#include "codegen_backend.h"
-
-static inline int LOAD_SP_WITH_OFFSET(ir_data_t *ir, int offset)
-{
- if (stack32)
- {
- if (offset)
- {
- uop_ADD_IMM(ir, IREG_eaaddr, IREG_ESP, offset);
- return IREG_eaaddr;
- }
- else
- return IREG_ESP;
- }
- else
- {
- if (offset)
- {
- uop_ADD_IMM(ir, IREG_eaaddr_W, IREG_SP, offset);
- uop_MOVZX(ir, IREG_eaaddr, IREG_eaaddr_W);
- return IREG_eaaddr;
- }
- else
- {
- uop_MOVZX(ir, IREG_eaaddr, IREG_SP);
- return IREG_eaaddr;
- }
- }
-}
-
-static inline int LOAD_SP(ir_data_t *ir)
-{
- return LOAD_SP_WITH_OFFSET(ir, 0);
-}
-
-static inline void ADD_SP(ir_data_t *ir, int offset)
-{
- if (stack32)
- uop_ADD_IMM(ir, IREG_ESP, IREG_ESP, offset);
- else
- uop_ADD_IMM(ir, IREG_SP, IREG_SP, offset);
-}
-static inline void SUB_SP(ir_data_t *ir, int offset)
-{
- if (stack32)
- uop_SUB_IMM(ir, IREG_ESP, IREG_ESP, offset);
- else
- uop_SUB_IMM(ir, IREG_SP, IREG_SP, offset);
-}
-
-static inline void fpu_POP(codeblock_t *block, ir_data_t *ir)
-{
- if (block->flags & CODEBLOCK_STATIC_TOP)
- uop_MOV_IMM(ir, IREG_FPU_TOP, cpu_state.TOP + 1);
- else
- uop_ADD_IMM(ir, IREG_FPU_TOP, IREG_FPU_TOP, 1);
-}
-static inline void fpu_POP2(codeblock_t *block, ir_data_t *ir)
-{
- if (block->flags & CODEBLOCK_STATIC_TOP)
- uop_MOV_IMM(ir, IREG_FPU_TOP, cpu_state.TOP + 2);
- else
- uop_ADD_IMM(ir, IREG_FPU_TOP, IREG_FPU_TOP, 2);
-}
-static inline void fpu_PUSH(codeblock_t *block, ir_data_t *ir)
-{
- if (block->flags & CODEBLOCK_STATIC_TOP)
- uop_MOV_IMM(ir, IREG_FPU_TOP, cpu_state.TOP - 1);
- else
- uop_SUB_IMM(ir, IREG_FPU_TOP, IREG_FPU_TOP, 1);
-}
-
-static inline void CHECK_SEG_LIMITS(codeblock_t *block, ir_data_t *ir, x86seg *seg, int addr_reg, int end_offset)
-{
- if ((seg == &cpu_state.seg_ds && codegen_flat_ds && !(cpu_cur_status & CPU_STATUS_NOTFLATDS)) ||
- (seg == &cpu_state.seg_ss && codegen_flat_ss && !(cpu_cur_status & CPU_STATUS_NOTFLATSS)))
- return;
-
- uop_CMP_JB(ir, addr_reg, ireg_seg_limit_low(seg), codegen_gpf_rout);
- if (end_offset)
- {
- uop_ADD_IMM(ir, IREG_temp3, addr_reg, end_offset);
- uop_CMP_JNBE(ir, IREG_temp3, ireg_seg_limit_high(seg), codegen_gpf_rout);
- }
- else
- uop_CMP_JNBE(ir, addr_reg, ireg_seg_limit_high(seg), codegen_gpf_rout);
-}
-
-static inline void LOAD_IMMEDIATE_FROM_RAM_8(codeblock_t *block, ir_data_t *ir, int dest_reg, uint32_t addr)
-{
- uop_MOVZX_REG_PTR_8(ir, dest_reg, get_ram_ptr(addr));
-}
-
-void LOAD_IMMEDIATE_FROM_RAM_16_unaligned(codeblock_t *block, ir_data_t *ir, int dest_reg, uint32_t addr);
-static inline void LOAD_IMMEDIATE_FROM_RAM_16(codeblock_t *block, ir_data_t *ir, int dest_reg, uint32_t addr)
-{
- if ((addr & 0xfff) == 0xfff)
- LOAD_IMMEDIATE_FROM_RAM_16_unaligned(block, ir, dest_reg, addr);
- else
- uop_MOVZX_REG_PTR_16(ir, dest_reg, get_ram_ptr(addr));
-}
-
-void LOAD_IMMEDIATE_FROM_RAM_32_unaligned(codeblock_t *block, ir_data_t *ir, int dest_reg, uint32_t addr);
-static inline void LOAD_IMMEDIATE_FROM_RAM_32(codeblock_t *block, ir_data_t *ir, int dest_reg, uint32_t addr)
-{
- if ((addr & 0xfff) >= 0xffd)
- LOAD_IMMEDIATE_FROM_RAM_32_unaligned(block, ir, dest_reg, addr);
- else
- uop_MOV_REG_PTR(ir, dest_reg, get_ram_ptr(addr));
-}
-
-int codegen_can_unroll_full(codeblock_t *block, ir_data_t *ir, uint32_t next_pc, uint32_t dest_addr);
-static inline int codegen_can_unroll(codeblock_t *block, ir_data_t *ir, uint32_t next_pc, uint32_t dest_addr)
-{
- if (block->flags & CODEBLOCK_BYTE_MASK)
- return 0;
-
- /*Is dest within block?*/
- if (dest_addr > next_pc)
- return 0;
- if ((cs+dest_addr) < block->pc)
- return 0;
-
- return codegen_can_unroll_full(block, ir, next_pc, dest_addr);
-}
diff --git a/src/codegen_ops_jump.c b/src/codegen_ops_jump.c
deleted file mode 100644
index 5e4cda4..0000000
--- a/src/codegen_ops_jump.c
+++ /dev/null
@@ -1,289 +0,0 @@
-#include "ibm.h"
-
-#include "x86.h"
-#include "386_common.h"
-#include "codegen.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_helpers.h"
-#include "codegen_ops_mov.h"
-
-uint32_t ropJMP_r8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint32_t offset = (int32_t)(int8_t)fastreadb(cs + op_pc);
- uint32_t dest_addr = op_pc+1+offset;
-
- if (!(op_32 & 0x100))
- dest_addr &= 0xffff;
-
- if (offset < 0)
- codegen_can_unroll(block, ir, op_pc+1, dest_addr);
- codegen_mark_code_present(block, cs+op_pc, 1);
- return dest_addr;
-}
-uint32_t ropJMP_r16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint32_t offset = (int32_t)(int16_t)fastreadw(cs + op_pc);
- uint32_t dest_addr = op_pc+2+offset;
-
- dest_addr &= 0xffff;
-
- if (offset < 0)
- codegen_can_unroll(block, ir, op_pc+1, dest_addr);
- codegen_mark_code_present(block, cs+op_pc, 2);
- return dest_addr;
-}
-uint32_t ropJMP_r32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint32_t offset = fastreadl(cs + op_pc);
- uint32_t dest_addr = op_pc+4+offset;
-
- if (offset < 0)
- codegen_can_unroll(block, ir, op_pc+1, dest_addr);
- codegen_mark_code_present(block, cs+op_pc, 4);
- return dest_addr;
-}
-
-uint32_t ropJMP_far_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint16_t new_pc = fastreadw(cs + op_pc);
- uint16_t new_cs = fastreadw(cs + op_pc + 2);
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- uop_MOV_IMM(ir, IREG_pc, new_pc);
- uop_LOAD_FUNC_ARG_IMM(ir, 0, new_cs);
- uop_LOAD_FUNC_ARG_IMM(ir, 1, op_pc + 4);
- uop_CALL_FUNC(ir, loadcsjmp);
-
- codegen_mark_code_present(block, cs+op_pc, 4);
- return -1;
-}
-uint32_t ropJMP_far_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint32_t new_pc = fastreadl(cs + op_pc);
- uint16_t new_cs = fastreadw(cs + op_pc + 4);
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- uop_MOV_IMM(ir, IREG_pc, new_pc);
- uop_LOAD_FUNC_ARG_IMM(ir, 0, new_cs);
- uop_LOAD_FUNC_ARG_IMM(ir, 1, op_pc + 4);
- uop_CALL_FUNC(ir, loadcsjmp);
-
- codegen_mark_code_present(block, cs+op_pc, 6);
- return -1;
-}
-
-uint32_t ropCALL_r16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint32_t offset = (int32_t)(int16_t)fastreadw(cs + op_pc);
- uint16_t ret_addr = op_pc + 2;
- uint16_t dest_addr = ret_addr + offset;
- int sp_reg;
-
- dest_addr &= 0xffff;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- sp_reg = LOAD_SP_WITH_OFFSET(ir, -2);
- uop_MEM_STORE_IMM_16(ir, IREG_SS_base, sp_reg, ret_addr);
- SUB_SP(ir, 2);
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
-
- codegen_mark_code_present(block, cs+op_pc, 2);
- return -1;
-}
-uint32_t ropCALL_r32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint32_t offset = fastreadl(cs + op_pc);
- uint32_t ret_addr = op_pc + 4;
- uint32_t dest_addr = ret_addr + offset;
- int sp_reg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- sp_reg = LOAD_SP_WITH_OFFSET(ir, -4);
- uop_MEM_STORE_IMM_32(ir, IREG_SS_base, sp_reg, ret_addr);
- SUB_SP(ir, 4);
- uop_MOV_IMM(ir, IREG_pc, dest_addr);
-
- codegen_mark_code_present(block, cs+op_pc, 4);
- return -1;
-}
-
-uint32_t ropRET_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
-
- if (stack32)
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_ESP);
- else
- {
- uop_MOVZX(ir, IREG_eaaddr, IREG_SP);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_eaaddr);
- }
- ADD_SP(ir, 2);
- uop_MOVZX(ir, IREG_pc, IREG_temp0_W);
-
- return -1;
-}
-uint32_t ropRET_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
-
- if (stack32)
- uop_MEM_LOAD_REG(ir, IREG_pc, IREG_SS_base, IREG_ESP);
- else
- {
- uop_MOVZX(ir, IREG_eaaddr, IREG_SP);
- uop_MEM_LOAD_REG(ir, IREG_pc, IREG_SS_base, IREG_eaaddr);
- }
- ADD_SP(ir, 4);
-
- return -1;
-}
-
-uint32_t ropRET_imm_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint16_t offset = fastreadw(cs + op_pc);
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
-
- if (stack32)
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_ESP);
- else
- {
- uop_MOVZX(ir, IREG_eaaddr, IREG_SP);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_eaaddr);
- }
- ADD_SP(ir, 2+offset);
- uop_MOVZX(ir, IREG_pc, IREG_temp0_W);
-
- codegen_mark_code_present(block, cs+op_pc, 2);
- return -1;
-}
-uint32_t ropRET_imm_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint16_t offset = fastreadw(cs + op_pc);
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
-
- if (stack32)
- uop_MEM_LOAD_REG(ir, IREG_pc, IREG_SS_base, IREG_ESP);
- else
- {
- uop_MOVZX(ir, IREG_eaaddr, IREG_SP);
- uop_MEM_LOAD_REG(ir, IREG_pc, IREG_SS_base, IREG_eaaddr);
- }
- ADD_SP(ir, 4+offset);
-
- codegen_mark_code_present(block, cs+op_pc, 2);
- return -1;
-}
-
-uint32_t ropRETF_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- if ((msw&1) && !(cpu_state.eflags&VM_FLAG))
- return 0;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
-
- if (stack32)
- {
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_ESP);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_temp1_W, IREG_SS_base, IREG_ESP, 2);
- }
- else
- {
- uop_MOVZX(ir, IREG_eaaddr, IREG_SP);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_eaaddr);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_temp1_W, IREG_SS_base, IREG_eaaddr, 2);
- }
- uop_MOVZX(ir, IREG_pc, IREG_temp0_W);
- uop_LOAD_FUNC_ARG_REG(ir, 0, IREG_temp1_W);
- uop_CALL_FUNC(ir, loadcs);
- ADD_SP(ir, 4);
-
- return -1;
-}
-uint32_t ropRETF_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- if ((msw&1) && !(cpu_state.eflags&VM_FLAG))
- return 0;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
-
- if (stack32)
- {
- uop_MEM_LOAD_REG(ir, IREG_temp0, IREG_SS_base, IREG_ESP);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_temp1_W, IREG_SS_base, IREG_ESP, 4);
- }
- else
- {
- uop_MOVZX(ir, IREG_eaaddr, IREG_SP);
- uop_MEM_LOAD_REG(ir, IREG_temp0, IREG_SS_base, IREG_eaaddr);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_temp1_W, IREG_SS_base, IREG_eaaddr, 4);
- }
- uop_MOV(ir, IREG_pc, IREG_temp0);
- uop_LOAD_FUNC_ARG_REG(ir, 0, IREG_temp1_W);
- uop_CALL_FUNC(ir, loadcs);
- ADD_SP(ir, 8);
-
- return -1;
-}
-
-uint32_t ropRETF_imm_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint16_t offset;
-
- if ((msw&1) && !(cpu_state.eflags&VM_FLAG))
- return 0;
-
- offset = fastreadw(cs + op_pc);
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
-
- if (stack32)
- {
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_ESP);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_temp1_W, IREG_SS_base, IREG_ESP, 2);
- }
- else
- {
- uop_MOVZX(ir, IREG_eaaddr, IREG_SP);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_eaaddr);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_temp1_W, IREG_SS_base, IREG_eaaddr, 2);
- }
- uop_MOVZX(ir, IREG_pc, IREG_temp0_W);
- uop_LOAD_FUNC_ARG_REG(ir, 0, IREG_temp1_W);
- uop_CALL_FUNC(ir, loadcs);
- ADD_SP(ir, 4+offset);
-
- codegen_mark_code_present(block, cs+op_pc, 2);
- return -1;
-}
-uint32_t ropRETF_imm_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint16_t offset;
-
- if ((msw&1) && !(cpu_state.eflags&VM_FLAG))
- return 0;
-
- offset = fastreadw(cs + op_pc);
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
-
- if (stack32)
- {
- uop_MEM_LOAD_REG(ir, IREG_temp0, IREG_SS_base, IREG_ESP);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_temp1_W, IREG_SS_base, IREG_ESP, 4);
- }
- else
- {
- uop_MOVZX(ir, IREG_eaaddr, IREG_SP);
- uop_MEM_LOAD_REG(ir, IREG_temp0, IREG_SS_base, IREG_eaaddr);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_temp1_W, IREG_SS_base, IREG_eaaddr, 4);
- }
- uop_MOV(ir, IREG_pc, IREG_temp0);
- uop_LOAD_FUNC_ARG_REG(ir, 0, IREG_temp1_W);
- uop_CALL_FUNC(ir, loadcs);
- ADD_SP(ir, 8+offset);
-
- codegen_mark_code_present(block, cs+op_pc, 2);
- return -1;
-}
diff --git a/src/codegen_ops_jump.h b/src/codegen_ops_jump.h
index db4c95c..d2271cf 100644
--- a/src/codegen_ops_jump.h
+++ b/src/codegen_ops_jump.h
@@ -1,21 +1,270 @@
-uint32_t ropJMP_r8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJMP_r16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJMP_r32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+static uint32_t ropJMP_r8(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint32_t offset = fetchdat & 0xff;
-uint32_t ropJMP_far_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropJMP_far_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ if (offset & 0x80)
+ offset |= 0xffffff00;
-uint32_t ropCALL_r16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropCALL_r32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.pc, op_pc+1+offset);
+
+ return -1;
+}
-uint32_t ropRET_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropRET_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+static uint32_t ropJMP_r16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint16_t offset = fetchdat & 0xffff;
-uint32_t ropRET_imm_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropRET_imm_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.pc, (op_pc+2+offset) & 0xffff);
+
+ return -1;
+}
-uint32_t ropRETF_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropRETF_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+static uint32_t ropJMP_r32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint32_t offset = fastreadl(cs + op_pc);
-uint32_t ropRETF_imm_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropRETF_imm_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.pc, op_pc+4+offset);
+
+ return -1;
+}
+
+
+static uint32_t ropJCXZ(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint32_t offset = fetchdat & 0xff;
+
+ if (offset & 0x80)
+ offset |= 0xffffff00;
+
+ if (op_32 & 0x200)
+ {
+ int host_reg = LOAD_REG_L(REG_ECX);
+ TEST_ZERO_JUMP_L(host_reg, op_pc+1+offset, 0);
+ }
+ else
+ {
+ int host_reg = LOAD_REG_W(REG_CX);
+ TEST_ZERO_JUMP_W(host_reg, op_pc+1+offset, 0);
+ }
+
+ return op_pc+1;
+}
+
+static uint32_t ropLOOP(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint32_t offset = fetchdat & 0xff;
+
+ if (offset & 0x80)
+ offset |= 0xffffff00;
+
+ if (op_32 & 0x200)
+ {
+ int host_reg = LOAD_REG_L(REG_ECX);
+ SUB_HOST_REG_IMM(host_reg, 1);
+ STORE_REG_L_RELEASE(host_reg);
+ TEST_NONZERO_JUMP_L(host_reg, op_pc+1+offset, 0);
+ }
+ else
+ {
+ int host_reg = LOAD_REG_W(REG_CX);
+ SUB_HOST_REG_IMM(host_reg, 1);
+ STORE_REG_W_RELEASE(host_reg);
+ TEST_NONZERO_JUMP_W(host_reg, op_pc+1+offset, 0);
+ }
+
+ return op_pc+1;
+}
+
+static void BRANCH_COND_B(int pc_offset, uint32_t op_pc, uint32_t offset, int not)
+{
+ CALL_FUNC((uintptr_t)CF_SET);
+ if (not)
+ TEST_ZERO_JUMP_L(0, op_pc+pc_offset+offset, timing_bt);
+ else
+ TEST_NONZERO_JUMP_L(0, op_pc+pc_offset+offset, timing_bt);
+}
+
+static void BRANCH_COND_E(int pc_offset, uint32_t op_pc, uint32_t offset, int not)
+{
+ int host_reg;
+
+ switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN)
+ {
+ case FLAGS_ZN8:
+ case FLAGS_ZN16:
+ case FLAGS_ZN32:
+ case FLAGS_ADD8:
+ case FLAGS_ADD16:
+ case FLAGS_ADD32:
+ case FLAGS_SUB8:
+ case FLAGS_SUB16:
+ case FLAGS_SUB32:
+ case FLAGS_SHL8:
+ case FLAGS_SHL16:
+ case FLAGS_SHL32:
+ case FLAGS_SHR8:
+ case FLAGS_SHR16:
+ case FLAGS_SHR32:
+ case FLAGS_SAR8:
+ case FLAGS_SAR16:
+ case FLAGS_SAR32:
+ case FLAGS_INC8:
+ case FLAGS_INC16:
+ case FLAGS_INC32:
+ case FLAGS_DEC8:
+ case FLAGS_DEC16:
+ case FLAGS_DEC32:
+ host_reg = LOAD_VAR_L((uintptr_t)&cpu_state.flags_res);
+ if (not)
+ TEST_NONZERO_JUMP_L(host_reg, op_pc+pc_offset+offset, timing_bt);
+ else
+ TEST_ZERO_JUMP_L(host_reg, op_pc+pc_offset+offset, timing_bt);
+ break;
+
+ case FLAGS_UNKNOWN:
+ CALL_FUNC((uintptr_t)ZF_SET);
+ if (not)
+ TEST_ZERO_JUMP_L(0, op_pc+pc_offset+offset, timing_bt);
+ else
+ TEST_NONZERO_JUMP_L(0, op_pc+pc_offset+offset, timing_bt);
+ break;
+ }
+}
+
+static void BRANCH_COND_O(int pc_offset, uint32_t op_pc, uint32_t offset, int not)
+{
+ CALL_FUNC((uintptr_t)VF_SET);
+ if (not)
+ TEST_ZERO_JUMP_L(0, op_pc+pc_offset+offset, timing_bt);
+ else
+ TEST_NONZERO_JUMP_L(0, op_pc+pc_offset+offset, timing_bt);
+}
+
+static void BRANCH_COND_P(int pc_offset, uint32_t op_pc, uint32_t offset, int not)
+{
+ CALL_FUNC((uintptr_t)PF_SET);
+ if (not)
+ TEST_ZERO_JUMP_L(0, op_pc+pc_offset+offset, timing_bt);
+ else
+ TEST_NONZERO_JUMP_L(0, op_pc+pc_offset+offset, timing_bt);
+}
+
+static void BRANCH_COND_S(int pc_offset, uint32_t op_pc, uint32_t offset, int not)
+{
+ int host_reg;
+
+ switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN)
+ {
+ case FLAGS_ZN8:
+ case FLAGS_ADD8:
+ case FLAGS_SUB8:
+ case FLAGS_SHL8:
+ case FLAGS_SHR8:
+ case FLAGS_SAR8:
+ case FLAGS_INC8:
+ case FLAGS_DEC8:
+ host_reg = LOAD_VAR_L((uintptr_t)&cpu_state.flags_res);
+ AND_HOST_REG_IMM(host_reg, 0x80);
+ if (not)
+ TEST_ZERO_JUMP_L(host_reg, op_pc+pc_offset+offset, timing_bt);
+ else
+ TEST_NONZERO_JUMP_L(host_reg, op_pc+pc_offset+offset, timing_bt);
+ break;
+
+ case FLAGS_ZN16:
+ case FLAGS_ADD16:
+ case FLAGS_SUB16:
+ case FLAGS_SHL16:
+ case FLAGS_SHR16:
+ case FLAGS_SAR16:
+ case FLAGS_INC16:
+ case FLAGS_DEC16:
+ host_reg = LOAD_VAR_L((uintptr_t)&cpu_state.flags_res);
+ AND_HOST_REG_IMM(host_reg, 0x8000);
+ if (not)
+ TEST_ZERO_JUMP_L(host_reg, op_pc+pc_offset+offset, timing_bt);
+ else
+ TEST_NONZERO_JUMP_L(host_reg, op_pc+pc_offset+offset, timing_bt);
+ break;
+
+ case FLAGS_ZN32:
+ case FLAGS_ADD32:
+ case FLAGS_SUB32:
+ case FLAGS_SHL32:
+ case FLAGS_SHR32:
+ case FLAGS_SAR32:
+ case FLAGS_INC32:
+ case FLAGS_DEC32:
+ host_reg = LOAD_VAR_L((uintptr_t)&cpu_state.flags_res);
+ AND_HOST_REG_IMM(host_reg, 0x80000000);
+ if (not)
+ TEST_ZERO_JUMP_L(host_reg, op_pc+pc_offset+offset, timing_bt);
+ else
+ TEST_NONZERO_JUMP_L(host_reg, op_pc+pc_offset+offset, timing_bt);
+ break;
+
+ case FLAGS_UNKNOWN:
+ CALL_FUNC((uintptr_t)NF_SET);
+ if (not)
+ TEST_ZERO_JUMP_L(0, op_pc+pc_offset+offset, timing_bt);
+ else
+ TEST_NONZERO_JUMP_L(0, op_pc+pc_offset+offset, timing_bt);
+ break;
+ }
+}
+
+
+#define ropBRANCH(name, func, not) \
+static uint32_t rop ## name(uint8_t opcode, uint32_t fetchdat, \
+ uint32_t op_32, uint32_t op_pc, \
+ codeblock_t *block) \
+{ \
+ uint32_t offset = fetchdat & 0xff; \
+ \
+ if (offset & 0x80) \
+ offset |= 0xffffff00; \
+ \
+ func(1, op_pc, offset, not); \
+ \
+ return op_pc+1; \
+} \
+static uint32_t rop ## name ## _w(uint8_t opcode, \
+ uint32_t fetchdat, uint32_t op_32, \
+ uint32_t op_pc, codeblock_t *block) \
+{ \
+ uint32_t offset = fetchdat & 0xffff; \
+ \
+ if (offset & 0x8000) \
+ offset |= 0xffff0000; \
+ \
+ func(2, op_pc, offset, not); \
+ \
+ return op_pc+2; \
+} \
+static uint32_t rop ## name ## _l(uint8_t opcode, \
+ uint32_t fetchdat, uint32_t op_32, \
+ uint32_t op_pc, codeblock_t *block) \
+{ \
+ uint32_t offset = fastreadl(cs + op_pc); \
+ \
+ func(4, op_pc, offset, not); \
+ \
+ return op_pc+4; \
+}
+
+ropBRANCH(JB, BRANCH_COND_B, 0)
+ropBRANCH(JNB, BRANCH_COND_B, 1)
+ropBRANCH(JE, BRANCH_COND_E, 0)
+ropBRANCH(JNE, BRANCH_COND_E, 1)
+ropBRANCH(JO, BRANCH_COND_O, 0)
+ropBRANCH(JNO, BRANCH_COND_O, 1)
+ropBRANCH(JP, BRANCH_COND_P, 0)
+ropBRANCH(JNP, BRANCH_COND_P, 1)
+ropBRANCH(JS, BRANCH_COND_S, 0)
+ropBRANCH(JNS, BRANCH_COND_S, 1)
+ropBRANCH(JL, BRANCH_COND_L, 0)
+ropBRANCH(JNL, BRANCH_COND_L, 1)
+ropBRANCH(JLE, BRANCH_COND_LE, 0)
+ropBRANCH(JNLE, BRANCH_COND_LE, 1)
+ropBRANCH(JBE, BRANCH_COND_BE, 0)
+ropBRANCH(JNBE, BRANCH_COND_BE, 1)
diff --git a/src/codegen_ops_logic.c b/src/codegen_ops_logic.c
deleted file mode 100644
index 015031f..0000000
--- a/src/codegen_ops_logic.c
+++ /dev/null
@@ -1,804 +0,0 @@
-#include "ibm.h"
-
-#include "x86.h"
-#include "x86_flags.h"
-#include "386_common.h"
-#include "codegen.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_helpers.h"
-#include "codegen_ops_logic.h"
-
-uint32_t ropAND_AL_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint8_t imm_data = fastreadb(cs + op_pc);
-
- uop_AND_IMM(ir, IREG_AL, IREG_AL, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN8);
- uop_MOVZX(ir, IREG_flags_res, IREG_AL);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 1);
- return op_pc + 1;
-}
-uint32_t ropAND_AX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint16_t imm_data = fastreadw(cs + op_pc);
-
- uop_AND_IMM(ir, IREG_AX, IREG_AX, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
- uop_MOVZX(ir, IREG_flags_res, IREG_AX);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 2);
- return op_pc + 2;
-}
-uint32_t ropAND_EAX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- LOAD_IMMEDIATE_FROM_RAM_32(block, ir, IREG_temp0, cs + op_pc);
- uop_AND(ir, IREG_EAX, IREG_EAX, IREG_temp0);
- }
- else
- {
- fetchdat = fastreadl(cs + op_pc);
- codegen_mark_code_present(block, cs+op_pc, 4);
- uop_AND_IMM(ir, IREG_EAX, IREG_EAX, fetchdat);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
- uop_MOV(ir, IREG_flags_res, IREG_EAX);
-
- codegen_flags_changed = 1;
- return op_pc + 4;
-}
-uint32_t ropAND_b_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_AND(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_8(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_AND(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp0_B);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropAND_b_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_AND(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_8(src_reg));
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_AND(ir, IREG_temp0_B, IREG_temp0_B, IREG_8(src_reg));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_B);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_B);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN8);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropAND_w_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_AND(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_16(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_AND(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp0_W);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropAND_w_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_AND(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_16(src_reg));
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_AND(ir, IREG_temp0_W, IREG_temp0_W, IREG_16(src_reg));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_W);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropAND_l_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_AND(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_32(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_AND(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp0);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropAND_l_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_AND(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_32(src_reg));
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_AND(ir, IREG_temp0, IREG_temp0, IREG_32(src_reg));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
- uop_MOV(ir, IREG_flags_res, IREG_temp0);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-
-uint32_t ropOR_AL_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint8_t imm_data = fastreadb(cs + op_pc);
-
- uop_OR_IMM(ir, IREG_AL, IREG_AL, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN8);
- uop_MOVZX(ir, IREG_flags_res, IREG_AL);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 1);
- return op_pc + 1;
-}
-uint32_t ropOR_AX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint16_t imm_data = fastreadw(cs + op_pc);
-
- uop_OR_IMM(ir, IREG_AX, IREG_AX, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
- uop_MOVZX(ir, IREG_flags_res, IREG_AX);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 2);
- return op_pc + 2;
-}
-uint32_t ropOR_EAX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- LOAD_IMMEDIATE_FROM_RAM_32(block, ir, IREG_temp0, cs + op_pc);
- uop_OR(ir, IREG_EAX, IREG_EAX, IREG_temp0);
- }
- else
- {
- fetchdat = fastreadl(cs + op_pc);
- codegen_mark_code_present(block, cs+op_pc, 4);
- uop_OR_IMM(ir, IREG_EAX, IREG_EAX, fetchdat);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
- uop_MOV(ir, IREG_flags_res, IREG_EAX);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 4);
- return op_pc + 4;
-}
-uint32_t ropOR_b_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_OR(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_8(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_OR(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp0_B);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropOR_b_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_OR(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_8(src_reg));
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_OR(ir, IREG_temp0_B, IREG_temp0_B, IREG_8(src_reg));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_B);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_B);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN8);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropOR_w_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_OR(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_16(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_OR(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp0_W);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropOR_w_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_OR(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_16(src_reg));
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_OR(ir, IREG_temp0_W, IREG_temp0_W, IREG_16(src_reg));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_W);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropOR_l_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_OR(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_32(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_OR(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp0);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
- uop_MOV(ir, IREG_flags_res, dest_reg);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropOR_l_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_OR(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_32(src_reg));
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_OR(ir, IREG_temp0, IREG_temp0, IREG_32(src_reg));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
- uop_MOV(ir, IREG_flags_res, IREG_temp0);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-
-uint32_t ropTEST_AL_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint8_t imm_data = fastreadb(cs + op_pc);
-
- uop_AND_IMM(ir, IREG_flags_res, IREG_EAX, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN8);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 1);
- return op_pc + 1;
-}
-uint32_t ropTEST_AX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint16_t imm_data = fastreadw(cs + op_pc);
-
- uop_AND_IMM(ir, IREG_flags_res, IREG_EAX, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 2);
- return op_pc + 2;
-}
-uint32_t ropTEST_EAX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- LOAD_IMMEDIATE_FROM_RAM_32(block, ir, IREG_temp0, cs + op_pc);
- uop_AND(ir, IREG_flags_res, IREG_EAX, IREG_temp0);
- }
- else
- {
- fetchdat = fastreadl(cs + op_pc);
- codegen_mark_code_present(block, cs+op_pc, 4);
- uop_AND_IMM(ir, IREG_flags_res, IREG_EAX, fetchdat);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 4);
- return op_pc + 4;
-}
-uint32_t ropTEST_b_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_AND(ir, IREG_flags_res_B, IREG_8(dest_reg), IREG_8(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_AND(ir, IREG_flags_res_B, IREG_8(dest_reg), IREG_temp0_B);
- }
-
- uop_MOVZX(ir, IREG_flags_res, IREG_flags_res_B);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN8);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropTEST_w_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_AND(ir, IREG_flags_res_W, IREG_16(dest_reg), IREG_16(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_AND(ir, IREG_flags_res_W, IREG_16(dest_reg), IREG_temp0_W);
- }
-
- uop_MOVZX(ir, IREG_flags_res, IREG_flags_res_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropTEST_l_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_AND(ir, IREG_flags_res, IREG_32(dest_reg), IREG_32(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_AND(ir, IREG_flags_res, IREG_32(dest_reg), IREG_temp0);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-
-uint32_t ropXOR_AL_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint8_t imm_data = fastreadb(cs + op_pc);
-
- uop_XOR_IMM(ir, IREG_AL, IREG_AL, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN8);
- uop_MOVZX(ir, IREG_flags_res, IREG_AL);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 1);
- return op_pc + 1;
-}
-uint32_t ropXOR_AX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint16_t imm_data = fastreadw(cs + op_pc);
-
- uop_XOR_IMM(ir, IREG_AX, IREG_AX, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
- uop_MOVZX(ir, IREG_flags_res, IREG_AX);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 2);
- return op_pc + 2;
-}
-uint32_t ropXOR_EAX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- LOAD_IMMEDIATE_FROM_RAM_32(block, ir, IREG_temp0, cs + op_pc);
- uop_XOR(ir, IREG_EAX, IREG_EAX, IREG_temp0);
- }
- else
- {
- fetchdat = fastreadl(cs + op_pc);
- codegen_mark_code_present(block, cs+op_pc, 4);
- uop_XOR_IMM(ir, IREG_EAX, IREG_EAX, fetchdat);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
- uop_MOV(ir, IREG_flags_res, IREG_EAX);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc, 4);
- return op_pc + 4;
-}
-uint32_t ropXOR_b_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_XOR(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_8(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_XOR(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp0_B);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropXOR_b_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_XOR(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_8(src_reg));
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_XOR(ir, IREG_temp0_B, IREG_temp0_B, IREG_8(src_reg));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_B);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_B);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN8);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropXOR_w_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_XOR(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_16(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_XOR(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp0_W);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropXOR_w_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_XOR(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_16(src_reg));
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_XOR(ir, IREG_temp0_W, IREG_temp0_W, IREG_16(src_reg));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_W);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropXOR_l_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
-
- uop_XOR(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_32(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_XOR(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp0);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
- uop_MOV(ir, IREG_flags_res, dest_reg);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropXOR_l_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_XOR(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_32(src_reg));
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_XOR(ir, IREG_temp0, IREG_temp0, IREG_32(src_reg));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
- uop_MOV(ir, IREG_flags_res, IREG_temp0);
- }
-
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
diff --git a/src/codegen_ops_logic.h b/src/codegen_ops_logic.h
index d86fbb4..ca57fca 100644
--- a/src/codegen_ops_logic.h
+++ b/src/codegen_ops_logic.h
@@ -1,36 +1,564 @@
-uint32_t ropAND_AL_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropAND_AX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropAND_EAX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropAND_b_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropAND_b_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropAND_w_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropAND_w_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropAND_l_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropAND_l_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+#define ROP_LOGIC(name, op, writeback) \
+ static uint32_t rop ## name ## _b_rmw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+ { \
+ int src_reg, dst_reg; \
+ x86seg *target_seg; \
+ \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ { \
+ dst_reg = LOAD_REG_B(fetchdat & 7); \
+ } \
+ else \
+ { \
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ SAVE_EA(); \
+ MEM_CHECK_WRITE(target_seg); \
+ dst_reg = MEM_LOAD_ADDR_EA_B_NO_ABRT(target_seg); \
+ } \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN8); \
+ src_reg = LOAD_REG_B((fetchdat >> 3) & 7); \
+ op ## _HOST_REG_B(dst_reg, src_reg); \
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_res, dst_reg); \
+ if (writeback) \
+ { \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ STORE_REG_B_RELEASE(dst_reg); \
+ else \
+ { \
+ LOAD_EA(); \
+ MEM_STORE_ADDR_EA_B_NO_ABRT(target_seg, dst_reg); \
+ } \
+ } \
+ else \
+ RELEASE_REG(dst_reg); \
+ RELEASE_REG(src_reg); \
+ \
+ return op_pc + 1; \
+ } \
+ static uint32_t rop ## name ## _w_rmw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+ { \
+ int src_reg, dst_reg; \
+ x86seg *target_seg; \
+ \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ { \
+ dst_reg = LOAD_REG_W(fetchdat & 7); \
+ } \
+ else \
+ { \
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ SAVE_EA(); \
+ MEM_CHECK_WRITE_W(target_seg); \
+ dst_reg = MEM_LOAD_ADDR_EA_W_NO_ABRT(target_seg); \
+ } \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN16); \
+ src_reg = LOAD_REG_W((fetchdat >> 3) & 7); \
+ op ## _HOST_REG_W(dst_reg, src_reg); \
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, dst_reg); \
+ if (writeback) \
+ { \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ STORE_REG_W_RELEASE(dst_reg); \
+ else \
+ { \
+ LOAD_EA(); \
+ MEM_STORE_ADDR_EA_W_NO_ABRT(target_seg, dst_reg); \
+ } \
+ } \
+ else \
+ RELEASE_REG(dst_reg); \
+ RELEASE_REG(src_reg); \
+ \
+ return op_pc + 1; \
+ } \
+ static uint32_t rop ## name ## _l_rmw(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+ { \
+ int src_reg, dst_reg; \
+ x86seg *target_seg; \
+ \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ { \
+ dst_reg = LOAD_REG_L(fetchdat & 7); \
+ } \
+ else \
+ { \
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ SAVE_EA(); \
+ MEM_CHECK_WRITE_L(target_seg); \
+ dst_reg = MEM_LOAD_ADDR_EA_L_NO_ABRT(target_seg); \
+ } \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN32); \
+ src_reg = LOAD_REG_L((fetchdat >> 3) & 7); \
+ op ## _HOST_REG_L(dst_reg, src_reg); \
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, dst_reg); \
+ if (writeback) \
+ { \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ STORE_REG_L_RELEASE(dst_reg); \
+ else \
+ { \
+ LOAD_EA(); \
+ MEM_STORE_ADDR_EA_L_NO_ABRT(target_seg, dst_reg); \
+ } \
+ } \
+ else \
+ RELEASE_REG(dst_reg); \
+ RELEASE_REG(src_reg); \
+ \
+ return op_pc + 1; \
+ } \
+ static uint32_t rop ## name ## _b_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+ { \
+ int src_reg, dst_reg; \
+ \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ { \
+ src_reg = LOAD_REG_B(fetchdat & 7); \
+ } \
+ else \
+ { \
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ MEM_LOAD_ADDR_EA_B(target_seg); \
+ src_reg = 0; \
+ } \
+ \
+ dst_reg = LOAD_REG_B((fetchdat >> 3) & 7); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN8); \
+ op ## _HOST_REG_B(dst_reg, src_reg); \
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_res, dst_reg); \
+ if (writeback) STORE_REG_B_RELEASE(dst_reg); \
+ else RELEASE_REG(dst_reg); \
+ RELEASE_REG(src_reg); \
+ \
+ return op_pc + 1; \
+ } \
+ static uint32_t rop ## name ## _w_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+ { \
+ int src_reg, dst_reg; \
+ \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ { \
+ src_reg = LOAD_REG_W(fetchdat & 7); \
+ } \
+ else \
+ { \
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ MEM_LOAD_ADDR_EA_W(target_seg); \
+ src_reg = 0; \
+ } \
+ \
+ dst_reg = LOAD_REG_W((fetchdat >> 3) & 7); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN16); \
+ op ## _HOST_REG_W(dst_reg, src_reg); \
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, dst_reg); \
+ if (writeback) STORE_REG_W_RELEASE(dst_reg); \
+ else RELEASE_REG(dst_reg); \
+ RELEASE_REG(src_reg); \
+ \
+ return op_pc + 1; \
+ } \
+ static uint32_t rop ## name ## _l_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+ { \
+ int src_reg, dst_reg; \
+ \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ { \
+ src_reg = LOAD_REG_L(fetchdat & 7); \
+ } \
+ else \
+ { \
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ MEM_LOAD_ADDR_EA_L(target_seg); \
+ src_reg = 0; \
+ } \
+ \
+ dst_reg = LOAD_REG_L((fetchdat >> 3) & 7); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN32); \
+ op ## _HOST_REG_L(dst_reg, src_reg); \
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, dst_reg); \
+ if (writeback) STORE_REG_L_RELEASE(dst_reg); \
+ else RELEASE_REG(dst_reg); \
+ RELEASE_REG(src_reg); \
+ \
+ return op_pc + 1; \
+ }
-uint32_t ropOR_AL_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropOR_AX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropOR_EAX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropOR_b_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropOR_b_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropOR_w_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropOR_w_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropOR_l_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropOR_l_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ROP_LOGIC(AND, AND, 1)
+ROP_LOGIC(OR, OR, 1)
+ROP_LOGIC(XOR, XOR, 1)
-uint32_t ropTEST_AL_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropTEST_AX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropTEST_EAX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropTEST_b_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropTEST_w_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropTEST_l_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+static uint32_t ropTEST_b_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int src_reg, dst_reg;
-uint32_t ropXOR_AL_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropXOR_AX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropXOR_EAX_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropXOR_b_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropXOR_b_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropXOR_w_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropXOR_w_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropXOR_l_rm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropXOR_l_rmw(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ src_reg = LOAD_REG_B(fetchdat & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ MEM_LOAD_ADDR_EA_B(target_seg);
+ src_reg = 0;
+ }
+
+ dst_reg = LOAD_REG_B((fetchdat >> 3) & 7);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN8);
+ dst_reg = TEST_HOST_REG_B(dst_reg, src_reg);
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_res, dst_reg);
+ RELEASE_REG(dst_reg);
+ RELEASE_REG(src_reg);
+
+ return op_pc + 1;
+}
+static uint32_t ropTEST_w_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int src_reg, dst_reg;
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ src_reg = LOAD_REG_W(fetchdat & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ MEM_LOAD_ADDR_EA_W(target_seg);
+ src_reg = 0;
+ }
+
+ dst_reg = LOAD_REG_W((fetchdat >> 3) & 7);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN16);
+ dst_reg = TEST_HOST_REG_W(dst_reg, src_reg);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, dst_reg);
+ RELEASE_REG(dst_reg);
+ RELEASE_REG(src_reg);
+
+ return op_pc + 1;
+}
+static uint32_t ropTEST_l_rm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int src_reg, dst_reg;
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ src_reg = LOAD_REG_L(fetchdat & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ MEM_LOAD_ADDR_EA_L(target_seg);
+ src_reg = 0;
+ }
+
+ dst_reg = LOAD_REG_L((fetchdat >> 3) & 7);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN32);
+ dst_reg = TEST_HOST_REG_L(dst_reg, src_reg);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, dst_reg);
+ RELEASE_REG(dst_reg);
+ RELEASE_REG(src_reg);
+
+ return op_pc + 1;
+}
+
+static uint32_t ropAND_AL_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_B(REG_AL);
+
+ AND_HOST_REG_IMM(host_reg, (fetchdat & 0xff) | 0xffffff00);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN8);
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_res, host_reg);
+ STORE_REG_B_RELEASE(host_reg);
+
+ return op_pc + 1;
+}
+static uint32_t ropAND_AX_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_W(REG_AX);
+
+ AND_HOST_REG_IMM(host_reg, (fetchdat & 0xffff) | 0xffff0000);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN16);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, host_reg);
+ STORE_REG_W_RELEASE(host_reg);
+
+ return op_pc + 2;
+}
+static uint32_t ropAND_EAX_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_L(REG_EAX);
+
+ fetchdat = fastreadl(cs + op_pc);
+ AND_HOST_REG_IMM(host_reg, fetchdat);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN32);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, host_reg);
+ STORE_REG_L_RELEASE(host_reg);
+
+ return op_pc + 4;
+}
+
+static uint32_t ropOR_AL_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_B(REG_AL);
+
+ OR_HOST_REG_IMM(host_reg, fetchdat & 0xff);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN8);
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_res, host_reg);
+ STORE_REG_B_RELEASE(host_reg);
+
+ return op_pc + 1;
+}
+static uint32_t ropOR_AX_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_W(REG_AX);
+
+ OR_HOST_REG_IMM(host_reg, fetchdat & 0xffff);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN16);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, host_reg);
+ STORE_REG_W_RELEASE(host_reg);
+
+ return op_pc + 2;
+}
+static uint32_t ropOR_EAX_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_L(REG_EAX);
+
+ fetchdat = fastreadl(cs + op_pc);
+ OR_HOST_REG_IMM(host_reg, fetchdat);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN32);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, host_reg);
+ STORE_REG_L_RELEASE(host_reg);
+
+ return op_pc + 4;
+}
+
+static uint32_t ropTEST_AL_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_B(REG_AL);
+
+ host_reg = TEST_HOST_REG_IMM(host_reg, fetchdat & 0xff);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN8);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, host_reg);
+ RELEASE_REG(host_reg);
+
+ return op_pc + 1;
+}
+static uint32_t ropTEST_AX_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_W(REG_AX);
+
+ host_reg = TEST_HOST_REG_IMM(host_reg, fetchdat & 0xffff);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN16);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, host_reg);
+ RELEASE_REG(host_reg);
+
+ return op_pc + 2;
+}
+static uint32_t ropTEST_EAX_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_L(REG_EAX);
+
+ fetchdat = fastreadl(cs + op_pc);
+ host_reg = TEST_HOST_REG_IMM(host_reg, fetchdat);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN32);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, host_reg);
+ RELEASE_REG(host_reg);
+
+ return op_pc + 4;
+}
+
+static uint32_t ropXOR_AL_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_B(REG_AL);
+
+ XOR_HOST_REG_IMM(host_reg, fetchdat & 0xff);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN8);
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_res, host_reg);
+ STORE_REG_B_RELEASE(host_reg);
+
+ return op_pc + 1;
+}
+static uint32_t ropXOR_AX_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_W(REG_AX);
+
+ XOR_HOST_REG_IMM(host_reg, fetchdat & 0xffff);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN16);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, host_reg);
+ STORE_REG_W_RELEASE(host_reg);
+
+ return op_pc + 2;
+}
+static uint32_t ropXOR_EAX_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_L(REG_EAX);
+
+ fetchdat = fastreadl(cs + op_pc);
+ XOR_HOST_REG_IMM(host_reg, fetchdat);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN32);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, host_reg);
+ STORE_REG_L_RELEASE(host_reg);
+
+ return op_pc + 4;
+}
+
+static uint32_t ropF6(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg;
+ int host_reg;
+ uint8_t imm;
+
+ switch (fetchdat & 0x38)
+ {
+ case 0x00: /*TEST b,#8*/
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ host_reg = LOAD_REG_B(fetchdat & 7);
+ imm = (fetchdat >> 8) & 0xff;
+ }
+ else
+ {
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ imm = fastreadb(cs + op_pc + 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ MEM_LOAD_ADDR_EA_B(target_seg);
+ host_reg = 0;
+ }
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN8);
+ host_reg = TEST_HOST_REG_IMM(host_reg, imm);
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_res, host_reg);
+ RELEASE_REG(host_reg);
+ return op_pc + 2;
+
+ case 0x10: /*NOT b*/
+ if ((fetchdat & 0xc0) != 0xc0)
+ return 0;
+ host_reg = LOAD_REG_B(fetchdat & 7);
+ XOR_HOST_REG_IMM(host_reg, 0xff);
+ STORE_REG_B_RELEASE(host_reg);
+ return op_pc + 1;
+
+ case 0x18: /*NEG b*/
+ if ((fetchdat & 0xc0) != 0xc0)
+ return 0;
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB8);
+ host_reg = LOAD_REG_B(fetchdat & 7);
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_op2, host_reg);
+ NEG_HOST_REG_B(host_reg);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op1, 0);
+ STORE_REG_B_RELEASE(host_reg);
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_res, host_reg);
+ return op_pc + 1;
+ }
+
+ return 0;
+}
+static uint32_t ropF7_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg;
+ int host_reg;
+ uint16_t imm;
+
+ switch (fetchdat & 0x38)
+ {
+ case 0x00: /*TEST w,#*/
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ host_reg = LOAD_REG_W(fetchdat & 7);
+ imm = (fetchdat >> 8) & 0xffff;
+ }
+ else
+ {
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ imm = fastreadw(cs + op_pc + 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ MEM_LOAD_ADDR_EA_W(target_seg);
+ host_reg = 0;
+ }
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN16);
+ host_reg = TEST_HOST_REG_IMM(host_reg, imm);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, host_reg);
+ RELEASE_REG(host_reg);
+ return op_pc + 3;
+
+ case 0x10: /*NOT w*/
+ if ((fetchdat & 0xc0) != 0xc0)
+ return 0;
+ host_reg = LOAD_REG_W(fetchdat & 7);
+ XOR_HOST_REG_IMM(host_reg, 0xffff);
+ STORE_REG_W_RELEASE(host_reg);
+ return op_pc + 1;
+
+ case 0x18: /*NEG w*/
+ if ((fetchdat & 0xc0) != 0xc0)
+ return 0;
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB16);
+ host_reg = LOAD_REG_W(fetchdat & 7);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op2, host_reg);
+ NEG_HOST_REG_W(host_reg);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op1, 0);
+ STORE_REG_W_RELEASE(host_reg);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, host_reg);
+ return op_pc + 1;
+ }
+
+ return 0;
+}
+static uint32_t ropF7_l(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg;
+ int host_reg;
+ uint32_t imm;
+
+ switch (fetchdat & 0x38)
+ {
+ case 0x00: /*TEST l,#*/
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ host_reg = LOAD_REG_L(fetchdat & 7);
+ imm = fastreadl(cs + op_pc + 1);
+ }
+ else
+ {
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ imm = fastreadl(cs + op_pc + 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ MEM_LOAD_ADDR_EA_L(target_seg);
+ host_reg = 0;
+ }
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_ZN32);
+ host_reg = TEST_HOST_REG_IMM(host_reg, imm);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, host_reg);
+ RELEASE_REG(host_reg);
+ return op_pc + 5;
+
+ case 0x10: /*NOT l*/
+ if ((fetchdat & 0xc0) != 0xc0)
+ return 0;
+ host_reg = LOAD_REG_L(fetchdat & 7);
+ XOR_HOST_REG_IMM(host_reg, 0xffffffff);
+ STORE_REG_L_RELEASE(host_reg);
+ return op_pc + 1;
+
+ case 0x18: /*NEG l*/
+ if ((fetchdat & 0xc0) != 0xc0)
+ return 0;
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SUB32);
+ host_reg = LOAD_REG_L(fetchdat & 7);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op2, host_reg);
+ NEG_HOST_REG_L(host_reg);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op1, 0);
+ STORE_REG_L_RELEASE(host_reg);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, host_reg);
+ return op_pc + 1;
+ }
+
+ return 0;
+}
diff --git a/src/codegen_ops_misc.c b/src/codegen_ops_misc.c
deleted file mode 100644
index 4eb5906..0000000
--- a/src/codegen_ops_misc.c
+++ /dev/null
@@ -1,611 +0,0 @@
-#include "ibm.h"
-
-#include "x86.h"
-#include "x86_flags.h"
-#include "386_common.h"
-#include "codegen.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_helpers.h"
-#include "codegen_ops_misc.h"
-
-uint32_t ropLEA_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- if ((fetchdat & 0xc0) == 0xc0)
- return 0;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- uop_MOV(ir, IREG_16(dest_reg), IREG_eaaddr_W);
-
- return op_pc + 1;
-}
-uint32_t ropLEA_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- if ((fetchdat & 0xc0) == 0xc0)
- return 0;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- uop_MOV(ir, IREG_32(dest_reg), IREG_eaaddr);
-
- return op_pc + 1;
-}
-
-uint32_t ropF6(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg = NULL;
- uint8_t imm_data;
- int reg;
-
- if (fetchdat & 0x20)
- return 0;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- reg = IREG_8(fetchdat & 7);
- else
- {
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- if ((fetchdat & 0x30) == 0x10) /*NEG/NOT*/
- codegen_check_seg_write(block, ir, target_seg);
- else
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- reg = IREG_temp0_B;
- }
-
- switch (fetchdat & 0x38)
- {
- case 0x00: case 0x08: /*TEST*/
- imm_data = fastreadb(cs + op_pc + 1);
-
- uop_AND_IMM(ir, IREG_flags_res_B, reg, imm_data);
- uop_MOVZX(ir, IREG_flags_res, IREG_flags_res_B);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN8);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc+1, 1);
- return op_pc+2;
-
- case 0x10: /*NOT*/
- uop_XOR_IMM(ir, reg, reg, 0xff);
- if ((fetchdat & 0xc0) != 0xc0)
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, reg);
-
- codegen_flags_changed = 1;
- return op_pc+1;
-
- case 0x18: /*NEG*/
- uop_MOV_IMM(ir, IREG_temp1_B, 0);
-
- if ((fetchdat & 0xc0) == 0xc0)
- {
- uop_MOVZX(ir, IREG_flags_op2, reg);
- uop_SUB(ir, IREG_temp1_B, IREG_temp1_B, reg);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_B);
- uop_MOV(ir, reg, IREG_temp1_B);
- }
- else
- {
- uop_SUB(ir, IREG_temp1_B, IREG_temp1_B, reg);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_B);
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_B);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_B);
- }
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB8);
- uop_MOV_IMM(ir, IREG_flags_op1, 0);
-
- codegen_flags_changed = 1;
- return op_pc+1;
- }
- return 0;
-}
-uint32_t ropF7_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg = NULL;
- uint16_t imm_data;
- int reg;
-
- if (fetchdat & 0x20)
- return 0;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- reg = IREG_16(fetchdat & 7);
- else
- {
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- if ((fetchdat & 0x30) == 0x10) /*NEG/NOT*/
- codegen_check_seg_write(block, ir, target_seg);
- else
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- reg = IREG_temp0_W;
- }
-
- switch (fetchdat & 0x38)
- {
- case 0x00: case 0x08: /*TEST*/
- imm_data = fastreadw(cs + op_pc + 1);
-
- uop_AND_IMM(ir, IREG_flags_res_W, reg, imm_data);
- uop_MOVZX(ir, IREG_flags_res, IREG_flags_res_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN16);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc+1, 2);
- return op_pc+3;
-
- case 0x10: /*NOT*/
- uop_XOR_IMM(ir, reg, reg, 0xffff);
- if ((fetchdat & 0xc0) != 0xc0)
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, reg);
-
- codegen_flags_changed = 1;
- return op_pc+1;
-
- case 0x18: /*NEG*/
- uop_MOV_IMM(ir, IREG_temp1_W, 0);
-
- if ((fetchdat & 0xc0) == 0xc0)
- {
- uop_MOVZX(ir, IREG_flags_op2, reg);
- uop_SUB(ir, IREG_temp1_W, IREG_temp1_W, reg);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- uop_MOV(ir, reg, IREG_temp1_W);
- }
- else
- {
- uop_SUB(ir, IREG_temp1_W, IREG_temp1_W, reg);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_op2, IREG_temp0_W);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- }
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB16);
- uop_MOV_IMM(ir, IREG_flags_op1, 0);
-
- codegen_flags_changed = 1;
- return op_pc+1;
- }
- return 0;
-}
-uint32_t ropF7_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg = NULL;
- uint32_t imm_data;
- int reg;
-
- if (fetchdat & 0x20)
- return 0;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- reg = IREG_32(fetchdat & 7);
- else
- {
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- if ((fetchdat & 0x30) == 0x10) /*NEG/NOT*/
- codegen_check_seg_write(block, ir, target_seg);
- else
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- reg = IREG_temp0;
- }
-
- switch (fetchdat & 0x38)
- {
- case 0x00: case 0x08: /*TEST*/
- imm_data = fastreadl(cs + op_pc + 1);
-
- uop_AND_IMM(ir, IREG_flags_res, reg, imm_data);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ZN32);
-
- codegen_flags_changed = 1;
- codegen_mark_code_present(block, cs+op_pc+1, 4);
- return op_pc+5;
-
- case 0x10: /*NOT*/
- uop_XOR_IMM(ir, reg, reg, 0xffffffff);
- if ((fetchdat & 0xc0) != 0xc0)
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, reg);
-
- codegen_flags_changed = 1;
- return op_pc+1;
-
- case 0x18: /*NEG*/
- uop_MOV_IMM(ir, IREG_temp1, 0);
-
- if ((fetchdat & 0xc0) == 0xc0)
- {
- uop_MOV(ir, IREG_flags_op2, reg);
- uop_SUB(ir, IREG_temp1, IREG_temp1, reg);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- uop_MOV(ir, reg, IREG_temp1);
- }
- else
- {
- uop_SUB(ir, IREG_temp1, IREG_temp1, reg);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op2, IREG_temp0);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- }
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SUB32);
- uop_MOV_IMM(ir, IREG_flags_op1, 0);
-
- codegen_flags_changed = 1;
- return op_pc+1;
- }
- return 0;
-}
-
-static void rebuild_c(ir_data_t *ir)
-{
- int needs_rebuild = 1;
-
- if (codegen_flags_changed)
- {
- switch (cpu_state.flags_op)
- {
- case FLAGS_INC8: case FLAGS_INC16: case FLAGS_INC32:
- case FLAGS_DEC8: case FLAGS_DEC16: case FLAGS_DEC32:
- needs_rebuild = 0;
- break;
- }
- }
-
- if (needs_rebuild)
- {
- uop_CALL_FUNC(ir, flags_rebuild_c);
- }
-}
-
-uint32_t ropFF_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg = NULL;
- int src_reg, sp_reg;
-
- if ((fetchdat & 0x38) != 0x00 && (fetchdat & 0x38) != 0x08 && (fetchdat & 0x38) != 0x10 && (fetchdat & 0x38) != 0x20 && (fetchdat & 0x38) != 0x28 && (fetchdat & 0x38) != 0x30)
- return 0;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- if ((fetchdat & 0x38) == 0x28)
- return 0;
- src_reg = IREG_16(fetchdat & 7);
- }
- else
- {
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- if (!(fetchdat & 0x30)) /*INC/DEC*/
- codegen_check_seg_write(block, ir, target_seg);
- else
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- src_reg = IREG_temp0_W;
- }
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*INC*/
- rebuild_c(ir);
- codegen_flags_changed = 1;
-
- if ((fetchdat & 0xc0) == 0xc0)
- {
- uop_MOVZX(ir, IREG_flags_op1, src_reg);
- uop_ADD_IMM(ir, src_reg, src_reg, 1);
- uop_MOVZX(ir, IREG_flags_res, src_reg);
- uop_MOV_IMM(ir, IREG_flags_op2, 1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_INC16);
- }
- else
- {
- uop_ADD_IMM(ir, IREG_temp1_W, src_reg, 1);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_op1, src_reg);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- uop_MOV_IMM(ir, IREG_flags_op2, 1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_INC16);
- }
- return op_pc+1;
-
- case 0x08: /*DEC*/
- rebuild_c(ir);
- codegen_flags_changed = 1;
-
- if ((fetchdat & 0xc0) == 0xc0)
- {
- uop_MOVZX(ir, IREG_flags_op1, src_reg);
- uop_SUB_IMM(ir, src_reg, src_reg, 1);
- uop_MOVZX(ir, IREG_flags_res, src_reg);
- uop_MOV_IMM(ir, IREG_flags_op2, 1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_DEC16);
- }
- else
- {
- uop_SUB_IMM(ir, IREG_temp1_W, src_reg, 1);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_op1, src_reg);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- uop_MOV_IMM(ir, IREG_flags_op2, 1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_DEC16);
- }
- return op_pc+1;
-
- case 0x10: /*CALL*/
- if ((fetchdat & 0xc0) == 0xc0)
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- sp_reg = LOAD_SP_WITH_OFFSET(ir, -2);
- uop_MEM_STORE_IMM_16(ir, IREG_SS_base, sp_reg, op_pc + 1);
- SUB_SP(ir, 2);
- uop_MOVZX(ir, IREG_pc, src_reg);
- return -1;
-
- case 0x20: /*JMP*/
- uop_MOVZX(ir, IREG_pc, src_reg);
- return -1;
-
- case 0x28: /*JMP far*/
- uop_MOVZX(ir, IREG_pc, src_reg);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_temp1_W, ireg_seg_base(target_seg), IREG_eaaddr, 2);
- uop_LOAD_FUNC_ARG_REG(ir, 0, IREG_temp1_W);
- uop_LOAD_FUNC_ARG_IMM(ir, 1, op_pc + 1);
- uop_CALL_FUNC(ir, loadcsjmp);
- return -1;
-
- case 0x30: /*PUSH*/
- if ((fetchdat & 0xc0) == 0xc0)
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- sp_reg = LOAD_SP_WITH_OFFSET(ir, -2);
- uop_MEM_STORE_REG(ir, IREG_SS_base, sp_reg, src_reg);
- SUB_SP(ir, 2);
- return op_pc+1;
- }
- return 0;
-}
-
-uint32_t ropFF_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg = NULL;
- int src_reg, sp_reg;
-
- if ((fetchdat & 0x38) != 0x00 && (fetchdat & 0x38) != 0x08 && (fetchdat & 0x38) != 0x10 && (fetchdat & 0x38) != 0x20 && (fetchdat & 0x38) != 0x28 && (fetchdat & 0x38) != 0x30)
- return 0;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- if ((fetchdat & 0x38) == 0x28)
- return 0;
- src_reg = IREG_32(fetchdat & 7);
- }
- else
- {
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- if (!(fetchdat & 0x30)) /*INC/DEC*/
- codegen_check_seg_write(block, ir, target_seg);
- else
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- src_reg = IREG_temp0;
- }
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*INC*/
- rebuild_c(ir);
- codegen_flags_changed = 1;
-
- if ((fetchdat & 0xc0) == 0xc0)
- {
- uop_MOV(ir, IREG_flags_op1, src_reg);
- uop_ADD_IMM(ir, src_reg, src_reg, 1);
- uop_MOV(ir, IREG_flags_res, src_reg);
- uop_MOV_IMM(ir, IREG_flags_op2, 1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_INC32);
- }
- else
- {
- uop_ADD_IMM(ir, IREG_temp1, src_reg, 1);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, src_reg);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- uop_MOV_IMM(ir, IREG_flags_op2, 1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_INC32);
- }
- return op_pc+1;
-
- case 0x08: /*DEC*/
- rebuild_c(ir);
- codegen_flags_changed = 1;
-
- if ((fetchdat & 0xc0) == 0xc0)
- {
- uop_MOV(ir, IREG_flags_op1, src_reg);
- uop_SUB_IMM(ir, src_reg, src_reg, 1);
- uop_MOV(ir, IREG_flags_res, src_reg);
- uop_MOV_IMM(ir, IREG_flags_op2, 1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_DEC32);
- }
- else
- {
- uop_SUB_IMM(ir, IREG_temp1, src_reg, 1);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, src_reg);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- uop_MOV_IMM(ir, IREG_flags_op2, 1);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_DEC32);
- }
- return op_pc+1;
-
- case 0x10: /*CALL*/
- if ((fetchdat & 0xc0) == 0xc0)
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- sp_reg = LOAD_SP_WITH_OFFSET(ir, -4);
- uop_MEM_STORE_IMM_32(ir, IREG_SS_base, sp_reg, op_pc + 1);
- SUB_SP(ir, 4);
- uop_MOV(ir, IREG_pc, src_reg);
- return -1;
-
- case 0x20: /*JMP*/
- uop_MOV(ir, IREG_pc, src_reg);
- return -1;
-
- case 0x28: /*JMP far*/
- uop_MOV(ir, IREG_pc, src_reg);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_temp1_W, ireg_seg_base(target_seg), IREG_eaaddr, 4);
- uop_LOAD_FUNC_ARG_REG(ir, 0, IREG_temp1_W);
- uop_LOAD_FUNC_ARG_IMM(ir, 1, op_pc + 1);
- uop_CALL_FUNC(ir, loadcsjmp);
- return -1;
-
- case 0x30: /*PUSH*/
- if ((fetchdat & 0xc0) == 0xc0)
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- sp_reg = LOAD_SP_WITH_OFFSET(ir, -4);
- uop_MEM_STORE_REG(ir, IREG_SS_base, sp_reg, src_reg);
- SUB_SP(ir, 4);
- return op_pc+1;
- }
- return 0;
-}
-
-uint32_t ropNOP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- return op_pc;
-}
-
-uint32_t ropCBW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_MOVSX(ir, IREG_AX, IREG_AL);
-
- return op_pc;
-}
-uint32_t ropCDQ(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_SAR_IMM(ir, IREG_EDX, IREG_EAX, 31);
-
- return op_pc;
-}
-uint32_t ropCWD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_SAR_IMM(ir, IREG_DX, IREG_AX, 15);
-
- return op_pc;
-}
-uint32_t ropCWDE(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_MOVSX(ir, IREG_EAX, IREG_AX);
-
- return op_pc;
-}
-
-#define ropLxS(name, seg) \
-uint32_t rop ## name ## _16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- x86seg *target_seg = NULL; \
- int dest_reg = (fetchdat >> 3) & 7; \
- \
- if ((fetchdat & 0xc0) == 0xc0) \
- return 0; \
- \
- codegen_mark_code_present(block, cs+op_pc, 1); \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_temp1_W, ireg_seg_base(target_seg), IREG_eaaddr, 2); \
- uop_LOAD_SEG(ir, seg, IREG_temp1_W); \
- uop_MOV(ir, IREG_16(dest_reg), IREG_temp0_W); \
- \
- if (seg == &cpu_state.seg_ss) \
- CPU_BLOCK_END(); \
- \
- return op_pc + 1; \
-} \
-uint32_t rop ## name ## _32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- x86seg *target_seg = NULL; \
- int dest_reg = (fetchdat >> 3) & 7; \
- \
- if ((fetchdat & 0xc0) == 0xc0) \
- return 0; \
- \
- codegen_mark_code_present(block, cs+op_pc, 1); \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_temp1_W, ireg_seg_base(target_seg), IREG_eaaddr, 4); \
- uop_LOAD_SEG(ir, seg, IREG_temp1_W); \
- uop_MOV(ir, IREG_32(dest_reg), IREG_temp0); \
- \
- if (seg == &cpu_state.seg_ss) \
- CPU_BLOCK_END(); \
- \
- return op_pc + 1; \
-}
-
-ropLxS(LDS, &cpu_state.seg_ds)
-ropLxS(LES, &cpu_state.seg_es)
-ropLxS(LFS, &cpu_state.seg_fs)
-ropLxS(LGS, &cpu_state.seg_gs)
-ropLxS(LSS, &cpu_state.seg_ss)
-
-uint32_t ropCLC(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_AND_IMM(ir, IREG_flags, IREG_flags, ~C_FLAG);
- return op_pc;
-}
-uint32_t ropCMC(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_XOR_IMM(ir, IREG_flags, IREG_flags, C_FLAG);
- return op_pc;
-}
-uint32_t ropSTC(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_OR_IMM(ir, IREG_flags, IREG_flags, C_FLAG);
- return op_pc;
-}
-
-uint32_t ropCLD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_AND_IMM(ir, IREG_flags, IREG_flags, ~D_FLAG);
- return op_pc;
-}
-uint32_t ropSTD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_OR_IMM(ir, IREG_flags, IREG_flags, D_FLAG);
- return op_pc;
-}
-
-uint32_t ropCLI(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- if (!IOPLp && (cr4 & (CR4_VME | CR4_PVI)))
- return 0;
-
- uop_AND_IMM(ir, IREG_flags, IREG_flags, ~I_FLAG);
- return op_pc;
-}
-uint32_t ropSTI(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- if (!IOPLp && (cr4 & (CR4_VME | CR4_PVI)))
- return 0;
-
- uop_OR_IMM(ir, IREG_flags, IREG_flags, I_FLAG);
- return op_pc;
-}
diff --git a/src/codegen_ops_misc.h b/src/codegen_ops_misc.h
index 8f2fd76..1ccbcff 100644
--- a/src/codegen_ops_misc.h
+++ b/src/codegen_ops_misc.h
@@ -1,37 +1,265 @@
-uint32_t ropLEA_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropLEA_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+static uint32_t ropNOP(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ return op_pc;
+}
-uint32_t ropF6(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropF7_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropF7_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+static uint32_t ropCLD(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ CLEAR_BITS((uintptr_t)&flags, D_FLAG);
+ return op_pc;
+}
+static uint32_t ropSTD(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ SET_BITS((uintptr_t)&flags, D_FLAG);
+ return op_pc;
+}
-uint32_t ropFF_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropFF_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+static uint32_t ropCLI(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ CLEAR_BITS((uintptr_t)&flags, I_FLAG);
+ return op_pc;
+}
+static uint32_t ropSTI(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ SET_BITS((uintptr_t)&flags, I_FLAG);
+ return op_pc;
+}
-uint32_t ropNOP(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+static uint32_t ropFE(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg = NULL;
+ int host_reg;
-uint32_t ropCBW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropCDQ(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropCWD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropCWDE(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ if ((fetchdat & 0x30) != 0x00)
+ return 0;
-uint32_t ropLDS_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropLDS_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropLES_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropLES_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropLFS_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropLFS_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropLGS_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropLGS_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropLSS_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropLSS_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ CALL_FUNC((uintptr_t)flags_rebuild_c);
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ host_reg = LOAD_REG_B(fetchdat & 7);
+ else
+ {
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
-uint32_t ropCLC(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropCMC(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSTC(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ SAVE_EA();
+ MEM_CHECK_WRITE(target_seg);
+ host_reg = MEM_LOAD_ADDR_EA_B_NO_ABRT(target_seg);
+ }
+
+ switch (fetchdat & 0x38)
+ {
+ case 0x00: /*INC*/
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ ADD_HOST_REG_IMM_B(host_reg, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_INC8);
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_res, host_reg);
+ break;
+ case 0x08: /*DEC*/
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ SUB_HOST_REG_IMM_B(host_reg, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_DEC8);
+ STORE_HOST_REG_ADDR_BL((uintptr_t)&cpu_state.flags_res, host_reg);
+ break;
+ }
-uint32_t ropCLD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSTD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ if ((fetchdat & 0xc0) == 0xc0)
+ STORE_REG_B_RELEASE(host_reg);
+ else
+ {
+ LOAD_EA();
+ MEM_STORE_ADDR_EA_B_NO_ABRT(target_seg, host_reg);
+ }
+ codegen_flags_changed = 1;
+
+ return op_pc + 1;
+}
+static uint32_t codegen_temp;
+static uint32_t ropFF_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg = NULL;
+ int host_reg;
+
+ if ((fetchdat & 0x30) != 0x00 && (fetchdat & 0x08))
+ return 0;
-uint32_t ropCLI(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSTI(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ if ((fetchdat & 0x30) == 0x00)
+ CALL_FUNC((uintptr_t)flags_rebuild_c);
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ host_reg = LOAD_REG_W(fetchdat & 7);
+ else
+ {
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ if ((fetchdat & 0x30) != 0x00)
+ {
+ MEM_LOAD_ADDR_EA_W(target_seg);
+ host_reg = 0;
+ }
+ else
+ {
+ SAVE_EA();
+ MEM_CHECK_WRITE_W(target_seg);
+ host_reg = MEM_LOAD_ADDR_EA_W_NO_ABRT(target_seg);
+ }
+ }
+
+ switch (fetchdat & 0x38)
+ {
+ case 0x00: /*INC*/
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ ADD_HOST_REG_IMM_W(host_reg, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_INC16);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, host_reg);
+ if ((fetchdat & 0xc0) == 0xc0)
+ STORE_REG_W_RELEASE(host_reg);
+ else
+ {
+ LOAD_EA();
+ MEM_STORE_ADDR_EA_W_NO_ABRT(target_seg, host_reg);
+ }
+ codegen_flags_changed = 1;
+ return op_pc + 1;
+ case 0x08: /*DEC*/
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_op1, host_reg);
+ SUB_HOST_REG_IMM_W(host_reg, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_DEC16);
+ STORE_HOST_REG_ADDR_WL((uintptr_t)&cpu_state.flags_res, host_reg);
+ if ((fetchdat & 0xc0) == 0xc0)
+ STORE_REG_W_RELEASE(host_reg);
+ else
+ {
+ LOAD_EA();
+ MEM_STORE_ADDR_EA_W_NO_ABRT(target_seg, host_reg);
+ }
+ codegen_flags_changed = 1;
+ return op_pc + 1;
+
+ case 0x10: /*CALL*/
+ STORE_HOST_REG_ADDR_W((uintptr_t)&codegen_temp, host_reg);
+ RELEASE_REG(host_reg);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_STACK_TO_EA(-2);
+ host_reg = LOAD_REG_IMM(op_pc + 1);
+ MEM_STORE_ADDR_EA_W(&_ss, host_reg);
+ SP_MODIFY(-2);
+
+ host_reg = LOAD_VAR_W((uintptr_t)&codegen_temp);
+ STORE_HOST_REG_ADDR_W((uintptr_t)&cpu_state.pc, host_reg);
+ return -1;
+
+ case 0x20: /*JMP*/
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.pc, host_reg);
+ return -1;
+
+ case 0x30: /*PUSH*/
+ if (!host_reg)
+ host_reg = LOAD_HOST_REG(host_reg);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_STACK_TO_EA(-2);
+ MEM_STORE_ADDR_EA_W(&_ss, host_reg);
+ SP_MODIFY(-2);
+ return op_pc + 1;
+ }
+ return 0;
+}
+static uint32_t ropFF_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg = NULL;
+ int host_reg;
+
+ if ((fetchdat & 0x30) != 0x00 && (fetchdat & 0x08))
+ return 0;
+
+ if ((fetchdat & 0x30) == 0x00)
+ CALL_FUNC((uintptr_t)flags_rebuild_c);
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ host_reg = LOAD_REG_L(fetchdat & 7);
+ else
+ {
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ if ((fetchdat & 0x30) != 0x00)
+ {
+ MEM_LOAD_ADDR_EA_L(target_seg);
+ host_reg = 0;
+ }
+ else
+ {
+ SAVE_EA();
+ MEM_CHECK_WRITE_L(target_seg);
+ host_reg = MEM_LOAD_ADDR_EA_L_NO_ABRT(target_seg);
+ }
+ }
+
+ switch (fetchdat & 0x38)
+ {
+ case 0x00: /*INC*/
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op1, host_reg);
+ ADD_HOST_REG_IMM(host_reg, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_INC32);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, host_reg);
+ if ((fetchdat & 0xc0) == 0xc0)
+ STORE_REG_L_RELEASE(host_reg);
+ else
+ {
+ LOAD_EA();
+ MEM_STORE_ADDR_EA_L_NO_ABRT(target_seg, host_reg);
+ }
+ codegen_flags_changed = 1;
+ return op_pc + 1;
+ case 0x08: /*DEC*/
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_op1, host_reg);
+ SUB_HOST_REG_IMM(host_reg, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, 1);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_DEC32);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.flags_res, host_reg);
+ if ((fetchdat & 0xc0) == 0xc0)
+ STORE_REG_L_RELEASE(host_reg);
+ else
+ {
+ LOAD_EA();
+ MEM_STORE_ADDR_EA_L_NO_ABRT(target_seg, host_reg);
+ }
+ codegen_flags_changed = 1;
+ return op_pc + 1;
+
+ case 0x10: /*CALL*/
+ STORE_HOST_REG_ADDR((uintptr_t)&codegen_temp, host_reg);
+ RELEASE_REG(host_reg);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_STACK_TO_EA(-4);
+ host_reg = LOAD_REG_IMM(op_pc + 1);
+ MEM_STORE_ADDR_EA_L(&_ss, host_reg);
+ SP_MODIFY(-4);
+
+ host_reg = LOAD_VAR_L((uintptr_t)&codegen_temp);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.pc, host_reg);
+ return -1;
+
+ case 0x20: /*JMP*/
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.pc, host_reg);
+ return -1;
+
+ case 0x30: /*PUSH*/
+ if (!host_reg)
+ host_reg = LOAD_HOST_REG(host_reg);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_STACK_TO_EA(-4);
+ MEM_STORE_ADDR_EA_L(&_ss, host_reg);
+ SP_MODIFY(-4);
+ return op_pc + 1;
+ }
+ return 0;
+}
diff --git a/src/codegen_ops_mmx.h b/src/codegen_ops_mmx.h
new file mode 100644
index 0000000..78239cb
--- /dev/null
+++ b/src/codegen_ops_mmx.h
@@ -0,0 +1,277 @@
+static uint32_t ropMOVQ_q_mm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg1, host_reg2;
+
+ MMX_ENTER();
+
+ LOAD_MMX_Q((fetchdat >> 3) & 7, &host_reg1, &host_reg2);
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ STORE_MMX_Q(fetchdat & 7, host_reg1, host_reg2);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_WRITE(target_seg);
+ CHECK_SEG_LIMITS(target_seg, 7);
+
+ MEM_STORE_ADDR_EA_Q(target_seg, host_reg1, host_reg2);
+ }
+
+ return op_pc + 1;
+}
+
+static uint32_t ropMOVQ_mm_q(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ MMX_ENTER();
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ int host_reg1, host_reg2;
+
+ LOAD_MMX_Q(fetchdat & 7, &host_reg1, &host_reg2);
+ STORE_MMX_Q((fetchdat >> 3) & 7, host_reg1, host_reg2);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+
+ MEM_LOAD_ADDR_EA_Q(target_seg);
+ STORE_MMX_Q((fetchdat >> 3) & 7, LOAD_Q_REG_1, LOAD_Q_REG_2);
+ }
+
+ return op_pc + 1;
+}
+
+static uint32_t ropMOVD_l_mm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg;
+
+ MMX_ENTER();
+
+ host_reg = LOAD_MMX_D((fetchdat >> 3) & 7);
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ STORE_REG_TARGET_L_RELEASE(host_reg, fetchdat & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_WRITE(target_seg);
+ CHECK_SEG_LIMITS(target_seg, 3);
+
+ MEM_STORE_ADDR_EA_L(target_seg, host_reg);
+ }
+
+ return op_pc + 1;
+}
+static uint32_t ropMOVD_mm_l(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ MMX_ENTER();
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ int host_reg = LOAD_REG_L(fetchdat & 7);
+ STORE_MMX_LQ((fetchdat >> 3) & 7, host_reg);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+
+ MEM_LOAD_ADDR_EA_L(target_seg);
+ STORE_MMX_LQ((fetchdat >> 3) & 7, 0);
+ }
+
+ return op_pc + 1;
+}
+
+#define MMX_OP(name, func) \
+static uint32_t name(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+{ \
+ int src_reg1, src_reg2; \
+ int xmm_src, xmm_dst; \
+ \
+ MMX_ENTER(); \
+ \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ { \
+ xmm_src = LOAD_MMX_Q_MMX(fetchdat & 7); \
+ } \
+ else \
+ { \
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \
+ \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ \
+ CHECK_SEG_READ(target_seg); \
+ \
+ MEM_LOAD_ADDR_EA_Q(target_seg); \
+ src_reg1 = LOAD_Q_REG_1; \
+ src_reg2 = LOAD_Q_REG_2; \
+ xmm_src = LOAD_INT_TO_MMX(src_reg1, src_reg2); \
+ } \
+ xmm_dst = LOAD_MMX_Q_MMX((fetchdat >> 3) & 7); \
+ func(xmm_dst, xmm_src); \
+ STORE_MMX_Q_MMX((fetchdat >> 3) & 7, xmm_dst); \
+ \
+ return op_pc + 1; \
+}
+
+MMX_OP(ropPAND, MMX_AND)
+MMX_OP(ropPANDN, MMX_ANDN)
+MMX_OP(ropPOR, MMX_OR)
+MMX_OP(ropPXOR, MMX_XOR)
+
+MMX_OP(ropPADDB, MMX_ADDB)
+MMX_OP(ropPADDW, MMX_ADDW)
+MMX_OP(ropPADDD, MMX_ADDD)
+MMX_OP(ropPADDSB, MMX_ADDSB)
+MMX_OP(ropPADDSW, MMX_ADDSW)
+MMX_OP(ropPADDUSB, MMX_ADDUSB)
+MMX_OP(ropPADDUSW, MMX_ADDUSW)
+
+MMX_OP(ropPSUBB, MMX_SUBB)
+MMX_OP(ropPSUBW, MMX_SUBW)
+MMX_OP(ropPSUBD, MMX_SUBD)
+MMX_OP(ropPSUBSB, MMX_SUBSB)
+MMX_OP(ropPSUBSW, MMX_SUBSW)
+MMX_OP(ropPSUBUSB, MMX_SUBUSB)
+MMX_OP(ropPSUBUSW, MMX_SUBUSW)
+
+MMX_OP(ropPUNPCKLBW, MMX_PUNPCKLBW);
+MMX_OP(ropPUNPCKLWD, MMX_PUNPCKLWD);
+MMX_OP(ropPUNPCKLDQ, MMX_PUNPCKLDQ);
+MMX_OP(ropPACKSSWB, MMX_PACKSSWB);
+MMX_OP(ropPCMPGTB, MMX_PCMPGTB);
+MMX_OP(ropPCMPGTW, MMX_PCMPGTW);
+MMX_OP(ropPCMPGTD, MMX_PCMPGTD);
+MMX_OP(ropPACKUSWB, MMX_PACKUSWB);
+MMX_OP(ropPUNPCKHBW, MMX_PUNPCKHBW);
+MMX_OP(ropPUNPCKHWD, MMX_PUNPCKHWD);
+MMX_OP(ropPUNPCKHDQ, MMX_PUNPCKHDQ);
+MMX_OP(ropPACKSSDW, MMX_PACKSSDW);
+
+MMX_OP(ropPCMPEQB, MMX_PCMPEQB);
+MMX_OP(ropPCMPEQW, MMX_PCMPEQW);
+MMX_OP(ropPCMPEQD, MMX_PCMPEQD);
+
+MMX_OP(ropPSRLW, MMX_PSRLW)
+MMX_OP(ropPSRLD, MMX_PSRLD)
+MMX_OP(ropPSRLQ, MMX_PSRLQ)
+MMX_OP(ropPSRAW, MMX_PSRAW)
+MMX_OP(ropPSRAD, MMX_PSRAD)
+MMX_OP(ropPSLLW, MMX_PSLLW)
+MMX_OP(ropPSLLD, MMX_PSLLD)
+MMX_OP(ropPSLLQ, MMX_PSLLQ)
+
+MMX_OP(ropPMULLW, MMX_PMULLW);
+MMX_OP(ropPMULHW, MMX_PMULHW);
+MMX_OP(ropPMADDWD, MMX_PMADDWD);
+
+static uint32_t ropPSxxW_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int xmm_dst;
+
+ if ((fetchdat & 0xc0) != 0xc0)
+ return 0;
+ if ((fetchdat & 0x08) || !(fetchdat & 0x30))
+ return 0;
+
+ MMX_ENTER();
+
+ xmm_dst = LOAD_MMX_Q_MMX(fetchdat & 7);
+ switch (fetchdat & 0x38)
+ {
+ case 0x10: /*PSRLW*/
+ MMX_PSRLW_imm(xmm_dst, (fetchdat >> 8) & 0xff);
+ break;
+ case 0x20: /*PSRAW*/
+ MMX_PSRAW_imm(xmm_dst, (fetchdat >> 8) & 0xff);
+ break;
+ case 0x30: /*PSLLW*/
+ MMX_PSLLW_imm(xmm_dst, (fetchdat >> 8) & 0xff);
+ break;
+ }
+ STORE_MMX_Q_MMX(fetchdat & 7, xmm_dst);
+
+ return op_pc + 2;
+}
+static uint32_t ropPSxxD_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int xmm_dst;
+
+ if ((fetchdat & 0xc0) != 0xc0)
+ return 0;
+ if ((fetchdat & 0x08) || !(fetchdat & 0x30))
+ return 0;
+
+ MMX_ENTER();
+
+ xmm_dst = LOAD_MMX_Q_MMX(fetchdat & 7);
+ switch (fetchdat & 0x38)
+ {
+ case 0x10: /*PSRLD*/
+ MMX_PSRLD_imm(xmm_dst, (fetchdat >> 8) & 0xff);
+ break;
+ case 0x20: /*PSRAD*/
+ MMX_PSRAD_imm(xmm_dst, (fetchdat >> 8) & 0xff);
+ break;
+ case 0x30: /*PSLLD*/
+ MMX_PSLLD_imm(xmm_dst, (fetchdat >> 8) & 0xff);
+ break;
+ }
+ STORE_MMX_Q_MMX(fetchdat & 7, xmm_dst);
+
+ return op_pc + 2;
+}
+static uint32_t ropPSxxQ_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int xmm_dst;
+
+ if ((fetchdat & 0xc0) != 0xc0)
+ return 0;
+ if ((fetchdat & 0x08) || !(fetchdat & 0x30))
+ return 0;
+
+ MMX_ENTER();
+
+ xmm_dst = LOAD_MMX_Q_MMX(fetchdat & 7);
+ switch (fetchdat & 0x38)
+ {
+ case 0x10: /*PSRLQ*/
+ MMX_PSRLQ_imm(xmm_dst, (fetchdat >> 8) & 0xff);
+ break;
+ case 0x20: /*PSRAQ*/
+ MMX_PSRAQ_imm(xmm_dst, (fetchdat >> 8) & 0xff);
+ break;
+ case 0x30: /*PSLLQ*/
+ MMX_PSLLQ_imm(xmm_dst, (fetchdat >> 8) & 0xff);
+ break;
+ }
+ STORE_MMX_Q_MMX(fetchdat & 7, xmm_dst);
+
+ return op_pc + 2;
+}
+
+static uint32_t ropEMMS(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ codegen_mmx_entered = 0;
+
+ return 0;
+}
diff --git a/src/codegen_ops_mmx_arith.c b/src/codegen_ops_mmx_arith.c
deleted file mode 100644
index 1629fe6..0000000
--- a/src/codegen_ops_mmx_arith.c
+++ /dev/null
@@ -1,57 +0,0 @@
-#include "ibm.h"
-
-#include "x86.h"
-#include "x86_flags.h"
-#include "386_common.h"
-#include "codegen.h"
-#include "codegen_accumulate.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_mmx_arith.h"
-#include "codegen_ops_helpers.h"
-
-#define ropParith(func) \
-uint32_t rop ## func(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- int dest_reg = (fetchdat >> 3) & 7; \
- \
- uop_MMX_ENTER(ir); \
- codegen_mark_code_present(block, cs+op_pc, 1); \
- if ((fetchdat & 0xc0) == 0xc0) \
- { \
- int src_reg = fetchdat & 7; \
- uop_ ## func(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_MM(src_reg)); \
- } \
- else \
- { \
- x86seg *target_seg; \
- \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- uop_MEM_LOAD_REG(ir, IREG_temp0_Q, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_ ## func(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); \
- } \
- \
- return op_pc + 1; \
-}
-
-ropParith(PADDB)
-ropParith(PADDW)
-ropParith(PADDD)
-ropParith(PADDSB)
-ropParith(PADDSW)
-ropParith(PADDUSB)
-ropParith(PADDUSW)
-
-ropParith(PSUBB)
-ropParith(PSUBW)
-ropParith(PSUBD)
-ropParith(PSUBSB)
-ropParith(PSUBSW)
-ropParith(PSUBUSB)
-ropParith(PSUBUSW)
-
-ropParith(PMADDWD)
-ropParith(PMULHW)
-ropParith(PMULLW)
diff --git a/src/codegen_ops_mmx_arith.h b/src/codegen_ops_mmx_arith.h
deleted file mode 100644
index 5f67f0a..0000000
--- a/src/codegen_ops_mmx_arith.h
+++ /dev/null
@@ -1,19 +0,0 @@
-uint32_t ropPADDB(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPADDW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPADDD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPADDSB(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPADDSW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPADDUSB(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPADDUSW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropPSUBB(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPSUBW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPSUBD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPSUBSB(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPSUBSW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPSUBUSB(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPSUBUSW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropPMADDWD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPMULHW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPMULLW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
diff --git a/src/codegen_ops_mmx_cmp.c b/src/codegen_ops_mmx_cmp.c
deleted file mode 100644
index b7fe44d..0000000
--- a/src/codegen_ops_mmx_cmp.c
+++ /dev/null
@@ -1,44 +0,0 @@
-#include "ibm.h"
-
-#include "x86.h"
-#include "x86_flags.h"
-#include "386_common.h"
-#include "codegen.h"
-#include "codegen_accumulate.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_mmx_cmp.h"
-#include "codegen_ops_helpers.h"
-
-#define ropPcmp(func) \
-uint32_t rop ## func(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- int dest_reg = (fetchdat >> 3) & 7; \
- \
- uop_MMX_ENTER(ir); \
- codegen_mark_code_present(block, cs+op_pc, 1); \
- if ((fetchdat & 0xc0) == 0xc0) \
- { \
- int src_reg = fetchdat & 7; \
- uop_ ## func(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_MM(src_reg)); \
- } \
- else \
- { \
- x86seg *target_seg; \
- \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- uop_MEM_LOAD_REG(ir, IREG_temp0_Q, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_ ## func(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); \
- } \
- \
- return op_pc + 1; \
-}
-
-ropPcmp(PCMPEQB)
-ropPcmp(PCMPEQW)
-ropPcmp(PCMPEQD)
-ropPcmp(PCMPGTB)
-ropPcmp(PCMPGTW)
-ropPcmp(PCMPGTD)
diff --git a/src/codegen_ops_mmx_cmp.h b/src/codegen_ops_mmx_cmp.h
deleted file mode 100644
index 6069ad1..0000000
--- a/src/codegen_ops_mmx_cmp.h
+++ /dev/null
@@ -1,6 +0,0 @@
-uint32_t ropPCMPEQB(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPCMPEQW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPCMPEQD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPCMPGTB(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPCMPGTW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPCMPGTD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
diff --git a/src/codegen_ops_mmx_loadstore.c b/src/codegen_ops_mmx_loadstore.c
deleted file mode 100644
index a376f9b..0000000
--- a/src/codegen_ops_mmx_loadstore.c
+++ /dev/null
@@ -1,113 +0,0 @@
-#include "ibm.h"
-
-#include "x86.h"
-#include "x86_flags.h"
-#include "386_common.h"
-#include "codegen.h"
-#include "codegen_accumulate.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_mmx_loadstore.h"
-#include "codegen_ops_helpers.h"
-
-uint32_t ropMOVD_r_d(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- uop_MMX_ENTER(ir);
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_MOVZX(ir, IREG_MM(dest_reg), IREG_32(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOVZX(ir, IREG_MM(dest_reg), IREG_temp0);
- }
-
- return op_pc + 1;
-}
-uint32_t ropMOVD_d_r(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- if (cpu_iscyrix && (cpu_cur_status & CPU_STATUS_SMM))
- return 0;
-
- uop_MMX_ENTER(ir);
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
- uop_MOVZX(ir, IREG_32(dest_reg), IREG_MM(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- CHECK_SEG_LIMITS(block, ir, target_seg, IREG_eaaddr, 3);
- uop_MOVZX(ir, IREG_temp0, IREG_MM(src_reg));
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
- }
-
- return op_pc + 1;
-}
-
-uint32_t ropMOVQ_r_q(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- uop_MMX_ENTER(ir);
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_MOV(ir, IREG_MM(dest_reg), IREG_MM(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_MM(dest_reg), ireg_seg_base(target_seg), IREG_eaaddr);
- }
-
- return op_pc + 1;
-}
-
-uint32_t ropMOVQ_q_r(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- uop_MMX_ENTER(ir);
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
- uop_MOV(ir, IREG_MM(dest_reg), IREG_MM(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- CHECK_SEG_LIMITS(block, ir, target_seg, IREG_eaaddr, 7);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_MM(src_reg));
- }
-
- return op_pc + 1;
-}
diff --git a/src/codegen_ops_mmx_loadstore.h b/src/codegen_ops_mmx_loadstore.h
deleted file mode 100644
index 4b473ad..0000000
--- a/src/codegen_ops_mmx_loadstore.h
+++ /dev/null
@@ -1,5 +0,0 @@
-uint32_t ropMOVD_r_d(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOVD_d_r(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropMOVQ_r_q(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOVQ_q_r(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
diff --git a/src/codegen_ops_mmx_logic.c b/src/codegen_ops_mmx_logic.c
deleted file mode 100644
index 744f22b..0000000
--- a/src/codegen_ops_mmx_logic.c
+++ /dev/null
@@ -1,108 +0,0 @@
-#include "ibm.h"
-
-#include "x86.h"
-#include "x86_flags.h"
-#include "386_common.h"
-#include "codegen.h"
-#include "codegen_accumulate.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_mmx_logic.h"
-#include "codegen_ops_helpers.h"
-
-uint32_t ropPAND(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- uop_MMX_ENTER(ir);
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_AND(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_MM(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_Q, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_AND(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q);
- }
-
- return op_pc + 1;
-}
-uint32_t ropPANDN(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- uop_MMX_ENTER(ir);
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_ANDN(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_MM(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_Q, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_ANDN(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q);
- }
-
- return op_pc + 1;
-}
-uint32_t ropPOR(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- uop_MMX_ENTER(ir);
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_OR(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_MM(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_Q, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_OR(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q);
- }
-
- return op_pc + 1;
-}
-uint32_t ropPXOR(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- uop_MMX_ENTER(ir);
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_XOR(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_MM(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_Q, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_XOR(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q);
- }
-
- return op_pc + 1;
-}
diff --git a/src/codegen_ops_mmx_logic.h b/src/codegen_ops_mmx_logic.h
deleted file mode 100644
index f8f3009..0000000
--- a/src/codegen_ops_mmx_logic.h
+++ /dev/null
@@ -1,4 +0,0 @@
-uint32_t ropPAND(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPANDN(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPOR(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPXOR(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
diff --git a/src/codegen_ops_mmx_pack.c b/src/codegen_ops_mmx_pack.c
deleted file mode 100644
index e625217..0000000
--- a/src/codegen_ops_mmx_pack.c
+++ /dev/null
@@ -1,47 +0,0 @@
-#include "ibm.h"
-
-#include "x86.h"
-#include "x86_flags.h"
-#include "386_common.h"
-#include "codegen.h"
-#include "codegen_accumulate.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_mmx_pack.h"
-#include "codegen_ops_helpers.h"
-
-#define ropPpack(func) \
-uint32_t rop ## func(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- int dest_reg = (fetchdat >> 3) & 7; \
- \
- uop_MMX_ENTER(ir); \
- codegen_mark_code_present(block, cs+op_pc, 1); \
- if ((fetchdat & 0xc0) == 0xc0) \
- { \
- int src_reg = fetchdat & 7; \
- uop_ ## func(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_MM(src_reg)); \
- } \
- else \
- { \
- x86seg *target_seg; \
- \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0); \
- codegen_check_seg_read(block, ir, target_seg); \
- uop_MEM_LOAD_REG(ir, IREG_temp0_Q, ireg_seg_base(target_seg), IREG_eaaddr); \
- uop_ ## func(ir, IREG_MM(dest_reg), IREG_MM(dest_reg), IREG_temp0_Q); \
- } \
- \
- return op_pc + 1; \
-}
-
-ropPpack(PACKSSWB)
-ropPpack(PACKSSDW)
-ropPpack(PACKUSWB)
-ropPpack(PUNPCKLBW)
-ropPpack(PUNPCKLWD)
-ropPpack(PUNPCKLDQ)
-ropPpack(PUNPCKHBW)
-ropPpack(PUNPCKHWD)
-ropPpack(PUNPCKHDQ)
diff --git a/src/codegen_ops_mmx_pack.h b/src/codegen_ops_mmx_pack.h
deleted file mode 100644
index f46eea6..0000000
--- a/src/codegen_ops_mmx_pack.h
+++ /dev/null
@@ -1,9 +0,0 @@
-uint32_t ropPACKSSWB(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPACKSSDW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPACKUSWB(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUNPCKLBW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUNPCKLWD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUNPCKLDQ(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUNPCKHBW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUNPCKHWD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUNPCKHDQ(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
diff --git a/src/codegen_ops_mmx_shift.c b/src/codegen_ops_mmx_shift.c
deleted file mode 100644
index 3086f4d..0000000
--- a/src/codegen_ops_mmx_shift.c
+++ /dev/null
@@ -1,93 +0,0 @@
-#include "ibm.h"
-
-#include "x86.h"
-#include "x86_flags.h"
-#include "386_common.h"
-#include "codegen.h"
-#include "codegen_accumulate.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_mmx_shift.h"
-#include "codegen_ops_helpers.h"
-
-uint32_t ropPSxxW_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int reg = fetchdat & 7;
- int op = fetchdat & 0x38;
- int shift = fastreadb(cs + op_pc + 1);
-
- uop_MMX_ENTER(ir);
- codegen_mark_code_present(block, cs+op_pc, 1);
- switch (op)
- {
- case 0x10: /*PSRLW*/
- uop_PSRLW_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
- break;
- case 0x20: /*PSRAW*/
- uop_PSRAW_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
- break;
- case 0x30: /*PSLLW*/
- uop_PSLLW_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
- break;
- default:
- return 0;
-
- }
-
- codegen_mark_code_present(block, cs+op_pc+1, 1);
- return op_pc + 2;
-}
-uint32_t ropPSxxD_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int reg = fetchdat & 7;
- int op = fetchdat & 0x38;
- int shift = fastreadb(cs + op_pc + 1);
-
- uop_MMX_ENTER(ir);
- codegen_mark_code_present(block, cs+op_pc, 1);
- switch (op)
- {
- case 0x10: /*PSRLD*/
- uop_PSRLD_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
- break;
- case 0x20: /*PSRAD*/
- uop_PSRAD_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
- break;
- case 0x30: /*PSLLD*/
- uop_PSLLD_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
- break;
- default:
- return 0;
-
- }
-
- codegen_mark_code_present(block, cs+op_pc+1, 1);
- return op_pc + 2;
-}
-uint32_t ropPSxxQ_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int reg = fetchdat & 7;
- int op = fetchdat & 0x38;
- int shift = fastreadb(cs + op_pc + 1);
-
- uop_MMX_ENTER(ir);
- codegen_mark_code_present(block, cs+op_pc, 1);
- switch (op)
- {
- case 0x10: /*PSRLQ*/
- uop_PSRLQ_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
- break;
- case 0x20: /*PSRAQ*/
- uop_PSRAQ_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
- break;
- case 0x30: /*PSLLQ*/
- uop_PSLLQ_IMM(ir, IREG_MM(reg), IREG_MM(reg), shift);
- break;
- default:
- return 0;
-
- }
-
- codegen_mark_code_present(block, cs+op_pc+1, 1);
- return op_pc + 2;
-}
diff --git a/src/codegen_ops_mmx_shift.h b/src/codegen_ops_mmx_shift.h
deleted file mode 100644
index 3a3b712..0000000
--- a/src/codegen_ops_mmx_shift.h
+++ /dev/null
@@ -1,7 +0,0 @@
-uint32_t ropPSxxW_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPSxxD_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPSxxQ_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-
-uint32_t ropPSLLW(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPSLLD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPSLLQ(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
diff --git a/src/codegen_ops_mov.c b/src/codegen_ops_mov.c
deleted file mode 100644
index 26cd4e5..0000000
--- a/src/codegen_ops_mov.c
+++ /dev/null
@@ -1,772 +0,0 @@
-#include "ibm.h"
-
-#include "x86.h"
-#include "386_common.h"
-#include "codegen.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_helpers.h"
-#include "codegen_ops_mov.h"
-
-uint32_t ropMOV_rb_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint8_t imm = fastreadb(cs + op_pc);
-
- uop_MOV_IMM(ir, IREG_8(opcode & 7), imm);
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- return op_pc + 1;
-}
-uint32_t ropMOV_rw_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint16_t imm = fastreadw(cs + op_pc);
-
- uop_MOV_IMM(ir, IREG_16(opcode & 7), imm);
-
- codegen_mark_code_present(block, cs+op_pc, 2);
- return op_pc + 2;
-}
-uint32_t ropMOV_rl_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- LOAD_IMMEDIATE_FROM_RAM_32(block, ir, IREG_32(opcode & 7), cs + op_pc);
- }
- else
- {
- fetchdat = fastreadl(cs + op_pc);
- uop_MOV_IMM(ir, IREG_32(opcode & 7), fetchdat);
- codegen_mark_code_present(block, cs+op_pc, 4);
- }
- return op_pc + 4;
-}
-
-
-
-uint32_t ropMOV_b_r(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
-// if (block->phys == 0x49a400)
-// pclog("ropMOVb_rmarkcode %08x 1\n", cs+op_pc);
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
- uop_MOV(ir, IREG_8(dest_reg), IREG_8(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- CHECK_SEG_LIMITS(block, ir, target_seg, IREG_eaaddr, 0);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_8(src_reg));
- }
-
- return op_pc + 1;
-}
-uint32_t ropMOV_w_r(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
- uop_MOV(ir, IREG_16(dest_reg), IREG_16(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- CHECK_SEG_LIMITS(block, ir, target_seg, IREG_eaaddr, 1);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_16(src_reg));
- }
-
- return op_pc + 1;
-}
-uint32_t ropMOV_l_r(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
- uop_MOV(ir, IREG_32(dest_reg), IREG_32(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- CHECK_SEG_LIMITS(block, ir, target_seg, IREG_eaaddr, 3);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_32(src_reg));
- }
-
- return op_pc + 1;
-}
-uint32_t ropMOV_r_b(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_MOV(ir, IREG_8(dest_reg), IREG_8(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_8(dest_reg), ireg_seg_base(target_seg), IREG_eaaddr);
- }
-
- return op_pc + 1;
-}
-uint32_t ropMOV_r_w(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_MOV(ir, IREG_16(dest_reg), IREG_16(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_16(dest_reg), ireg_seg_base(target_seg), IREG_eaaddr);
- }
-
- return op_pc + 1;
-}
-uint32_t ropMOV_r_l(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_MOV(ir, IREG_32(dest_reg), IREG_32(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_32(dest_reg), ireg_seg_base(target_seg), IREG_eaaddr);
- }
-
- return op_pc + 1;
-}
-
-uint32_t ropMOV_AL_abs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint32_t addr;
-
- if (op_32 & 0x200)
- addr = fastreadl(cs + op_pc);
- else
- addr = fastreadw(cs + op_pc);
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- codegen_check_seg_read(block, ir, op_ea_seg);
- uop_MEM_LOAD_ABS(ir, IREG_AL, ireg_seg_base(op_ea_seg), addr);
-
- codegen_mark_code_present(block, cs+op_pc, (op_32 & 0x200) ? 4 : 2);
- return op_pc + ((op_32 & 0x200) ? 4 : 2);
-}
-uint32_t ropMOV_AX_abs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint32_t addr;
-
- if (op_32 & 0x200)
- addr = fastreadl(cs + op_pc);
- else
- addr = fastreadw(cs + op_pc);
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- codegen_check_seg_read(block, ir, op_ea_seg);
- uop_MEM_LOAD_ABS(ir, IREG_AX, ireg_seg_base(op_ea_seg), addr);
-
- codegen_mark_code_present(block, cs+op_pc, (op_32 & 0x200) ? 4 : 2);
- return op_pc + ((op_32 & 0x200) ? 4 : 2);
-}
-uint32_t ropMOV_EAX_abs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint32_t addr = 0;
-
- if (op_32 & 0x200)
- {
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- LOAD_IMMEDIATE_FROM_RAM_32(block, ir, IREG_eaaddr, cs + op_pc);
- }
- else
- {
- addr = fastreadl(cs + op_pc);
- codegen_mark_code_present(block, cs+op_pc, 4);
- }
- }
- else
- {
- addr = fastreadw(cs + op_pc);
- codegen_mark_code_present(block, cs+op_pc, 2);
- }
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- codegen_check_seg_read(block, ir, op_ea_seg);
- if ((block->flags & CODEBLOCK_NO_IMMEDIATES) && (op_32 & 0x200))
- uop_MEM_LOAD_REG(ir, IREG_EAX, ireg_seg_base(op_ea_seg), IREG_eaaddr);
- else
- uop_MEM_LOAD_ABS(ir, IREG_EAX, ireg_seg_base(op_ea_seg), addr);
-
- return op_pc + ((op_32 & 0x200) ? 4 : 2);
-}
-
-uint32_t ropMOV_abs_AL(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint32_t addr;
-
- if (op_32 & 0x200)
- addr = fastreadl(cs + op_pc);
- else
- addr = fastreadw(cs + op_pc);
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- codegen_check_seg_write(block, ir, op_ea_seg);
- uop_MEM_STORE_ABS(ir, ireg_seg_base(op_ea_seg), addr, IREG_AL);
-
- codegen_mark_code_present(block, cs+op_pc, (op_32 & 0x200) ? 4 : 2);
- return op_pc + ((op_32 & 0x200) ? 4 : 2);
-}
-uint32_t ropMOV_abs_AX(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint32_t addr;
-
- if (op_32 & 0x200)
- addr = fastreadl(cs + op_pc);
- else
- addr = fastreadw(cs + op_pc);
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- codegen_check_seg_write(block, ir, op_ea_seg);
- uop_MEM_STORE_ABS(ir, ireg_seg_base(op_ea_seg), addr, IREG_AX);
-
- codegen_mark_code_present(block, cs+op_pc, (op_32 & 0x200) ? 4 : 2);
- return op_pc + ((op_32 & 0x200) ? 4 : 2);
-}
-uint32_t ropMOV_abs_EAX(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint32_t addr;
-
- if (op_32 & 0x200)
- addr = fastreadl(cs + op_pc);
- else
- addr = fastreadw(cs + op_pc);
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- codegen_check_seg_write(block, ir, op_ea_seg);
- uop_MEM_STORE_ABS(ir, ireg_seg_base(op_ea_seg), addr, IREG_EAX);
-
- codegen_mark_code_present(block, cs+op_pc, (op_32 & 0x200) ? 4 : 2);
- return op_pc + ((op_32 & 0x200) ? 4 : 2);
-}
-
-uint32_t ropMOV_b_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg;
- uint8_t imm;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- imm = fastreadb(cs + op_pc + 1);
- uop_MOV_IMM(ir, IREG_8(dest_reg), imm);
- }
- else
- {
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- imm = fastreadb(cs + op_pc + 1);
- uop_MEM_STORE_IMM_8(ir, ireg_seg_base(target_seg), IREG_eaaddr, imm);
- }
-
- codegen_mark_code_present(block, cs+op_pc+1, 1);
- return op_pc + 2;
-}
-uint32_t ropMOV_w_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg;
- uint16_t imm;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- imm = fastreadw(cs + op_pc + 1);
- uop_MOV_IMM(ir, IREG_16(dest_reg), imm);
- }
- else
- {
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- imm = fastreadw(cs + op_pc + 1);
- uop_MEM_STORE_IMM_16(ir, ireg_seg_base(target_seg), IREG_eaaddr, imm);
- }
-
- codegen_mark_code_present(block, cs+op_pc+1, 2);
- return op_pc + 3;
-}
-uint32_t ropMOV_l_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg;
- uint32_t imm;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- imm = fastreadl(cs + op_pc + 1);
- uop_MOV_IMM(ir, IREG_32(dest_reg), imm);
- }
- else
- {
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- imm = fastreadl(cs + op_pc + 1);
- uop_MEM_STORE_IMM_32(ir, ireg_seg_base(target_seg), IREG_eaaddr, imm);
- }
-
- codegen_mark_code_present(block, cs+op_pc+1, 4);
- return op_pc + 5;
-}
-
-uint32_t ropMOV_w_seg(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ES*/
- src_reg = IREG_ES_seg_W;
- break;
- case 0x08: /*CS*/
- src_reg = IREG_CS_seg_W;
- break;
- case 0x18: /*DS*/
- src_reg = IREG_DS_seg_W;
- break;
- case 0x10: /*SS*/
- src_reg = IREG_SS_seg_W;
- break;
- case 0x20: /*FS*/
- src_reg = IREG_FS_seg_W;
- break;
- case 0x28: /*GS*/
- src_reg = IREG_GS_seg_W;
- break;
- default:
- return 0;
- }
-
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
- uop_MOV(ir, IREG_16(dest_reg), src_reg);
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- CHECK_SEG_LIMITS(block, ir, target_seg, IREG_eaaddr, 1);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, src_reg);
- }
-
- return op_pc + 1;
-}
-uint32_t ropMOV_l_seg(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ES*/
- src_reg = IREG_ES_seg_W;
- break;
- case 0x08: /*CS*/
- src_reg = IREG_CS_seg_W;
- break;
- case 0x18: /*DS*/
- src_reg = IREG_DS_seg_W;
- break;
- case 0x10: /*SS*/
- src_reg = IREG_SS_seg_W;
- break;
- case 0x20: /*FS*/
- src_reg = IREG_FS_seg_W;
- break;
- case 0x28: /*GS*/
- src_reg = IREG_GS_seg_W;
- break;
- default:
- return 0;
- }
-
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
- uop_MOVZX(ir, IREG_32(dest_reg), src_reg);
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, src_reg);
- }
-
- return op_pc + 1;
-}
-
-uint32_t ropMOV_seg_w(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int src_reg;
- x86seg *rseg;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ES*/
- rseg = &cpu_state.seg_es;
- break;
- case 0x18: /*DS*/
- rseg = &cpu_state.seg_ds;
- break;
- case 0x20: /*FS*/
- rseg = &cpu_state.seg_fs;
- break;
- case 0x28: /*GS*/
- rseg = &cpu_state.seg_gs;
- break;
- default:
- return 0;
- }
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
-
- if ((fetchdat & 0xc0) == 0xc0)
- {
- uop_MOV(ir, IREG_temp0_W, IREG_16(fetchdat & 7));
- src_reg = IREG_temp0_W;
- }
- else
- {
- x86seg *target_seg;
-
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- src_reg = IREG_temp0_W;
- }
-
- uop_LOAD_SEG(ir, rseg, src_reg);
-
- return op_pc + 1;
-}
-
-uint32_t ropMOVSX_16_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_MOVSX(ir, IREG_16(dest_reg), IREG_8(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOVSX(ir, IREG_16(dest_reg), IREG_temp0_B);
- }
-
- return op_pc + 1;
-}
-uint32_t ropMOVSX_32_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_MOVSX(ir, IREG_32(dest_reg), IREG_8(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOVSX(ir, IREG_32(dest_reg), IREG_temp0_B);
- }
-
- return op_pc + 1;
-}
-uint32_t ropMOVSX_32_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_MOVSX(ir, IREG_32(dest_reg), IREG_16(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOVSX(ir, IREG_32(dest_reg), IREG_temp0_W);
- }
-
- return op_pc + 1;
-}
-
-uint32_t ropMOVZX_16_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_MOVZX(ir, IREG_16(dest_reg), IREG_8(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOVZX(ir, IREG_16(dest_reg), IREG_temp0_B);
- }
-
- return op_pc + 1;
-}
-uint32_t ropMOVZX_32_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_MOVZX(ir, IREG_32(dest_reg), IREG_8(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOVZX(ir, IREG_32(dest_reg), IREG_temp0_B);
- }
-
- return op_pc + 1;
-}
-uint32_t ropMOVZX_32_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int dest_reg = (fetchdat >> 3) & 7;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int src_reg = fetchdat & 7;
- uop_MOVZX(ir, IREG_32(dest_reg), IREG_16(src_reg));
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_read(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MOVZX(ir, IREG_32(dest_reg), IREG_temp0_W);
- }
-
- return op_pc + 1;
-}
-
-
-uint32_t ropXCHG_AX(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int reg2 = IREG_16(opcode & 7);
-
- uop_MOV(ir, IREG_temp0_W, IREG_AX);
- uop_MOV(ir, IREG_AX, reg2);
- uop_MOV(ir, reg2, IREG_temp0_W);
-
- return op_pc;
-}
-uint32_t ropXCHG_EAX(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int reg2 = IREG_32(opcode & 7);
-
- uop_MOV(ir, IREG_temp0, IREG_EAX);
- uop_MOV(ir, IREG_EAX, reg2);
- uop_MOV(ir, reg2, IREG_temp0);
-
- return op_pc;
-}
-
-uint32_t ropXCHG_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int reg1 = IREG_8((fetchdat >> 3) & 7);
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int reg2 = IREG_8(fetchdat & 7);
-
- uop_MOV(ir, IREG_temp0_B, reg1);
- uop_MOV(ir, reg1, reg2);
- uop_MOV(ir, reg2, IREG_temp0_B);
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, reg1);
- uop_MOV(ir, reg1, IREG_temp0_B);
- }
-
- return op_pc + 1;
-}
-uint32_t ropXCHG_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int reg1 = IREG_16((fetchdat >> 3) & 7);
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int reg2 = IREG_16(fetchdat & 7);
-
- uop_MOV(ir, IREG_temp0_W, reg1);
- uop_MOV(ir, reg1, reg2);
- uop_MOV(ir, reg2, IREG_temp0_W);
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, reg1);
- uop_MOV(ir, reg1, IREG_temp0_W);
- }
-
- return op_pc + 1;
-}
-uint32_t ropXCHG_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int reg1 = IREG_32((fetchdat >> 3) & 7);
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int reg2 = IREG_32(fetchdat & 7);
-
- uop_MOV(ir, IREG_temp0, reg1);
- uop_MOV(ir, reg1, reg2);
- uop_MOV(ir, reg2, IREG_temp0);
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
-
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, reg1);
- uop_MOV(ir, reg1, IREG_temp0);
- }
-
- return op_pc + 1;
-}
-
-uint32_t ropXLAT(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
-
- uop_MOVZX(ir, IREG_eaaddr, IREG_AL);
- uop_ADD(ir, IREG_eaaddr, IREG_eaaddr, IREG_EBX);
- if (!(op_32 & 0x200))
- uop_AND_IMM(ir, IREG_eaaddr, IREG_eaaddr, 0xffff);
-
- uop_MEM_LOAD_REG(ir, IREG_AL, ireg_seg_base(op_ea_seg), IREG_eaaddr);
-
- return op_pc;
-}
diff --git a/src/codegen_ops_mov.h b/src/codegen_ops_mov.h
index 03a9cb8..61fcd0f 100644
--- a/src/codegen_ops_mov.h
+++ b/src/codegen_ops_mov.h
@@ -1,43 +1,656 @@
-uint32_t ropMOV_rb_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOV_rw_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOV_rl_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+static uint32_t ropMOV_rb_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ STORE_IMM_REG_B(opcode & 7, fetchdat & 0xff);
+
+ return op_pc + 1;
+}
+static uint32_t ropMOV_rw_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ STORE_IMM_REG_W(opcode & 7, fetchdat & 0xffff);
-uint32_t ropMOV_b_r(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOV_w_r(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOV_l_r(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOV_r_b(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOV_r_w(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOV_r_l(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ return op_pc + 2;
+}
+static uint32_t ropMOV_rl_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ fetchdat = fastreadl(cs + op_pc);
-uint32_t ropMOV_AL_abs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOV_AX_abs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOV_EAX_abs(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ STORE_IMM_REG_L(opcode & 7, fetchdat);
+
+ return op_pc + 4;
+}
-uint32_t ropMOV_abs_AL(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOV_abs_AX(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOV_abs_EAX(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOV_b_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOV_w_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOV_l_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+static uint32_t ropMOV_b_r(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_B((fetchdat >> 3) & 7);
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ STORE_REG_TARGET_B_RELEASE(host_reg, fetchdat & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
-uint32_t ropMOV_w_seg(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOV_l_seg(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOV_seg_w(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_WRITE(target_seg);
+ CHECK_SEG_LIMITS(target_seg, 0);
-uint32_t ropMOVSX_16_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOVSX_32_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOVSX_32_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ MEM_STORE_ADDR_EA_B(target_seg, host_reg);
+ RELEASE_REG(host_reg);
+ }
+
+ return op_pc + 1;
+}
+static uint32_t ropMOV_w_r(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg = LOAD_REG_W((fetchdat >> 3) & 7);
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ STORE_REG_TARGET_W_RELEASE(host_reg, fetchdat & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
-uint32_t ropMOVZX_16_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOVZX_32_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropMOVZX_32_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_WRITE(target_seg);
+ CHECK_SEG_LIMITS(target_seg, 1);
-uint32_t ropXCHG_AX(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropXCHG_EAX(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ MEM_STORE_ADDR_EA_W(target_seg, host_reg);
+ RELEASE_REG(host_reg);
+ }
+
+ return op_pc + 1;
+}
-uint32_t ropXCHG_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropXCHG_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropXCHG_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+static uint32_t ropMOV_l_r(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg;
+
+ host_reg = LOAD_REG_L((fetchdat >> 3) & 7);
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ STORE_REG_TARGET_L_RELEASE(host_reg, fetchdat & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
-uint32_t ropXLAT(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_WRITE(target_seg);
+ CHECK_SEG_LIMITS(target_seg, 3);
+
+ MEM_STORE_ADDR_EA_L(target_seg, host_reg);
+ RELEASE_REG(host_reg);
+
+ }
+
+ return op_pc + 1;
+}
+
+static uint32_t ropMOV_r_b(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ int host_reg = LOAD_REG_B(fetchdat & 7);
+ STORE_REG_TARGET_B_RELEASE(host_reg, (fetchdat >> 3) & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+
+ MEM_LOAD_ADDR_EA_B(target_seg);
+ STORE_REG_TARGET_B_RELEASE(0, (fetchdat >> 3) & 7);
+ }
+
+ return op_pc + 1;
+}
+static uint32_t ropMOV_r_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ int host_reg = LOAD_REG_W(fetchdat & 7);
+ STORE_REG_TARGET_W_RELEASE(host_reg, (fetchdat >> 3) & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+
+ MEM_LOAD_ADDR_EA_W(target_seg);
+ STORE_REG_TARGET_W_RELEASE(0, (fetchdat >> 3) & 7);
+ }
+
+ return op_pc + 1;
+}
+static uint32_t ropMOV_r_l(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ int host_reg = LOAD_REG_L(fetchdat & 7);
+ STORE_REG_TARGET_L_RELEASE(host_reg, (fetchdat >> 3) & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+
+ MEM_LOAD_ADDR_EA_L(target_seg);
+ STORE_REG_TARGET_L_RELEASE(0, (fetchdat >> 3) & 7);
+ }
+
+ return op_pc + 1;
+}
+
+static uint32_t ropMOV_b_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ STORE_IMM_REG_B(fetchdat & 7, (fetchdat >> 8) & 0xff);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ uint32_t imm = fastreadb(cs + op_pc + 1);
+ int host_reg = LOAD_REG_IMM(imm);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ CHECK_SEG_WRITE(target_seg);
+
+ MEM_STORE_ADDR_EA_B(target_seg, host_reg);
+ RELEASE_REG(host_reg);
+ }
+
+ return op_pc + 2;
+}
+static uint32_t ropMOV_w_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ STORE_IMM_REG_W(fetchdat & 7, (fetchdat >> 8) & 0xffff);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ uint32_t imm = fastreadw(cs + op_pc + 1);
+ int host_reg = LOAD_REG_IMM(imm);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ CHECK_SEG_WRITE(target_seg);
+
+ MEM_STORE_ADDR_EA_W(target_seg, host_reg);
+ RELEASE_REG(host_reg);
+ }
+
+ return op_pc + 3;
+}
+static uint32_t ropMOV_l_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ uint32_t imm = fastreadl(cs + op_pc + 1);
+
+ STORE_IMM_REG_L(fetchdat & 7, imm);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+ uint32_t imm = fastreadl(cs + op_pc + 1);
+ int host_reg = LOAD_REG_IMM(imm);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ CHECK_SEG_WRITE(target_seg);
+
+ MEM_STORE_ADDR_EA_L(target_seg, host_reg);
+ RELEASE_REG(host_reg);
+ }
+
+ return op_pc + 5;
+}
+
+
+static uint32_t ropMOV_AL_a(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint32_t addr;
+
+ if (op_32 & 0x200)
+ addr = fastreadl(cs + op_pc);
+ else
+ addr = fastreadw(cs + op_pc);
+
+ CHECK_SEG_READ(op_ea_seg);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ MEM_LOAD_ADDR_IMM_B(op_ea_seg, addr);
+ STORE_REG_TARGET_B_RELEASE(0, REG_AL);
+
+ return op_pc + ((op_32 & 0x200) ? 4 : 2);
+}
+static uint32_t ropMOV_AX_a(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint32_t addr;
+
+ if (op_32 & 0x200)
+ addr = fastreadl(cs + op_pc);
+ else
+ addr = fastreadw(cs + op_pc);
+
+ CHECK_SEG_READ(op_ea_seg);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ MEM_LOAD_ADDR_IMM_W(op_ea_seg, addr);
+ STORE_REG_TARGET_W_RELEASE(0, REG_AX);
+
+ return op_pc + ((op_32 & 0x200) ? 4 : 2);
+}
+static uint32_t ropMOV_EAX_a(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint32_t addr;
+
+ if (op_32 & 0x200)
+ addr = fastreadl(cs + op_pc);
+ else
+ addr = fastreadw(cs + op_pc);
+
+ CHECK_SEG_READ(op_ea_seg);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ MEM_LOAD_ADDR_IMM_L(op_ea_seg, addr);
+ STORE_REG_TARGET_L_RELEASE(0, REG_EAX);
+
+ return op_pc + ((op_32 & 0x200) ? 4 : 2);
+}
+
+static uint32_t ropMOV_a_AL(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint32_t addr;
+ int host_reg;
+
+ if (op_32 & 0x200)
+ addr = fastreadl(cs + op_pc);
+ else
+ addr = fastreadw(cs + op_pc);
+
+ CHECK_SEG_WRITE(op_ea_seg);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ host_reg = LOAD_REG_B(REG_AL);
+
+ MEM_STORE_ADDR_IMM_B(op_ea_seg, addr, host_reg);
+ RELEASE_REG(host_reg);
+
+ return op_pc + ((op_32 & 0x200) ? 4 : 2);
+}
+static uint32_t ropMOV_a_AX(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint32_t addr;
+ int host_reg;
+
+ if (op_32 & 0x200)
+ addr = fastreadl(cs + op_pc);
+ else
+ addr = fastreadw(cs + op_pc);
+
+ CHECK_SEG_WRITE(op_ea_seg);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ host_reg = LOAD_REG_W(REG_AX);
+
+ MEM_STORE_ADDR_IMM_W(op_ea_seg, addr, host_reg);
+ RELEASE_REG(host_reg);
+
+ return op_pc + ((op_32 & 0x200) ? 4 : 2);
+}
+static uint32_t ropMOV_a_EAX(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint32_t addr;
+ int host_reg;
+
+ if (op_32 & 0x200)
+ addr = fastreadl(cs + op_pc);
+ else
+ addr = fastreadw(cs + op_pc);
+
+ CHECK_SEG_WRITE(op_ea_seg);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ host_reg = LOAD_REG_L(REG_EAX);
+
+ MEM_STORE_ADDR_IMM_L(op_ea_seg, addr, host_reg);
+ RELEASE_REG(host_reg);
+
+ return op_pc + ((op_32 & 0x200) ? 4 : 2);
+}
+
+static uint32_t ropLEA_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int dest_reg = (fetchdat >> 3) & 7;
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ return 0;
+
+ FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_REG_TARGET_W_RELEASE(0, dest_reg);
+
+ return op_pc + 1;
+}
+static uint32_t ropLEA_l(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int dest_reg = (fetchdat >> 3) & 7;
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ return 0;
+
+ FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_REG_TARGET_L_RELEASE(0, dest_reg);
+
+ return op_pc + 1;
+}
+
+static uint32_t ropMOVZX_w_b(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ int host_reg = LOAD_REG_B(fetchdat & 7);
+ host_reg = ZERO_EXTEND_W_B(host_reg);
+ STORE_REG_TARGET_W_RELEASE(host_reg, (fetchdat >> 3) & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+
+ MEM_LOAD_ADDR_EA_B(target_seg);
+ ZERO_EXTEND_W_B(0);
+ STORE_REG_TARGET_W_RELEASE(0, (fetchdat >> 3) & 7);
+ }
+
+ return op_pc + 1;
+}
+static uint32_t ropMOVZX_l_b(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ int host_reg = LOAD_REG_B(fetchdat & 7);
+ host_reg = ZERO_EXTEND_L_B(host_reg);
+ STORE_REG_TARGET_L_RELEASE(host_reg, (fetchdat >> 3) & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+
+ MEM_LOAD_ADDR_EA_B(target_seg);
+ ZERO_EXTEND_L_B(0);
+ STORE_REG_TARGET_L_RELEASE(0, (fetchdat >> 3) & 7);
+ }
+
+ return op_pc + 1;
+}
+static uint32_t ropMOVZX_l_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ int host_reg = LOAD_REG_W(fetchdat & 7);
+ host_reg = ZERO_EXTEND_L_W(host_reg);
+ STORE_REG_TARGET_L_RELEASE(host_reg, (fetchdat >> 3) & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+
+ MEM_LOAD_ADDR_EA_W(target_seg);
+ ZERO_EXTEND_L_W(0);
+ STORE_REG_TARGET_L_RELEASE(0, (fetchdat >> 3) & 7);
+ }
+
+ return op_pc + 1;
+}
+
+static uint32_t ropMOVSX_w_b(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ int host_reg = LOAD_REG_B(fetchdat & 7);
+ host_reg = SIGN_EXTEND_W_B(host_reg);
+ STORE_REG_TARGET_W_RELEASE(host_reg, (fetchdat >> 3) & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+
+ MEM_LOAD_ADDR_EA_B(target_seg);
+ SIGN_EXTEND_W_B(0);
+ STORE_REG_TARGET_W_RELEASE(0, (fetchdat >> 3) & 7);
+ }
+
+ return op_pc + 1;
+}
+static uint32_t ropMOVSX_l_b(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ int host_reg = LOAD_REG_B(fetchdat & 7);
+ host_reg = SIGN_EXTEND_L_B(host_reg);
+ STORE_REG_TARGET_L_RELEASE(host_reg, (fetchdat >> 3) & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+
+ MEM_LOAD_ADDR_EA_B(target_seg);
+ SIGN_EXTEND_L_B(0);
+ STORE_REG_TARGET_L_RELEASE(0, (fetchdat >> 3) & 7);
+ }
+
+ return op_pc + 1;
+}
+static uint32_t ropMOVSX_l_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ int host_reg = LOAD_REG_W(fetchdat & 7);
+ host_reg = SIGN_EXTEND_L_W(host_reg);
+ STORE_REG_TARGET_L_RELEASE(host_reg, (fetchdat >> 3) & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_READ(target_seg);
+
+ MEM_LOAD_ADDR_EA_W(target_seg);
+ SIGN_EXTEND_L_W(0);
+ STORE_REG_TARGET_L_RELEASE(0, (fetchdat >> 3) & 7);
+ }
+
+ return op_pc + 1;
+}
+
+static uint32_t ropMOV_w_seg(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg;
+
+ switch (fetchdat & 0x38)
+ {
+ case 0x00: /*ES*/
+ host_reg = LOAD_VAR_WL((uintptr_t)&ES);
+ break;
+ case 0x08: /*CS*/
+ host_reg = LOAD_VAR_WL((uintptr_t)&CS);
+ break;
+ case 0x18: /*DS*/
+ host_reg = LOAD_VAR_WL((uintptr_t)&DS);
+ break;
+ case 0x10: /*SS*/
+ host_reg = LOAD_VAR_WL((uintptr_t)&SS);
+ break;
+ case 0x20: /*FS*/
+ host_reg = LOAD_VAR_WL((uintptr_t)&FS);
+ break;
+ case 0x28: /*GS*/
+ host_reg = LOAD_VAR_WL((uintptr_t)&GS);
+ break;
+ default:
+ return 0;
+ }
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ {
+ if (op_32 & 0x100)
+ STORE_REG_TARGET_L_RELEASE(host_reg, fetchdat & 7);
+ else
+ STORE_REG_TARGET_W_RELEASE(host_reg, fetchdat & 7);
+ }
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ CHECK_SEG_WRITE(target_seg);
+ CHECK_SEG_LIMITS(target_seg, 1);
+
+ MEM_STORE_ADDR_EA_W(target_seg, host_reg);
+ RELEASE_REG(host_reg);
+ }
+
+ return op_pc + 1;
+}
+static uint32_t ropMOV_seg_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg;
+
+ switch (fetchdat & 0x38)
+ {
+ case 0x00: /*ES*/
+ case 0x18: /*DS*/
+ case 0x20: /*FS*/
+ case 0x28: /*GS*/
+ break;
+ case 0x10: /*SS*/
+ default:
+ return 0;
+ }
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+
+ if ((fetchdat & 0xc0) == 0xc0)
+ host_reg = LOAD_REG_W(fetchdat & 7);
+ else
+ {
+ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);
+
+ CHECK_SEG_READ(target_seg);
+ MEM_LOAD_ADDR_EA_W(target_seg);
+
+ host_reg = 0;
+ }
+
+ switch (fetchdat & 0x38)
+ {
+ case 0x00: /*ES*/
+ LOAD_SEG(host_reg, &_es);
+ break;
+ case 0x18: /*DS*/
+ LOAD_SEG(host_reg, &_ds);
+ break;
+ case 0x20: /*FS*/
+ LOAD_SEG(host_reg, &_fs);
+ break;
+ case 0x28: /*GS*/
+ LOAD_SEG(host_reg, &_gs);
+ break;
+ }
+
+ return op_pc + 1;
+}
+
+#define ropLseg(seg, rseg) \
+static uint32_t ropL ## seg(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+{ \
+ int dest_reg = (fetchdat >> 3) & 7; \
+ x86seg *target_seg; \
+ \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ return 0; \
+ \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \
+ SAVE_EA(); \
+ \
+ if (op_32 & 0x100) \
+ { \
+ MEM_LOAD_ADDR_EA_L(target_seg); \
+ STORE_HOST_REG_ADDR((uintptr_t)&codegen_temp, 0); \
+ LOAD_EA(); \
+ MEM_LOAD_ADDR_EA_W_OFFSET(target_seg, 4); \
+ } \
+ else \
+ { \
+ MEM_LOAD_ADDR_EA_W(target_seg); \
+ STORE_HOST_REG_ADDR_W((uintptr_t)&codegen_temp, 0); \
+ LOAD_EA(); \
+ MEM_LOAD_ADDR_EA_W_OFFSET(target_seg, 2); \
+ } \
+ LOAD_SEG(0, &rseg); \
+ if (op_32 & 0x100) \
+ { \
+ \
+ int host_reg = LOAD_VAR_L((uintptr_t)&codegen_temp); \
+ STORE_REG_TARGET_L_RELEASE(host_reg, dest_reg); \
+ } \
+ else \
+ { \
+ int host_reg = LOAD_VAR_W((uintptr_t)&codegen_temp); \
+ STORE_REG_TARGET_W_RELEASE(host_reg, dest_reg); \
+ } \
+ \
+ if (&rseg == &_ss) \
+ CPU_BLOCK_END(); /*Instruction might change stack size, so end block here*/ \
+ return op_pc + 1; \
+}
+
+ropLseg(DS, _ds)
+ropLseg(ES, _es)
+ropLseg(FS, _fs)
+ropLseg(GS, _gs)
+ropLseg(SS, _ss)
diff --git a/src/codegen_ops_shift.c b/src/codegen_ops_shift.c
deleted file mode 100644
index 0d19f40..0000000
--- a/src/codegen_ops_shift.c
+++ /dev/null
@@ -1,1135 +0,0 @@
-#include "ibm.h"
-
-#include "x86.h"
-#include "x86_flags.h"
-#include "386_common.h"
-#include "codegen.h"
-#include "codegen_backend.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_helpers.h"
-#include "codegen_ops_shift.h"
-
-static uint32_t shift_common_8(ir_data_t *ir, uint32_t fetchdat, uint32_t op_pc, x86seg *target_seg, int count)
-{
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ROL*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROL_IMM(ir, IREG_8(dest_reg), IREG_8(dest_reg), count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROL8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- break;
-
- case 0x08: /*ROR*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROR_IMM(ir, IREG_8(dest_reg), IREG_8(dest_reg), count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROR8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- break;
-
- case 0x20: case 0x30: /*SHL*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_SHL_IMM(ir, IREG_8(dest_reg), IREG_8(dest_reg), count);
- uop_MOV_IMM(ir, IREG_flags_op2, count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHL8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- break;
-
- case 0x28: /*SHR*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_SHR_IMM(ir, IREG_8(dest_reg), IREG_8(dest_reg), count);
- uop_MOV_IMM(ir, IREG_flags_op2, count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHR8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- break;
-
- case 0x38: /*SAR*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_SAR_IMM(ir, IREG_8(dest_reg), IREG_8(dest_reg), count);
- uop_MOV_IMM(ir, IREG_flags_op2, count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SAR8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- break;
-
- default:
- return 0;
- }
- }
- else
- {
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ROL*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROL_IMM(ir, IREG_temp0_B, IREG_temp0_B, count);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_B);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROL8);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_B);
- break;
-
- case 0x08: /*ROR*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROR_IMM(ir, IREG_temp0_B, IREG_temp0_B, count);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_B);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROR8);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_B);
- break;
-
- case 0x20: case 0x30: /*SHL*/
- uop_SHL_IMM(ir, IREG_temp1_B, IREG_temp0_B, count);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_B);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_B);
- uop_MOV_IMM(ir, IREG_flags_op2, count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHL8);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_B);
- break;
-
- case 0x28: /*SHR*/
- uop_SHR_IMM(ir, IREG_temp1_B, IREG_temp0_B, count);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_B);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_B);
- uop_MOV_IMM(ir, IREG_flags_op2, count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHR8);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_B);
- break;
-
- case 0x38: /*SAR*/
- uop_SAR_IMM(ir, IREG_temp1_B, IREG_temp0_B, count);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_B);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_B);
- uop_MOV_IMM(ir, IREG_flags_op2, count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SAR8);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_B);
- break;
-
- default:
- return 0;
- }
- }
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-
-static uint32_t shift_common_16(ir_data_t *ir, uint32_t fetchdat, uint32_t op_pc, x86seg *target_seg, int count)
-{
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ROL*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROL_IMM(ir, IREG_16(dest_reg), IREG_16(dest_reg), count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROL16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x08: /*ROR*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROR_IMM(ir, IREG_16(dest_reg), IREG_16(dest_reg), count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROR16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x20: case 0x30: /*SHL*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_SHL_IMM(ir, IREG_16(dest_reg), IREG_16(dest_reg), count);
- uop_MOV_IMM(ir, IREG_flags_op2, count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHL16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x28: /*SHR*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_SHR_IMM(ir, IREG_16(dest_reg), IREG_16(dest_reg), count);
- uop_MOV_IMM(ir, IREG_flags_op2, count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHR16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x38: /*SAR*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_SAR_IMM(ir, IREG_16(dest_reg), IREG_16(dest_reg), count);
- uop_MOV_IMM(ir, IREG_flags_op2, count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SAR16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- default:
- return 0;
- }
- }
- else
- {
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ROL*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROL_IMM(ir, IREG_temp0_W, IREG_temp0_W, count);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROL16);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_W);
- break;
-
- case 0x08: /*ROR*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROR_IMM(ir, IREG_temp0_W, IREG_temp0_W, count);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROR16);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_W);
- break;
-
- case 0x20: case 0x30: /*SHL*/
- uop_SHL_IMM(ir, IREG_temp1_W, IREG_temp0_W, count);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op2, count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHL16);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- break;
-
- case 0x28: /*SHR*/
- uop_SHR_IMM(ir, IREG_temp1_W, IREG_temp0_W, count);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op2, count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHR16);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- break;
-
- case 0x38: /*SAR*/
- uop_SAR_IMM(ir, IREG_temp1_W, IREG_temp0_W, count);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op2, count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SAR16);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- break;
-
- default:
- return 0;
- }
- }
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-static uint32_t shift_common_32(ir_data_t *ir, uint32_t fetchdat, uint32_t op_pc, x86seg *target_seg, int count)
-{
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ROL*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROL_IMM(ir, IREG_32(dest_reg), IREG_32(dest_reg), count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROL32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x08: /*ROR*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROR_IMM(ir, IREG_32(dest_reg), IREG_32(dest_reg), count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROR32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x20: case 0x30: /*SHL*/
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_SHL_IMM(ir, IREG_32(dest_reg), IREG_32(dest_reg), count);
- uop_MOV_IMM(ir, IREG_flags_op2, count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHL32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x28: /*SHR*/
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_SHR_IMM(ir, IREG_32(dest_reg), IREG_32(dest_reg), count);
- uop_MOV_IMM(ir, IREG_flags_op2, count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHR32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x38: /*SAR*/
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_SAR_IMM(ir, IREG_32(dest_reg), IREG_32(dest_reg), count);
- uop_MOV_IMM(ir, IREG_flags_op2, count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SAR32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- default:
- return 0;
- }
- }
- else
- {
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ROL*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROL_IMM(ir, IREG_temp0, IREG_temp0, count);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROL32);
- uop_MOV(ir, IREG_flags_res, IREG_temp0);
- break;
-
- case 0x08: /*ROR*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROR_IMM(ir, IREG_temp0, IREG_temp0, count);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROR32);
- uop_MOV(ir, IREG_flags_res, IREG_temp0);
- break;
-
- case 0x20: case 0x30: /*SHL*/
- uop_SHL_IMM(ir, IREG_temp1, IREG_temp0, count);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op2, count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHL32);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- break;
-
- case 0x28: /*SHR*/
- uop_SHR_IMM(ir, IREG_temp1, IREG_temp0, count);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op2, count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHR32);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- break;
-
- case 0x38: /*SAR*/
- uop_SAR_IMM(ir, IREG_temp1, IREG_temp0, count);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op2, count);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SAR32);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- break;
-
- default:
- return 0;
- }
- }
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-
-static uint32_t shift_common_variable_32(ir_data_t *ir, uint32_t fetchdat, uint32_t op_pc, x86seg *target_seg, int count_reg)
-{
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ROL*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROL(ir, IREG_32(dest_reg), IREG_32(dest_reg), count_reg);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROL32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x08: /*ROR*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROR(ir, IREG_32(dest_reg), IREG_32(dest_reg), count_reg);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROR32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x20: case 0x30: /*SHL*/
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_SHL(ir, IREG_32(dest_reg), IREG_32(dest_reg), count_reg);
- uop_MOV(ir, IREG_flags_op2, count_reg);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHL32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x28: /*SHR*/
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_SHR(ir, IREG_32(dest_reg), IREG_32(dest_reg), count_reg);
- uop_MOV(ir, IREG_flags_op2, count_reg);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHR32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x38: /*SAR*/
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_SAR(ir, IREG_32(dest_reg), IREG_32(dest_reg), count_reg);
- uop_MOV(ir, IREG_flags_op2, count_reg);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SAR32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- default:
- return 0;
- }
- }
- else
- {
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ROL*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROL(ir, IREG_temp0, IREG_temp0, count_reg);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROL32);
- uop_MOV(ir, IREG_flags_res, IREG_temp0);
- break;
-
- case 0x08: /*ROR*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROR(ir, IREG_temp0, IREG_temp0, count_reg);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROR32);
- uop_MOV(ir, IREG_flags_res, IREG_temp0);
- break;
-
- case 0x20: case 0x30: /*SHL*/
- uop_SHL(ir, IREG_temp1, IREG_temp0, count_reg);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- uop_MOV(ir, IREG_flags_op2, count_reg);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHL32);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- break;
-
- case 0x28: /*SHR*/
- uop_SHR(ir, IREG_temp1, IREG_temp0, count_reg);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- uop_MOV(ir, IREG_flags_op2, count_reg);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHR32);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- break;
-
- case 0x38: /*SAR*/
- uop_SAR(ir, IREG_temp1, IREG_temp0, count_reg);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- uop_MOV(ir, IREG_flags_op2, count_reg);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SAR32);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- break;
-
- default:
- return 0;
- }
- }
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-
-uint32_t ropC0(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg = NULL;
- uint8_t imm;
-
- if ((fetchdat & 0x30) == 0x10) /*RCL/RCR*/
- return 0;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) != 0xc0)
- {
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- }
- imm = fastreadb(cs + op_pc + 1) & 0x1f;
- codegen_mark_code_present(block, cs+op_pc+1, 1);
-
- if (imm)
- return shift_common_8(ir, fetchdat, op_pc, target_seg, imm) + 1;
- return op_pc+1;
-}
-uint32_t ropC1_w(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg = NULL;
- uint8_t imm;
-
- if ((fetchdat & 0x30) == 0x10) /*RCL/RCR*/
- return 0;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) != 0xc0)
- {
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- }
- imm = fastreadb(cs + op_pc + 1) & 0x1f;
- codegen_mark_code_present(block, cs+op_pc+1, 1);
-
- if (imm)
- return shift_common_16(ir, fetchdat, op_pc, target_seg, imm) + 1;
- return op_pc+1;
-}
-uint32_t ropC1_l(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg = NULL;
-
- if ((fetchdat & 0x30) == 0x10) /*RCL/RCR*/
- return 0;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) != 0xc0)
- {
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- }
- if (block->flags & CODEBLOCK_NO_IMMEDIATES)
- {
- uint32_t new_pc;
- int jump_uop;
-
- LOAD_IMMEDIATE_FROM_RAM_8(block, ir, IREG_temp2, cs + op_pc + 1);
- uop_AND_IMM(ir, IREG_temp2, IREG_temp2, 0x1f);
- jump_uop = uop_CMP_IMM_JZ_DEST(ir, IREG_temp2, 0);
-
- new_pc = shift_common_variable_32(ir, fetchdat, op_pc, target_seg, IREG_temp2) + 1;
- uop_NOP_BARRIER(ir);
- uop_set_jump_dest(ir, jump_uop);
- return new_pc;
- }
- else
- {
- uint8_t imm = fastreadb(cs + op_pc + 1) & 0x1f;
- codegen_mark_code_present(block, cs+op_pc+1, 1);
-
- if (imm)
- return shift_common_32(ir, fetchdat, op_pc, target_seg, imm) + 1;
- }
- return op_pc+1;
-}
-
-uint32_t ropD0(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg = NULL;
-
- if ((fetchdat & 0x30) == 0x10) /*RCL/RCR*/
- return 0;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) != 0xc0)
- {
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
- }
-
- return shift_common_8(ir, fetchdat, op_pc, target_seg, 1);
-}
-uint32_t ropD1_w(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg = NULL;
-
- if ((fetchdat & 0x30) == 0x10) /*RCL/RCR*/
- return 0;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) != 0xc0)
- {
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
- }
-
- return shift_common_16(ir, fetchdat, op_pc, target_seg, 1);
-}
-uint32_t ropD1_l(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg = NULL;
-
- if ((fetchdat & 0x30) == 0x10) /*RCL/RCR*/
- return 0;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) != 0xc0)
- {
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
- }
-
- return shift_common_32(ir, fetchdat, op_pc, target_seg, 1);
-}
-
-uint32_t ropD2(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- if ((fetchdat & 0x30) == 0x10) /*RCL/RCR*/
- return 0;
-
- if (!(CL & 0x1f) || !block->ins)
- return 0;
-
- uop_AND_IMM(ir, IREG_temp2, REG_ECX, 0x1f);
- uop_CMP_IMM_JZ(ir, IREG_temp2, 0, codegen_exit_rout);
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ROL*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROL(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROL8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- break;
-
- case 0x08: /*ROR*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROR(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROR8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- break;
-
- case 0x20: case 0x30: /*SHL*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_SHL(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp2);
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHL8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- break;
-
- case 0x28: /*SHR*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_SHR(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp2);
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHR8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- break;
-
- case 0x38: /*SAR*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_8(dest_reg));
- uop_SAR(ir, IREG_8(dest_reg), IREG_8(dest_reg), IREG_temp2);
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SAR8);
- uop_MOVZX(ir, IREG_flags_res, IREG_8(dest_reg));
- break;
-
- default:
- return 0;
- }
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_B, ireg_seg_base(target_seg), IREG_eaaddr);
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ROL*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROL(ir, IREG_temp0_B, IREG_temp0_B, IREG_temp2);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_B);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROL8);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_B);
- break;
-
- case 0x08: /*ROR*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROR(ir, IREG_temp0_B, IREG_temp0_B, IREG_temp2);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_B);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROR8);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_B);
- break;
-
- case 0x20: case 0x30: /*SHL*/
- uop_SHL(ir, IREG_temp1_B, IREG_temp0_B, IREG_temp2);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_B);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_B);
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHL8);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_B);
- break;
-
- case 0x28: /*SHR*/
- uop_SHR(ir, IREG_temp1_B, IREG_temp0_B, IREG_temp2);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_B);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_B);
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHR8);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_B);
- break;
-
- case 0x38: /*SAR*/
- uop_SAR(ir, IREG_temp1_B, IREG_temp0_B, IREG_temp2);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_B);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_B);
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SAR8);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_B);
- break;
-
- default:
- return 0;
- }
- }
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropD3_w(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- if ((fetchdat & 0x30) == 0x10) /*RCL/RCR*/
- return 0;
-
- if (!(CL & 0x1f) || !block->ins)
- return 0;
-
- uop_AND_IMM(ir, IREG_temp2, REG_ECX, 0x1f);
- uop_CMP_IMM_JZ(ir, IREG_temp2, 0, codegen_exit_rout);
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ROL*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROL(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROL16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x08: /*ROR*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROR(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROR16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x20: case 0x30: /*SHL*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_SHL(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp2);
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHL16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x28: /*SHR*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_SHR(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp2);
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHR16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- case 0x38: /*SAR*/
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_SAR(ir, IREG_16(dest_reg), IREG_16(dest_reg), IREG_temp2);
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SAR16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- break;
-
- default:
- return 0;
- }
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, ireg_seg_base(target_seg), IREG_eaaddr);
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ROL*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROL(ir, IREG_temp0_W, IREG_temp0_W, IREG_temp2);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROL16);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_W);
- break;
-
- case 0x08: /*ROR*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROR(ir, IREG_temp0_W, IREG_temp0_W, IREG_temp2);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROR16);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_W);
- break;
-
- case 0x20: case 0x30: /*SHL*/
- uop_SHL(ir, IREG_temp1_W, IREG_temp0_W, IREG_temp2);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHL16);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- break;
-
- case 0x28: /*SHR*/
- uop_SHR(ir, IREG_temp1_W, IREG_temp0_W, IREG_temp2);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHR16);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- break;
-
- case 0x38: /*SAR*/
- uop_SAR(ir, IREG_temp1_W, IREG_temp0_W, IREG_temp2);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1_W);
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp0_W);
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SAR16);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp1_W);
- break;
-
- default:
- return 0;
- }
- }
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-uint32_t ropD3_l(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- if ((fetchdat & 0x30) == 0x10) /*RCL/RCR*/
- return 0;
-
- if (!(CL & 0x1f) || !block->ins)
- return 0;
-
- uop_AND_IMM(ir, IREG_temp2, REG_ECX, 0x1f);
- uop_CMP_IMM_JZ(ir, IREG_temp2, 0, codegen_exit_rout);
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ROL*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROL(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROL32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x08: /*ROR*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROR(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROR32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x20: case 0x30: /*SHL*/
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_SHL(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp2);
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHL32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x28: /*SHR*/
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_SHR(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp2);
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHR32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- case 0x38: /*SAR*/
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_SAR(ir, IREG_32(dest_reg), IREG_32(dest_reg), IREG_temp2);
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SAR32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- break;
-
- default:
- return 0;
- }
- }
- else
- {
- x86seg *target_seg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- codegen_check_seg_write(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp0, ireg_seg_base(target_seg), IREG_eaaddr);
-
- switch (fetchdat & 0x38)
- {
- case 0x00: /*ROL*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROL(ir, IREG_temp0, IREG_temp0, IREG_temp2);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROL32);
- uop_MOV(ir, IREG_flags_res, IREG_temp0);
- break;
-
- case 0x08: /*ROR*/
- uop_CALL_FUNC(ir, flags_rebuild);
- uop_ROR(ir, IREG_temp0, IREG_temp0, IREG_temp2);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_ROR32);
- uop_MOV(ir, IREG_flags_res, IREG_temp0);
- break;
-
- case 0x20: case 0x30: /*SHL*/
- uop_SHL(ir, IREG_temp1, IREG_temp0, IREG_temp2);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHL32);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- break;
-
- case 0x28: /*SHR*/
- uop_SHR(ir, IREG_temp1, IREG_temp0, IREG_temp2);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHR32);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- break;
-
- case 0x38: /*SAR*/
- uop_SAR(ir, IREG_temp1, IREG_temp0, IREG_temp2);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp1);
- uop_MOV(ir, IREG_flags_op1, IREG_temp0);
- uop_MOV(ir, IREG_flags_op2, IREG_temp2);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SAR32);
- uop_MOV(ir, IREG_flags_res, IREG_temp1);
- break;
-
- default:
- return 0;
- }
- }
-
- codegen_flags_changed = 1;
- return op_pc + 1;
-}
-
-uint32_t ropSHLD_16_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg = NULL;
- int src_reg = (fetchdat >> 3) & 7;
- uint8_t imm;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) != 0xc0)
- {
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- }
- imm = fastreadb(cs + op_pc + 1) & 0x1f;
- codegen_mark_code_present(block, cs+op_pc+1, 1);
-
- if (!imm)
- return op_pc+2;
-
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_SHL_IMM(ir, IREG_temp0_W, IREG_16(dest_reg), imm);
- uop_SHR_IMM(ir, IREG_temp1_W, IREG_16(src_reg), 16 - imm);
- uop_OR(ir, IREG_16(dest_reg), IREG_temp0_W, IREG_temp1_W);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHL16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- }
- else
- {
- codegen_check_seg_write(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp2_W, ireg_seg_base(target_seg), IREG_eaaddr);
-
- uop_SHL_IMM(ir, IREG_temp0_W, IREG_temp2, imm);
- uop_SHR_IMM(ir, IREG_temp1_W, IREG_16(src_reg), 16 - imm);
- uop_OR(ir, IREG_temp0_W, IREG_temp0_W, IREG_temp1_W);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp2_W);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHL16);
- }
-
- return op_pc+2;
-}
-uint32_t ropSHLD_32_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg = NULL;
- int src_reg = (fetchdat >> 3) & 7;
- uint8_t imm;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) != 0xc0)
- {
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- }
- imm = fastreadb(cs + op_pc + 1) & 0x1f;
- codegen_mark_code_present(block, cs+op_pc+1, 1);
-
- if (!imm)
- return op_pc+2;
-
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_SHL_IMM(ir, IREG_temp0, IREG_32(dest_reg), imm);
- uop_SHR_IMM(ir, IREG_temp1, IREG_32(src_reg), 32 - imm);
- uop_OR(ir, IREG_32(dest_reg), IREG_temp0, IREG_temp1);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHL32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- }
- else
- {
- codegen_check_seg_write(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp2, ireg_seg_base(target_seg), IREG_eaaddr);
-
- uop_SHL_IMM(ir, IREG_temp0, IREG_temp2, imm);
- uop_SHR_IMM(ir, IREG_temp1, IREG_32(src_reg), 32 - imm);
- uop_OR(ir, IREG_temp0, IREG_temp0, IREG_temp1);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
-
- uop_MOV(ir, IREG_flags_op1, IREG_temp2);
- uop_MOV(ir, IREG_flags_res, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHL32);
- }
-
- return op_pc+2;
-}
-uint32_t ropSHRD_16_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg = NULL;
- int src_reg = (fetchdat >> 3) & 7;
- uint8_t imm;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) != 0xc0)
- {
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- }
- imm = fastreadb(cs + op_pc + 1) & 0x1f;
- codegen_mark_code_present(block, cs+op_pc+1, 1);
-
- if (!imm)
- return op_pc+2;
-
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_16(dest_reg));
- uop_SHR_IMM(ir, IREG_temp0_W, IREG_16(dest_reg), imm);
- uop_SHL_IMM(ir, IREG_temp1_W, IREG_16(src_reg), 16 - imm);
- uop_OR(ir, IREG_16(dest_reg), IREG_temp0_W, IREG_temp1_W);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHR16);
- uop_MOVZX(ir, IREG_flags_res, IREG_16(dest_reg));
- }
- else
- {
- codegen_check_seg_write(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp2_W, ireg_seg_base(target_seg), IREG_eaaddr);
-
- uop_SHR_IMM(ir, IREG_temp0_W, IREG_temp2, imm);
- uop_SHL_IMM(ir, IREG_temp1_W, IREG_16(src_reg), 16 - imm);
- uop_OR(ir, IREG_temp0_W, IREG_temp0_W, IREG_temp1_W);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
-
- uop_MOVZX(ir, IREG_flags_op1, IREG_temp2_W);
- uop_MOVZX(ir, IREG_flags_res, IREG_temp0_W);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHR16);
- }
-
- return op_pc+2;
-}
-uint32_t ropSHRD_32_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- x86seg *target_seg = NULL;
- int src_reg = (fetchdat >> 3) & 7;
- uint8_t imm;
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) != 0xc0)
- {
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 0);
- }
- imm = fastreadb(cs + op_pc + 1) & 0x1f;
- codegen_mark_code_present(block, cs+op_pc+1, 1);
-
- if (!imm)
- return op_pc+2;
-
- if ((fetchdat & 0xc0) == 0xc0)
- {
- int dest_reg = fetchdat & 7;
-
- uop_MOV(ir, IREG_flags_op1, IREG_32(dest_reg));
- uop_SHR_IMM(ir, IREG_temp0, IREG_32(dest_reg), imm);
- uop_SHL_IMM(ir, IREG_temp1, IREG_32(src_reg), 32 - imm);
- uop_OR(ir, IREG_32(dest_reg), IREG_temp0, IREG_temp1);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHR32);
- uop_MOV(ir, IREG_flags_res, IREG_32(dest_reg));
- }
- else
- {
- codegen_check_seg_write(block, ir, target_seg);
- uop_MEM_LOAD_REG(ir, IREG_temp2, ireg_seg_base(target_seg), IREG_eaaddr);
-
- uop_SHR_IMM(ir, IREG_temp0, IREG_temp2, imm);
- uop_SHL_IMM(ir, IREG_temp1, IREG_32(src_reg), 32 - imm);
- uop_OR(ir, IREG_temp0, IREG_temp0, IREG_temp1);
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
-
- uop_MOV(ir, IREG_flags_op1, IREG_temp2);
- uop_MOV(ir, IREG_flags_res, IREG_temp0);
- uop_MOV_IMM(ir, IREG_flags_op2, imm);
- uop_MOV_IMM(ir, IREG_flags_op, FLAGS_SHR32);
- }
-
- return op_pc+2;
-}
diff --git a/src/codegen_ops_shift.h b/src/codegen_ops_shift.h
index f109b0d..75d024f 100644
--- a/src/codegen_ops_shift.h
+++ b/src/codegen_ops_shift.h
@@ -1,16 +1,125 @@
-uint32_t ropC0(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropC1_w(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropC1_l(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+#define SHIFT(size, size2, res_store, immediate) \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ { \
+ reg = LOAD_REG_ ## size(fetchdat & 7); \
+ if (immediate) count = (fetchdat >> 8) & 0x1f; \
+ } \
+ else \
+ { \
+ target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ SAVE_EA(); \
+ MEM_CHECK_WRITE_ ## size(target_seg); \
+ reg = MEM_LOAD_ADDR_EA_ ## size ## _NO_ABRT(target_seg); \
+ if (immediate) count = fastreadb(cs + op_pc + 1) & 0x1f; \
+ } \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op2, count); \
+ \
+ res_store((uintptr_t)&cpu_state.flags_op1, reg); \
+ \
+ switch (fetchdat & 0x38) \
+ { \
+ case 0x20: case 0x30: /*SHL*/ \
+ SHL_ ## size ## _IMM(reg, count); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SHL ## size2); \
+ break; \
+ \
+ case 0x28: /*SHR*/ \
+ SHR_ ## size ## _IMM(reg, count); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SHR ## size2); \
+ break; \
+ \
+ case 0x38: /*SAR*/ \
+ SAR_ ## size ## _IMM(reg, count); \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.flags_op, FLAGS_SAR ## size2); \
+ break; \
+ } \
+ \
+ res_store((uintptr_t)&cpu_state.flags_res, reg); \
+ if ((fetchdat & 0xc0) == 0xc0) \
+ STORE_REG_ ## size ## _RELEASE(reg); \
+ else \
+ { \
+ LOAD_EA(); \
+ MEM_STORE_ADDR_EA_ ## size ## _NO_ABRT(target_seg, reg); \
+ }
-uint32_t ropD0(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropD1_w(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropD1_l(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+static uint32_t ropC0(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg = NULL;
+ int count;
+ int reg;
-uint32_t ropD2(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropD3_w(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropD3_l(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ if ((fetchdat & 0x38) < 0x20)
+ return 0;
-uint32_t ropSHLD_16_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSHLD_32_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSHRD_16_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropSHRD_32_imm(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ SHIFT(B, 8, STORE_HOST_REG_ADDR_BL, 1);
+
+ return op_pc + 2;
+}
+static uint32_t ropC1_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg = NULL;
+ int count;
+ int reg;
+
+ if ((fetchdat & 0x38) < 0x20)
+ return 0;
+
+ SHIFT(W, 16, STORE_HOST_REG_ADDR_WL, 1);
+
+ return op_pc + 2;
+}
+static uint32_t ropC1_l(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg = NULL;
+ int count;
+ int reg;
+
+ if ((fetchdat & 0x38) < 0x20)
+ return 0;
+
+ SHIFT(L, 32, STORE_HOST_REG_ADDR, 1);
+
+ return op_pc + 2;
+}
+
+static uint32_t ropD0(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg = NULL;
+ int count = 1;
+ int reg;
+
+ if ((fetchdat & 0x38) < 0x20)
+ return 0;
+
+ SHIFT(B, 8, STORE_HOST_REG_ADDR_BL, 0);
+
+ return op_pc + 1;
+}
+static uint32_t ropD1_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg = NULL;
+ int count = 1;
+ int reg;
+
+ if ((fetchdat & 0x38) < 0x20)
+ return 0;
+
+ SHIFT(W, 16, STORE_HOST_REG_ADDR_WL, 0);
+
+ return op_pc + 1;
+}
+static uint32_t ropD1_l(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ x86seg *target_seg = NULL;
+ int count = 1;
+ int reg;
+
+ if ((fetchdat & 0x38) < 0x20)
+ return 0;
+
+ SHIFT(L, 32, STORE_HOST_REG_ADDR, 0);
+
+ return op_pc + 1;
+}
diff --git a/src/codegen_ops_stack.c b/src/codegen_ops_stack.c
deleted file mode 100644
index c3c8a46..0000000
--- a/src/codegen_ops_stack.c
+++ /dev/null
@@ -1,409 +0,0 @@
-#include "ibm.h"
-
-#include "x86.h"
-#include "x86_flags.h"
-#include "386_common.h"
-#include "codegen.h"
-#include "codegen_ir.h"
-#include "codegen_ops.h"
-#include "codegen_ops_helpers.h"
-#include "codegen_ops_misc.h"
-
-uint32_t ropPUSH_r16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int sp_reg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- sp_reg = LOAD_SP_WITH_OFFSET(ir, -2);
- uop_MEM_STORE_REG(ir, IREG_SS_base, sp_reg, IREG_16(opcode & 7));
- SUB_SP(ir, 2);
-
- return op_pc;
-}
-uint32_t ropPUSH_r32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int sp_reg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- sp_reg = LOAD_SP_WITH_OFFSET(ir, -4);
- uop_MEM_STORE_REG(ir, IREG_SS_base, sp_reg, IREG_32(opcode & 7));
- SUB_SP(ir, 4);
-
- return op_pc;
-}
-
-uint32_t ropPOP_r16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
-
- if (stack32)
- uop_MEM_LOAD_REG(ir, IREG_16(opcode & 7), IREG_SS_base, IREG_ESP);
- else
- {
- uop_MOVZX(ir, IREG_eaaddr, IREG_SP);
- uop_MEM_LOAD_REG(ir, IREG_16(opcode & 7), IREG_SS_base, IREG_eaaddr);
- }
- if ((opcode & 7) != REG_SP)
- ADD_SP(ir, 2);
-
- return op_pc;
-}
-uint32_t ropPOP_r32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
-
- if (stack32)
- uop_MEM_LOAD_REG(ir, IREG_32(opcode & 7), IREG_SS_base, IREG_ESP);
- else
- {
- uop_MOVZX(ir, IREG_eaaddr, IREG_SP);
- uop_MEM_LOAD_REG(ir, IREG_32(opcode & 7), IREG_SS_base, IREG_eaaddr);
- }
- if ((opcode & 7) != REG_ESP)
- ADD_SP(ir, 4);
-
- return op_pc;
-}
-
-uint32_t ropPUSH_imm_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint16_t imm = fastreadw(cs + op_pc);
- int sp_reg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- sp_reg = LOAD_SP_WITH_OFFSET(ir, -2);
- uop_MEM_STORE_IMM_16(ir, IREG_SS_base, sp_reg, imm);
- SUB_SP(ir, 2);
-
- codegen_mark_code_present(block, cs+op_pc, 2);
- return op_pc + 2;
-}
-uint32_t ropPUSH_imm_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint32_t imm = fastreadl(cs + op_pc);
- int sp_reg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- sp_reg = LOAD_SP_WITH_OFFSET(ir, -4);
- uop_MEM_STORE_IMM_32(ir, IREG_SS_base, sp_reg, imm);
- SUB_SP(ir, 4);
-
- codegen_mark_code_present(block, cs+op_pc, 4);
- return op_pc + 4;
-}
-
-uint32_t ropPUSH_imm_16_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint16_t imm = (int16_t)(int8_t)fastreadb(cs + op_pc);
- int sp_reg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- sp_reg = LOAD_SP_WITH_OFFSET(ir, -2);
- uop_MEM_STORE_IMM_16(ir, IREG_SS_base, sp_reg, imm);
- SUB_SP(ir, 2);
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- return op_pc + 1;
-}
-uint32_t ropPUSH_imm_32_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uint32_t imm = (int32_t)(int8_t)fastreadb(cs + op_pc);
- int sp_reg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- sp_reg = LOAD_SP_WITH_OFFSET(ir, -4);
- uop_MEM_STORE_IMM_32(ir, IREG_SS_base, sp_reg, imm);
- SUB_SP(ir, 4);
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- return op_pc + 1;
-}
-
-uint32_t ropPOP_W(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- if (stack32)
- uop_MEM_LOAD_REG(ir, IREG_16(fetchdat & 7), IREG_SS_base, IREG_ESP);
- else
- {
- uop_MOVZX(ir, IREG_eaaddr, IREG_SP);
- uop_MEM_LOAD_REG(ir, IREG_16(fetchdat & 7), IREG_SS_base, IREG_eaaddr);
- }
- }
- else
- {
- x86seg *target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 2);
- codegen_check_seg_write(block, ir, target_seg);
-
- if (stack32)
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_ESP);
- else
- {
- uop_MOVZX(ir, IREG_temp0, IREG_SP);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_temp0);
- }
-
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
- }
-
- if ((fetchdat & 0xc7) != (0xc0 | REG_SP))
- ADD_SP(ir, 2);
-
- return op_pc + 1;
-}
-uint32_t ropPOP_L(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
-
- codegen_mark_code_present(block, cs+op_pc, 1);
- if ((fetchdat & 0xc0) == 0xc0)
- {
- if (stack32)
- uop_MEM_LOAD_REG(ir, IREG_32(fetchdat & 7), IREG_SS_base, IREG_ESP);
- else
- {
- uop_MOVZX(ir, IREG_eaaddr, IREG_SP);
- uop_MEM_LOAD_REG(ir, IREG_32(fetchdat & 7), IREG_SS_base, IREG_eaaddr);
- }
- }
- else
- {
- x86seg *target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 4);
- codegen_check_seg_write(block, ir, target_seg);
-
- if (stack32)
- uop_MEM_LOAD_REG(ir, IREG_temp0, IREG_SS_base, IREG_ESP);
- else
- {
- uop_MOVZX(ir, IREG_temp0, IREG_SP);
- uop_MEM_LOAD_REG(ir, IREG_temp0, IREG_SS_base, IREG_temp0);
- }
-
- uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
- }
-
- if ((fetchdat & 0xc7) != (0xc0 | REG_ESP))
- ADD_SP(ir, 4);
-
- return op_pc + 1;
-}
-
-#define ROP_PUSH_SEG(seg) \
-uint32_t ropPUSH_ ## seg ## _16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- int sp_reg; \
- \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- sp_reg = LOAD_SP_WITH_OFFSET(ir, -2); \
- uop_MEM_STORE_REG(ir, IREG_SS_base, sp_reg, IREG_ ## seg ## _seg_W); \
- SUB_SP(ir, 2); \
- \
- return op_pc; \
-} \
-uint32_t ropPUSH_ ## seg ## _32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- int sp_reg; \
- \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- sp_reg = LOAD_SP_WITH_OFFSET(ir, -4); \
- uop_MOVZX(ir, IREG_temp0, IREG_ ## seg ## _seg_W); \
- uop_MEM_STORE_REG(ir, IREG_SS_base, sp_reg, IREG_temp0); \
- SUB_SP(ir, 4); \
- \
- return op_pc; \
-}
-
-#define ROP_POP_SEG(seg, rseg) \
-uint32_t ropPOP_ ## seg ## _16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- \
- if (stack32) \
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_ESP); \
- else \
- { \
- uop_MOVZX(ir, IREG_eaaddr, IREG_SP); \
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_eaaddr); \
- } \
- uop_LOAD_SEG(ir, &rseg, IREG_temp0_W); \
- ADD_SP(ir, 2); \
- \
- return op_pc; \
-} \
-uint32_t ropPOP_ ## seg ## _32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
-{ \
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
- \
- if (stack32) \
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_ESP); \
- else \
- { \
- uop_MOVZX(ir, IREG_eaaddr, IREG_SP); \
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_eaaddr); \
- } \
- uop_LOAD_SEG(ir, &rseg, IREG_temp0_W); \
- ADD_SP(ir, 4); \
- \
- return op_pc; \
-}
-
-
-ROP_PUSH_SEG(CS)
-ROP_PUSH_SEG(DS)
-ROP_PUSH_SEG(ES)
-ROP_PUSH_SEG(FS)
-ROP_PUSH_SEG(GS)
-ROP_PUSH_SEG(SS)
-ROP_POP_SEG(DS, cpu_state.seg_ds)
-ROP_POP_SEG(ES, cpu_state.seg_es)
-ROP_POP_SEG(FS, cpu_state.seg_fs)
-ROP_POP_SEG(GS, cpu_state.seg_gs)
-
-uint32_t ropLEAVE_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
-
- if (stack32)
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_EBP);
- else
- {
- uop_MOVZX(ir, IREG_eaaddr, IREG_BP);
- uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_eaaddr);
- }
- uop_ADD_IMM(ir, IREG_SP, IREG_BP, 2);
- uop_MOV(ir, IREG_BP, IREG_temp0_W);
-
- return op_pc;
-}
-uint32_t ropLEAVE_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
-
- if (stack32)
- uop_MEM_LOAD_REG(ir, IREG_temp0, IREG_SS_base, IREG_EBP);
- else
- {
- uop_MOVZX(ir, IREG_eaaddr, IREG_BP);
- uop_MEM_LOAD_REG(ir, IREG_temp0, IREG_SS_base, IREG_eaaddr);
- }
- uop_ADD_IMM(ir, IREG_ESP, IREG_EBP, 4);
- uop_MOV(ir, IREG_EBP, IREG_temp0);
-
- return op_pc;
-}
-
-
-uint32_t ropPUSHA_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int sp_reg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- sp_reg = LOAD_SP_WITH_OFFSET(ir, -16);
- uop_MEM_STORE_REG_OFFSET(ir, IREG_SS_base, sp_reg, 14, IREG_AX);
- uop_MEM_STORE_REG_OFFSET(ir, IREG_SS_base, sp_reg, 12, IREG_CX);
- uop_MEM_STORE_REG_OFFSET(ir, IREG_SS_base, sp_reg, 10, IREG_DX);
- uop_MEM_STORE_REG_OFFSET(ir, IREG_SS_base, sp_reg, 8, IREG_BX);
- uop_MEM_STORE_REG_OFFSET(ir, IREG_SS_base, sp_reg, 6, IREG_SP);
- uop_MEM_STORE_REG_OFFSET(ir, IREG_SS_base, sp_reg, 4, IREG_BP);
- uop_MEM_STORE_REG_OFFSET(ir, IREG_SS_base, sp_reg, 2, IREG_SI);
- uop_MEM_STORE_REG(ir, IREG_SS_base, sp_reg, IREG_DI);
- SUB_SP(ir, 16);
-
- return op_pc;
-}
-uint32_t ropPUSHA_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int sp_reg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- sp_reg = LOAD_SP_WITH_OFFSET(ir, -32);
- uop_MEM_STORE_REG_OFFSET(ir, IREG_SS_base, sp_reg, 28, IREG_EAX);
- uop_MEM_STORE_REG_OFFSET(ir, IREG_SS_base, sp_reg, 24, IREG_ECX);
- uop_MEM_STORE_REG_OFFSET(ir, IREG_SS_base, sp_reg, 20, IREG_EDX);
- uop_MEM_STORE_REG_OFFSET(ir, IREG_SS_base, sp_reg, 16, IREG_EBX);
- uop_MEM_STORE_REG_OFFSET(ir, IREG_SS_base, sp_reg, 12, IREG_ESP);
- uop_MEM_STORE_REG_OFFSET(ir, IREG_SS_base, sp_reg, 8, IREG_EBP);
- uop_MEM_STORE_REG_OFFSET(ir, IREG_SS_base, sp_reg, 4, IREG_ESI);
- uop_MEM_STORE_REG(ir, IREG_SS_base, sp_reg, IREG_EDI);
- SUB_SP(ir, 32);
-
- return op_pc;
-}
-
-uint32_t ropPOPA_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int sp_reg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- sp_reg = LOAD_SP(ir);
- uop_MEM_LOAD_REG(ir, IREG_DI, IREG_SS_base, sp_reg);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_SI, IREG_SS_base, sp_reg, 2);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_BP, IREG_SS_base, sp_reg, 4);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_BX, IREG_SS_base, sp_reg, 8);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_DX, IREG_SS_base, sp_reg, 10);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_CX, IREG_SS_base, sp_reg, 12);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_AX, IREG_SS_base, sp_reg, 14);
- ADD_SP(ir, 16);
-
- return op_pc;
-}
-uint32_t ropPOPA_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int sp_reg;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- sp_reg = LOAD_SP(ir);
- uop_MEM_LOAD_REG(ir, IREG_EDI, IREG_SS_base, sp_reg);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_ESI, IREG_SS_base, sp_reg, 4);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_EBP, IREG_SS_base, sp_reg, 8);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_EBX, IREG_SS_base, sp_reg, 16);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_EDX, IREG_SS_base, sp_reg, 20);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_ECX, IREG_SS_base, sp_reg, 24);
- uop_MEM_LOAD_REG_OFFSET(ir, IREG_EAX, IREG_SS_base, sp_reg, 28);
- ADD_SP(ir, 32);
-
- return op_pc;
-}
-
-uint32_t ropPUSHF(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int sp_reg;
-
- if ((cpu_state.eflags & VM_FLAG) && (IOPL < 3))
- return 0;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- uop_CALL_FUNC(ir, flags_rebuild);
- sp_reg = LOAD_SP_WITH_OFFSET(ir, -2);
- uop_MEM_STORE_REG(ir, IREG_SS_base, sp_reg, IREG_flags);
- SUB_SP(ir, 2);
-
- return op_pc;
-}
-uint32_t ropPUSHFD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
-{
- int sp_reg;
-
- if ((cpu_state.eflags & VM_FLAG) && (IOPL < 3))
- return 0;
-
- uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
- uop_CALL_FUNC(ir, flags_rebuild);
-
- if (cpu_CR4_mask & CR4_VME)
- uop_AND_IMM(ir, IREG_temp0_W, IREG_eflags, 0x3c);
- else if (CPUID)
- uop_AND_IMM(ir, IREG_temp0_W, IREG_eflags, 0x24);
- else
- uop_AND_IMM(ir, IREG_temp0_W, IREG_eflags, 4);
- sp_reg = LOAD_SP_WITH_OFFSET(ir, -4);
- uop_MEM_STORE_REG(ir, IREG_SS_base, sp_reg, IREG_flags);
- uop_MEM_STORE_REG_OFFSET(ir, IREG_SS_base, sp_reg, 2, IREG_temp0_W);
- SUB_SP(ir, 4);
-
- return op_pc;
-}
diff --git a/src/codegen_ops_stack.h b/src/codegen_ops_stack.h
index 6b9ac57..3ea27d3 100644
--- a/src/codegen_ops_stack.h
+++ b/src/codegen_ops_stack.h
@@ -1,49 +1,269 @@
-uint32_t ropPUSH_r16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUSH_r32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+static uint32_t ropPUSH_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg;
-uint32_t ropPOP_r16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPOP_r32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_STACK_TO_EA(-2);
+ host_reg = LOAD_REG_W(opcode & 7);
+ MEM_STORE_ADDR_EA_W(&_ss, host_reg);
+ SP_MODIFY(-2);
+
+ return op_pc;
+}
+static uint32_t ropPUSH_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg;
-uint32_t ropPUSH_imm_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUSH_imm_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUSH_imm_16_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUSH_imm_32_8(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_STACK_TO_EA(-4);
+ host_reg = LOAD_REG_L(opcode & 7);
+ MEM_STORE_ADDR_EA_L(&_ss, host_reg);
+ SP_MODIFY(-4);
-uint32_t ropPOP_W(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPOP_L(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ return op_pc;
+}
-uint32_t ropPUSH_CS_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUSH_DS_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUSH_ES_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUSH_FS_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUSH_GS_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUSH_SS_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+static uint32_t ropPUSH_imm_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint16_t imm = fetchdat & 0xffff;
+ int host_reg;
-uint32_t ropPUSH_CS_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUSH_DS_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUSH_ES_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUSH_FS_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUSH_GS_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUSH_SS_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_STACK_TO_EA(-2);
+ host_reg = LOAD_REG_IMM(imm);
+ MEM_STORE_ADDR_EA_W(&_ss, host_reg);
+ SP_MODIFY(-2);
+
+ return op_pc+2;
+}
+static uint32_t ropPUSH_imm_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint32_t imm = fastreadl(cs + op_pc);
+ int host_reg;
-uint32_t ropPOP_DS_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPOP_ES_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPOP_FS_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPOP_GS_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_STACK_TO_EA(-4);
+ host_reg = LOAD_REG_IMM(imm);
+ MEM_STORE_ADDR_EA_L(&_ss, host_reg);
+ SP_MODIFY(-4);
+
+ return op_pc+4;
+}
-uint32_t ropPOP_DS_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPOP_ES_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPOP_FS_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPOP_GS_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+static uint32_t ropPUSH_imm_b16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint16_t imm = fetchdat & 0xff;
+ int host_reg;
-uint32_t ropLEAVE_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropLEAVE_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ if (imm & 0x80)
+ imm |= 0xff00;
-uint32_t ropPUSHA_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUSHA_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_STACK_TO_EA(-2);
+ host_reg = LOAD_REG_IMM(imm);
+ MEM_STORE_ADDR_EA_W(&_ss, host_reg);
+ SP_MODIFY(-2);
+
+ return op_pc+1;
+}
+static uint32_t ropPUSH_imm_b32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint32_t imm = fetchdat & 0xff;
+ int host_reg;
-uint32_t ropPOPA_16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPOPA_32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ if (imm & 0x80)
+ imm |= 0xffffff00;
-uint32_t ropPUSHF(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
-uint32_t ropPUSHFD(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_STACK_TO_EA(-4);
+ host_reg = LOAD_REG_IMM(imm);
+ MEM_STORE_ADDR_EA_L(&_ss, host_reg);
+ SP_MODIFY(-4);
+
+ return op_pc+1;
+}
+
+static uint32_t ropPOP_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_STACK_TO_EA(0);
+ MEM_LOAD_ADDR_EA_W(&_ss);
+ SP_MODIFY(2);
+ STORE_REG_TARGET_W_RELEASE(0, opcode & 7);
+
+ return op_pc;
+}
+static uint32_t ropPOP_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_STACK_TO_EA(0);
+ MEM_LOAD_ADDR_EA_L(&_ss);
+ SP_MODIFY(4);
+ STORE_REG_TARGET_L_RELEASE(0, opcode & 7);
+
+ return op_pc;
+}
+
+static uint32_t ropRET_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_STACK_TO_EA(0);
+ MEM_LOAD_ADDR_EA_W(&_ss);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.pc, 0);
+ SP_MODIFY(2);
+
+ return -1;
+}
+static uint32_t ropRET_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_STACK_TO_EA(0);
+ MEM_LOAD_ADDR_EA_L(&_ss);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.pc, 0);
+ SP_MODIFY(4);
+
+ return -1;
+}
+
+static uint32_t ropRET_imm_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint16_t offset = fetchdat & 0xffff;
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_STACK_TO_EA(0);
+ MEM_LOAD_ADDR_EA_W(&_ss);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.pc, 0);
+ SP_MODIFY(2+offset);
+
+ return -1;
+}
+static uint32_t ropRET_imm_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint16_t offset = fetchdat & 0xffff;
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_STACK_TO_EA(0);
+ MEM_LOAD_ADDR_EA_L(&_ss);
+ STORE_HOST_REG_ADDR((uintptr_t)&cpu_state.pc, 0);
+ SP_MODIFY(4+offset);
+
+ return -1;
+}
+
+static uint32_t ropCALL_r16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint16_t offset = fetchdat & 0xffff;
+ int host_reg;
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_STACK_TO_EA(-2);
+ host_reg = LOAD_REG_IMM(op_pc+2);
+ MEM_STORE_ADDR_EA_W(&_ss, host_reg);
+ SP_MODIFY(-2);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.pc, (op_pc+2+offset) & 0xffff);
+
+ return -1;
+}
+static uint32_t ropCALL_r32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ uint32_t offset = fastreadl(cs + op_pc);
+ int host_reg;
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_STACK_TO_EA(-4);
+ host_reg = LOAD_REG_IMM(op_pc+4);
+ MEM_STORE_ADDR_EA_L(&_ss, host_reg);
+ SP_MODIFY(-4);
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.pc, op_pc+4+offset);
+
+ return -1;
+}
+
+static uint32_t ropLEAVE_16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg;
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_EBP_TO_EA(0);
+ MEM_LOAD_ADDR_EA_W(&_ss);
+ host_reg = LOAD_REG_W(REG_BP); /*SP = BP + 2*/
+ ADD_HOST_REG_IMM_W(host_reg, 2);
+ STORE_REG_TARGET_W_RELEASE(host_reg, REG_SP);
+ STORE_REG_TARGET_W_RELEASE(0, REG_BP); /*BP = POP_W()*/
+
+ return op_pc;
+}
+static uint32_t ropLEAVE_32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int host_reg;
+
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc);
+ LOAD_EBP_TO_EA(0);
+ MEM_LOAD_ADDR_EA_L(&_ss);
+ host_reg = LOAD_REG_L(REG_EBP); /*ESP = EBP + 4*/
+ ADD_HOST_REG_IMM(host_reg, 4);
+ STORE_REG_TARGET_L_RELEASE(host_reg, REG_ESP);
+ STORE_REG_TARGET_L_RELEASE(0, REG_EBP); /*EBP = POP_L()*/
+
+ return op_pc;
+}
+
+#define ROP_PUSH_SEG(seg) \
+static uint32_t ropPUSH_ ## seg ## _16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+{ \
+ int host_reg; \
+ \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ LOAD_STACK_TO_EA(-2); \
+ host_reg = LOAD_VAR_W((uintptr_t)&seg); \
+ MEM_STORE_ADDR_EA_W(&_ss, host_reg); \
+ SP_MODIFY(-2); \
+ \
+ return op_pc; \
+} \
+static uint32_t ropPUSH_ ## seg ## _32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+{ \
+ int host_reg; \
+ \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ LOAD_STACK_TO_EA(-4); \
+ host_reg = LOAD_VAR_W((uintptr_t)&seg); \
+ MEM_STORE_ADDR_EA_L(&_ss, host_reg); \
+ SP_MODIFY(-4); \
+ \
+ return op_pc; \
+}
+
+ROP_PUSH_SEG(CS)
+ROP_PUSH_SEG(DS)
+ROP_PUSH_SEG(ES)
+ROP_PUSH_SEG(FS)
+ROP_PUSH_SEG(GS)
+ROP_PUSH_SEG(SS)
+
+#define ROP_POP_SEG(seg, rseg) \
+static uint32_t ropPOP_ ## seg ## _16(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+{ \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ LOAD_STACK_TO_EA(0); \
+ MEM_LOAD_ADDR_EA_W(&_ss); \
+ LOAD_SEG(0, &rseg); \
+ SP_MODIFY(2); \
+ \
+ return op_pc; \
+} \
+static uint32_t ropPOP_ ## seg ## _32(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+{ \
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.oldpc, op_old_pc); \
+ LOAD_STACK_TO_EA(0); \
+ MEM_LOAD_ADDR_EA_W(&_ss); \
+ LOAD_SEG(0, &rseg); \
+ SP_MODIFY(4); \
+ \
+ return op_pc; \
+}
+
+ROP_POP_SEG(DS, _ds)
+ROP_POP_SEG(ES, _es)
+ROP_POP_SEG(FS, _fs)
+ROP_POP_SEG(GS, _gs)
diff --git a/src/codegen_ops_x86-64.h b/src/codegen_ops_x86-64.h
new file mode 100644
index 0000000..76f142c
--- /dev/null
+++ b/src/codegen_ops_x86-64.h
@@ -0,0 +1,6138 @@
+/*Register allocation :
+ R8-R15 - emulated registers
+*/
+#include
+
+#define HOST_REG_XMM_START 0
+#define HOST_REG_XMM_END 7
+
+#define IS_32_ADDR(x) !(((uintptr_t)x) & 0xffffffff00000000)
+
+static inline int find_host_xmm_reg()
+{
+ int c;
+ for (c = HOST_REG_XMM_START; c < HOST_REG_XMM_END; c++)
+ {
+ if (host_reg_xmm_mapping[c] == -1)
+ break;
+ }
+
+ if (c == HOST_REG_XMM_END)
+ fatal("Out of host XMM regs!\n");
+ return c;
+}
+static inline void call(codeblock_t *block, uintptr_t func)
+{
+ uintptr_t diff = func - (uintptr_t)&block->data[block_pos + 5];
+
+ codegen_reg_loaded[0] = codegen_reg_loaded[1] = codegen_reg_loaded[2] = codegen_reg_loaded[3] = 0;
+ codegen_reg_loaded[4] = codegen_reg_loaded[5] = codegen_reg_loaded[6] = codegen_reg_loaded[7] = 0;
+
+ if (diff >= -0x80000000 && diff < 0x7fffffff)
+ {
+ addbyte(0xE8); /*CALL*/
+ addlong((uint32_t)diff);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RAX, func*/
+ addbyte(0xb8);
+ addquad(func);
+ addbyte(0xff); /*CALL RAX*/
+ addbyte(0xd0);
+ }
+}
+
+static inline void call_long(uintptr_t func)
+{
+ codegen_reg_loaded[0] = codegen_reg_loaded[1] = codegen_reg_loaded[2] = codegen_reg_loaded[3] = 0;
+ codegen_reg_loaded[4] = codegen_reg_loaded[5] = codegen_reg_loaded[6] = codegen_reg_loaded[7] = 0;
+
+ addbyte(0x48); /*MOV RAX, func*/
+ addbyte(0xb8);
+ addquad(func);
+ addbyte(0xff); /*CALL RAX*/
+ addbyte(0xd0);
+}
+
+static inline void load_param_1_32(codeblock_t *block, uint32_t param)
+{
+#if WIN64
+ addbyte(0xb9); /*MOVL $fetchdat,%ecx*/
+#else
+ addbyte(0xbf); /*MOVL $fetchdat,%edi*/
+#endif
+ addlong(param);
+}
+static inline void load_param_1_reg_32(int reg)
+{
+#if WIN64
+ if (reg & 8)
+ addbyte(0x44);
+ addbyte(0x89); /*MOV ECX, EAX*/
+ addbyte(0xc0 | REG_ECX | (reg << 3));
+#else
+ if (reg & 8)
+ addbyte(0x44);
+ addbyte(0x89); /*MOV EDI, EAX*/
+ addbyte(0xc0 | REG_EDI | (reg << 3));
+#endif
+}
+#if 0
+static inline void load_param_1_64(codeblock_t *block, uint64_t param)
+{
+ addbyte(0x48);
+#if WIN64
+ addbyte(0xb9); /*MOVL $fetchdat,%ecx*/
+#else
+ addbyte(0xbf); /*MOVL $fetchdat,%edi*/
+#endif
+ addquad(param);
+}
+#endif
+
+static inline void load_param_2_32(codeblock_t *block, uint32_t param)
+{
+#if WIN64
+ addbyte(0xba); /*MOVL $fetchdat,%edx*/
+#else
+ addbyte(0xbe); /*MOVL $fetchdat,%esi*/
+#endif
+ addlong(param);
+}
+static inline void load_param_2_reg_32(int reg)
+{
+#if WIN64
+ if (reg & 8)
+ addbyte(0x44);
+ addbyte(0x89); /*MOV EDX, EAX*/
+ addbyte(0xc0 | REG_EDX | (reg << 3));
+#else
+ if (reg & 8)
+ addbyte(0x44);
+ addbyte(0x89); /*MOV ESI, EAX*/
+ addbyte(0xc0 | REG_ESI | (reg << 3));
+#endif
+}
+static inline void load_param_2_64(codeblock_t *block, uint64_t param)
+{
+ addbyte(0x48);
+#if WIN64
+ addbyte(0xba); /*MOVL $fetchdat,%edx*/
+#else
+ addbyte(0xbe); /*MOVL $fetchdat,%esi*/
+#endif
+ addquad(param);
+}
+
+static inline void load_param_3_reg_32(int reg)
+{
+ if (reg & 8)
+ {
+#if WIN64
+ addbyte(0x45); /*MOVL R8,reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | ((reg & 7) << 3));
+#else
+ addbyte(0x44); /*MOV EDX, reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | REG_EDX | (reg << 3));
+#endif
+ }
+ else
+ {
+#if WIN64
+ addbyte(0x41); /*MOVL R8,reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | ((reg & 7) << 3));
+#else
+ addbyte(0x90);
+ addbyte(0x89); /*MOV EDX, reg*/
+ addbyte(0xc0 | REG_EDX | (reg << 3));
+#endif
+ }
+}
+static inline void load_param_3_reg_64(int reg)
+{
+ if (reg & 8)
+ {
+#if WIN64
+ addbyte(0x4d); /*MOVL R8,reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | ((reg & 7) << 3));
+#else
+ addbyte(0x4c); /*MOVL EDX,reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | REG_EDX | ((reg & 7) << 3));
+#endif
+ }
+ else
+ {
+#if WIN64
+ addbyte(0x49); /*MOVL R8,reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | ((reg & 7) << 3));
+#else
+ addbyte(0x48); /*MOVL EDX,reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | REG_EDX | ((reg & 7) << 3));
+#endif
+ }
+}
+
+static inline void CALL_FUNC(uintptr_t func)
+{
+ codegen_reg_loaded[0] = codegen_reg_loaded[1] = codegen_reg_loaded[2] = codegen_reg_loaded[3] = 0;
+ codegen_reg_loaded[4] = codegen_reg_loaded[5] = codegen_reg_loaded[6] = codegen_reg_loaded[7] = 0;
+
+ addbyte(0x48); /*MOV RAX, func*/
+ addbyte(0xb8);
+ addquad(func);
+ addbyte(0xff); /*CALL RAX*/
+ addbyte(0xd0);
+}
+
+static inline void RELEASE_REG(int host_reg)
+{
+}
+
+static inline int LOAD_REG_B(int reg)
+{
+ int host_reg = reg & 3;
+// host_reg_mapping[host_reg] = reg;
+
+ if (!codegen_reg_loaded[reg & 3])
+ {
+ addbyte(0x44); /*MOVZX W[reg],host_reg*/
+ addbyte(0x8b);
+ addbyte(0x45 | (host_reg << 3));
+ addbyte(cpu_state_offset(regs[host_reg & 3].b));
+ }
+
+ codegen_reg_loaded[reg & 3] = 1;
+
+ if (reg & 4)
+ return host_reg | 0x18;
+
+ return host_reg | 8;
+}
+static inline int LOAD_REG_W(int reg)
+{
+ int host_reg = reg;
+// host_reg_mapping[host_reg] = reg;
+
+ if (!codegen_reg_loaded[reg & 7])
+ {
+ addbyte(0x44); /*MOVZX W[reg],host_reg*/
+ addbyte(0x8b);
+ addbyte(0x45 | (host_reg << 3));
+ addbyte(cpu_state_offset(regs[reg & 7].w));
+ }
+
+ codegen_reg_loaded[reg & 7] = 1;
+
+ return host_reg | 8;
+}
+static inline int LOAD_REG_L(int reg)
+{
+ int host_reg = reg;
+// host_reg_mapping[host_reg] = reg;
+
+ if (!codegen_reg_loaded[reg & 7])
+ {
+ addbyte(0x44); /*MOVZX W[reg],host_reg*/
+ addbyte(0x8b);
+ addbyte(0x45 | (host_reg << 3));
+ addbyte(cpu_state_offset(regs[reg & 7].l));
+ }
+
+ codegen_reg_loaded[reg & 7] = 1;
+
+ return host_reg | 8;
+}
+
+static inline int LOAD_REG_IMM(uint32_t imm)
+{
+ int host_reg = REG_EBX;
+
+ addbyte(0xb8 | REG_EBX); /*MOVL EBX, imm*/
+ addlong(imm);
+
+ return host_reg;
+}
+
+static inline void STORE_REG_TARGET_B_RELEASE(int host_reg, int guest_reg)
+{
+ int dest_reg = LOAD_REG_L(guest_reg & 3) & 7;
+
+ if (guest_reg & 4)
+ {
+ if (host_reg & 8)
+ {
+ addbyte(0x66); /*MOV AX, host_reg*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0xc0 | ((host_reg & 3) << 3));
+ if (host_reg & 0x10)
+ {
+ addbyte(0x66); /*AND AX, 0xff00*/
+ addbyte(0x25);
+ addword(0xff00);
+ }
+ else
+ {
+ addbyte(0x66); /*SHL AX, 8*/
+ addbyte(0xc1);
+ addbyte(0xe0);
+ addbyte(0x08);
+ }
+ }
+ else
+ {
+ if (host_reg)
+ {
+ addbyte(0x66); /*MOV AX, host_reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | ((host_reg & 3) << 3));
+ }
+ addbyte(0x66); /*SHL AX, 8*/
+ addbyte(0xc1);
+ addbyte(0xe0);
+ addbyte(0x08);
+ }
+ addbyte(0x66); /*AND dest_reg, 0x00ff*/
+ addbyte(0x41);
+ addbyte(0x81);
+ addbyte(0xe0 | dest_reg);
+ addword(0x00ff);
+ addbyte(0x66); /*OR dest_reg, AX*/
+ addbyte(0x41);
+ addbyte(0x09);
+ addbyte(0xc0 | dest_reg);
+ addbyte(0x66); /*MOVW regs[guest_reg].w, dest_reg*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0x45 | (dest_reg << 3));
+ addbyte(cpu_state_offset(regs[guest_reg & 3].w));
+ }
+ else
+ {
+ if (host_reg & 8)
+ {
+ if (host_reg & 0x10)
+ {
+ addbyte(0x66); /*MOV AX, host_reg*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0xc0 | ((host_reg & 3) << 3));
+ addbyte(0x88); /*MOV AL, AH*/
+ addbyte(0xe0);
+ addbyte(0x41); /*MOV dest_reg, AL*/
+ addbyte(0x88);
+ addbyte(0xc0 | (dest_reg & 7));
+ addbyte(0x88); /*MOVB regs[reg].b, AH*/
+ addbyte(0x65);
+ addbyte(cpu_state_offset(regs[guest_reg & 3].b));
+ }
+ else
+ {
+ addbyte(0x45); /*MOVB dest_reg, host_reg*/
+ addbyte(0x88);
+ addbyte(0xc0 | (dest_reg & 7) | ((host_reg & 7) << 3));
+ addbyte(0x44); /*MOVB regs[guest_reg].b, host_reg*/
+ addbyte(0x88);
+ addbyte(0x45 | ((host_reg & 3) << 3));
+ addbyte(cpu_state_offset(regs[guest_reg & 3].b));
+ }
+ }
+ else
+ {
+ if (host_reg & 0x10)
+ {
+ addbyte(0xc1); /*SHR host_reg, 8*/
+ addbyte(0xe8 | (host_reg & 7));
+ addbyte(8);
+ }
+ addbyte(0x41); /*MOVB dest_reg, host_reg*/
+ addbyte(0x88);
+ addbyte(0xc0 | (dest_reg & 7) | ((host_reg & 7) << 3));
+ addbyte(0x88); /*MOVB regs[guest_reg].b, host_reg*/
+ addbyte(0x45 | ((host_reg & 3) << 3));
+ addbyte(cpu_state_offset(regs[guest_reg & 3].b));
+ }
+ }
+}
+static inline void STORE_REG_TARGET_W_RELEASE(int host_reg, int guest_reg)
+{
+ int dest_reg = LOAD_REG_L(guest_reg & 7) & 7;
+
+ if (host_reg & 8)
+ {
+ addbyte(0x66); /*MOVW guest_reg, host_reg*/
+ addbyte(0x45);
+ addbyte(0x89);
+ addbyte(0xc0 | dest_reg | ((host_reg & 7) << 3));
+ addbyte(0x66); /*MOVW regs[guest_reg].w, host_reg*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0x45 | ((host_reg & 7) << 3));
+ addbyte(cpu_state_offset(regs[guest_reg & 7].w));
+ }
+ else
+ {
+ addbyte(0x66); /*MOVW guest_reg, host_reg*/
+ addbyte(0x41);
+ addbyte(0x89);
+ addbyte(0xc0 | dest_reg | (host_reg << 3));
+ addbyte(0x66); /*MOVW regs[guest_reg].w, host_reg*/
+ addbyte(0x89);
+ addbyte(0x45 | (host_reg << 3));
+ addbyte(cpu_state_offset(regs[guest_reg & 7].w));
+ }
+}
+static inline void STORE_REG_TARGET_L_RELEASE(int host_reg, int guest_reg)
+{
+ if (host_reg & 8)
+ {
+ addbyte(0x45); /*MOVL guest_reg, host_reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | guest_reg | (host_reg << 3));
+ addbyte(0x44); /*MOVL regs[guest_reg].l, host_reg*/
+ addbyte(0x89);
+ addbyte(0x45 | (host_reg << 3));
+ addbyte(cpu_state_offset(regs[guest_reg & 7].l));
+ }
+ else
+ {
+ addbyte(0x41); /*MOVL guest_reg, host_reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | guest_reg | (host_reg << 3));
+ addbyte(0x89); /*MOVL regs[guest_reg].l, host_reg*/
+ addbyte(0x45 | (host_reg << 3));
+ addbyte(cpu_state_offset(regs[guest_reg & 7].l));
+ }
+}
+
+static inline void STORE_REG_B_RELEASE(int host_reg)
+{
+ if (host_reg & 0x10)
+ {
+ addbyte(0x66); /*MOVW [reg],host_reg*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0x45 | ((host_reg & 7) << 3));
+ addbyte(cpu_state_offset(regs[host_reg & 7].w));
+ }
+ else
+ {
+ addbyte(0x44); /*MOVB [reg],host_reg*/
+ addbyte(0x88);
+ addbyte(0x45 | ((host_reg & 7) << 3));
+ addbyte(cpu_state_offset(regs[host_reg & 7].b));
+ }
+}
+static inline void STORE_REG_W_RELEASE(int host_reg)
+{
+ addbyte(0x66); /*MOVW [reg],host_reg*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0x45 | ((host_reg & 7) << 3));
+ addbyte(cpu_state_offset(regs[host_reg & 7].w));
+}
+static inline void STORE_REG_L_RELEASE(int host_reg)
+{
+ addbyte(0x44); /*MOVL [reg],host_reg*/
+ addbyte(0x89);
+ addbyte(0x45 | ((host_reg & 7) << 3));
+ addbyte(cpu_state_offset(regs[host_reg & 7].l));
+}
+
+static inline void STORE_IMM_REG_B(int reg, uint8_t val)
+{
+ if (reg & 4)
+ {
+ int host_reg = LOAD_REG_W(reg & 3) & 7;
+ addbyte(0x66); /*AND host_reg, 0x00ff*/
+ addbyte(0x41);
+ addbyte(0x81);
+ addbyte(0xe0 | host_reg);
+ addword(0x00ff);
+ addbyte(0x66); /*OR host_reg, val << 8*/
+ addbyte(0x41);
+ addbyte(0x81);
+ addbyte(0xc8 | host_reg);
+ addword(val << 8);
+ addbyte(0x66); /*MOVW host_reg, regs[host_reg].w*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0x45 | (host_reg << 3));
+ addbyte(cpu_state_offset(regs[reg & 3].w));
+ }
+ else
+ {
+ addbyte(0x41); /*MOVB reg, imm*/
+ addbyte(0xb0 | reg);
+ addbyte(val);
+ addbyte(0x44); /*MOVB reg, regs[reg].b*/
+ addbyte(0x88);
+ addbyte(0x45 | (reg << 3));
+ addbyte(cpu_state_offset(regs[reg & 7].b));
+ }
+}
+static inline void STORE_IMM_REG_W(int reg, uint16_t val)
+{
+ addbyte(0x66); /*MOVW reg, imm*/
+ addbyte(0x41);
+ addbyte(0xb8 | reg);
+ addword(val);
+ addbyte(0x66); /*MOVW reg, regs[reg].w*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0x45 | (reg << 3));
+ addbyte(cpu_state_offset(regs[reg & 7].w));
+}
+static inline void STORE_IMM_REG_L(int reg, uint32_t val)
+{
+ addbyte(0x41); /*MOVL reg, imm*/
+ addbyte(0xb8 | reg);
+ addlong(val);
+ addbyte(0x44); /*MOVL reg, regs[reg].l*/
+ addbyte(0x89);
+ addbyte(0x45 | (reg << 3));
+ addbyte(cpu_state_offset(regs[reg & 7].l));
+}
+
+static inline void STORE_IMM_ADDR_L(uintptr_t addr, uint32_t val)
+{
+ if (addr >= (uintptr_t)&cpu_state && addr < ((uintptr_t)&cpu_state)+0x100)
+ {
+ addbyte(0xC7); /*MOVL [addr],val*/
+ addbyte(0x45);
+ addbyte(addr - (uintptr_t)&cpu_state - 128);
+ addlong(val);
+ }
+ else if (addr < 0x100000000)
+ {
+ addbyte(0xC7); /*MOVL [addr],val*/
+ addbyte(0x04);
+ addbyte(0x25);
+ addlong(addr);
+ addlong(val);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV ESI, &addr*/
+ addbyte(0xb8 | REG_ESI);
+ addquad(addr);
+ addbyte(0xc7); /*MOVL [ESI], val*/
+ addbyte(0x00 | REG_ESI);
+ addlong(val);
+ }
+}
+
+
+
+
+static x86seg *FETCH_EA_16(x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc)
+{
+ int mod = (fetchdat >> 6) & 3;
+// int reg = (fetchdat >> 3) & 7;
+ int rm = fetchdat & 7;
+
+ if (!mod && rm == 6)
+ {
+ addbyte(0xb8); /*MOVL EAX, imm*/
+ addlong((fetchdat >> 8) & 0xffff);
+ (*op_pc) += 2;
+ }
+ else
+ {
+ int base_reg, index_reg;
+
+ switch (rm)
+ {
+ case 0: case 1: case 7:
+ base_reg = LOAD_REG_W(REG_BX);
+ break;
+ case 2: case 3: case 6:
+ base_reg = LOAD_REG_W(REG_BP);
+ break;
+ case 4:
+ base_reg = LOAD_REG_W(REG_SI);
+ break;
+ case 5:
+ base_reg = LOAD_REG_W(REG_DI);
+ break;
+ }
+ if (!(rm & 4))
+ {
+ if (rm & 1)
+ index_reg = LOAD_REG_W(REG_DI);
+ else
+ index_reg = LOAD_REG_W(REG_SI);
+ }
+ base_reg &= 7;
+ index_reg &= 7;
+
+ switch (mod)
+ {
+ case 0:
+ if (rm & 4)
+ {
+ addbyte(0x41); /*MOVZX EAX, base_reg*/
+ addbyte(0x0f);
+ addbyte(0xb7);
+ addbyte(0xc0 | base_reg);
+ }
+ else
+ {
+ addbyte(0x67); /*LEA EAX, base_reg+index_reg*/
+ addbyte(0x43);
+ addbyte(0x8d);
+ if (base_reg == 5)
+ {
+ addbyte(0x44);
+ addbyte(base_reg | (index_reg << 3));
+ addbyte(0);
+ }
+ else
+ {
+ addbyte(0x04);
+ addbyte(base_reg | (index_reg << 3));
+ }
+ }
+ break;
+ case 1:
+ if (rm & 4)
+ {
+ addbyte(0x67); /*LEA EAX, base_reg+imm8*/
+ addbyte(0x41);
+ addbyte(0x8d);
+ addbyte(0x40 | base_reg);
+ addbyte((fetchdat >> 8) & 0xff);
+ }
+ else
+ {
+ addbyte(0x67); /*LEA EAX, base_reg+index_reg+imm8*/
+ addbyte(0x43);
+ addbyte(0x8d);
+ addbyte(0x44);
+ addbyte(base_reg | (index_reg << 3));
+ addbyte((fetchdat >> 8) & 0xff);
+ }
+ (*op_pc)++;
+ break;
+ case 2:
+ if (rm & 4)
+ {
+ addbyte(0x67); /*LEA EAX, base_reg+imm8*/
+ addbyte(0x41);
+ addbyte(0x8d);
+ addbyte(0x80 | base_reg);
+ addlong((fetchdat >> 8) & 0xffff);
+ }
+ else
+ {
+ addbyte(0x67); /*LEA EAX, base_reg+index_reg+imm16*/
+ addbyte(0x43);
+ addbyte(0x8d);
+ addbyte(0x84);
+ addbyte(base_reg | (index_reg << 3));
+ addlong((fetchdat >> 8) & 0xffff);
+ }
+ (*op_pc) += 2;
+ break;
+
+ }
+ if (mod || !(rm & 4))
+ {
+ addbyte(0x25); /*ANDL $0xffff, %eax*/
+ addlong(0xffff);
+ }
+
+ if (mod1seg[rm] == &ss && !op_ssegs)
+ op_ea_seg = &_ss;
+ }
+ return op_ea_seg;
+}
+static x86seg *FETCH_EA_32(x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc, int stack_offset)
+{
+ int mod = (fetchdat >> 6) & 3;
+// int reg = (fetchdat >> 3) & 7;
+ int rm = fetchdat & 7;
+ uint32_t new_eaaddr;
+
+ if (rm == 4)
+ {
+ uint8_t sib = fetchdat >> 8;
+ int base_reg = -1, index_reg = -1;
+
+ (*op_pc)++;
+
+ if (mod || (sib & 7) != 5)
+ base_reg = LOAD_REG_L(sib & 7) & 7;
+
+ if (((sib >> 3) & 7) != 4)
+ index_reg = LOAD_REG_L((sib >> 3) & 7) & 7;
+
+ if (index_reg == -1)
+ {
+ switch (mod)
+ {
+ case 0:
+ if ((sib & 7) == 5)
+ {
+ new_eaaddr = fastreadl(cs + (*op_pc) + 1);
+ addbyte(0xb8); /*MOV EAX, imm32*/
+ addlong(new_eaaddr);
+ (*op_pc) += 4;
+ }
+ else
+ {
+ addbyte(0x44); /*MOV EAX, base_reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | (base_reg << 3));
+ }
+ break;
+ case 1:
+ addbyte(0x67); /*LEA EAX, imm8+base_reg*/
+ addbyte(0x41);
+ addbyte(0x8d);
+ if (base_reg == 4)
+ {
+ addbyte(0x44);
+ addbyte(0x24);
+ }
+ else
+ {
+ addbyte(0x40 | base_reg);
+ }
+ addbyte((fetchdat >> 16) & 0xff);
+ (*op_pc)++;
+ break;
+ case 2:
+ new_eaaddr = fastreadl(cs + (*op_pc) + 1);
+ addbyte(0x67); /*LEA EAX, imm32+base_reg*/
+ addbyte(0x41);
+ addbyte(0x8d);
+ if (base_reg == 4)
+ {
+ addbyte(0x84);
+ addbyte(0x24);
+ }
+ else
+ {
+ addbyte(0x80 | base_reg);
+ }
+ addlong(new_eaaddr);
+ (*op_pc) += 4;
+ break;
+ }
+ }
+ else
+ {
+ switch (mod)
+ {
+ case 0:
+ if ((sib & 7) == 5)
+ {
+ new_eaaddr = fastreadl(cs + (*op_pc) + 1);
+ if (sib >> 6)
+ {
+ addbyte(0x67); /*LEA EAX, imm32+index_reg*scale*/
+ addbyte(0x42);
+ addbyte(0x8d);
+ addbyte(0x04);
+ addbyte(0x05 | (sib & 0xc0) | (index_reg << 3));
+ addlong(new_eaaddr);
+ }
+ else
+ {
+ addbyte(0x67); /*LEA EAX, imm32+index_reg*/
+ addbyte(0x41);
+ addbyte(0x8d);
+ addbyte(0x80 | index_reg);
+ addlong(new_eaaddr);
+ }
+ (*op_pc) += 4;
+ }
+ else
+ {
+ addbyte(0x67); /*LEA EAX, base_reg+index_reg*scale*/
+ addbyte(0x43);
+ addbyte(0x8d);
+ if (base_reg == 5)
+ {
+ addbyte(0x44);
+ addbyte(base_reg | (index_reg << 3) | (sib & 0xc0));
+ addbyte(0);
+ }
+ else
+ {
+ addbyte(0x04);
+ addbyte(base_reg | (index_reg << 3) | (sib & 0xc0));
+ }
+ }
+ break;
+ case 1:
+ addbyte(0x67); /*LEA EAX, imm8+base_reg+index_reg*scale*/
+ addbyte(0x43);
+ addbyte(0x8d);
+ addbyte(0x44);
+ addbyte(base_reg | (index_reg << 3) | (sib & 0xc0));
+ addbyte((fetchdat >> 16) & 0xff);
+ (*op_pc)++;
+ break;
+ case 2:
+ new_eaaddr = fastreadl(cs + (*op_pc) + 1);
+ addbyte(0x67); /*LEA EAX, imm32+base_reg+index_reg*scale*/
+ addbyte(0x43);
+ addbyte(0x8d);
+ addbyte(0x84);
+ addbyte(base_reg | (index_reg << 3) | (sib & 0xc0));
+ addlong(new_eaaddr);
+ (*op_pc) += 4;
+ break;
+ }
+ }
+ if (stack_offset && (sib & 7) == 4 && (mod || (sib & 7) != 5)) /*ESP*/
+ {
+ addbyte(0x05);
+ addlong(stack_offset);
+ }
+ if (((sib & 7) == 4 || (mod && (sib & 7) == 5)) && !op_ssegs)
+ op_ea_seg = &_ss;
+ }
+ else
+ {
+ int base_reg;
+
+ if (!mod && rm == 5)
+ {
+ new_eaaddr = fastreadl(cs + (*op_pc) + 1);
+ addbyte(0xb8); /*MOVL EAX, new_eaaddr*/
+ addlong(new_eaaddr);
+ (*op_pc) += 4;
+ return op_ea_seg;
+ }
+ base_reg = LOAD_REG_L(rm) & 7;
+ if (mod)
+ {
+ if (rm == 5 && !op_ssegs)
+ op_ea_seg = &_ss;
+ if (mod == 1)
+ {
+ addbyte(0x67); /*LEA EAX, base_reg+imm8*/
+ addbyte(0x41);
+ addbyte(0x8d);
+ addbyte(0x40 | base_reg);
+ addbyte((fetchdat >> 8) & 0xff);
+ (*op_pc)++;
+ }
+ else
+ {
+ new_eaaddr = fastreadl(cs + (*op_pc) + 1);
+ addbyte(0x67); /*LEA EAX, base_reg+imm32*/
+ addbyte(0x41);
+ addbyte(0x8d);
+ addbyte(0x80 | base_reg);
+ addlong(new_eaaddr);
+ (*op_pc) += 4;
+ }
+ }
+ else
+ {
+ addbyte(0x44); /*MOV EAX, base_reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | (base_reg << 3));
+ }
+ }
+ return op_ea_seg;
+}
+
+static inline x86seg *FETCH_EA(x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc, uint32_t op_32)
+{
+ if (op_32 & 0x200)
+ return FETCH_EA_32(op_ea_seg, fetchdat, op_ssegs, op_pc, 0);
+ return FETCH_EA_16(op_ea_seg, fetchdat, op_ssegs, op_pc);
+}
+
+
+
+static inline void CHECK_SEG_READ(x86seg *seg)
+{
+ /*Segments always valid in real/V86 mode*/
+ if (!(cr0 & 1) || (eflags & VM_FLAG))
+ return;
+ /*CS and SS must always be valid*/
+ if (seg == &_cs || seg == &_ss)
+ return;
+ if (seg->checked)
+ return;
+
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0x83); /*CMP seg->base, -1*/
+ addbyte(0x3c);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&seg->base);
+ addbyte(-1);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &addr*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)&seg->base);
+ addbyte(0x83); /*CMP RSI, -1*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(0xff);
+ }
+ addbyte(0x0f); /*JE end*/
+ addbyte(0x84);
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+
+ seg->checked = 1;
+}
+static inline void CHECK_SEG_WRITE(x86seg *seg)
+{
+ /*Segments always valid in real/V86 mode*/
+ if (!(cr0 & 1) || (eflags & VM_FLAG))
+ return;
+ /*CS and SS must always be valid*/
+ if (seg == &_cs || seg == &_ss)
+ return;
+ if (seg->checked)
+ return;
+
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0x83); /*CMP seg->base, -1*/
+ addbyte(0x3c);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&seg->base);
+ addbyte(-1);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &addr*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)&seg->base);
+ addbyte(0x83); /*CMP RSI, -1*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(0xff);
+ }
+ addbyte(0x0f); /*JE end*/
+ addbyte(0x84);
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+
+ seg->checked = 1;
+}
+static inline void CHECK_SEG_LIMITS(x86seg *seg, int end_offset)
+{
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0xb8 | REG_ESI); /*MOV ESI, &addr*/
+ addlong((uint32_t)(uintptr_t)seg);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &addr*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)seg);
+ }
+ addbyte(0x3b); /*CMP EAX, seg->limit_low*/
+ addbyte(0x46);
+ addbyte((uintptr_t)&seg->limit_low - (uintptr_t)seg);
+ addbyte(0x0f); /*JB BLOCK_GPF_OFFSET*/
+ addbyte(0x82);
+ addlong(BLOCK_GPF_OFFSET - (block_pos + 4));
+ if (end_offset)
+ {
+ addbyte(0x83); /*ADD EAX, end_offset*/
+ addbyte(0xc0);
+ addbyte(end_offset);
+ addbyte(0x3b); /*CMP EAX, seg->limit_high*/
+ addbyte(0x46);
+ addbyte((uintptr_t)&seg->limit_high - (uintptr_t)seg);
+ addbyte(0x0f); /*JNBE BLOCK_GPF_OFFSET*/
+ addbyte(0x87);
+ addlong(BLOCK_GPF_OFFSET - (block_pos + 4));
+ addbyte(0x83); /*SUB EAX, end_offset*/
+ addbyte(0xe8);
+ addbyte(end_offset);
+ }
+}
+
+static inline void MEM_LOAD_ADDR_EA_B(x86seg *seg)
+{
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0x8b); /*MOVL ECX, seg->base*/
+ addbyte(0x0c);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&seg->base);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &seg->base*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)&seg->base);
+ addbyte(0x8b); /*MOV ECX, [RSI]*/
+ addbyte(0x0e);
+ }
+ addbyte(0x67); /*LEA ESI, (EAX,ECX)*/
+ addbyte(0x8d);
+ addbyte(0x34);
+ addbyte(0x08);
+ addbyte(0x89); /*MOV EDI, ESI*/
+ addbyte(0xf7);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ if (IS_32_ADDR(readlookup2))
+ {
+ addbyte(0x67); /*MOV RSI, readlookup2[ESI*8]*/
+ addbyte(0x48);
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf5);
+ addlong((uint32_t)(uintptr_t)readlookup2);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RDX, readlookup2*/
+ addbyte(0xb8 | REG_EDX);
+ addquad((uint64_t)readlookup2);
+ addbyte(0x48); /*MOV RSI, [RDX+RSI*8]*/
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf2);
+ }
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2);
+ addbyte(0x8b); /*MOV AL,[RDI+RSI]*/
+ addbyte(0x04);
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(0xeb); /*JMP done*/
+ addbyte(2+2+12+4+6);
+ /*slowpath:*/
+ load_param_1_reg_32(REG_ECX);
+ load_param_2_reg_32(REG_EAX);
+ call_long((uintptr_t)readmemb386l);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE end*/
+ addbyte(0x85);
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+ /*done:*/
+}
+static inline void MEM_LOAD_ADDR_EA_W(x86seg *seg)
+{
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0x8b); /*MOVL ECX, seg->base*/
+ addbyte(0x0c);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&seg->base);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &seg->base*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)&seg->base);
+ addbyte(0x8b); /*MOV ECX, [RSI]*/
+ addbyte(0x0e);
+ }
+ addbyte(0x67); /*LEA ESI, (EAX,ECX)*/
+ addbyte(0x8d);
+ addbyte(0x34);
+ addbyte(0x08);
+ addbyte(0x67); /*LEA EDI, 1[ESI]*/
+ addbyte(0x8d);
+ addbyte(0x7e);
+ addbyte(0x01);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xfff*/
+ addbyte(0xc7);
+ addlong(0xfff);
+ if (IS_32_ADDR(readlookup2))
+ {
+ addbyte(0x67); /*MOV RSI, readlookup2[ESI*8]*/
+ addbyte(0x48);
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf5);
+ addlong((uint32_t)(uintptr_t)readlookup2);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RDX, readlookup2*/
+ addbyte(0xb8 | REG_EDX);
+ addquad((uint64_t)readlookup2);
+ addbyte(0x48); /*MOV RSI, [RDX+RSI*8]*/
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf2);
+ }
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+5+2);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(5+2);
+ addbyte(0x66); /*MOV AX,-1[RDI+RSI]*/
+ addbyte(0x8b);
+ addbyte(0x44);
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-1);
+ addbyte(0xeb); /*JMP done*/
+ addbyte(2+2+12+4+6);
+ /*slowpath:*/
+ load_param_1_reg_32(REG_ECX);
+ load_param_2_reg_32(REG_EAX);
+ call_long((uintptr_t)readmemwl);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE end*/
+ addbyte(0x85);
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+ /*done:*/
+}
+static inline void MEM_LOAD_ADDR_EA_W_OFFSET(x86seg *seg, int offset)
+{
+ addbyte(0x83); /*ADD EAX, offset*/
+ addbyte(0xc0);
+ addbyte(offset);
+ MEM_LOAD_ADDR_EA_W(seg);
+}
+static inline void MEM_LOAD_ADDR_EA_L(x86seg *seg)
+{
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0x8b); /*MOVL ECX, seg->base*/
+ addbyte(0x0c);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&seg->base);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &seg->base*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)&seg->base);
+ addbyte(0x8b); /*MOV ECX, [RSI]*/
+ addbyte(0x0e);
+ }
+ addbyte(0x67); /*LEA ESI, (EAX,ECX)*/
+ addbyte(0x8d);
+ addbyte(0x34);
+ addbyte(0x08);
+ addbyte(0x67); /*LEA EDI, 3[ESI]*/
+ addbyte(0x8d);
+ addbyte(0x7e);
+ addbyte(0x03);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xffc*/
+ addbyte(0xc7);
+ addlong(0xffc);
+ if (IS_32_ADDR(readlookup2))
+ {
+ addbyte(0x67); /*MOV RSI, readlookup2[ESI*8]*/
+ addbyte(0x48);
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf5);
+ addlong((uint32_t)(uintptr_t)readlookup2);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RDX, readlookup2*/
+ addbyte(0xb8 | REG_EDX);
+ addquad((uint64_t)readlookup2);
+ addbyte(0x48); /*MOV RSI, [RDX+RSI*8]*/
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf2);
+ }
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+4+2);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(4+2);
+ addbyte(0x8b); /*MOV EAX,-3[RDI+RSI]*/
+ addbyte(0x44);
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-3);
+ addbyte(0xeb); /*JMP done*/
+ addbyte(2+2+12+4+6);
+ /*slowpath:*/
+ load_param_1_reg_32(REG_ECX);
+ load_param_2_reg_32(REG_EAX);
+ call_long((uintptr_t)readmemll);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE end*/
+ addbyte(0x85);
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+ /*done:*/
+}
+static inline void MEM_LOAD_ADDR_EA_Q(x86seg *seg)
+{
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0x8b); /*MOVL ECX, seg->base*/
+ addbyte(0x0c);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&seg->base);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &seg->base*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)&seg->base);
+ addbyte(0x8b); /*MOV ECX, [RSI]*/
+ addbyte(0x0e);
+ }
+ addbyte(0x67); /*LEA ESI, (EAX,ECX)*/
+ addbyte(0x8d);
+ addbyte(0x34);
+ addbyte(0x08);
+ addbyte(0x67); /*LEA EDI, 7[ESI]*/
+ addbyte(0x8d);
+ addbyte(0x7e);
+ addbyte(0x07);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xff8*/
+ addbyte(0xc7);
+ addlong(0xff8);
+ if (IS_32_ADDR(readlookup2))
+ {
+ addbyte(0x67); /*MOV RSI, readlookup2[ESI*8]*/
+ addbyte(0x48);
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf5);
+ addlong((uint32_t)(uintptr_t)readlookup2);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RDX, readlookup2*/
+ addbyte(0xb8 | REG_EDX);
+ addquad((uint64_t)readlookup2);
+ addbyte(0x48); /*MOV RSI, [RDX+RSI*8]*/
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf2);
+ }
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+5+2);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(5+2);
+ addbyte(0x48); /*MOV RAX,-7[RDI+RSI]*/
+ addbyte(0x8b);
+ addbyte(0x44);
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-7);
+ addbyte(0xeb); /*JMP done*/
+ addbyte(2+2+12+4+6);
+ /*slowpath:*/
+ load_param_1_reg_32(REG_ECX);
+ load_param_2_reg_32(REG_EAX);
+ call_long((uintptr_t)readmemql);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE end*/
+ addbyte(0x85);
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+ /*done:*/
+}
+
+static inline void MEM_LOAD_ADDR_IMM_B(x86seg *seg, uint32_t addr)
+{
+ addbyte(0xb8); /*MOV EAX, addr*/
+ addlong(addr);
+ MEM_LOAD_ADDR_EA_B(seg);
+}
+static inline void MEM_LOAD_ADDR_IMM_W(x86seg *seg, uint32_t addr)
+{
+ addbyte(0xb8); /*MOV EAX, addr*/
+ addlong(addr);
+ MEM_LOAD_ADDR_EA_W(seg);
+}
+static inline void MEM_LOAD_ADDR_IMM_L(x86seg *seg, uint32_t addr)
+{
+ addbyte(0xb8); /*MOV EAX, addr*/
+ addlong(addr);
+ MEM_LOAD_ADDR_EA_L(seg);
+}
+
+static inline void MEM_STORE_ADDR_EA_B(x86seg *seg, int host_reg)
+{
+ if (host_reg & 0x10)
+ {
+ /*Handle high byte of register*/
+ if (host_reg & 8)
+ {
+ addbyte(0x45); /*MOVL R8, host_reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | ((host_reg & 7) << 3));
+ }
+ else
+ {
+ addbyte(0x41); /*MOVL R8, host_reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | ((host_reg & 7) << 3));
+ }
+ addbyte(0x66); /*SHR R8, 8*/
+ addbyte(0x41);
+ addbyte(0xc1);
+ addbyte(0xe8);
+ addbyte(8);
+ host_reg = 8;
+ }
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0x8b); /*MOVL ECX, seg->base*/
+ addbyte(0x0c);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&seg->base);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &seg->base*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)&seg->base);
+ addbyte(0x8b); /*MOV ECX, [RSI]*/
+ addbyte(0x0e);
+ }
+ addbyte(0x67); /*LEA ESI, (EAX,ECX)*/
+ addbyte(0x8d);
+ addbyte(0x34);
+ addbyte(0x08);
+ addbyte(0x89); /*MOV EDI, ESI*/
+ addbyte(0xf7);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ if (IS_32_ADDR(writelookup2))
+ {
+ addbyte(0x67); /*MOV RSI, writelookup2[ESI*8]*/
+ addbyte(0x48);
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf5);
+ addlong((uint32_t)(uintptr_t)writelookup2);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RDX, writelookup2*/
+ addbyte(0xb8 | REG_EDX);
+ addquad((uint64_t)writelookup2);
+ addbyte(0x48); /*MOV RSI, [RDX+RSI*8]*/
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf2);
+ }
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(((host_reg & 8) ? 4:3)+2);
+ if (host_reg & 8)
+ {
+ addbyte(0x44); /*MOV [RDI+RSI],host_reg*/
+ addbyte(0x88);
+ addbyte(0x04 | ((host_reg & 7) << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ }
+ else
+ {
+ addbyte(0x88); /*MOV [RDI+RSI],host_reg*/
+ addbyte(0x04 | (host_reg << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ }
+ addbyte(0xeb); /*JMP done*/
+ addbyte(2+2+3+12+4+6);
+ /*slowpath:*/
+ load_param_1_reg_32(REG_ECX);
+ load_param_2_reg_32(REG_EAX);
+ load_param_3_reg_32(host_reg);
+ call_long((uintptr_t)writememb386l);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE end*/
+ addbyte(0x85);
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+ /*done:*/
+}
+static inline void MEM_STORE_ADDR_EA_W(x86seg *seg, int host_reg)
+{
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0x8b); /*MOVL ECX, seg->base*/
+ addbyte(0x0c);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&seg->base);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &seg->base*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)&seg->base);
+ addbyte(0x8b); /*MOV ECX, [RSI]*/
+ addbyte(0x0e);
+ }
+ addbyte(0x67); /*LEA ESI, (EAX,ECX)*/
+ addbyte(0x8d);
+ addbyte(0x34);
+ addbyte(0x08);
+ addbyte(0x67); /*LEA EDI, 1[ESI]*/
+ addbyte(0x8d);
+ addbyte(0x7e);
+ addbyte(0x01);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xfff*/
+ addbyte(0xc7);
+ addlong(0xfff);
+ if (IS_32_ADDR(writelookup2))
+ {
+ addbyte(0x67); /*MOV RSI, writelookup2[ESI*8]*/
+ addbyte(0x48);
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf5);
+ addlong((uint32_t)(uintptr_t)writelookup2);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RDX, writelookup2*/
+ addbyte(0xb8 | REG_EDX);
+ addquad((uint64_t)writelookup2);
+ addbyte(0x48); /*MOV RSI, [RDX+RSI*8]*/
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf2);
+ }
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+((host_reg & 8) ? 6:5)+2);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(((host_reg & 8) ? 6:5)+2);
+ if (host_reg & 8)
+ {
+ addbyte(0x66); /*MOV -1[RDI+RSI],host_reg*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0x44 | ((host_reg & 7) << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-1);
+ }
+ else
+ {
+ addbyte(0x66); /*MOV -1[RDI+RSI],host_reg*/
+ addbyte(0x89);
+ addbyte(0x44 | (host_reg << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-1);
+ }
+ addbyte(0xeb); /*JMP done*/
+ addbyte(2+2+3+12+4+6);
+ /*slowpath:*/
+ load_param_1_reg_32(REG_ECX);
+ load_param_2_reg_32(REG_EAX);
+ load_param_3_reg_32(host_reg);
+ call_long((uintptr_t)writememwl);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE end*/
+ addbyte(0x85);
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+ /*done:*/
+}
+static inline void MEM_STORE_ADDR_EA_L(x86seg *seg, int host_reg)
+{
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0x8b); /*MOVL ECX, seg->base*/
+ addbyte(0x0c);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&seg->base);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &seg->base*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)&seg->base);
+ addbyte(0x8b); /*MOV ECX, [RSI]*/
+ addbyte(0x0e);
+ }
+ addbyte(0x67); /*LEA ESI, (EAX,ECX)*/
+ addbyte(0x8d);
+ addbyte(0x34);
+ addbyte(0x08);
+ addbyte(0x67); /*LEA EDI, 3[ESI]*/
+ addbyte(0x8d);
+ addbyte(0x7e);
+ addbyte(0x03);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xffc*/
+ addbyte(0xc7);
+ addlong(0xffc);
+ if (IS_32_ADDR(writelookup2))
+ {
+ addbyte(0x67); /*MOV RSI, writelookup2[ESI*8]*/
+ addbyte(0x48);
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf5);
+ addlong((uint32_t)(uintptr_t)writelookup2);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RDX, writelookup2*/
+ addbyte(0xb8 | REG_EDX);
+ addquad((uint64_t)writelookup2);
+ addbyte(0x48); /*MOV RSI, [RDX+RSI*8]*/
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf2);
+ }
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+((host_reg & 8) ? 5:4)+2);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(((host_reg & 8) ? 5:4)+2);
+ if (host_reg & 8)
+ {
+ addbyte(0x44); /*MOV -3[RDI+RSI],host_reg*/
+ addbyte(0x89);
+ addbyte(0x44 | ((host_reg & 7) << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-3);
+ }
+ else
+ {
+ addbyte(0x89); /*MOV -3[RDI+RSI],host_reg*/
+ addbyte(0x44 | (host_reg << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-3);
+ }
+ addbyte(0xeb); /*JMP done*/
+ addbyte(2+2+3+12+4+6);
+ /*slowpath:*/
+ load_param_1_reg_32(REG_ECX);
+ load_param_2_reg_32(REG_EAX);
+ load_param_3_reg_32(host_reg);
+ call_long((uintptr_t)writememll);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE end*/
+ addbyte(0x85);
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+ /*done:*/
+}
+static inline void MEM_STORE_ADDR_EA_Q(x86seg *seg, int host_reg, int host_reg2)
+{
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0x8b); /*MOVL ECX, seg->base*/
+ addbyte(0x0c);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&seg->base);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &seg->base*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)&seg->base);
+ addbyte(0x8b); /*MOV ECX, [RSI]*/
+ addbyte(0x0e);
+ }
+ addbyte(0x67); /*LEA ESI, (EAX,ECX)*/
+ addbyte(0x8d);
+ addbyte(0x34);
+ addbyte(0x08);
+ addbyte(0x67); /*LEA EDI, 7[ESI]*/
+ addbyte(0x8d);
+ addbyte(0x7e);
+ addbyte(0x07);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xff8*/
+ addbyte(0xc7);
+ addlong(0xff8);
+ if (IS_32_ADDR(writelookup2))
+ {
+ addbyte(0x67); /*MOV RSI, writelookup2[ESI*8]*/
+ addbyte(0x48);
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf5);
+ addlong((uint32_t)(uintptr_t)writelookup2);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RDX, writelookup2*/
+ addbyte(0xb8 | REG_EDX);
+ addquad((uint64_t)writelookup2);
+ addbyte(0x48); /*MOV RSI, [RDX+RSI*8]*/
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf2);
+ }
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+5+2);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(5+2);
+ if (host_reg & 8)
+ {
+ addbyte(0x4c); /*MOV -7[RDI+RSI],host_reg*/
+ addbyte(0x89);
+ addbyte(0x44 | ((host_reg & 7) << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-7);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV -3[RDI+RSI],host_reg*/
+ addbyte(0x89);
+ addbyte(0x44 | (host_reg << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-7);
+ }
+ addbyte(0xeb); /*JMP done*/
+ addbyte(2+2+3+12+4+6);
+ /*slowpath:*/
+ load_param_1_reg_32(REG_ECX);
+ load_param_2_reg_32(REG_EAX);
+ load_param_3_reg_64(host_reg);
+ call_long((uintptr_t)writememql);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE end*/
+ addbyte(0x85);
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+ /*done:*/
+}
+
+static inline void MEM_STORE_ADDR_IMM_B(x86seg *seg, uint32_t addr, int host_reg)
+{
+ addbyte(0xb8); /*MOV EAX, addr*/
+ addlong(addr);
+ MEM_STORE_ADDR_EA_B(seg, host_reg);
+}
+static inline void MEM_STORE_ADDR_IMM_W(x86seg *seg, uint32_t addr, int host_reg)
+{
+ addbyte(0xb8); /*MOV EAX, addr*/
+ addlong(addr);
+ MEM_STORE_ADDR_EA_W(seg, host_reg);
+}
+static inline void MEM_STORE_ADDR_IMM_L(x86seg *seg, uint32_t addr, int host_reg)
+{
+ addbyte(0xb8); /*MOV EAX, addr*/
+ addlong(addr);
+ MEM_STORE_ADDR_EA_L(seg, host_reg);
+}
+
+static inline void STORE_HOST_REG_ADDR_BL(uintptr_t addr, int host_reg)
+{
+ int temp_reg = REG_ECX;
+
+ if (host_reg_mapping[REG_ECX] != -1)
+ temp_reg = REG_EBX;
+
+ if (host_reg & 0x10)
+ {
+ if (host_reg & 8)
+ addbyte(0x41);
+ addbyte(0x0f); /*MOVZX temp_reg, host_reg*/
+ addbyte(0xb7);
+ addbyte(0xc0 | (temp_reg << 3) | (host_reg & 7));
+ addbyte(0xc1); /*SHR temp_reg, 8*/
+ addbyte(0xe8 | temp_reg);
+ addbyte(8);
+ }
+ else
+ {
+ if (host_reg & 8)
+ addbyte(0x41);
+ addbyte(0x0f); /*MOVZX temp_reg, host_reg*/
+ addbyte(0xb6);
+ addbyte(0xc0 | (temp_reg << 3) | (host_reg & 7));
+ }
+ if (addr >= (uintptr_t)&cpu_state && addr < ((uintptr_t)&cpu_state)+0x100)
+ {
+ addbyte(0x89); /*MOV addr, temp_reg*/
+ addbyte(0x45 | (temp_reg << 3));
+ addbyte((uint32_t)addr - (uint32_t)(uintptr_t)&cpu_state - 128);
+ }
+ else if (IS_32_ADDR(addr))
+ {
+ addbyte(0x89); /*MOV addr, temp_reg*/
+ addbyte(0x04 | (temp_reg << 3));
+ addbyte(0x25);
+ addlong(addr);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, addr*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)addr);
+ addbyte(0x89); /*MOV [RSI], temp_reg*/
+ addbyte(0x06 | (temp_reg << 3));
+ }
+}
+static inline void STORE_HOST_REG_ADDR_WL(uintptr_t addr, int host_reg)
+{
+ int temp_reg = REG_ECX;
+
+ if (host_reg_mapping[REG_ECX] != -1)
+ temp_reg = REG_EBX;
+
+ if (host_reg & 8)
+ addbyte(0x41);
+ addbyte(0x0f); /*MOVZX temp_reg, host_reg*/
+ addbyte(0xb7);
+ addbyte(0xc0 | (temp_reg << 3) | (host_reg & 7));
+ if (addr >= (uintptr_t)&cpu_state && addr < ((uintptr_t)&cpu_state)+0x100)
+ {
+ addbyte(0x89); /*MOV addr, temp_reg*/
+ addbyte(0x45 | (temp_reg << 3));
+ addbyte((uint32_t)addr - (uint32_t)(uintptr_t)&cpu_state - 128);
+ }
+ else if (IS_32_ADDR(addr))
+ {
+ addbyte(0x89); /*MOV addr, temp_reg*/
+ addbyte(0x04 | (temp_reg << 3));
+ addbyte(0x25);
+ addlong(addr);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, addr*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)addr);
+ addbyte(0x89); /*MOV [RSI], temp_reg*/
+ addbyte(0x06 | (temp_reg << 3));
+ }
+}
+static inline void STORE_HOST_REG_ADDR_W(uintptr_t addr, int host_reg)
+{
+ if (addr >= (uintptr_t)&cpu_state && addr < ((uintptr_t)&cpu_state)+0x100)
+ {
+ addbyte(0x66); /*MOVW [addr],host_reg*/
+ if (host_reg & 8)
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0x45 | ((host_reg & 7) << 3));
+ addbyte((uint32_t)addr - (uint32_t)(uintptr_t)&cpu_state - 128);
+ }
+ else if (IS_32_ADDR(addr))
+ {
+ addbyte(0x66);
+ if (host_reg & 8)
+ addbyte(0x44);
+ addbyte(0x89); /*MOVW addr,host_reg*/
+ addbyte(0x04 | ((host_reg & 7) << 3));
+ addbyte(0x25);
+ addlong(addr);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, addr*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)addr);
+
+ addbyte(0x66);
+ if (host_reg & 8)
+ addbyte(0x44);
+ addbyte(0x89); /*MOVW [RSI],host_reg*/
+ addbyte(0x06 | ((host_reg & 7) << 3));
+ }
+}
+static inline void STORE_HOST_REG_ADDR(uintptr_t addr, int host_reg)
+{
+ if (addr >= (uintptr_t)&cpu_state && addr < ((uintptr_t)&cpu_state)+0x100)
+ {
+ if (host_reg & 8)
+ addbyte(0x44);
+ addbyte(0x89); /*MOVL [addr],host_reg*/
+ addbyte(0x45 | ((host_reg & 7) << 3));
+ addbyte((uint32_t)addr - (uint32_t)(uintptr_t)&cpu_state - 128);
+ }
+ else if (IS_32_ADDR(addr))
+ {
+ if (host_reg & 8)
+ addbyte(0x44);
+ addbyte(0x89); /*MOVL addr,host_reg*/
+ addbyte(0x04 | ((host_reg & 7) << 3));
+ addbyte(0x25);
+ addlong(addr);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, addr*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)addr);
+
+ if (host_reg & 8)
+ addbyte(0x44);
+ addbyte(0x89); /*MOVL [RSI],host_reg*/
+ addbyte(0x06 | ((host_reg & 7) << 3));
+ }
+}
+
+static inline void AND_HOST_REG_B(int dst_reg, int src_reg)
+{
+ if (dst_reg & src_reg & 8)
+ {
+ if (dst_reg & 0x10)
+ {
+ addbyte(0x66); /*MOVW AX, src_reg*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0xc0 | ((src_reg & 7) << 3));
+ if (!(src_reg & 0x10))
+ {
+ addbyte(0x66); /*SHL AX, 8*/
+ addbyte(0xc1);
+ addbyte(0xe0);
+ addbyte(8);
+ }
+ addbyte(0x66); /*OR AX, 0x00ff*/
+ addbyte(0x0d);
+ addword(0xff);
+ addbyte(0x66); /*ANDW dst_reg, AX*/
+ addbyte(0x41);
+ addbyte(0x21);
+ addbyte(0xc0 | (dst_reg & 7));
+ }
+ else if (src_reg & 0x10)
+ {
+ addbyte(0x66); /*MOVW AX, src_reg*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0xc0 | ((src_reg & 7) << 3));
+ addbyte(0x66); /*SHR AX, 8*/
+ addbyte(0xc1);
+ addbyte(0xe8);
+ addbyte(8);
+ addbyte(0x41); /*ANDB dst_reg, AL*/
+ addbyte(0x20);
+ addbyte(0xc0 | (dst_reg & 7));
+ }
+ else
+ {
+ addbyte(0x45); /*ANDB dst_reg, src_reg*/
+ addbyte(0x20);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ }
+ else if (dst_reg & 8)
+ {
+ if (dst_reg & 0x10)
+ {
+ addbyte(0x66); /*SHL src_reg, 8*/
+ addbyte(0xc1);
+ addbyte(0xe0 | src_reg);
+ addbyte(0x08);
+ addbyte(0x66); /*OR src_reg, 0xff*/
+ addbyte(0x81);
+ addbyte(0xc8 | src_reg);
+ addword(0xff);
+ addbyte(0x66); /*ANDW dst_reg, src_reg*/
+ addbyte(0x41);
+ addbyte(0x21);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else
+ {
+ addbyte(0x41); /*ANDB dst_reg, src_reg*/
+ addbyte(0x20);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ }
+ else if (src_reg & 8)
+ {
+ if (dst_reg & 0x10)
+ {
+ addbyte(0xc1); /*SHR dst_reg, 8*/
+ addbyte(0xe8 | (dst_reg & 7));
+ addbyte(8);
+ }
+ if (src_reg & 0x10)
+ {
+ addbyte(0x41); /*MOVZX EBX, src_reg*/
+ addbyte(0x0f);
+ addbyte(0xb7);
+ addbyte(0xd8 | (src_reg & 7));
+ addbyte(0xc1); /*SHR EBX, 8*/
+ addbyte(0xeb);
+ addbyte(8);
+ addbyte(0x20); /*ANDB dst_reg, EBX*/
+ addbyte(0xd8 | (dst_reg & 7));
+ }
+ else
+ {
+ addbyte(0x44); /*ANDB dst_reg, src_reg*/
+ addbyte(0x20);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ }
+ else
+ {
+ if (dst_reg & 0x10)
+ {
+ addbyte(0xc1); /*SHR dst_reg, 8*/
+ addbyte(0xe8 | (dst_reg & 7));
+ addbyte(8);
+ }
+ if (src_reg & 0x10)
+ {
+ addbyte(0x0f); /*MOVZX EBX, src_reg*/
+ addbyte(0xb7);
+ addbyte(0xd8 | (src_reg & 7));
+ addbyte(0xc1); /*SHR EBX, 8*/
+ addbyte(0xeb);
+ addbyte(8);
+ addbyte(0x20); /*ANDB dst_reg, EBX*/
+ addbyte(0xd8 | (dst_reg & 7));
+ }
+ else
+ {
+ addbyte(0x20); /*ANDB dst_reg, src_reg*/
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ }
+}
+static inline void AND_HOST_REG_W(int dst_reg, int src_reg)
+{
+ if (dst_reg & src_reg & 8)
+ {
+ addbyte(0x66); /*ANDW dst_reg, src_reg*/
+ addbyte(0x45);
+ addbyte(0x21);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (dst_reg & 8)
+ {
+ addbyte(0x66); /*ANDW dst_reg, src_reg*/
+ addbyte(0x41);
+ addbyte(0x21);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (src_reg & 8)
+ {
+ addbyte(0x66); /*ANDW dst_reg, src_reg*/
+ addbyte(0x44);
+ addbyte(0x21);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else
+ {
+ addbyte(0x66); /*ANDW dst_reg, src_reg*/
+ addbyte(0x21);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+}
+static inline void AND_HOST_REG_L(int dst_reg, int src_reg)
+{
+ if (dst_reg & src_reg & 8)
+ {
+ addbyte(0x45); /*ANDL dst_reg, src_reg*/
+ addbyte(0x21);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (dst_reg & 8)
+ {
+ addbyte(0x41); /*ANDL dst_reg, src_reg*/
+ addbyte(0x21);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (src_reg & 8)
+ {
+ addbyte(0x44); /*ANDL dst_reg, src_reg*/
+ addbyte(0x21);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else
+ {
+ addbyte(0x21); /*ANDL dst_reg, src_reg*/
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+}
+static inline void AND_HOST_REG_IMM(int host_reg, uint32_t imm)
+{
+ if (host_reg & 0x10)
+ {
+ addbyte(0x66); /*ANDW host_reg, imm<<8*/
+ if (host_reg & 8)
+ addbyte(0x41);
+ addbyte(0x81);
+ addbyte(0xe0 | (host_reg & 7));
+ addword((imm << 8) | 0xff);
+ }
+ else
+ {
+ if (host_reg & 8)
+ addbyte(0x41);
+ addbyte(0x81); /*ANDL host_reg, imm*/
+ addbyte(0xe0 | (host_reg & 7));
+ addlong(imm);
+ }
+}
+
+static inline int TEST_HOST_REG_B(int dst_reg, int src_reg)
+{
+ if (dst_reg & 8)
+ {
+ addbyte(0x44); /*MOV EDX, dst_reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | ((dst_reg & 7) << 3) | REG_EDX);
+
+ dst_reg = (dst_reg & 0x10) | REG_EDX;
+ }
+
+ AND_HOST_REG_B(dst_reg, src_reg);
+
+ return dst_reg & ~0x10;
+}
+static inline int TEST_HOST_REG_W(int dst_reg, int src_reg)
+{
+ if (dst_reg & 8)
+ {
+ addbyte(0x44); /*MOV EDX, dst_reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | ((dst_reg & 7) << 3) | REG_EDX);
+
+ dst_reg = REG_EDX;
+ }
+
+ AND_HOST_REG_W(dst_reg, src_reg);
+
+ return dst_reg;
+}
+static inline int TEST_HOST_REG_L(int dst_reg, int src_reg)
+{
+ if (dst_reg & 8)
+ {
+ addbyte(0x44); /*MOV EDX, dst_reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | ((dst_reg & 7) << 3) | REG_EDX);
+
+ dst_reg = REG_EDX;
+ }
+
+ AND_HOST_REG_L(dst_reg, src_reg);
+
+ return dst_reg;
+}
+static inline int TEST_HOST_REG_IMM(int host_reg, uint32_t imm)
+{
+ if (host_reg & 8)
+ {
+ addbyte(0x44); /*MOV EDX, host_reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | REG_EDX | ((host_reg & 7) << 3));
+ host_reg = REG_EDX | (host_reg & 0x10);
+ }
+ if (host_reg & 0x10)
+ {
+ addbyte(0x66); /*ANDW host_reg, imm<<8*/
+ addbyte(0x81);
+ addbyte(0xe0 | (host_reg & 7));
+ addword((imm << 8) | 0xff);
+ }
+ else
+ {
+ addbyte(0x81); /*ANDL host_reg, imm*/
+ addbyte(0xe0 | (host_reg & 7));
+ addlong(imm);
+ }
+
+ return host_reg;
+}
+
+static inline void OR_HOST_REG_B(int dst_reg, int src_reg)
+{
+ if (dst_reg & src_reg & 8)
+ {
+ if (dst_reg & 0x10)
+ {
+ addbyte(0x66); /*MOVW AX, src_reg*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0xc0 | ((src_reg & 7) << 3));
+ if (!(src_reg & 0x10))
+ {
+ addbyte(0x66); /*SHL AX, 8*/
+ addbyte(0xc1);
+ addbyte(0xe0);
+ addbyte(8);
+ }
+ else
+ {
+ addbyte(0x66); /*AND AX, 0xff00*/
+ addbyte(0x25);
+ addword(0xff00);
+ }
+ addbyte(0x66); /*ORW dst_reg, AX*/
+ addbyte(0x41);
+ addbyte(0x09);
+ addbyte(0xc0 | (dst_reg & 7));
+ }
+ else if (src_reg & 0x10)
+ {
+ addbyte(0x66); /*MOVW AX, src_reg*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0xc0 | ((src_reg & 7) << 3));
+ addbyte(0x66); /*SHR AX, 8*/
+ addbyte(0xc1);
+ addbyte(0xe8);
+ addbyte(8);
+ addbyte(0x41); /*ORB dst_reg, AL*/
+ addbyte(0x08);
+ addbyte(0xc0 | (dst_reg & 7));
+ }
+ else
+ {
+ addbyte(0x45); /*ORB dst_reg, src_reg*/
+ addbyte(0x08);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ }
+ else if (dst_reg & 8)
+ {
+ if (dst_reg & 0x10)
+ {
+ addbyte(0x66); /*SHL src_reg, 8*/
+ addbyte(0xc1);
+ addbyte(0xe0 | src_reg);
+ addbyte(0x08);
+ addbyte(0x66); /*ORW dst_reg, src_reg*/
+ addbyte(0x41);
+ addbyte(0x09);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else
+ {
+ addbyte(0x41); /*ORB dst_reg, src_reg*/
+ addbyte(0x08);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ }
+ else if (src_reg & 8)
+ {
+ if (dst_reg & 0x10)
+ {
+ addbyte(0xc1); /*SHR dst_reg, 8*/
+ addbyte(0xe8 | (dst_reg & 7));
+ addbyte(8);
+ }
+ if (src_reg & 0x10)
+ {
+ addbyte(0x41); /*MOVZX EBX, src_reg*/
+ addbyte(0x0f);
+ addbyte(0xb7);
+ addbyte(0xd8 | (src_reg & 7));
+ addbyte(0xc1); /*SHR EBX, 8*/
+ addbyte(0xeb);
+ addbyte(8);
+ addbyte(0x08); /*ORB dst_reg, EBX*/
+ addbyte(0xd8 | (dst_reg & 7));
+ }
+ else
+ {
+ addbyte(0x44); /*ORB dst_reg, src_reg*/
+ addbyte(0x08);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ }
+ else
+ {
+ if (dst_reg & 0x10)
+ {
+ addbyte(0xc1); /*SHR dst_reg, 8*/
+ addbyte(0xe8 | (dst_reg & 7));
+ addbyte(8);
+ }
+ if (src_reg & 0x10)
+ {
+ addbyte(0x0f); /*MOVZX EBX, src_reg*/
+ addbyte(0xb7);
+ addbyte(0xd8 | (src_reg & 7));
+ addbyte(0xc1); /*SHR EBX, 8*/
+ addbyte(0xeb);
+ addbyte(8);
+ addbyte(0x08); /*ORB dst_reg, EBX*/
+ addbyte(0xd8 | (dst_reg & 7));
+ }
+ else
+ {
+ addbyte(0x08); /*ORB dst_reg, src_reg*/
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ }
+}
+static inline void OR_HOST_REG_W(int dst_reg, int src_reg)
+{
+ if (dst_reg & src_reg & 8)
+ {
+ addbyte(0x66); /*ORW dst_reg, src_reg*/
+ addbyte(0x45);
+ addbyte(0x09);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (dst_reg & 8)
+ {
+ addbyte(0x66); /*ORW dst_reg, src_reg*/
+ addbyte(0x41);
+ addbyte(0x09);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (src_reg & 8)
+ {
+ addbyte(0x66); /*ORW dst_reg, src_reg*/
+ addbyte(0x44);
+ addbyte(0x09);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else
+ {
+ addbyte(0x66); /*ORW dst_reg, src_reg*/
+ addbyte(0x09);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+}
+static inline void OR_HOST_REG_L(int dst_reg, int src_reg)
+{
+ if (dst_reg & src_reg & 8)
+ {
+ addbyte(0x45); /*ORL dst_reg, src_reg*/
+ addbyte(0x09);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (dst_reg & 8)
+ {
+ addbyte(0x41); /*ORL dst_reg, src_reg*/
+ addbyte(0x09);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (src_reg & 8)
+ {
+ addbyte(0x44); /*ORL dst_reg, src_reg*/
+ addbyte(0x09);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else
+ {
+ addbyte(0x09); /*ORW dst_reg, src_reg*/
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+}
+static inline void OR_HOST_REG_IMM(int host_reg, uint32_t imm)
+{
+ if (host_reg & 0x10)
+ {
+ addbyte(0x66); /*ORW host_reg, imm<<8*/
+ addbyte(0x41);
+ addbyte(0x81);
+ addbyte(0xc8 | (host_reg & 7));
+ addword(imm << 8);
+ }
+ else if (host_reg & 8)
+ {
+ addbyte(0x41); /*ORL host_reg, imm*/
+ addbyte(0x81);
+ addbyte(0xc8 | (host_reg & 7));
+ addlong(imm);
+ }
+ else
+ {
+ addbyte(0x81); /*ORL host_reg, imm*/
+ addbyte(0xc8 | (host_reg & 7));
+ addlong(imm);
+ }
+// fatal("OR to bad register\n");
+}
+
+static inline void XOR_HOST_REG_B(int dst_reg, int src_reg)
+{
+ if (dst_reg & src_reg & 8)
+ {
+ if (dst_reg & 0x10)
+ {
+ addbyte(0x66); /*MOVW AX, src_reg*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0xc0 | ((src_reg & 7) << 3));
+ if (!(src_reg & 0x10))
+ {
+ addbyte(0x66); /*SHL AX, 8*/
+ addbyte(0xc1);
+ addbyte(0xe0);
+ addbyte(8);
+ }
+ else
+ {
+ addbyte(0x66); /*AND AX, 0xff00*/
+ addbyte(0x25);
+ addword(0xff00);
+ }
+ addbyte(0x66); /*XORW dst_reg, AX*/
+ addbyte(0x41);
+ addbyte(0x31);
+ addbyte(0xc0 | (dst_reg & 7));
+ }
+ else if (src_reg & 0x10)
+ {
+ addbyte(0x66); /*MOVW AX, src_reg*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0xc0 | ((src_reg & 7) << 3));
+ addbyte(0x66); /*SHR AX, 8*/
+ addbyte(0xc1);
+ addbyte(0xe8);
+ addbyte(8);
+ addbyte(0x41); /*XORB dst_reg, AL*/
+ addbyte(0x30);
+ addbyte(0xc0 | (dst_reg & 7));
+ }
+ else
+ {
+ addbyte(0x45); /*XORB dst_reg, src_reg*/
+ addbyte(0x30);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ }
+ else if (dst_reg & 8)
+ {
+ if (dst_reg & 0x10)
+ {
+ addbyte(0x66); /*SHL src_reg, 8*/
+ addbyte(0xc1);
+ addbyte(0xe0 | src_reg);
+ addbyte(0x08);
+ addbyte(0x66); /*XORW dst_reg, src_reg*/
+ addbyte(0x41);
+ addbyte(0x31);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else
+ {
+ addbyte(0x41); /*XORB dst_reg, src_reg*/
+ addbyte(0x30);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ }
+ else if (src_reg & 8)
+ {
+ if (dst_reg & 0x10)
+ {
+ addbyte(0xc1); /*SHR dst_reg, 8*/
+ addbyte(0xe8 | (dst_reg & 7));
+ addbyte(8);
+ }
+ if (src_reg & 0x10)
+ {
+ addbyte(0x41); /*MOVZX EBX, src_reg*/
+ addbyte(0x0f);
+ addbyte(0xb7);
+ addbyte(0xd8 | (src_reg & 7));
+ addbyte(0xc1); /*SHR EBX, 8*/
+ addbyte(0xeb);
+ addbyte(8);
+ addbyte(0x30); /*XORB dst_reg, EBX*/
+ addbyte(0xd8 | (dst_reg & 7));
+ }
+ else
+ {
+ addbyte(0x44); /*XORB dst_reg, src_reg*/
+ addbyte(0x30);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ }
+ else
+ {
+ if (dst_reg & 0x10)
+ {
+ addbyte(0xc1); /*SHR dst_reg, 8*/
+ addbyte(0xe8 | (dst_reg & 7));
+ addbyte(8);
+ }
+ if (src_reg & 0x10)
+ {
+ addbyte(0x0f); /*MOVZX EBX, src_reg*/
+ addbyte(0xb7);
+ addbyte(0xd8 | (src_reg & 7));
+ addbyte(0xc1); /*SHR EBX, 8*/
+ addbyte(0xeb);
+ addbyte(8);
+ addbyte(0x30); /*XORB dst_reg, EBX*/
+ addbyte(0xd8 | (dst_reg & 7));
+ }
+ else
+ {
+ addbyte(0x30); /*XORB dst_reg, src_reg*/
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ }
+}
+static inline void XOR_HOST_REG_W(int dst_reg, int src_reg)
+{
+ if (dst_reg & src_reg & 8)
+ {
+ addbyte(0x66); /*XORW dst_reg, src_reg*/
+ addbyte(0x45);
+ addbyte(0x31);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (dst_reg & 8)
+ {
+ addbyte(0x66); /*XORW dst_reg, src_reg*/
+ addbyte(0x41);
+ addbyte(0x31);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (src_reg & 8)
+ {
+ addbyte(0x66); /*XORW dst_reg, src_reg*/
+ addbyte(0x44);
+ addbyte(0x31);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else
+ {
+ addbyte(0x66); /*XORW dst_reg, src_reg*/
+ addbyte(0x31);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+}
+static inline void XOR_HOST_REG_L(int dst_reg, int src_reg)
+{
+ if (dst_reg & src_reg & 8)
+ {
+ addbyte(0x45); /*XORL dst_reg, src_reg*/
+ addbyte(0x31);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (dst_reg & 8)
+ {
+ addbyte(0x41); /*XORL dst_reg, src_reg*/
+ addbyte(0x31);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (src_reg & 8)
+ {
+ addbyte(0x44); /*XORW dst_reg, src_reg*/
+ addbyte(0x31);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else
+ {
+ addbyte(0x31); /*XORW dst_reg, src_reg*/
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+}
+static inline void XOR_HOST_REG_IMM(int host_reg, uint32_t imm)
+{
+ if (host_reg & 0x10)
+ {
+ addbyte(0x66); /*ORW host_reg, imm<<8*/
+ addbyte(0x41);
+ addbyte(0x81);
+ addbyte(0xf0 | (host_reg & 7));
+ addword(imm << 8);
+ }
+ else if (host_reg & 8)
+ {
+ addbyte(0x41); /*ORL host_reg, imm*/
+ addbyte(0x81);
+ addbyte(0xf0 | (host_reg & 7));
+ addlong(imm);
+ }
+ else
+ {
+ addbyte(0x81); /*ORL host_reg, imm*/
+ addbyte(0xf0 | (host_reg & 7));
+ addlong(imm);
+ }
+// fatal("XOR to bad register\n");
+}
+
+static inline void ADD_HOST_REG_B(int dst_reg, int src_reg)
+{
+ if (dst_reg & src_reg & 8)
+ {
+ if (dst_reg & 0x10)
+ {
+ addbyte(0x66); /*MOVW AX, src_reg*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0xc0 | ((src_reg & 7) << 3));
+ if (!(src_reg & 0x10))
+ {
+ addbyte(0x66); /*SHL AX, 8*/
+ addbyte(0xc1);
+ addbyte(0xe0);
+ addbyte(8);
+ }
+ else
+ {
+ addbyte(0x66); /*AND AX, 0xff00*/
+ addbyte(0x25);
+ addword(0xff00);
+ }
+ addbyte(0x66); /*ADDW dst_reg, AX*/
+ addbyte(0x41);
+ addbyte(0x01);
+ addbyte(0xc0 | (dst_reg & 7));
+ }
+ else if (src_reg & 0x10)
+ {
+ addbyte(0x66); /*MOVW AX, src_reg*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0xc0 | ((src_reg & 7) << 3));
+ addbyte(0x66); /*SHR AX, 8*/
+ addbyte(0xc1);
+ addbyte(0xe8);
+ addbyte(8);
+ addbyte(0x41); /*ADDB dst_reg, AL*/
+ addbyte(0x00);
+ addbyte(0xc0 | (dst_reg & 7));
+ }
+ else
+ {
+ addbyte(0x45); /*ADDB dst_reg, src_reg*/
+ addbyte(0x00);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ }
+ else if (dst_reg & 8)
+ {
+ if (dst_reg & 0x10)
+ {
+ addbyte(0x66); /*SHL src_reg, 8*/
+ addbyte(0xc1);
+ addbyte(0xe0 | src_reg);
+ addbyte(0x08);
+ addbyte(0x66); /*ADDW dst_reg, src_reg*/
+ addbyte(0x41);
+ addbyte(0x01);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else
+ {
+ addbyte(0x41); /*ADDB dst_reg, src_reg*/
+ addbyte(0x00);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ }
+ else if (src_reg & 8)
+ {
+ if (src_reg & 0x10)
+ {
+ addbyte(0x66); /*MOVW AX, src_reg*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0xc0 | ((src_reg & 7) << 3));
+ addbyte(0x66); /*SHR AX, 8*/
+ addbyte(0xc1);
+ addbyte(0xe8);
+ addbyte(8);
+ addbyte(0x00); /*ADDB dst_reg, AL*/
+ addbyte(0xc0 | (dst_reg & 7));
+ }
+ else
+ {
+ addbyte(0x44); /*ADDB dst_reg, src_reg*/
+ addbyte(0x00);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ }
+ else
+ fatal("!(dst_reg & src_reg & 8)\n");
+}
+static inline void ADD_HOST_REG_W(int dst_reg, int src_reg)
+{
+ if (dst_reg & src_reg & 8)
+ {
+ addbyte(0x66); /*ADDW dst_reg, src_reg*/
+ addbyte(0x45);
+ addbyte(0x01);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (dst_reg & 8)
+ {
+ addbyte(0x66); /*ADDW dst_reg, src_reg*/
+ addbyte(0x41);
+ addbyte(0x01);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (src_reg & 8)
+ {
+ addbyte(0x66); /*ADDW dst_reg, src_reg*/
+ addbyte(0x44);
+ addbyte(0x01);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else
+ fatal("!(dst_reg & src_reg & 8)\n");
+}
+static inline void ADD_HOST_REG_L(int dst_reg, int src_reg)
+{
+ if (dst_reg & src_reg & 8)
+ {
+ addbyte(0x45); /*ADDL dst_reg, src_reg*/
+ addbyte(0x01);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (dst_reg & 8)
+ {
+ addbyte(0x41); /*ADDL dst_reg, src_reg*/
+ addbyte(0x01);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (src_reg & 8)
+ {
+ addbyte(0x44); /*ADDL dst_reg, src_reg*/
+ addbyte(0x01);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else
+ fatal("!(dst_reg & src_reg & 8)\n");
+}
+
+static inline void SUB_HOST_REG_B(int dst_reg, int src_reg)
+{
+ if (dst_reg & src_reg & 8)
+ {
+ if (dst_reg & 0x10)
+ {
+ addbyte(0x66); /*MOVW AX, src_reg*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0xc0 | ((src_reg & 7) << 3));
+ if (!(src_reg & 0x10))
+ {
+ addbyte(0x66); /*SHL AX, 8*/
+ addbyte(0xc1);
+ addbyte(0xe0);
+ addbyte(8);
+ }
+ else
+ {
+ addbyte(0x66); /*AND AX, 0xff00*/
+ addbyte(0x25);
+ addword(0xff00);
+ }
+ addbyte(0x66); /*SUBW dst_reg, AX*/
+ addbyte(0x41);
+ addbyte(0x29);
+ addbyte(0xc0 | (dst_reg & 7));
+ }
+ else if (src_reg & 0x10)
+ {
+ addbyte(0x66); /*MOVW AX, src_reg*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0xc0 | ((src_reg & 7) << 3));
+ addbyte(0x66); /*SHR AX, 8*/
+ addbyte(0xc1);
+ addbyte(0xe8);
+ addbyte(8);
+ addbyte(0x41); /*SUBB dst_reg, AL*/
+ addbyte(0x28);
+ addbyte(0xc0 | (dst_reg & 7));
+ }
+ else
+ {
+ addbyte(0x45); /*SUBB dst_reg, src_reg*/
+ addbyte(0x28);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ }
+ else if (dst_reg & 8)
+ {
+ if (dst_reg & 0x10)
+ {
+ addbyte(0x66); /*SHL src_reg, 8*/
+ addbyte(0xc1);
+ addbyte(0xe0 | src_reg);
+ addbyte(0x08);
+ addbyte(0x66); /*SUBW dst_reg, src_reg*/
+ addbyte(0x41);
+ addbyte(0x29);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else
+ {
+ addbyte(0x41); /*SUBB dst_reg, src_reg*/
+ addbyte(0x28);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ }
+ else if (src_reg & 8)
+ {
+ if (dst_reg & 0x10)
+ {
+ addbyte(0xc1); /*SHR dst_reg, 8*/
+ addbyte(0xe8 | (dst_reg & 7));
+ addbyte(8);
+ }
+ if (src_reg & 0x10)
+ {
+ addbyte(0x41); /*MOVZX EBX, src_reg*/
+ addbyte(0x0f);
+ addbyte(0xb7);
+ addbyte(0xd8 | (src_reg & 7));
+ addbyte(0xc1); /*SHR EBX, 8*/
+ addbyte(0xeb);
+ addbyte(8);
+ addbyte(0x28); /*SUBB dst_reg, EBX*/
+ addbyte(0xd8 | (dst_reg & 7));
+ }
+ else
+ {
+ addbyte(0x44); /*SUBB dst_reg, src_reg*/
+ addbyte(0x28);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ }
+ else
+ {
+ if (dst_reg & 0x10)
+ {
+ addbyte(0xc1); /*SHR dst_reg, 8*/
+ addbyte(0xe8 | (dst_reg & 7));
+ addbyte(8);
+ }
+ if (src_reg & 0x10)
+ {
+ addbyte(0x0f); /*MOVZX EBX, src_reg*/
+ addbyte(0xb7);
+ addbyte(0xd8 | (src_reg & 7));
+ addbyte(0xc1); /*SHR EBX, 8*/
+ addbyte(0xeb);
+ addbyte(8);
+ addbyte(0x28); /*SUBB dst_reg, EBX*/
+ addbyte(0xd8 | (dst_reg & 7));
+ }
+ else
+ {
+ addbyte(0x28); /*SUBB dst_reg, src_reg*/
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ }
+
+// fatal("!(dst_reg & src_reg & 8) subb %i %i\n", dst_reg, src_reg);
+}
+static inline void SUB_HOST_REG_W(int dst_reg, int src_reg)
+{
+ if (dst_reg & src_reg & 8)
+ {
+ addbyte(0x66); /*SUBW dst_reg, src_reg*/
+ addbyte(0x45);
+ addbyte(0x29);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (dst_reg & 8)
+ {
+ addbyte(0x66); /*SUBW dst_reg, src_reg*/
+ addbyte(0x41);
+ addbyte(0x29);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (src_reg & 8)
+ {
+ addbyte(0x66); /*SUBW dst_reg, src_reg*/
+ addbyte(0x44);
+ addbyte(0x29);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else
+ {
+ addbyte(0x66); /*SUBW dst_reg, src_reg*/
+ addbyte(0x29);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+}
+static inline void SUB_HOST_REG_L(int dst_reg, int src_reg)
+{
+ if (dst_reg & src_reg & 8)
+ {
+ addbyte(0x45); /*SUBL dst_reg, src_reg*/
+ addbyte(0x29);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (dst_reg & 8)
+ {
+ addbyte(0x41); /*SUBL dst_reg, src_reg*/
+ addbyte(0x29);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else if (src_reg & 8)
+ {
+ addbyte(0x44); /*SUBL dst_reg, src_reg*/
+ addbyte(0x29);
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+ else
+ {
+ addbyte(0x29); /*SUBL dst_reg, src_reg*/
+ addbyte(0xc0 | (dst_reg & 7) | ((src_reg & 7) << 3));
+ }
+}
+
+static inline int CMP_HOST_REG_B(int dst_reg, int src_reg)
+{
+ if (dst_reg & 8)
+ {
+ addbyte(0x44); /*MOV EDX, dst_reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | ((dst_reg & 7) << 3) | REG_EDX);
+
+ dst_reg = (dst_reg & 0x10) | REG_EDX;
+ }
+
+ SUB_HOST_REG_B(dst_reg, src_reg);
+
+ return dst_reg & ~0x10;
+}
+static inline int CMP_HOST_REG_W(int dst_reg, int src_reg)
+{
+ if (dst_reg & 8)
+ {
+ addbyte(0x44); /*MOV EDX, dst_reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | ((dst_reg & 7) << 3) | REG_EDX);
+
+ dst_reg = REG_EDX;
+ }
+
+ SUB_HOST_REG_W(dst_reg, src_reg);
+
+ return dst_reg;
+}
+static inline int CMP_HOST_REG_L(int dst_reg, int src_reg)
+{
+ if (dst_reg & 8)
+ {
+ addbyte(0x44); /*MOV EDX, dst_reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | ((dst_reg & 7) << 3) | REG_EDX);
+
+ dst_reg = REG_EDX;
+ }
+
+ SUB_HOST_REG_L(dst_reg, src_reg);
+
+ return dst_reg;
+}
+
+static inline void ADD_HOST_REG_IMM_B(int host_reg, uint8_t imm)
+{
+ if (host_reg & 0x10)
+ {
+ addbyte(0x66); /*ADDW host_reg, imm*/
+ if (host_reg & 8)
+ addbyte(0x41);
+ addbyte(0x81);
+ addbyte(0xC0 | (host_reg & 7));
+ addword(imm << 8);
+ }
+ else
+ {
+ if (host_reg & 8)
+ addbyte(0x41);
+ addbyte(0x80); /*ADDB host_reg, imm*/
+ addbyte(0xC0 | (host_reg & 7));
+ addbyte(imm);
+ }
+}
+static inline void ADD_HOST_REG_IMM_W(int host_reg, uint16_t imm)
+{
+ addbyte(0x66); /*ADDW host_reg, imm*/
+ if (host_reg & 8)
+ addbyte(0x41);
+ addbyte(0x81);
+ addbyte(0xC0 | (host_reg & 7));
+ addword(imm);
+}
+static inline void ADD_HOST_REG_IMM(int host_reg, uint32_t imm)
+{
+ if (host_reg & 8)
+ addbyte(0x41);
+ addbyte(0x81); /*ADDL host_reg, imm*/
+ addbyte(0xC0 | (host_reg & 7));
+ addlong(imm);
+}
+
+static inline void SUB_HOST_REG_IMM_B(int host_reg, uint8_t imm)
+{
+ if (host_reg & 0x10)
+ {
+ addbyte(0x66); /*SUBW host_reg, imm*/
+ if (host_reg & 8)
+ addbyte(0x41);
+ addbyte(0x81);
+ addbyte(0xE8 | (host_reg & 7));
+ addword(imm << 8);
+ }
+ else
+ {
+ if (host_reg & 8)
+ addbyte(0x41);
+ addbyte(0x80); /*SUBB host_reg, imm*/
+ addbyte(0xE8 | (host_reg & 7));
+ addbyte(imm);
+ }
+}
+static inline void SUB_HOST_REG_IMM_W(int host_reg, uint16_t imm)
+{
+ addbyte(0x66); /*SUBW host_reg, imm*/
+ if (host_reg & 8)
+ addbyte(0x41);
+ addbyte(0x81);
+ addbyte(0xE8 | (host_reg & 7));
+ addword(imm);
+}
+static inline void SUB_HOST_REG_IMM(int host_reg, uint32_t imm)
+{
+ if (host_reg & 8)
+ addbyte(0x41);
+ addbyte(0x81); /*SUBL host_reg, imm*/
+ addbyte(0xE8 | (host_reg & 7));
+ addlong(imm);
+}
+
+static inline int CMP_HOST_REG_IMM_B(int host_reg, uint8_t imm)
+{
+ if (host_reg & 8)
+ {
+ addbyte(0x44); /*MOV EDX, dst_reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | ((host_reg & 7) << 3) | REG_EDX);
+
+ host_reg = (host_reg & 0x10) | REG_EDX;
+ }
+
+ SUB_HOST_REG_IMM_B(host_reg, imm);
+
+ return host_reg;// & ~0x10;
+}
+static inline int CMP_HOST_REG_IMM_W(int host_reg, uint16_t imm)
+{
+ if (host_reg & 8)
+ {
+ addbyte(0x44); /*MOV EDX, dst_reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | ((host_reg & 7) << 3) | REG_EDX);
+
+ host_reg = REG_EDX;
+ }
+
+ SUB_HOST_REG_IMM_W(host_reg, imm);
+
+ return host_reg;
+}
+static inline int CMP_HOST_REG_IMM_L(int host_reg, uint32_t imm)
+{
+ if (host_reg & 8)
+ {
+ addbyte(0x44); /*MOV EDX, dst_reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | ((host_reg & 7) << 3) | REG_EDX);
+
+ host_reg = REG_EDX;
+ }
+
+ SUB_HOST_REG_IMM(host_reg, imm);
+
+ return host_reg;
+}
+
+static inline void LOAD_STACK_TO_EA(int off)
+{
+ if (stack32)
+ {
+ addbyte(0x8b); /*MOVL EAX,[ESP]*/
+ addbyte(0x45 | (REG_EAX << 3));
+ addbyte((uint8_t)cpu_state_offset(regs[REG_ESP].l));
+ if (off)
+ {
+ addbyte(0x83); /*ADD EAX, off*/
+ addbyte(0xc0 | (0 << 3) | REG_EAX);
+ addbyte(off);
+ }
+ }
+ else
+ {
+ addbyte(0x0f); /*MOVZX EAX,W[ESP]*/
+ addbyte(0xb7);
+ addbyte(0x45 | (REG_EAX << 3));
+ addbyte((uint8_t)cpu_state_offset(regs[REG_ESP].w));
+ if (off)
+ {
+ addbyte(0x66); /*ADD AX, off*/
+ addbyte(0x05);
+ addword(off);
+ }
+ }
+}
+static inline void LOAD_EBP_TO_EA(int off)
+{
+ if (stack32)
+ {
+ addbyte(0x8b); /*MOVL EAX,[EBP]*/
+ addbyte(0x45 | (REG_EAX << 3));
+ addbyte((uint8_t)cpu_state_offset(regs[REG_EBP].l));
+ if (off)
+ {
+ addbyte(0x83); /*ADD EAX, off*/
+ addbyte(0xc0 | (0 << 3) | REG_EAX);
+ addbyte(off);
+ }
+ }
+ else
+ {
+ addbyte(0x0f); /*MOVZX EAX,W[EBP]*/
+ addbyte(0xb7);
+ addbyte(0x45 | (REG_EAX << 3));
+ addbyte((uint8_t)cpu_state_offset(regs[REG_BP].l));
+ if (off)
+ {
+ addbyte(0x66); /*ADD AX, off*/
+ addbyte(0x05);
+ addword(off);
+ }
+ }
+}
+
+static inline void SP_MODIFY(int off)
+{
+ if (stack32)
+ {
+ if (off < 0x80)
+ {
+ addbyte(0x83); /*ADD [ESP], off*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[REG_ESP].l));
+ addbyte(off);
+ }
+ else
+ {
+ addbyte(0x81); /*ADD [ESP], off*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[REG_ESP].l));
+ addlong(off);
+ }
+ }
+ else
+ {
+ if (off < 0x80)
+ {
+ addbyte(0x66); /*ADD [SP], off*/
+ addbyte(0x83);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[REG_ESP].w));
+ addbyte(off);
+ }
+ else
+ {
+ addbyte(0x66); /*ADD [SP], off*/
+ addbyte(0x81);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[REG_ESP].w));
+ addword(off);
+ }
+ }
+}
+
+static inline void TEST_ZERO_JUMP_W(int host_reg, uint32_t new_pc, int taken_cycles)
+{
+ addbyte(0x66); /*CMPW host_reg, 0*/
+ if (host_reg & 8)
+ addbyte(0x41);
+ addbyte(0x83);
+ addbyte(0xc0 | 0x38 | (host_reg & 7));
+ addbyte(0);
+ addbyte(0x75); /*JNZ +*/
+ addbyte(7+5+(taken_cycles ? 4 : 0));
+ addbyte(0xC7); /*MOVL [pc], new_pc*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(pc));
+ addlong(new_pc);
+ if (taken_cycles)
+ {
+ addbyte(0x83); /*SUB $codegen_block_cycles, cyclcs*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(_cycles));
+ addbyte(taken_cycles);
+ }
+ addbyte(0xe9); /*JMP end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+}
+static inline void TEST_ZERO_JUMP_L(int host_reg, uint32_t new_pc, int taken_cycles)
+{
+ if (host_reg & 8)
+ addbyte(0x41);
+ addbyte(0x83); /*CMPW host_reg, 0*/
+ addbyte(0xc0 | 0x38 | (host_reg & 7));
+ addbyte(0);
+ addbyte(0x75); /*JNZ +*/
+ addbyte(7+5+(taken_cycles ? 4 : 0));
+ addbyte(0xC7); /*MOVL [pc], new_pc*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(pc));
+ addlong(new_pc);
+ if (taken_cycles)
+ {
+ addbyte(0x83); /*SUB $codegen_block_cycles, cyclcs*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(_cycles));
+ addbyte(taken_cycles);
+ }
+ addbyte(0xe9); /*JMP end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+}
+
+static inline void TEST_NONZERO_JUMP_W(int host_reg, uint32_t new_pc, int taken_cycles)
+{
+ addbyte(0x66); /*CMPW host_reg, 0*/
+ if (host_reg & 8)
+ addbyte(0x41);
+ addbyte(0x83);
+ addbyte(0xc0 | 0x38 | (host_reg & 7));
+ addbyte(0);
+ addbyte(0x74); /*JZ +*/
+ addbyte(7+5+(taken_cycles ? 4 : 0));
+ addbyte(0xC7); /*MOVL [pc], new_pc*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(pc));
+ addlong(new_pc);
+ if (taken_cycles)
+ {
+ addbyte(0x83); /*SUB $codegen_block_cycles, cyclcs*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(_cycles));
+ addbyte(taken_cycles);
+ }
+ addbyte(0xe9); /*JMP end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+}
+static inline void TEST_NONZERO_JUMP_L(int host_reg, uint32_t new_pc, int taken_cycles)
+{
+ if (host_reg & 8)
+ addbyte(0x41);
+ addbyte(0x83); /*CMPW host_reg, 0*/
+ addbyte(0xc0 | 0x38 | (host_reg & 7));
+ addbyte(0);
+ addbyte(0x74); /*JZ +*/
+ addbyte(7+5+(taken_cycles ? 4 : 0));
+ addbyte(0xC7); /*MOVL [pc], new_pc*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(pc));
+ addlong(new_pc);
+ if (taken_cycles)
+ {
+ addbyte(0x83); /*SUB $codegen_block_cycles, cyclcs*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(_cycles));
+ addbyte(taken_cycles);
+ }
+ addbyte(0xe9); /*JMP end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+}
+
+static inline void BRANCH_COND_BE(int pc_offset, uint32_t op_pc, uint32_t offset, int not)
+{
+ uint8_t *jump1;
+
+ if (codegen_flags_changed && cpu_state.flags_op != FLAGS_UNKNOWN)
+ {
+ addbyte(0x83); /*CMP flags_res, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(flags_res));
+ addbyte(0);
+ addbyte(0x74); /*JZ +*/
+ }
+ else
+ {
+ CALL_FUNC((uintptr_t)ZF_SET);
+ addbyte(0x85); /*TEST EAX,EAX*/
+ addbyte(0xc0);
+ addbyte(0x75); /*JNZ +*/
+ }
+ jump1 = &codeblock[block_current].data[block_pos];
+ addbyte(0);
+ CALL_FUNC((uintptr_t)CF_SET);
+ addbyte(0x85); /*TEST EAX,EAX*/
+ addbyte(0xc0);
+ if (not)
+ addbyte(0x75); /*JNZ +*/
+ else
+ addbyte(0x74); /*JZ +*/
+ addbyte(7+5+(timing_bt ? 4 : 0));
+
+ if (!not)
+ *jump1 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump1 - 1;
+ addbyte(0xC7); /*MOVL [pc], new_pc*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(pc));
+ addlong(op_pc+pc_offset+offset);
+ if (timing_bt)
+ {
+ addbyte(0x83); /*SUB $codegen_block_cycles, cyclcs*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(_cycles));
+ addbyte(timing_bt);
+ }
+ addbyte(0xe9); /*JMP end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+ if (not)
+ *jump1 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump1 - 1;
+}
+
+static inline void BRANCH_COND_L(int pc_offset, uint32_t op_pc, uint32_t offset, int not)
+{
+ CALL_FUNC((uintptr_t)NF_SET);
+ addbyte(0x85); /*TEST EAX,EAX*/
+ addbyte(0xc0);
+ addbyte(0x0f); /*SETNE BL*/
+ addbyte(0x95);
+ addbyte(0xc3);
+ CALL_FUNC((uintptr_t)VF_SET);
+ addbyte(0x85); /*TEST EAX,EAX*/
+ addbyte(0xc0);
+ addbyte(0x0f); /*SETNE AL*/
+ addbyte(0x95);
+ addbyte(0xc0);
+ addbyte(0x38); /*CMP AL, BL*/
+ addbyte(0xd8);
+ if (not)
+ addbyte(0x75); /*JNZ +*/
+ else
+ addbyte(0x74); /*JZ +*/
+ addbyte(7+5+(timing_bt ? 4 : 0));
+ addbyte(0xC7); /*MOVL [pc], new_pc*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(pc));
+ addlong(op_pc+pc_offset+offset);
+ if (timing_bt)
+ {
+ addbyte(0x83); /*SUB $codegen_block_cycles, cyclcs*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(_cycles));
+ addbyte(timing_bt);
+ }
+ addbyte(0xe9); /*JMP end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+}
+
+static inline void BRANCH_COND_LE(int pc_offset, uint32_t op_pc, uint32_t offset, int not)
+{
+ uint8_t *jump1;
+ if (codegen_flags_changed && cpu_state.flags_op != FLAGS_UNKNOWN)
+ {
+ addbyte(0x83); /*CMP flags_res, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(flags_res));
+ addbyte(0);
+ addbyte(0x74); /*JZ +*/
+ }
+ else
+ {
+ CALL_FUNC((uintptr_t)ZF_SET);
+ addbyte(0x85); /*TEST EAX,EAX*/
+ addbyte(0xc0);
+ addbyte(0x75); /*JNZ +*/
+ }
+ jump1 = &codeblock[block_current].data[block_pos];
+ addbyte(0);
+ CALL_FUNC((uintptr_t)NF_SET);
+ addbyte(0x85); /*TEST EAX,EAX*/
+ addbyte(0xc0);
+ addbyte(0x0f); /*SETNE BL*/
+ addbyte(0x95);
+ addbyte(0xc3);
+ CALL_FUNC((uintptr_t)VF_SET);
+ addbyte(0x85); /*TEST EAX,EAX*/
+ addbyte(0xc0);
+ addbyte(0x0f); /*SETNE AL*/
+ addbyte(0x95);
+ addbyte(0xc0);
+ addbyte(0x38); /*CMP AL, BL*/
+ addbyte(0xd8);
+ if (not)
+ addbyte(0x75); /*JNZ +*/
+ else
+ addbyte(0x74); /*JZ +*/
+ addbyte(7+5+(timing_bt ? 4 : 0));
+ if (!not)
+ *jump1 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump1 - 1;
+ addbyte(0xC7); /*MOVL [pc], new_pc*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(pc));
+ addlong(op_pc+pc_offset+offset);
+ if (timing_bt)
+ {
+ addbyte(0x83); /*SUB $codegen_block_cycles, cyclcs*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(_cycles));
+ addbyte(timing_bt);
+ }
+ addbyte(0xe9); /*JMP end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+ if (not)
+ *jump1 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump1 - 1;
+}
+
+static inline int LOAD_VAR_W(uintptr_t addr)
+{
+ int host_reg = REG_EBX;
+
+ if (addr >= (uintptr_t)&cpu_state && addr < ((uintptr_t)&cpu_state)+0x100)
+ {
+ addbyte(0x0f); /*MOVZX host_reg, offset[cpu_state]*/
+ addbyte(0xb7);
+ addbyte(0x45 | (host_reg << 3));
+ addbyte(addr - (uintptr_t)&cpu_state - 128);
+ }
+ else if (IS_32_ADDR(addr))
+ {
+ addbyte(0x0f); /*MOVZX host_reg,[reg]*/
+ addbyte(0xb7);
+ addbyte(0x04 | (host_reg << 3));
+ addbyte(0x25);
+ addlong((uint32_t)addr);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV host_reg, &addr*/
+ addbyte(0xb8 | host_reg);
+ addquad(addr);
+ addbyte(0x0f); /*MOVZX host_reg, [host_reg]*/
+ addbyte(0xb7);
+ addbyte(host_reg | (host_reg << 3));
+ }
+
+ return host_reg;
+}
+static inline int LOAD_VAR_WL(uintptr_t addr)
+{
+ return LOAD_VAR_W(addr);
+}
+static inline int LOAD_VAR_L(uintptr_t addr)
+{
+ int host_reg = REG_EBX;
+
+ if (addr >= (uintptr_t)&cpu_state && addr < ((uintptr_t)&cpu_state)+0x100)
+ {
+ addbyte(0x8b); /*MOVL host_reg, offset[cpu_state]*/
+ addbyte(0x45 | (host_reg << 3));
+ addbyte(addr - (uintptr_t)&cpu_state - 128);
+ }
+ else if (IS_32_ADDR(addr))
+ {
+ addbyte(0x8b); /*MOVL host_reg,[reg]*/
+ addbyte(0x04 | (host_reg << 3));
+ addbyte(0x25);
+ addlong((uint32_t)addr);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV host_reg, &addr*/
+ addbyte(0xb8 | host_reg);
+ addquad(addr);
+ addbyte(0x8b); /*MOVL host_reg, [host_reg]*/
+ addbyte(host_reg | (host_reg << 3));
+ }
+
+ return host_reg;
+}
+
+static inline int COPY_REG(int src_reg)
+{
+ if (src_reg & 8)
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0xc0 | REG_ECX | ((src_reg & 7) << 3));
+
+ return REG_ECX | (src_reg & 0x10);
+}
+
+static inline int LOAD_HOST_REG(int host_reg)
+{
+ if (host_reg & 8)
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0xc0 | REG_EBX | ((host_reg & 7) << 3));
+
+ return REG_EBX | (host_reg & 0x10);
+}
+
+static inline int ZERO_EXTEND_W_B(int reg)
+{
+ if (reg & 0x10)
+ {
+ addbyte(0x44); /*MOV EAX, reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | (reg << 3));
+ addbyte(0x0f); /*MOVZX EAX, AH*/
+ addbyte(0xb6);
+ addbyte(0xc4);
+
+ return REG_EAX;
+ }
+
+ if (reg & 8)
+ addbyte(0x41);
+ addbyte(0x0f); /*MOVZX regl, regb*/
+ addbyte(0xb6);
+ addbyte(0xc0 | (reg & 7));
+
+ return REG_EAX;
+}
+static inline int ZERO_EXTEND_L_B(int reg)
+{
+ if (reg & 0x10)
+ {
+ addbyte(0x44); /*MOV EAX, reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | (reg << 3));
+ addbyte(0x0f); /*MOVZX EAX, AH*/
+ addbyte(0xb6);
+ addbyte(0xc4);
+
+ return REG_EAX;
+ }
+
+ if (reg & 8)
+ addbyte(0x41);
+ addbyte(0x0f); /*MOVZX regl, regb*/
+ addbyte(0xb6);
+ addbyte(0xc0 | (reg & 7));
+
+ return REG_EAX;
+}
+static inline int ZERO_EXTEND_L_W(int reg)
+{
+ if (reg & 8)
+ addbyte(0x41);
+ addbyte(0x0f); /*MOVZX regl, regw*/
+ addbyte(0xb7);
+ addbyte(0xc0 | (reg & 7));
+
+ return REG_EAX;
+}
+
+static inline int SIGN_EXTEND_W_B(int reg)
+{
+ if (reg & 0x10)
+ {
+ addbyte(0x44); /*MOV EAX, reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | (reg << 3));
+ addbyte(0x0f); /*MOVSX EAX, AH*/
+ addbyte(0xbe);
+ addbyte(0xc4);
+
+ return REG_EAX;
+ }
+
+ if (reg & 8)
+ addbyte(0x41);
+ addbyte(0x0f); /*MOVSX regl, regb*/
+ addbyte(0xbe);
+ addbyte(0xc0 | (reg & 7));
+
+ return REG_EAX;
+}
+static inline int SIGN_EXTEND_L_B(int reg)
+{
+ if (reg & 0x10)
+ {
+ addbyte(0x44); /*MOV EAX, reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | (reg << 3));
+ addbyte(0x0f); /*MOVSX EAX, AH*/
+ addbyte(0xbe);
+ addbyte(0xc4);
+
+ return REG_EAX;
+ }
+
+ if (reg & 8)
+ addbyte(0x41);
+ addbyte(0x0f); /*MOVSX regl, regb*/
+ addbyte(0xbe);
+ addbyte(0xc0 | (reg & 7));
+
+ return REG_EAX;
+}
+static inline int SIGN_EXTEND_L_W(int reg)
+{
+ if (reg & 8)
+ addbyte(0x41);
+ addbyte(0x0f); /*MOVSX regl, regw*/
+ addbyte(0xbf);
+ addbyte(0xc0 | (reg & 7));
+
+ return REG_EAX;
+}
+
+static inline void SHL_B_IMM(int reg, int count)
+{
+ if (reg & 0x10)
+ {
+ addbyte(0x44); /*MOV EAX, reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | REG_EAX | ((reg & 7) << 3));
+ addbyte(0xc0); /*SHL AH, count*/
+ addbyte(0xe0 | REG_AH);
+ addbyte(count);
+ addbyte(0x41); /*MOV reg, EAX*/
+ addbyte(0x89);
+ addbyte(0xc0 | (REG_EAX << 3) | (reg & 7));
+ }
+ else
+ {
+ if (reg & 8)
+ addbyte(0x41);
+ addbyte(0xc0); /*SHL reg, count*/
+ addbyte(0xc0 | (reg & 7) | 0x20);
+ addbyte(count);
+ }
+}
+static inline void SHL_W_IMM(int reg, int count)
+{
+ addbyte(0x66); /*SHL reg, count*/
+ if (reg & 8)
+ addbyte(0x41);
+ addbyte(0xc1);
+ addbyte(0xc0 | (reg & 7) | 0x20);
+ addbyte(count);
+}
+static inline void SHL_L_IMM(int reg, int count)
+{
+ if (reg & 8)
+ addbyte(0x41);
+ addbyte(0xc1); /*SHL reg, count*/
+ addbyte(0xc0 | (reg & 7) | 0x20);
+ addbyte(count);
+}
+static inline void SHR_B_IMM(int reg, int count)
+{
+ if (reg & 0x10)
+ {
+ addbyte(0x44); /*MOV EAX, reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | REG_EAX | ((reg & 7) << 3));
+ addbyte(0xc0); /*SHR AH, count*/
+ addbyte(0xe8 | REG_AH);
+ addbyte(count);
+ addbyte(0x41); /*MOV reg, EAX*/
+ addbyte(0x89);
+ addbyte(0xc0 | (REG_EAX << 3) | (reg & 7));
+ }
+ else
+ {
+ if (reg & 8)
+ addbyte(0x41);
+ addbyte(0xc0); /*SHR reg, count*/
+ addbyte(0xc0 | (reg & 7) | 0x28);
+ addbyte(count);
+ }
+}
+static inline void SHR_W_IMM(int reg, int count)
+{
+ addbyte(0x66); /*SHR reg, count*/
+ if (reg & 8)
+ addbyte(0x41);
+ addbyte(0xc1);
+ addbyte(0xc0 | (reg & 7) | 0x28);
+ addbyte(count);
+}
+static inline void SHR_L_IMM(int reg, int count)
+{
+ if (reg & 8)
+ addbyte(0x41);
+ addbyte(0xc1); /*SHR reg, count*/
+ addbyte(0xc0 | (reg & 7) | 0x28);
+ addbyte(count);
+}
+static inline void SAR_B_IMM(int reg, int count)
+{
+ if (reg & 0x10)
+ {
+ addbyte(0x44); /*MOV EAX, reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | REG_EAX | ((reg & 7) << 3));
+ addbyte(0xc0); /*SAR AH, count*/
+ addbyte(0xf8 | REG_AH);
+ addbyte(count);
+ addbyte(0x41); /*MOV reg, EAX*/
+ addbyte(0x89);
+ addbyte(0xc0 | (REG_EAX << 3) | (reg & 7));
+ }
+ else
+ {
+ if (reg & 8)
+ addbyte(0x41);
+ addbyte(0xc0); /*SAR reg, count*/
+ addbyte(0xc0 | (reg & 7) | 0x38);
+ addbyte(count);
+ }
+}
+static inline void SAR_W_IMM(int reg, int count)
+{
+ addbyte(0x66); /*SAR reg, count*/
+ if (reg & 8)
+ addbyte(0x41);
+ addbyte(0xc1);
+ addbyte(0xc0 | (reg & 7) | 0x38);
+ addbyte(count);
+}
+static inline void SAR_L_IMM(int reg, int count)
+{
+ if (reg & 8)
+ addbyte(0x41);
+ addbyte(0xc1); /*SAR reg, count*/
+ addbyte(0xc0 | (reg & 7) | 0x38);
+ addbyte(count);
+}
+
+static inline void NEG_HOST_REG_B(int reg)
+{
+ if (reg & 0x10)
+ {
+ if (reg & 8)
+ addbyte(0x44);
+ addbyte(0x89); /*MOV BX, reg*/
+ addbyte(0xc3 | ((reg & 7) << 3));
+ addbyte(0xf6); /*NEG BH*/
+ addbyte(0xdf);
+ if (reg & 8)
+ addbyte(0x41);
+ addbyte(0x89); /*MOV reg, BX*/
+ addbyte(0xd8 | (reg & 7));
+ }
+ else
+ {
+ if (reg & 8)
+ addbyte(0x41);
+ addbyte(0xf6);
+ addbyte(0xd8 | (reg & 7));
+ }
+}
+static inline void NEG_HOST_REG_W(int reg)
+{
+ addbyte(0x66);
+ if (reg & 8)
+ addbyte(0x41);
+ addbyte(0xf7);
+ addbyte(0xd8 | (reg & 7));
+}
+static inline void NEG_HOST_REG_L(int reg)
+{
+ if (reg & 8)
+ addbyte(0x41);
+ addbyte(0xf7);
+ addbyte(0xd8 | (reg & 7));
+}
+
+
+static inline void FP_ENTER()
+{
+ if (codegen_fpu_entered)
+ return;
+ if (IS_32_ADDR(&cr0))
+ {
+ addbyte(0xf6); /*TEST cr0, 0xc*/
+ addbyte(0x04);
+ addbyte(0x25);
+ addlong((uintptr_t)&cr0);
+ addbyte(0x0c);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RAX, &cr0*/
+ addbyte(0xb8 | REG_EAX);
+ addquad((uint64_t)&cr0);
+ addbyte(0xf6); /*TEST [RAX], 0xc*/
+ addbyte(0 | (REG_EAX << 3));
+ addbyte(0x0c);
+ }
+ addbyte(0x74); /*JZ +*/
+ addbyte(7+5+12+5);
+ addbyte(0xC7); /*MOVL [oldpc],op_old_pc*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(oldpc));
+ addlong(op_old_pc);
+ load_param_1_32(&codeblock[block_current], 7);
+ CALL_FUNC((uintptr_t)x86_int);
+ addbyte(0xe9); /*JMP end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+
+ codegen_fpu_entered = 1;
+}
+
+static inline void FP_FXCH(int reg)
+{
+ addbyte(0x8b); /*MOV EAX, [TOP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV EBX, EAX*/
+ addbyte(0xc3);
+ addbyte(0x83); /*ADD EAX, reg*/
+ addbyte(0xc0);
+ addbyte(reg);
+
+ addbyte(0x48); /*MOV RDX, ST[RBX*8]*/
+ addbyte(0x8b);
+ addbyte(0x54);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x83); /*AND EAX, 7*/
+ addbyte(0xe0);
+ addbyte(0x07);
+ addbyte(0x48); /*MOV RCX, ST[RAX*8]*/
+ addbyte(0x8b);
+ addbyte(0x4c);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x48); /*MOV ST[RAX*8], RDX*/
+ addbyte(0x89);
+ addbyte(0x54);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x48); /*MOV ST[RBX*8], RCX*/
+ addbyte(0x89);
+ addbyte(0x4c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+
+ addbyte(0x8a); /*MOV CL, tag[EAX]*/
+ addbyte(0x4c);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag));
+ addbyte(0x8a); /*MOV DL, tag[EBX]*/
+ addbyte(0x54);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag));
+ addbyte(0x88); /*MOV tag[EBX], CL*/
+ addbyte(0x4c);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag));
+ addbyte(0x88); /*MOV tag[EAX], DL*/
+ addbyte(0x54);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag));
+
+ addbyte(0x48); /*MOV RDX, MM[RBX*8]*/
+ addbyte(0x8b);
+ addbyte(0x54);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(MM));
+ addbyte(0x48); /*MOV RCX, MM[RAX*8]*/
+ addbyte(0x8b);
+ addbyte(0x4c);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(MM));
+ addbyte(0x48); /*MOV MM[RAX*8], RDX*/
+ addbyte(0x89);
+ addbyte(0x54);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(MM));
+ addbyte(0x48); /*MOV MM[RBX*8], RCX*/
+ addbyte(0x89);
+ addbyte(0x4c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(MM));
+ reg = reg;
+}
+
+
+
+static inline void FP_FLD(int reg)
+{
+ addbyte(0x8b); /*MOV EAX, [TOP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV EBX, EAX*/
+ addbyte(0xc3);
+ if (reg)
+ {
+ addbyte(0x83); /*ADD EAX, reg*/
+ addbyte(0xc0);
+ addbyte(reg);
+ addbyte(0x83); /*SUB EBX, 1*/
+ addbyte(0xeb);
+ addbyte(0x01);
+ addbyte(0x83); /*AND EAX, 7*/
+ addbyte(0xe0);
+ addbyte(0x07);
+ }
+ else
+ {
+ addbyte(0x83); /*SUB EBX, 1*/
+ addbyte(0xeb);
+ addbyte(0x01);
+ }
+
+ addbyte(0x48); /*MOV RCX, ST[EAX*8]*/
+ addbyte(0x8b);
+ addbyte(0x4c);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe3);
+ addbyte(0x07);
+ addbyte(0x48); /*MOV RDX, ST_i64[EAX*8]*/
+ addbyte(0x8b);
+ addbyte(0x54);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(MM));
+ addbyte(0x8a); /*MOV AL, [tag+EAX]*/
+ addbyte(0x44);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag));
+ addbyte(0x48); /*MOV ST[EBX*8], RCX*/
+ addbyte(0x89);
+ addbyte(0x4c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x48); /*MOV ST_i64[EBX*8], RDX*/
+ addbyte(0x89);
+ addbyte(0x54);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(MM));
+ addbyte(0x88); /*MOV [tag+EBX], AL*/
+ addbyte(0x44);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag));
+
+ addbyte(0x89); /*MOV [TOP], EBX*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+}
+
+static inline void FP_FST(int reg)
+{
+ addbyte(0x8b); /*MOV EAX, [TOP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x48); /*MOV RCX, ST[EAX*8]*/
+ addbyte(0x8b);
+ addbyte(0x4c);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x8a); /*MOV BL, [tag+EAX]*/
+ addbyte(0x5c);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag));
+
+ if (reg)
+ {
+ addbyte(0x83); /*ADD EAX, reg*/
+ addbyte(0xc0);
+ addbyte(reg);
+ addbyte(0x83); /*AND EAX, 7*/
+ addbyte(0xe0);
+ addbyte(0x07);
+ }
+
+ addbyte(0x48); /*MOV ST[EAX*8], RCX*/
+ addbyte(0x89);
+ addbyte(0x4c);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x88); /*MOV [tag+EAX], BL*/
+ addbyte(0x5c);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag));
+}
+
+static inline void FP_POP()
+{
+ addbyte(0x8b); /*MOV EAX, [TOP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0xc6); /*MOVB tag[EAX], 3*/
+ addbyte(0x44);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag));
+ addbyte(3);
+ addbyte(0x83); /*ADD AL, 1*/
+ addbyte(0xc0);
+ addbyte(1);
+ addbyte(0x83); /*AND AL, 7*/
+ addbyte(0xe0);
+ addbyte(7);
+ addbyte(0x89); /*MOV [TOP], EAX*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+}
+static inline void FP_POP2()
+{
+ addbyte(0x8b); /*MOV EAX, [TOP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0xc6); /*MOVB tag[EAX], 3*/
+ addbyte(0x44);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag));
+ addbyte(3);
+ addbyte(0x83); /*ADD AL, 2*/
+ addbyte(0xc0);
+ addbyte(2);
+ addbyte(0x83); /*AND AL, 7*/
+ addbyte(0xe0);
+ addbyte(7);
+ addbyte(0x89); /*MOV [TOP], EAX*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+}
+
+static inline void FP_LOAD_S()
+{
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x66); /*MOVD XMM0, EAX*/
+ addbyte(0x0f);
+ addbyte(0x6e);
+ addbyte(0xc0);
+ addbyte(0x83); /*SUB EBX, 1*/
+ addbyte(0xeb);
+ addbyte(0x01);
+ addbyte(0xf3); /*CVTSS2SD XMM0, XMM0*/
+ addbyte(0x0f);
+ addbyte(0x5a);
+ addbyte(0xc0);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe3);
+ addbyte(7);
+ addbyte(0x85); /*TEST EAX, EAX*/
+ addbyte(0xc0);
+ addbyte(0x89); /*MOV TOP, EBX*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x66); /*MOVQ [ST+EBX*8], XMM0*/
+ addbyte(0x0f);
+ addbyte(0xd6);
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x0f); /*SETE [tag+EBX]*/
+ addbyte(0x94);
+ addbyte(0x44);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag));
+}
+static inline void FP_LOAD_D()
+{
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x83); /*SUB EBX, 1*/
+ addbyte(0xeb);
+ addbyte(0x01);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe3);
+ addbyte(7);
+ addbyte(0x48); /*TEST RAX, RAX*/
+ addbyte(0x85);
+ addbyte(0xc0);
+ addbyte(0x89); /*MOV TOP, EBX*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x48); /*MOVQ [ST+EBX*8], RAX*/
+ addbyte(0x89);
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x0f); /*SETE [tag+EBX]*/
+ addbyte(0x94);
+ addbyte(0x44);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag));
+}
+
+static inline void FP_LOAD_IW()
+{
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x0f); /*MOVSX EAX, AX*/
+ addbyte(0xbf);
+ addbyte(0xc0);
+ addbyte(0x83); /*SUB EBX, 1*/
+ addbyte(0xeb);
+ addbyte(0x01);
+ addbyte(0xf2); /*CVTSI2SD XMM0, EAX*/
+ addbyte(0x0f);
+ addbyte(0x2a);
+ addbyte(0xc0);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe3);
+ addbyte(7);
+ addbyte(0x85); /*TEST EAX, EAX*/
+ addbyte(0xc0);
+ addbyte(0x89); /*MOV TOP, EBX*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x66); /*MOVQ [ST+EBX*8], XMM0*/
+ addbyte(0x0f);
+ addbyte(0xd6);
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x0f); /*SETE [tag+EBX]*/
+ addbyte(0x94);
+ addbyte(0x44);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag));
+}
+static inline void FP_LOAD_IL()
+{
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x83); /*SUB EBX, 1*/
+ addbyte(0xeb);
+ addbyte(0x01);
+ addbyte(0xf2); /*CVTSI2SD XMM0, EAX*/
+ addbyte(0x0f);
+ addbyte(0x2a);
+ addbyte(0xc0);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe3);
+ addbyte(7);
+ addbyte(0x85); /*TEST EAX, EAX*/
+ addbyte(0xc0);
+ addbyte(0x89); /*MOV TOP, EBX*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x66); /*MOVQ [ST+EBX*8], XMM0*/
+ addbyte(0x0f);
+ addbyte(0xd6);
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x0f); /*SETE [tag+EBX]*/
+ addbyte(0x94);
+ addbyte(0x44);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag));
+}
+static inline void FP_LOAD_IQ()
+{
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x83); /*SUB EBX, 1*/
+ addbyte(0xeb);
+ addbyte(0x01);
+ addbyte(0xf2); /*CVTSI2SDQ XMM0, RAX*/
+ addbyte(0x48);
+ addbyte(0x0f);
+ addbyte(0x2a);
+ addbyte(0xc0);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe3);
+ addbyte(7);
+ addbyte(0x48); /*TEST RAX, RAX*/
+ addbyte(0x85);
+ addbyte(0xc0);
+ addbyte(0x48); /*MOV [ST_i64+EBX*8], RAX*/
+ addbyte(0x89);
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(MM));
+ addbyte(0x89); /*MOV TOP, EBX*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x0f); /*SETE AL*/
+ addbyte(0x94);
+ addbyte(0xc0);
+ addbyte(0x66); /*MOVQ [ST+EBX*8], XMM0*/
+ addbyte(0x0f);
+ addbyte(0xd6);
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x0c); /*OR AL, TAG_UINT64*/
+ addbyte(TAG_UINT64);
+ addbyte(0x88); /*MOV [tag+EBX], AL*/
+ addbyte(0x44);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag));
+}
+
+static inline void FP_LOAD_IMM_Q(uint64_t v)
+{
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x83); /*SUB EBX, 1*/
+ addbyte(0xeb);
+ addbyte(0x01);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe3);
+ addbyte(7);
+ addbyte(0xc7); /*MOV ST[EBP+EBX*8], v*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addlong(v & 0xffffffff);
+ addbyte(0xc7); /*MOV ST[EBP+EBX*8]+4, v*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST) + 4);
+ addlong(v >> 32);
+ addbyte(0x89); /*MOV TOP, EBX*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0xc6); /*MOV [tag+EBX], (v ? 0 : 1)*/
+ addbyte(0x44);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag));
+ addbyte(v ? 0 : 1);
+}
+
+static inline void FP_FCHS()
+{
+ addbyte(0x8b); /*MOV EAX, TOP*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0xf2); /*SUBSD XMM0, XMM0*/
+ addbyte(0x0f);
+ addbyte(0x5c);
+ addbyte(0xc0);
+ addbyte(0xf2); /*SUBSD XMM0, ST[EAX*8]*/
+ addbyte(0x0f);
+ addbyte(0x5c);
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x80); /*AND tag[EAX], ~TAG_UINT64*/
+ addbyte(0x64);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(~TAG_UINT64);
+ addbyte(0xf2); /*MOVSD ST[EAX*8], XMM0*/
+ addbyte(0x0f);
+ addbyte(0x11);
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+}
+
+static inline int FP_LOAD_REG(int reg)
+{
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ if (reg)
+ {
+ addbyte(0x83); /*ADD EBX, reg*/
+ addbyte(0xc0 | REG_EBX);
+ addbyte(reg);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe0 | REG_EBX);
+ addbyte(0x07);
+ }
+ addbyte(0xf3); /*MOVQ XMM0, ST[EBX*8]*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0xf2); /*CVTSD2SS XMM0, XMM0*/
+ addbyte(0x0f);
+ addbyte(0x5a);
+ addbyte(0xc0);
+ addbyte(0x66); /*MOVD EBX, XMM0*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0xc0 | REG_EBX);
+
+ return REG_EBX;
+}
+static inline void FP_LOAD_REG_D(int reg, int *host_reg1, int *host_reg2)
+{
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ if (reg)
+ {
+ addbyte(0x83); /*ADD EBX, reg*/
+ addbyte(0xc0 | REG_EBX);
+ addbyte(reg);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe0 | REG_EBX);
+ addbyte(0x07);
+ }
+ addbyte(0x48); /*MOV RBX, ST[EBX*8]*/
+ addbyte(0x8b);
+ addbyte(0x5c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+
+ *host_reg1 = REG_EBX;
+}
+static inline int64_t x87_fround(double b)
+{
+ int64_t a, c;
+
+ switch ((cpu_state.npxc >> 10) & 3)
+ {
+ case 0: /*Nearest*/
+ a = (int64_t)floor(b);
+ c = (int64_t)floor(b + 1.0);
+ if ((b - a) < (c - b))
+ return a;
+ else if ((b - a) > (c - b))
+ return c;
+ else
+ return (a & 1) ? c : a;
+ case 1: /*Down*/
+ return (int64_t)floor(b);
+ case 2: /*Up*/
+ return (int64_t)ceil(b);
+ case 3: /*Chop*/
+ return (int64_t)b;
+ }
+
+ return 0;
+}
+static inline int FP_LOAD_REG_INT_W(int reg)
+{
+ addbyte(0x89); /*MOV EBX, EAX*/
+ addbyte(0xc3);
+
+ addbyte(0x8b); /*MOV EAX, [TOP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ if (reg)
+ {
+ addbyte(0x83); /*ADD EAX, reg*/
+ addbyte(0xc0);
+ addbyte(reg);
+ addbyte(0x83); /*AND EAX, 7*/
+ addbyte(0xe0);
+ addbyte(7);
+ }
+ addbyte(0xf3); /*MOVQ XMM0, ST[EAX*8]*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+
+ CALL_FUNC((uintptr_t)x87_fround);
+
+ addbyte(0x93); /*XCHG EBX, EAX*/
+
+ return REG_EBX;
+}
+static inline int FP_LOAD_REG_INT(int reg)
+{
+ addbyte(0x89); /*MOV EBX, EAX*/
+ addbyte(0xc3);
+
+ addbyte(0x8b); /*MOV EAX, [TOP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ if (reg)
+ {
+ addbyte(0x83); /*ADD EAX, reg*/
+ addbyte(0xc0);
+ addbyte(reg);
+ addbyte(0x83); /*AND EAX, 7*/
+ addbyte(0xe0);
+ addbyte(7);
+ }
+ addbyte(0xf3); /*MOVQ XMM0, ST[EAX*8]*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+
+ CALL_FUNC((uintptr_t)x87_fround);
+
+ addbyte(0x93); /*XCHG EBX, EAX*/
+
+ return REG_EBX;
+}
+static inline void FP_LOAD_REG_INT_Q(int reg, int *host_reg1, int *host_reg2)
+{
+ addbyte(0x89); /*MOV EBX, EAX*/
+ addbyte(0xc3);
+
+ addbyte(0x8b); /*MOV EAX, [TOP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ if (reg)
+ {
+ addbyte(0x83); /*ADD EAX, reg*/
+ addbyte(0xc0);
+ addbyte(reg);
+ addbyte(0x83); /*AND EAX, 7*/
+ addbyte(0xe0);
+ addbyte(7);
+ }
+
+ if (codegen_fpu_loaded_iq[cpu_state.TOP] && (cpu_state.tag[cpu_state.TOP] & TAG_UINT64))
+ {
+ /*If we know the register was loaded with FILDq in this block and
+ has not been modified, then we can skip most of the conversion
+ and just load the 64-bit integer representation directly */
+ addbyte(0x48); /*MOV RAX, [ST_i64+EAX*8]*/
+ addbyte(0x8b);
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(MM));
+
+ addbyte(0x48); /*XCHG RBX, RAX*/
+ addbyte(0x93);
+
+ *host_reg1 = REG_EBX;
+
+ return;
+ }
+
+ addbyte(0xf6); /*TEST TAG[EAX], TAG_UINT64*/
+ addbyte(0x44);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag));
+ addbyte(TAG_UINT64);
+
+ addbyte(0x74); /*JZ +*/
+ addbyte(5+2);
+
+ addbyte(0x48); /*MOV RAX, [ST_i64+EAX*8]*/
+ addbyte(0x8b);
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(MM));
+
+ addbyte(0xeb); /*JMP done*/
+ addbyte(6+12);
+
+ addbyte(0xf3); /*MOVQ XMM0, ST[EAX*8]*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+
+ CALL_FUNC((uintptr_t)x87_fround);
+
+ addbyte(0x48); /*XCHG RBX, RAX*/
+ addbyte(0x93);
+
+ *host_reg1 = REG_EBX;
+}
+
+#define FPU_ADD 0
+#define FPU_DIV 4
+#define FPU_DIVR 5
+#define FPU_MUL 1
+#define FPU_SUB 2
+#define FPU_SUBR 3
+
+static inline void FP_OP_REG(int op, int dst, int src)
+{
+ addbyte(0x8b); /*MOV EAX, [TOP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV EBX, EAX*/
+ addbyte(0xc3);
+ if (dst)
+ {
+ addbyte(0x83); /*ADD EAX, reg*/
+ addbyte(0xc0);
+ addbyte(dst);
+ addbyte(0x83); /*AND EAX, 7*/
+ addbyte(0xe0);
+ addbyte(0x07);
+ }
+ if (src)
+ {
+ addbyte(0x83); /*ADD EBX, reg*/
+ addbyte(0xc0 | REG_EBX);
+ addbyte(src);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe0 | REG_EBX);
+ addbyte(0x07);
+ }
+ addbyte(0x80); /*AND tag[EAX], ~TAG_UINT64*/
+ addbyte(0x64);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag));
+ addbyte(~TAG_UINT64);
+ if (op == FPU_DIVR || op == FPU_SUBR)
+ {
+ addbyte(0xf3); /*MOVQ XMM0, ST[RBX*8]*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ }
+ else
+ {
+ addbyte(0xf3); /*MOVQ XMM0, ST[RAX*8]*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ }
+ switch (op)
+ {
+ case FPU_ADD:
+ addbyte(0xf2); /*ADDSD XMM0, ST[RBX*8]*/
+ addbyte(0x0f);
+ addbyte(0x58);
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ break;
+ case FPU_DIV:
+ addbyte(0xf2); /*DIVSD XMM0, ST[RBX*8]*/
+ addbyte(0x0f);
+ addbyte(0x5e);
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ break;
+ case FPU_DIVR:
+ addbyte(0xf2); /*DIVSD XMM0, ST[RAX*8]*/
+ addbyte(0x0f);
+ addbyte(0x5e);
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ break;
+ case FPU_MUL:
+ addbyte(0xf2); /*MULSD XMM0, ST[RBX*8]*/
+ addbyte(0x0f);
+ addbyte(0x59);
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ break;
+ case FPU_SUB:
+ addbyte(0xf2); /*SUBSD XMM0, ST[RBX*8]*/
+ addbyte(0x0f);
+ addbyte(0x5c);
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ break;
+ case FPU_SUBR:
+ addbyte(0xf2); /*SUBSD XMM0, ST[RAX*8]*/
+ addbyte(0x0f);
+ addbyte(0x5c);
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ break;
+ }
+ addbyte(0x66); /*MOVQ [RSI+RAX*8], XMM0*/
+ addbyte(0x0f);
+ addbyte(0xd6);
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+}
+
+static inline void FP_OP_MEM(int op)
+{
+ addbyte(0x8b); /*MOV EAX, [TOP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0xf3); /*MOVQ XMM0, ST[RAX*8]*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x80); /*AND tag[EAX], ~TAG_UINT64*/
+ addbyte(0x64);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag));
+ addbyte(~TAG_UINT64);
+
+ switch (op)
+ {
+ case FPU_ADD:
+ addbyte(0xf2); /*ADDSD XMM0, XMM1*/
+ addbyte(0x0f);
+ addbyte(0x58);
+ addbyte(0xc1);
+ break;
+ case FPU_DIV:
+ addbyte(0xf2); /*DIVSD XMM0, XMM1*/
+ addbyte(0x0f);
+ addbyte(0x5e);
+ addbyte(0xc1);
+ break;
+ case FPU_DIVR:
+ addbyte(0xf2); /*DIVSD XMM1, XMM0*/
+ addbyte(0x0f);
+ addbyte(0x5e);
+ addbyte(0xc8);
+ break;
+ case FPU_MUL:
+ addbyte(0xf2); /*MULSD XMM0, XMM1*/
+ addbyte(0x0f);
+ addbyte(0x59);
+ addbyte(0xc1);
+ break;
+ case FPU_SUB:
+ addbyte(0xf2); /*SUBSD XMM0, XMM1*/
+ addbyte(0x0f);
+ addbyte(0x5c);
+ addbyte(0xc1);
+ break;
+ case FPU_SUBR:
+ addbyte(0xf2); /*SUBSD XMM1, XMM0*/
+ addbyte(0x0f);
+ addbyte(0x5c);
+ addbyte(0xc8);
+ break;
+ }
+ if (op == FPU_DIVR || op == FPU_SUBR)
+ {
+ addbyte(0x66); /*MOVQ ST[RAX*8], XMM1*/
+ addbyte(0x0f);
+ addbyte(0xd6);
+ addbyte(0x4c);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ }
+ else
+ {
+ addbyte(0x66); /*MOVQ ST[RAX*8], XMM0*/
+ addbyte(0x0f);
+ addbyte(0xd6);
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ }
+}
+
+static inline void FP_OP_S(int op)
+{
+ addbyte(0x66); /*MOVD XMM1, EAX*/
+ addbyte(0x0f);
+ addbyte(0x6e);
+ addbyte(0xc8);
+ addbyte(0xf3); /*CVTSS2SD XMM1, XMM1*/
+ addbyte(0x0f);
+ addbyte(0x5a);
+ addbyte(0xc9);
+ FP_OP_MEM(op);
+}
+static inline void FP_OP_D(int op)
+{
+ addbyte(0x66); /*MOVQ XMM1, RAX*/
+ addbyte(0x48);
+ addbyte(0x0f);
+ addbyte(0x6e);
+ addbyte(0xc8);
+ if (((cpu_state.npxc >> 10) & 3) && op == FPU_ADD)
+ {
+ addbyte(0x0f); /*STMXCSR [ESP+8]*/
+ addbyte(0xae);
+ addbyte(0x5c);
+ addbyte(0x24);
+ addbyte(0x08);
+ addbyte(0x8b); /*MOV EAX, [ESP+8]*/
+ addbyte(0x44);
+ addbyte(0x24);
+ addbyte(0x08);
+ addbyte(0x25); /*AND EAX, ~(3 << 13)*/
+ addlong(~(3 << 10));
+ addbyte(0x0d); /*OR EAX, (npxc & (3 << 10)) << 3*/
+ addlong((cpu_state.npxc & (3 << 10)) << 3);
+ addbyte(0x89); /*MOV [RSP+12], EAX*/
+ addbyte(0x44);
+ addbyte(0x24);
+ addbyte(0x0c);
+ addbyte(0x0f); /*LDMXCSR [RSP+12]*/
+ addbyte(0xae);
+ addbyte(0x54);
+ addbyte(0x24);
+ addbyte(0x0c);
+ }
+ FP_OP_MEM(op);
+ if (((cpu_state.npxc >> 10) & 3) && op == FPU_ADD)
+ {
+ addbyte(0x0f); /*LDMXCSR [RSP+8]*/
+ addbyte(0xae);
+ addbyte(0x54);
+ addbyte(0x24);
+ addbyte(0x08);
+ }
+}
+static inline void FP_OP_IW(int op)
+{
+ addbyte(0x0f); /*MOVSX EAX, AX*/
+ addbyte(0xbf);
+ addbyte(0xc0);
+ addbyte(0xf2); /*CVTSI2SD XMM1, EAX*/
+ addbyte(0x0f);
+ addbyte(0x2a);
+ addbyte(0xc8);
+ FP_OP_MEM(op);
+}
+static inline void FP_OP_IL(int op)
+{
+ addbyte(0xf2); /*CVTSI2SD XMM1, EAX*/
+ addbyte(0x0f);
+ addbyte(0x2a);
+ addbyte(0xc8);
+ FP_OP_MEM(op);
+}
+
+#define C0 (1<<8)
+#define C1 (1<<9)
+#define C2 (1<<10)
+#define C3 (1<<14)
+
+static inline void FP_COMPARE_REG(int dst, int src)
+{
+ addbyte(0x8b); /*MOV EAX, [TOP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV EBX, EAX*/
+ addbyte(0xc3);
+ if (src || dst)
+ {
+ addbyte(0x83); /*ADD EAX, 1*/
+ addbyte(0xc0);
+ addbyte(src ? src : dst);
+ addbyte(0x83); /*AND EAX, 7*/
+ addbyte(0xe0);
+ addbyte(7);
+ }
+
+ addbyte(0x8a); /*MOV CL, [npxs+1]*/
+ addbyte(0x4d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+// addbyte(0xdb); /*FCLEX*/
+// addbyte(0xe2);
+ addbyte(0x80); /*AND CL, ~(C0|C2|C3)*/
+ addbyte(0xe1);
+ addbyte((~(C0|C2|C3)) >> 8);
+
+ if (src)
+ {
+ addbyte(0xf3); /*MOVQ XMM0, ST[RBX*8]*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x66); /*COMISD XMM0, ST[RAX*8]*/
+ addbyte(0x0f);
+ addbyte(0x2f);
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ }
+ else
+ {
+ addbyte(0xf3); /*MOVQ XMM0, ST[RAX*8]*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x66); /*COMISD XMM0, ST[RBX*8]*/
+ addbyte(0x0f);
+ addbyte(0x2f);
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ }
+
+ addbyte(0x9f); /*LAHF*/
+ addbyte(0x80); /*AND AH, (C0|C2|C3)*/
+ addbyte(0xe4);
+ addbyte((C0|C2|C3) >> 8);
+ addbyte(0x08); /*OR CL, AH*/
+ addbyte(0xe1);
+ addbyte(0x88); /*MOV [npxs+1], CL*/
+ addbyte(0x4d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+}
+
+static inline void FP_COMPARE_MEM()
+{
+ addbyte(0x8b); /*MOV EAX, [TOP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+
+ addbyte(0x8a); /*MOV CL, [npxs+1]*/
+ addbyte(0x4d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+// addbyte(0xdb); /*FCLEX*/
+// addbyte(0xe2);
+ addbyte(0xf3); /*MOVQ XMM0, ST[RAX*8]*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x80); /*AND CL, ~(C0|C2|C3)*/
+ addbyte(0xe1);
+ addbyte((~(C0|C2|C3)) >> 8);
+ addbyte(0x66); /*COMISD XMM0, XMM1*/
+ addbyte(0x0f);
+ addbyte(0x2f);
+ addbyte(0xc1);
+ addbyte(0x9f); /*LAHF*/
+ addbyte(0x80); /*AND AH, (C0|C2|C3)*/
+ addbyte(0xe4);
+ addbyte((C0|C2|C3) >> 8);
+ addbyte(0x08); /*OR CL, AH*/
+ addbyte(0xe1);
+ addbyte(0x88); /*MOV [npxs+1], CL*/
+ addbyte(0x4d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+}
+static inline void FP_COMPARE_S()
+{
+ addbyte(0x66); /*MOVD XMM1, EAX*/
+ addbyte(0x0f);
+ addbyte(0x6e);
+ addbyte(0xc8);
+ addbyte(0xf3); /*CVTSS2SD XMM1, XMM1*/
+ addbyte(0x0f);
+ addbyte(0x5a);
+ addbyte(0xc9);
+ FP_COMPARE_MEM();
+}
+static inline void FP_COMPARE_D()
+{
+ addbyte(0x66); /*MOVQ XMM1, RAX*/
+ addbyte(0x48);
+ addbyte(0x0f);
+ addbyte(0x6e);
+ addbyte(0xc8);
+ FP_COMPARE_MEM();
+}
+static inline void FP_COMPARE_IW()
+{
+ addbyte(0x0f); /*MOVSX EAX, AX*/
+ addbyte(0xbf);
+ addbyte(0xc0);
+ addbyte(0xf2); /*CVTSI2SD XMM1, EAX*/
+ addbyte(0x0f);
+ addbyte(0x2a);
+ addbyte(0xc8);
+ FP_COMPARE_MEM();
+}
+static inline void FP_COMPARE_IL()
+{
+ addbyte(0xf2); /*CVTSI2SD XMM1, EAX*/
+ addbyte(0x0f);
+ addbyte(0x2a);
+ addbyte(0xc8);
+ FP_COMPARE_MEM();
+}
+
+static inline void UPDATE_NPXC(int reg)
+{
+}
+
+static inline void SET_BITS(uintptr_t addr, uint32_t val)
+{
+ if (IS_32_ADDR(addr))
+ {
+ if (val & ~0xff)
+ {
+ addbyte(0x81); /*OR [addr], val*/
+ addbyte(0x0c);
+ addbyte(0x25);
+ addlong(addr);
+ addlong(val);
+ }
+ else
+ {
+ addbyte(0x80); /*OR [addr], val*/
+ addbyte(0x0c);
+ addbyte(0x25);
+ addlong(addr);
+ addbyte(val);
+ }
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RAX, &addr*/
+ addbyte(0xb8 | REG_EAX);
+ addquad(addr);
+ if (val & ~0xff)
+ {
+ addbyte(0x81); /*OR [RAX], val*/
+ addbyte(0x08);
+ addlong(val);
+ }
+ else
+ {
+ addbyte(0x80); /*OR [RAX], val*/
+ addbyte(0x08);
+ addbyte(val);
+ }
+ }
+}
+
+static inline void CLEAR_BITS(uintptr_t addr, uint32_t val)
+{
+ if (IS_32_ADDR(addr))
+ {
+ if (val & ~0xff)
+ {
+ addbyte(0x81); /*AND [addr], val*/
+ addbyte(0x24);
+ addbyte(0x25);
+ addlong(addr);
+ addlong(~val);
+ }
+ else
+ {
+ addbyte(0x80); /*AND [addr], val*/
+ addbyte(0x24);
+ addbyte(0x25);
+ addlong(addr);
+ addbyte(~val);
+ }
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RAX, &addr*/
+ addbyte(0xb8 | REG_EAX);
+ addquad(addr);
+ if (val & ~0xff)
+ {
+ addbyte(0x81); /*AND [RAX], val*/
+ addbyte(0x20);
+ addlong(~val);
+ }
+ else
+ {
+ addbyte(0x80); /*AND [RAX], val*/
+ addbyte(0x20);
+ addbyte(~val);
+ }
+ }
+}
+
+#define LOAD_Q_REG_1 REG_EAX
+#define LOAD_Q_REG_2 REG_EDX
+
+static inline void MMX_ENTER()
+{
+ if (codegen_mmx_entered)
+ return;
+
+ if (IS_32_ADDR(&cr0))
+ {
+ addbyte(0xf6); /*TEST cr0, 0xc*/
+ addbyte(0x04);
+ addbyte(0x25);
+ addlong((uintptr_t)&cr0);
+ addbyte(0x0c);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RAX, &cr0*/
+ addbyte(0xb8 | REG_EAX);
+ addquad((uint64_t)&cr0);
+ addbyte(0xf6); /*TEST [RAX], 0xc*/
+ addbyte(0 | (REG_EAX << 3));
+ addbyte(0x0c);
+ }
+ addbyte(0x74); /*JZ +*/
+ addbyte(7+5+12+5);
+ addbyte(0xC7); /*MOVL [oldpc],op_old_pc*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(oldpc));
+ addlong(op_old_pc);
+ load_param_1_32(&codeblock[block_current], 7);
+ CALL_FUNC((uintptr_t)x86_int);
+ addbyte(0xe9); /*JMP end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+
+
+ addbyte(0x31); /*XOR EAX, EAX*/
+ addbyte(0xc0);
+ addbyte(0xc6); /*MOV ISMMX, 1*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ismmx));
+ addbyte(1);
+ addbyte(0x89); /*MOV TOP, EAX*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV tag, EAX*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(0x89); /*MOV tag+4, EAX*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(tag[4]));
+
+ codegen_mmx_entered = 1;
+}
+
+extern int mmx_ebx_ecx_loaded;
+
+static inline int LOAD_MMX_D(int guest_reg)
+{
+ int host_reg = REG_EBX;
+
+ addbyte(0x8b); /*MOV EBX, reg*/
+ addbyte(0x44 | (host_reg << 3));
+ addbyte(0x25);
+ addbyte((uint8_t)cpu_state_offset(MM[guest_reg].l[0]));
+
+ return host_reg;
+}
+static inline void LOAD_MMX_Q(int guest_reg, int *host_reg1, int *host_reg2)
+{
+ int host_reg = REG_EBX;
+
+ if (host_reg & 8)
+ addbyte(0x4c);
+ else
+ addbyte(0x48);
+ addbyte(0x8b); /*MOV RBX, reg*/
+ addbyte(0x44 | ((host_reg & 7) << 3));
+ addbyte(0x25);
+ addbyte((uint8_t)cpu_state_offset(MM[guest_reg].q));
+
+ *host_reg1 = host_reg;
+}
+static inline int LOAD_MMX_Q_MMX(int guest_reg)
+{
+ int dst_reg = find_host_xmm_reg();
+ host_reg_xmm_mapping[dst_reg] = 100;
+
+ addbyte(0xf3); /*MOV XMMx, reg*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0x44 | ((dst_reg & 7) << 3));
+ addbyte(0x25);
+ addbyte((uint8_t)cpu_state_offset(MM[guest_reg].q));
+
+ return dst_reg;
+}
+
+static inline int LOAD_INT_TO_MMX(int src_reg1, int src_reg2)
+{
+ int dst_reg = find_host_xmm_reg();
+ host_reg_xmm_mapping[dst_reg] = 100;
+
+ addbyte(0x66); /*MOVQ host_reg, src_reg1*/
+ if (src_reg1 & 8)
+ addbyte(0x49);
+ else
+ addbyte(0x48);
+ addbyte(0x0f);
+ addbyte(0x6e);
+ addbyte(0xc0 | (dst_reg << 3) | (src_reg1 & 7));
+
+ return dst_reg;
+}
+
+static inline void STORE_MMX_LQ(int guest_reg, int host_reg1)
+{
+ addbyte(0xC7); /*MOVL [reg],0*/
+ addbyte(0x44);
+ addbyte(0x25);
+ addbyte((uint8_t)cpu_state_offset(MM[guest_reg].l[1]));
+ addlong(0);
+ if (host_reg1 & 8)
+ addbyte(0x44);
+ addbyte(0x89); /*MOVL [reg],host_reg*/
+ addbyte(0x44 | ((host_reg1 & 7) << 3));
+ addbyte(0x25);
+ addbyte((uint8_t)cpu_state_offset(MM[guest_reg].l[0]));
+}
+static inline void STORE_MMX_Q(int guest_reg, int host_reg1, int host_reg2)
+{
+ if (host_reg1 & 8)
+ addbyte(0x4c);
+ else
+ addbyte(0x48);
+ addbyte(0x89); /*MOV [reg],host_reg*/
+ addbyte(0x44 | ((host_reg1 & 7) << 3));
+ addbyte(0x25);
+ addbyte((uint8_t)cpu_state_offset(MM[guest_reg].l[0]));
+}
+static inline void STORE_MMX_Q_MMX(int guest_reg, int host_reg)
+{
+ addbyte(0x66); /*MOVQ [guest_reg],host_reg*/
+ addbyte(0x0f);
+ addbyte(0xd6);
+ addbyte(0x44 | (host_reg << 3));
+ addbyte(0x25);
+ addbyte((uint8_t)cpu_state_offset(MM[guest_reg].q));
+}
+
+#define MMX_x86_OP(name, opcode) \
+static inline void MMX_ ## name(int dst_reg, int src_reg) \
+{ \
+ addbyte(0x66); /*op dst_reg, src_reg*/ \
+ addbyte(0x0f); \
+ addbyte(opcode); \
+ addbyte(0xc0 | (dst_reg << 3) | src_reg); \
+}
+
+MMX_x86_OP(AND, 0xdb)
+MMX_x86_OP(ANDN, 0xdf)
+MMX_x86_OP(OR, 0xeb)
+MMX_x86_OP(XOR, 0xef)
+
+MMX_x86_OP(ADDB, 0xfc)
+MMX_x86_OP(ADDW, 0xfd)
+MMX_x86_OP(ADDD, 0xfe)
+MMX_x86_OP(ADDSB, 0xec)
+MMX_x86_OP(ADDSW, 0xed)
+MMX_x86_OP(ADDUSB, 0xdc)
+MMX_x86_OP(ADDUSW, 0xdd)
+
+MMX_x86_OP(SUBB, 0xf8)
+MMX_x86_OP(SUBW, 0xf9)
+MMX_x86_OP(SUBD, 0xfa)
+MMX_x86_OP(SUBSB, 0xe8)
+MMX_x86_OP(SUBSW, 0xe9)
+MMX_x86_OP(SUBUSB, 0xd8)
+MMX_x86_OP(SUBUSW, 0xd9)
+
+MMX_x86_OP(PUNPCKLBW, 0x60);
+MMX_x86_OP(PUNPCKLWD, 0x61);
+MMX_x86_OP(PUNPCKLDQ, 0x62);
+MMX_x86_OP(PCMPGTB, 0x64);
+MMX_x86_OP(PCMPGTW, 0x65);
+MMX_x86_OP(PCMPGTD, 0x66);
+
+MMX_x86_OP(PCMPEQB, 0x74);
+MMX_x86_OP(PCMPEQW, 0x75);
+MMX_x86_OP(PCMPEQD, 0x76);
+
+MMX_x86_OP(PSRLW, 0xd1);
+MMX_x86_OP(PSRLD, 0xd2);
+MMX_x86_OP(PSRLQ, 0xd3);
+MMX_x86_OP(PSRAW, 0xe1);
+MMX_x86_OP(PSRAD, 0xe2);
+MMX_x86_OP(PSLLW, 0xf1);
+MMX_x86_OP(PSLLD, 0xf2);
+MMX_x86_OP(PSLLQ, 0xf3);
+
+MMX_x86_OP(PMULLW, 0xd5);
+MMX_x86_OP(PMULHW, 0xe5);
+MMX_x86_OP(PMADDWD, 0xf5);
+
+static inline void MMX_PACKSSWB(int dst_reg, int src_reg)
+{
+ addbyte(0x66); /*PACKSSWB dst_reg, src_reg*/
+ addbyte(0x0f);
+ addbyte(0x63);
+ addbyte(0xc0 | (dst_reg << 3) | src_reg);
+ addbyte(0x66); /*PSHUFD dst_reg, dst_reg*/
+ addbyte(0x0f);
+ addbyte(0x70);
+ addbyte(0xc0 | (dst_reg << 3) | dst_reg);
+ addbyte(0x08);
+}
+static inline void MMX_PACKUSWB(int dst_reg, int src_reg)
+{
+ addbyte(0x66); /*PACKUSWB dst_reg, src_reg*/
+ addbyte(0x0f);
+ addbyte(0x67);
+ addbyte(0xc0 | (dst_reg << 3) | src_reg);
+ addbyte(0x66); /*PSHUFD dst_reg, dst_reg*/
+ addbyte(0x0f);
+ addbyte(0x70);
+ addbyte(0xc0 | (dst_reg << 3) | dst_reg);
+ addbyte(0x08);
+}
+static inline void MMX_PACKSSDW(int dst_reg, int src_reg)
+{
+ addbyte(0x66); /*PACKSSDW dst_reg, src_reg*/
+ addbyte(0x0f);
+ addbyte(0x6b);
+ addbyte(0xc0 | (dst_reg << 3) | src_reg);
+ addbyte(0x66); /*PSHUFD dst_reg, dst_reg*/
+ addbyte(0x0f);
+ addbyte(0x70);
+ addbyte(0xc0 | (dst_reg << 3) | dst_reg);
+ addbyte(0x08);
+}
+static inline void MMX_PUNPCKHBW(int dst_reg, int src_reg)
+{
+ addbyte(0x66); /*PUNPCKLBW dst_reg, src_reg*/
+ addbyte(0x0f);
+ addbyte(0x60);
+ addbyte(0xc0 | (dst_reg << 3) | src_reg);
+ addbyte(0x66); /*PSHUFD dst_reg, dst_reg*/
+ addbyte(0x0f);
+ addbyte(0x70);
+ addbyte(0xc0 | (dst_reg << 3) | dst_reg);
+ addbyte(0x0e);
+}
+static inline void MMX_PUNPCKHWD(int dst_reg, int src_reg)
+{
+ addbyte(0x66); /*PUNPCKLWD dst_reg, src_reg*/
+ addbyte(0x0f);
+ addbyte(0x61);
+ addbyte(0xc0 | (dst_reg << 3) | src_reg);
+ addbyte(0x66); /*PSHUFD dst_reg, dst_reg*/
+ addbyte(0x0f);
+ addbyte(0x70);
+ addbyte(0xc0 | (dst_reg << 3) | dst_reg);
+ addbyte(0x0e);
+}
+static inline void MMX_PUNPCKHDQ(int dst_reg, int src_reg)
+{
+ addbyte(0x66); /*PUNPCKLDQ dst_reg, src_reg*/
+ addbyte(0x0f);
+ addbyte(0x62);
+ addbyte(0xc0 | (dst_reg << 3) | src_reg);
+ addbyte(0x66); /*PSHUFD dst_reg, dst_reg*/
+ addbyte(0x0f);
+ addbyte(0x70);
+ addbyte(0xc0 | (dst_reg << 3) | dst_reg);
+ addbyte(0x0e);
+}
+
+static inline void MMX_PSRLW_imm(int dst_reg, int amount)
+{
+ addbyte(0x66); /*PSRLW dst_reg, amount*/
+ addbyte(0x0f);
+ addbyte(0x71);
+ addbyte(0xc0 | dst_reg | 0x10);
+ addbyte(amount);
+}
+static inline void MMX_PSRAW_imm(int dst_reg, int amount)
+{
+ addbyte(0x66); /*PSRAW dst_reg, amount*/
+ addbyte(0x0f);
+ addbyte(0x71);
+ addbyte(0xc0 | dst_reg | 0x20);
+ addbyte(amount);
+}
+static inline void MMX_PSLLW_imm(int dst_reg, int amount)
+{
+ addbyte(0x66); /*PSLLW dst_reg, amount*/
+ addbyte(0x0f);
+ addbyte(0x71);
+ addbyte(0xc0 | dst_reg | 0x30);
+ addbyte(amount);
+}
+
+static inline void MMX_PSRLD_imm(int dst_reg, int amount)
+{
+ addbyte(0x66); /*PSRLD dst_reg, amount*/
+ addbyte(0x0f);
+ addbyte(0x72);
+ addbyte(0xc0 | dst_reg | 0x10);
+ addbyte(amount);
+}
+static inline void MMX_PSRAD_imm(int dst_reg, int amount)
+{
+ addbyte(0x66); /*PSRAD dst_reg, amount*/
+ addbyte(0x0f);
+ addbyte(0x72);
+ addbyte(0xc0 | dst_reg | 0x20);
+ addbyte(amount);
+}
+static inline void MMX_PSLLD_imm(int dst_reg, int amount)
+{
+ addbyte(0x66); /*PSLLD dst_reg, amount*/
+ addbyte(0x0f);
+ addbyte(0x72);
+ addbyte(0xc0 | dst_reg | 0x30);
+ addbyte(amount);
+}
+
+static inline void MMX_PSRLQ_imm(int dst_reg, int amount)
+{
+ addbyte(0x66); /*PSRLQ dst_reg, amount*/
+ addbyte(0x0f);
+ addbyte(0x73);
+ addbyte(0xc0 | dst_reg | 0x10);
+ addbyte(amount);
+}
+static inline void MMX_PSRAQ_imm(int dst_reg, int amount)
+{
+ addbyte(0x66); /*PSRAQ dst_reg, amount*/
+ addbyte(0x0f);
+ addbyte(0x73);
+ addbyte(0xc0 | dst_reg | 0x20);
+ addbyte(amount);
+}
+static inline void MMX_PSLLQ_imm(int dst_reg, int amount)
+{
+ addbyte(0x66); /*PSLLQ dst_reg, amount*/
+ addbyte(0x0f);
+ addbyte(0x73);
+ addbyte(0xc0 | dst_reg | 0x30);
+ addbyte(amount);
+}
+
+
+static inline void SAVE_EA()
+{
+ addbyte(0x89); /*MOV [ESP+0x24], EAX*/
+ addbyte(0x44);
+ addbyte(0x24);
+ addbyte(0x24);
+}
+static inline void LOAD_EA()
+{
+ addbyte(0x8b); /*MOV EAX, [ESP+0x24]*/
+ addbyte(0x44);
+ addbyte(0x24);
+ addbyte(0x24);
+}
+
+#define MEM_CHECK_WRITE_B MEM_CHECK_WRITE
+
+static inline void MEM_CHECK_WRITE(x86seg *seg)
+{
+ uint8_t *jump1, *jump2, *jump3;
+
+ CHECK_SEG_WRITE(seg);
+
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0x8b); /*MOV ESI, seg->base*/
+ addbyte(0x34);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&seg->base);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &addr*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)&seg->base);
+ addbyte(0x8b); /*MOV ESI, [RSI]*/
+ addbyte(0x36);
+ }
+
+
+ /*seg = ESI, addr = EAX*/
+
+ if (IS_32_ADDR(&cr0))
+ {
+ addbyte(0x83); /*CMP cr0, 0*/
+ addbyte(0x3c);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&cr0);
+ addbyte(0);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RDI, &cr0*/
+ addbyte(0xbf);
+ addquad((uint64_t)&cr0);
+ addbyte(0x83); /*CMPL [RDI], 0*/
+ addbyte(0x3f);
+ addbyte(0);
+ }
+ addbyte(0x67); /*LEA EDI, [EAX+ESI]*/
+ addbyte(0x8d);
+ addbyte(0x3c);
+ addbyte(0x30);
+ addbyte(0x79); /*JNS +*/
+ jump1 = &codeblock[block_current].data[block_pos];
+ addbyte(0);
+// addbyte(0xc3); /*RET*/
+ addbyte(0xc1); /*SHR EDI, 12*/
+ addbyte(0xef);
+ addbyte(12);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xfe);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ jump3 = &codeblock[block_current].data[block_pos];
+ addbyte(0);
+ if (IS_32_ADDR(writelookup2))
+ {
+ addbyte(0x83); /*CMP writelookup2[RDI*8],-1*/
+ addbyte(0x3c);
+ addbyte(0xfd);
+ addlong((uint32_t)(uintptr_t)writelookup2);
+ addbyte(-1);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RCX, writelookup2*/
+ addbyte(0xb9);
+ addquad((uint64_t)writelookup2);
+ addbyte(0x83); /*CMP [RCX+RDI*8], -1*/
+ addbyte(0x3c);
+ addbyte(0xf9);
+ addbyte(-1);
+ }
+ addbyte(0x75); /*JNE +*/
+ jump2 = &codeblock[block_current].data[block_pos];
+ addbyte(0);
+// addbyte(0xc3); /*RET*/
+
+ *jump3 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump3 - 1;
+ /*slowpath:*/
+ addbyte(0x67); /*LEA EDI, [EAX+ESI]*/
+ addbyte(0x8d);
+ addbyte(0x3c);
+ addbyte(0x30);
+
+
+ load_param_1_reg_32(REG_EDI);
+ load_param_2_32(&codeblock[block_current], 1);
+
+
+// addbyte(0x6a); /*PUSH 1*/
+// addbyte(1);
+// addbyte(0x57); /*PUSH EDI*/
+ call(&codeblock[block_current], (uintptr_t)mmutranslatereal);
+// addbyte(0x48); /*ADD ESP, 8*/
+// addbyte(0x83);
+// addbyte(0xc4);
+// addbyte(8);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE mem_abrt_rout*/
+ addbyte(0x85);
+ addlong((uintptr_t)&codeblock[block_current].data[BLOCK_EXIT_OFFSET] - ((uintptr_t)(&codeblock[block_current].data[block_pos]) + 4));
+// addbyte(0xc3); /*RET*/
+ *jump1 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump1 - 1;
+ *jump2 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump2 - 1;
+
+
+
+// addbyte(0xe8); /*CALL mem_store_addr_ea_b*/
+// addlong(mem_check_write - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ LOAD_EA();
+}
+
+static inline void MEM_CHECK_WRITE_W(x86seg *seg)
+{
+ uint8_t *jump1, *jump2, *jump3, *jump4;
+ int jump_pos;
+
+ CHECK_SEG_WRITE(seg);
+
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0x8b); /*MOV ESI, seg->base*/
+ addbyte(0x34);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&seg->base);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &addr*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)&seg->base);
+ addbyte(0x8b); /*MOV ESI, [RSI]*/
+ addbyte(0x36);
+ }
+
+
+ /*seg = ESI, addr = EAX*/
+
+ if (IS_32_ADDR(&cr0))
+ {
+ addbyte(0x83); /*CMP cr0, 0*/
+ addbyte(0x3c);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&cr0);
+ addbyte(0);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RDI, &cr0*/
+ addbyte(0xbf);
+ addquad((uint64_t)&cr0);
+ addbyte(0x83); /*CMPL [RDI], 0*/
+ addbyte(0x3f);
+ addbyte(0);
+ }
+ addbyte(0x67); /*LEA EDI, [EAX+ESI]*/
+ addbyte(0x8d);
+ addbyte(0x3c);
+ addbyte(0x30);
+ addbyte(0x79); /*JNS +*/
+ jump1 = &codeblock[block_current].data[block_pos];
+ addbyte(0);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xfe);
+ addbyte(-1);
+ addbyte(0x8d); /*LEA ESI, 1[EDI]*/
+ addbyte(0x77);
+ addbyte(0x01);
+ addbyte(0x74); /*JE slowpath*/
+ jump4 = &codeblock[block_current].data[block_pos];
+ addbyte(0);
+ addbyte(0x89); /*MOV EBX, EDI*/
+ addbyte(0xfb);
+ addbyte(0xc1); /*SHR EDI, 12*/
+ addbyte(0xef);
+ addbyte(12);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xee);
+ addbyte(12);
+ if (IS_32_ADDR(writelookup2))
+ {
+ addbyte(0x83); /*CMP writelookup2[RDI*8],-1*/
+ addbyte(0x3c);
+ addbyte(0xfd);
+ addlong((uint32_t)(uintptr_t)writelookup2);
+ addbyte(-1);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RAX, writelookup2*/
+ addbyte(0xb8);
+ addquad((uint64_t)writelookup2);
+ addbyte(0x83); /*CMP [RAX+RDI*8], -1*/
+ addbyte(0x3c);
+ addbyte(0xf8);
+ addbyte(-1);
+ }
+ addbyte(0x74); /*JE +*/
+ jump2 = &codeblock[block_current].data[block_pos];
+ addbyte(0);
+ if (IS_32_ADDR(writelookup2))
+ {
+ addbyte(0x83); /*CMP writelookup2[RSI*8],-1*/
+ addbyte(0x3c);
+ addbyte(0xfd);
+ addlong((uint32_t)(uintptr_t)writelookup2);
+ addbyte(-1);
+ }
+ else
+ {
+ addbyte(0x83); /*CMP [RAX+RSI*8], -1*/
+ addbyte(0x3c);
+ addbyte(0xf0);
+ addbyte(-1);
+ }
+ addbyte(0x75); /*JNE +*/
+ jump3 = &codeblock[block_current].data[block_pos];
+ addbyte(0);
+
+ /*slowpath:*/
+ *jump2 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump2 - 1;
+ *jump4 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump4 - 1;
+ jump_pos = block_pos;
+ load_param_1_reg_32(REG_EBX);
+ load_param_2_32(&codeblock[block_current], 1);
+ call(&codeblock[block_current], (uintptr_t)mmutranslatereal);
+ addbyte(0x83); /*ADD EBX, 1*/
+ addbyte(0xc3);
+ addbyte(1);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE mem_abrt_rout*/
+ addbyte(0x85);
+ addlong((uintptr_t)&codeblock[block_current].data[BLOCK_EXIT_OFFSET] - ((uintptr_t)(&codeblock[block_current].data[block_pos]) + 4));
+ /*If bits 0-11 of the address are now 0 then this crosses a page, so loop back*/
+ addbyte(0xf7); /*TEST $fff, EBX*/
+ addbyte(0xc3);
+ addlong(0xfff);
+ addbyte(0x74); /*JNE slowpath*/
+ addbyte(jump_pos - block_pos - 1);
+
+ *jump1 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump1 - 1;
+ *jump3 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump3 - 1;
+
+ LOAD_EA();
+}
+
+static inline void MEM_CHECK_WRITE_L(x86seg *seg)
+{
+ uint8_t *jump1, *jump2, *jump3, *jump4;
+ int jump_pos;
+
+ CHECK_SEG_WRITE(seg);
+
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0x8b); /*MOV ESI, seg->base*/
+ addbyte(0x34);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&seg->base);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &addr*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)&seg->base);
+ addbyte(0x8b); /*MOV ESI, [RSI]*/
+ addbyte(0x36);
+ }
+
+
+ /*seg = ESI, addr = EAX*/
+
+ if (IS_32_ADDR(&cr0))
+ {
+ addbyte(0x83); /*CMP cr0, 0*/
+ addbyte(0x3c);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&cr0);
+ addbyte(0);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RDI, &cr0*/
+ addbyte(0xbf);
+ addquad((uint64_t)&cr0);
+ addbyte(0x83); /*CMPL [RDI], 0*/
+ addbyte(0x3f);
+ addbyte(0);
+ }
+ addbyte(0x67); /*LEA EDI, [EAX+ESI]*/
+ addbyte(0x8d);
+ addbyte(0x3c);
+ addbyte(0x30);
+ addbyte(0x79); /*JNS +*/
+ jump1 = &codeblock[block_current].data[block_pos];
+ addbyte(0);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xfe);
+ addbyte(-1);
+ addbyte(0x8d); /*LEA ESI, 3[EDI]*/
+ addbyte(0x77);
+ addbyte(0x03);
+ addbyte(0x74); /*JE slowpath*/
+ jump4 = &codeblock[block_current].data[block_pos];
+ addbyte(0);
+ addbyte(0x89); /*MOV EBX, EDI*/
+ addbyte(0xfb);
+ addbyte(0xc1); /*SHR EDI, 12*/
+ addbyte(0xef);
+ addbyte(12);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xee);
+ addbyte(12);
+ if (IS_32_ADDR(writelookup2))
+ {
+ addbyte(0x83); /*CMP writelookup2[RDI*8],-1*/
+ addbyte(0x3c);
+ addbyte(0xfd);
+ addlong((uint32_t)(uintptr_t)writelookup2);
+ addbyte(-1);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RAX, writelookup2*/
+ addbyte(0xb8);
+ addquad((uint64_t)writelookup2);
+ addbyte(0x83); /*CMP [RAX+RDI*8], -1*/
+ addbyte(0x3c);
+ addbyte(0xf8);
+ addbyte(-1);
+ }
+ addbyte(0x74); /*JE slowpath*/
+ jump2 = &codeblock[block_current].data[block_pos];
+ addbyte(0);
+ if (IS_32_ADDR(writelookup2))
+ {
+ addbyte(0x83); /*CMP writelookup2[RSI*8],-1*/
+ addbyte(0x3c);
+ addbyte(0xfd);
+ addlong((uint32_t)(uintptr_t)writelookup2);
+ addbyte(-1);
+ }
+ else
+ {
+ addbyte(0x83); /*CMP [RAX+RSI*8], -1*/
+ addbyte(0x3c);
+ addbyte(0xf0);
+ addbyte(-1);
+ }
+ addbyte(0x75); /*JNE +*/
+ jump3 = &codeblock[block_current].data[block_pos];
+ addbyte(0);
+
+ /*slowpath:*/
+ *jump2 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump2 - 1;
+ *jump4 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump4 - 1;
+ jump_pos = block_pos;
+ load_param_1_reg_32(REG_EBX);
+ load_param_2_32(&codeblock[block_current], 1);
+ call(&codeblock[block_current], (uintptr_t)mmutranslatereal);
+ addbyte(0x83); /*ADD EBX, 3*/
+ addbyte(0xc3);
+ addbyte(3);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE mem_abrt_rout*/
+ addbyte(0x85);
+ addlong((uintptr_t)&codeblock[block_current].data[BLOCK_EXIT_OFFSET] - ((uintptr_t)(&codeblock[block_current].data[block_pos]) + 4));
+ /*If bits 0-11 of the address are now 0 then this crosses a page, so loop back*/
+ addbyte(0xf7); /*TEST $ffc, EBX*/
+ addbyte(0xc3);
+ addlong(0xffc);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(jump_pos - block_pos - 1);
+
+ *jump1 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump1 - 1;
+ *jump3 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump3 - 1;
+
+ LOAD_EA();
+}
+
+static inline int MEM_LOAD_ADDR_EA_B_NO_ABRT(x86seg *seg)
+{
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0x8b); /*MOVL ECX, seg->base*/
+ addbyte(0x0c);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&seg->base);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &seg->base*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)&seg->base);
+ addbyte(0x8b); /*MOV ECX, [RSI]*/
+ addbyte(0x0e);
+ }
+ addbyte(0x67); /*LEA ESI, (EAX,ECX)*/
+ addbyte(0x8d);
+ addbyte(0x34);
+ addbyte(0x08);
+ addbyte(0x89); /*MOV EDI, ESI*/
+ addbyte(0xf7);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ if (IS_32_ADDR(readlookup2))
+ {
+ addbyte(0x67); /*MOV RSI, readlookup2[ESI*8]*/
+ addbyte(0x48);
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf5);
+ addlong((uint32_t)(uintptr_t)readlookup2);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RDX, readlookup2*/
+ addbyte(0xb8 | REG_EDX);
+ addquad((uint64_t)readlookup2);
+ addbyte(0x48); /*MOV RSI, [RDX+RSI*8]*/
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf2);
+ }
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2);
+ addbyte(0x8b); /*MOV AL,[RDI+RSI]*/
+ addbyte(0x04);
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(0xeb); /*JMP done*/
+ addbyte(2+2+12);
+ /*slowpath:*/
+ load_param_1_reg_32(REG_ECX);
+ load_param_2_reg_32(REG_EAX);
+ call_long((uintptr_t)readmemb386l);
+ addbyte(0x89); /*MOV ECX, EAX*/
+ addbyte(0xc1);
+ /*done:*/
+
+ host_reg_mapping[REG_ECX] = 8;
+
+ return REG_ECX;
+}
+static inline int MEM_LOAD_ADDR_EA_W_NO_ABRT(x86seg *seg)
+{
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0x8b); /*MOVL ECX, seg->base*/
+ addbyte(0x0c);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&seg->base);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &seg->base*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)&seg->base);
+ addbyte(0x8b); /*MOV ECX, [RSI]*/
+ addbyte(0x0e);
+ }
+ addbyte(0x67); /*LEA ESI, (EAX,ECX)*/
+ addbyte(0x8d);
+ addbyte(0x34);
+ addbyte(0x08);
+ addbyte(0x67); /*LEA EDI, 1[ESI]*/
+ addbyte(0x8d);
+ addbyte(0x7e);
+ addbyte(0x01);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xfff*/
+ addbyte(0xc7);
+ addlong(0xfff);
+ if (IS_32_ADDR(readlookup2))
+ {
+ addbyte(0x67); /*MOV RSI, readlookup2[ESI*8]*/
+ addbyte(0x48);
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf5);
+ addlong((uint32_t)(uintptr_t)readlookup2);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RDX, readlookup2*/
+ addbyte(0xb8 | REG_EDX);
+ addquad((uint64_t)readlookup2);
+ addbyte(0x48); /*MOV RSI, [RDX+RSI*8]*/
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf2);
+ }
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+5+2);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(5+2);
+ addbyte(0x66); /*MOV AX,-1[RDI+RSI]*/
+ addbyte(0x8b);
+ addbyte(0x44);
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-1);
+ addbyte(0xeb); /*JMP done*/
+ addbyte(2+2+12);
+ /*slowpath:*/
+ load_param_1_reg_32(REG_ECX);
+ load_param_2_reg_32(REG_EAX);
+ call_long((uintptr_t)readmemwl);
+ addbyte(0x89); /*MOV ECX, EAX*/
+ addbyte(0xc1);
+ /*done:*/
+
+ host_reg_mapping[REG_ECX] = 8;
+
+ return REG_ECX;
+}
+static inline int MEM_LOAD_ADDR_EA_L_NO_ABRT(x86seg *seg)
+{
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0x8b); /*MOVL ECX, seg->base*/
+ addbyte(0x0c);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&seg->base);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &seg->base*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)&seg->base);
+ addbyte(0x8b); /*MOV ECX, [RSI]*/
+ addbyte(0x0e);
+ }
+ addbyte(0x67); /*LEA ESI, (EAX,ECX)*/
+ addbyte(0x8d);
+ addbyte(0x34);
+ addbyte(0x08);
+ addbyte(0x67); /*LEA EDI, 3[ESI]*/
+ addbyte(0x8d);
+ addbyte(0x7e);
+ addbyte(0x03);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xffc*/
+ addbyte(0xc7);
+ addlong(0xffc);
+ if (IS_32_ADDR(readlookup2))
+ {
+ addbyte(0x67); /*MOV RSI, readlookup2[ESI*8]*/
+ addbyte(0x48);
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf5);
+ addlong((uint32_t)(uintptr_t)readlookup2);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RDX, readlookup2*/
+ addbyte(0xb8 | REG_EDX);
+ addquad((uint64_t)readlookup2);
+ addbyte(0x48); /*MOV RSI, [RDX+RSI*8]*/
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf2);
+ }
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+4+2);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(4+2);
+ addbyte(0x8b); /*MOV EAX,-3[RDI+RSI]*/
+ addbyte(0x44);
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-3);
+ addbyte(0xeb); /*JMP done*/
+ addbyte(2+2+12);
+ /*slowpath:*/
+ load_param_1_reg_32(REG_ECX);
+ load_param_2_reg_32(REG_EAX);
+ call_long((uintptr_t)readmemll);
+ addbyte(0x89); /*MOV ECX, EAX*/
+ addbyte(0xc1);
+ /*done:*/
+
+ host_reg_mapping[REG_ECX] = 8;
+
+ return REG_ECX;
+}
+
+static inline void MEM_STORE_ADDR_EA_B_NO_ABRT(x86seg *seg, int host_reg)
+{
+ if (host_reg & 0x10)
+ {
+ /*Handle high byte of register*/
+ if (host_reg & 8)
+ {
+ addbyte(0x45); /*MOVL R8, host_reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | ((host_reg & 7) << 3));
+ }
+ else
+ {
+ addbyte(0x41); /*MOVL R8, host_reg*/
+ addbyte(0x89);
+ addbyte(0xc0 | ((host_reg & 7) << 3));
+ }
+ addbyte(0x66); /*SHR R8, 8*/
+ addbyte(0x41);
+ addbyte(0xc1);
+ addbyte(0xe8);
+ addbyte(8);
+ host_reg = 8;
+ }
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0x8b); /*MOVL EBX, seg->base*/
+ addbyte(0x1c);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&seg->base);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &seg->base*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)&seg->base);
+ addbyte(0x8b); /*MOV EBX, [RSI]*/
+ addbyte(0x1e);
+ }
+ addbyte(0x67); /*LEA ESI, (EAX,EBX)*/
+ addbyte(0x8d);
+ addbyte(0x34);
+ addbyte(0x18);
+ addbyte(0x89); /*MOV EDI, ESI*/
+ addbyte(0xf7);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ if (IS_32_ADDR(writelookup2))
+ {
+ addbyte(0x67); /*MOV RSI, writelookup2[ESI*8]*/
+ addbyte(0x48);
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf5);
+ addlong((uint32_t)(uintptr_t)writelookup2);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RDX, writelookup2*/
+ addbyte(0xb8 | REG_EDX);
+ addquad((uint64_t)writelookup2);
+ addbyte(0x48); /*MOV RSI, [RDX+RSI*8]*/
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf2);
+ }
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(((host_reg & 8) ? 4:3)+2);
+ if (host_reg & 8)
+ {
+ addbyte(0x44); /*MOV [RDI+RSI],host_reg*/
+ addbyte(0x88);
+ addbyte(0x04 | ((host_reg & 7) << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ }
+ else
+ {
+ addbyte(0x88); /*MOV [RDI+RSI],host_reg*/
+ addbyte(0x04 | (host_reg << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ }
+ addbyte(0xeb); /*JMP done*/
+ addbyte(2+2+3+12);
+ /*slowpath:*/
+ load_param_3_reg_32(host_reg);
+ load_param_1_reg_32(REG_EBX);
+ load_param_2_reg_32(REG_EAX);
+ call_long((uintptr_t)writememb386l);
+ /*done:*/
+}
+static inline void MEM_STORE_ADDR_EA_W_NO_ABRT(x86seg *seg, int host_reg)
+{
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0x8b); /*MOVL EBX, seg->base*/
+ addbyte(0x1c);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&seg->base);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &seg->base*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)&seg->base);
+ addbyte(0x8b); /*MOV EBX, [RSI]*/
+ addbyte(0x1e);
+ }
+ addbyte(0x67); /*LEA ESI, (EAX,EBX)*/
+ addbyte(0x8d);
+ addbyte(0x34);
+ addbyte(0x18);
+ addbyte(0x67); /*LEA EDI, 1[ESI]*/
+ addbyte(0x8d);
+ addbyte(0x7e);
+ addbyte(0x01);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xfff*/
+ addbyte(0xc7);
+ addlong(0xfff);
+ if (IS_32_ADDR(writelookup2))
+ {
+ addbyte(0x67); /*MOV RSI, writelookup2[ESI*8]*/
+ addbyte(0x48);
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf5);
+ addlong((uint32_t)(uintptr_t)writelookup2);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RDX, writelookup2*/
+ addbyte(0xb8 | REG_EDX);
+ addquad((uint64_t)writelookup2);
+ addbyte(0x48); /*MOV RSI, [RDX+RSI*8]*/
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf2);
+ }
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+((host_reg & 8) ? 6:5)+2);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(((host_reg & 8) ? 6:5)+2);
+ if (host_reg & 8)
+ {
+ addbyte(0x66); /*MOV -1[RDI+RSI],host_reg*/
+ addbyte(0x44);
+ addbyte(0x89);
+ addbyte(0x44 | ((host_reg & 7) << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-1);
+ }
+ else
+ {
+ addbyte(0x66); /*MOV -1[RDI+RSI],host_reg*/
+ addbyte(0x89);
+ addbyte(0x44 | (host_reg << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-1);
+ }
+ addbyte(0xeb); /*JMP done*/
+ addbyte(2+2+3+12);
+ /*slowpath:*/
+ load_param_3_reg_32(host_reg);
+ load_param_1_reg_32(REG_EBX);
+ load_param_2_reg_32(REG_EAX);
+ call_long((uintptr_t)writememwl);
+ /*done:*/
+}
+static inline void MEM_STORE_ADDR_EA_L_NO_ABRT(x86seg *seg, int host_reg)
+{
+ if (IS_32_ADDR(&seg->base))
+ {
+ addbyte(0x8b); /*MOVL EBX, seg->base*/
+ addbyte(0x1c);
+ addbyte(0x25);
+ addlong((uint32_t)(uintptr_t)&seg->base);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RSI, &seg->base*/
+ addbyte(0xb8 | REG_ESI);
+ addquad((uint64_t)&seg->base);
+ addbyte(0x8b); /*MOV EBX, [RSI]*/
+ addbyte(0x1e);
+ }
+ addbyte(0x67); /*LEA ESI, (EAX,EBX)*/
+ addbyte(0x8d);
+ addbyte(0x34);
+ addbyte(0x18);
+ addbyte(0x67); /*LEA EDI, 3[ESI]*/
+ addbyte(0x8d);
+ addbyte(0x7e);
+ addbyte(0x03);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xffc*/
+ addbyte(0xc7);
+ addlong(0xffc);
+ if (IS_32_ADDR(writelookup2))
+ {
+ addbyte(0x67); /*MOV RSI, writelookup2[ESI*8]*/
+ addbyte(0x48);
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf5);
+ addlong((uint32_t)(uintptr_t)writelookup2);
+ }
+ else
+ {
+ addbyte(0x48); /*MOV RDX, writelookup2*/
+ addbyte(0xb8 | REG_EDX);
+ addquad((uint64_t)writelookup2);
+ addbyte(0x48); /*MOV RSI, [RDX+RSI*8]*/
+ addbyte(0x8b);
+ addbyte(0x34);
+ addbyte(0xf2);
+ }
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+((host_reg & 8) ? 5:4)+2);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(((host_reg & 8) ? 5:4)+2);
+ if (host_reg & 8)
+ {
+ addbyte(0x44); /*MOV -3[RDI+RSI],host_reg*/
+ addbyte(0x89);
+ addbyte(0x44 | ((host_reg & 7) << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-3);
+ }
+ else
+ {
+ addbyte(0x89); /*MOV -3[RDI+RSI],host_reg*/
+ addbyte(0x44 | (host_reg << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-3);
+ }
+ addbyte(0xeb); /*JMP done*/
+ addbyte(2+2+3+12);
+ /*slowpath:*/
+ load_param_3_reg_32(host_reg);
+ load_param_1_reg_32(REG_EBX);
+ load_param_2_reg_32(REG_EAX);
+ call_long((uintptr_t)writememll);
+ /*done:*/
+}
+
+static inline void LOAD_SEG(int host_reg, void *seg)
+{
+ load_param_2_64(&codeblock[block_current], (uint64_t)seg);
+ load_param_1_reg_32(host_reg);
+ CALL_FUNC((uintptr_t)loadseg);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE end*/
+ addbyte(0x85);
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+}
diff --git a/src/codegen_ops_x86.h b/src/codegen_ops_x86.h
new file mode 100644
index 0000000..3581f6e
--- /dev/null
+++ b/src/codegen_ops_x86.h
@@ -0,0 +1,3844 @@
+/*Register allocation :
+ EBX, ECX, EDX - emulated registers
+ EAX - work register, EA storage
+ ESI, EDI - work registers
+ EBP - points at emulated register array
+*/
+#define HOST_REG_START 1
+#define HOST_REG_END 4
+#define HOST_REG_XMM_START 0
+#define HOST_REG_XMM_END 7
+static inline int find_host_reg()
+{
+ int c;
+ for (c = HOST_REG_START; c < HOST_REG_END; c++)
+ {
+ if (host_reg_mapping[c] == -1)
+ break;
+ }
+
+ if (c == NR_HOST_REGS)
+ fatal("Out of host regs!\n");
+ return c;
+}
+static inline int find_host_xmm_reg()
+{
+ int c;
+ for (c = HOST_REG_XMM_START; c < HOST_REG_XMM_END; c++)
+ {
+ if (host_reg_xmm_mapping[c] == -1)
+ break;
+ }
+
+ if (c == HOST_REG_XMM_END)
+ fatal("Out of host XMM regs!\n");
+ return c;
+}
+
+#if 0
+static inline void STORE_IMM_ADDR_B(uintptr_t addr, uint8_t val)
+{
+ addbyte(0xC6); /*MOVB [addr],val*/
+ addbyte(0x05);
+ addlong(addr);
+ addbyte(val);
+}
+static inline void STORE_IMM_ADDR_W(uintptr_t addr, uint16_t val)
+{
+ addbyte(0x66); /*MOVW [addr],val*/
+ addbyte(0xC7);
+ addbyte(0x05);
+ addlong(addr);
+ addword(val);
+}
+#endif
+static inline void STORE_IMM_ADDR_L(uintptr_t addr, uint32_t val)
+{
+ if (addr >= (uintptr_t)&cpu_state && addr < ((uintptr_t)&cpu_state)+0x100)
+ {
+ addbyte(0xC7); /*MOVL [addr],val*/
+ addbyte(0x45);
+ addbyte(addr - (uint32_t)&cpu_state - 128);
+ addlong(val);
+ }
+ else
+ {
+ addbyte(0xC7); /*MOVL [addr],val*/
+ addbyte(0x05);
+ addlong(addr);
+ addlong(val);
+ }
+}
+
+static inline void STORE_IMM_REG_B(int reg, uint8_t val)
+{
+ addbyte(0xC6); /*MOVB [addr],val*/
+ addbyte(0x45);
+ if (reg & 4)
+ addbyte((uint8_t)cpu_state_offset(regs[reg & 3].b.h));
+ else
+ addbyte((uint8_t)cpu_state_offset(regs[reg & 3].b.l));
+ addbyte(val);
+}
+static inline void STORE_IMM_REG_W(int reg, uint16_t val)
+{
+ addbyte(0x66); /*MOVW [addr],val*/
+ addbyte(0xC7);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[reg & 7].w));
+ addword(val);
+}
+static inline void STORE_IMM_REG_L(int reg, uint32_t val)
+{
+ addbyte(0xC7); /*MOVL [addr],val*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[reg & 7].l));
+ addlong(val);
+}
+
+static inline int LOAD_REG_B(int reg)
+{
+ int host_reg = find_host_reg();
+ host_reg_mapping[host_reg] = reg;
+
+ addbyte(0x0f); /*MOVZX B[reg],host_reg*/
+ addbyte(0xb6);
+ addbyte(0x45 | (host_reg << 3));
+ if (reg & 4)
+ addbyte((uint8_t)cpu_state_offset(regs[reg & 3].b.h));
+ else
+ addbyte((uint8_t)cpu_state_offset(regs[reg & 3].b.l));
+
+ return host_reg;
+}
+static inline int LOAD_REG_W(int reg)
+{
+ int host_reg = find_host_reg();
+ host_reg_mapping[host_reg] = reg;
+
+ addbyte(0x0f); /*MOVZX W[reg],host_reg*/
+ addbyte(0xb7);
+ addbyte(0x45 | (host_reg << 3));
+ addbyte((uint8_t)cpu_state_offset(regs[reg & 7].w));
+
+ return host_reg;
+}
+static inline int LOAD_REG_L(int reg)
+{
+ int host_reg = find_host_reg();
+ host_reg_mapping[host_reg] = reg;
+
+ addbyte(0x8b); /*MOVL host_reg,[reg]*/
+ addbyte(0x45 | (host_reg << 3));
+ addbyte((uint8_t)cpu_state_offset(regs[reg & 7].l));
+
+ return host_reg;
+}
+
+static inline int LOAD_VAR_W(uintptr_t addr)
+{
+ int host_reg = find_host_reg();
+ host_reg_mapping[host_reg] = 0;
+
+ addbyte(0x66); /*MOVL host_reg,[reg]*/
+ addbyte(0x8b);
+ addbyte(0x05 | (host_reg << 3));
+ addlong((uint32_t)addr);
+
+ return host_reg;
+}
+static inline int LOAD_VAR_WL(uintptr_t addr)
+{
+ int host_reg = find_host_reg();
+ host_reg_mapping[host_reg] = 0;
+
+ addbyte(0x0f); /*MOVZX host_reg, [addr]*/
+ addbyte(0xb7);
+ addbyte(0x05 | (host_reg << 3));
+ addlong((uint32_t)addr);
+
+ return host_reg;
+}
+static inline int LOAD_VAR_L(uintptr_t addr)
+{
+ int host_reg = find_host_reg();
+ host_reg_mapping[host_reg] = 0;
+
+ addbyte(0x8b); /*MOVL host_reg,[reg]*/
+ addbyte(0x05 | (host_reg << 3));
+ addlong((uint32_t)addr);
+
+ return host_reg;
+}
+
+static inline int LOAD_REG_IMM(uint32_t imm)
+{
+ int host_reg = find_host_reg();
+ host_reg_mapping[host_reg] = 0;
+
+ addbyte(0xc7); /*MOVL host_reg, imm*/
+ addbyte(0xc0 | host_reg);
+ addlong(imm);
+
+ return host_reg;
+}
+
+static inline int LOAD_HOST_REG(int host_reg)
+{
+ int new_host_reg = find_host_reg();
+ host_reg_mapping[new_host_reg] = 0;
+
+ addbyte(0x89); /*MOV new_host_reg, host_reg*/
+ addbyte(0xc0 | (host_reg << 3) | new_host_reg);
+
+ return new_host_reg;
+}
+
+static inline void STORE_REG_B_RELEASE(int host_reg)
+{
+ addbyte(0x88); /*MOVB [reg],host_reg*/
+ addbyte(0x45 | (host_reg << 3));
+ if (host_reg_mapping[host_reg] & 4)
+ addbyte((uint8_t)cpu_state_offset(regs[host_reg_mapping[host_reg] & 3].b.h));
+ else
+ addbyte((uint8_t)cpu_state_offset(regs[host_reg_mapping[host_reg] & 3].b.l));
+ host_reg_mapping[host_reg] = -1;
+}
+static inline void STORE_REG_W_RELEASE(int host_reg)
+{
+ addbyte(0x66); /*MOVW [reg],host_reg*/
+ addbyte(0x89);
+ addbyte(0x45 | (host_reg << 3));
+ addbyte((uint8_t)cpu_state_offset(regs[host_reg_mapping[host_reg]].w));
+ host_reg_mapping[host_reg] = -1;
+}
+static inline void STORE_REG_L_RELEASE(int host_reg)
+{
+ addbyte(0x89); /*MOVL [reg],host_reg*/
+ addbyte(0x45 | (host_reg << 3));
+ addbyte((uint8_t)cpu_state_offset(regs[host_reg_mapping[host_reg]].l));
+ host_reg_mapping[host_reg] = -1;
+}
+
+static inline void STORE_REG_TARGET_B_RELEASE(int host_reg, int guest_reg)
+{
+ addbyte(0x88); /*MOVB [guest_reg],host_reg*/
+ addbyte(0x45 | (host_reg << 3));
+ if (guest_reg & 4)
+ addbyte((uint8_t)cpu_state_offset(regs[guest_reg & 3].b.h));
+ else
+ addbyte((uint8_t)cpu_state_offset(regs[guest_reg & 3].b.l));
+ host_reg_mapping[host_reg] = -1;
+}
+static inline void STORE_REG_TARGET_W_RELEASE(int host_reg, int guest_reg)
+{
+ addbyte(0x66); /*MOVW [guest_reg],host_reg*/
+ addbyte(0x89);
+ addbyte(0x45 | (host_reg << 3));
+ addbyte((uint8_t)cpu_state_offset(regs[guest_reg & 7].w));
+ host_reg_mapping[host_reg] = -1;
+}
+static inline void STORE_REG_TARGET_L_RELEASE(int host_reg, int guest_reg)
+{
+ addbyte(0x89); /*MOVL [guest_reg],host_reg*/
+ addbyte(0x45 | (host_reg << 3));
+ addbyte((uint8_t)cpu_state_offset(regs[guest_reg & 7].l));
+ host_reg_mapping[host_reg] = -1;
+}
+
+static inline void RELEASE_REG(int host_reg)
+{
+ host_reg_mapping[host_reg] = -1;
+}
+
+static inline void STORE_HOST_REG_ADDR_W(uintptr_t addr, int host_reg)
+{
+ if (addr >= (uintptr_t)&cpu_state && addr < ((uintptr_t)&cpu_state)+0x100)
+ {
+ addbyte(0x66); /*MOVW [addr],host_reg*/
+ addbyte(0x89);
+ addbyte(0x45 | (host_reg << 3));
+ addbyte((uint32_t)addr - (uint32_t)&cpu_state - 128);
+ }
+ else
+ {
+ addbyte(0x66); /*MOVL [reg],host_reg*/
+ addbyte(0x89);
+ addbyte(0x05 | (host_reg << 3));
+ addlong(addr);
+ }
+}
+static inline void STORE_HOST_REG_ADDR(uintptr_t addr, int host_reg)
+{
+ if (addr >= (uintptr_t)&cpu_state && addr < ((uintptr_t)&cpu_state)+0x100)
+ {
+ addbyte(0x89); /*MOVL [addr],host_reg*/
+ addbyte(0x45 | (host_reg << 3));
+ addbyte((uint32_t)addr - (uint32_t)&cpu_state - 128);
+ }
+ else
+ {
+ addbyte(0x89); /*MOVL [reg],host_reg*/
+ addbyte(0x05 | (host_reg << 3));
+ addlong(addr);
+ }
+}
+#define STORE_HOST_REG_ADDR_BL STORE_HOST_REG_ADDR
+#define STORE_HOST_REG_ADDR_WL STORE_HOST_REG_ADDR
+
+static inline void ADD_HOST_REG_B(int dst_reg, int src_reg)
+{
+ addbyte(0x00); /*ADDB dst_reg, src_reg*/
+ addbyte(0xc0 | dst_reg | (src_reg << 3));
+}
+static inline void ADD_HOST_REG_W(int dst_reg, int src_reg)
+{
+ addbyte(0x66); /*ADDW dst_reg, src_reg*/
+ addbyte(0x01);
+ addbyte(0xc0 | dst_reg | (src_reg << 3));
+}
+static inline void ADD_HOST_REG_L(int dst_reg, int src_reg)
+{
+ addbyte(0x01); /*ADDL dst_reg, src_reg*/
+ addbyte(0xc0 | dst_reg | (src_reg << 3));
+}
+static inline void ADD_HOST_REG_IMM_B(int host_reg, uint8_t imm)
+{
+ addbyte(0x80); /*ADDB host_reg, imm*/
+ addbyte(0xC0 | host_reg);
+ addbyte(imm);
+}
+static inline void ADD_HOST_REG_IMM_W(int host_reg, uint16_t imm)
+{
+ if (imm < 0x80 || imm >= 0xff80)
+ {
+ addbyte(0x66); /*ADDW host_reg, imm*/
+ addbyte(0x83);
+ addbyte(0xC0 | host_reg);
+ addbyte(imm & 0xff);
+ }
+ else
+ {
+ addbyte(0x66); /*ADDW host_reg, imm*/
+ addbyte(0x81);
+ addbyte(0xC0 | host_reg);
+ addword(imm);
+ }
+}
+static inline void ADD_HOST_REG_IMM(int host_reg, uint32_t imm)
+{
+ if (imm < 0x80 || imm >= 0xffffff80)
+ {
+ addbyte(0x83); /*ADDL host_reg, imm*/
+ addbyte(0xC0 | host_reg);
+ addbyte(imm & 0xff);
+ }
+ else
+ {
+ addbyte(0x81); /*ADDL host_reg, imm*/
+ addbyte(0xC0 | host_reg);
+ addlong(imm);
+ }
+}
+
+#define AND_HOST_REG_B AND_HOST_REG_L
+#define AND_HOST_REG_W AND_HOST_REG_L
+static inline void AND_HOST_REG_L(int dst_reg, int src_reg)
+{
+ addbyte(0x21); /*ANDL dst_reg, src_reg*/
+ addbyte(0xc0 | dst_reg | (src_reg << 3));
+}
+static inline void AND_HOST_REG_IMM(int host_reg, uint32_t imm)
+{
+ if (imm < 0x80 || imm >= 0xffffff80)
+ {
+ addbyte(0x83); /*ANDL host_reg, imm*/
+ addbyte(0xE0 | host_reg);
+ addbyte(imm & 0xff);
+ }
+ else
+ {
+ addbyte(0x81); /*ANDL host_reg, imm*/
+ addbyte(0xE0 | host_reg);
+ addlong(imm);
+ }
+}
+static inline int TEST_HOST_REG_B(int dst_reg, int src_reg)
+{
+ AND_HOST_REG_B(dst_reg, src_reg);
+
+ return dst_reg;
+}
+static inline int TEST_HOST_REG_W(int dst_reg, int src_reg)
+{
+ AND_HOST_REG_W(dst_reg, src_reg);
+
+ return dst_reg;
+}
+static inline int TEST_HOST_REG_L(int dst_reg, int src_reg)
+{
+ AND_HOST_REG_L(dst_reg, src_reg);
+
+ return dst_reg;
+}
+static inline int TEST_HOST_REG_IMM(int host_reg, uint32_t imm)
+{
+ AND_HOST_REG_IMM(host_reg, imm);
+
+ return host_reg;
+}
+
+#define OR_HOST_REG_B OR_HOST_REG_L
+#define OR_HOST_REG_W OR_HOST_REG_L
+static inline void OR_HOST_REG_L(int dst_reg, int src_reg)
+{
+ addbyte(0x09); /*ORL dst_reg, src_reg*/
+ addbyte(0xc0 | dst_reg | (src_reg << 3));
+}
+static inline void OR_HOST_REG_IMM(int host_reg, uint32_t imm)
+{
+ if (imm < 0x80 || imm >= 0xffffff80)
+ {
+ addbyte(0x83); /*ORL host_reg, imm*/
+ addbyte(0xC8 | host_reg);
+ addbyte(imm & 0xff);
+ }
+ else
+ {
+ addbyte(0x81); /*ORL host_reg, imm*/
+ addbyte(0xC8 | host_reg);
+ addlong(imm);
+ }
+}
+
+static inline void NEG_HOST_REG_B(int reg)
+{
+ addbyte(0xf6);
+ addbyte(0xd8 | reg);
+}
+static inline void NEG_HOST_REG_W(int reg)
+{
+ addbyte(0x66);
+ addbyte(0xf7);
+ addbyte(0xd8 | reg);
+}
+static inline void NEG_HOST_REG_L(int reg)
+{
+ addbyte(0xf7);
+ addbyte(0xd8 | reg);
+}
+
+static inline void SUB_HOST_REG_B(int dst_reg, int src_reg)
+{
+ addbyte(0x28); /*SUBB dst_reg, src_reg*/
+ addbyte(0xc0 | dst_reg | (src_reg << 3));
+}
+static inline void SUB_HOST_REG_W(int dst_reg, int src_reg)
+{
+ addbyte(0x66); /*SUBW dst_reg, src_reg*/
+ addbyte(0x29);
+ addbyte(0xc0 | dst_reg | (src_reg << 3));
+}
+static inline void SUB_HOST_REG_L(int dst_reg, int src_reg)
+{
+ addbyte(0x29); /*SUBL dst_reg, src_reg*/
+ addbyte(0xc0 | dst_reg | (src_reg << 3));
+}
+static inline void SUB_HOST_REG_IMM_B(int host_reg, uint8_t imm)
+{
+ addbyte(0x80); /*SUBB host_reg, imm*/
+ addbyte(0xE8 | host_reg);
+ addbyte(imm);
+}
+static inline void SUB_HOST_REG_IMM_W(int host_reg, uint16_t imm)
+{
+ if (imm < 0x80 || imm >= 0xff80)
+ {
+ addbyte(0x66); /*SUBW host_reg, imm*/
+ addbyte(0x83);
+ addbyte(0xE8 | host_reg);
+ addbyte(imm & 0xff);
+ }
+ else
+ {
+ addbyte(0x66); /*SUBW host_reg, imm*/
+ addbyte(0x81);
+ addbyte(0xE8 | host_reg);
+ addword(imm);
+ }
+}
+static inline void SUB_HOST_REG_IMM(int host_reg, uint32_t imm)
+{
+ if (imm < 0x80 || imm >= 0xffffff80)
+ {
+ addbyte(0x83); /*SUBL host_reg, imm*/
+ addbyte(0xE8 | host_reg);
+ addbyte(imm);
+ }
+ else
+ {
+ addbyte(0x81); /*SUBL host_reg, imm*/
+ addbyte(0xE8 | host_reg);
+ addlong(imm);
+ }
+}
+
+static inline int CMP_HOST_REG_B(int dst_reg, int src_reg)
+{
+ SUB_HOST_REG_B(dst_reg, src_reg);
+
+ return dst_reg;
+}
+static inline int CMP_HOST_REG_W(int dst_reg, int src_reg)
+{
+ SUB_HOST_REG_W(dst_reg, src_reg);
+
+ return dst_reg;
+}
+static inline int CMP_HOST_REG_L(int dst_reg, int src_reg)
+{
+ SUB_HOST_REG_L(dst_reg, src_reg);
+
+ return dst_reg;
+}
+static inline int CMP_HOST_REG_IMM_B(int host_reg, uint8_t imm)
+{
+ SUB_HOST_REG_IMM_B(host_reg, imm);
+
+ return host_reg;
+}
+static inline int CMP_HOST_REG_IMM_W(int host_reg, uint16_t imm)
+{
+ SUB_HOST_REG_IMM_W(host_reg, imm);
+
+ return host_reg;
+}
+static inline int CMP_HOST_REG_IMM_L(int host_reg, uint32_t imm)
+{
+ SUB_HOST_REG_IMM(host_reg, imm);
+
+ return host_reg;
+}
+
+#define XOR_HOST_REG_B XOR_HOST_REG_L
+#define XOR_HOST_REG_W XOR_HOST_REG_L
+static inline void XOR_HOST_REG_L(int dst_reg, int src_reg)
+{
+ addbyte(0x31); /*XORL dst_reg, src_reg*/
+ addbyte(0xc0 | dst_reg | (src_reg << 3));
+}
+static inline void XOR_HOST_REG_IMM(int host_reg, uint32_t imm)
+{
+ if (imm < 0x80 || imm >= 0xffffff80)
+ {
+ addbyte(0x83); /*XORL host_reg, imm*/
+ addbyte(0xF0 | host_reg);
+ addbyte(imm & 0xff);
+ }
+ else
+ {
+ addbyte(0x81); /*XORL host_reg, imm*/
+ addbyte(0xF0 | host_reg);
+ addlong(imm);
+ }
+}
+
+static inline void CALL_FUNC(uintptr_t dest)
+{
+ addbyte(0xE8); /*CALL*/
+ addlong(((uintptr_t)dest - (uintptr_t)(&codeblock[block_current].data[block_pos + 4])));
+}
+
+static inline void SHL_B_IMM(int reg, int count)
+{
+ addbyte(0xc0); /*SHL reg, count*/
+ addbyte(0xc0 | reg | 0x20);
+ addbyte(count);
+}
+static inline void SHL_W_IMM(int reg, int count)
+{
+ addbyte(0x66); /*SHL reg, count*/
+ addbyte(0xc1);
+ addbyte(0xc0 | reg | 0x20);
+ addbyte(count);
+}
+static inline void SHL_L_IMM(int reg, int count)
+{
+ addbyte(0xc1); /*SHL reg, count*/
+ addbyte(0xc0 | reg | 0x20);
+ addbyte(count);
+}
+static inline void SHR_B_IMM(int reg, int count)
+{
+ addbyte(0xc0); /*SHR reg, count*/
+ addbyte(0xc0 | reg | 0x28);
+ addbyte(count);
+}
+static inline void SHR_W_IMM(int reg, int count)
+{
+ addbyte(0x66); /*SHR reg, count*/
+ addbyte(0xc1);
+ addbyte(0xc0 | reg | 0x28);
+ addbyte(count);
+}
+static inline void SHR_L_IMM(int reg, int count)
+{
+ addbyte(0xc1); /*SHR reg, count*/
+ addbyte(0xc0 | reg | 0x28);
+ addbyte(count);
+}
+static inline void SAR_B_IMM(int reg, int count)
+{
+ addbyte(0xc0); /*SAR reg, count*/
+ addbyte(0xc0 | reg | 0x38);
+ addbyte(count);
+}
+static inline void SAR_W_IMM(int reg, int count)
+{
+ addbyte(0x66); /*SAR reg, count*/
+ addbyte(0xc1);
+ addbyte(0xc0 | reg | 0x38);
+ addbyte(count);
+}
+static inline void SAR_L_IMM(int reg, int count)
+{
+ addbyte(0xc1); /*SAR reg, count*/
+ addbyte(0xc0 | reg | 0x38);
+ addbyte(count);
+}
+
+
+static inline void CHECK_SEG_READ(x86seg *seg)
+{
+ /*Segments always valid in real/V86 mode*/
+ if (!(cr0 & 1) || (eflags & VM_FLAG))
+ return;
+ /*CS and SS must always be valid*/
+ if (seg == &_cs || seg == &_ss)
+ return;
+ if (seg->checked)
+ return;
+
+ addbyte(0x83); /*CMP seg->base, -1*/
+ addbyte(0x05|0x38);
+ addlong((uint32_t)&seg->base);
+ addbyte(-1);
+ addbyte(0x0f);
+ addbyte(0x84); /*JE end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+
+ seg->checked = 1;
+}
+static inline void CHECK_SEG_WRITE(x86seg *seg)
+{
+ /*Segments always valid in real/V86 mode*/
+ if (!(cr0 & 1) || (eflags & VM_FLAG))
+ return;
+ /*CS and SS must always be valid*/
+ if (seg == &_cs || seg == &_ss)
+ return;
+ if (seg->checked)
+ return;
+
+ addbyte(0x83); /*CMP seg->base, -1*/
+ addbyte(0x05|0x38);
+ addlong((uint32_t)&seg->base);
+ addbyte(-1);
+ addbyte(0x0f);
+ addbyte(0x84); /*JE end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+
+ seg->checked = 1;
+}
+static inline void CHECK_SEG_LIMITS(x86seg *seg, int end_offset)
+{
+ addbyte(0x3b); /*CMP EAX, seg->limit_low*/
+ addbyte(0x05);
+ addlong((uint32_t)&seg->limit_low);
+ addbyte(0x0f); /*JB BLOCK_GPF_OFFSET*/
+ addbyte(0x82);
+ addlong(BLOCK_GPF_OFFSET - (block_pos + 4));
+ if (end_offset)
+ {
+ addbyte(0x83); /*ADD EAX, end_offset*/
+ addbyte(0xc0);
+ addbyte(end_offset);
+ addbyte(0x3b); /*CMP EAX, seg->limit_high*/
+ addbyte(0x05);
+ addlong((uint32_t)&seg->limit_high);
+ addbyte(0x0f); /*JNBE BLOCK_GPF_OFFSET*/
+ addbyte(0x87);
+ addlong(BLOCK_GPF_OFFSET - (block_pos + 4));
+ addbyte(0x83); /*SUB EAX, end_offset*/
+ addbyte(0xe8);
+ addbyte(end_offset);
+ }
+}
+
+static inline void MEM_LOAD_ADDR_EA_B(x86seg *seg)
+{
+ addbyte(0x8b); /*MOVL EDX, seg->base*/
+ addbyte(0x05 | (REG_EDX << 3));
+ addlong((uint32_t)&seg->base);
+ addbyte(0xe8); /*CALL mem_load_addr_ea_b*/
+ addlong(mem_load_addr_ea_b - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+
+ host_reg_mapping[0] = 8;
+}
+static inline int MEM_LOAD_ADDR_EA_B_NO_ABRT(x86seg *seg)
+{
+ addbyte(0x8b); /*MOVL EDX, seg->base*/
+ addbyte(0x05 | (REG_EDX << 3));
+ addlong((uint32_t)&seg->base);
+ addbyte(0xe8); /*CALL mem_load_addr_ea_b_no_abrt*/
+ addlong(mem_load_addr_ea_b_no_abrt - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+
+ host_reg_mapping[REG_ECX] = 8;
+
+ return REG_ECX;
+}
+static inline void MEM_LOAD_ADDR_EA_W(x86seg *seg)
+{
+ addbyte(0x8b); /*MOVL EDX, seg->base*/
+ addbyte(0x05 | (REG_EDX << 3));
+ addlong((uint32_t)&seg->base);
+ addbyte(0xe8); /*CALL mem_load_addr_ea_w*/
+ addlong(mem_load_addr_ea_w - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+
+ host_reg_mapping[0] = 8;
+}
+static inline void MEM_LOAD_ADDR_EA_W_OFFSET(x86seg *seg, int offset)
+{
+ addbyte(0x8b); /*MOVL EDX, seg->base*/
+ addbyte(0x05 | (REG_EDX << 3));
+ addlong((uint32_t)&seg->base);
+ addbyte(0x83); /*ADD EAX, offset*/
+ addbyte(0xc0);
+ addbyte(offset);
+ addbyte(0xe8); /*CALL mem_load_addr_ea_w*/
+ addlong(mem_load_addr_ea_w - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+
+ host_reg_mapping[0] = 8;
+}
+static inline int MEM_LOAD_ADDR_EA_W_NO_ABRT(x86seg *seg)
+{
+ addbyte(0x8b); /*MOVL EDX, seg->base*/
+ addbyte(0x05 | (REG_EDX << 3));
+ addlong((uint32_t)&seg->base);
+ addbyte(0xe8); /*CALL mem_load_addr_ea_w_no_abrt*/
+ addlong(mem_load_addr_ea_w_no_abrt - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+
+ host_reg_mapping[REG_ECX] = 8;
+
+ return REG_ECX;
+}
+static inline void MEM_LOAD_ADDR_EA_L(x86seg *seg)
+{
+ addbyte(0x8b); /*MOVL EDX, seg->base*/
+ addbyte(0x05 | (REG_EDX << 3));
+ addlong((uint32_t)&seg->base);
+ addbyte(0xe8); /*CALL mem_load_addr_ea_l*/
+ addlong(mem_load_addr_ea_l - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+
+
+ host_reg_mapping[0] = 8;
+}
+static inline int MEM_LOAD_ADDR_EA_L_NO_ABRT(x86seg *seg)
+{
+ addbyte(0x8b); /*MOVL EDX, seg->base*/
+ addbyte(0x05 | (REG_EDX << 3));
+ addlong((uint32_t)&seg->base);
+ addbyte(0xe8); /*CALL mem_load_addr_ea_l_no_abrt*/
+ addlong(mem_load_addr_ea_l_no_abrt - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+
+ host_reg_mapping[REG_ECX] = 8;
+
+ return REG_ECX;
+}
+
+static inline void MEM_LOAD_ADDR_EA_Q(x86seg *seg)
+{
+ addbyte(0x8b); /*MOVL EDX, seg->base*/
+ addbyte(0x05 | (REG_EDX << 3));
+ addlong((uint32_t)&seg->base);
+ addbyte(0xe8); /*CALL mem_load_addr_ea_q*/
+ addlong(mem_load_addr_ea_q - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+
+ host_reg_mapping[0] = 8;
+}
+
+static inline void MEM_LOAD_ADDR_IMM_B(x86seg *seg, uint32_t addr)
+{
+ addbyte(0xb8); /*MOV EAX, addr*/
+ addlong(addr);
+ MEM_LOAD_ADDR_EA_B(seg);
+}
+static inline void MEM_LOAD_ADDR_IMM_W(x86seg *seg, uint32_t addr)
+{
+ addbyte(0xb8); /*MOV EAX, addr*/
+ addlong(addr);
+ MEM_LOAD_ADDR_EA_W(seg);
+}
+static inline void MEM_LOAD_ADDR_IMM_L(x86seg *seg, uint32_t addr)
+{
+ addbyte(0xb8); /*MOV EAX, addr*/
+ addlong(addr);
+ MEM_LOAD_ADDR_EA_L(seg);
+}
+
+static inline void MEM_STORE_ADDR_EA_B(x86seg *seg, int host_reg)
+{
+ addbyte(0x8b); /*MOVL ESI, seg->base*/
+ addbyte(0x05 | (REG_ESI << 3));
+ addlong((uint32_t)&seg->base);
+ if (host_reg != REG_ECX)
+ {
+ addbyte(0x89); /*MOV ECX, host_reg*/
+ addbyte(0xc0 | REG_ECX | (host_reg << 3));
+ }
+ addbyte(0xe8); /*CALL mem_store_addr_ea_b*/
+ addlong(mem_store_addr_ea_b - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+}
+static inline void MEM_STORE_ADDR_EA_B_NO_ABRT(x86seg *seg, int host_reg)
+{
+ addbyte(0x8b); /*MOVL ESI, seg->base*/
+ addbyte(0x05 | (REG_ESI << 3));
+ addlong((uint32_t)&seg->base);
+ if (host_reg != REG_ECX)
+ {
+ addbyte(0x89); /*MOV ECX, host_reg*/
+ addbyte(0xc0 | REG_ECX | (host_reg << 3));
+ }
+ addbyte(0xe8); /*CALL mem_store_addr_ea_b_no_abrt*/
+ addlong(mem_store_addr_ea_b_no_abrt - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+}
+static inline void MEM_STORE_ADDR_EA_W(x86seg *seg, int host_reg)
+{
+ addbyte(0x8b); /*MOVL ESI, seg->base*/
+ addbyte(0x05 | (REG_ESI << 3));
+ addlong((uint32_t)&seg->base);
+ if (host_reg != REG_ECX)
+ {
+ addbyte(0x89); /*MOV ECX, host_reg*/
+ addbyte(0xc0 | REG_ECX | (host_reg << 3));
+ }
+ addbyte(0xe8); /*CALL mem_store_addr_ea_w*/
+ addlong(mem_store_addr_ea_w - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+}
+static inline void MEM_STORE_ADDR_EA_W_NO_ABRT(x86seg *seg, int host_reg)
+{
+ addbyte(0x8b); /*MOVL ESI, seg->base*/
+ addbyte(0x05 | (REG_ESI << 3));
+ addlong((uint32_t)&seg->base);
+ if (host_reg != REG_ECX)
+ {
+ addbyte(0x89); /*MOV ECX, host_reg*/
+ addbyte(0xc0 | REG_ECX | (host_reg << 3));
+ }
+ addbyte(0xe8); /*CALL mem_store_addr_ea_w_no_abrt*/
+ addlong(mem_store_addr_ea_w_no_abrt - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+}
+static inline void MEM_STORE_ADDR_EA_L(x86seg *seg, int host_reg)
+{
+ addbyte(0x8b); /*MOVL ESI, seg->base*/
+ addbyte(0x05 | (REG_ESI << 3));
+ addlong((uint32_t)&seg->base);
+ if (host_reg != REG_ECX)
+ {
+ addbyte(0x89); /*MOV ECX, host_reg*/
+ addbyte(0xc0 | REG_ECX | (host_reg << 3));
+ }
+ addbyte(0xe8); /*CALL mem_store_addr_ea_l*/
+ addlong(mem_store_addr_ea_l - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+}
+static inline void MEM_STORE_ADDR_EA_L_NO_ABRT(x86seg *seg, int host_reg)
+{
+ addbyte(0x8b); /*MOVL ESI, seg->base*/
+ addbyte(0x05 | (REG_ESI << 3));
+ addlong((uint32_t)&seg->base);
+ if (host_reg != REG_ECX)
+ {
+ addbyte(0x89); /*MOV ECX, host_reg*/
+ addbyte(0xc0 | REG_ECX | (host_reg << 3));
+ }
+ addbyte(0xe8); /*CALL mem_store_addr_ea_l_no_abrt*/
+ addlong(mem_store_addr_ea_l_no_abrt - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+}
+static inline void MEM_STORE_ADDR_EA_Q(x86seg *seg, int host_reg, int host_reg2)
+{
+ if (host_reg != REG_EBX)
+ {
+ addbyte(0x89); /*MOV EBX, host_reg*/
+ addbyte(0xc0 | REG_EBX | (host_reg << 3));
+ }
+ if (host_reg2 != REG_ECX)
+ {
+ addbyte(0x89); /*MOV ECX, host_reg2*/
+ addbyte(0xc0 | REG_ECX | (host_reg2 << 3));
+ }
+ addbyte(0x8b); /*MOVL ESI, seg->base*/
+ addbyte(0x05 | (REG_ESI << 3));
+ addlong((uint32_t)&seg->base);
+ addbyte(0xe8); /*CALL mem_store_addr_ea_q*/
+ addlong(mem_store_addr_ea_q - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+}
+
+static inline void MEM_STORE_ADDR_IMM_B(x86seg *seg, uint32_t addr, int host_reg)
+{
+ addbyte(0xb8); /*MOV EAX, addr*/
+ addlong(addr);
+ MEM_STORE_ADDR_EA_B(seg, host_reg);
+}
+static inline void MEM_STORE_ADDR_IMM_L(x86seg *seg, uint32_t addr, int host_reg)
+{
+ addbyte(0xb8); /*MOV EAX, addr*/
+ addlong(addr);
+ MEM_STORE_ADDR_EA_L(seg, host_reg);
+}
+static inline void MEM_STORE_ADDR_IMM_W(x86seg *seg, uint32_t addr, int host_reg)
+{
+ addbyte(0xb8); /*MOV EAX, addr*/
+ addlong(addr);
+ MEM_STORE_ADDR_EA_W(seg, host_reg);
+}
+
+
+static inline x86seg *FETCH_EA_16(x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc)
+{
+ int mod = (fetchdat >> 6) & 3;
+// int reg = (fetchdat >> 3) & 7;
+ int rm = fetchdat & 7;
+ if (!mod && rm == 6)
+ {
+ addbyte(0xb8); /*MOVL EAX, imm16*/
+ addlong((fetchdat >> 8) & 0xffff);
+ (*op_pc) += 2;
+ }
+ else
+ {
+ switch (mod)
+ {
+ case 0:
+ addbyte(0xa1); /*MOVL EAX, *mod1add[0][rm]*/
+ addlong((uint32_t)mod1add[0][rm]);
+ if (mod1add[1][rm] != &zero)
+ {
+ addbyte(0x03); /*ADDL EAX, *mod1add[1][rm]*/
+ addbyte(0x05);
+ addlong((uint32_t)mod1add[1][rm]);
+ }
+ break;
+ case 1:
+ addbyte(0xa1); /*MOVL EAX, *mod1add[0][rm]*/
+ addlong((uint32_t)mod1add[0][rm]);
+ addbyte(0x83); /*ADDL EAX, imm8*/
+ addbyte(0xc0 | REG_EAX);
+ addbyte((int8_t)(rmdat >> 8));
+ if (mod1add[1][rm] != &zero)
+ {
+ addbyte(0x03); /*ADDL EAX, *mod1add[1][rm]*/
+ addbyte(0x05);
+ addlong((uint32_t)mod1add[1][rm]);
+ }
+ (*op_pc)++;
+ break;
+ case 2:
+ addbyte(0xb8); /*MOVL EAX, imm16*/
+ addlong((fetchdat >> 8) & 0xffff);// pc++;
+ addbyte(0x03); /*ADDL EAX, *mod1add[0][rm]*/
+ addbyte(0x05);
+ addlong((uint32_t)mod1add[0][rm]);
+ if (mod1add[1][rm] != &zero)
+ {
+ addbyte(0x03); /*ADDL EAX, *mod1add[1][rm]*/
+ addbyte(0x05);
+ addlong((uint32_t)mod1add[1][rm]);
+ }
+ (*op_pc) += 2;
+ break;
+ }
+ addbyte(0x25); /*ANDL EAX, 0xffff*/
+ addlong(0xffff);
+
+ if (mod1seg[rm] == &ss && !op_ssegs)
+ op_ea_seg = &_ss;
+ }
+ return op_ea_seg;
+}
+
+static inline x86seg *FETCH_EA_32(x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc, int stack_offset)
+{
+ uint32_t new_eaaddr;
+ int mod = (fetchdat >> 6) & 3;
+// int reg = (fetchdat >> 3) & 7;
+ int rm = fetchdat & 7;
+
+ if (rm == 4)
+ {
+ uint8_t sib = fetchdat >> 8;
+ (*op_pc)++;
+
+ switch (mod)
+ {
+ case 0:
+ if ((sib & 7) == 5)
+ {
+ new_eaaddr = fastreadl(cs + (*op_pc) + 1);
+ addbyte(0xb8); /*MOVL EAX, imm32*/
+ addlong(new_eaaddr);// pc++;
+ (*op_pc) += 4;
+ }
+ else
+ {
+ addbyte(0x8b); /*MOVL EAX, regs[sib&7].l*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[sib & 7].l));
+ }
+ break;
+ case 1:
+ addbyte(0x8b); /*MOVL EAX, regs[sib&7].l*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[sib & 7].l));
+ addbyte(0x83); /*ADDL EAX, imm8*/
+ addbyte(0xc0 | REG_EAX);
+ addbyte((int8_t)(rmdat >> 16));
+ (*op_pc)++;
+ break;
+ case 2:
+ new_eaaddr = fastreadl(cs + (*op_pc) + 1);
+ addbyte(0xb8); /*MOVL EAX, new_eaaddr*/
+ addlong(new_eaaddr);
+ addbyte(0x03); /*ADDL EAX, regs[sib&7].l*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[sib & 7].l));
+ (*op_pc) += 4;
+ break;
+ }
+ if (stack_offset && (sib & 7) == 4 && (mod || (sib & 7) != 5)) /*ESP*/
+ {
+ if (stack_offset < 0x80 || stack_offset >= 0xffffff80)
+ {
+ addbyte(0x83);
+ addbyte(0xc0 | REG_EAX);
+ addbyte(stack_offset);
+ }
+ else
+ {
+ addbyte(0x05); /*ADDL EAX, stack_offset*/
+ addlong(stack_offset);
+ }
+ }
+ if (((sib & 7) == 4 || (mod && (sib & 7) == 5)) && !op_ssegs)
+ op_ea_seg = &_ss;
+ if (((sib >> 3) & 7) != 4)
+ {
+ switch (sib >> 6)
+ {
+ case 0:
+ addbyte(0x03); /*ADDL EAX, regs[sib&7].l*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[(sib >> 3) & 7].l));
+ break;
+ case 1:
+ addbyte(0x8B); addbyte(0x45 | (REG_EDI << 3)); addbyte((uint8_t)cpu_state_offset(regs[(sib >> 3) & 7].l)); /*MOVL EDI, reg*/
+ addbyte(0x01); addbyte(0xc0 | REG_EAX | (REG_EDI << 3)); /*ADDL EAX, EDI*/
+ addbyte(0x01); addbyte(0xc0 | REG_EAX | (REG_EDI << 3)); /*ADDL EAX, EDI*/
+ break;
+ case 2:
+ addbyte(0x8B); addbyte(0x45 | (REG_EDI << 3)); addbyte((uint8_t)cpu_state_offset(regs[(sib >> 3) & 7].l)); /*MOVL EDI, reg*/
+ addbyte(0xC1); addbyte(0xE0 | REG_EDI); addbyte(2); /*SHL EDI, 2*/
+ addbyte(0x01); addbyte(0xc0 | REG_EAX | (REG_EDI << 3)); /*ADDL EAX, EDI*/
+ break;
+ case 3:
+ addbyte(0x8B); addbyte(0x45 | (REG_EDI << 3)); addbyte((uint8_t)cpu_state_offset(regs[(sib >> 3) & 7].l)); /*MOVL EDI reg*/
+ addbyte(0xC1); addbyte(0xE0 | REG_EDI); addbyte(3); /*SHL EDI, 3*/
+ addbyte(0x01); addbyte(0xc0 | REG_EAX | (REG_EDI << 3)); /*ADDL EAX, EDI*/
+ break;
+ }
+ }
+ }
+ else
+ {
+ if (!mod && rm == 5)
+ {
+ new_eaaddr = fastreadl(cs + (*op_pc) + 1);
+ addbyte(0xb8); /*MOVL EAX, imm32*/
+ addlong(new_eaaddr);
+ (*op_pc) += 4;
+ return op_ea_seg;
+ }
+ addbyte(0x8b); /*MOVL EAX, regs[rm].l*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[rm].l));
+ cpu_state.eaaddr = cpu_state.regs[rm].l;
+ if (mod)
+ {
+ if (rm == 5 && !op_ssegs)
+ op_ea_seg = &_ss;
+ if (mod == 1)
+ {
+ addbyte(0x83); /*ADD EAX, imm8*/
+ addbyte(0xc0 | REG_EAX);
+ addbyte((int8_t)(fetchdat >> 8));
+ (*op_pc)++;
+ }
+ else
+ {
+ new_eaaddr = fastreadl(cs + (*op_pc) + 1);
+ addbyte(0x05); /*ADD EAX, imm32*/
+ addlong(new_eaaddr);
+ (*op_pc) += 4;
+ }
+ }
+ }
+ return op_ea_seg;
+}
+
+static inline x86seg *FETCH_EA(x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc, uint32_t op_32)
+{
+ if (op_32 & 0x200)
+ return FETCH_EA_32(op_ea_seg, fetchdat, op_ssegs, op_pc, 0);
+ return FETCH_EA_16(op_ea_seg, fetchdat, op_ssegs, op_pc);
+}
+
+
+static inline void LOAD_STACK_TO_EA(int off)
+{
+ if (stack32)
+ {
+ addbyte(0x8b); /*MOVL EAX,[ESP]*/
+ addbyte(0x45 | (REG_EAX << 3));
+ addbyte((uint8_t)cpu_state_offset(regs[REG_ESP].l));
+ if (off)
+ {
+ addbyte(0x83); /*ADD EAX, off*/
+ addbyte(0xc0 | (0 << 3) | REG_EAX);
+ addbyte(off);
+ }
+ }
+ else
+ {
+ addbyte(0x0f); /*MOVZX EAX,W[ESP]*/
+ addbyte(0xb7);
+ addbyte(0x45 | (REG_EAX << 3));
+ addbyte((uint8_t)cpu_state_offset(regs[REG_ESP].w));
+ if (off)
+ {
+ addbyte(0x66); /*ADD AX, off*/
+ addbyte(0x05);
+ addword(off);
+ }
+ }
+}
+
+static inline void LOAD_EBP_TO_EA(int off)
+{
+ if (stack32)
+ {
+ addbyte(0x8b); /*MOVL EAX,[EBP]*/
+ addbyte(0x45 | (REG_EAX << 3));
+ addbyte((uint8_t)cpu_state_offset(regs[REG_EBP].l));
+ if (off)
+ {
+ addbyte(0x83); /*ADD EAX, off*/
+ addbyte(0xc0 | (0 << 3) | REG_EAX);
+ addbyte(off);
+ }
+ }
+ else
+ {
+ addbyte(0x0f); /*MOVZX EAX,W[EBP]*/
+ addbyte(0xb7);
+ addbyte(0x45 | (REG_EAX << 3));
+ addbyte((uint8_t)cpu_state_offset(regs[REG_EBP].w));
+ if (off)
+ {
+ addbyte(0x66); /*ADD AX, off*/
+ addbyte(0x05);
+ addword(off);
+ }
+ }
+}
+
+static inline void SP_MODIFY(int off)
+{
+ if (stack32)
+ {
+ if (off < 0x80)
+ {
+ addbyte(0x83); /*ADD [ESP], off*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[REG_ESP].l));
+ addbyte(off);
+ }
+ else
+ {
+ addbyte(0x81); /*ADD [ESP], off*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[REG_ESP].l));
+ addlong(off);
+ }
+ }
+ else
+ {
+ if (off < 0x80)
+ {
+ addbyte(0x66); /*ADD [SP], off*/
+ addbyte(0x83);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[REG_ESP].w));
+ addbyte(off);
+ }
+ else
+ {
+ addbyte(0x66); /*ADD [SP], off*/
+ addbyte(0x81);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[REG_ESP].w));
+ addword(off);
+ }
+ }
+}
+
+
+static inline void TEST_ZERO_JUMP_W(int host_reg, uint32_t new_pc, int taken_cycles)
+{
+ addbyte(0x66); /*CMPW host_reg, 0*/
+ addbyte(0x83);
+ addbyte(0xc0 | 0x38 | host_reg);
+ addbyte(0);
+ addbyte(0x75); /*JNZ +*/
+ addbyte(7+5+(taken_cycles ? 4 : 0));
+ addbyte(0xC7); /*MOVL [pc], new_pc*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(pc));
+ addlong(new_pc);
+ if (taken_cycles)
+ {
+ addbyte(0x83); /*SUB $codegen_block_cycles, cyclcs*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(_cycles));
+ addbyte(taken_cycles);
+ }
+ addbyte(0xe9); /*JMP end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+}
+static inline void TEST_ZERO_JUMP_L(int host_reg, uint32_t new_pc, int taken_cycles)
+{
+ addbyte(0x83); /*CMPW host_reg, 0*/
+ addbyte(0xc0 | 0x38 | host_reg);
+ addbyte(0);
+ addbyte(0x75); /*JNZ +*/
+ addbyte(7+5+(taken_cycles ? 4 : 0));
+ addbyte(0xC7); /*MOVL [pc], new_pc*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(pc));
+ addlong(new_pc);
+ if (taken_cycles)
+ {
+ addbyte(0x83); /*SUB $codegen_block_cycles, cyclcs*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(_cycles));
+ addbyte(taken_cycles);
+ }
+ addbyte(0xe9); /*JMP end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+}
+
+static inline void TEST_NONZERO_JUMP_W(int host_reg, uint32_t new_pc, int taken_cycles)
+{
+ addbyte(0x66); /*CMPW host_reg, 0*/
+ addbyte(0x83);
+ addbyte(0xc0 | 0x38 | host_reg);
+ addbyte(0);
+ addbyte(0x74); /*JZ +*/
+ addbyte(7+5+(taken_cycles ? 4 : 0));
+ addbyte(0xC7); /*MOVL [pc], new_pc*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(pc));
+ addlong(new_pc);
+ if (taken_cycles)
+ {
+ addbyte(0x83); /*SUB $codegen_block_cycles, cyclcs*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(_cycles));
+ addbyte(taken_cycles);
+ }
+ addbyte(0xe9); /*JMP end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+}
+static inline void TEST_NONZERO_JUMP_L(int host_reg, uint32_t new_pc, int taken_cycles)
+{
+ addbyte(0x83); /*CMPW host_reg, 0*/
+ addbyte(0xc0 | 0x38 | host_reg);
+ addbyte(0);
+ addbyte(0x74); /*JZ +*/
+ addbyte(7+5+(taken_cycles ? 4 : 0));
+ addbyte(0xC7); /*MOVL [pc], new_pc*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(pc));
+ addlong(new_pc);
+ if (taken_cycles)
+ {
+ addbyte(0x83); /*SUB $codegen_block_cycles, cyclcs*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(_cycles));
+ addbyte(taken_cycles);
+ }
+ addbyte(0xe9); /*JMP end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+}
+
+static inline void BRANCH_COND_BE(int pc_offset, uint32_t op_pc, uint32_t offset, int not)
+{
+ switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN)
+ {
+ case FLAGS_SUB8:
+ addbyte(0x8a); /*MOV AL, flags_op1*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(flags_op1));
+ addbyte(0x3a); /*CMP AL, flags_op2*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(flags_op2));
+ if (not)
+ addbyte(0x76); /*JBE*/
+ else
+ addbyte(0x77); /*JNBE*/
+ break;
+ case FLAGS_SUB16:
+ addbyte(0x66); /*MOV AX, flags_op1*/
+ addbyte(0x8b);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(flags_op1));
+ addbyte(0x66); /*CMP AX, flags_op2*/
+ addbyte(0x3b);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(flags_op2));
+ if (not)
+ addbyte(0x76); /*JBE*/
+ else
+ addbyte(0x77); /*JNBE*/
+ break;
+ case FLAGS_SUB32:
+ addbyte(0x8b); /*MOV EAX, flags_op1*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(flags_op1));
+ addbyte(0x3b); /*CMP EAX, flags_op2*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(flags_op2));
+ if (not)
+ addbyte(0x76); /*JBE*/
+ else
+ addbyte(0x77); /*JNBE*/
+ break;
+
+ default:
+ if (codegen_flags_changed && cpu_state.flags_op != FLAGS_UNKNOWN)
+ {
+ addbyte(0x83); /*CMP flags_res, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(flags_res));
+ addbyte(0);
+ addbyte(0x74); /*JZ +*/
+ }
+ else
+ {
+ CALL_FUNC((uintptr_t)ZF_SET);
+ addbyte(0x85); /*TEST EAX,EAX*/
+ addbyte(0xc0);
+ addbyte(0x75); /*JNZ +*/
+ }
+ if (not)
+ addbyte(5+2+2+7+5+(timing_bt ? 4 : 0));
+ else
+ addbyte(5+2+2);
+ CALL_FUNC((uintptr_t)CF_SET);
+ addbyte(0x85); /*TEST EAX,EAX*/
+ addbyte(0xc0);
+ if (not)
+ addbyte(0x75); /*JNZ +*/
+ else
+ addbyte(0x74); /*JZ +*/
+ break;
+ }
+ addbyte(7+5+(timing_bt ? 4 : 0));
+ addbyte(0xC7); /*MOVL [pc], new_pc*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(pc));
+ addlong(op_pc+pc_offset+offset);
+ if (timing_bt)
+ {
+ addbyte(0x83); /*SUB $codegen_block_cycles, cyclcs*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(_cycles));
+ addbyte(timing_bt);
+ }
+ addbyte(0xe9); /*JMP end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+}
+
+static inline void BRANCH_COND_L(int pc_offset, uint32_t op_pc, uint32_t offset, int not)
+{
+ switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN)
+ {
+ case FLAGS_SUB8:
+ addbyte(0x8a); /*MOV AL, flags_op1*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(flags_op1));
+ addbyte(0x3a); /*CMP AL, flags_op2*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(flags_op2));
+ if (not)
+ addbyte(0x7c); /*JL*/
+ else
+ addbyte(0x7d); /*JNL*/
+ break;
+ case FLAGS_SUB16:
+ addbyte(0x66); /*MOV AX, flags_op1*/
+ addbyte(0x8b);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(flags_op1));
+ addbyte(0x66); /*CMP AX, flags_op2*/
+ addbyte(0x3b);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(flags_op2));
+ if (not)
+ addbyte(0x7c); /*JL*/
+ else
+ addbyte(0x7d); /*JNL*/
+ break;
+ case FLAGS_SUB32:
+ addbyte(0x8b); /*MOV EAX, flags_op1*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(flags_op1));
+ addbyte(0x3b); /*CMP EAX, flags_op2*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(flags_op2));
+ if (not)
+ addbyte(0x7c); /*JL*/
+ else
+ addbyte(0x7d); /*JNL*/
+ break;
+
+ default:
+ CALL_FUNC((uintptr_t)NF_SET);
+ addbyte(0x85); /*TEST EAX,EAX*/
+ addbyte(0xc0);
+ addbyte(0x0f); /*SETNE BL*/
+ addbyte(0x95);
+ addbyte(0xc3);
+ CALL_FUNC((uintptr_t)VF_SET);
+ addbyte(0x85); /*TEST EAX,EAX*/
+ addbyte(0xc0);
+ addbyte(0x0f); /*SETNE AL*/
+ addbyte(0x95);
+ addbyte(0xc0);
+ addbyte(0x38); /*CMP AL, BL*/
+ addbyte(0xd8);
+ if (not)
+ addbyte(0x75); /*JNZ +*/
+ else
+ addbyte(0x74); /*JZ +*/
+ break;
+ }
+ addbyte(7+5+(timing_bt ? 4 : 0));
+ addbyte(0xC7); /*MOVL [pc], new_pc*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(pc));
+ addlong(op_pc+pc_offset+offset);
+ if (timing_bt)
+ {
+ addbyte(0x83); /*SUB $codegen_block_cycles, cyclcs*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(_cycles));
+ addbyte(timing_bt);
+ }
+ addbyte(0xe9); /*JMP end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+}
+
+static inline void BRANCH_COND_LE(int pc_offset, uint32_t op_pc, uint32_t offset, int not)
+{
+ switch (codegen_flags_changed ? cpu_state.flags_op : FLAGS_UNKNOWN)
+ {
+ case FLAGS_SUB8:
+ addbyte(0x8a); /*MOV AL, flags_op1*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(flags_op1));
+ addbyte(0x3a); /*CMP AL, flags_op2*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(flags_op2));
+ if (not)
+ addbyte(0x7e); /*JLE*/
+ else
+ addbyte(0x7f); /*JNLE*/
+ break;
+ case FLAGS_SUB16:
+ addbyte(0x66); /*MOV AX, flags_op1*/
+ addbyte(0x8b);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(flags_op1));
+ addbyte(0x66); /*CMP AX, flags_op2*/
+ addbyte(0x3b);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(flags_op2));
+ if (not)
+ addbyte(0x7e); /*JLE*/
+ else
+ addbyte(0x7f); /*JNLE*/
+ break;
+ case FLAGS_SUB32:
+ addbyte(0x8b); /*MOV EAX, flags_op1*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(flags_op1));
+ addbyte(0x3b); /*CMP EAX, flags_op2*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(flags_op2));
+ if (not)
+ addbyte(0x7e); /*JLE*/
+ else
+ addbyte(0x7f); /*JNLE*/
+ break;
+
+ default:
+ if (codegen_flags_changed && cpu_state.flags_op != FLAGS_UNKNOWN)
+ {
+ addbyte(0x83); /*CMP flags_res, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(flags_res));
+ addbyte(0);
+ addbyte(0x74); /*JZ +*/
+ }
+ else
+ {
+ CALL_FUNC((uintptr_t)ZF_SET);
+ addbyte(0x85); /*TEST EAX,EAX*/
+ addbyte(0xc0);
+ addbyte(0x75); /*JNZ +*/
+ }
+ if (not)
+ addbyte(5+2+3+5+2+3+2+2+7+5+(timing_bt ? 4 : 0));
+ else
+ addbyte(5+2+3+5+2+3+2+2);
+
+ CALL_FUNC((uintptr_t)NF_SET);
+ addbyte(0x85); /*TEST EAX,EAX*/
+ addbyte(0xc0);
+ addbyte(0x0f); /*SETNE BL*/
+ addbyte(0x95);
+ addbyte(0xc3);
+ CALL_FUNC((uintptr_t)VF_SET);
+ addbyte(0x85); /*TEST EAX,EAX*/
+ addbyte(0xc0);
+ addbyte(0x0f); /*SETNE AL*/
+ addbyte(0x95);
+ addbyte(0xc0);
+ addbyte(0x38); /*CMP AL, BL*/
+ addbyte(0xd8);
+ if (not)
+ addbyte(0x75); /*JNZ +*/
+ else
+ addbyte(0x74); /*JZ +*/
+ break;
+ }
+ addbyte(7+5+(timing_bt ? 4 : 0));
+ addbyte(0xC7); /*MOVL [pc], new_pc*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(pc));
+ addlong(op_pc+pc_offset+offset);
+ if (timing_bt)
+ {
+ addbyte(0x83); /*SUB $codegen_block_cycles, cyclcs*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(_cycles));
+ addbyte(timing_bt);
+ }
+ addbyte(0xe9); /*JMP end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+}
+
+
+static inline void FP_ENTER()
+{
+ if (codegen_fpu_entered)
+ return;
+
+ addbyte(0xf6); /*TEST cr0, 0xc*/
+ addbyte(0x05);
+ addlong((uintptr_t)&cr0);
+ addbyte(0xc);
+ addbyte(0x74); /*JZ +*/
+ addbyte(7+7+5+5);
+ addbyte(0xC7); /*MOVL [oldpc],op_old_pc*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(oldpc));
+ addlong(op_old_pc);
+ addbyte(0xc7); /*MOV [ESP], 7*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addlong(7);
+ addbyte(0xe8); /*CALL x86_int*/
+ addlong((uint32_t)x86_int - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ addbyte(0xe9); /*JMP end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+
+ codegen_fpu_entered = 1;
+}
+
+static inline void FP_FLD(int reg)
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0xf3); /*MOVQ XMM0, ST[reg][EBP]*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP + reg) & 7]));
+ addbyte(0xc6); /*MOVB TOP[EBP], (TOP-1) & 7*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte((cpu_state.TOP - 1) & 7);
+ addbyte(0xf3); /*MOVQ XMM1, MM[reg][EBP]*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0x4d);
+ addbyte((uint8_t)cpu_state_offset(MM[(cpu_state.TOP + reg) & 7].q));
+ addbyte(0x66); /*MOVQ ST[-1][EBP], XMM0*/
+ addbyte(0x0f);
+ addbyte(0xd6);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP - 1) & 7]));
+ addbyte(0x8a); /*MOV AL, tag[reg][EBP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(tag[(cpu_state.TOP + reg) & 7]));
+ addbyte(0x66); /*MOVQ MM[-1][EBP], XMM1*/
+ addbyte(0x0f);
+ addbyte(0xd6);
+ addbyte(0x4d);
+ addbyte((uint8_t)cpu_state_offset(MM[(cpu_state.TOP - 1) & 7].q));
+ addbyte(0x88); /*MOV tag[-1][EBP], AL*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(tag[(cpu_state.TOP - 1) & 7]));
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EAX, [TOP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV EBX, EAX*/
+ addbyte(0xc3);
+ if (reg)
+ {
+ addbyte(0x83); /*ADD EAX, reg*/
+ addbyte(0xc0);
+ addbyte(reg);
+ addbyte(0x83); /*SUB EBX, 1*/
+ addbyte(0xeb);
+ addbyte(0x01);
+ addbyte(0x83); /*AND EAX, 7*/
+ addbyte(0xe0);
+ addbyte(0x07);
+ }
+ else
+ {
+ addbyte(0x83); /*SUB EBX, 1*/
+ addbyte(0xeb);
+ addbyte(0x01);
+ }
+
+ addbyte(0xdd); /*FLD [ST+EAX*8]*/
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe3);
+ addbyte(0x07);
+ addbyte(0x8b); /*MOV EDX, [ST_i64+EAX]*/
+ addbyte(0x54);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(MM));
+ addbyte(0x8b); /*MOV ECX, [ST_i64+4+EAX]*/
+ addbyte(0x4c);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(MM)+4);
+ addbyte(0x8a); /*MOV AL, [tag+EAX]*/
+ addbyte(0x44);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(0xdd); /*FSTP [ST+EBX*8]*/
+ addbyte(0x5c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x88); /*MOV [tag+EBX], AL*/
+ addbyte(0x44);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(0x89); /*MOV [ST_i64+EBX], EDX*/
+ addbyte(0x54);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(MM));
+ addbyte(0x89); /*MOV [ST_i64+EBX+4], ECX*/
+ addbyte(0x4c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(MM)+4);
+
+ addbyte(0x89); /*MOV [TOP], EBX*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ }
+}
+
+static inline void FP_FST(int reg)
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0xf3); /*MOVQ XMM0, ST[0][EBP]*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[cpu_state.TOP]));
+ addbyte(0x8a); /*MOV AL, tag[0][EBP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(tag[cpu_state.TOP]));
+ addbyte(0x66); /*MOVQ ST[reg][EBP], XMM0*/
+ addbyte(0x0f);
+ addbyte(0xd6);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP + reg) & 7]));
+ addbyte(0x88); /*MOV tag[reg][EBP], AL*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(tag[(cpu_state.TOP + reg) & 7]));
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EAX, [TOP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0xdd); /*FLD [ST+EAX*8]*/
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x8a); /*MOV BL, [tag+EAX]*/
+ addbyte(0x5c);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+
+ if (reg)
+ {
+ addbyte(0x83); /*ADD EAX, reg*/
+ addbyte(0xc0);
+ addbyte(reg);
+ addbyte(0x83); /*AND EAX, 7*/
+ addbyte(0xe0);
+ addbyte(0x07);
+ }
+
+ addbyte(0xdd); /*FSTP [ST+EAX*8]*/
+ addbyte(0x5c);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x88); /*MOV [tag+EAX], BL*/
+ addbyte(0x5c);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ }
+}
+
+static inline void FP_FXCH(int reg)
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0xf3); /*MOVQ XMM0, ST[0][EBP]*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[cpu_state.TOP]));
+ addbyte(0xf3); /*MOVQ XMM1, ST[reg][EBP]*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0x4d);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP + reg) & 7]));
+ addbyte(0x66); /*MOVQ ST[reg][EBP], XMM0*/
+ addbyte(0x0f);
+ addbyte(0xd6);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP + reg) & 7]));
+ addbyte(0xf3); /*MOVQ XMM2, MM[0][EBP]*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0x55);
+ addbyte((uint8_t)cpu_state_offset(MM[cpu_state.TOP].q));
+ addbyte(0x66); /*MOVQ ST[0][EBP], XMM1*/
+ addbyte(0x0f);
+ addbyte(0xd6);
+ addbyte(0x4d);
+ addbyte((uint8_t)cpu_state_offset(ST[cpu_state.TOP]));
+ addbyte(0xf3); /*MOVQ XMM3, MM[reg][EBP]*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(MM[(cpu_state.TOP + reg) & 7].q));
+ addbyte(0x66); /*MOVQ MM[reg][EBP], XMM2*/
+ addbyte(0x0f);
+ addbyte(0xd6);
+ addbyte(0x55);
+ addbyte((uint8_t)cpu_state_offset(MM[(cpu_state.TOP + reg) & 7].q));
+ addbyte(0x8a); /*MOV AL, tag[0][EBP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(tag[cpu_state.TOP]));
+ addbyte(0x66); /*MOVQ MM[0][EBP], XMM3*/
+ addbyte(0x0f);
+ addbyte(0xd6);
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(MM[cpu_state.TOP].q));
+ addbyte(0x8a); /*MOV AH, tag[reg][EBP]*/
+ addbyte(0x65);
+ addbyte((uint8_t)cpu_state_offset(tag[(cpu_state.TOP + reg) & 7]));
+ addbyte(0x88); /*MOV tag[reg][EBP], AL*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(tag[(cpu_state.TOP + reg) & 7]));
+ addbyte(0x88); /*MOV tag[0][EBP], AH*/
+ addbyte(0x65);
+ addbyte((uint8_t)cpu_state_offset(tag[cpu_state.TOP]));
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EAX, [TOP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV EBX, EAX*/
+ addbyte(0xc3);
+ addbyte(0x83); /*ADD EAX, reg*/
+ addbyte(0xc0);
+ addbyte(reg);
+
+ addbyte(0xdd); /*FLD [ST+EBX*8]*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x83); /*AND EAX, 7*/
+ addbyte(0xe0);
+ addbyte(0x07);
+ addbyte(0xdd); /*FLD [ST+EAX*8]*/
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0xdd); /*FSTP [ST+EBX*8]*/
+ addbyte(0x5c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0xdd); /*FSTP [ST+EAX*8]*/
+ addbyte(0x5c);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x8a); /*MOV CL, tag[EAX]*/
+ addbyte(0x4c);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(0x8a); /*MOV DL, tag[EBX]*/
+ addbyte(0x54);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(0x88); /*MOV tag[EBX], CL*/
+ addbyte(0x4c);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(0x88); /*MOV tag[EAX], DL*/
+ addbyte(0x54);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(0xbe); /*MOVL ESI, ST_int64*/
+ addlong((uintptr_t)cpu_state.MM);
+ addbyte(0x8b); /*MOV ECX, ST_int64[EAX*8]*/
+ addbyte(0x0c);
+ addbyte(0xc6);
+ addbyte(0x8b); /*MOV EDX, ST_int64[EBX*8]*/
+ addbyte(0x14);
+ addbyte(0xde);
+ addbyte(0x89); /*MOV ST_int64[EBX*8], ECX*/
+ addbyte(0x0c);
+ addbyte(0xde);
+ addbyte(0x89); /*MOV ST_int64[EAX*8], EDX*/
+ addbyte(0x14);
+ addbyte(0xc6);
+ addbyte(0x8b); /*MOV ECX, ST_int64[EAX*8]+4*/
+ addbyte(0x4c);
+ addbyte(0xc6);
+ addbyte(0x04);
+ addbyte(0x8b); /*MOV EDX, ST_int64[EBX*8]+4*/
+ addbyte(0x54);
+ addbyte(0xde);
+ addbyte(0x04);
+ addbyte(0x89); /*MOV ST_int64[EBX*8]+4, ECX*/
+ addbyte(0x4c);
+ addbyte(0xde);
+ addbyte(0x04);
+ addbyte(0x89); /*MOV ST_int64[EAX*8]+4, EDX*/
+ addbyte(0x54);
+ addbyte(0xc6);
+ addbyte(0x04);
+ }
+}
+
+
+static inline void FP_LOAD_S()
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0x85); /*TEST EAX, EAX*/
+ addbyte(0xc0);
+ addbyte(0xd9); /*FLD [ESP]*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0xc6); /*MOVB TOP[EBP], (TOP-1) & 7*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte((cpu_state.TOP - 1) & 7);
+ addbyte(0x0f); /*SETE tag[reg][EBP]*/
+ addbyte(0x94);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(tag[(cpu_state.TOP - 1) & 7]));
+ addbyte(0xdd); /*FSTP ST[reg][EBP]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP - 1) & 7]));
+ block_current = block_current;
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0x83); /*SUB EBX, 1*/
+ addbyte(0xeb);
+ addbyte(1);
+ addbyte(0xd9); /*FLD [ESP]*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe3);
+ addbyte(7);
+ addbyte(0x85); /*TEST EAX, EAX*/
+ addbyte(0xc0);
+ addbyte(0x89); /*MOV TOP, EBX*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0xdd); /*FSTP [ST+EBX*8]*/
+ addbyte(0x5c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x0f); /*SETE [tag+EBX]*/
+ addbyte(0x94);
+ addbyte(0x44);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ }
+}
+static inline void FP_LOAD_D()
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0x89); /*MOV ST[reg][EBP], EAX*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP - 1) & 7]));
+ addbyte(0x09); /*OR EAX, EDX*/
+ addbyte(0xd0);
+ addbyte(0x89); /*MOV ST[reg][EBP]+4, EDX*/
+ addbyte(0x55);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP - 1) & 7]) + 4);
+ addbyte(0xc6); /*MOVB TOP[EBP], (TOP-1) & 7*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte((cpu_state.TOP - 1) & 7);
+ addbyte(0x0f); /*SETE tag[reg][EBP]*/
+ addbyte(0x94);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(tag[(cpu_state.TOP - 1) & 7]));
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0x89); /*MOV [ESP+4], EDX*/
+ addbyte(0x54);
+ addbyte(0x24);
+ addbyte(0x04);
+ addbyte(0x83); /*SUB EBX, 1*/
+ addbyte(0xeb);
+ addbyte(1);
+ addbyte(0x09); /*OR EAX, EDX*/
+ addbyte(0xd0);
+ addbyte(0xdd); /*FLD [ESP]*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe3);
+ addbyte(7);
+ addbyte(0x83); /*CMP EAX, 0*/
+ addbyte(0xf8);
+ addbyte(0);
+ addbyte(0x89); /*MOV TOP, EBX*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0xdd); /*FSTP [ST+EBX*8]*/
+ addbyte(0x5c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x0f); /*SETE [tag+EBX]*/
+ addbyte(0x94);
+ addbyte(0x44);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ }
+}
+static inline void FP_LOAD_IW()
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0x66); /*MOV [ESP], AX*/
+ addbyte(0x89);
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0x66); /*TEST AX, AX*/
+ addbyte(0x85);
+ addbyte(0xc0);
+ addbyte(0xdf); /*FILDw [ESP]*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0xc6); /*MOVB TOP[EBP], (TOP-1) & 7*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte((cpu_state.TOP - 1) & 7);
+ addbyte(0x0f); /*SETE tag[reg][EBP]*/
+ addbyte(0x94);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(tag[(cpu_state.TOP - 1) & 7]));
+ addbyte(0xdd); /*FSTP ST[reg][EBP]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP - 1) & 7]));
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0x83); /*SUB EBX, 1*/
+ addbyte(0xeb);
+ addbyte(1);
+ addbyte(0xdf); /*FILDw [ESP]*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe3);
+ addbyte(7);
+ addbyte(0x83); /*CMP EAX, 0*/
+ addbyte(0xf8);
+ addbyte(0);
+ addbyte(0x89); /*MOV TOP, EBX*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0xdd); /*FSTP [ST+EBX*8]*/
+ addbyte(0x5c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x0f); /*SETE [tag+EBX]*/
+ addbyte(0x94);
+ addbyte(0x44);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ }
+}
+static inline void FP_LOAD_IL()
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0x85); /*TEST EAX, EAX*/
+ addbyte(0xc0);
+ addbyte(0xdb); /*FILDl [ESP]*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0xc6); /*MOVB TOP[EBP], (TOP-1) & 7*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte((cpu_state.TOP - 1) & 7);
+ addbyte(0x0f); /*SETE tag[reg][EBP]*/
+ addbyte(0x94);
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(tag[(cpu_state.TOP - 1) & 7]));
+ addbyte(0xdd); /*FSTP ST[reg][EBP]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP - 1) & 7]));
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0x83); /*SUB EBX, 1*/
+ addbyte(0xeb);
+ addbyte(1);
+ addbyte(0xdb); /*FILDl [ESP]*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe3);
+ addbyte(7);
+ addbyte(0x83); /*CMP EAX, 0*/
+ addbyte(0xf8);
+ addbyte(0);
+ addbyte(0x89); /*MOV TOP, EBX*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0xdd); /*FSTP [ST+EBX*8]*/
+ addbyte(0x5c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x0f); /*SETE [tag+EBX]*/
+ addbyte(0x94);
+ addbyte(0x44);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ }
+}
+static inline void FP_LOAD_IQ()
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0x89); /*MOV MM[reg][EBP], EAX*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(MM[(cpu_state.TOP - 1) & 7].q));
+ addbyte(0x09); /*OR EAX, EDX*/
+ addbyte(0xd0);
+ addbyte(0x89); /*MOV MM[reg][EBP]+4, EDX*/
+ addbyte(0x55);
+ addbyte((uint8_t)cpu_state_offset(MM[(cpu_state.TOP - 1) & 7].q) + 4);
+ addbyte(0x0f); /*SETE AL*/
+ addbyte(0x94);
+ addbyte(0xc0);
+ addbyte(0xdf); /*FILDq MM[reg][EBP]*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(MM[(cpu_state.TOP - 1) & 7].q));
+ addbyte(0x0c); /*OR AL, TAG_UINT64*/
+ addbyte(TAG_UINT64);
+ addbyte(0xc6); /*MOVB TOP[EBP], (TOP-1) & 7*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte((cpu_state.TOP - 1) & 7);
+ addbyte(0x88); /*MOV tag[reg][EBP], AL*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(tag[(cpu_state.TOP - 1) & 7]));
+ addbyte(0xdd); /*FSTP ST[reg][EBP]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP - 1) & 7]));
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x83); /*SUB EBX, 1*/
+ addbyte(0xeb);
+ addbyte(1);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe3);
+ addbyte(7);
+ addbyte(0x89); /*MOV [ST_i64+EBX*8], EAX*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(MM));
+ addbyte(0x09); /*OR EAX, EDX*/
+ addbyte(0xd0);
+ addbyte(0x89); /*MOV [ST_i64+4+EBX*8], EDX*/
+ addbyte(0x54);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(MM)+4);
+ addbyte(0x83); /*CMP EAX, 0*/
+ addbyte(0xf8);
+ addbyte(0);
+ addbyte(0xdf); /*FILDl [ST_i64+EBX*8]*/
+ addbyte(0x6c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(MM));
+ addbyte(0x0f); /*SETE AL*/
+ addbyte(0x94);
+ addbyte(0xc0);
+ addbyte(0xdd); /*FSTP [ST+EBX*8]*/
+ addbyte(0x5c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x0c); /*OR AL, TAG_UINT64*/
+ addbyte(TAG_UINT64);
+ addbyte(0x89); /*MOV TOP, EBX*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x88); /*MOV [tag+EBX], AL*/
+ addbyte(0x44);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ }
+}
+
+static inline void FP_LOAD_IMM_Q(uint64_t v)
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0xc7); /*MOV ST[reg][EBP], v*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP - 1) & 7]));
+ addlong(v & 0xffffffff);
+ addbyte(0xc7); /*MOV ST[reg][EBP]+4, v*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP - 1) & 7]) + 4);
+ addlong(v >> 32);
+ addbyte(0xc6); /*MOVB TOP[EBP], (TOP-1) & 7*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte((cpu_state.TOP - 1) & 7);
+ addbyte(0xc6); /*MOVB tag[reg][EBP], 1:0*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(tag[(cpu_state.TOP - 1) & 7]));
+ addbyte(v ? 0 : 1);
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x83); /*SUB EBX, 1*/
+ addbyte(0xeb);
+ addbyte(1);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe3);
+ addbyte(7);
+ addbyte(0xc7); /*MOV ST[EBP+EBX*8], v*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addlong(v & 0xffffffff);
+ addbyte(0xc7); /*MOV ST[EBP+EBX*8]+4, v*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST) + 4);
+ addlong(v >> 32);
+ addbyte(0xc6); /*MOVB tag[reg][EBP], 1:0*/
+ addbyte(0x44);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(v ? 0 : 1);
+ addbyte(0x89); /*MOV TOP, EBX*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ }
+}
+
+static inline int FP_LOAD_REG(int reg)
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0xdd); /*FLD ST[reg][EBP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP + reg) & 7]));
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ if (reg)
+ {
+ addbyte(0x83); /*ADD EBX, reg*/
+ addbyte(0xc3);
+ addbyte(reg);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe3);
+ addbyte(7);
+ }
+ addbyte(0xdd); /*FLD ST[EBX*8]*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ }
+ addbyte(0xd9); /*FSTP [ESP]*/
+ addbyte(0x1c);
+ addbyte(0x24);
+ addbyte(0x8b); /*MOV EAX, [ESP]*/
+ addbyte(0x04 | (REG_EBX << 3));
+ addbyte(0x24);
+
+ return REG_EBX;
+}
+
+static inline void FP_LOAD_REG_D(int reg, int *host_reg1, int *host_reg2)
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0xdd); /*FLD ST[reg][EBP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP + reg) & 7]));
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ if (reg)
+ {
+ addbyte(0x83); /*ADD EBX, reg*/
+ addbyte(0xc3);
+ addbyte(reg);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe3);
+ addbyte(7);
+ }
+ addbyte(0xdd); /*FLD ST[EBX*8]*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ }
+ addbyte(0xdd); /*FSTP [ESP]*/
+ addbyte(0x1c);
+ addbyte(0x24);
+ addbyte(0x8b); /*MOV EBX, [ESP]*/
+ addbyte(0x04 | (REG_EBX << 3));
+ addbyte(0x24);
+ addbyte(0x8b); /*MOV ECX, [ESP+4]*/
+ addbyte(0x44 | (REG_ECX << 3));
+ addbyte(0x24);
+ addbyte(0x04);
+
+ *host_reg1 = REG_EBX;
+ *host_reg2 = REG_ECX;
+}
+
+static inline int FP_LOAD_REG_INT_W(int reg)
+{
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ if (reg)
+ {
+ addbyte(0x83); /*ADD EBX, reg*/
+ addbyte(0xc3);
+ addbyte(reg);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe3);
+ addbyte(7);
+ }
+ addbyte(0xdd); /*FLD ST[EBX*8]*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+
+ addbyte(0xd9); /*FLDCW cpu_state.new_npxc*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(new_npxc));
+ addbyte(0xdb); /*FISTP [ESP]*/
+ addbyte(0x1c);
+ addbyte(0x24);
+ addbyte(0xd9); /*FLDCW cpu_state.old_npxc*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(old_npxc));
+ addbyte(0x8b); /*MOV EBX, [ESP]*/
+ addbyte(0x1c);
+ addbyte(0x24);
+
+ return REG_EBX;
+}
+static inline int FP_LOAD_REG_INT(int reg)
+{
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ if (reg)
+ {
+ addbyte(0x83); /*ADD EBX, reg*/
+ addbyte(0xc3);
+ addbyte(reg);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe3);
+ addbyte(7);
+ }
+ addbyte(0xdd); /*FLD ST[EBX*8]*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+
+ addbyte(0xd9); /*FLDCW cpu_state.new_npxc*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(new_npxc));
+ addbyte(0xdb); /*FISTP [ESP]*/
+ addbyte(0x1c);
+ addbyte(0x24);
+ addbyte(0xd9); /*FLDCW cpu_state.old_npxc*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(old_npxc));
+ addbyte(0x8b); /*MOV EBX, [ESP]*/
+ addbyte(0x1c);
+ addbyte(0x24);
+
+ return REG_EBX;
+}
+static inline void FP_LOAD_REG_INT_Q(int reg, int *host_reg1, int *host_reg2)
+{
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ if (reg)
+ {
+ addbyte(0x83); /*ADD EBX, reg*/
+ addbyte(0xc3);
+ addbyte(reg);
+ addbyte(0x83); /*AND EBX, 7*/
+ addbyte(0xe3);
+ addbyte(7);
+ }
+ if (codegen_fpu_loaded_iq[cpu_state.TOP] && (cpu_state.tag[cpu_state.TOP] & TAG_UINT64))
+ {
+ /*If we know the register was loaded with FILDq in this block and
+ has not been modified, then we can skip most of the conversion
+ and just load the 64-bit integer representation directly */
+ addbyte(0x8b); /*MOV ECX, [ST_i64+EBX*8]*/
+ addbyte(0x4c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(MM)+4);
+ addbyte(0x8b); /*MOV EBX, [ST_i64+EBX*8]*/
+ addbyte(0x5c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(MM));
+
+ return;
+ }
+
+ addbyte(0xf6); /*TEST TAG[EBX], TAG_UINT64*/
+ addbyte(0x44);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(TAG_UINT64);
+ addbyte(0x74); /*JZ +*/
+ addbyte(4+4+2);
+
+ addbyte(0x8b); /*MOV ECX, [ST_i64+EBX*8]*/
+ addbyte(0x4c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(MM)+4);
+ addbyte(0x8b); /*MOV EBX, [ST_i64+EBX*8]*/
+ addbyte(0x5c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(MM));
+
+ addbyte(0xeb); /*JMP done*/
+ addbyte(4+3+3+3+3+4);
+
+ addbyte(0xdd); /*FLD ST[EBX*8]*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+
+ addbyte(0xd9); /*FLDCW cpu_state.new_npxc*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(new_npxc));
+ addbyte(0xdf); /*FISTPQ [ESP]*/
+ addbyte(0x3c);
+ addbyte(0x24);
+ addbyte(0xd9); /*FLDCW cpu_state.old_npxc*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(old_npxc));
+ addbyte(0x8b); /*MOV EBX, [ESP]*/
+ addbyte(0x1c);
+ addbyte(0x24);
+ addbyte(0x8b); /*MOV ECX, 4[ESP]*/
+ addbyte(0x4c);
+ addbyte(0x24);
+ addbyte(4);
+
+ *host_reg1 = REG_EBX;
+ *host_reg2 = REG_ECX;
+}
+
+static inline void FP_POP()
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0xc6); /*MOVB tag[0][EBP], 3*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(tag[cpu_state.TOP]));
+ addbyte(3);
+ addbyte(0xc6); /*MOVB TOP[EBP], (TOP-1) & 7*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte((cpu_state.TOP + 1) & 7);
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EAX, TOP*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0xc6); /*MOVB tag[EAX], 3*/
+ addbyte(0x44);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(3);
+ addbyte(0x04); /*ADD AL, 1*/
+ addbyte(1);
+ addbyte(0x24); /*AND AL, 7*/
+ addbyte(7);
+ addbyte(0x88); /*MOV TOP, AL*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ }
+}
+static inline void FP_POP2()
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0xc6); /*MOVB tag[0][EBP], 3*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(tag[cpu_state.TOP]));
+ addbyte(3);
+ addbyte(0xc6); /*MOVB tag[1][EBP], 3*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(tag[(cpu_state.TOP+1)&7]));
+ addbyte(3);
+ addbyte(0xc6); /*MOVB TOP[EBP], (TOP+2) & 7*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte((cpu_state.TOP + 2) & 7);
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EAX, TOP*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0xc6); /*MOVB tag[EAX], 3*/
+ addbyte(0x44);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(3);
+ addbyte(0x04); /*ADD AL, 2*/
+ addbyte(2);
+ addbyte(0x24); /*AND AL, 7*/
+ addbyte(7);
+ addbyte(0x88); /*MOV TOP, AL*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ }
+}
+
+#define FPU_ADD 0x00
+#define FPU_DIV 0x30
+#define FPU_DIVR 0x38
+#define FPU_MUL 0x08
+#define FPU_SUB 0x20
+#define FPU_SUBR 0x28
+
+static inline void FP_OP_S(int op)
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0xdd); /*FLD ST[dst][EBP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[cpu_state.TOP]));
+ addbyte(0x80); /*AND tag[dst][EBP], ~TAG_UINT64*/
+ addbyte(0x65);
+ addbyte((uint8_t)cpu_state_offset(tag[cpu_state.TOP]));
+ addbyte(~TAG_UINT64);
+ addbyte(0xd8); /*FADD [ESP]*/
+ addbyte(0x04 | op);
+ addbyte(0x24);
+ addbyte(0xdd); /*FSTP ST[dst][EBP]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(ST[cpu_state.TOP]));
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0xdd); /*FLD ST[EBX*8]*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x80); /*AND tag[EBX], ~TAG_UINT64*/
+ addbyte(0x64);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(~TAG_UINT64);
+ addbyte(0xd8); /*FADD [ESP]*/
+ addbyte(0x04 | op);
+ addbyte(0x24);
+ addbyte(0xdd); /*FSTP [ST+EBX*8]*/
+ addbyte(0x5c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ }
+}
+static inline void FP_OP_D(int op)
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0x89); /*MOV [ESP+4], EDX*/
+ addbyte(0x54);
+ addbyte(0x24);
+ addbyte(0x04);
+ if (((cpu_state.npxc >> 10) & 3) && op == FPU_ADD)
+ {
+ addbyte(0xd9); /*FLDCW cpu_state.new_npxc*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(new_npxc));
+ }
+ addbyte(0xdd); /*FLD ST[dst][EBP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[cpu_state.TOP]));
+ addbyte(0x80); /*AND tag[dst][EBP], ~TAG_UINT64*/
+ addbyte(0x65);
+ addbyte((uint8_t)cpu_state_offset(tag[cpu_state.TOP]));
+ addbyte(~TAG_UINT64);
+ addbyte(0xdc); /*FADD [ESP]*/
+ addbyte(0x04 | op);
+ addbyte(0x24);
+ addbyte(0xdd); /*FSTP ST[dst][EBP]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(ST[cpu_state.TOP]));
+ if (((cpu_state.npxc >> 10) & 3) && op == FPU_ADD)
+ {
+ addbyte(0xd9); /*FLDCW cpu_state.old_npxc*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(old_npxc));
+ }
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ if (((cpu_state.npxc >> 10) & 3) && op == FPU_ADD)
+ {
+ addbyte(0xd9); /*FLDCW cpu_state.new_npxc*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(new_npxc));
+ }
+ addbyte(0x89); /*MOV [ESP+4], EDX*/
+ addbyte(0x54);
+ addbyte(0x24);
+ addbyte(0x04);
+ addbyte(0xdd); /*FLD ST[EBX*8]*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x80); /*AND tag[EBX], ~TAG_UINT64*/
+ addbyte(0x64);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(~TAG_UINT64);
+ addbyte(0xdc); /*FADD [ESP]*/
+ addbyte(0x04 | op);
+ addbyte(0x24);
+ addbyte(0xdd); /*FSTP [ST+EBX*8]*/
+ addbyte(0x5c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ if (((cpu_state.npxc >> 10) & 3) && op == FPU_ADD)
+ {
+ addbyte(0xd9); /*FLDCW cpu_state.old_npxc*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(old_npxc));
+ }
+ }
+}
+static inline void FP_OP_IW(int op)
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0x66); /*MOV [ESP], AX*/
+ addbyte(0x89);
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0xdd); /*FLD ST[0][EBP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[cpu_state.TOP]));
+ addbyte(0x80); /*AND tag[0][EBP], ~TAG_UINT64*/
+ addbyte(0x65);
+ addbyte((uint8_t)cpu_state_offset(tag[cpu_state.TOP]));
+ addbyte(~TAG_UINT64);
+ addbyte(0xde); /*FADD [ESP]*/
+ addbyte(0x04 | op);
+ addbyte(0x24);
+ addbyte(0xdd); /*FSTP ST[0][EBP]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(ST[cpu_state.TOP]));
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0xdd); /*FLD ST[EBX*8]*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x80); /*AND tag[EBX], ~TAG_UINT64*/
+ addbyte(0x64);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(~TAG_UINT64);
+ addbyte(0xde); /*FADD [ESP]*/
+ addbyte(0x04 | op);
+ addbyte(0x24);
+ addbyte(0xdd); /*FSTP [ST+EBX*8]*/
+ addbyte(0x5c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ }
+}
+static inline void FP_OP_IL(int op)
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0xdd); /*FLD ST[0][EBP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[cpu_state.TOP]));
+ addbyte(0x80); /*AND tag[0][EBP], ~TAG_UINT64*/
+ addbyte(0x65);
+ addbyte((uint8_t)cpu_state_offset(tag[cpu_state.TOP]));
+ addbyte(~TAG_UINT64);
+ addbyte(0xda); /*FADD [ESP]*/
+ addbyte(0x04 | op);
+ addbyte(0x24);
+ addbyte(0xdd); /*FSTP ST[0][EBP]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(ST[cpu_state.TOP]));
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0xdd); /*FLD ST[EBX*8]*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x80); /*AND tag[EBX], ~TAG_UINT64*/
+ addbyte(0x64);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(~TAG_UINT64);
+ addbyte(0xda); /*FADD [ESP]*/
+ addbyte(0x04 | op);
+ addbyte(0x24);
+ addbyte(0xdd); /*FSTP [ST+EBX*8]*/
+ addbyte(0x5c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ }
+}
+#if 0
+static inline void FP_OP_IQ(int op)
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0x89); /*MOV [ESP+4], EDX*/
+ addbyte(0x54);
+ addbyte(0x24);
+ addbyte(0x04);
+ addbyte(0xdd); /*FLD ST[0][EBP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[cpu_state.TOP]));
+ addbyte(0x80); /*AND tag[0][EBP], ~TAG_UINT64*/
+ addbyte(0x65);
+ addbyte((uint8_t)cpu_state_offset(tag[cpu_state.TOP]));
+ addbyte(~TAG_UINT64);
+ addbyte(0xdc); /*FADD [ESP]*/
+ addbyte(0x04 | op);
+ addbyte(0x24);
+ addbyte(0xdd); /*FSTP ST[0][EBP]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(ST[cpu_state.TOP]));
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0x89); /*MOV [ESP+4], EDX*/
+ addbyte(0x54);
+ addbyte(0x24);
+ addbyte(0x04);
+ addbyte(0xdd); /*FLD ST[EBX*8]*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x80); /*AND tag[EBX], ~TAG_UINT64*/
+ addbyte(0x64);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(~TAG_UINT64);
+ addbyte(0xdc); /*FADD [ESP]*/
+ addbyte(0x04 | op);
+ addbyte(0x24);
+ addbyte(0xdd); /*FSTP [ST+EBX*8]*/
+ addbyte(0x5c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ }
+}
+#endif
+#define C0 (1<<8)
+#define C1 (1<<9)
+#define C2 (1<<10)
+#define C3 (1<<14)
+
+static inline void FP_COMPARE_S()
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0xdd); /*FLD ST[0][EBP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[cpu_state.TOP]));
+ addbyte(0x8a); /*MOV BL, [npxs+1]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ addbyte(0xdb); /*FCLEX*/
+ addbyte(0xe2);
+ addbyte(0x80); /*AND BL, ~(C0|C2|C3)*/
+ addbyte(0xe3);
+ addbyte((~(C0|C2|C3)) >> 8);
+ addbyte(0xd8); /*FCOMP [ESP]*/
+ addbyte(0x04 | 0x18);
+ addbyte(0x24);
+ addbyte(0xdf); /*FSTSW AX*/
+ addbyte(0xe0);
+ addbyte(0x80); /*AND AH, (C0|C2|C3)*/
+ addbyte(0xe4);
+ addbyte((C0|C2|C3) >> 8);
+ addbyte(0x08); /*OR BL, AH*/
+ addbyte(0xe3);
+ addbyte(0x88); /*MOV [npxs+1], BL*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0xdd); /*FLD ST[EBX*8]*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x8a); /*MOV BL, [npxs+1]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ addbyte(0xdb); /*FCLEX*/
+ addbyte(0xe2);
+ addbyte(0x80); /*AND BL, ~(C0|C2|C3)*/
+ addbyte(0xe3);
+ addbyte((~(C0|C2|C3)) >> 8);
+ addbyte(0xd8); /*FCOMP [ESP]*/
+ addbyte(0x04 | 0x18);
+ addbyte(0x24);
+ addbyte(0xdf); /*FSTSW AX*/
+ addbyte(0xe0);
+ addbyte(0x80); /*AND AH, (C0|C2|C3)*/
+ addbyte(0xe4);
+ addbyte((C0|C2|C3) >> 8);
+ addbyte(0x08); /*OR BL, AH*/
+ addbyte(0xe3);
+ addbyte(0x88); /*MOV [npxs+1], BL*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ }
+}
+static inline void FP_COMPARE_D()
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0x89); /*MOV [ESP+4], EDX*/
+ addbyte(0x54);
+ addbyte(0x24);
+ addbyte(0x04);
+ addbyte(0xdd); /*FLD ST[0][EBP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[cpu_state.TOP]));
+ addbyte(0x8a); /*MOV BL, [npxs+1]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ addbyte(0xdb); /*FCLEX*/
+ addbyte(0xe2);
+ addbyte(0x80); /*AND BL, ~(C0|C2|C3)*/
+ addbyte(0xe3);
+ addbyte((~(C0|C2|C3)) >> 8);
+ addbyte(0xdc); /*FCOMP [ESP]*/
+ addbyte(0x04 | 0x18);
+ addbyte(0x24);
+ addbyte(0xdf); /*FSTSW AX*/
+ addbyte(0xe0);
+ addbyte(0x80); /*AND AH, (C0|C2|C3)*/
+ addbyte(0xe4);
+ addbyte((C0|C2|C3) >> 8);
+ addbyte(0x08); /*OR BL, AH*/
+ addbyte(0xe3);
+ addbyte(0x88); /*MOV [npxs+1], BL*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0x89); /*MOV [ESP+4], EDX*/
+ addbyte(0x54);
+ addbyte(0x24);
+ addbyte(0x04);
+ addbyte(0xdd); /*FLD ST[EBX*8]*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x8a); /*MOV BL, [npxs+1]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ addbyte(0xdb); /*FCLEX*/
+ addbyte(0xe2);
+ addbyte(0x80); /*AND BL, ~(C0|C2|C3)*/
+ addbyte(0xe3);
+ addbyte((~(C0|C2|C3)) >> 8);
+ addbyte(0xdc); /*FCOMP [ESP]*/
+ addbyte(0x04 | 0x18);
+ addbyte(0x24);
+ addbyte(0xdf); /*FSTSW AX*/
+ addbyte(0xe0);
+ addbyte(0x80); /*AND AH, (C0|C2|C3)*/
+ addbyte(0xe4);
+ addbyte((C0|C2|C3) >> 8);
+ addbyte(0x08); /*OR BL, AH*/
+ addbyte(0xe3);
+ addbyte(0x88); /*MOV [npxs+1], BL*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ }
+}
+static inline void FP_COMPARE_IW()
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0x66); /*MOV [ESP], AX*/
+ addbyte(0x89);
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0xdd); /*FLD ST[0][EBP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[cpu_state.TOP]));
+ addbyte(0x8a); /*MOV BL, [npxs+1]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ addbyte(0xdb); /*FCLEX*/
+ addbyte(0xe2);
+ addbyte(0x80); /*AND BL, ~(C0|C2|C3)*/
+ addbyte(0xe3);
+ addbyte((~(C0|C2|C3)) >> 8);
+ addbyte(0xde); /*FCOMP [ESP]*/
+ addbyte(0x04 | 0x18);
+ addbyte(0x24);
+ addbyte(0xdf); /*FSTSW AX*/
+ addbyte(0xe0);
+ addbyte(0x80); /*AND AH, (C0|C2|C3)*/
+ addbyte(0xe4);
+ addbyte((C0|C2|C3) >> 8);
+ addbyte(0x08); /*OR BL, AH*/
+ addbyte(0xe3);
+ addbyte(0x88); /*MOV [npxs+1], BL*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0xdd); /*FLD ST[EBX*8]*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x8a); /*MOV BL, [npxs+1]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ addbyte(0xdb); /*FCLEX*/
+ addbyte(0xe2);
+ addbyte(0x80); /*AND BL, ~(C0|C2|C3)*/
+ addbyte(0xe3);
+ addbyte((~(C0|C2|C3)) >> 8);
+ addbyte(0xde); /*FCOMP [ESP]*/
+ addbyte(0x04 | 0x18);
+ addbyte(0x24);
+ addbyte(0xdf); /*FSTSW AX*/
+ addbyte(0xe0);
+ addbyte(0x80); /*AND AH, (C0|C2|C3)*/
+ addbyte(0xe4);
+ addbyte((C0|C2|C3) >> 8);
+ addbyte(0x08); /*OR BL, AH*/
+ addbyte(0xe3);
+ addbyte(0x88); /*MOV [npxs+1], BL*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ }
+}
+static inline void FP_COMPARE_IL()
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0xdd); /*FLD ST[0][EBP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[cpu_state.TOP]));
+ addbyte(0x8a); /*MOV BL, [npxs+1]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ addbyte(0xdb); /*FCLEX*/
+ addbyte(0xe2);
+ addbyte(0x80); /*AND BL, ~(C0|C2|C3)*/
+ addbyte(0xe3);
+ addbyte((~(C0|C2|C3)) >> 8);
+ addbyte(0xda); /*FCOMP [ESP]*/
+ addbyte(0x04 | 0x18);
+ addbyte(0x24);
+ addbyte(0xdf); /*FSTSW AX*/
+ addbyte(0xe0);
+ addbyte(0x80); /*AND AH, (C0|C2|C3)*/
+ addbyte(0xe4);
+ addbyte((C0|C2|C3) >> 8);
+ addbyte(0x08); /*OR BL, AH*/
+ addbyte(0xe3);
+ addbyte(0x88); /*MOV [npxs+1], BL*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EBX, TOP*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV [ESP], EAX*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addbyte(0xdd); /*FLD ST[EBX*8]*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x8a); /*MOV BL, [npxs+1]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ addbyte(0xdb); /*FCLEX*/
+ addbyte(0xe2);
+ addbyte(0x80); /*AND BL, ~(C0|C2|C3)*/
+ addbyte(0xe3);
+ addbyte((~(C0|C2|C3)) >> 8);
+ addbyte(0xda); /*FCOMP [ESP]*/
+ addbyte(0x04 | 0x18);
+ addbyte(0x24);
+ addbyte(0xdf); /*FSTSW AX*/
+ addbyte(0xe0);
+ addbyte(0x80); /*AND AH, (C0|C2|C3)*/
+ addbyte(0xe4);
+ addbyte((C0|C2|C3) >> 8);
+ addbyte(0x08); /*OR BL, AH*/
+ addbyte(0xe3);
+ addbyte(0x88); /*MOV [npxs+1], BL*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ }
+}
+
+static inline void FP_OP_REG(int op, int dst, int src)
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0xdd); /*FLD ST[dst][EBP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP + dst) & 7]));
+ addbyte(0xdc); /*FADD ST[src][EBP]*/
+ addbyte(0x45 | op);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP + src) & 7]));
+ addbyte(0x80); /*AND tag[dst][EBP], ~TAG_UINT64*/
+ addbyte(0x65);
+ addbyte((uint8_t)cpu_state_offset(tag[(cpu_state.TOP + dst) & 7]));
+ addbyte(~TAG_UINT64);
+ addbyte(0xdd); /*FSTP ST[dst][EBP]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP + dst) & 7]));
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EAX, TOP*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV EBX, EAX*/
+ addbyte(0xc3);
+ if (src || dst)
+ {
+ addbyte(0x83); /*ADD EAX, 1*/
+ addbyte(0xc0);
+ addbyte(src ? src : dst);
+ addbyte(0x83); /*AND EAX, 7*/
+ addbyte(0xe0);
+ addbyte(7);
+ }
+
+ if (src)
+ {
+ addbyte(0xdd); /*FLD ST[EBX*8]*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x80); /*AND tag[EBX], ~TAG_UINT64*/
+ addbyte(0x64);
+ addbyte(0x1d);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(~TAG_UINT64);
+ addbyte(0xdc); /*FADD ST[EAX*8]*/
+ addbyte(0x44 | op);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0xdd); /*FSTP ST[EBX*8]*/
+ addbyte(0x5c);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ }
+ else
+ {
+ addbyte(0xdd); /*FLD [ESI+EAX*8]*/
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x80); /*AND tag[EAX], ~TAG_UINT64*/
+ addbyte(0x64);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(~TAG_UINT64);
+ addbyte(0xdc); /*FADD ST[EBX*8]*/
+ addbyte(0x44 | op);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0xdd); /*FSTP ST[EAX*8]*/
+ addbyte(0x5c);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ }
+ }
+}
+
+static inline void FP_COMPARE_REG(int dst, int src)
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0x8a); /*MOV CL, [npxs+1]*/
+ addbyte(0x4d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ addbyte(0xdb); /*FCLEX*/
+ addbyte(0xe2);
+ addbyte(0xdd); /*FLD ST[dst][EBP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP + dst) & 7]));
+ addbyte(0x80); /*AND CL, ~(C0|C2|C3)*/
+ addbyte(0xe1);
+ addbyte((~(C0|C2|C3)) >> 8);
+ addbyte(0xdc); /*FCOMP ST[src][EBP]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(ST[(cpu_state.TOP + src) & 7]));
+ addbyte(0xdf); /*FSTSW AX*/
+ addbyte(0xe0);
+ addbyte(0x80); /*AND AH, (C0|C2|C3)*/
+ addbyte(0xe4);
+ addbyte((C0|C2|C3) >> 8);
+ addbyte(0x08); /*OR CL, AH*/
+ addbyte(0xe1);
+ addbyte(0x88); /*MOV [npxs+1], CL*/
+ addbyte(0x4d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EAX, TOP*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV EBX, EAX*/
+ addbyte(0xc3);
+ if (src || dst)
+ {
+ addbyte(0x83); /*ADD EAX, 1*/
+ addbyte(0xc0);
+ addbyte(src ? src : dst);
+ addbyte(0x83); /*AND EAX, 7*/
+ addbyte(0xe0);
+ addbyte(7);
+ }
+
+ addbyte(0x8a); /*MOV CL, [npxs+1]*/
+ addbyte(0x4d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ addbyte(0xdb); /*FCLEX*/
+ addbyte(0xe2);
+ addbyte(0x80); /*AND CL, ~(C0|C2|C3)*/
+ addbyte(0xe1);
+ addbyte((~(C0|C2|C3)) >> 8);
+
+ if (src)
+ {
+ addbyte(0xdd); /*FLD ST[EBX*8]*/
+ addbyte(0x44);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0xdc); /*FCOMP ST[EAX*8]*/
+ addbyte(0x44 | 0x18);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ }
+ else
+ {
+ addbyte(0xdd); /*FLD [ESI+EAX*8]*/
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0xdc); /*FCOMP ST[EBX*8]*/
+ addbyte(0x44 | 0x18);
+ addbyte(0xdd);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ }
+
+ addbyte(0xdf); /*FSTSW AX*/
+ addbyte(0xe0);
+ addbyte(0x80); /*AND AH, (C0|C2|C3)*/
+ addbyte(0xe4);
+ addbyte((C0|C2|C3) >> 8);
+ addbyte(0x08); /*OR CL, AH*/
+ addbyte(0xe1);
+ addbyte(0x88); /*MOV [npxs+1], CL*/
+ addbyte(0x4d);
+ addbyte((uint8_t)cpu_state_offset(npxs) + 1);
+ }
+}
+
+static inline void FP_FCHS()
+{
+ if (codeblock[block_current].flags & CODEBLOCK_STATIC_TOP)
+ {
+ addbyte(0xdd); /*FLD ST[0][EBP]*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ST[cpu_state.TOP]));
+ addbyte(0xd9); /*FCHS*/
+ addbyte(0xe0);
+ addbyte(0x80); /*AND tag[dst][EBP], ~TAG_UINT64*/
+ addbyte(0x65);
+ addbyte((uint8_t)cpu_state_offset(tag[cpu_state.TOP]));
+ addbyte(~TAG_UINT64);
+ addbyte(0xdd); /*FSTP ST[dst][EBP]*/
+ addbyte(0x5d);
+ addbyte((uint8_t)cpu_state_offset(ST[cpu_state.TOP]));
+ }
+ else
+ {
+ addbyte(0x8b); /*MOV EAX, TOP*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+
+ addbyte(0xdd); /*FLD [ESI+EAX*8]*/
+ addbyte(0x44);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ addbyte(0x80); /*AND tag[EAX], ~TAG_UINT64*/
+ addbyte(0x64);
+ addbyte(0x05);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(~TAG_UINT64);
+ addbyte(0xd9); /*FCHS*/
+ addbyte(0xe0);
+ addbyte(0xdd); /*FSTP ST[EAX*8]*/
+ addbyte(0x5c);
+ addbyte(0xc5);
+ addbyte((uint8_t)cpu_state_offset(ST));
+ }
+}
+
+static inline void UPDATE_NPXC(int reg)
+{
+ addbyte(0x66); /*AND cpu_state.new_npxc, ~0xc00*/
+ addbyte(0x81);
+ addbyte(0x65);
+ addbyte((uint8_t)cpu_state_offset(new_npxc));
+ addword(~0xc00);
+ if (reg)
+ {
+ addbyte(0x66); /*AND reg, 0xc00*/
+ addbyte(0x81);
+ addbyte(0xe0 | reg);
+ addword(0xc00);
+ }
+ else
+ {
+ addbyte(0x66); /*AND AX, 0xc00*/
+ addbyte(0x25);
+ addword(0xc00);
+ }
+ addbyte(0x66); /*OR cpu_state.new_npxc, reg*/
+ addbyte(0x09);
+ addbyte(0x45 | (reg << 3));
+ addbyte((uint8_t)cpu_state_offset(new_npxc));
+}
+
+static inline int ZERO_EXTEND_W_B(int reg)
+{
+ addbyte(0x0f); /*MOVZX regl, regb*/
+ addbyte(0xb6);
+ addbyte(0xc0 | reg | (reg << 3));
+ return reg;
+}
+static inline int ZERO_EXTEND_L_B(int reg)
+{
+ addbyte(0x0f); /*MOVZX regl, regb*/
+ addbyte(0xb6);
+ addbyte(0xc0 | reg | (reg << 3));
+ return reg;
+}
+static inline int ZERO_EXTEND_L_W(int reg)
+{
+ addbyte(0x0f); /*MOVZX regl, regw*/
+ addbyte(0xb7);
+ addbyte(0xc0 | reg | (reg << 3));
+ return reg;
+}
+
+static inline int SIGN_EXTEND_W_B(int reg)
+{
+ addbyte(0x0f); /*MOVSX regl, regb*/
+ addbyte(0xbe);
+ addbyte(0xc0 | reg | (reg << 3));
+ return reg;
+}
+static inline int SIGN_EXTEND_L_B(int reg)
+{
+ addbyte(0x0f); /*MOVSX regl, regb*/
+ addbyte(0xbe);
+ addbyte(0xc0 | reg | (reg << 3));
+ return reg;
+}
+static inline int SIGN_EXTEND_L_W(int reg)
+{
+ addbyte(0x0f); /*MOVSX regl, regw*/
+ addbyte(0xbf);
+ addbyte(0xc0 | reg | (reg << 3));
+ return reg;
+}
+
+static inline int COPY_REG(int src_reg)
+{
+ return src_reg;
+}
+
+static inline void SET_BITS(uintptr_t addr, uint32_t val)
+{
+ if (val & ~0xff)
+ {
+ addbyte(0x81);
+ addbyte(0x0d);
+ addlong(addr);
+ addlong(val);
+ }
+ else
+ {
+ addbyte(0x80);
+ addbyte(0x0d);
+ addlong(addr);
+ addbyte(val);
+ }
+}
+static inline void CLEAR_BITS(uintptr_t addr, uint32_t val)
+{
+ if (val & ~0xff)
+ {
+ addbyte(0x81);
+ addbyte(0x25);
+ addlong(addr);
+ addlong(~val);
+ }
+ else
+ {
+ addbyte(0x80);
+ addbyte(0x25);
+ addlong(addr);
+ addbyte(~val);
+ }
+}
+
+#define LOAD_Q_REG_1 REG_EAX
+#define LOAD_Q_REG_2 REG_EDX
+
+static inline void MMX_ENTER()
+{
+ if (codegen_mmx_entered)
+ return;
+
+ addbyte(0xf6); /*TEST cr0, 0xc*/
+ addbyte(0x05);
+ addlong((uintptr_t)&cr0);
+ addbyte(0xc);
+ addbyte(0x74); /*JZ +*/
+ addbyte(7+7+5+5);
+ addbyte(0xC7); /*MOVL [oldpc],op_old_pc*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(oldpc));
+ addlong(op_old_pc);
+ addbyte(0xc7); /*MOV [ESP], 7*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addlong(7);
+ addbyte(0xe8); /*CALL x86_int*/
+ addlong((uint32_t)x86_int - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ addbyte(0xe9); /*JMP end*/
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+
+ addbyte(0x31); /*XOR EAX, EAX*/
+ addbyte(0xc0);
+ addbyte(0xc6); /*MOV ISMMX, 1*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ismmx));
+ addbyte(1);
+ addbyte(0x89); /*MOV TOP, EAX*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(TOP));
+ addbyte(0x89); /*MOV tag, EAX*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(tag[0]));
+ addbyte(0x89); /*MOV tag+4, EAX*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(tag[4]));
+
+ codegen_mmx_entered = 1;
+}
+
+extern int mmx_ebx_ecx_loaded;
+
+static inline int LOAD_MMX_D(int guest_reg)
+{
+ int host_reg = find_host_reg();
+ host_reg_mapping[host_reg] = 100;
+
+ addbyte(0x8b); /*MOV EBX, reg*/
+ addbyte(0x45 | (host_reg << 3));
+ addbyte((uint8_t)cpu_state_offset(MM[guest_reg].l[0]));
+
+ return host_reg;
+}
+static inline void LOAD_MMX_Q(int guest_reg, int *host_reg1, int *host_reg2)
+{
+ if (!mmx_ebx_ecx_loaded)
+ {
+ *host_reg1 = REG_EBX;
+ *host_reg2 = REG_ECX;
+ mmx_ebx_ecx_loaded = 1;
+ }
+ else
+ {
+ *host_reg1 = REG_EAX;
+ *host_reg2 = REG_EDX;
+ }
+
+ addbyte(0x8b); /*MOV EBX, reg*/
+ addbyte(0x45 | ((*host_reg1) << 3));
+ addbyte((uint8_t)cpu_state_offset(MM[guest_reg].l[0]));
+ addbyte(0x8b); /*MOV ECX, reg+4*/
+ addbyte(0x45 | ((*host_reg2) << 3));
+ addbyte((uint8_t)cpu_state_offset(MM[guest_reg].l[1]));
+}
+static inline int LOAD_MMX_Q_MMX(int guest_reg)
+{
+ int dst_reg = find_host_xmm_reg();
+ host_reg_xmm_mapping[dst_reg] = guest_reg;
+
+ addbyte(0xf3); /*MOVQ dst_reg,[reg]*/
+ addbyte(0x0f);
+ addbyte(0x7e);
+ addbyte(0x45 | (dst_reg << 3));
+ addbyte((uint8_t)cpu_state_offset(MM[guest_reg].q));
+
+ return dst_reg;
+}
+
+static inline int LOAD_INT_TO_MMX(int src_reg1, int src_reg2)
+{
+ int dst_reg = find_host_xmm_reg();
+ host_reg_xmm_mapping[dst_reg] = 100;
+
+ addbyte(0x66); /*MOVD dst_reg, src_reg1*/
+ addbyte(0x0f);
+ addbyte(0x6e);
+ addbyte(0xc0 | (dst_reg << 3) | src_reg1);
+ addbyte(0x66); /*MOVD XMM7, src_reg2*/
+ addbyte(0x0f);
+ addbyte(0x6e);
+ addbyte(0xc0 | (7 << 3) | src_reg2);
+ addbyte(0x66); /*PUNPCKLDQ dst_reg, XMM7*/
+ addbyte(0x0f);
+ addbyte(0x62);
+ addbyte(0xc0 | 7 | (dst_reg << 3));
+
+ return dst_reg;
+}
+
+static inline void STORE_MMX_LQ(int guest_reg, int host_reg1)
+{
+ addbyte(0xC7); /*MOVL [reg],0*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(MM[guest_reg].l[1]));
+ addlong(0);
+ addbyte(0x89); /*MOVL [reg],host_reg*/
+ addbyte(0x45 | (host_reg1 << 3));
+ addbyte((uint8_t)cpu_state_offset(MM[guest_reg].l[0]));
+}
+static inline void STORE_MMX_Q(int guest_reg, int host_reg1, int host_reg2)
+{
+ addbyte(0x89); /*MOVL [reg],host_reg*/
+ addbyte(0x45 | (host_reg1 << 3));
+ addbyte((uint8_t)cpu_state_offset(MM[guest_reg].l[0]));
+ addbyte(0x89); /*MOVL [reg],host_reg*/
+ addbyte(0x45 | (host_reg2 << 3));
+ addbyte((uint8_t)cpu_state_offset(MM[guest_reg].l[1]));
+}
+static inline void STORE_MMX_Q_MMX(int guest_reg, int host_reg)
+{
+ addbyte(0x66); /*MOVQ [guest_reg],host_reg*/
+ addbyte(0x0f);
+ addbyte(0xd6);
+ addbyte(0x45 | (host_reg << 3));
+ addbyte((uint8_t)cpu_state_offset(MM[guest_reg].q));
+}
+
+#define MMX_x86_OP(name, opcode) \
+static inline void MMX_ ## name(int dst_reg, int src_reg) \
+{ \
+ addbyte(0x66); /*op dst_reg, src_reg*/ \
+ addbyte(0x0f); \
+ addbyte(opcode); \
+ addbyte(0xc0 | (dst_reg << 3) | src_reg); \
+}
+
+MMX_x86_OP(AND, 0xdb)
+MMX_x86_OP(ANDN, 0xdf)
+MMX_x86_OP(OR, 0xeb)
+MMX_x86_OP(XOR, 0xef)
+
+MMX_x86_OP(ADDB, 0xfc)
+MMX_x86_OP(ADDW, 0xfd)
+MMX_x86_OP(ADDD, 0xfe)
+MMX_x86_OP(ADDSB, 0xec)
+MMX_x86_OP(ADDSW, 0xed)
+MMX_x86_OP(ADDUSB, 0xdc)
+MMX_x86_OP(ADDUSW, 0xdd)
+
+MMX_x86_OP(SUBB, 0xf8)
+MMX_x86_OP(SUBW, 0xf9)
+MMX_x86_OP(SUBD, 0xfa)
+MMX_x86_OP(SUBSB, 0xe8)
+MMX_x86_OP(SUBSW, 0xe9)
+MMX_x86_OP(SUBUSB, 0xd8)
+MMX_x86_OP(SUBUSW, 0xd9)
+
+MMX_x86_OP(PUNPCKLBW, 0x60);
+MMX_x86_OP(PUNPCKLWD, 0x61);
+MMX_x86_OP(PUNPCKLDQ, 0x62);
+MMX_x86_OP(PCMPGTB, 0x64);
+MMX_x86_OP(PCMPGTW, 0x65);
+MMX_x86_OP(PCMPGTD, 0x66);
+
+MMX_x86_OP(PCMPEQB, 0x74);
+MMX_x86_OP(PCMPEQW, 0x75);
+MMX_x86_OP(PCMPEQD, 0x76);
+
+MMX_x86_OP(PSRLW, 0xd1);
+MMX_x86_OP(PSRLD, 0xd2);
+MMX_x86_OP(PSRLQ, 0xd3);
+MMX_x86_OP(PSRAW, 0xe1);
+MMX_x86_OP(PSRAD, 0xe2);
+MMX_x86_OP(PSLLW, 0xf1);
+MMX_x86_OP(PSLLD, 0xf2);
+MMX_x86_OP(PSLLQ, 0xf3);
+
+MMX_x86_OP(PMULLW, 0xd5);
+MMX_x86_OP(PMULHW, 0xe5);
+MMX_x86_OP(PMADDWD, 0xf5);
+
+static inline void MMX_PACKSSWB(int dst_reg, int src_reg)
+{
+ addbyte(0x66); /*PACKSSWB dst_reg, src_reg*/
+ addbyte(0x0f);
+ addbyte(0x63);
+ addbyte(0xc0 | (dst_reg << 3) | src_reg);
+ addbyte(0x66); /*PSHUFD dst_reg, dst_reg*/
+ addbyte(0x0f);
+ addbyte(0x70);
+ addbyte(0xc0 | (dst_reg << 3) | dst_reg);
+ addbyte(0x08);
+}
+static inline void MMX_PACKUSWB(int dst_reg, int src_reg)
+{
+ addbyte(0x66); /*PACKUSWB dst_reg, src_reg*/
+ addbyte(0x0f);
+ addbyte(0x67);
+ addbyte(0xc0 | (dst_reg << 3) | src_reg);
+ addbyte(0x66); /*PSHUFD dst_reg, dst_reg*/
+ addbyte(0x0f);
+ addbyte(0x70);
+ addbyte(0xc0 | (dst_reg << 3) | dst_reg);
+ addbyte(0x08);
+}
+static inline void MMX_PACKSSDW(int dst_reg, int src_reg)
+{
+ addbyte(0x66); /*PACKSSDW dst_reg, src_reg*/
+ addbyte(0x0f);
+ addbyte(0x6b);
+ addbyte(0xc0 | (dst_reg << 3) | src_reg);
+ addbyte(0x66); /*PSHUFD dst_reg, dst_reg*/
+ addbyte(0x0f);
+ addbyte(0x70);
+ addbyte(0xc0 | (dst_reg << 3) | dst_reg);
+ addbyte(0x08);
+}
+static inline void MMX_PUNPCKHBW(int dst_reg, int src_reg)
+{
+ addbyte(0x66); /*PUNPCKLBW dst_reg, src_reg*/
+ addbyte(0x0f);
+ addbyte(0x60);
+ addbyte(0xc0 | (dst_reg << 3) | src_reg);
+ addbyte(0x66); /*PSHUFD dst_reg, dst_reg*/
+ addbyte(0x0f);
+ addbyte(0x70);
+ addbyte(0xc0 | (dst_reg << 3) | dst_reg);
+ addbyte(0x0e);
+}
+static inline void MMX_PUNPCKHWD(int dst_reg, int src_reg)
+{
+ addbyte(0x66); /*PUNPCKLWD dst_reg, src_reg*/
+ addbyte(0x0f);
+ addbyte(0x61);
+ addbyte(0xc0 | (dst_reg << 3) | src_reg);
+ addbyte(0x66); /*PSHUFD dst_reg, dst_reg*/
+ addbyte(0x0f);
+ addbyte(0x70);
+ addbyte(0xc0 | (dst_reg << 3) | dst_reg);
+ addbyte(0x0e);
+}
+static inline void MMX_PUNPCKHDQ(int dst_reg, int src_reg)
+{
+ addbyte(0x66); /*PUNPCKLDQ dst_reg, src_reg*/
+ addbyte(0x0f);
+ addbyte(0x62);
+ addbyte(0xc0 | (dst_reg << 3) | src_reg);
+ addbyte(0x66); /*PSHUFD dst_reg, dst_reg*/
+ addbyte(0x0f);
+ addbyte(0x70);
+ addbyte(0xc0 | (dst_reg << 3) | dst_reg);
+ addbyte(0x0e);
+}
+
+static inline void MMX_PSRLW_imm(int dst_reg, int amount)
+{
+ addbyte(0x66); /*PSRLW dst_reg, amount*/
+ addbyte(0x0f);
+ addbyte(0x71);
+ addbyte(0xc0 | dst_reg | 0x10);
+ addbyte(amount);
+}
+static inline void MMX_PSRAW_imm(int dst_reg, int amount)
+{
+ addbyte(0x66); /*PSRAW dst_reg, amount*/
+ addbyte(0x0f);
+ addbyte(0x71);
+ addbyte(0xc0 | dst_reg | 0x20);
+ addbyte(amount);
+}
+static inline void MMX_PSLLW_imm(int dst_reg, int amount)
+{
+ addbyte(0x66); /*PSLLW dst_reg, amount*/
+ addbyte(0x0f);
+ addbyte(0x71);
+ addbyte(0xc0 | dst_reg | 0x30);
+ addbyte(amount);
+}
+
+static inline void MMX_PSRLD_imm(int dst_reg, int amount)
+{
+ addbyte(0x66); /*PSRLD dst_reg, amount*/
+ addbyte(0x0f);
+ addbyte(0x72);
+ addbyte(0xc0 | dst_reg | 0x10);
+ addbyte(amount);
+}
+static inline void MMX_PSRAD_imm(int dst_reg, int amount)
+{
+ addbyte(0x66); /*PSRAD dst_reg, amount*/
+ addbyte(0x0f);
+ addbyte(0x72);
+ addbyte(0xc0 | dst_reg | 0x20);
+ addbyte(amount);
+}
+static inline void MMX_PSLLD_imm(int dst_reg, int amount)
+{
+ addbyte(0x66); /*PSLLD dst_reg, amount*/
+ addbyte(0x0f);
+ addbyte(0x72);
+ addbyte(0xc0 | dst_reg | 0x30);
+ addbyte(amount);
+}
+
+static inline void MMX_PSRLQ_imm(int dst_reg, int amount)
+{
+ addbyte(0x66); /*PSRLQ dst_reg, amount*/
+ addbyte(0x0f);
+ addbyte(0x73);
+ addbyte(0xc0 | dst_reg | 0x10);
+ addbyte(amount);
+}
+static inline void MMX_PSRAQ_imm(int dst_reg, int amount)
+{
+ addbyte(0x66); /*PSRAQ dst_reg, amount*/
+ addbyte(0x0f);
+ addbyte(0x73);
+ addbyte(0xc0 | dst_reg | 0x20);
+ addbyte(amount);
+}
+static inline void MMX_PSLLQ_imm(int dst_reg, int amount)
+{
+ addbyte(0x66); /*PSLLQ dst_reg, amount*/
+ addbyte(0x0f);
+ addbyte(0x73);
+ addbyte(0xc0 | dst_reg | 0x30);
+ addbyte(amount);
+}
+
+
+static inline void SAVE_EA()
+{
+ addbyte(0x89); /*MOV [ESP+12], EAX*/
+ addbyte(0x44);
+ addbyte(0x24);
+ addbyte(12);
+}
+static inline void LOAD_EA()
+{
+ addbyte(0x8b); /*MOV EAX, [ESP+12]*/
+ addbyte(0x44);
+ addbyte(0x24);
+ addbyte(12);
+}
+
+#define MEM_CHECK_WRITE_B MEM_CHECK_WRITE
+static inline void MEM_CHECK_WRITE(x86seg *seg)
+{
+ CHECK_SEG_WRITE(seg);
+ addbyte(0x8b); /*MOVL ESI, seg->base*/
+ addbyte(0x05 | (REG_ESI << 3));
+ addlong((uint32_t)&seg->base);
+ addbyte(0xe8); /*CALL mem_check_write*/
+ addlong(mem_check_write - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ LOAD_EA();
+}
+static inline void MEM_CHECK_WRITE_W(x86seg *seg)
+{
+ CHECK_SEG_WRITE(seg);
+ addbyte(0x8b); /*MOVL ESI, seg->base*/
+ addbyte(0x05 | (REG_ESI << 3));
+ addlong((uint32_t)&seg->base);
+ addbyte(0xe8); /*CALL mem_check_write_w*/
+ addlong(mem_check_write_w - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ LOAD_EA();
+}
+static inline void MEM_CHECK_WRITE_L(x86seg *seg)
+{
+ CHECK_SEG_WRITE(seg);
+ addbyte(0x8b); /*MOVL ESI, seg->base*/
+ addbyte(0x05 | (REG_ESI << 3));
+ addlong((uint32_t)&seg->base);
+ addbyte(0xe8); /*CALL mem_check_write_l*/
+ addlong(mem_check_write_l - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ LOAD_EA();
+}
+
+static inline void LOAD_SEG(int host_reg, void *seg)
+{
+ addbyte(0xc7); /*MOV [ESP+4], seg*/
+ addbyte(0x44);
+ addbyte(0x24);
+ addbyte(4);
+ addlong((uint32_t)seg);
+ addbyte(0x89); /*MOV [ESP], host_reg*/
+ addbyte(0x04 | (host_reg << 3));
+ addbyte(0x24);
+ CALL_FUNC((uintptr_t)loadseg);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE end*/
+ addbyte(0x85);
+ addlong(BLOCK_EXIT_OFFSET - (block_pos + 4));
+}
diff --git a/src/codegen_ops_xchg.h b/src/codegen_ops_xchg.h
new file mode 100644
index 0000000..25ff4c7
--- /dev/null
+++ b/src/codegen_ops_xchg.h
@@ -0,0 +1,93 @@
+#define OP_XCHG_AX_(reg) \
+ static uint32_t ropXCHG_AX_ ## reg(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+ { \
+ int ax_reg, host_reg, temp_reg; \
+ \
+ ax_reg = LOAD_REG_W(REG_AX); \
+ host_reg = LOAD_REG_W(REG_ ## reg); \
+ temp_reg = COPY_REG(host_reg); \
+ STORE_REG_TARGET_W_RELEASE(ax_reg, REG_ ## reg); \
+ STORE_REG_TARGET_W_RELEASE(temp_reg, REG_AX); \
+ \
+ return op_pc; \
+ }
+
+OP_XCHG_AX_(BX)
+OP_XCHG_AX_(CX)
+OP_XCHG_AX_(DX)
+OP_XCHG_AX_(SI)
+OP_XCHG_AX_(DI)
+OP_XCHG_AX_(SP)
+OP_XCHG_AX_(BP)
+
+#define OP_XCHG_EAX_(reg) \
+ static uint32_t ropXCHG_EAX_ ## reg(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) \
+ { \
+ int eax_reg, host_reg, temp_reg; \
+ \
+ eax_reg = LOAD_REG_L(REG_EAX); \
+ host_reg = LOAD_REG_L(REG_ ## reg); \
+ temp_reg = COPY_REG(host_reg); \
+ STORE_REG_TARGET_L_RELEASE(eax_reg, REG_ ## reg); \
+ STORE_REG_TARGET_L_RELEASE(temp_reg, REG_EAX); \
+ \
+ return op_pc; \
+ }
+
+OP_XCHG_EAX_(EBX)
+OP_XCHG_EAX_(ECX)
+OP_XCHG_EAX_(EDX)
+OP_XCHG_EAX_(ESI)
+OP_XCHG_EAX_(EDI)
+OP_XCHG_EAX_(ESP)
+OP_XCHG_EAX_(EBP)
+
+static uint32_t ropXCHG_b(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+#ifdef __amd64__
+ return 0;
+#else
+ int src_reg, dst_reg, temp_reg;
+
+ if ((fetchdat & 0xc0) != 0xc0)
+ return 0;
+
+ dst_reg = LOAD_REG_B(fetchdat & 7);
+ src_reg = LOAD_REG_B((fetchdat >> 3) & 7);
+ temp_reg = COPY_REG(src_reg);
+ STORE_REG_TARGET_B_RELEASE(dst_reg, (fetchdat >> 3) & 7);
+ STORE_REG_TARGET_B_RELEASE(temp_reg, fetchdat & 7);
+
+ return op_pc + 1;
+#endif
+}
+static uint32_t ropXCHG_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int src_reg, dst_reg, temp_reg;
+
+ if ((fetchdat & 0xc0) != 0xc0)
+ return 0;
+
+ dst_reg = LOAD_REG_W(fetchdat & 7);
+ src_reg = LOAD_REG_W((fetchdat >> 3) & 7);
+ temp_reg = COPY_REG(src_reg);
+ STORE_REG_TARGET_W_RELEASE(dst_reg, (fetchdat >> 3) & 7);
+ STORE_REG_TARGET_W_RELEASE(temp_reg, fetchdat & 7);
+
+ return op_pc + 1;
+}
+static uint32_t ropXCHG_l(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
+{
+ int src_reg, dst_reg, temp_reg;
+
+ if ((fetchdat & 0xc0) != 0xc0)
+ return 0;
+
+ dst_reg = LOAD_REG_L(fetchdat & 7);
+ src_reg = LOAD_REG_L((fetchdat >> 3) & 7);
+ temp_reg = COPY_REG(src_reg);
+ STORE_REG_TARGET_L_RELEASE(dst_reg, (fetchdat >> 3) & 7);
+ STORE_REG_TARGET_L_RELEASE(temp_reg, fetchdat & 7);
+
+ return op_pc + 1;
+}
diff --git a/src/codegen_reg.c b/src/codegen_reg.c
deleted file mode 100644
index b8966b9..0000000
--- a/src/codegen_reg.c
+++ /dev/null
@@ -1,932 +0,0 @@
-#include "ibm.h"
-#include "codegen.h"
-#include "codegen_backend.h"
-#include "codegen_ir_defs.h"
-#include "codegen_reg.h"
-
-int max_version_refcount;
-uint16_t reg_dead_list = 0;
-
-uint8_t reg_last_version[IREG_COUNT];
-reg_version_t reg_version[IREG_COUNT][256];
-
-ir_reg_t invalid_ir_reg = {IREG_INVALID};
-
-ir_reg_t _host_regs[CODEGEN_HOST_REGS];
-static uint8_t _host_reg_dirty[CODEGEN_HOST_REGS];
-
-ir_reg_t host_fp_regs[CODEGEN_HOST_FP_REGS];
-static uint8_t host_fp_reg_dirty[CODEGEN_HOST_FP_REGS];
-
-typedef struct host_reg_set_t
-{
- ir_reg_t *regs;
- uint8_t *dirty;
- host_reg_def_t *reg_list;
- uint16_t locked;
- int nr_regs;
-} host_reg_set_t;
-
-static host_reg_set_t host_reg_set, host_fp_reg_set;
-
-enum
-{
- REG_BYTE,
- REG_WORD,
- REG_DWORD,
- REG_QWORD,
- REG_POINTER,
- REG_DOUBLE,
- REG_FPU_ST_BYTE,
- REG_FPU_ST_DOUBLE,
- REG_FPU_ST_QWORD
-};
-
-enum
-{
- REG_INTEGER,
- REG_FP
-};
-
-enum
-{
- /*Register may be accessed outside of code block, and must be written
- back before any control transfers*/
- REG_PERMANENT = 0,
- /*Register will not be accessed outside of code block, and does not need
- to be written back if there are no readers remaining*/
- REG_VOLATILE = 1
-};
-
-struct
-{
- int native_size;
- void *p;
- int type;
- int is_volatile;
-} ireg_data[IREG_COUNT] =
-{
- [IREG_EAX] = {REG_DWORD, &EAX, REG_INTEGER, REG_PERMANENT},
- [IREG_ECX] = {REG_DWORD, &ECX, REG_INTEGER, REG_PERMANENT},
- [IREG_EDX] = {REG_DWORD, &EDX, REG_INTEGER, REG_PERMANENT},
- [IREG_EBX] = {REG_DWORD, &EBX, REG_INTEGER, REG_PERMANENT},
- [IREG_ESP] = {REG_DWORD, &ESP, REG_INTEGER, REG_PERMANENT},
- [IREG_EBP] = {REG_DWORD, &EBP, REG_INTEGER, REG_PERMANENT},
- [IREG_ESI] = {REG_DWORD, &ESI, REG_INTEGER, REG_PERMANENT},
- [IREG_EDI] = {REG_DWORD, &EDI, REG_INTEGER, REG_PERMANENT},
-
- [IREG_flags_op] = {REG_DWORD, &cpu_state.flags_op, REG_INTEGER, REG_PERMANENT},
- [IREG_flags_res] = {REG_DWORD, &cpu_state.flags_res, REG_INTEGER, REG_PERMANENT},
- [IREG_flags_op1] = {REG_DWORD, &cpu_state.flags_op1, REG_INTEGER, REG_PERMANENT},
- [IREG_flags_op2] = {REG_DWORD, &cpu_state.flags_op2, REG_INTEGER, REG_PERMANENT},
-
- [IREG_pc] = {REG_DWORD, &cpu_state.pc, REG_INTEGER, REG_PERMANENT},
- [IREG_oldpc] = {REG_DWORD, &cpu_state.oldpc, REG_INTEGER, REG_PERMANENT},
-
- [IREG_eaaddr] = {REG_DWORD, &cpu_state.eaaddr, REG_INTEGER, REG_PERMANENT},
- [IREG_ea_seg] = {REG_POINTER, &cpu_state.ea_seg, REG_INTEGER, REG_PERMANENT},
-
- [IREG_op32] = {REG_DWORD, &cpu_state.op32, REG_INTEGER, REG_PERMANENT},
- [IREG_ssegsx] = {REG_BYTE, &cpu_state.ssegs, REG_INTEGER, REG_PERMANENT},
-
- [IREG_rm_mod_reg] = {REG_DWORD, &cpu_state.rm_data.rm_mod_reg_data, REG_INTEGER, REG_PERMANENT},
-
- [IREG_ins] = {REG_DWORD, &cpu_state.cpu_recomp_ins, REG_INTEGER, REG_PERMANENT},
- [IREG_cycles] = {REG_DWORD, &cpu_state._cycles, REG_INTEGER, REG_PERMANENT},
-
- [IREG_CS_base] = {REG_DWORD, &cpu_state.seg_cs.base, REG_INTEGER, REG_PERMANENT},
- [IREG_DS_base] = {REG_DWORD, &cpu_state.seg_ds.base, REG_INTEGER, REG_PERMANENT},
- [IREG_ES_base] = {REG_DWORD, &cpu_state.seg_es.base, REG_INTEGER, REG_PERMANENT},
- [IREG_FS_base] = {REG_DWORD, &cpu_state.seg_fs.base, REG_INTEGER, REG_PERMANENT},
- [IREG_GS_base] = {REG_DWORD, &cpu_state.seg_gs.base, REG_INTEGER, REG_PERMANENT},
- [IREG_SS_base] = {REG_DWORD, &cpu_state.seg_ss.base, REG_INTEGER, REG_PERMANENT},
-
- [IREG_CS_seg] = {REG_WORD, &cpu_state.seg_cs.seg, REG_INTEGER, REG_PERMANENT},
- [IREG_DS_seg] = {REG_WORD, &cpu_state.seg_ds.seg, REG_INTEGER, REG_PERMANENT},
- [IREG_ES_seg] = {REG_WORD, &cpu_state.seg_es.seg, REG_INTEGER, REG_PERMANENT},
- [IREG_FS_seg] = {REG_WORD, &cpu_state.seg_fs.seg, REG_INTEGER, REG_PERMANENT},
- [IREG_GS_seg] = {REG_WORD, &cpu_state.seg_gs.seg, REG_INTEGER, REG_PERMANENT},
- [IREG_SS_seg] = {REG_WORD, &cpu_state.seg_ss.seg, REG_INTEGER, REG_PERMANENT},
-
- [IREG_FPU_TOP] = {REG_DWORD, &cpu_state.TOP, REG_INTEGER, REG_PERMANENT},
-
- [IREG_ST0] = {REG_FPU_ST_DOUBLE, &cpu_state.ST[0], REG_FP, REG_PERMANENT},
- [IREG_ST1] = {REG_FPU_ST_DOUBLE, &cpu_state.ST[0], REG_FP, REG_PERMANENT},
- [IREG_ST2] = {REG_FPU_ST_DOUBLE, &cpu_state.ST[0], REG_FP, REG_PERMANENT},
- [IREG_ST3] = {REG_FPU_ST_DOUBLE, &cpu_state.ST[0], REG_FP, REG_PERMANENT},
- [IREG_ST4] = {REG_FPU_ST_DOUBLE, &cpu_state.ST[0], REG_FP, REG_PERMANENT},
- [IREG_ST5] = {REG_FPU_ST_DOUBLE, &cpu_state.ST[0], REG_FP, REG_PERMANENT},
- [IREG_ST6] = {REG_FPU_ST_DOUBLE, &cpu_state.ST[0], REG_FP, REG_PERMANENT},
- [IREG_ST7] = {REG_FPU_ST_DOUBLE, &cpu_state.ST[0], REG_FP, REG_PERMANENT},
-
- [IREG_tag0] = {REG_FPU_ST_BYTE, &cpu_state.tag[0], REG_INTEGER, REG_PERMANENT},
- [IREG_tag1] = {REG_FPU_ST_BYTE, &cpu_state.tag[0], REG_INTEGER, REG_PERMANENT},
- [IREG_tag2] = {REG_FPU_ST_BYTE, &cpu_state.tag[0], REG_INTEGER, REG_PERMANENT},
- [IREG_tag3] = {REG_FPU_ST_BYTE, &cpu_state.tag[0], REG_INTEGER, REG_PERMANENT},
- [IREG_tag4] = {REG_FPU_ST_BYTE, &cpu_state.tag[0], REG_INTEGER, REG_PERMANENT},
- [IREG_tag5] = {REG_FPU_ST_BYTE, &cpu_state.tag[0], REG_INTEGER, REG_PERMANENT},
- [IREG_tag6] = {REG_FPU_ST_BYTE, &cpu_state.tag[0], REG_INTEGER, REG_PERMANENT},
- [IREG_tag7] = {REG_FPU_ST_BYTE, &cpu_state.tag[0], REG_INTEGER, REG_PERMANENT},
-
- [IREG_ST0_i64] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP, REG_PERMANENT},
- [IREG_ST1_i64] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP, REG_PERMANENT},
- [IREG_ST2_i64] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP, REG_PERMANENT},
- [IREG_ST3_i64] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP, REG_PERMANENT},
- [IREG_ST4_i64] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP, REG_PERMANENT},
- [IREG_ST5_i64] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP, REG_PERMANENT},
- [IREG_ST6_i64] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP, REG_PERMANENT},
- [IREG_ST7_i64] = {REG_FPU_ST_QWORD, &cpu_state.MM[0], REG_FP, REG_PERMANENT},
-
- [IREG_MM0x] = {REG_QWORD, &cpu_state.MM[0], REG_FP, REG_PERMANENT},
- [IREG_MM1x] = {REG_QWORD, &cpu_state.MM[1], REG_FP, REG_PERMANENT},
- [IREG_MM2x] = {REG_QWORD, &cpu_state.MM[2], REG_FP, REG_PERMANENT},
- [IREG_MM3x] = {REG_QWORD, &cpu_state.MM[3], REG_FP, REG_PERMANENT},
- [IREG_MM4x] = {REG_QWORD, &cpu_state.MM[4], REG_FP, REG_PERMANENT},
- [IREG_MM5x] = {REG_QWORD, &cpu_state.MM[5], REG_FP, REG_PERMANENT},
- [IREG_MM6x] = {REG_QWORD, &cpu_state.MM[6], REG_FP, REG_PERMANENT},
- [IREG_MM7x] = {REG_QWORD, &cpu_state.MM[7], REG_FP, REG_PERMANENT},
-
- [IREG_NPXCx] = {REG_WORD, &cpu_state.npxc, REG_INTEGER, REG_PERMANENT},
- [IREG_NPXSx] = {REG_WORD, &cpu_state.npxs, REG_INTEGER, REG_PERMANENT},
-
- [IREG_flagsx] = {REG_WORD, &cpu_state.flags, REG_INTEGER, REG_PERMANENT},
- [IREG_eflagsx] = {REG_WORD, &cpu_state.eflags, REG_INTEGER, REG_PERMANENT},
-
- [IREG_CS_limit_low] = {REG_DWORD, &cpu_state.seg_cs.limit_low, REG_INTEGER, REG_PERMANENT},
- [IREG_DS_limit_low] = {REG_DWORD, &cpu_state.seg_ds.limit_low, REG_INTEGER, REG_PERMANENT},
- [IREG_ES_limit_low] = {REG_DWORD, &cpu_state.seg_es.limit_low, REG_INTEGER, REG_PERMANENT},
- [IREG_FS_limit_low] = {REG_DWORD, &cpu_state.seg_fs.limit_low, REG_INTEGER, REG_PERMANENT},
- [IREG_GS_limit_low] = {REG_DWORD, &cpu_state.seg_gs.limit_low, REG_INTEGER, REG_PERMANENT},
- [IREG_SS_limit_low] = {REG_DWORD, &cpu_state.seg_ss.limit_low, REG_INTEGER, REG_PERMANENT},
-
- [IREG_CS_limit_high] = {REG_DWORD, &cpu_state.seg_cs.limit_high, REG_INTEGER, REG_PERMANENT},
- [IREG_DS_limit_high] = {REG_DWORD, &cpu_state.seg_ds.limit_high, REG_INTEGER, REG_PERMANENT},
- [IREG_ES_limit_high] = {REG_DWORD, &cpu_state.seg_es.limit_high, REG_INTEGER, REG_PERMANENT},
- [IREG_FS_limit_high] = {REG_DWORD, &cpu_state.seg_fs.limit_high, REG_INTEGER, REG_PERMANENT},
- [IREG_GS_limit_high] = {REG_DWORD, &cpu_state.seg_gs.limit_high, REG_INTEGER, REG_PERMANENT},
- [IREG_SS_limit_high] = {REG_DWORD, &cpu_state.seg_ss.limit_high, REG_INTEGER, REG_PERMANENT},
-
- /*Temporary registers are stored on the stack, and are not guaranteed to
- be preserved across uOPs. They will not be written back if they will
- not be read again.*/
- [IREG_temp0] = {REG_DWORD, (void *)16, REG_INTEGER, REG_VOLATILE},
- [IREG_temp1] = {REG_DWORD, (void *)20, REG_INTEGER, REG_VOLATILE},
- [IREG_temp2] = {REG_DWORD, (void *)24, REG_INTEGER, REG_VOLATILE},
- [IREG_temp3] = {REG_DWORD, (void *)28, REG_INTEGER, REG_VOLATILE},
-
- [IREG_temp0d] = {REG_DOUBLE, (void *)40, REG_FP, REG_VOLATILE},
- [IREG_temp1d] = {REG_DOUBLE, (void *)48, REG_FP, REG_VOLATILE},
-};
-
-void codegen_reg_mark_as_required()
-{
- int reg;
-
- for (reg = 0; reg < IREG_COUNT; reg++)
- {
- int last_version = reg_last_version[reg];
-
- if (last_version > 0 && ireg_data[reg].is_volatile == REG_PERMANENT)
- reg_version[reg][last_version].flags |= REG_FLAGS_REQUIRED;
- }
-}
-
-int reg_is_native_size(ir_reg_t ir_reg)
-{
- int native_size = ireg_data[IREG_GET_REG(ir_reg.reg)].native_size;
- int requested_size = IREG_GET_SIZE(ir_reg.reg);
-
- switch (native_size)
- {
- case REG_BYTE: case REG_FPU_ST_BYTE:
- return (requested_size == IREG_SIZE_B);
- case REG_WORD:
- return (requested_size == IREG_SIZE_W);
- case REG_DWORD:
- return (requested_size == IREG_SIZE_L);
- case REG_QWORD: case REG_FPU_ST_QWORD: case REG_DOUBLE: case REG_FPU_ST_DOUBLE:
- return ((requested_size == IREG_SIZE_D) || (requested_size == IREG_SIZE_Q));
- case REG_POINTER:
- if (sizeof(void *) == 4)
- return (requested_size == IREG_SIZE_L);
- return (requested_size == IREG_SIZE_Q);
-
- default:
- fatal("get_reg_is_native_size: unknown native size %i\n", native_size);
- }
-
- return 0;
-}
-
-void codegen_reg_reset()
-{
- int c;
-
- host_reg_set.regs = _host_regs;
- host_reg_set.dirty = _host_reg_dirty;
- host_reg_set.reg_list = codegen_host_reg_list;
- host_reg_set.locked = 0;
- host_reg_set.nr_regs = CODEGEN_HOST_REGS;
- host_fp_reg_set.regs = host_fp_regs;
- host_fp_reg_set.dirty = host_fp_reg_dirty;
- host_fp_reg_set.reg_list = codegen_host_fp_reg_list;
- host_fp_reg_set.locked = 0;
- host_fp_reg_set.nr_regs = CODEGEN_HOST_FP_REGS;
-
- for (c = 0; c < IREG_COUNT; c++)
- {
- reg_last_version[c] = 0;
- reg_version[c][0].refcount = 0;
- }
- for (c = 0; c < CODEGEN_HOST_REGS; c++)
- {
- host_reg_set.regs[c] = invalid_ir_reg;
- host_reg_set.dirty[c] = 0;
- }
- for (c = 0; c < CODEGEN_HOST_FP_REGS; c++)
- {
- host_fp_reg_set.regs[c] = invalid_ir_reg;
- host_fp_reg_set.dirty[c] = 0;
- }
-
- reg_dead_list = 0;
- max_version_refcount = 0;
-}
-
-static inline int ir_get_refcount(ir_reg_t ir_reg)
-{
- return reg_version[IREG_GET_REG(ir_reg.reg)][ir_reg.version].refcount;
-}
-
-static inline host_reg_set_t *get_reg_set(ir_reg_t ir_reg)
-{
- if (ireg_data[IREG_GET_REG(ir_reg.reg)].type == REG_INTEGER)
- return &host_reg_set;
- else
- return &host_fp_reg_set;
-}
-
-static void codegen_reg_load(host_reg_set_t *reg_set, codeblock_t *block, int c, ir_reg_t ir_reg)
-{
- switch (ireg_data[IREG_GET_REG(ir_reg.reg)].native_size)
- {
- case REG_WORD:
-#ifndef RELEASE_BUILD
- if (ireg_data[IREG_GET_REG(ir_reg.reg)].type != REG_INTEGER)
- fatal("codegen_reg_load - REG_WORD !REG_INTEGER\n");
-#endif
- if ((uintptr_t)ireg_data[IREG_GET_REG(ir_reg.reg)].p < 256)
- codegen_direct_read_16_stack(block, reg_set->reg_list[c].reg, (intptr_t)ireg_data[IREG_GET_REG(ir_reg.reg)].p);
- else
- codegen_direct_read_16(block, reg_set->reg_list[c].reg, ireg_data[IREG_GET_REG(ir_reg.reg)].p);
- break;
-
- case REG_DWORD:
-#ifndef RELEASE_BUILD
- if (ireg_data[IREG_GET_REG(ir_reg.reg)].type != REG_INTEGER)
- fatal("codegen_reg_load - REG_DWORD !REG_INTEGER\n");
-#endif
- if ((uintptr_t)ireg_data[IREG_GET_REG(ir_reg.reg)].p < 256)
- codegen_direct_read_32_stack(block, reg_set->reg_list[c].reg, (intptr_t)ireg_data[IREG_GET_REG(ir_reg.reg)].p);
- else
- codegen_direct_read_32(block, reg_set->reg_list[c].reg, ireg_data[IREG_GET_REG(ir_reg.reg)].p);
- break;
-
- case REG_QWORD:
-#ifndef RELEASE_BUILD
- if (ireg_data[IREG_GET_REG(ir_reg.reg)].type != REG_FP)
- fatal("codegen_reg_load - REG_QWORD !REG_FP\n");
-#endif
- if ((uintptr_t)ireg_data[IREG_GET_REG(ir_reg.reg)].p < 256)
- codegen_direct_read_64_stack(block, reg_set->reg_list[c].reg, (intptr_t)ireg_data[IREG_GET_REG(ir_reg.reg)].p);
- else
- codegen_direct_read_64(block, reg_set->reg_list[c].reg, ireg_data[IREG_GET_REG(ir_reg.reg)].p);
- break;
-
- case REG_POINTER:
-#ifndef RELEASE_BUILD
- if (ireg_data[IREG_GET_REG(ir_reg.reg)].type != REG_INTEGER)
- fatal("codegen_reg_load - REG_POINTER !REG_INTEGER\n");
-#endif
- if ((uintptr_t)ireg_data[IREG_GET_REG(ir_reg.reg)].p < 256)
- codegen_direct_read_pointer_stack(block, reg_set->reg_list[c].reg, (intptr_t)ireg_data[IREG_GET_REG(ir_reg.reg)].p);
- else
- codegen_direct_read_pointer(block, reg_set->reg_list[c].reg, ireg_data[IREG_GET_REG(ir_reg.reg)].p);
- break;
-
- case REG_DOUBLE:
-#ifndef RELEASE_BUILD
- if (ireg_data[IREG_GET_REG(ir_reg.reg)].type != REG_FP)
- fatal("codegen_reg_load - REG_DOUBLE !REG_FP\n");
-#endif
- if ((uintptr_t)ireg_data[IREG_GET_REG(ir_reg.reg)].p < 256)
- codegen_direct_read_double_stack(block, reg_set->reg_list[c].reg, (intptr_t)ireg_data[IREG_GET_REG(ir_reg.reg)].p);
- else
- codegen_direct_read_double(block, reg_set->reg_list[c].reg, ireg_data[IREG_GET_REG(ir_reg.reg)].p);
- break;
-
- case REG_FPU_ST_BYTE:
-#ifndef RELEASE_BUILD
- if (ireg_data[IREG_GET_REG(ir_reg.reg)].type != REG_INTEGER)
- fatal("codegen_reg_load - REG_FPU_ST_BYTE !REG_INTEGER\n");
-#endif
- if (block->flags & CODEBLOCK_STATIC_TOP)
- codegen_direct_read_8(block, reg_set->reg_list[c].reg, &cpu_state.tag[ir_reg.reg & 7]);
- else
- codegen_direct_read_st_8(block, reg_set->reg_list[c].reg, &cpu_state.tag[0], ir_reg.reg & 7);
- break;
-
- case REG_FPU_ST_QWORD:
-#ifndef RELEASE_BUILD
- if (ireg_data[IREG_GET_REG(ir_reg.reg)].type != REG_FP)
- fatal("codegen_reg_load - REG_FPU_ST_QWORD !REG_FP\n");
-#endif
- if (block->flags & CODEBLOCK_STATIC_TOP)
- codegen_direct_read_64(block, reg_set->reg_list[c].reg, &cpu_state.MM[ir_reg.reg & 7]);
- else
- codegen_direct_read_st_64(block, reg_set->reg_list[c].reg, &cpu_state.MM[0], ir_reg.reg & 7);
- break;
-
- case REG_FPU_ST_DOUBLE:
-#ifndef RELEASE_BUILD
- if (ireg_data[IREG_GET_REG(ir_reg.reg)].type != REG_FP)
- fatal("codegen_reg_load - REG_FPU_ST_DOUBLE !REG_FP\n");
-#endif
- if (block->flags & CODEBLOCK_STATIC_TOP)
- codegen_direct_read_double(block, reg_set->reg_list[c].reg, &cpu_state.ST[ir_reg.reg & 7]);
- else
- codegen_direct_read_st_double(block, reg_set->reg_list[c].reg, &cpu_state.ST[0], ir_reg.reg & 7);
- break;
-
- default:
- fatal("codegen_reg_load - native_size=%i reg=%i\n", ireg_data[IREG_GET_REG(ir_reg.reg)].native_size, IREG_GET_REG(ir_reg.reg));
- }
-
- reg_set->regs[c] = ir_reg;
-
-//pclog(" codegen_reg_load: c=%i reg=%02x.%i\n", c, host_regs[c].reg,host_regs[c].version);
-}
-
-static void codegen_reg_writeback(host_reg_set_t *reg_set, codeblock_t *block, int c, int invalidate)
-{
- int ir_reg = IREG_GET_REG(reg_set->regs[c].reg);
- void *p = ireg_data[ir_reg].p;
-
- if (!reg_version[ir_reg][reg_set->regs[c].version].refcount &&
- ireg_data[ir_reg].is_volatile)
- return;
-
- switch (ireg_data[ir_reg].native_size)
- {
- case REG_BYTE:
-#ifndef RELEASE_BUILD
- if (ireg_data[ir_reg].type != REG_INTEGER)
- fatal("codegen_reg_writeback - REG_BYTE !REG_INTEGER\n");
- if ((uintptr_t)p < 256)
- fatal("codegen_reg_writeback - REG_BYTE %p\n", p);
-#endif
- codegen_direct_write_8(block, p, reg_set->reg_list[c].reg);
- break;
-
- case REG_WORD:
-#ifndef RELEASE_BUILD
- if (ireg_data[ir_reg].type != REG_INTEGER)
- fatal("codegen_reg_writeback - REG_WORD !REG_INTEGER\n");
- if ((uintptr_t)p < 256)
- fatal("codegen_reg_writeback - REG_WORD %p\n", p);
-#endif
- codegen_direct_write_16(block, p, reg_set->reg_list[c].reg);
- break;
-
- case REG_DWORD:
-#ifndef RELEASE_BUILD
- if (ireg_data[ir_reg].type != REG_INTEGER)
- fatal("codegen_reg_writeback - REG_DWORD !REG_INTEGER\n");
-#endif
- if ((uintptr_t)p < 256)
- codegen_direct_write_32_stack(block, (intptr_t)p, reg_set->reg_list[c].reg);
- else
- codegen_direct_write_32(block, p, reg_set->reg_list[c].reg);
- break;
-
- case REG_QWORD:
-#ifndef RELEASE_BUILD
- if (ireg_data[ir_reg].type != REG_FP)
- fatal("codegen_reg_writeback - REG_QWORD !REG_FP\n");
-#endif
- if ((uintptr_t)p < 256)
- codegen_direct_write_64_stack(block, (intptr_t)p, reg_set->reg_list[c].reg);
- else
- codegen_direct_write_64(block, p, reg_set->reg_list[c].reg);
- break;
-
- case REG_POINTER:
-#ifndef RELEASE_BUILD
- if (ireg_data[ir_reg].type != REG_INTEGER)
- fatal("codegen_reg_writeback - REG_POINTER !REG_INTEGER\n");
- if ((uintptr_t)p < 256)
- fatal("codegen_reg_writeback - REG_POINTER %p\n", p);
-#endif
- codegen_direct_write_ptr(block, p, reg_set->reg_list[c].reg);
- break;
-
- case REG_DOUBLE:
-#ifndef RELEASE_BUILD
- if (ireg_data[ir_reg].type != REG_FP)
- fatal("codegen_reg_writeback - REG_DOUBLE !REG_FP\n");
-#endif
- if ((uintptr_t)p < 256)
- codegen_direct_write_double_stack(block, (intptr_t)p, reg_set->reg_list[c].reg);
- else
- codegen_direct_write_double(block, p, reg_set->reg_list[c].reg);
- break;
-
- case REG_FPU_ST_BYTE:
-#ifndef RELEASE_BUILD
- if (ireg_data[ir_reg].type != REG_INTEGER)
- fatal("codegen_reg_writeback - REG_FPU_ST_BYTE !REG_INTEGER\n");
-#endif
- if (block->flags & CODEBLOCK_STATIC_TOP)
- codegen_direct_write_8(block, &cpu_state.tag[reg_set->regs[c].reg & 7], reg_set->reg_list[c].reg);
- else
- codegen_direct_write_st_8(block, &cpu_state.tag[0], reg_set->regs[c].reg & 7, reg_set->reg_list[c].reg);
- break;
-
- case REG_FPU_ST_QWORD:
-#ifndef RELEASE_BUILD
- if (ireg_data[ir_reg].type != REG_FP)
- fatal("codegen_reg_writeback - REG_FPU_ST_QWORD !REG_FP\n");
-#endif
- if (block->flags & CODEBLOCK_STATIC_TOP)
- codegen_direct_write_64(block, &cpu_state.MM[reg_set->regs[c].reg & 7], reg_set->reg_list[c].reg);
- else
- codegen_direct_write_st_64(block, &cpu_state.MM[0], reg_set->regs[c].reg & 7, reg_set->reg_list[c].reg);
- break;
-
- case REG_FPU_ST_DOUBLE:
-#ifndef RELEASE_BUILD
- if (ireg_data[ir_reg].type != REG_FP)
- fatal("codegen_reg_writeback - REG_FPU_ST_DOUBLE !REG_FP\n");
-#endif
- if (block->flags & CODEBLOCK_STATIC_TOP)
- codegen_direct_write_double(block, &cpu_state.ST[reg_set->regs[c].reg & 7], reg_set->reg_list[c].reg);
- else
- codegen_direct_write_st_double(block, &cpu_state.ST[0], reg_set->regs[c].reg & 7, reg_set->reg_list[c].reg);
- break;
-
- default:
- fatal("codegen_reg_flush - native_size=%i\n", ireg_data[ir_reg].native_size);
- }
-
- if (invalidate)
- reg_set->regs[c] = invalid_ir_reg;
- reg_set->dirty[c] = 0;
-}
-
-#ifdef CODEGEN_BACKEND_HAS_MOV_IMM
-void codegen_reg_write_imm(codeblock_t *block, ir_reg_t ir_reg, uint32_t imm_data)
-{
- int reg_idx = IREG_GET_REG(ir_reg.reg);
- void *p = ireg_data[reg_idx].p;
-
- switch (ireg_data[reg_idx].native_size)
- {
- case REG_BYTE:
-#ifndef RELEASE_BUILD
- if ((uintptr_t)p < 256)
- fatal("codegen_reg_write_imm - REG_BYTE %p\n", p);
-#endif
- codegen_direct_write_8_imm(block, p, imm_data);
- break;
-
- case REG_WORD:
-#ifndef RELEASE_BUILD
- if ((uintptr_t)p < 256)
- fatal("codegen_reg_write_imm - REG_WORD %p\n", p);
-#endif
- codegen_direct_write_16_imm(block, p, imm_data);
- break;
-
- case REG_DWORD:
- if ((uintptr_t)p < 256)
- codegen_direct_write_32_imm_stack(block, (int)p, imm_data);
- else
- codegen_direct_write_32_imm(block, p, imm_data);
- break;
-
- case REG_POINTER:
- case REG_QWORD:
- case REG_DOUBLE:
- case REG_FPU_ST_BYTE:
- case REG_FPU_ST_QWORD:
- case REG_FPU_ST_DOUBLE:
- default:
- fatal("codegen_reg_write_imm - native_size=%i\n", ireg_data[reg_idx].native_size);
- }
-}
-#endif
-
-static void alloc_reg(ir_reg_t ir_reg)
-{
- host_reg_set_t *reg_set = get_reg_set(ir_reg);
- int nr_regs = (reg_set == &host_reg_set) ? CODEGEN_HOST_REGS : CODEGEN_HOST_FP_REGS;
- int c;
-
- for (c = 0; c < nr_regs; c++)
- {
- if (IREG_GET_REG(reg_set->regs[c].reg) == IREG_GET_REG(ir_reg.reg))
- {
-#ifndef RELEASE_BUILD
- if (reg_set->regs[c].version != ir_reg.version)
- fatal("alloc_reg - host_regs[c].version != ir_reg.version %i %p %p %i %i\n", c, reg_set, &host_reg_set, reg_set->regs[c].reg, ir_reg.reg);
-#endif
- reg_set->locked |= (1 << c);
- return;
- }
- }
-}
-
-static void alloc_dest_reg(ir_reg_t ir_reg, int dest_reference)
-{
- host_reg_set_t *reg_set = get_reg_set(ir_reg);
- int nr_regs = (reg_set == &host_reg_set) ? CODEGEN_HOST_REGS : CODEGEN_HOST_FP_REGS;
- int c;
-
- for (c = 0; c < nr_regs; c++)
- {
- if (IREG_GET_REG(reg_set->regs[c].reg) == IREG_GET_REG(ir_reg.reg))
- {
- if (reg_set->regs[c].version == ir_reg.version)
- {
- reg_set->locked |= (1 << c);
- }
- else
- {
- /*The immediate prior version may have been
- optimised out, so search backwards to find the
- last valid version*/
- int prev_version = ir_reg.version-1;
-// pclog("prev_version search from %i\n", prev_version);
- while (prev_version >= 0)
- {
- reg_version_t *regv = ®_version[IREG_GET_REG(reg_set->regs[c].reg)][prev_version];
-
- if (!(regv->flags & REG_FLAGS_DEAD) && regv->refcount == dest_reference)
- {
- reg_set->locked |= (1 << c);
- return;
- }
- prev_version--;
- }
- fatal("codegen_reg_alloc_register - host_regs[c].version != dest_reg_a.version %i,%i %i\n", reg_set->regs[c].version, ir_reg.version, dest_reference);
- }
- return;
- }
- }
-}
-
-void codegen_reg_alloc_register(ir_reg_t dest_reg_a, ir_reg_t src_reg_a, ir_reg_t src_reg_b, ir_reg_t src_reg_c)
-{
- int dest_reference = 0;
-
- host_reg_set.locked = 0;
- host_fp_reg_set.locked = 0;
-
-/* pclog("alloc_register: dst=%i.%i src_a=%i.%i src_b=%i.%i\n", dest_reg_a.reg, dest_reg_a.version,
- src_reg_a.reg, src_reg_a.version,
- src_reg_b.reg, src_reg_b.version);*/
-
- if (!ir_reg_is_invalid(dest_reg_a))
- {
- if (!ir_reg_is_invalid(src_reg_a) && IREG_GET_REG(src_reg_a.reg) == IREG_GET_REG(dest_reg_a.reg) && src_reg_a.version == dest_reg_a.version-1)
- dest_reference++;
- if (!ir_reg_is_invalid(src_reg_b) && IREG_GET_REG(src_reg_b.reg) == IREG_GET_REG(dest_reg_a.reg) && src_reg_b.version == dest_reg_a.version-1)
- dest_reference++;
- if (!ir_reg_is_invalid(src_reg_c) && IREG_GET_REG(src_reg_c.reg) == IREG_GET_REG(dest_reg_a.reg) && src_reg_c.version == dest_reg_a.version-1)
- dest_reference++;
- }
- if (!ir_reg_is_invalid(src_reg_a))
- alloc_reg(src_reg_a);
- if (!ir_reg_is_invalid(src_reg_b))
- alloc_reg(src_reg_b);
- if (!ir_reg_is_invalid(src_reg_c))
- alloc_reg(src_reg_c);
- if (!ir_reg_is_invalid(dest_reg_a))
- alloc_dest_reg(dest_reg_a, dest_reference);
-}
-
-ir_host_reg_t codegen_reg_alloc_read_reg(codeblock_t *block, ir_reg_t ir_reg, int *host_reg_idx)
-{
- host_reg_set_t *reg_set = get_reg_set(ir_reg);
- int c;
-
- /*Search for required register*/
- for (c = 0; c < reg_set->nr_regs; c++)
- {
- if (!ir_reg_is_invalid(reg_set->regs[c]) && IREG_GET_REG(reg_set->regs[c].reg) == IREG_GET_REG(ir_reg.reg) && reg_set->regs[c].version == ir_reg.version)
- break;
-
- if (!ir_reg_is_invalid(reg_set->regs[c]) && IREG_GET_REG(reg_set->regs[c].reg) == IREG_GET_REG(ir_reg.reg) && reg_set->regs[c].version <= ir_reg.version)
- {
- reg_version[IREG_GET_REG(reg_set->regs[c].reg)][reg_set->regs[c].version].refcount++;
- break;
- }
-#ifndef RELEASE_BUILD
- if (!ir_reg_is_invalid(reg_set->regs[c]) && IREG_GET_REG(reg_set->regs[c].reg) == IREG_GET_REG(ir_reg.reg) && reg_version[IREG_GET_REG(reg_set->regs[c].reg)][reg_set->regs[c].version].refcount)
- fatal("codegen_reg_alloc_read_reg - version mismatch!\n");
-#endif
- }
-
- if (c == reg_set->nr_regs)
- {
- /*No unused registers. Search for an unlocked register with no pending reads*/
- for (c = 0; c < reg_set->nr_regs; c++)
- {
- if (!(reg_set->locked & (1 << c)) && IREG_GET_REG(reg_set->regs[c].reg) != IREG_INVALID && !ir_get_refcount(reg_set->regs[c]))
- break;
- }
- if (c == reg_set->nr_regs)
- {
- /*Search for any unlocked register*/
- for (c = 0; c < reg_set->nr_regs; c++)
- {
- if (!(reg_set->locked & (1 << c)))
- break;
- }
-#ifndef RELEASE_BUILD
- if (c == reg_set->nr_regs)
- fatal("codegen_reg_alloc_read_reg - out of registers\n");
-#endif
- }
- if (reg_set->dirty[c])
- codegen_reg_writeback(reg_set, block, c, 1);
-// pclog(" load %i\n", c);
- codegen_reg_load(reg_set, block, c, ir_reg);
-// fatal("codegen_reg_alloc_read_reg - read %i.%i to %i\n", ir_reg.reg,ir_reg.version, c);
- reg_set->locked |= (1 << c);
-// codegen_reg_writeback(block, c);
- reg_set->dirty[c] = 0;
- }
-// else
-// pclog(" already loaded %i\n", c);
-
- reg_version[IREG_GET_REG(reg_set->regs[c].reg)][reg_set->regs[c].version].refcount--;
-#ifndef RELEASE_BUILD
- if (reg_version[IREG_GET_REG(reg_set->regs[c].reg)][reg_set->regs[c].version].refcount == (uint8_t)-1)
- fatal("codegen_reg_alloc_read_reg - refcount < 0\n");
-#endif
-
- if (host_reg_idx)
- *host_reg_idx = c;
-// pclog(" codegen_reg_alloc_read_reg: %i.%i %i %02x.%i %i\n", ir_reg.reg, ir_reg.version, codegen_host_reg_list[c], reg_set->regs[c].reg,reg_set->regs[c].version, c);
- return reg_set->reg_list[c].reg | IREG_GET_SIZE(ir_reg.reg);
-}
-
-ir_host_reg_t codegen_reg_alloc_write_reg(codeblock_t *block, ir_reg_t ir_reg)
-{
- host_reg_set_t *reg_set = get_reg_set(ir_reg);
- int c;
-
- if (!reg_is_native_size(ir_reg))
- {
- /*Read in parent register so we can do partial accesses to it*/
- ir_reg_t parent_reg;
-
- parent_reg.reg = IREG_GET_REG(ir_reg.reg) | IREG_SIZE_L;
- parent_reg.version = ir_reg.version - 1;
- reg_version[IREG_GET_REG(ir_reg.reg)][ir_reg.version - 1].refcount++;
-
- codegen_reg_alloc_read_reg(block, parent_reg, &c);
-
-#ifndef RELEASE_BUILD
- if (IREG_GET_REG(reg_set->regs[c].reg) != IREG_GET_REG(ir_reg.reg) || reg_set->regs[c].version > ir_reg.version-1)
- fatal("codegen_reg_alloc_write_reg sub_reg - doesn't match %i %02x.%i %02x.%i\n", c,
- reg_set->regs[c].reg,reg_set->regs[c].version,
- ir_reg.reg,ir_reg.version);
-#endif
-
- reg_set->regs[c].reg = ir_reg.reg;
- reg_set->regs[c].version = ir_reg.version;
- reg_set->dirty[c] = 1;
-// pclog(" codegen_reg_alloc_write_reg: partial %i.%i %i\n", ir_reg.reg, ir_reg.version, codegen_host_reg_list[c]);
- return reg_set->reg_list[c].reg | IREG_GET_SIZE(ir_reg.reg);
- }
-
- /*Search for previous version in host register*/
- for (c = 0; c < reg_set->nr_regs; c++)
- {
- if (!ir_reg_is_invalid(reg_set->regs[c]) && IREG_GET_REG(reg_set->regs[c].reg) == IREG_GET_REG(ir_reg.reg))
- {
- if (reg_set->regs[c].version <= ir_reg.version-1)
- {
-#ifndef RELEASE_BUILD
- if (reg_version[IREG_GET_REG(reg_set->regs[c].reg)][reg_set->regs[c].version].refcount != 0)
- fatal("codegen_reg_alloc_write_reg - previous version refcount != 0\n");
-#endif
- break;
- }
- }
- }
-
- if (c == reg_set->nr_regs)
- {
- /*Search for unused registers*/
- for (c = 0; c < reg_set->nr_regs; c++)
- {
- if (ir_reg_is_invalid(reg_set->regs[c]))
- break;
- }
-
- if (c == reg_set->nr_regs)
- {
- /*No unused registers. Search for an unlocked register*/
- for (c = 0; c < reg_set->nr_regs; c++)
- {
- if (!(reg_set->locked & (1 << c)))
- break;
- }
-#ifndef RELEASE_BUILD
- if (c == reg_set->nr_regs)
- fatal("codegen_reg_alloc_write_reg - out of registers\n");
-#endif
- if (reg_set->dirty[c])
- codegen_reg_writeback(reg_set, block, c, 1);
- }
- }
-
- reg_set->regs[c].reg = ir_reg.reg;
- reg_set->regs[c].version = ir_reg.version;
- reg_set->dirty[c] = 1;
-// pclog(" codegen_reg_alloc_write_reg: %i.%i %i\n", ir_reg.reg, ir_reg.version, codegen_host_reg_list[c]);
- return reg_set->reg_list[c].reg | IREG_GET_SIZE(ir_reg.reg);
-}
-
-#ifdef CODEGEN_BACKEND_HAS_MOV_IMM
-int codegen_reg_is_loaded(ir_reg_t ir_reg)
-{
- host_reg_set_t *reg_set = get_reg_set(ir_reg);
- int c;
-
- /*Search for previous version in host register*/
- for (c = 0; c < reg_set->nr_regs; c++)
- {
- if (!ir_reg_is_invalid(reg_set->regs[c]) && IREG_GET_REG(reg_set->regs[c].reg) == IREG_GET_REG(ir_reg.reg))
- {
- if (reg_set->regs[c].version <= ir_reg.version-1)
- {
-#ifndef RELEASE_BUILD
- if (reg_version[IREG_GET_REG(reg_set->regs[c].reg)][reg_set->regs[c].version].refcount != 0)
- fatal("codegen_reg_alloc_write_reg - previous version refcount != 0\n");
-#endif
- return 1;
- }
- }
- }
- return 0;
-}
-#endif
-
-void codegen_reg_rename(codeblock_t *block, ir_reg_t src, ir_reg_t dst)
-{
- host_reg_set_t *reg_set = get_reg_set(src);
- int c;
- int target;
-
-// pclog("rename: %i.%i -> %i.%i\n", src.reg,src.version, dst.reg, dst.version);
- /*Search for required register*/
- for (c = 0; c < reg_set->nr_regs; c++)
- {
- if (!ir_reg_is_invalid(reg_set->regs[c]) && IREG_GET_REG(reg_set->regs[c].reg) == IREG_GET_REG(src.reg) && reg_set->regs[c].version == src.version)
- break;
- }
-#ifndef RELEASE_BUILD
- if (c == reg_set->nr_regs)
- fatal("codegen_reg_rename: Can't find register to rename\n");
-#endif
- target = c;
- if (reg_set->dirty[target])
- codegen_reg_writeback(reg_set, block, target, 0);
- reg_set->regs[target] = dst;
- reg_set->dirty[target] = 1;
-// pclog("renamed reg %i dest=%i.%i\n", target, dst.reg, dst.version);
-
- /*Invalidate any stale copies of the dest register*/
- for (c = 0; c < reg_set->nr_regs; c++)
- {
- if (c == target)
- continue;
- if (!ir_reg_is_invalid(reg_set->regs[c]) && IREG_GET_REG(reg_set->regs[c].reg) == IREG_GET_REG(dst.reg))
- {
- reg_set->regs[c] = invalid_ir_reg;
- reg_set->dirty[c] = 0;
- }
- }
-}
-
-void codegen_reg_flush(ir_data_t *ir, codeblock_t *block)
-{
- host_reg_set_t *reg_set;
- int c;
-
- reg_set = &host_reg_set;
- for (c = 0; c < reg_set->nr_regs; c++)
- {
- if (!ir_reg_is_invalid(reg_set->regs[c]) && reg_set->dirty[c])
- {
- codegen_reg_writeback(reg_set, block, c, 0);
- }
- if (reg_set->reg_list[c].flags & HOST_REG_FLAG_VOLATILE)
- {
- reg_set->regs[c] = invalid_ir_reg;
- reg_set->dirty[c] = 0;
- }
- }
-
- reg_set = &host_fp_reg_set;
- for (c = 0; c < reg_set->nr_regs; c++)
- {
- if (!ir_reg_is_invalid(reg_set->regs[c]) && reg_set->dirty[c])
- {
- codegen_reg_writeback(reg_set, block, c, 0);
- }
- if (reg_set->reg_list[c].flags & HOST_REG_FLAG_VOLATILE)
- {
- reg_set->regs[c] = invalid_ir_reg;
- reg_set->dirty[c] = 0;
- }
- }
-}
-
-void codegen_reg_flush_invalidate(ir_data_t *ir, codeblock_t *block)
-{
- host_reg_set_t *reg_set;
- int c;
-
- reg_set = &host_reg_set;
- for (c = 0; c < reg_set->nr_regs; c++)
- {
- if (!ir_reg_is_invalid(reg_set->regs[c]) && reg_set->dirty[c])
- {
- codegen_reg_writeback(reg_set, block, c, 1);
- }
- reg_set->regs[c] = invalid_ir_reg;
- reg_set->dirty[c] = 0;
- }
-
- reg_set = &host_fp_reg_set;
- for (c = 0; c < reg_set->nr_regs; c++)
- {
- if (!ir_reg_is_invalid(reg_set->regs[c]) && reg_set->dirty[c])
- {
- codegen_reg_writeback(reg_set, block, c, 1);
- }
- reg_set->regs[c] = invalid_ir_reg;
- reg_set->dirty[c] = 0;
- }
-}
-
-/*Process dead register list, and optimise out register versions and uOPs where
- possible*/
-void codegen_reg_process_dead_list(ir_data_t *ir)
-{
- while (reg_dead_list)
- {
- int version = reg_dead_list & 0xff;
- int reg = reg_dead_list >> 8;
- reg_version_t *regv = ®_version[reg][version];
- uop_t *uop = &ir->uops[regv->parent_uop];
-
- /*Barrier uOPs should be preserved*/
- if (!(uop->type & (UOP_TYPE_BARRIER | UOP_TYPE_ORDER_BARRIER)))
- {
-// pclog(" codegen_process_dead_list: reg=%i version=%i uop=%i\n", reg, version, regv->parent_uop);
- uop->type = UOP_INVALID;
- /*Adjust refcounts on source registers. If these drop to
- zero then those registers can be considered for removal*/
- if (uop->src_reg_a.reg != IREG_INVALID)
- {
- reg_version_t *src_regv = ®_version[IREG_GET_REG(uop->src_reg_a.reg)][uop->src_reg_a.version];
- src_regv->refcount--;
- if (!src_regv->refcount)
- add_to_dead_list(src_regv, IREG_GET_REG(uop->src_reg_a.reg), uop->src_reg_a.version);
- }
- if (uop->src_reg_b.reg != IREG_INVALID)
- {
- reg_version_t *src_regv = ®_version[IREG_GET_REG(uop->src_reg_b.reg)][uop->src_reg_b.version];
- src_regv->refcount--;
- if (!src_regv->refcount)
- add_to_dead_list(src_regv, IREG_GET_REG(uop->src_reg_b.reg), uop->src_reg_b.version);
- }
- if (uop->src_reg_c.reg != IREG_INVALID)
- {
- reg_version_t *src_regv = ®_version[IREG_GET_REG(uop->src_reg_c.reg)][uop->src_reg_c.version];
- src_regv->refcount--;
- if (!src_regv->refcount)
- add_to_dead_list(src_regv, IREG_GET_REG(uop->src_reg_c.reg), uop->src_reg_c.version);
- }
- regv->flags |= REG_FLAGS_DEAD;
- }
-
- reg_dead_list = regv->next;
- }
-}
diff --git a/src/codegen_reg.h b/src/codegen_reg.h
deleted file mode 100644
index 4aaa231..0000000
--- a/src/codegen_reg.h
+++ /dev/null
@@ -1,419 +0,0 @@
-#ifndef _CODEGEN_REG_H_
-#define _CODEGEN_REG_H_
-
-#define IREG_REG_MASK 0xff
-#define IREG_SIZE_SHIFT 8
-#define IREG_SIZE_MASK (7 << IREG_SIZE_SHIFT)
-
-#define IREG_GET_REG(reg) ((reg) & IREG_REG_MASK)
-#define IREG_GET_SIZE(reg) ((reg) & IREG_SIZE_MASK)
-
-#define IREG_SIZE_L (0 << IREG_SIZE_SHIFT)
-#define IREG_SIZE_W (1 << IREG_SIZE_SHIFT)
-#define IREG_SIZE_B (2 << IREG_SIZE_SHIFT)
-#define IREG_SIZE_BH (3 << IREG_SIZE_SHIFT)
-#define IREG_SIZE_D (4 << IREG_SIZE_SHIFT)
-#define IREG_SIZE_Q (5 << IREG_SIZE_SHIFT)
-
-enum
-{
- IREG_EAX = 0,
- IREG_ECX = 1,
- IREG_EDX = 2,
- IREG_EBX = 3,
- IREG_ESP = 4,
- IREG_EBP = 5,
- IREG_ESI = 6,
- IREG_EDI = 7,
-
- IREG_flags_op = 8,
- IREG_flags_res = 9,
- IREG_flags_op1 = 10,
- IREG_flags_op2 = 11,
-
- IREG_pc = 12,
- IREG_oldpc = 13,
-
- IREG_eaaddr = 14,
- IREG_ea_seg = 15,
- IREG_op32 = 16,
- IREG_ssegsx = 17,
-
- IREG_rm_mod_reg = 18,
-
- IREG_ins = 19,
- IREG_cycles = 20,
-
- IREG_CS_base = 21,
- IREG_DS_base = 22,
- IREG_ES_base = 23,
- IREG_FS_base = 24,
- IREG_GS_base = 25,
- IREG_SS_base = 26,
-
- IREG_CS_seg = 27,
- IREG_DS_seg = 28,
- IREG_ES_seg = 29,
- IREG_FS_seg = 30,
- IREG_GS_seg = 31,
- IREG_SS_seg = 32,
-
- /*Temporary registers are stored on the stack, and are not guaranteed to
- be preserved across uOPs. They will not be written back if they will
- not be read again.*/
- IREG_temp0 = 33,
- IREG_temp1 = 34,
- IREG_temp2 = 35,
- IREG_temp3 = 36,
-
- IREG_FPU_TOP = 37,
-
- IREG_temp0d = 38,
- IREG_temp1d = 39,
-
- /*FPU stack registers are physical registers. Use IREG_ST() / IREG_tag()
- to access.
- When CODEBLOCK_STATIC_TOP is set, the physical register number will be
- used directly to index the stack. When it is clear, the difference
- between the current value of TOP and the value when the block was
- first compiled will be added to adjust for any changes in TOP.*/
- IREG_ST0 = 40,
- IREG_ST1 = 41,
- IREG_ST2 = 42,
- IREG_ST3 = 43,
- IREG_ST4 = 44,
- IREG_ST5 = 45,
- IREG_ST6 = 46,
- IREG_ST7 = 47,
-
- IREG_tag0 = 48,
- IREG_tag1 = 49,
- IREG_tag2 = 50,
- IREG_tag3 = 51,
- IREG_tag4 = 52,
- IREG_tag5 = 53,
- IREG_tag6 = 54,
- IREG_tag7 = 55,
-
- IREG_ST0_i64 = 56,
- IREG_ST1_i64 = 57,
- IREG_ST2_i64 = 58,
- IREG_ST3_i64 = 59,
- IREG_ST4_i64 = 60,
- IREG_ST5_i64 = 61,
- IREG_ST6_i64 = 62,
- IREG_ST7_i64 = 63,
-
- IREG_MM0x = 64,
- IREG_MM1x = 65,
- IREG_MM2x = 66,
- IREG_MM3x = 67,
- IREG_MM4x = 68,
- IREG_MM5x = 69,
- IREG_MM6x = 70,
- IREG_MM7x = 71,
-
- IREG_NPXCx = 72,
- IREG_NPXSx = 73,
-
- IREG_flagsx = 74,
- IREG_eflagsx = 75,
-
- IREG_CS_limit_low = 76,
- IREG_DS_limit_low = 77,
- IREG_ES_limit_low = 78,
- IREG_FS_limit_low = 79,
- IREG_GS_limit_low = 80,
- IREG_SS_limit_low = 81,
-
- IREG_CS_limit_high = 82,
- IREG_DS_limit_high = 83,
- IREG_ES_limit_high = 84,
- IREG_FS_limit_high = 85,
- IREG_GS_limit_high = 86,
- IREG_SS_limit_high = 87,
-
- IREG_COUNT = 88,
-
- IREG_INVALID = 255,
-
- IREG_AX = IREG_EAX + IREG_SIZE_W,
- IREG_CX = IREG_ECX + IREG_SIZE_W,
- IREG_DX = IREG_EDX + IREG_SIZE_W,
- IREG_BX = IREG_EBX + IREG_SIZE_W,
- IREG_SP = IREG_ESP + IREG_SIZE_W,
- IREG_BP = IREG_EBP + IREG_SIZE_W,
- IREG_SI = IREG_ESI + IREG_SIZE_W,
- IREG_DI = IREG_EDI + IREG_SIZE_W,
-
- IREG_AL = IREG_EAX + IREG_SIZE_B,
- IREG_CL = IREG_ECX + IREG_SIZE_B,
- IREG_DL = IREG_EDX + IREG_SIZE_B,
- IREG_BL = IREG_EBX + IREG_SIZE_B,
-
- IREG_AH = IREG_EAX + IREG_SIZE_BH,
- IREG_CH = IREG_ECX + IREG_SIZE_BH,
- IREG_DH = IREG_EDX + IREG_SIZE_BH,
- IREG_BH = IREG_EBX + IREG_SIZE_BH,
-
- IREG_flags_res_W = IREG_flags_res + IREG_SIZE_W,
- IREG_flags_op1_W = IREG_flags_op1 + IREG_SIZE_W,
- IREG_flags_op2_W = IREG_flags_op2 + IREG_SIZE_W,
-
- IREG_flags_res_B = IREG_flags_res + IREG_SIZE_B,
- IREG_flags_op1_B = IREG_flags_op1 + IREG_SIZE_B,
- IREG_flags_op2_B = IREG_flags_op2 + IREG_SIZE_B,
-
- IREG_temp0_W = IREG_temp0 + IREG_SIZE_W,
- IREG_temp1_W = IREG_temp1 + IREG_SIZE_W,
- IREG_temp2_W = IREG_temp2 + IREG_SIZE_W,
- IREG_temp3_W = IREG_temp3 + IREG_SIZE_W,
-
- IREG_temp0_B = IREG_temp0 + IREG_SIZE_B,
- IREG_temp1_B = IREG_temp1 + IREG_SIZE_B,
- IREG_temp2_B = IREG_temp2 + IREG_SIZE_B,
- IREG_temp3_B = IREG_temp3 + IREG_SIZE_B,
-
- IREG_temp0_D = IREG_temp0d + IREG_SIZE_D,
- IREG_temp1_D = IREG_temp1d + IREG_SIZE_D,
-
- IREG_temp0_Q = IREG_temp0d + IREG_SIZE_Q,
- IREG_temp1_Q = IREG_temp1d + IREG_SIZE_Q,
-
- IREG_eaaddr_W = IREG_eaaddr + IREG_SIZE_W,
-
- IREG_CS_seg_W = IREG_CS_seg + IREG_SIZE_W,
- IREG_DS_seg_W = IREG_DS_seg + IREG_SIZE_W,
- IREG_ES_seg_W = IREG_ES_seg + IREG_SIZE_W,
- IREG_FS_seg_W = IREG_FS_seg + IREG_SIZE_W,
- IREG_GS_seg_W = IREG_GS_seg + IREG_SIZE_W,
- IREG_SS_seg_W = IREG_SS_seg + IREG_SIZE_W,
-
- IREG_MM0 = IREG_MM0x + IREG_SIZE_Q,
- IREG_MM1 = IREG_MM1x + IREG_SIZE_Q,
- IREG_MM2 = IREG_MM2x + IREG_SIZE_Q,
- IREG_MM3 = IREG_MM3x + IREG_SIZE_Q,
- IREG_MM4 = IREG_MM4x + IREG_SIZE_Q,
- IREG_MM5 = IREG_MM5x + IREG_SIZE_Q,
- IREG_MM6 = IREG_MM6x + IREG_SIZE_Q,
- IREG_MM7 = IREG_MM7x + IREG_SIZE_Q,
-
- IREG_NPXC = IREG_NPXCx + IREG_SIZE_W,
- IREG_NPXS = IREG_NPXSx + IREG_SIZE_W,
-
- IREG_ssegs = IREG_ssegsx + IREG_SIZE_B,
-
- IREG_flags = IREG_flagsx + IREG_SIZE_W,
- IREG_eflags = IREG_eflagsx + IREG_SIZE_W
-};
-
-#define IREG_8(reg) (((reg) & 4) ? (((reg) & 3) + IREG_AH) : ((reg) + IREG_AL))
-#define IREG_16(reg) ((reg) + IREG_AX)
-#define IREG_32(reg) ((reg) + IREG_EAX)
-
-#define IREG_ST(r) (IREG_ST0 + ((cpu_state.TOP + (r)) & 7) + IREG_SIZE_D)
-#define IREG_ST_i64(r) (IREG_ST0_i64 + ((cpu_state.TOP + (r)) & 7) + IREG_SIZE_Q)
-#define IREG_tag(r) (IREG_tag0 + ((cpu_state.TOP + (r)) & 7))
-#define IREG_tag_B(r) (IREG_tag0 + ((cpu_state.TOP + (r)) & 7) + IREG_SIZE_B)
-
-#define IREG_MM(reg) ((reg) + IREG_MM0)
-
-#define IREG_TOP_diff_stack_offset 32
-
-static inline int ireg_seg_base(x86seg *seg)
-{
- if (seg == &cpu_state.seg_cs)
- return IREG_CS_base;
- if (seg == &cpu_state.seg_ds)
- return IREG_DS_base;
- if (seg == &cpu_state.seg_es)
- return IREG_ES_base;
- if (seg == &cpu_state.seg_fs)
- return IREG_FS_base;
- if (seg == &cpu_state.seg_gs)
- return IREG_GS_base;
- if (seg == &cpu_state.seg_ss)
- return IREG_SS_base;
- fatal("ireg_seg_base : unknown segment\n");
- return 0;
-}
-
-static inline int ireg_seg_limit_low(x86seg *seg)
-{
- if (seg == &cpu_state.seg_cs)
- return IREG_CS_limit_low;
- if (seg == &cpu_state.seg_ds)
- return IREG_DS_limit_low;
- if (seg == &cpu_state.seg_es)
- return IREG_ES_limit_low;
- if (seg == &cpu_state.seg_fs)
- return IREG_FS_limit_low;
- if (seg == &cpu_state.seg_gs)
- return IREG_GS_limit_low;
- if (seg == &cpu_state.seg_ss)
- return IREG_SS_limit_low;
- fatal("ireg_seg_limit_low : unknown segment\n");
- return 0;
-}
-static inline int ireg_seg_limit_high(x86seg *seg)
-{
- if (seg == &cpu_state.seg_cs)
- return IREG_CS_limit_high;
- if (seg == &cpu_state.seg_ds)
- return IREG_DS_limit_high;
- if (seg == &cpu_state.seg_es)
- return IREG_ES_limit_high;
- if (seg == &cpu_state.seg_fs)
- return IREG_FS_limit_high;
- if (seg == &cpu_state.seg_gs)
- return IREG_GS_limit_high;
- if (seg == &cpu_state.seg_ss)
- return IREG_SS_limit_high;
- fatal("ireg_seg_limit_high : unknown segment\n");
- return 0;
-}
-
-extern uint8_t reg_last_version[IREG_COUNT];
-
-/*This version of the register must be calculated, regardless of whether it is
- apparently required or not. Do not optimise out.*/
-#define REG_FLAGS_REQUIRED (1 << 0)
-/*This register and the parent uOP have been optimised out.*/
-#define REG_FLAGS_DEAD (1 << 1)
-
-typedef struct
-{
- /*Refcount of pending reads on this register version*/
- uint8_t refcount;
- /*Flags*/
- uint8_t flags;
- /*uOP that generated this register version*/
- uint16_t parent_uop;
- /*Pointer to next register version in dead register list*/
- uint16_t next;
-} reg_version_t;
-
-extern reg_version_t reg_version[IREG_COUNT][256];
-
-/*Head of dead register list; a list of register versions that are not used and
- can be optimised out*/
-extern uint16_t reg_dead_list;
-
-static inline void add_to_dead_list(reg_version_t *regv, int reg, int version)
-{
- regv->next = reg_dead_list;
- reg_dead_list = version | (reg << 8);
-}
-
-typedef struct
-{
- uint16_t reg;
- uint16_t version;
-} ir_reg_t;
-
-extern ir_reg_t invalid_ir_reg;
-
-typedef uint16_t ir_host_reg_t;
-
-extern int max_version_refcount;
-
-#define REG_VERSION_MAX 250
-#define REG_REFCOUNT_MAX 250
-
-static inline ir_reg_t codegen_reg_read(int reg)
-{
- ir_reg_t ireg;
- reg_version_t *version;
-
-#ifndef RELEASE_BUILD
- if (IREG_GET_REG(reg) == IREG_INVALID)
- fatal("codegen_reg_read - IREG_INVALID\n");
-#endif
- ireg.reg = reg;
- ireg.version = reg_last_version[IREG_GET_REG(reg)];
- version = ®_version[IREG_GET_REG(ireg.reg)][ireg.version];
- version->flags = 0;
- version->refcount++;
-#ifndef RELEASE_BUILD
- if (!version->refcount)
- fatal("codegen_reg_read - refcount overflow\n");
- else
-#endif
- if (version->refcount > REG_REFCOUNT_MAX)
- CPU_BLOCK_END();
- if (version->refcount > max_version_refcount)
- max_version_refcount = version->refcount;
-// pclog("codegen_reg_read: %i %i %i\n", reg & IREG_REG_MASK, ireg.version, reg_version_refcount[IREG_GET_REG(ireg.reg)][ireg.version]);
- return ireg;
-}
-
-int reg_is_native_size(ir_reg_t ir_reg);
-
-static inline ir_reg_t codegen_reg_write(int reg, int uop_nr)
-{
- ir_reg_t ireg;
- int last_version = reg_last_version[IREG_GET_REG(reg)];
- reg_version_t *version;
-
-#ifndef RELEASE_BUILD
- if (IREG_GET_REG(reg) == IREG_INVALID)
- fatal("codegen_reg_write - IREG_INVALID\n");
-#endif
- ireg.reg = reg;
- ireg.version = last_version + 1;
-
- if (IREG_GET_REG(reg) > IREG_EBX && last_version && !reg_version[IREG_GET_REG(reg)][last_version].refcount &&
- !(reg_version[IREG_GET_REG(reg)][last_version].flags & REG_FLAGS_REQUIRED))
- {
- if (reg_is_native_size(ireg)) /*Non-native size registers have an implicit dependency on the previous version, so don't add to dead list*/
- add_to_dead_list(®_version[IREG_GET_REG(reg)][last_version], IREG_GET_REG(reg), last_version);
- }
-
- reg_last_version[IREG_GET_REG(reg)]++;
-#ifndef RELEASE_BUILD
- if (!reg_last_version[IREG_GET_REG(reg)])
- fatal("codegen_reg_write - version overflow\n");
- else
-#endif
- if (reg_last_version[IREG_GET_REG(reg)] > REG_VERSION_MAX)
- CPU_BLOCK_END();
- if (reg_last_version[IREG_GET_REG(reg)] > max_version_refcount)
- max_version_refcount = reg_last_version[IREG_GET_REG(reg)];
-
- version = ®_version[IREG_GET_REG(reg)][ireg.version];
- version->refcount = 0;
- version->flags = 0;
- version->parent_uop = uop_nr;
-// pclog("codegen_reg_write: %i\n", reg & IREG_REG_MASK);
- return ireg;
-}
-
-static inline int ir_reg_is_invalid(ir_reg_t ir_reg)
-{
- return (IREG_GET_REG(ir_reg.reg) == IREG_INVALID);
-}
-
-struct ir_data_t;
-
-void codegen_reg_reset();
-/*Write back all dirty registers*/
-void codegen_reg_flush(struct ir_data_t *ir, codeblock_t *block);
-/*Write back and evict all registers*/
-void codegen_reg_flush_invalidate(struct ir_data_t *ir, codeblock_t *block);
-
-/*Register ir_reg usage for this uOP. This ensures that required registers aren't evicted*/
-void codegen_reg_alloc_register(ir_reg_t dest_reg_a, ir_reg_t src_reg_a, ir_reg_t src_reg_b, ir_reg_t src_reg_c);
-
-#ifdef CODEGEN_BACKEND_HAS_MOV_IMM
-int codegen_reg_is_loaded(ir_reg_t ir_reg);
-void codegen_reg_write_imm(codeblock_t *block, ir_reg_t ir_reg, uint32_t imm_data);
-#endif
-
-ir_host_reg_t codegen_reg_alloc_read_reg(codeblock_t *block, ir_reg_t ir_reg, int *host_reg_idx);
-ir_host_reg_t codegen_reg_alloc_write_reg(codeblock_t *block, ir_reg_t ir_reg);
-
-void codegen_reg_rename(codeblock_t *block, ir_reg_t src, ir_reg_t dst);
-
-void codegen_reg_mark_as_required();
-void codegen_reg_process_dead_list(struct ir_data_t *ir);
-#endif
diff --git a/src/codegen_timing_486.c b/src/codegen_timing_486.c
index 6f9e3af..c88f9ca 100644
--- a/src/codegen_timing_486.c
+++ b/src/codegen_timing_486.c
@@ -5,8 +5,6 @@
#include "x87.h"
#include "mem.h"
#include "codegen.h"
-#include "codegen_ops.h"
-#include "codegen_timing_common.h"
#define CYCLES(c) (int *)c
#define CYCLES2(c16, c32) (int *)((-1 & ~0xffff) | c16 | (c32 << 8))
@@ -249,22 +247,9 @@ static int *opcode_timings_8x[8] =
{
&timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_rm
};
-static int *opcode_timings_8x_mod3[8] =
-{
- &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_rm
-};
-static int *opcode_timings_81[8] =
-{
- &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_rm
-};
-static int *opcode_timings_81_mod3[8] =
-{
- &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_rm
-};
static int timing_count;
static uint8_t last_prefix;
-static uint32_t regmask_modified;
static inline int COUNT(int *c, int op_32)
{
@@ -281,7 +266,6 @@ static inline int COUNT(int *c, int op_32)
void codegen_timing_486_block_start()
{
- regmask_modified = 0;
}
void codegen_timing_486_start()
@@ -296,143 +280,96 @@ void codegen_timing_486_prefix(uint8_t prefix, uint32_t fetchdat)
last_prefix = prefix;
}
-void codegen_timing_486_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t op_pc)
+void codegen_timing_486_opcode(uint8_t opcode, uint32_t fetchdat, int op_32)
{
int **timings;
- uint64_t *deps;
int mod3 = ((fetchdat & 0xc0) == 0xc0);
- int bit8 = !(opcode & 1);
-
+
switch (last_prefix)
{
case 0x0f:
timings = mod3 ? opcode_timings_0f_mod3 : opcode_timings_0f;
- deps = mod3 ? opcode_deps_0f_mod3 : opcode_deps_0f;
-// pclog("timings 0f\n");
break;
case 0xd8:
timings = mod3 ? opcode_timings_d8_mod3 : opcode_timings_d8;
- deps = mod3 ? opcode_deps_d8_mod3 : opcode_deps_d8;
opcode = (opcode >> 3) & 7;
-// pclog("timings d8\n");
break;
case 0xd9:
timings = mod3 ? opcode_timings_d9_mod3 : opcode_timings_d9;
- deps = mod3 ? opcode_deps_d9_mod3 : opcode_deps_d9;
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
-// pclog("timings d9\n");
break;
case 0xda:
timings = mod3 ? opcode_timings_da_mod3 : opcode_timings_da;
- deps = mod3 ? opcode_deps_da_mod3 : opcode_deps_da;
opcode = (opcode >> 3) & 7;
-// pclog("timings da\n");
break;
case 0xdb:
timings = mod3 ? opcode_timings_db_mod3 : opcode_timings_db;
- deps = mod3 ? opcode_deps_db_mod3 : opcode_deps_db;
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
-// pclog("timings db\n");
break;
case 0xdc:
timings = mod3 ? opcode_timings_dc_mod3 : opcode_timings_dc;
- deps = mod3 ? opcode_deps_dc_mod3 : opcode_deps_dc;
opcode = (opcode >> 3) & 7;
-// pclog("timings dc\n");
break;
case 0xdd:
timings = mod3 ? opcode_timings_dd_mod3 : opcode_timings_dd;
- deps = mod3 ? opcode_deps_dd_mod3 : opcode_deps_dd;
opcode = (opcode >> 3) & 7;
-// pclog("timings dd\n");
break;
case 0xde:
timings = mod3 ? opcode_timings_de_mod3 : opcode_timings_de;
- deps = mod3 ? opcode_deps_de_mod3 : opcode_deps_de;
opcode = (opcode >> 3) & 7;
-// pclog("timings de\n");
break;
case 0xdf:
timings = mod3 ? opcode_timings_df_mod3 : opcode_timings_df;
- deps = mod3 ? opcode_deps_df_mod3 : opcode_deps_df;
opcode = (opcode >> 3) & 7;
-// pclog("timings df\n");
break;
default:
switch (opcode)
{
- case 0x80: case 0x82: case 0x83:
- timings = mod3 ? opcode_timings_8x_mod3 : opcode_timings_8x;
- deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x_mod3;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings 80 %p %p %p\n", (void *)timings, (void *)opcode_timings_mod3, (void *)opcode_timings_8x);
- break;
- case 0x81:
- timings = mod3 ? opcode_timings_81_mod3 : opcode_timings_81;
- deps = mod3 ? opcode_deps_81_mod3 : opcode_deps_81;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings 80 %p %p %p\n", (void *)timings, (void *)opcode_timings_mod3, (void *)opcode_timings_8x);
+ case 0x80: case 0x81: case 0x82: case 0x83:
+ timings = mod3 ? opcode_timings_mod3 : opcode_timings_8x;
+ if (!mod3)
+ opcode = (fetchdat >> 3) & 7;
break;
case 0xc0: case 0xc1: case 0xd0: case 0xd1: case 0xd2: case 0xd3:
timings = mod3 ? opcode_timings_shift_mod3 : opcode_timings_shift;
- deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
opcode = (fetchdat >> 3) & 7;
-// pclog("timings c0\n");
break;
case 0xf6:
timings = mod3 ? opcode_timings_f6_mod3 : opcode_timings_f6;
- deps = mod3 ? opcode_deps_f6_mod3 : opcode_deps_f6;
opcode = (fetchdat >> 3) & 7;
-// pclog("timings f6\n");
break;
case 0xf7:
timings = mod3 ? opcode_timings_f7_mod3 : opcode_timings_f7;
- deps = mod3 ? opcode_deps_f7_mod3 : opcode_deps_f7;
opcode = (fetchdat >> 3) & 7;
-// pclog("timings f7\n");
break;
case 0xff:
timings = mod3 ? opcode_timings_ff_mod3 : opcode_timings_ff;
- deps = mod3 ? opcode_deps_ff_mod3 : opcode_deps_ff;
opcode = (fetchdat >> 3) & 7;
-// pclog("timings ff\n");
break;
default:
timings = mod3 ? opcode_timings_mod3 : opcode_timings;
- deps = mod3 ? opcode_deps_mod3 : opcode_deps;
-// pclog("timings normal\n");
break;
}
}
timing_count += COUNT(timings[opcode], op_32);
- if (regmask_modified & get_addr_regmask(deps[opcode], fetchdat, op_32))
- timing_count++; /*AGI stall*/
codegen_block_cycles += timing_count;
-
- regmask_modified = get_dstdep_mask(deps[opcode], fetchdat, bit8);
}
void codegen_timing_486_block_end()
{
}
-int codegen_timing_486_jump_cycles()
-{
- return 0;
-}
-
codegen_timing_t codegen_timing_486 =
{
codegen_timing_486_start,
codegen_timing_486_prefix,
codegen_timing_486_opcode,
codegen_timing_486_block_start,
- codegen_timing_486_block_end,
- codegen_timing_486_jump_cycles
+ codegen_timing_486_block_end
};
diff --git a/src/codegen_timing_686.c b/src/codegen_timing_686.c
index cc1e119..efe7917 100644
--- a/src/codegen_timing_686.c
+++ b/src/codegen_timing_686.c
@@ -2,7 +2,6 @@
- X/Y pairing
- FPU/FXCH pairing
- Prefix decode delay
- - AGI stalls
Elements not taken into account :
- Branch prediction (beyond most simplistic approximation)
- FPU queue
@@ -16,7 +15,6 @@
#include "x87.h"
#include "mem.h"
#include "codegen.h"
-#include "codegen_timing_common.h"
/*Instruction has different execution time for 16 and 32 bit data. Does not pair */
#define CYCLES_HAS_MULTI (1 << 31)
@@ -35,6 +33,11 @@
#define CYCLES_MASK ((1 << 7) - 1)
+/*Instruction is MMX shift or pack/unpack instruction*/
+#define MMX_SHIFTPACK (1 << 7)
+/*Instruction is MMX multiply instruction*/
+#define MMX_MULTIPLY (1 << 8)
+
/*Instruction does not pair*/
#define PAIR_NP (0 << 29)
/*Instruction pairs in X pipe only*/
@@ -46,6 +49,35 @@
#define PAIR_MASK (3 << 29)
+/*Instruction has input dependency on register in REG field*/
+#define SRCDEP_REG (1 << 9)
+/*Instruction has input dependency on register in R/M field*/
+#define SRCDEP_RM (1 << 10)
+/*Instruction modifies register in REG field*/
+#define DSTDEP_REG (1 << 11)
+/*Instruction modifies register in R/M field*/
+#define DSTDEP_RM (1 << 12)
+
+/*Instruction has input dependency on given register*/
+#define SRCDEP_EAX (1 << 13)
+#define SRCDEP_ECX (1 << 14)
+#define SRCDEP_EDX (1 << 15)
+#define SRCDEP_EBX (1 << 16)
+#define SRCDEP_ESP (1 << 17)
+#define SRCDEP_EBP (1 << 18)
+#define SRCDEP_ESI (1 << 19)
+#define SRCDEP_EDI (1 << 20)
+
+/*Instruction modifies given register*/
+#define DSTDEP_EAX (1 << 21)
+#define DSTDEP_ECX (1 << 22)
+#define DSTDEP_EDX (1 << 23)
+#define DSTDEP_EBX (1 << 24)
+#define DSTDEP_ESP (1 << 25)
+#define DSTDEP_EBP (1 << 26)
+#define DSTDEP_ESI (1 << 27)
+#define DSTDEP_EDI (1 << 28)
+
#define INVALID 0
static int prev_full;
@@ -53,75 +85,119 @@ static uint32_t prev_opcode;
static uint32_t *prev_timings;
static uint32_t prev_op_32;
static uint32_t prev_regmask;
-static uint64_t *prev_deps;
-static uint32_t prev_fetchdat;
-static uint32_t last_regmask_modified;
-static uint32_t regmask_modified;
+#define REGMASK_MMX (1 << 8)
+static uint32_t get_srcdep_mask(uint32_t data, uint32_t fetchdat, int bit8)
+{
+ uint32_t mask = 0;
+ if (data & SRCDEP_REG)
+ {
+ int reg = (fetchdat >> 3) & 7;
+ if (bit8)
+ reg &= 3;
+ mask |= (1 << reg);
+ }
+ if (data & SRCDEP_RM)
+ {
+ int reg = fetchdat & 7;
+ if (bit8)
+ reg &= 3;
+ mask |= (1 << reg);
+ }
+ mask |= ((data >> 16) & 0xff);
+ if (data & (MMX_SHIFTPACK | MMX_MULTIPLY))
+ mask |= REGMASK_MMX;
+
+ return mask;
+}
+
+static uint32_t get_dstdep_mask(uint32_t data, uint32_t fetchdat, int bit8)
+{
+ uint32_t mask = 0;
+ if (data & DSTDEP_REG)
+ {
+ int reg = (fetchdat >> 3) & 7;
+ if (bit8)
+ reg &= 3;
+ mask |= (1 << reg);
+ }
+ if (data & DSTDEP_RM)
+ {
+ int reg = fetchdat & 7;
+ if (bit8)
+ reg &= 3;
+ mask |= (1 << reg);
+ }
+ mask |= ((data >> 24) & 0xff);
+ if (data & (MMX_SHIFTPACK | MMX_MULTIPLY))
+ mask |= REGMASK_MMX;
+
+ return mask;
+}
static uint32_t opcode_timings[256] =
{
-/* ADD ADD ADD ADD*/
-/*00*/ PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RM, PAIR_XY | CYCLES_RM,
-/* ADD ADD PUSH ES POP ES*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(3),
-/* OR OR OR OR*/
- PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RM, PAIR_XY | CYCLES_RM,
-/* OR OR PUSH CS */
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_NP | CYCLES(1), INVALID,
+/* ADD ADD ADD ADD*/
+/*00*/ PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RM | SRCDEP_REG | DSTDEP_REG, PAIR_XY | CYCLES_RM | SRCDEP_REG | DSTDEP_REG,
+/* ADD ADD PUSH ES POP ES*/
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_NP | CYCLES(1) | SRCDEP_ESP | DSTDEP_ESP, PAIR_NP | CYCLES(3),
+/* OR OR OR OR*/
+ PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RM | SRCDEP_REG | DSTDEP_REG, PAIR_XY | CYCLES_RM | SRCDEP_REG | DSTDEP_REG,
+/* OR OR PUSH CS */
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_NP | CYCLES(1) | SRCDEP_ESP | DSTDEP_ESP, INVALID,
-/* ADC ADC ADC ADC*/
-/*10*/ PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RM, PAIR_XY | CYCLES_RM,
-/* ADC ADC PUSH SS POP SS*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(3),
-/* SBB SBB SBB SBB*/
- PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RM, PAIR_XY | CYCLES_RM,
-/* SBB SBB PUSH DS POP DS*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(3),
+/* ADC ADC ADC ADC*/
+/*10*/ PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RM | SRCDEP_REG | DSTDEP_REG, PAIR_XY | CYCLES_RM | SRCDEP_REG | DSTDEP_REG,
+/* ADC ADC PUSH SS POP SS*/
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_NP | CYCLES(1) | SRCDEP_ESP | DSTDEP_ESP, PAIR_NP | CYCLES(3),
+/* SBB SBB SBB SBB*/
+ PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RM | SRCDEP_REG | DSTDEP_REG, PAIR_XY | CYCLES_RM | SRCDEP_REG | DSTDEP_REG,
+/* SBB SBB PUSH DS POP DS*/
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_NP | CYCLES(1) | SRCDEP_ESP | DSTDEP_ESP, PAIR_NP | CYCLES(3),
-/* AND AND AND AND*/
-/*20*/ PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RM, PAIR_XY | CYCLES_RM,
-/* AND AND DAA*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, INVALID, PAIR_NP | CYCLES(7),
-/* SUB SUB SUB SUB*/
- PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RM, PAIR_XY | CYCLES_RM,
-/* SUB SUB DAS*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, INVALID, PAIR_NP | CYCLES(7),
+/* AND AND AND AND*/
+/*20*/ PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RM | SRCDEP_REG | DSTDEP_REG, PAIR_XY | CYCLES_RM | SRCDEP_REG | DSTDEP_REG,
+/* AND AND DAA*/
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, INVALID, PAIR_NP | CYCLES(7),
+/* SUB SUB SUB SUB*/
+ PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RM | SRCDEP_REG | DSTDEP_REG, PAIR_XY | CYCLES_RM | SRCDEP_REG | DSTDEP_REG,
+/* SUB SUB DAS*/
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, INVALID, PAIR_NP | CYCLES(7),
-/* XOR XOR XOR XOR*/
-/*30*/ PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RM, PAIR_XY | CYCLES_RM,
-/* XOR XOR AAA*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, INVALID, PAIR_NP | CYCLES(7),
-/* CMP CMP CMP CMP*/
- PAIR_XY | CYCLES_RM, PAIR_XY | CYCLES_RM, PAIR_XY | CYCLES_RM, PAIR_XY | CYCLES_RM,
-/* CMP CMP AAS*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, INVALID, PAIR_NP | CYCLES(7),
+/* XOR XOR XOR XOR*/
+/*30*/ PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RM | SRCDEP_REG | DSTDEP_REG, PAIR_XY | CYCLES_RM | SRCDEP_REG | DSTDEP_REG,
+/* XOR XOR AAA*/
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, INVALID, PAIR_NP | CYCLES(7),
+/* CMP CMP CMP CMP*/
+ PAIR_XY | CYCLES_RM | SRCDEP_REG, PAIR_XY | CYCLES_RM | SRCDEP_REG, PAIR_XY | CYCLES_RM | SRCDEP_REG, PAIR_XY | CYCLES_RM | SRCDEP_REG,
+/* CMP CMP AAS*/
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX, INVALID, PAIR_NP | CYCLES(7),
-/* INC EAX INC ECX INC EDX INC EBX*/
-/*40*/ PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* INC ESP INC EBP INC ESI INC EDI*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* DEC EAX DEC ECX DEC EDX DEC EBX*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* DEC ESP DEC EBP DEC ESI DEC EDI*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
+/* INC EAX INC ECX INC EDX INC EBX*/
+/*40*/ PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_ECX | DSTDEP_ECX, PAIR_XY | CYCLES_REG | SRCDEP_EDX | DSTDEP_EDX, PAIR_XY | CYCLES_REG | SRCDEP_EBX | DSTDEP_EBX,
+/* INC ESP INC EBP INC ESI INC EDI*/
+ PAIR_XY | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EBP | DSTDEP_EBP, PAIR_XY | CYCLES_REG | SRCDEP_ESI | DSTDEP_ESI, PAIR_XY | CYCLES_REG | SRCDEP_EDI | DSTDEP_EDI,
+/* DEC EAX DEC ECX DEC EDX DEC EBX*/
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_ECX | DSTDEP_ECX, PAIR_XY | CYCLES_REG | SRCDEP_EDX | DSTDEP_EDX, PAIR_XY | CYCLES_REG | SRCDEP_EBX | DSTDEP_EBX,
+/* DEC ESP DEC EBP DEC ESI DEC EDI*/
+ PAIR_XY | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EBP | DSTDEP_EBP, PAIR_XY | CYCLES_REG | SRCDEP_ESI | DSTDEP_ESI, PAIR_XY | CYCLES_REG | SRCDEP_EDI | DSTDEP_EDI,
-/* PUSH EAX PUSH ECX PUSH EDX PUSH EBX*/
-/*50*/ PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* PUSH ESP PUSH EBP PUSH ESI PUSH EDI*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* POP EAX POP ECX POP EDX POP EBX*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* POP ESP POP EBP POP ESI POP EDI*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
+/* PUSH EAX PUSH ECX PUSH EDX PUSH EBX*/
+/*50*/ PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_ECX | DSTDEP_ECX | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EDX | DSTDEP_EDX | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EBX | DSTDEP_EBX | SRCDEP_ESP | DSTDEP_ESP,
+/* PUSH ESP PUSH EBP PUSH ESI PUSH EDI*/
+ PAIR_XY | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EBP | DSTDEP_EBP | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_ESI | DSTDEP_ESI | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EDI | DSTDEP_EDI | SRCDEP_ESP | DSTDEP_ESP,
+/* POP EAX POP ECX POP EDX POP EBX*/
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_ECX | DSTDEP_ECX | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EDX | DSTDEP_EDX | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EBX | DSTDEP_EBX | SRCDEP_ESP | DSTDEP_ESP,
+/* POP ESP POP EBP POP ESI POP EDI*/
+ PAIR_XY | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EBP | DSTDEP_EBP | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_ESI | DSTDEP_ESI | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EDI | DSTDEP_EDI | SRCDEP_ESP | DSTDEP_ESP,
-/* PUSHA POPA BOUND ARPL*/
-/*60*/ PAIR_NP | CYCLES(6), PAIR_NP | CYCLES(6), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(9),
- INVALID, INVALID, INVALID, INVALID,
-/* PUSH imm IMUL PUSH imm IMUL*/
- PAIR_XY | CYCLES_REG, PAIR_NP | CYCLES(10), PAIR_XY | CYCLES_REG, PAIR_NP | CYCLES(10),
-/* INSB INSW OUTSB OUTSW*/
- PAIR_NP | CYCLES(14), PAIR_NP | CYCLES(14), PAIR_NP | CYCLES(14), PAIR_NP | CYCLES(14),
+/* PUSHA POPA BOUND ARPL*/
+/*60*/ PAIR_NP | CYCLES(6), PAIR_NP | CYCLES(6), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(9),
+ INVALID, INVALID, INVALID, INVALID,
+/* PUSH imm IMUL PUSH imm IMUL*/
+ PAIR_XY | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_NP | CYCLES(10), PAIR_XY | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_NP | CYCLES(10),
+/* INSB INSW OUTSB OUTSW*/
+ PAIR_NP | CYCLES(14), PAIR_NP | CYCLES(14), PAIR_NP | CYCLES(14), PAIR_NP | CYCLES(14),
/* Jxx*/
/*70*/ PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH,
@@ -129,37 +205,37 @@ static uint32_t opcode_timings[256] =
PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH,
PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH,
-/*80*/ INVALID, INVALID, INVALID, INVALID,
-/* TEST TEST XCHG XCHG*/
- PAIR_XY | CYCLES_RM, PAIR_XY | CYCLES_RM, PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2),
-/* MOV MOV MOV MOV*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* MOV from seg LEA MOV to seg POP*/
- PAIR_XY | CYCLES(1), PAIR_XY | CYCLES_REG, CYCLES(3), PAIR_XY | CYCLES(1),
+/*80*/ INVALID, INVALID, INVALID, INVALID,
+/* TEST TEST XCHG XCHG*/
+ PAIR_XY | CYCLES_RM | SRCDEP_REG, PAIR_XY | CYCLES_RM | SRCDEP_REG, PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2),
+/* MOV MOV MOV MOV*/
+ PAIR_XY | CYCLES_REG | SRCDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG, PAIR_XY | CYCLES_REG | DSTDEP_REG, PAIR_XY | CYCLES_REG | DSTDEP_REG,
+/* MOV from seg LEA MOV to seg POP*/
+ PAIR_XY | CYCLES(1), PAIR_XY | CYCLES_REG | DSTDEP_REG, CYCLES(3), PAIR_XY | CYCLES(1),
-/* NOP XCHG XCHG XCHG*/
-/*90*/ PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2),
-/* XCHG XCHG XCHG XCHG*/
- PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2),
-/* CBW CWD CALL far WAIT*/
- PAIR_XY | CYCLES(3), PAIR_XY | CYCLES(2), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(5),
-/* PUSHF POPF SAHF LAHF*/
- PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(9), PAIR_XY | CYCLES(1), PAIR_XY | CYCLES(2),
+/* NOP XCHG XCHG XCHG*/
+/*90*/ PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2),
+/* XCHG XCHG XCHG XCHG*/
+ PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2),
+/* CBW CWD CALL far WAIT*/
+ PAIR_XY | CYCLES(3), PAIR_XY | CYCLES(2), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(5),
+/* PUSHF POPF SAHF LAHF*/
+ PAIR_XY | CYCLES(2) | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES(9) | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES(1), PAIR_XY | CYCLES(2),
-/* MOV MOV MOV MOV*/
-/*a0*/ PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* MOVSB MOVSW CMPSB CMPSW*/
- PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(5), PAIR_NP | CYCLES(5),
-/* TEST TEST STOSB STOSW*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2),
-/* LODSB LODSW SCASB SCASW*/
- PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2),
+/* MOV MOV MOV MOV*/
+/*a0*/ PAIR_XY | CYCLES_REG | DSTDEP_EAX, PAIR_XY | CYCLES_REG | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX,
+/* MOVSB MOVSW CMPSB CMPSW*/
+ PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(5), PAIR_NP | CYCLES(5),
+/* TEST TEST STOSB STOSW*/
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX, PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2),
+/* LODSB LODSW SCASB SCASW*/
+ PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2),
/* MOV*/
-/*b0*/ PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
+/*b0*/ PAIR_XY | CYCLES_REG | DSTDEP_EAX, PAIR_XY | CYCLES_REG | DSTDEP_ECX, PAIR_XY | CYCLES_REG | DSTDEP_EDX, PAIR_XY | CYCLES_REG | DSTDEP_EBX,
+ PAIR_XY | CYCLES_REG | DSTDEP_EAX, PAIR_XY | CYCLES_REG | DSTDEP_ECX, PAIR_XY | CYCLES_REG | DSTDEP_EDX, PAIR_XY | CYCLES_REG | DSTDEP_EBX,
+ PAIR_XY | CYCLES_REG | DSTDEP_EAX, PAIR_XY | CYCLES_REG | DSTDEP_ECX, PAIR_XY | CYCLES_REG | DSTDEP_EDX, PAIR_XY | CYCLES_REG | DSTDEP_EBX,
+ PAIR_XY | CYCLES_REG | DSTDEP_ESP, PAIR_XY | CYCLES_REG | DSTDEP_EBP, PAIR_XY | CYCLES_REG | DSTDEP_ESI, PAIR_XY | CYCLES_REG | DSTDEP_EDI,
/* RET imm RET*/
/*c0*/ INVALID, INVALID, PAIR_X_BRANCH | CYCLES(3), PAIR_X_BRANCH | CYCLES(2),
@@ -177,7 +253,7 @@ static uint32_t opcode_timings[256] =
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
/* LOOPNE LOOPE LOOP JCXZ*/
-/*e0*/ PAIR_X_BRANCH| CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH,
+/*e0*/ PAIR_X_BRANCH| CYCLES_BRANCH | SRCDEP_ECX, PAIR_X_BRANCH | CYCLES_BRANCH | SRCDEP_ECX, PAIR_X_BRANCH | CYCLES_BRANCH | SRCDEP_ECX, PAIR_X_BRANCH | CYCLES_BRANCH | SRCDEP_ECX,
/* IN AL IN AX OUT_AL OUT_AX*/
PAIR_NP | CYCLES(14), PAIR_NP | CYCLES(14), PAIR_NP | CYCLES(14), PAIR_NP | CYCLES(14),
/* CALL JMP JMP JMP*/
@@ -197,67 +273,68 @@ static uint32_t opcode_timings[256] =
static uint32_t opcode_timings_mod3[256] =
{
-/* ADD ADD ADD ADD*/
-/*00*/ PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* ADD ADD PUSH ES POP ES*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(3),
-/* OR OR OR OR*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* OR OR PUSH CS */
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_NP | CYCLES(1), INVALID,
+/* ADD ADD ADD ADD*/
+/*00*/ PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG,
+/* ADD ADD PUSH ES POP ES*/
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_XY | CYCLES(1) | SRCDEP_ESP | DSTDEP_ESP, PAIR_NP | CYCLES(3),
+/* OR OR OR OR*/
+ PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG,
+/* OR OR PUSH CS */
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_XY | CYCLES(1) | SRCDEP_ESP | DSTDEP_ESP, INVALID,
-/* ADC ADC ADC ADC*/
-/*10*/ PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* ADC ADC PUSH SS POP SS*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(3),
-/* SBB SBB SBB SBB*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* SBB SBB PUSH DS POP DS*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(3),
+/* ADC ADC ADC ADC*/
+/*10*/ PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG,
+/* ADC ADC PUSH SS POP SS*/
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_XY | CYCLES(1) | SRCDEP_ESP | DSTDEP_ESP, PAIR_NP | CYCLES(3),
+/* SBB SBB SBB SBB*/
+ PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG,
+/* SBB SBB PUSH DS POP DS*/
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_XY | CYCLES(1) | SRCDEP_ESP | DSTDEP_ESP, PAIR_NP | CYCLES(3),
-/* AND AND AND AND*/
-/*20*/ PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* AND AND DAA*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, INVALID, PAIR_NP | CYCLES(7),
-/* SUB SUB SUB SUB*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* SUB SUB DAS*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, INVALID, PAIR_NP | CYCLES(7),
+/* AND AND AND AND*/
+/*20*/ PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG,
+/* AND AND DAA*/
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, INVALID, PAIR_NP | CYCLES(9),
+/* SUB SUB SUB SUB*/
+ PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG,
+/* SUB SUB DAS*/
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, INVALID, PAIR_NP | CYCLES(9),
-/* XOR XOR XOR XOR*/
-/*30*/ PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* XOR XOR AAA*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, INVALID, PAIR_NP | CYCLES(7),
-/* CMP CMP CMP CMP*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* CMP CMP AAS*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, INVALID, PAIR_NP | CYCLES(7),
+/* XOR XOR XOR XOR*/
+/*30*/ PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG,
+/* XOR XOR AAA*/
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, INVALID, PAIR_NP | CYCLES(7),
+/* CMP CMP CMP CMP*/
+ PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM, PAIR_XY | CYCLES_REG | SRCDEP_RM | SRCDEP_REG,
+/* CMP CMP AAS*/
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM, PAIR_XY | CYCLES_REG | SRCDEP_EAX, INVALID, PAIR_NP | CYCLES(7),
-/* INC EAX INC ECX INC EDX INC EBX*/
-/*40*/ PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* INC ESP INC EBP INC ESI INC EDI*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* DEC EAX DEC ECX DEC EDX DEC EBX*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* DEC ESP DEC EBP DEC ESI DEC EDI*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
+/* INC EAX INC ECX INC EDX INC EBX*/
+/*40*/ PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_ECX | DSTDEP_ECX, PAIR_XY | CYCLES_REG | SRCDEP_EDX | DSTDEP_EDX, PAIR_XY | CYCLES_REG | SRCDEP_EBX | DSTDEP_EBX,
+/* INC ESP INC EBP INC ESI INC EDI*/
+ PAIR_XY | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EBP | DSTDEP_EBP, PAIR_XY | CYCLES_REG | SRCDEP_ESI | DSTDEP_ESI, PAIR_XY | CYCLES_REG | SRCDEP_EDI | DSTDEP_EDI,
+/* DEC EAX DEC ECX DEC EDX DEC EBX*/
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_ECX | DSTDEP_ECX, PAIR_XY | CYCLES_REG | SRCDEP_EDX | DSTDEP_EDX, PAIR_XY | CYCLES_REG | SRCDEP_EBX | DSTDEP_EBX,
+/* DEC ESP DEC EBP DEC ESI DEC EDI*/
+ PAIR_XY | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EBP | DSTDEP_EBP, PAIR_XY | CYCLES_REG | SRCDEP_ESI | DSTDEP_ESI, PAIR_XY | CYCLES_REG | SRCDEP_EDI | DSTDEP_EDI,
-/* PUSH EAX PUSH ECX PUSH EDX PUSH EBX*/
-/*50*/ PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* PUSH ESP PUSH EBP PUSH ESI PUSH EDI*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* POP EAX POP ECX POP EDX POP EBX*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* POP ESP POP EBP POP ESI POP EDI*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
+/* PUSH EAX PUSH ECX PUSH EDX PUSH EBX*/
+/* PUSH EAX PUSH ECX PUSH EDX PUSH EBX*/
+/*50*/ PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_ECX | DSTDEP_ECX | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EDX | DSTDEP_EDX | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EBX | DSTDEP_EBX | SRCDEP_ESP | DSTDEP_ESP,
+/* PUSH ESP PUSH EBP PUSH ESI PUSH EDI*/
+ PAIR_XY | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EBP | DSTDEP_EBP | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_ESI | DSTDEP_ESI | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EDI | DSTDEP_EDI | SRCDEP_ESP | DSTDEP_ESP,
+/* POP EAX POP ECX POP EDX POP EBX*/
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_ECX | DSTDEP_ECX | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EDX | DSTDEP_EDX | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EBX | DSTDEP_EBX | SRCDEP_ESP | DSTDEP_ESP,
+/* POP ESP POP EBP POP ESI POP EDI*/
+ PAIR_XY | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EBP | DSTDEP_EBP | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_ESI | DSTDEP_ESI | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES_REG | SRCDEP_EDI | DSTDEP_EDI | SRCDEP_ESP | DSTDEP_ESP,
-/* PUSHA POPA BOUND ARPL*/
-/*60*/ PAIR_NP | CYCLES(6), PAIR_NP | CYCLES(6), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(9),
- INVALID, INVALID, INVALID, INVALID,
-/* PUSH imm IMUL PUSH imm IMUL*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES(10), PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES(10),
-/* INSB INSW OUTSB OUTSW*/
- PAIR_NP | CYCLES(14), PAIR_NP | CYCLES(14), PAIR_NP | CYCLES(14), PAIR_NP | CYCLES(14),
+/* PUSHA POPA BOUND ARPL*/
+/*60*/ PAIR_NP | CYCLES(6), PAIR_NP | CYCLES(6), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(9),
+ INVALID, INVALID, INVALID, INVALID,
+/* PUSH imm IMUL PUSH imm IMUL*/
+ PAIR_XY | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES(10), PAIR_XY | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES(10),
+/* INSB INSW OUTSB OUTSW*/
+ PAIR_NP | CYCLES(14), PAIR_NP | CYCLES(14), PAIR_NP | CYCLES(14), PAIR_NP | CYCLES(14),
/* Jxx*/
/*70*/ PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH,
@@ -265,13 +342,13 @@ static uint32_t opcode_timings_mod3[256] =
PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH,
PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH,
-/*80*/ PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* TEST TEST XCHG XCHG*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2),
-/* MOV MOV MOV MOV*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
-/* MOV from seg LEA MOV to seg POP*/
- PAIR_XY | CYCLES(1), PAIR_XY | CYCLES_REG, PAIR_NP | CYCLES(3), PAIR_XY | CYCLES(1),
+/*80*/ PAIR_XY | CYCLES_REG | SRCDEP_RM | DSTDEP_RM, PAIR_XY | CYCLES_REG | SRCDEP_RM | DSTDEP_RM, PAIR_XY | CYCLES_REG | SRCDEP_RM | DSTDEP_RM, PAIR_XY | CYCLES_REG | SRCDEP_RM | DSTDEP_RM,
+/* TEST TEST XCHG XCHG*/
+ PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM, PAIR_XY | CYCLES_REG | SRCDEP_REG | SRCDEP_RM, PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2),
+/* MOV MOV MOV MOV*/
+ PAIR_XY | CYCLES_REG | SRCDEP_REG | DSTDEP_RM, PAIR_XY | CYCLES_REG | SRCDEP_REG | DSTDEP_RM, PAIR_XY | CYCLES_REG | SRCDEP_RM | DSTDEP_REG, PAIR_XY | CYCLES_REG | SRCDEP_RM | DSTDEP_REG,
+/* MOV from seg LEA MOV to seg POP*/
+ PAIR_XY | CYCLES(1), PAIR_XY | CYCLES_REG | DSTDEP_REG, PAIR_NP | CYCLES(3), PAIR_XY | CYCLES(1),
/* NOP XCHG XCHG XCHG*/
/*90*/ PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2),
@@ -280,22 +357,22 @@ static uint32_t opcode_timings_mod3[256] =
/* CBW CWD CALL far WAIT*/
PAIR_XY | CYCLES(3), PAIR_XY | CYCLES(2), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(5),
/* PUSHF POPF SAHF LAHF*/
- PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(9), PAIR_XY | CYCLES(1), PAIR_XY | CYCLES(2),
+ PAIR_XY | CYCLES(2) | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES(9) | SRCDEP_ESP | DSTDEP_ESP, PAIR_XY | CYCLES(1), PAIR_XY | CYCLES(2),
/* MOV MOV MOV MOV*/
-/*a0*/ PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
+/*a0*/ PAIR_XY | CYCLES_REG | DSTDEP_EAX, PAIR_XY | CYCLES_REG | DSTDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX,
/* MOVSB MOVSW CMPSB CMPSW*/
PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(5), PAIR_NP | CYCLES(5),
/* TEST TEST STOSB STOSW*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2),
+ PAIR_XY | CYCLES_REG | SRCDEP_EAX, PAIR_XY | CYCLES_REG | SRCDEP_EAX, PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2),
/* LODSB LODSW SCASB SCASW*/
PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2),
/* MOV*/
-/*b0*/ PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
+/*b0*/ PAIR_XY | CYCLES_REG | DSTDEP_EAX, PAIR_XY | CYCLES_REG | DSTDEP_ECX, PAIR_XY | CYCLES_REG | DSTDEP_EDX, PAIR_XY | CYCLES_REG | DSTDEP_EBX,
+ PAIR_XY | CYCLES_REG | DSTDEP_EAX, PAIR_XY | CYCLES_REG | DSTDEP_ECX, PAIR_XY | CYCLES_REG | DSTDEP_EDX, PAIR_XY | CYCLES_REG | DSTDEP_EBX,
+ PAIR_XY | CYCLES_REG | DSTDEP_EAX, PAIR_XY | CYCLES_REG | DSTDEP_ECX, PAIR_XY | CYCLES_REG | DSTDEP_EDX, PAIR_XY | CYCLES_REG | DSTDEP_EBX,
+ PAIR_XY | CYCLES_REG | DSTDEP_ESP, PAIR_XY | CYCLES_REG | DSTDEP_EBP, PAIR_XY | CYCLES_REG | DSTDEP_ESI, PAIR_XY | CYCLES_REG | DSTDEP_EDI,
/* RET imm RET*/
/*c0*/ INVALID, INVALID, PAIR_X_BRANCH | CYCLES(3), PAIR_X_BRANCH | CYCLES(2),
@@ -314,7 +391,7 @@ static uint32_t opcode_timings_mod3[256] =
INVALID, INVALID, INVALID, INVALID,
/* LOOPNE LOOPE LOOP JCXZ*/
-/*e0*/ PAIR_X_BRANCH| CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH,
+/*e0*/ PAIR_X_BRANCH| CYCLES_BRANCH | SRCDEP_ECX, PAIR_X_BRANCH | CYCLES_BRANCH | SRCDEP_ECX, PAIR_X_BRANCH | CYCLES_BRANCH | SRCDEP_ECX, PAIR_X_BRANCH | CYCLES_BRANCH | SRCDEP_ECX,
/* IN AL IN AX OUT_AL OUT_AX*/
PAIR_NP | CYCLES(14), PAIR_NP | CYCLES(14), PAIR_NP | CYCLES(14), PAIR_NP | CYCLES(14),
/* CALL JMP JMP JMP*/
@@ -364,15 +441,15 @@ static uint32_t opcode_timings_0f[256] =
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
-/*60*/ PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM,
- PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM,
- PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM,
- INVALID, INVALID, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM,
+/*60*/ PAIR_X | MMX_SHIFTPACK | CYCLES_RM, PAIR_X | MMX_SHIFTPACK | CYCLES_RM, PAIR_X | MMX_SHIFTPACK | CYCLES_RM, PAIR_X | MMX_SHIFTPACK | CYCLES_RM,
+ PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM,
+ PAIR_X | MMX_SHIFTPACK | CYCLES_RM, PAIR_X | MMX_SHIFTPACK | CYCLES_RM, PAIR_X | MMX_SHIFTPACK | CYCLES_RM, PAIR_X | MMX_SHIFTPACK | CYCLES_RM,
+ INVALID, INVALID, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM,
-/*70*/ INVALID, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM,
- PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES(1),
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM,
+/*70*/ INVALID, PAIR_X | MMX_SHIFTPACK | CYCLES_RM, PAIR_X | MMX_SHIFTPACK | CYCLES_RM, PAIR_X | MMX_SHIFTPACK | CYCLES_RM,
+ PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES(1),
+ INVALID, INVALID, INVALID, INVALID,
+ INVALID, INVALID, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM,
/*80*/ PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH,
PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH,
@@ -399,20 +476,20 @@ static uint32_t opcode_timings_0f[256] =
PAIR_XY | CYCLES(4), PAIR_XY | CYCLES(4), PAIR_XY | CYCLES(4), PAIR_XY | CYCLES(4),
PAIR_XY | CYCLES(4), PAIR_XY | CYCLES(4), PAIR_XY | CYCLES(4), PAIR_XY | CYCLES(4),
-/*d0*/ INVALID, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM,
- INVALID, PAIR_X | CYCLES_RM, INVALID, INVALID,
- PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, INVALID, PAIR_X | CYCLES_RM,
- PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, INVALID, PAIR_X | CYCLES_RM,
+/*d0*/ INVALID, PAIR_X | MMX_SHIFTPACK | CYCLES_RM, PAIR_X | MMX_SHIFTPACK | CYCLES_RM, PAIR_X | MMX_SHIFTPACK | CYCLES_RM,
+ INVALID, PAIR_X | CYCLES_RM, INVALID, INVALID,
+ PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, INVALID, PAIR_X | CYCLES_RM,
+ PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, INVALID, PAIR_X | CYCLES_RM,
-/*e0*/ INVALID, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, INVALID,
- INVALID, PAIR_X | CYCLES_RM, INVALID, INVALID,
- PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, INVALID, PAIR_X | CYCLES_RM,
- PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, INVALID, PAIR_X | CYCLES_RM,
+/*e0*/ INVALID, PAIR_X | MMX_SHIFTPACK | CYCLES_RM, PAIR_X | MMX_SHIFTPACK | CYCLES_RM, INVALID,
+ INVALID, PAIR_X | CYCLES_RM, INVALID, INVALID,
+ PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, INVALID, PAIR_X | CYCLES_RM,
+ PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, INVALID, PAIR_X | CYCLES_RM,
-/*f0*/ INVALID, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM,
- INVALID, PAIR_X | CYCLES_RM, INVALID, INVALID,
- PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, INVALID,
- PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, INVALID,
+/*f0*/ INVALID, PAIR_X | MMX_SHIFTPACK | CYCLES_RM, PAIR_X | MMX_SHIFTPACK | CYCLES_RM, PAIR_X | MMX_SHIFTPACK | CYCLES_RM,
+ INVALID, PAIR_X | CYCLES_RM, INVALID, INVALID,
+ PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, INVALID,
+ PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, PAIR_X | CYCLES_RM, INVALID,
};
static uint32_t opcode_timings_0f_mod3[256] =
{
@@ -446,15 +523,15 @@ static uint32_t opcode_timings_0f_mod3[256] =
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
-/*60*/ PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG,
- PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG,
- PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG,
- INVALID, INVALID, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG,
+/*60*/ PAIR_X | MMX_SHIFTPACK | CYCLES_REG, PAIR_X | MMX_SHIFTPACK | CYCLES_REG, PAIR_X | MMX_SHIFTPACK | CYCLES_REG, PAIR_X | MMX_SHIFTPACK | CYCLES_REG,
+ PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG,
+ PAIR_X | MMX_SHIFTPACK | CYCLES_REG, PAIR_X | MMX_SHIFTPACK | CYCLES_REG, PAIR_X | MMX_SHIFTPACK | CYCLES_REG, PAIR_X | MMX_SHIFTPACK | CYCLES_REG,
+ INVALID, INVALID, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG,
-/*70*/ INVALID, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG,
- PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, PAIR_X | CYCLES(1),
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG,
+/*70*/ INVALID, PAIR_X | MMX_SHIFTPACK | CYCLES_REG, PAIR_X | MMX_SHIFTPACK | CYCLES_REG, PAIR_X | MMX_SHIFTPACK | CYCLES_REG,
+ PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, PAIR_X | CYCLES(1),
+ INVALID, INVALID, INVALID, INVALID,
+ INVALID, INVALID, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG,
/*80*/ PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH,
PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH, PAIR_X_BRANCH | CYCLES_BRANCH,
@@ -480,20 +557,20 @@ static uint32_t opcode_timings_0f_mod3[256] =
PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1),
PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1),
-/*d0*/ INVALID, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG,
- INVALID, PAIR_X | CYCLES_REG, INVALID, INVALID,
- PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, INVALID, PAIR_X | CYCLES_REG,
- PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, INVALID, PAIR_X | CYCLES_REG,
+/*d0*/ INVALID, PAIR_X | MMX_SHIFTPACK | CYCLES_REG, PAIR_X | MMX_SHIFTPACK | CYCLES_REG, PAIR_X | MMX_SHIFTPACK | CYCLES_REG,
+ INVALID, PAIR_X | MMX_MULTIPLY | CYCLES_REG, INVALID, INVALID,
+ PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, INVALID, PAIR_X | CYCLES_REG,
+ PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, INVALID, PAIR_X | CYCLES_REG,
-/*e0*/ INVALID, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, INVALID,
- INVALID, PAIR_X | CYCLES_REG, INVALID, INVALID,
- PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, INVALID, PAIR_X | CYCLES_REG,
- PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, INVALID, PAIR_X | CYCLES_REG,
+/*e0*/ INVALID, PAIR_X | MMX_SHIFTPACK | CYCLES_REG, PAIR_X | MMX_SHIFTPACK | CYCLES_REG, INVALID,
+ INVALID, PAIR_X | MMX_MULTIPLY | CYCLES_REG, INVALID, INVALID,
+ PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, INVALID, PAIR_X | CYCLES_REG,
+ PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, INVALID, PAIR_X | CYCLES_REG,
-/*f0*/ INVALID, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG,
- INVALID, PAIR_X | CYCLES_REG, INVALID, INVALID,
- PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, INVALID,
- PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, INVALID,
+/*f0*/ INVALID, PAIR_X | MMX_SHIFTPACK | CYCLES_REG, PAIR_X | MMX_SHIFTPACK | CYCLES_REG, PAIR_X | MMX_SHIFTPACK | CYCLES_REG,
+ INVALID, PAIR_X | MMX_MULTIPLY | CYCLES_REG, INVALID, INVALID,
+ PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, INVALID,
+ PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, PAIR_X | CYCLES_REG, INVALID,
};
static uint32_t opcode_timings_shift[8] =
@@ -503,8 +580,8 @@ static uint32_t opcode_timings_shift[8] =
};
static uint32_t opcode_timings_shift_mod3[8] =
{
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES(3), PAIR_XY | CYCLES(4),
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
+ PAIR_XY | CYCLES_REG | DSTDEP_RM, PAIR_XY | CYCLES_REG | DSTDEP_RM, PAIR_XY | CYCLES(3) | DSTDEP_RM, PAIR_XY | CYCLES(4) | DSTDEP_RM,
+ PAIR_XY | CYCLES_REG | DSTDEP_RM, PAIR_XY | CYCLES_REG | DSTDEP_RM, PAIR_XY | CYCLES_REG | DSTDEP_RM, PAIR_XY | CYCLES_REG | DSTDEP_RM,
};
static uint32_t opcode_timings_shift_imm[8] =
{
@@ -513,18 +590,18 @@ static uint32_t opcode_timings_shift_imm[8] =
};
static uint32_t opcode_timings_shift_imm_mod3[8] =
{
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES(3), PAIR_XY | CYCLES(4),
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
+ PAIR_XY | CYCLES_REG | DSTDEP_RM, PAIR_XY | CYCLES_REG | DSTDEP_RM, PAIR_XY | CYCLES(3) | DSTDEP_RM, PAIR_XY | CYCLES(4) | DSTDEP_RM,
+ PAIR_XY | CYCLES_REG | DSTDEP_RM, PAIR_XY | CYCLES_REG | DSTDEP_RM, PAIR_XY | CYCLES_REG | DSTDEP_RM, PAIR_XY | CYCLES_REG | DSTDEP_RM,
};
static uint32_t opcode_timings_shift_cl[8] =
{
- PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(8), PAIR_XY | CYCLES(9),
- PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2),
+ PAIR_XY | CYCLES(2) | SRCDEP_ECX, PAIR_XY | CYCLES(2) | SRCDEP_ECX, PAIR_XY | CYCLES(8) | SRCDEP_ECX, PAIR_XY | CYCLES(9) | SRCDEP_ECX,
+ PAIR_XY | CYCLES(2) | SRCDEP_ECX, PAIR_XY | CYCLES(2) | SRCDEP_ECX, PAIR_XY | CYCLES(2) | SRCDEP_ECX, PAIR_XY | CYCLES(2) | SRCDEP_ECX,
};
static uint32_t opcode_timings_shift_cl_mod3[8] =
{
- PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(8), PAIR_XY | CYCLES(9),
- PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2), PAIR_XY | CYCLES(2),
+ PAIR_XY | CYCLES(2) | DSTDEP_RM | SRCDEP_ECX, PAIR_XY | CYCLES(2) | DSTDEP_RM | SRCDEP_ECX, PAIR_XY | CYCLES(8) | DSTDEP_RM | SRCDEP_ECX, PAIR_XY | CYCLES(9) | DSTDEP_RM | SRCDEP_ECX,
+ PAIR_XY | CYCLES(2) | DSTDEP_RM | SRCDEP_ECX, PAIR_XY | CYCLES(2) | DSTDEP_RM | SRCDEP_ECX, PAIR_XY | CYCLES(2) | DSTDEP_RM | SRCDEP_ECX, PAIR_XY | CYCLES(2) | DSTDEP_RM | SRCDEP_ECX,
};
static uint32_t opcode_timings_f6[8] =
@@ -536,22 +613,22 @@ static uint32_t opcode_timings_f6[8] =
};
static uint32_t opcode_timings_f6_mod3[8] =
{
-/* TST NOT NEG*/
- PAIR_XY | CYCLES_REG, INVALID, PAIR_XY | CYCLES(1), PAIR_XY | CYCLES(1),
+/* TST NOT NEG*/
+ PAIR_XY | CYCLES_REG | SRCDEP_RM, INVALID, PAIR_XY | CYCLES(1), PAIR_XY | CYCLES(1),
/* MUL IMUL DIV IDIV*/
PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(18), PAIR_NP | CYCLES(18)
};
static uint32_t opcode_timings_f7[8] =
{
/* TST NOT NEG*/
- PAIR_XY | CYCLES_REG, INVALID, PAIR_XY | CYCLES(1), PAIR_XY | CYCLES(1),
+ PAIR_XY | CYCLES_REG | SRCDEP_RM, INVALID, PAIR_XY | CYCLES(1), PAIR_XY | CYCLES(1),
/* MUL IMUL DIV IDIV*/
PAIR_NP | CYCLES_MULTI(4,10), PAIR_NP | CYCLES_MULTI(4,10), PAIR_NP | CYCLES_MULTI(19,27), PAIR_NP | CYCLES_MULTI(22,30)
};
static uint32_t opcode_timings_f7_mod3[8] =
{
/* TST NOT NEG*/
- PAIR_XY | CYCLES_REG, INVALID, PAIR_XY | CYCLES(1), PAIR_XY | CYCLES(1),
+ PAIR_XY | CYCLES_REG | SRCDEP_RM, INVALID, PAIR_XY | CYCLES(1), PAIR_XY | CYCLES(1),
/* MUL IMUL DIV IDIV*/
PAIR_NP | CYCLES_MULTI(4,10), PAIR_NP | CYCLES_MULTI(4,10), PAIR_NP | CYCLES_MULTI(19,27), PAIR_NP | CYCLES_MULTI(22,30)
};
@@ -560,14 +637,14 @@ static uint32_t opcode_timings_ff[8] =
/* INC DEC CALL CALL far*/
PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_X_BRANCH | CYCLES(3), PAIR_NP | CYCLES(5),
/* JMP JMP far PUSH*/
- PAIR_X_BRANCH | CYCLES(3), PAIR_NP | CYCLES(5), PAIR_XY | CYCLES(1), INVALID
+ PAIR_X_BRANCH | CYCLES(3), PAIR_NP | CYCLES(5), PAIR_XY | CYCLES(1) | SRCDEP_ESP | DSTDEP_ESP, INVALID
};
static uint32_t opcode_timings_ff_mod3[8] =
{
-/* INC DEC CALL CALL far*/
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_X_BRANCH | CYCLES(1), PAIR_XY | CYCLES(5),
-/* JMP JMP far PUSH*/
- PAIR_X_BRANCH | CYCLES(1), PAIR_XY | CYCLES(5), PAIR_XY | CYCLES(2), INVALID
+/* INC DEC CALL CALL far*/
+ PAIR_XY | CYCLES_REG | SRCDEP_RM | DSTDEP_RM, PAIR_XY | CYCLES_REG | SRCDEP_RM | DSTDEP_RM, PAIR_X_BRANCH | CYCLES(1), PAIR_XY | CYCLES(5),
+/* JMP JMP far PUSH*/
+ PAIR_X_BRANCH | CYCLES(1), PAIR_XY | CYCLES(5), PAIR_XY | CYCLES(2) | SRCDEP_ESP | DSTDEP_ESP, INVALID
};
static uint32_t opcode_timings_d8[8] =
@@ -735,23 +812,8 @@ static uint32_t opcode_timings_df_mod3[8] =
static uint32_t opcode_timings_8x[8] =
{
- PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW,
- PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RM
-};
-static uint32_t opcode_timings_8x_mod3[8] =
-{
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG
-};
-static uint32_t opcode_timings_81[8] =
-{
- PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW,
- PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RMW, PAIR_XY | CYCLES_RM
-};
-static uint32_t opcode_timings_81_mod3[8] =
-{
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG,
- PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG, PAIR_XY | CYCLES_REG
+ PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RMW | SRCDEP_REG,
+ PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RMW | SRCDEP_REG, PAIR_XY | CYCLES_RM | SRCDEP_REG
};
static int decode_delay;
@@ -774,7 +836,6 @@ static inline int COUNT(uint32_t c, int op_32)
void codegen_timing_686_block_start()
{
prev_full = decode_delay = 0;
- regmask_modified = last_regmask_modified = 0;
}
void codegen_timing_686_start()
@@ -785,18 +846,6 @@ void codegen_timing_686_start()
void codegen_timing_686_prefix(uint8_t prefix, uint32_t fetchdat)
{
- if ((prefix & 0xf8) == 0xd8)
- {
- last_prefix = prefix;
- return;
- }
- if (prefix == 0x0f && (fetchdat & 0xf0) == 0x80)
- {
- /*0fh prefix is 'free' when used on conditional jumps*/
- last_prefix = prefix;
- return;
- }
-
/*6x86 can decode 1 prefix per instruction per clock with no penalty. If
either instruction has more than one prefix then decode is delayed by
one cycle for each additional prefix*/
@@ -804,29 +853,9 @@ void codegen_timing_686_prefix(uint8_t prefix, uint32_t fetchdat)
last_prefix = prefix;
}
-static int check_agi(uint64_t *deps, uint8_t opcode, uint32_t fetchdat, int op_32)
-{
- uint32_t addr_regmask = get_addr_regmask(deps[opcode], fetchdat, op_32);
-
- if (addr_regmask & IMPL_ESP)
- addr_regmask |= (1 << REG_ESP);
-
- if (regmask_modified & addr_regmask)
- {
- regmask_modified = 0;
- return 2;
- }
-
- if (last_regmask_modified & addr_regmask)
- return 1;
-
- return 0;
-}
-
-void codegen_timing_686_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t op_pc)
+void codegen_timing_686_opcode(uint8_t opcode, uint32_t fetchdat, int op_32)
{
uint32_t *timings;
- uint64_t *deps;
int mod3 = ((fetchdat & 0xc0) == 0xc0);
int bit8 = !(opcode & 1);
@@ -834,55 +863,46 @@ void codegen_timing_686_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uin
{
case 0x0f:
timings = mod3 ? opcode_timings_0f_mod3 : opcode_timings_0f;
- deps = mod3 ? opcode_deps_0f_mod3 : opcode_deps_0f;
// pclog("timings 0f\n");
break;
case 0xd8:
timings = mod3 ? opcode_timings_d8_mod3 : opcode_timings_d8;
- deps = mod3 ? opcode_deps_d8_mod3 : opcode_deps_d8;
opcode = (opcode >> 3) & 7;
// pclog("timings d8\n");
break;
case 0xd9:
timings = mod3 ? opcode_timings_d9_mod3 : opcode_timings_d9;
- deps = mod3 ? opcode_deps_d9_mod3 : opcode_deps_d9;
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
// pclog("timings d9\n");
break;
case 0xda:
timings = mod3 ? opcode_timings_da_mod3 : opcode_timings_da;
- deps = mod3 ? opcode_deps_da_mod3 : opcode_deps_da;
opcode = (opcode >> 3) & 7;
// pclog("timings da\n");
break;
case 0xdb:
timings = mod3 ? opcode_timings_db_mod3 : opcode_timings_db;
- deps = mod3 ? opcode_deps_db_mod3 : opcode_deps_db;
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
// pclog("timings db\n");
break;
case 0xdc:
timings = mod3 ? opcode_timings_dc_mod3 : opcode_timings_dc;
- deps = mod3 ? opcode_deps_dc_mod3 : opcode_deps_dc;
opcode = (opcode >> 3) & 7;
// pclog("timings dc\n");
break;
case 0xdd:
timings = mod3 ? opcode_timings_dd_mod3 : opcode_timings_dd;
- deps = mod3 ? opcode_deps_dd_mod3 : opcode_deps_dd;
opcode = (opcode >> 3) & 7;
// pclog("timings dd\n");
break;
case 0xde:
timings = mod3 ? opcode_timings_de_mod3 : opcode_timings_de;
- deps = mod3 ? opcode_deps_de_mod3 : opcode_deps_de;
opcode = (opcode >> 3) & 7;
// pclog("timings de\n");
break;
case 0xdf:
timings = mod3 ? opcode_timings_df_mod3 : opcode_timings_df;
- deps = mod3 ? opcode_deps_df_mod3 : opcode_deps_df;
opcode = (opcode >> 3) & 7;
// pclog("timings df\n");
break;
@@ -890,92 +910,66 @@ void codegen_timing_686_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uin
default:
switch (opcode)
{
- case 0x80: case 0x82: case 0x83:
- timings = mod3 ? opcode_timings_8x_mod3 : opcode_timings_8x;
- deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x_mod3;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings 80 %p %p %p\n", (void *)timings, (void *)opcode_timings_mod3, (void *)opcode_timings_8x);
- break;
- case 0x81:
- timings = mod3 ? opcode_timings_81_mod3 : opcode_timings_81;
- deps = mod3 ? opcode_deps_81_mod3 : opcode_deps_81;
- opcode = (fetchdat >> 3) & 7;
+ case 0x80: case 0x81: case 0x82: case 0x83:
+ timings = mod3 ? opcode_timings_mod3 : opcode_timings_8x;
+ if (!mod3)
+ opcode = (fetchdat >> 3) & 7;
// pclog("timings 80 %p %p %p\n", (void *)timings, (void *)opcode_timings_mod3, (void *)opcode_timings_8x);
break;
case 0xc0: case 0xc1:
timings = mod3 ? opcode_timings_shift_imm_mod3 : opcode_timings_shift_imm;
- deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
opcode = (fetchdat >> 3) & 7;
-// pclog("timings c0\n");
break;
-
+
case 0xd0: case 0xd1:
timings = mod3 ? opcode_timings_shift_mod3 : opcode_timings_shift;
- deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
opcode = (fetchdat >> 3) & 7;
-// pclog("timings d0\n");
break;
-
+
case 0xd2: case 0xd3:
timings = mod3 ? opcode_timings_shift_cl_mod3 : opcode_timings_shift_cl;
- deps = mod3 ? opcode_deps_shift_cl_mod3 : opcode_deps_shift_cl;
opcode = (fetchdat >> 3) & 7;
-// pclog("timings d2\n");
break;
case 0xf6:
timings = mod3 ? opcode_timings_f6_mod3 : opcode_timings_f6;
- deps = mod3 ? opcode_deps_f6_mod3 : opcode_deps_f6;
opcode = (fetchdat >> 3) & 7;
// pclog("timings f6\n");
break;
case 0xf7:
timings = mod3 ? opcode_timings_f7_mod3 : opcode_timings_f7;
- deps = mod3 ? opcode_deps_f7_mod3 : opcode_deps_f7;
opcode = (fetchdat >> 3) & 7;
// pclog("timings f7\n");
break;
case 0xff:
timings = mod3 ? opcode_timings_ff_mod3 : opcode_timings_ff;
- deps = mod3 ? opcode_deps_ff_mod3 : opcode_deps_ff;
opcode = (fetchdat >> 3) & 7;
// pclog("timings ff\n");
break;
default:
timings = mod3 ? opcode_timings_mod3 : opcode_timings;
- deps = mod3 ? opcode_deps_mod3 : opcode_deps;
// pclog("timings normal\n");
break;
}
}
-
- /*One prefix per instruction is free*/
- decode_delay--;
+
if (decode_delay < 0)
decode_delay = 0;
if (prev_full)
{
- uint32_t regmask = get_srcdep_mask(deps[opcode], fetchdat, bit8, op_32);
- int agi_stall = 0;
-
- if (regmask & IMPL_ESP)
- regmask |= SRCDEP_ESP | DSTDEP_ESP;
-
- agi_stall = check_agi(prev_deps, prev_opcode, prev_fetchdat, prev_op_32);
-
+ uint8_t regmask = get_srcdep_mask(timings[opcode], fetchdat, bit8);
+
/*Second instruction in the pair*/
if ((timings[opcode] & PAIR_MASK) == PAIR_NP)
{
/*Instruction can not pair with previous*/
/*Run previous now*/
- codegen_block_cycles += COUNT(prev_timings[prev_opcode], prev_op_32) + decode_delay + agi_stall;
- decode_delay = (-COUNT(prev_timings[prev_opcode], prev_op_32)) + 1 + agi_stall;
+ codegen_block_cycles += COUNT(prev_timings[prev_opcode], prev_op_32) + decode_delay;
+ decode_delay = (-COUNT(prev_timings[prev_opcode], prev_op_32)) + 1;
prev_full = 0;
- last_regmask_modified = regmask_modified;
- regmask_modified = prev_regmask;
// pclog("Not pairable %i\n", COUNT(prev_timings[prev_opcode], prev_op_32) + decode_delay);
}
else if (((timings[opcode] & PAIR_MASK) == PAIR_X || (timings[opcode] & PAIR_MASK) == PAIR_X_BRANCH)
@@ -983,22 +977,18 @@ void codegen_timing_686_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uin
{
/*Instruction can not pair with previous*/
/*Run previous now*/
- codegen_block_cycles += COUNT(prev_timings[prev_opcode], prev_op_32) + decode_delay + agi_stall;
- decode_delay = (-COUNT(prev_timings[prev_opcode], prev_op_32)) + 1 + agi_stall;
+ codegen_block_cycles += COUNT(prev_timings[prev_opcode], prev_op_32) + decode_delay;
+ decode_delay = (-COUNT(prev_timings[prev_opcode], prev_op_32)) + 1;
prev_full = 0;
- last_regmask_modified = regmask_modified;
- regmask_modified = prev_regmask;
// pclog("Not pairable %i\n", COUNT(prev_timings[prev_opcode], prev_op_32) + decode_delay);
}
else if (prev_regmask & regmask)
{
/*Instruction can not pair with previous*/
/*Run previous now*/
- codegen_block_cycles += COUNT(prev_timings[prev_opcode], prev_op_32) + decode_delay + agi_stall;
- decode_delay = (-COUNT(prev_timings[prev_opcode], prev_op_32)) + 1 + agi_stall;
+ codegen_block_cycles += COUNT(prev_timings[prev_opcode], prev_op_32) + decode_delay;
+ decode_delay = (-COUNT(prev_timings[prev_opcode], prev_op_32)) + 1;
prev_full = 0;
- last_regmask_modified = regmask_modified;
- regmask_modified = prev_regmask;
// pclog("Not pairable %i\n", COUNT(prev_timings[prev_opcode], prev_op_32) + decode_delay);
}
else
@@ -1009,14 +999,9 @@ void codegen_timing_686_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uin
if (!t_pair)
fatal("Pairable 0 cycles! %02x %02x\n", opcode, prev_opcode);
-
- agi_stall = check_agi(deps, opcode, fetchdat, op_32);
-
- codegen_block_cycles += t_pair + agi_stall;
- decode_delay = (-t_pair) + 1 + agi_stall;
+ codegen_block_cycles += t_pair;
+ decode_delay = (-t_pair) + 1;
- last_regmask_modified = regmask_modified;
- regmask_modified = get_dstdep_mask(deps[opcode], fetchdat, bit8) | prev_regmask;
prev_full = 0;
// pclog("Pairable %i %i %i %02x %02x\n", t_pair, t1, t2, opcode, prev_opcode);
return;
@@ -1029,14 +1014,8 @@ void codegen_timing_686_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uin
if ((timings[opcode] & PAIR_MASK) == PAIR_NP || (timings[opcode] & PAIR_MASK) == PAIR_X_BRANCH)
{
/*Instruction not pairable*/
- int agi_stall = 0;
-
- agi_stall = check_agi(deps, opcode, fetchdat, op_32);
-
- codegen_block_cycles += COUNT(timings[opcode], op_32) + decode_delay + agi_stall;
- decode_delay = (-COUNT(timings[opcode], op_32)) + 1 + agi_stall;
- last_regmask_modified = regmask_modified;
- regmask_modified = get_dstdep_mask(deps[opcode], fetchdat, bit8);
+ codegen_block_cycles += COUNT(timings[opcode], op_32) + decode_delay;
+ decode_delay = (-COUNT(timings[opcode], op_32)) + 1;
// pclog("Not pairable %i\n", COUNT(timings[opcode], op_32) + decode_delay);
}
else
@@ -1047,11 +1026,7 @@ void codegen_timing_686_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uin
prev_opcode = opcode;
prev_timings = timings;
prev_op_32 = op_32;
- prev_regmask = get_dstdep_mask(deps[opcode], fetchdat, bit8);
- if (prev_regmask & IMPL_ESP)
- prev_regmask |= SRCDEP_ESP | DSTDEP_ESP;
- prev_deps = deps;
- prev_fetchdat = fetchdat;
+ prev_regmask = get_dstdep_mask(timings[opcode], fetchdat, bit8);
return;
}
}
@@ -1067,17 +1042,11 @@ void codegen_timing_686_block_end()
}
}
-int codegen_timing_686_jump_cycles()
-{
- return 0;
-}
-
codegen_timing_t codegen_timing_686 =
{
codegen_timing_686_start,
codegen_timing_686_prefix,
codegen_timing_686_opcode,
codegen_timing_686_block_start,
- codegen_timing_686_block_end,
- codegen_timing_686_jump_cycles
+ codegen_timing_686_block_end
};
diff --git a/src/codegen_timing_common.c b/src/codegen_timing_common.c
deleted file mode 100644
index a74410f..0000000
--- a/src/codegen_timing_common.c
+++ /dev/null
@@ -1,843 +0,0 @@
-#include "ibm.h"
-#include "codegen_timing_common.h"
-
-uint64_t opcode_deps[256] =
-{
-/* ADD ADD ADD ADD*/
-/*00*/ SRCDEP_REG | MODRM, SRCDEP_REG | MODRM, SRCDEP_REG | DSTDEP_REG | MODRM, SRCDEP_REG | DSTDEP_REG | MODRM,
-/* ADD ADD PUSH ES POP ES*/
- SRCDEP_EAX | DSTDEP_EAX | HAS_IMM8, SRCDEP_EAX | DSTDEP_EAX | HAS_IMM1632, IMPL_ESP, IMPL_ESP,
-/* OR OR OR OR*/
- SRCDEP_REG | MODRM, SRCDEP_REG | MODRM, SRCDEP_REG | DSTDEP_REG | MODRM, SRCDEP_REG | DSTDEP_REG | MODRM,
-/* OR OR PUSH CS*/
- SRCDEP_EAX | DSTDEP_EAX | HAS_IMM8, SRCDEP_EAX | DSTDEP_EAX | HAS_IMM1632, IMPL_ESP, 0,
-
-/* ADC ADC ADC ADC*/
-/*10*/ SRCDEP_REG | MODRM, SRCDEP_REG | MODRM, SRCDEP_REG | DSTDEP_REG | MODRM, SRCDEP_REG | DSTDEP_REG | MODRM,
-/* ADC ADC PUSH SS POP SS*/
- SRCDEP_EAX | DSTDEP_EAX | HAS_IMM8, SRCDEP_EAX | DSTDEP_EAX | HAS_IMM1632, IMPL_ESP, IMPL_ESP,
-/* SBB SBB SBB SBB*/
- SRCDEP_REG | MODRM, SRCDEP_REG | MODRM, SRCDEP_REG | DSTDEP_REG | MODRM, SRCDEP_REG | DSTDEP_REG | MODRM,
-/* SBB SBB PUSH DS POP DS*/
- SRCDEP_EAX | DSTDEP_EAX | HAS_IMM8, SRCDEP_EAX | DSTDEP_EAX | HAS_IMM1632, IMPL_ESP, IMPL_ESP,
-
-/* AND AND AND AND*/
-/*20*/ SRCDEP_REG | MODRM, SRCDEP_REG | MODRM, SRCDEP_REG | DSTDEP_REG | MODRM, SRCDEP_REG | DSTDEP_REG | MODRM,
-/* AND AND DAA*/
- SRCDEP_EAX | DSTDEP_EAX | HAS_IMM8, SRCDEP_EAX | DSTDEP_EAX | HAS_IMM1632, 0, SRCDEP_EAX | DSTDEP_EAX,
-/* SUB SUB SUB SUB*/
- SRCDEP_REG | MODRM, SRCDEP_REG | MODRM, SRCDEP_REG | DSTDEP_REG | MODRM, SRCDEP_REG | DSTDEP_REG | MODRM,
-/* SUB SUB DAS*/
- SRCDEP_EAX | DSTDEP_EAX | HAS_IMM8, SRCDEP_EAX | DSTDEP_EAX | HAS_IMM1632, 0, SRCDEP_EAX | DSTDEP_EAX,
-
-/* XOR XOR XOR XOR*/
-/*30*/ SRCDEP_REG | MODRM, SRCDEP_REG | MODRM, SRCDEP_REG | DSTDEP_REG | MODRM, SRCDEP_REG | DSTDEP_REG | MODRM,
-/* XOR XOR AAA*/
- SRCDEP_EAX | DSTDEP_EAX | HAS_IMM8, SRCDEP_EAX | DSTDEP_EAX | HAS_IMM1632, 0, SRCDEP_EAX | DSTDEP_EAX,
-/* CMP CMP CMP CMP*/
- SRCDEP_REG | MODRM, SRCDEP_REG | MODRM, SRCDEP_REG | MODRM, SRCDEP_REG | MODRM,
-/* CMP CMP AAS*/
- SRCDEP_EAX | HAS_IMM8, SRCDEP_EAX | HAS_IMM1632, 0, SRCDEP_EAX | DSTDEP_EAX,
-
-/* INC EAX INC ECX INC EDX INC EBX*/
-/*40*/ SRCDEP_EAX | DSTDEP_EAX, SRCDEP_ECX | DSTDEP_ECX, SRCDEP_EDX | DSTDEP_EDX, SRCDEP_EBX | DSTDEP_EBX,
-/* INC ESP INC EBP INC ESI INC EDI*/
- SRCDEP_ESP | DSTDEP_ESP, SRCDEP_EBP | DSTDEP_EBP, SRCDEP_ESI | DSTDEP_ESI, SRCDEP_EDI | DSTDEP_EDI,
-/* DEC EAX DEC ECX DEC EDX DEC EBX*/
- SRCDEP_EAX | DSTDEP_EAX, SRCDEP_ECX | DSTDEP_ECX, SRCDEP_EDX | DSTDEP_EDX, SRCDEP_EBX | DSTDEP_EBX,
-/* DEC ESP DEC EBP DEC ESI DEC EDI*/
- SRCDEP_ESP | DSTDEP_ESP, SRCDEP_EBP | DSTDEP_EBP, SRCDEP_ESI | DSTDEP_ESI, SRCDEP_EDI | DSTDEP_EDI,
-
-/* PUSH EAX PUSH ECX PUSH EDX PUSH EBX*/
-/*50*/ SRCDEP_EAX | IMPL_ESP, SRCDEP_ECX | IMPL_ESP, SRCDEP_EDX | IMPL_ESP, SRCDEP_EBX | IMPL_ESP,
-/* PUSH ESP PUSH EBP PUSH ESI PUSH EDI*/
- SRCDEP_ESP | IMPL_ESP, SRCDEP_EBP | IMPL_ESP, SRCDEP_ESI | IMPL_ESP, SRCDEP_EDI | IMPL_ESP,
-/* POP EAX POP ECX POP EDX POP EBX*/
- DSTDEP_EAX | IMPL_ESP, DSTDEP_ECX | IMPL_ESP, DSTDEP_EDX | IMPL_ESP, DSTDEP_EBX | IMPL_ESP,
-/* POP ESP POP EBP POP ESI POP EDI*/
- DSTDEP_ESP | IMPL_ESP, DSTDEP_EBP | IMPL_ESP, DSTDEP_ESI | IMPL_ESP, DSTDEP_EDI | IMPL_ESP,
-
-/* PUSHA POPA BOUND ARPL*/
-/*60*/ IMPL_ESP, IMPL_ESP, 0, 0,
- 0, 0, 0, 0,
-/* PUSH imm IMUL PUSH imm IMUL*/
- IMPL_ESP | HAS_IMM1632,DSTDEP_REG | MODRM, IMPL_ESP | HAS_IMM8, DSTDEP_REG | MODRM,
-/* INSB INSW OUTSB OUTSW*/
- 0, 0, 0, 0,
-
-/* Jxx*/
-/*70*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-/*80*/ 0, 0, 0, 0,
-/* TEST TEST XCHG XCHG*/
- SRCDEP_REG | MODRM, SRCDEP_REG | MODRM, SRCDEP_REG | DSTDEP_REG | MODRM, SRCDEP_REG | DSTDEP_REG | MODRM,
-/* MOV MOV MOV MOV*/
- SRCDEP_REG | MODRM, SRCDEP_REG | MODRM, DSTDEP_REG | MODRM, DSTDEP_REG | MODRM,
-/* MOV from seg LEA MOV to seg POP*/
- MODRM, DSTDEP_REG | MODRM, MODRM, IMPL_ESP | MODRM,
-
-/* NOP XCHG XCHG XCHG*/
-/*90*/ 0, SRCDEP_EAX | DSTDEP_EAX | SRCDEP_ECX | DSTDEP_ECX, SRCDEP_EAX | DSTDEP_EAX | SRCDEP_EDX | DSTDEP_EDX, SRCDEP_EAX | DSTDEP_EAX | SRCDEP_EBX | DSTDEP_EBX,
-/* XCHG XCHG XCHG XCHG*/
- SRCDEP_EAX | DSTDEP_EAX | SRCDEP_ESP | DSTDEP_ESP, SRCDEP_EAX | DSTDEP_EAX | SRCDEP_EBP | DSTDEP_EBP, SRCDEP_EAX | DSTDEP_EAX | SRCDEP_ESI | DSTDEP_ESI, SRCDEP_EAX | DSTDEP_EAX | SRCDEP_EDI | DSTDEP_EDI,
-/* CBW CWD CALL far WAIT*/
- SRCDEP_EAX | DSTDEP_EAX, SRCDEP_EAX | DSTDEP_EDX, 0, 0,
-/* PUSHF POPF SAHF LAHF*/
- IMPL_ESP, IMPL_ESP, SRCDEP_EAX, DSTDEP_EAX,
-
-/* MOV MOV MOV MOV*/
-/*a0*/ DSTDEP_EAX, DSTDEP_EAX, SRCDEP_EAX, SRCDEP_EAX,
-/* MOVSB MOVSW CMPSB CMPSW*/
- 0, 0, 0, 0,
-/* TEST TEST STOSB STOSW*/
- SRCDEP_EAX, SRCDEP_EAX, 0, 0,
-/* LODSB LODSW SCASB SCASW*/
- 0, 0, 0, 0,
-
-/* MOV*/
-/*b0*/ DSTDEP_EAX | HAS_IMM8, DSTDEP_ECX | HAS_IMM8, DSTDEP_EDX | HAS_IMM8, DSTDEP_EBX | HAS_IMM8,
- DSTDEP_EAX | HAS_IMM8, DSTDEP_ECX | HAS_IMM8, DSTDEP_EDX | HAS_IMM8, DSTDEP_EBX | HAS_IMM8,
- DSTDEP_EAX | HAS_IMM1632, DSTDEP_ECX | HAS_IMM1632, DSTDEP_EDX | HAS_IMM1632, DSTDEP_EBX | HAS_IMM1632,
- DSTDEP_ESP | HAS_IMM1632, DSTDEP_EBP | HAS_IMM1632, DSTDEP_ESI | HAS_IMM1632, DSTDEP_EDI | HAS_IMM1632,
-
-/* RET imm RET*/
-/*c0*/ 0, 0, SRCDEP_ESP | DSTDEP_ESP, IMPL_ESP,
-/* LES LDS MOV MOV*/
- DSTDEP_REG | MODRM, DSTDEP_REG | MODRM, MODRM | HAS_IMM8, MODRM | HAS_IMM1632,
-/* ENTER LEAVE RETF RETF*/
- IMPL_ESP, IMPL_ESP, IMPL_ESP, IMPL_ESP,
-/* INT3 INT INTO IRET*/
- 0, 0, 0, 0,
-
-
-/*d0*/ 0, 0, 0, 0,
-/* AAM AAD SETALC XLAT*/
- SRCDEP_EAX | DSTDEP_EAX, SRCDEP_EAX | DSTDEP_EAX, SRCDEP_EAX, SRCDEP_EAX | SRCDEP_EBX,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/* LOOPNE LOOPE LOOP JCXZ*/
-/*e0*/ SRCDEP_ECX | DSTDEP_ECX, SRCDEP_ECX | DSTDEP_ECX, SRCDEP_ECX | DSTDEP_ECX, SRCDEP_ECX,
-/* IN AL IN AX OUT_AL OUT_AX*/
- DSTDEP_EAX, DSTDEP_EAX, SRCDEP_EAX, SRCDEP_EAX,
-/* CALL JMP JMP JMP*/
- IMPL_ESP, 0, 0, 0,
-/* IN AL IN AX OUT_AL OUT_AX*/
- SRCDEP_EDX | DSTDEP_EAX, SRCDEP_EDX | DSTDEP_EAX, SRCDEP_EDX | SRCDEP_EAX, SRCDEP_EDX | SRCDEP_EAX,
-
-/* REPNE REPE*/
-/*f0*/ 0, 0, 0, 0,
-/* HLT CMC*/
- 0, 0, 0, 0,
-/* CLC STC CLI STI*/
- 0, 0, 0, 0,
-/* CLD STD INCDEC*/
- 0, 0, MODRM, 0
-};
-
-uint64_t opcode_deps_mod3[256] =
-{
-/* ADD ADD ADD ADD*/
-/*00*/ SRCDEP_REG | SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_REG | SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_REG | DSTDEP_REG | SRCDEP_RM | MODRM, SRCDEP_REG | DSTDEP_REG | SRCDEP_RM | MODRM,
-/* ADD ADD PUSH ES POP ES*/
- SRCDEP_EAX | DSTDEP_EAX | HAS_IMM8, SRCDEP_EAX | DSTDEP_EAX | HAS_IMM1632, IMPL_ESP, IMPL_ESP,
-/* OR OR OR OR*/
- SRCDEP_REG | SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_REG | SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_REG | DSTDEP_REG | SRCDEP_RM | MODRM, SRCDEP_REG | DSTDEP_REG | SRCDEP_RM | MODRM,
-/* OR OR PUSH CS*/
- SRCDEP_EAX | DSTDEP_EAX | HAS_IMM8, SRCDEP_EAX | DSTDEP_EAX | HAS_IMM1632, IMPL_ESP, 0,
-
-/* ADC ADC ADC ADC*/
-/*10*/ SRCDEP_REG | SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_REG | SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_REG | DSTDEP_REG | SRCDEP_RM | MODRM, SRCDEP_REG | DSTDEP_REG | SRCDEP_RM | MODRM,
-/* ADC ADC PUSH SS POP SS*/
- SRCDEP_EAX | DSTDEP_EAX | HAS_IMM8, SRCDEP_EAX | DSTDEP_EAX | HAS_IMM1632, IMPL_ESP, IMPL_ESP,
-/* SBB SBB SBB SBB*/
- SRCDEP_REG |SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_REG | SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_REG | DSTDEP_REG | SRCDEP_RM | MODRM, SRCDEP_REG | DSTDEP_REG | SRCDEP_RM | MODRM,
-/* SBB SBB PUSH DS POP DS*/
- SRCDEP_EAX | DSTDEP_EAX | HAS_IMM8, SRCDEP_EAX | DSTDEP_EAX | HAS_IMM1632, IMPL_ESP, IMPL_ESP,
-
-/* AND AND AND AND*/
-/*20*/ SRCDEP_REG | SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_REG | SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_REG | DSTDEP_REG | SRCDEP_RM | MODRM, SRCDEP_REG | DSTDEP_REG | SRCDEP_RM | MODRM,
-/* AND AND DAA*/
- SRCDEP_EAX | DSTDEP_EAX | HAS_IMM8, SRCDEP_EAX | DSTDEP_EAX | HAS_IMM1632, 0, SRCDEP_EAX | DSTDEP_EAX,
-/* SUB SUB SUB SUB*/
- SRCDEP_REG | SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_REG | SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_REG | DSTDEP_REG | SRCDEP_RM | MODRM, SRCDEP_REG | DSTDEP_REG | SRCDEP_RM | MODRM,
-/* SUB SUB DAS*/
- SRCDEP_EAX | DSTDEP_EAX | HAS_IMM8, SRCDEP_EAX | DSTDEP_EAX | HAS_IMM1632, 0, SRCDEP_EAX | DSTDEP_EAX,
-
-/* XOR XOR XOR XOR*/
-/*30*/ SRCDEP_REG | SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_REG | SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_REG | DSTDEP_REG | SRCDEP_RM | MODRM, SRCDEP_REG | DSTDEP_REG | SRCDEP_RM | MODRM,
-/* XOR XOR AAA*/
- SRCDEP_EAX | DSTDEP_EAX | HAS_IMM8, SRCDEP_EAX | DSTDEP_EAX | HAS_IMM1632, 0, SRCDEP_EAX | DSTDEP_EAX,
-/* CMP CMP CMP CMP*/
- SRCDEP_REG | SRCDEP_RM | MODRM, SRCDEP_REG | SRCDEP_RM | MODRM, SRCDEP_REG | SRCDEP_RM | MODRM, SRCDEP_REG | SRCDEP_RM | MODRM,
-/* CMP CMP AAS*/
- SRCDEP_EAX | HAS_IMM8, SRCDEP_EAX | HAS_IMM1632, 0, SRCDEP_EAX | DSTDEP_EAX,
-
-/* INC EAX INC ECX INC EDX INC EBX*/
-/*40*/ SRCDEP_EAX | DSTDEP_EAX, SRCDEP_ECX | DSTDEP_ECX, SRCDEP_EDX | DSTDEP_EDX, SRCDEP_EBX | DSTDEP_EBX,
-/* INC ESP INC EBP INC ESI INC EDI*/
- SRCDEP_ESP | DSTDEP_ESP, SRCDEP_EBP | DSTDEP_EBP, SRCDEP_ESI | DSTDEP_ESI, SRCDEP_EDI | DSTDEP_EDI,
-/* DEC EAX DEC ECX DEC EDX DEC EBX*/
- SRCDEP_EAX | DSTDEP_EAX, SRCDEP_ECX | DSTDEP_ECX, SRCDEP_EDX | DSTDEP_EDX, SRCDEP_EBX | DSTDEP_EBX,
-/* DEC ESP DEC EBP DEC ESI DEC EDI*/
- SRCDEP_ESP | DSTDEP_ESP, SRCDEP_EBP | DSTDEP_EBP, SRCDEP_ESI | DSTDEP_ESI, SRCDEP_EDI | DSTDEP_EDI,
-
-/* PUSH EAX PUSH ECX PUSH EDX PUSH EBX*/
-/*50*/ SRCDEP_EAX | IMPL_ESP, SRCDEP_ECX | IMPL_ESP, SRCDEP_EDX | IMPL_ESP, SRCDEP_EBX | IMPL_ESP,
-/* PUSH ESP PUSH EBP PUSH ESI PUSH EDI*/
- SRCDEP_ESP | IMPL_ESP, SRCDEP_EBP | IMPL_ESP, SRCDEP_ESI | IMPL_ESP, SRCDEP_EDI | IMPL_ESP,
-/* POP EAX POP ECX POP EDX POP EBX*/
- DSTDEP_EAX | IMPL_ESP, DSTDEP_ECX | IMPL_ESP, DSTDEP_EDX | IMPL_ESP, DSTDEP_EBX | IMPL_ESP,
-/* POP ESP POP EBP POP ESI POP EDI*/
- DSTDEP_ESP | IMPL_ESP, DSTDEP_EBP | IMPL_ESP, DSTDEP_ESI | IMPL_ESP, DSTDEP_EDI | IMPL_ESP,
-
-/* PUSHA POPA BOUND ARPL*/
-/*60*/ IMPL_ESP, IMPL_ESP, 0, 0,
- 0, 0, 0, 0,
-/* PUSH imm IMUL PUSH imm IMUL*/
- IMPL_ESP | HAS_IMM1632,DSTDEP_REG | SRCDEP_RM | MODRM, IMPL_ESP | HAS_IMM8, DSTDEP_REG | SRCDEP_RM | MODRM,
-/* INSB INSW OUTSB OUTSW*/
- 0, 0, 0, 0,
-
-/* Jxx*/
-/*70*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-
-/*80*/ 0, 0, 0, 0,
-/* TEST TEST XCHG XCHG*/
- SRCDEP_REG | SRCDEP_RM | MODRM, SRCDEP_REG | SRCDEP_RM | MODRM, SRCDEP_REG | DSTDEP_REG | SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_REG | DSTDEP_REG | SRCDEP_RM | DSTDEP_RM | MODRM,
-/* MOV MOV MOV MOV*/
- SRCDEP_REG | DSTDEP_RM | MODRM, SRCDEP_REG | DSTDEP_RM | MODRM, SRCDEP_RM | DSTDEP_REG | MODRM, SRCDEP_RM | DSTDEP_REG | MODRM,
-/* MOV from seg LEA MOV to seg POP*/
- DSTDEP_RM | MODRM, DSTDEP_REG | MODRM, SRCDEP_RM | MODRM, IMPL_ESP | DSTDEP_RM | MODRM,
-
-/* NOP XCHG XCHG XCHG*/
-/*90*/ 0, SRCDEP_EAX | DSTDEP_EAX | SRCDEP_ECX | DSTDEP_ECX, SRCDEP_EAX | DSTDEP_EAX | SRCDEP_EDX | DSTDEP_EDX, SRCDEP_EAX | DSTDEP_EAX | SRCDEP_EBX | DSTDEP_EBX,
-/* XCHG XCHG XCHG XCHG*/
- SRCDEP_EAX | DSTDEP_EAX | SRCDEP_ESP | DSTDEP_ESP, SRCDEP_EAX | DSTDEP_EAX | SRCDEP_EBP | DSTDEP_EBP, SRCDEP_EAX | DSTDEP_EAX | SRCDEP_ESI | DSTDEP_ESI, SRCDEP_EAX | DSTDEP_EAX | SRCDEP_EDI | DSTDEP_EDI,
-/* CBW CWD CALL far WAIT*/
- SRCDEP_EAX | DSTDEP_EAX, SRCDEP_EAX | DSTDEP_EDX, 0, 0,
-/* PUSHF POPF SAHF LAHF*/
- IMPL_ESP, IMPL_ESP, SRCDEP_EAX, DSTDEP_EAX,
-
-/* MOV MOV MOV MOV*/
-/*a0*/ DSTDEP_EAX, DSTDEP_EAX, SRCDEP_EAX, SRCDEP_EAX,
-/* MOVSB MOVSW CMPSB CMPSW*/
- 0, 0, 0, 0,
-/* TEST TEST STOSB STOSW*/
- SRCDEP_EAX, SRCDEP_EAX, 0, 0,
-/* LODSB LODSW SCASB SCASW*/
- 0, 0, 0, 0,
-
-/* MOV*/
-/*b0*/ DSTDEP_EAX | HAS_IMM8, DSTDEP_ECX | HAS_IMM8, DSTDEP_EDX | HAS_IMM8, DSTDEP_EBX | HAS_IMM8,
- DSTDEP_EAX | HAS_IMM8, DSTDEP_ECX | HAS_IMM8, DSTDEP_EDX | HAS_IMM8, DSTDEP_EBX | HAS_IMM8,
- DSTDEP_EAX | HAS_IMM1632, DSTDEP_ECX | HAS_IMM1632, DSTDEP_EDX | HAS_IMM1632, DSTDEP_EBX | HAS_IMM1632,
- DSTDEP_ESP | HAS_IMM1632, DSTDEP_EBP | HAS_IMM1632, DSTDEP_ESI | HAS_IMM1632, DSTDEP_EDI | HAS_IMM1632,
-
-/* RET imm RET*/
-/*c0*/ 0, 0, SRCDEP_ESP | DSTDEP_ESP, IMPL_ESP,
-/* LES LDS MOV MOV*/
- DSTDEP_REG | MODRM, DSTDEP_REG | MODRM, DSTDEP_RM | MODRM | HAS_IMM8, DSTDEP_RM | MODRM | HAS_IMM1632,
-/* ENTER LEAVE RETF RETF*/
- IMPL_ESP, IMPL_ESP, IMPL_ESP, IMPL_ESP,
-/* INT3 INT INTO IRET*/
- 0, 0, 0, 0,
-
-
-/*d0*/ 0, 0, 0, 0,
-/* AAM AAD SETALC XLAT*/
- SRCDEP_EAX | DSTDEP_EAX, SRCDEP_EAX | DSTDEP_EAX, SRCDEP_EAX, SRCDEP_EAX | SRCDEP_EBX,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/* LOOPNE LOOPE LOOP JCXZ*/
-/*e0*/ SRCDEP_ECX | DSTDEP_ECX, SRCDEP_ECX | DSTDEP_ECX, SRCDEP_ECX | DSTDEP_ECX, SRCDEP_ECX,
-/* IN AL IN AX OUT_AL OUT_AX*/
- DSTDEP_EAX, DSTDEP_EAX, SRCDEP_EAX, SRCDEP_EAX,
-/* CALL JMP JMP JMP*/
- IMPL_ESP, 0, 0, 0,
-/* IN AL IN AX OUT_AL OUT_AX*/
- SRCDEP_EDX | DSTDEP_EAX, SRCDEP_EDX | DSTDEP_EAX, SRCDEP_EDX | SRCDEP_EAX, SRCDEP_EDX | SRCDEP_EAX,
-
-/* REPNE REPE*/
-/*f0*/ 0, 0, 0, 0,
-/* HLT CMC*/
- 0, 0, 0, 0,
-/* CLC STC CLI STI*/
- 0, 0, 0, 0,
-/* CLD STD INCDEC*/
- 0, 0, SRCDEP_RM | DSTDEP_RM | MODRM, 0
-};
-
-uint64_t opcode_deps_0f[256] =
-{
-/*00*/ MODRM, MODRM, MODRM, MODRM,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, MODRM, 0, MODRM,
-
-/*10*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*20*/ MODRM, MODRM, MODRM, MODRM,
- MODRM, MODRM, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*30*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*40*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*50*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*60*/ MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK,
- MODRM, MODRM, MODRM, MODRM,
- MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK,
- 0, 0, MODRM, MODRM,
-
-/*70*/ 0, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK,
- MODRM, MODRM, MODRM, 0,
- 0, 0, 0, 0,
- 0, 0, MODRM, MODRM,
-
-/*80*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*90*/ MODRM, MODRM, MODRM, MODRM,
- MODRM, MODRM, MODRM, MODRM,
- MODRM, MODRM, MODRM, MODRM,
- MODRM, MODRM, MODRM, MODRM,
-
-/*a0*/ MODRM, MODRM, MODRM, MODRM,
- MODRM, MODRM, 0, 0,
- MODRM, MODRM, 0, MODRM,
- MODRM, MODRM, 0, MODRM,
-
-/*b0*/ MODRM, MODRM, MODRM, MODRM,
- MODRM, MODRM, MODRM, MODRM,
- 0, 0, MODRM, MODRM,
- MODRM, MODRM, MODRM, MODRM,
-
-/*c0*/ MODRM, MODRM, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*d0*/ 0, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK,
- 0, MODRM | MMX_MULTIPLY, 0, 0,
- MODRM, MODRM, 0, MODRM,
- MODRM, MODRM, 0, MODRM,
-
-/*e0*/ 0, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK, 0,
- 0, MODRM | MMX_MULTIPLY, 0, 0,
- MODRM, MODRM, 0, MODRM,
- MODRM, MODRM, 0, MODRM,
-
-/*f0*/ 0, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK,
- 0, MODRM | MMX_MULTIPLY, 0, 0,
- MODRM, MODRM, MODRM, 0,
- MODRM, MODRM, MODRM, 0,
-};
-uint64_t opcode_deps_0f_mod3[256] =
-{
-/*00*/ MODRM, MODRM, MODRM, MODRM,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, MODRM, 0, MODRM,
-
-/*10*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*20*/ MODRM, MODRM, MODRM, MODRM,
- MODRM, MODRM, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*30*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*40*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*50*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*60*/ MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK,
- MODRM, MODRM, MODRM, MODRM,
- MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK,
- 0, 0, MODRM, MODRM,
-
-/*70*/ 0, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK,
- MODRM, MODRM, MODRM, 0,
- 0, 0, 0, 0,
- 0, 0, MODRM, MODRM,
-
-/*80*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*90*/ MODRM, MODRM, MODRM, MODRM,
- MODRM, MODRM, MODRM, MODRM,
- MODRM, MODRM, MODRM, MODRM,
- MODRM, MODRM, MODRM, MODRM,
-
-/*a0*/ MODRM, MODRM, MODRM, MODRM,
- MODRM, MODRM, 0, 0,
- MODRM, MODRM, 0, MODRM,
- MODRM, MODRM, 0, MODRM,
-
-/*b0*/ MODRM, MODRM, MODRM, MODRM,
- MODRM, MODRM, MODRM, MODRM,
- 0, 0, MODRM, MODRM,
- MODRM, MODRM, MODRM, MODRM,
-
-/*c0*/ MODRM, MODRM, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*d0*/ 0, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK,
- 0, MODRM | MMX_MULTIPLY, 0, 0,
- MODRM, MODRM, 0, MODRM,
- MODRM, MODRM, 0, MODRM,
-
-/*e0*/ 0, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK, 0,
- 0, MODRM | MMX_MULTIPLY, 0, 0,
- MODRM, MODRM, 0, MODRM,
- MODRM, MODRM, 0, MODRM,
-
-/*f0*/ 0, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK, MODRM | MMX_SHIFTPACK,
- 0, MODRM | MMX_MULTIPLY, 0, 0,
- MODRM, MODRM, MODRM, 0,
- MODRM, MODRM, MODRM, 0,
-};
-
-uint64_t opcode_deps_0f0f[256] =
-{
-/*00*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, MODRM, 0, 0,
-
-/*10*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, MODRM, 0, 0,
-
-/*20*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*30*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*40*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*50*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*60*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*70*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*80*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*90*/ MODRM, 0, 0, 0,
- MODRM, 0, MODRM, MODRM,
- 0, 0, MODRM, 0,
- 0, 0, MODRM, 0,
-
-/*a0*/ MODRM, 0, 0, 0,
- MODRM, 0, MODRM, MODRM,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*b0*/ MODRM, 0, 0, 0,
- MODRM, 0, MODRM, MODRM,
- 0, 0, 0, 0,
- 0, 0, 0, MODRM,
-
-/*c0*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*d0*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*e0*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*f0*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-};
-uint64_t opcode_deps_0f0f_mod3[256] =
-{
-/*00*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, MODRM, 0, 0,
-
-/*10*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, MODRM, 0, 0,
-
-/*20*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*30*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*40*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*50*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*60*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*70*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*80*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*90*/ MODRM, 0, 0, 0,
- MODRM, 0, MODRM, MODRM,
- 0, 0, MODRM, 0,
- 0, 0, MODRM, 0,
-
-/*a0*/ MODRM, 0, 0, 0,
- MODRM, 0, MODRM, MODRM,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*b0*/ MODRM, 0, 0, 0,
- MODRM, 0, MODRM, MODRM,
- 0, 0, 0, 0,
- 0, 0, 0, MODRM,
-
-/*c0*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*d0*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*e0*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-
-/*f0*/ 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
-};
-
-uint64_t opcode_deps_shift[8] =
-{
- MODRM, MODRM, MODRM, MODRM,
- MODRM, MODRM, MODRM, MODRM,
-};
-uint64_t opcode_deps_shift_mod3[8] =
-{
- SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_RM | DSTDEP_RM | MODRM,
- SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_RM | DSTDEP_RM | MODRM,
-};
-
-uint64_t opcode_deps_shift_cl[8] =
-{
- MODRM | SRCDEP_ECX, MODRM | SRCDEP_ECX, MODRM | SRCDEP_ECX, MODRM | SRCDEP_ECX,
- MODRM | SRCDEP_ECX, MODRM | SRCDEP_ECX, MODRM | SRCDEP_ECX, MODRM | SRCDEP_ECX,
-};
-uint64_t opcode_deps_shift_cl_mod3[8] =
-{
- SRCDEP_RM | DSTDEP_RM | MODRM | SRCDEP_ECX, SRCDEP_RM | DSTDEP_RM | MODRM | SRCDEP_ECX, SRCDEP_RM | DSTDEP_RM | MODRM | SRCDEP_ECX, SRCDEP_RM | DSTDEP_RM | MODRM | SRCDEP_ECX,
- SRCDEP_RM | DSTDEP_RM | MODRM | SRCDEP_ECX, SRCDEP_RM | DSTDEP_RM | MODRM | SRCDEP_ECX, SRCDEP_RM | DSTDEP_RM | MODRM | SRCDEP_ECX, SRCDEP_RM | DSTDEP_RM | MODRM | SRCDEP_ECX,
-};
-
-uint64_t opcode_deps_f6[8] =
-{
-/* TST NOT NEG*/
- MODRM, 0, MODRM, MODRM,
-/* MUL IMUL DIV IDIV*/
- SRCDEP_EAX | DSTDEP_EAX | DSTDEP_EDX | MODRM, SRCDEP_EAX | DSTDEP_EAX | DSTDEP_EDX | MODRM, SRCDEP_EAX | SRCDEP_EDX | DSTDEP_EAX | DSTDEP_EDX | MODRM, SRCDEP_EAX | SRCDEP_EDX | DSTDEP_EAX | DSTDEP_EDX | MODRM
-};
-uint64_t opcode_deps_f6_mod3[8] =
-{
-/* TST NOT NEG*/
- SRCDEP_RM | MODRM, 0, SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_RM | DSTDEP_RM | MODRM,
-/* MUL IMUL DIV IDIV*/
- SRCDEP_EAX | DSTDEP_EAX | DSTDEP_EDX | SRCDEP_RM | MODRM, SRCDEP_EAX | DSTDEP_EAX | DSTDEP_EDX | SRCDEP_RM | MODRM, SRCDEP_EAX | SRCDEP_EDX | DSTDEP_EAX | DSTDEP_EDX | SRCDEP_RM | MODRM, SRCDEP_EAX | SRCDEP_EDX | DSTDEP_EAX | DSTDEP_EDX | MODRM
-};
-uint64_t opcode_deps_f7[8] =
-{
-/* TST NOT NEG*/
- MODRM, 0, MODRM, MODRM,
-/* MUL IMUL DIV IDIV*/
- SRCDEP_EAX | DSTDEP_EAX | DSTDEP_EDX | MODRM, SRCDEP_EAX | DSTDEP_EAX | DSTDEP_EDX | MODRM, SRCDEP_EAX | SRCDEP_EDX | DSTDEP_EAX | DSTDEP_EDX | MODRM, SRCDEP_EAX | SRCDEP_EDX | DSTDEP_EAX | DSTDEP_EDX | MODRM
-};
-uint64_t opcode_deps_f7_mod3[8] =
-{
-/* TST NOT NEG*/
- SRCDEP_RM | MODRM, 0, SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_RM | DSTDEP_RM | MODRM,
-/* MUL IMUL DIV IDIV*/
- SRCDEP_EAX | DSTDEP_EAX | DSTDEP_EDX | SRCDEP_RM | MODRM, SRCDEP_EAX | DSTDEP_EAX | DSTDEP_EDX | SRCDEP_RM | MODRM, SRCDEP_EAX | SRCDEP_EDX | DSTDEP_EAX | DSTDEP_EDX | SRCDEP_RM | MODRM, SRCDEP_EAX | SRCDEP_EDX | DSTDEP_EAX | DSTDEP_EDX | MODRM
-};
-uint64_t opcode_deps_ff[8] =
-{
-/* INC DEC CALL CALL far*/
- MODRM, MODRM, MODRM | IMPL_ESP, MODRM,
-/* JMP JMP far PUSH*/
- MODRM, MODRM, MODRM | IMPL_ESP, 0
-};
-uint64_t opcode_deps_ff_mod3[8] =
-{
-/* INC DEC CALL CALL far*/
- SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_RM | DSTDEP_RM | MODRM, SRCDEP_RM | MODRM | IMPL_ESP, MODRM,
-/* JMP JMP far PUSH*/
- SRCDEP_RM | MODRM, MODRM, SRCDEP_RM | MODRM | IMPL_ESP, 0
-};
-
-uint64_t opcode_deps_d8[8] =
-{
-/* FADDs FMULs FCOMs FCOMPs*/
- FPU_RW_ST0 | MODRM, FPU_RW_ST0 | MODRM, FPU_READ_ST0 | MODRM, FPU_POP | FPU_READ_ST0 | MODRM,
-/* FSUBs FSUBRs FDIVs FDIVRs*/
- FPU_RW_ST0 | MODRM, FPU_RW_ST0 | MODRM, FPU_RW_ST0 | MODRM, FPU_RW_ST0 | MODRM
-};
-uint64_t opcode_deps_d8_mod3[8] =
-{
-/* FADD FMUL FCOM FCOMP*/
- FPU_RW_ST0 | FPU_READ_STREG, FPU_RW_ST0 | FPU_READ_STREG, FPU_READ_ST0 | FPU_READ_STREG, FPU_POP | FPU_READ_ST0 | FPU_READ_STREG,
-/* FSUB FSUBR FDIV FDIVR*/
- FPU_RW_ST0 | FPU_READ_STREG, FPU_RW_ST0 | FPU_READ_STREG, FPU_RW_ST0 | FPU_READ_STREG, FPU_RW_ST0 | FPU_READ_STREG
-};
-
-uint64_t opcode_deps_d9[8] =
-{
-/* FLDs FSTs FSTPs*/
- FPU_PUSH | MODRM, 0, FPU_READ_ST0 | MODRM, FPU_POP | MODRM,
-/* FLDENV FLDCW FSTENV FSTCW*/
- MODRM, MODRM, MODRM, MODRM
-};
-uint64_t opcode_deps_d9_mod3[64] =
-{
- /*FLD*/
- FPU_PUSH | FPU_READ_STREG, FPU_PUSH | FPU_READ_STREG, FPU_PUSH | FPU_READ_STREG, FPU_PUSH | FPU_READ_STREG,
- FPU_PUSH | FPU_READ_STREG, FPU_PUSH | FPU_READ_STREG, FPU_PUSH | FPU_READ_STREG, FPU_PUSH | FPU_READ_STREG,
- /*FXCH*/
- FPU_FXCH, FPU_FXCH, FPU_FXCH, FPU_FXCH,
- FPU_FXCH, FPU_FXCH, FPU_FXCH, FPU_FXCH,
- /*FNOP*/
- 0, 0, 0, 0, 0, 0, 0, 0,
- /*FSTP*/
- FPU_READ_ST0 | FPU_WRITE_STREG | FPU_POP, FPU_READ_ST0 | FPU_WRITE_STREG | FPU_POP, FPU_READ_ST0 | FPU_WRITE_STREG | FPU_POP, FPU_READ_ST0 | FPU_WRITE_STREG | FPU_POP,
- FPU_READ_ST0 | FPU_WRITE_STREG | FPU_POP, FPU_READ_ST0 | FPU_WRITE_STREG | FPU_POP, FPU_READ_ST0 | FPU_WRITE_STREG | FPU_POP, FPU_READ_ST0 | FPU_WRITE_STREG | FPU_POP,
-/* opFCHS opFABS*/
- 0, 0, 0, 0,
-/* opFTST opFXAM*/
- 0, 0, 0, 0,
-/* opFLD1 opFLDL2T opFLDL2E opFLDPI*/
- FPU_PUSH, FPU_PUSH, FPU_PUSH, FPU_PUSH,
-/* opFLDEG2 opFLDLN2 opFLDZ*/
- FPU_PUSH, FPU_PUSH, FPU_PUSH, 0,
-/* opF2XM1 opFYL2X opFPTAN opFPATAN*/
- 0, 0, 0, 0,
-/* opFDECSTP opFINCSTP,*/
- 0, 0, 0, 0,
-/* opFPREM opFSQRT opFSINCOS*/
- 0, 0, 0, 0,
-/* opFRNDINT opFSCALE opFSIN opFCOS*/
- 0, 0, 0, 0
-};
-
-uint64_t opcode_deps_da[8] =
-{
-/* FIADDl FIMULl FICOMl FICOMPl*/
- FPU_RW_ST0 | MODRM, FPU_RW_ST0 | MODRM, FPU_READ_ST0 | MODRM, FPU_READ_ST0 | FPU_POP | MODRM,
-/* FISUBl FISUBRl FIDIVl FIDIVRl*/
- FPU_RW_ST0 | MODRM, FPU_RW_ST0 | MODRM, FPU_RW_ST0 | MODRM, FPU_RW_ST0 | MODRM
-};
-uint64_t opcode_deps_da_mod3[8] =
-{
- 0, 0, 0, 0,
-/* FCOMPP*/
- 0, FPU_POP2, 0, 0
-};
-
-
-uint64_t opcode_deps_db[8] =
-{
-/* FLDil FSTil FSTPil*/
- FPU_PUSH | MODRM, 0, FPU_READ_ST0 | MODRM, FPU_READ_ST0 | FPU_POP | MODRM,
-/* FLDe FSTPe*/
- 0, FPU_PUSH | MODRM, 0, FPU_READ_ST0 | FPU_POP | MODRM
-};
-uint64_t opcode_deps_db_mod3[64] =
-{
- 0, 0, 0, 0, 0, 0, 0, 0,
-
- 0, 0, 0, 0, 0, 0, 0, 0,
-
- 0, 0, 0, 0, 0, 0, 0, 0,
-
-
- 0, 0, 0, 0, 0, 0, 0, 0,
-
-/* opFNOP opFCLEX opFINIT*/
- 0, 0, 0, 0,
-/* opFNOP opFNOP*/
- 0, 0, 0, 0,
-
- 0, 0, 0, 0, 0, 0, 0, 0,
-
- 0, 0, 0, 0, 0, 0, 0, 0,
-
- 0, 0, 0, 0, 0, 0, 0, 0,
-};
-
-uint64_t opcode_deps_dc[8] =
-{
-/* FADDd FMULd FCOMd FCOMPd*/
- FPU_RW_ST0 | MODRM, FPU_RW_ST0 | MODRM, FPU_READ_ST0 | MODRM, FPU_READ_ST0 | FPU_POP | MODRM,
-/* FSUBd FSUBRd FDIVd FDIVRd*/
- FPU_RW_ST0 | MODRM, FPU_RW_ST0 | MODRM, FPU_RW_ST0 | MODRM, FPU_RW_ST0 | MODRM
-};
-uint64_t opcode_deps_dc_mod3[8] =
-{
-/* opFADDr opFMULr*/
- FPU_READ_ST0 | FPU_RW_STREG, FPU_READ_ST0 | FPU_RW_STREG, 0, 0,
-/* opFSUBRr opFSUBr opFDIVRr opFDIVr*/
- FPU_READ_ST0 | FPU_RW_STREG, FPU_READ_ST0 | FPU_RW_STREG, FPU_READ_ST0 | FPU_RW_STREG, FPU_READ_ST0 | FPU_RW_STREG
-};
-
-uint64_t opcode_deps_dd[8] =
-{
-/* FLDd FSTd FSTPd*/
- FPU_PUSH | MODRM, 0, FPU_READ_ST0 | MODRM, FPU_READ_ST0 | FPU_POP | MODRM,
-/* FRSTOR FSAVE FSTSW*/
- MODRM, 0, MODRM, MODRM
-};
-uint64_t opcode_deps_dd_mod3[8] =
-{
-/* FFFREE FST FSTP*/
- 0, 0, FPU_READ_ST0 | FPU_WRITE_STREG, FPU_READ_ST0 | FPU_WRITE_STREG | FPU_POP,
-/* FUCOM FUCOMP*/
- FPU_READ_ST0 | FPU_READ_STREG, FPU_READ_ST0 | FPU_READ_STREG | FPU_POP, 0, 0
-};
-
-uint64_t opcode_deps_de[8] =
-{
-/* FIADDw FIMULw FICOMw FICOMPw*/
- FPU_RW_ST0 | MODRM, FPU_RW_ST0 | MODRM, FPU_READ_ST0 | MODRM, FPU_READ_ST0 | FPU_POP | MODRM,
-/* FISUBw FISUBRw FIDIVw FIDIVRw*/
- FPU_RW_ST0 | MODRM, FPU_RW_ST0 | MODRM, FPU_RW_ST0 | MODRM, FPU_RW_ST0 | MODRM
-};
-uint64_t opcode_deps_de_mod3[8] =
-{
-/* FADDP FMULP FCOMPP*/
- FPU_READ_ST0 | FPU_RW_STREG | FPU_POP, FPU_READ_ST0 | FPU_RW_STREG | FPU_POP, 0, FPU_READ_ST0 | FPU_READ_ST1 | FPU_POP2,
-/* FSUBP FSUBRP FDIVP FDIVRP*/
- FPU_READ_ST0 | FPU_RW_STREG | FPU_POP, FPU_READ_ST0 | FPU_RW_STREG | FPU_POP, FPU_READ_ST0 | FPU_RW_STREG | FPU_POP, FPU_READ_ST0 | FPU_RW_STREG | FPU_POP
-};
-
-uint64_t opcode_deps_df[8] =
-{
-/* FILDiw FISTiw FISTPiw*/
- FPU_PUSH | MODRM, 0, FPU_READ_ST0 | MODRM, FPU_READ_ST0 | FPU_POP | MODRM,
-/* FILDiq FBSTP FISTPiq*/
- 0, FPU_PUSH | MODRM, FPU_READ_ST0 | FPU_POP | MODRM, FPU_READ_ST0 | FPU_POP | MODRM
-};
-uint64_t opcode_deps_df_mod3[8] =
-{
- 0, 0, 0, 0,
-/* FSTSW AX*/
- 0, 0, 0, 0
-};
-
-uint64_t opcode_deps_81[8] =
-{
- MODRM | HAS_IMM1632, MODRM | HAS_IMM1632, MODRM | HAS_IMM1632, MODRM | HAS_IMM1632,
- MODRM | HAS_IMM1632, MODRM | HAS_IMM1632, MODRM | HAS_IMM1632, MODRM | HAS_IMM1632
-};
-uint64_t opcode_deps_81_mod3[8] =
-{
- SRCDEP_RM | DSTDEP_RM | MODRM | HAS_IMM1632, SRCDEP_RM | DSTDEP_RM | MODRM | HAS_IMM1632, SRCDEP_RM | DSTDEP_RM | MODRM | HAS_IMM1632, SRCDEP_RM | DSTDEP_RM | MODRM | HAS_IMM1632,
- SRCDEP_RM | DSTDEP_RM | MODRM | HAS_IMM1632, SRCDEP_RM | DSTDEP_RM | MODRM | HAS_IMM1632, SRCDEP_RM | DSTDEP_RM | MODRM | HAS_IMM1632, SRCDEP_RM | MODRM | HAS_IMM1632
-};
-uint64_t opcode_deps_8x[8] =
-{
- MODRM | HAS_IMM8, MODRM | HAS_IMM8, MODRM | HAS_IMM8, MODRM | HAS_IMM8,
- MODRM | HAS_IMM8, MODRM | HAS_IMM8, MODRM | HAS_IMM8, MODRM | HAS_IMM8
-};
-uint64_t opcode_deps_8x_mod3[8] =
-{
- SRCDEP_RM | DSTDEP_RM | MODRM | HAS_IMM8, SRCDEP_RM | DSTDEP_RM | MODRM | HAS_IMM8, SRCDEP_RM | DSTDEP_RM | MODRM | HAS_IMM8, SRCDEP_RM | DSTDEP_RM | MODRM | HAS_IMM8,
- SRCDEP_RM | DSTDEP_RM | MODRM | HAS_IMM8, SRCDEP_RM | DSTDEP_RM | MODRM | HAS_IMM8, SRCDEP_RM | DSTDEP_RM | MODRM | HAS_IMM8, SRCDEP_RM | MODRM | HAS_IMM8
-};
diff --git a/src/codegen_timing_common.h b/src/codegen_timing_common.h
deleted file mode 100644
index 533a135..0000000
--- a/src/codegen_timing_common.h
+++ /dev/null
@@ -1,231 +0,0 @@
-#include "codegen_ops.h"
-
-/*Instruction has input dependency on register in REG field*/
-#define SRCDEP_REG (1ull << 0)
-/*Instruction has input dependency on register in R/M field*/
-#define SRCDEP_RM (1ull << 1)
-/*Instruction modifies register in REG field*/
-#define DSTDEP_REG (1ull << 2)
-/*Instruction modifies register in R/M field*/
-#define DSTDEP_RM (1ull << 3)
-
-#define SRCDEP_SHIFT 4
-#define DSTDEP_SHIFT 12
-
-/*Instruction has input dependency on given register*/
-#define SRCDEP_EAX (1ull << 4)
-#define SRCDEP_ECX (1ull << 5)
-#define SRCDEP_EDX (1ull << 6)
-#define SRCDEP_EBX (1ull << 7)
-#define SRCDEP_ESP (1ull << 8)
-#define SRCDEP_EBP (1ull << 9)
-#define SRCDEP_ESI (1ull << 10)
-#define SRCDEP_EDI (1ull << 11)
-
-/*Instruction modifies given register*/
-#define DSTDEP_EAX (1ull << 12)
-#define DSTDEP_ECX (1ull << 13)
-#define DSTDEP_EDX (1ull << 14)
-#define DSTDEP_EBX (1ull << 15)
-#define DSTDEP_ESP (1ull << 16)
-#define DSTDEP_EBP (1ull << 17)
-#define DSTDEP_ESI (1ull << 18)
-#define DSTDEP_EDI (1ull << 19)
-
-/*Instruction has ModR/M byte*/
-#define MODRM (1ull << 20)
-/*Instruction implicitly uses ESP*/
-#define IMPL_ESP (1ull << 21)
-
-/*Instruction is MMX shift or pack/unpack instruction*/
-#define MMX_SHIFTPACK (1ull << 22)
-/*Instruction is MMX multiply instruction*/
-#define MMX_MULTIPLY (1ull << 23)
-
-/*Instruction pops the FPU stack*/
-#define FPU_POP (1ull << 24)
-/*Instruction pops the FPU stack twice*/
-#define FPU_POP2 (1ull << 25)
-/*Instruction pushes onto the FPU stack*/
-#define FPU_PUSH (1ull << 26)
-
-/*Instruction writes to ST(0)*/
-#define FPU_WRITE_ST0 (1ull << 27)
-/*Instruction reads from ST(0)*/
-#define FPU_READ_ST0 (1ull << 28)
-/*Instruction reads from and writes to ST(0)*/
-#define FPU_RW_ST0 (3ull << 27)
-
-/*Instruction reads from ST(1)*/
-#define FPU_READ_ST1 (1ull << 29)
-/*Instruction writes to ST(1)*/
-#define FPU_WRITE_ST1 (1ull << 30)
-/*Instruction reads from and writes to ST(1)*/
-#define FPU_RW_ST1 (3ull << 29)
-
-/*Instruction reads from ST(reg)*/
-#define FPU_READ_STREG (1ull << 31)
-/*Instruction writes to ST(reg)*/
-#define FPU_WRITE_STREG (1ull << 32)
-/*Instruction reads from and writes to ST(reg)*/
-#define FPU_RW_STREG (3ull << 30)
-
-#define FPU_FXCH (1ull << 33)
-
-#define HAS_IMM8 (1ull << 34)
-#define HAS_IMM1632 (1ull << 35)
-
-
-#define REGMASK_IMPL_ESP (1 << 8)
-#define REGMASK_SHIFTPACK (1 << 9)
-#define REGMASK_MULTIPLY (1 << 9)
-
-
-extern uint64_t opcode_deps[256];
-extern uint64_t opcode_deps_mod3[256];
-extern uint64_t opcode_deps_0f[256];
-extern uint64_t opcode_deps_0f_mod3[256];
-extern uint64_t opcode_deps_0f0f[256];
-extern uint64_t opcode_deps_0f0f_mod3[256];
-extern uint64_t opcode_deps_shift[8];
-extern uint64_t opcode_deps_shift_mod3[8];
-extern uint64_t opcode_deps_shift_cl[8];
-extern uint64_t opcode_deps_shift_cl_mod3[8];
-extern uint64_t opcode_deps_f6[8];
-extern uint64_t opcode_deps_f6_mod3[8];
-extern uint64_t opcode_deps_f7[8];
-extern uint64_t opcode_deps_f7_mod3[8];
-extern uint64_t opcode_deps_ff[8];
-extern uint64_t opcode_deps_ff_mod3[8];
-extern uint64_t opcode_deps_d8[8];
-extern uint64_t opcode_deps_d8_mod3[8];
-extern uint64_t opcode_deps_d9[8];
-extern uint64_t opcode_deps_d9_mod3[64];
-extern uint64_t opcode_deps_da[8];
-extern uint64_t opcode_deps_da_mod3[8];
-extern uint64_t opcode_deps_db[8];
-extern uint64_t opcode_deps_db_mod3[64];
-extern uint64_t opcode_deps_dc[8];
-extern uint64_t opcode_deps_dc_mod3[8];
-extern uint64_t opcode_deps_dd[8];
-extern uint64_t opcode_deps_dd_mod3[8];
-extern uint64_t opcode_deps_de[8];
-extern uint64_t opcode_deps_de_mod3[8];
-extern uint64_t opcode_deps_df[8];
-extern uint64_t opcode_deps_df_mod3[8];
-extern uint64_t opcode_deps_81[8];
-extern uint64_t opcode_deps_81_mod3[8];
-extern uint64_t opcode_deps_8x[8];
-extern uint64_t opcode_deps_8x_mod3[8];
-
-
-
-static inline uint32_t get_addr_regmask(uint64_t data, uint32_t fetchdat, int op_32)
-{
- uint32_t addr_regmask = 0;
-
- if (data & MODRM)
- {
- uint8_t modrm = fetchdat & 0xff;
-
- if ((modrm & 0xc0) != 0xc0)
- {
- if (op_32 & 0x200)
- {
- if ((modrm & 0x7) == 4)
- {
- uint8_t sib = (fetchdat >> 8) & 0xff;
-
- if ((modrm & 0xc0) != 0xc0 && (sib & 7) != 5)
- {
- addr_regmask = 1 << (sib & 7);
- if ((sib & 0x38) != 0x20)
- addr_regmask |= 1 << ((sib >> 3) & 7);
- }
- }
- else if ((modrm & 0xc7) != 5)
- {
- addr_regmask = 1 << (modrm & 7);
- }
- }
- else
- {
- if ((modrm & 0xc7) != 0x06)
- {
- switch (modrm & 7)
- {
- case 0: addr_regmask = REG_BX | REG_SI; break;
- case 1: addr_regmask = REG_BX | REG_DI; break;
- case 2: addr_regmask = REG_BP | REG_SI; break;
- case 3: addr_regmask = REG_BP | REG_DI; break;
- case 4: addr_regmask = REG_SI; break;
- case 5: addr_regmask = REG_DI; break;
- case 6: addr_regmask = REG_BP; break;
- case 7: addr_regmask = REG_BX; break;
- }
- }
- }
- }
- }
-
- if (data & IMPL_ESP)
- addr_regmask |= REGMASK_IMPL_ESP;
-
- return addr_regmask;
-}
-
-static inline uint32_t get_srcdep_mask(uint64_t data, uint32_t fetchdat, int bit8, int op_32)
-{
- uint32_t mask = 0;
- if (data & SRCDEP_REG)
- {
- int reg = (fetchdat >> 3) & 7;
- if (bit8)
- reg &= 3;
- mask |= (1 << reg);
- }
- if (data & SRCDEP_RM)
- {
- int reg = fetchdat & 7;
- if (bit8)
- reg &= 3;
- mask |= (1 << reg);
- }
- mask |= ((data >> SRCDEP_SHIFT) & 0xff);
- if (data & MMX_SHIFTPACK)
- mask |= REGMASK_SHIFTPACK;
- if (data & MMX_MULTIPLY)
- mask |= REGMASK_MULTIPLY;
-
- mask |= get_addr_regmask(data, fetchdat, op_32);
-
- return mask;
-}
-
-static inline uint32_t get_dstdep_mask(uint64_t data, uint32_t fetchdat, int bit8)
-{
- uint32_t mask = 0;
- if (data & DSTDEP_REG)
- {
- int reg = (fetchdat >> 3) & 7;
- if (bit8)
- reg &= 3;
- mask |= (1 << reg);
- }
- if (data & DSTDEP_RM)
- {
- int reg = fetchdat & 7;
- if (bit8)
- reg &= 3;
- mask |= (1 << reg);
- }
- mask |= ((data >> DSTDEP_SHIFT) & 0xff);
- if (data & MMX_SHIFTPACK)
- mask |= REGMASK_SHIFTPACK;
- if (data & MMX_MULTIPLY)
- mask |= REGMASK_MULTIPLY;
- if (data & IMPL_ESP)
- mask |= REGMASK_IMPL_ESP | (1 << REG_ESP);
-
- return mask;
-}
diff --git a/src/codegen_timing_cyrixiii.c b/src/codegen_timing_cyrixiii.c
deleted file mode 100644
index c89defc..0000000
--- a/src/codegen_timing_cyrixiii.c
+++ /dev/null
@@ -1,679 +0,0 @@
-/*Since VIA didn't document cycle timings in the Cyrix III/C3 datasheets, and
- I don't currently own either chip to test against, most of the timing here is
- a guess. This code makes the current (probably wrong) assumptions, based on the
- few details in the Cyrix III datasheet :
- - Most common integer instructions are 1 cycle, including register-memory and
- memory-register versions
- - Basic FPU instructions are 2 cycles. The datasheet claims "a non-dependent
- add or multiply can start every two clocks"; it's not clear if this is referring
- to CPU or FPU clocks, since the FPU runs at 1/2 CPU speed on these chips.
- - MMX instructions are 1 cycle
- - No instruction pairing of any kind (unlike WinChip 2)
- - Prefixes other than 0x0f cost 1 cycle each
- - AGI stalls cost 1 cycle, except for implicit references to ESP*/
-#include "ibm.h"
-#include "cpu.h"
-#include "x86.h"
-#include "x86_ops.h"
-#include "x87.h"
-#include "mem.h"
-#include "codegen.h"
-#include "codegen_ops.h"
-#include "codegen_timing_common.h"
-
-/*Instruction has different execution time for 16 and 32 bit data. Does not pair */
-#define CYCLES_HAS_MULTI (1 << 31)
-
-#define CYCLES_FPU (1 << 30)
-
-#define CYCLES_IS_MMX_MUL (1 << 29)
-#define CYCLES_IS_MMX_SHIFT (1 << 28)
-#define CYCLES_IS_MMX_ANY (1 << 27)
-#define CYCLES_IS_3DNOW (1 << 26)
-
-#define CYCLES_MMX_MUL(c) (CYCLES_IS_MMX_MUL | c)
-#define CYCLES_MMX_SHIFT(c) (CYCLES_IS_MMX_SHIFT | c)
-#define CYCLES_MMX_ANY(c) (CYCLES_IS_MMX_ANY | c)
-#define CYCLES_3DNOW(c) (CYCLES_IS_3DNOW | c)
-
-#define CYCLES_IS_MMX (CYCLES_IS_MMX_MUL | CYCLES_IS_MMX_SHIFT | CYCLES_IS_MMX_ANY | CYCLES_IS_3DNOW)
-
-#define GET_CYCLES(c) (c & ~(CYCLES_HAS_MULTI | CYCLES_FPU | CYCLES_IS_MMX))
-
-#define CYCLES(c) c
-#define CYCLES2(c16, c32) (CYCLES_HAS_MULTI | c16 | (c32 << 8))
-
-/*comp_time = cycles until instruction complete
- i_overlap = cycles that overlap with integer
- f_overlap = cycles that overlap with subsequent FPU*/
-#define FPU_CYCLES(comp_time, i_overlap, f_overlap) (comp_time) | (i_overlap << 8) | (f_overlap << 16) | CYCLES_FPU
-
-#define FPU_COMP_TIME(timing) (timing & 0xff)
-#define FPU_I_OVERLAP(timing) ((timing >> 8) & 0xff)
-#define FPU_F_OVERLAP(timing) ((timing >> 16) & 0xff)
-
-#define FPU_I_LATENCY(timing) (FPU_COMP_TIME(timing) - FPU_I_OVERLAP(timing))
-
-#define FPU_F_LATENCY(timing) (FPU_I_OVERLAP(timing) - FPU_F_OVERLAP(timing))
-
-#define FPU_RESULT_LATENCY(timing) ((timing >> 8) & 0xff)
-
-#define INVALID 0
-
-static uint32_t opcode_timings[256] =
-{
-/*00*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(3), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), INVALID,
-/*10*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(3), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(3),
-/*20*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(3), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(3),
-/*30*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2),
-
-/*40*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-/*50*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-/*60*/ CYCLES(11), CYCLES(9), CYCLES(7), CYCLES(9), CYCLES(4), CYCLES(4), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES2(17,25), CYCLES(1), CYCLES2(17,20), CYCLES(17), CYCLES(17), CYCLES(17), CYCLES(17),
-/*70*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-
-/*80*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(2), CYCLES(5), CYCLES(5), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(3), CYCLES(1), CYCLES(5), CYCLES(6),
-/*90*/ CYCLES(1), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(0), CYCLES(4), CYCLES(4), CYCLES(5), CYCLES(2), CYCLES(3),
-/*a0*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(7), CYCLES(7), CYCLES(8), CYCLES(8), CYCLES(1), CYCLES(1), CYCLES(5), CYCLES(5), CYCLES(5), CYCLES(5), CYCLES(6), CYCLES(6),
-/*b0*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-
-/*c0*/ CYCLES(1), CYCLES(1), CYCLES(5), CYCLES(5), CYCLES(6), CYCLES(6), CYCLES(1), CYCLES(1), CYCLES(14), CYCLES(5), CYCLES(0), CYCLES(0), CYCLES(0), CYCLES(0), CYCLES(3), CYCLES(0),
-/*d0*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(15), CYCLES(14), CYCLES(2), CYCLES(4), INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*e0*/ CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(5), CYCLES(14), CYCLES(14), CYCLES(16), CYCLES(16), CYCLES(3), CYCLES(3), CYCLES(17), CYCLES(3), CYCLES(14), CYCLES(14), CYCLES(14), CYCLES(14),
-/*f0*/ CYCLES(4), CYCLES(0), CYCLES(0), CYCLES(0), CYCLES(4), CYCLES(2), INVALID, INVALID, CYCLES(2), CYCLES(2), CYCLES(3), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(3), INVALID
-};
-
-static uint32_t opcode_timings_mod3[256] =
-{
-/*00*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(3), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), INVALID,
-/*10*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(3), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(3),
-/*20*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(3), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(3),
-/*30*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2),
-
-/*40*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-/*50*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-/*60*/ CYCLES(11), CYCLES(9), CYCLES(7), CYCLES(9), CYCLES(4), CYCLES(4), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES2(14,25), CYCLES(1), CYCLES2(17,20), CYCLES(17), CYCLES(17), CYCLES(17), CYCLES(17),
-/*70*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-
-/*80*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(5), CYCLES(5), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(1), CYCLES(2), CYCLES(1),
-/*90*/ CYCLES(1), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(0), CYCLES(4), CYCLES(4), CYCLES(5), CYCLES(2), CYCLES(3),
-/*a0*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(7), CYCLES(7), CYCLES(8), CYCLES(8), CYCLES(1), CYCLES(1), CYCLES(5), CYCLES(5), CYCLES(5), CYCLES(5), CYCLES(6), CYCLES(6),
-/*b0*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-
-/*c0*/ CYCLES(1), CYCLES(1), CYCLES(5), CYCLES(5), CYCLES(6), CYCLES(6), CYCLES(1), CYCLES(1), CYCLES(14), CYCLES(5), CYCLES(0), CYCLES(0), CYCLES(0), CYCLES(0), CYCLES(3), CYCLES(0),
-/*d0*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(15), CYCLES(14), CYCLES(2), CYCLES(4), INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*e0*/ CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(5), CYCLES(14), CYCLES(14), CYCLES(16), CYCLES(16), CYCLES(3), CYCLES(3), CYCLES(17), CYCLES(3), CYCLES(14), CYCLES(14), CYCLES(14), CYCLES(14),
-/*f0*/ CYCLES(4), CYCLES(0), CYCLES(0), CYCLES(0), CYCLES(4), CYCLES(2), INVALID, INVALID, CYCLES(2), CYCLES(2), CYCLES(3), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(3), INVALID,
-};
-
-static uint32_t opcode_timings_0f[256] =
-{
-/*00*/ CYCLES(20), CYCLES(11), CYCLES(11), CYCLES(10), INVALID, CYCLES(195), CYCLES(7), INVALID, CYCLES(1000), CYCLES(10000), INVALID, INVALID, INVALID, CYCLES_3DNOW(1), CYCLES(1), CYCLES_3DNOW(1),
-/*10*/ INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*20*/ CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(6), INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*30*/ CYCLES(9), CYCLES(1), CYCLES(9), INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-
-/*40*/ INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*50*/ INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*60*/ CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), INVALID, INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1),
-/*70*/ INVALID, CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES(100), INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1),
-
-/*80*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-/*90*/ CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3),
-/*a0*/ CYCLES(3), CYCLES(3), CYCLES(14), CYCLES(8), CYCLES(3), CYCLES(4), INVALID, INVALID, CYCLES(3), CYCLES(3), INVALID, CYCLES(13), CYCLES(3), CYCLES(3), INVALID, CYCLES2(18,30),
-/*b0*/ CYCLES(10), CYCLES(10), CYCLES(6), CYCLES(13), CYCLES(6), CYCLES(6), CYCLES(3), CYCLES(3), INVALID, INVALID, CYCLES(6), CYCLES(13), CYCLES(7), CYCLES(7), CYCLES(3), CYCLES(3),
-
-/*c0*/ CYCLES(4), CYCLES(4), INVALID, INVALID, INVALID, INVALID, INVALID, CYCLES(3), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-/*d0*/ INVALID, CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), INVALID, CYCLES_MMX_MUL(1), INVALID, INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), INVALID, CYCLES_MMX_ANY(1),
-/*e0*/ INVALID, CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), INVALID, INVALID, CYCLES_MMX_MUL(1), INVALID, INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), INVALID, CYCLES_MMX_ANY(1),
-/*f0*/ INVALID, CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), INVALID, CYCLES_MMX_MUL(1), INVALID, INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(2), INVALID,
-};
-static uint32_t opcode_timings_0f_mod3[256] =
-{
-/*00*/ CYCLES(20), CYCLES(11), CYCLES(11), CYCLES(10), INVALID, CYCLES(195), CYCLES(7), INVALID, CYCLES(1000), CYCLES(10000), INVALID, INVALID, INVALID, CYCLES_3DNOW(1), CYCLES(1), CYCLES_3DNOW(1),
-/*10*/ INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*20*/ CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(6), INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*30*/ CYCLES(9), CYCLES(1), CYCLES(9), INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-
-/*40*/ INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*50*/ INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*60*/ CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), INVALID, INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1),
-/*70*/ INVALID, CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES(100), INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1),
-
-/*80*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-/*90*/ CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3),
-/*a0*/ CYCLES(3), CYCLES(3), CYCLES(14), CYCLES(8), CYCLES(3), CYCLES(4), INVALID, INVALID, CYCLES(3), CYCLES(3), INVALID, CYCLES(13), CYCLES(3), CYCLES(3), INVALID, CYCLES2(18,30),
-/*b0*/ CYCLES(10), CYCLES(10), CYCLES(6), CYCLES(13), CYCLES(6), CYCLES(6), CYCLES(3), CYCLES(3), INVALID, INVALID, CYCLES(6), CYCLES(13), CYCLES(7), CYCLES(7), CYCLES(3), CYCLES(3),
-
-/*c0*/ CYCLES(4), CYCLES(4), INVALID, INVALID, INVALID, INVALID, INVALID, CYCLES(3), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-/*d0*/ INVALID, CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), INVALID, CYCLES_MMX_MUL(1), INVALID, INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), INVALID, CYCLES_MMX_ANY(1),
-/*e0*/ INVALID, CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), INVALID, INVALID, CYCLES_MMX_MUL(1), INVALID, INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), INVALID, CYCLES_MMX_ANY(1),
-/*f0*/ INVALID, CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), INVALID, CYCLES_MMX_MUL(1), INVALID, INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), INVALID,
-};
-
-static uint32_t opcode_timings_shift[8] =
-{
- CYCLES(7), CYCLES(7), CYCLES(10), CYCLES(10), CYCLES(7), CYCLES(7), CYCLES(7), CYCLES(7)
-};
-static uint32_t opcode_timings_shift_mod3[8] =
-{
- CYCLES(3), CYCLES(3), CYCLES(9), CYCLES(9), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3)
-};
-
-static uint32_t opcode_timings_f6[8] =
-{
- CYCLES(2), INVALID, CYCLES(2), CYCLES(2), CYCLES(13), CYCLES(14), CYCLES(16), CYCLES(19)
-};
-static uint32_t opcode_timings_f6_mod3[8] =
-{
- CYCLES(1), INVALID, CYCLES(1), CYCLES(1), CYCLES(13), CYCLES(14), CYCLES(16), CYCLES(19)
-};
-static uint32_t opcode_timings_f7[8] =
-{
- CYCLES(2), INVALID, CYCLES(2), CYCLES(2), CYCLES(21), CYCLES2(22,38), CYCLES2(24,40), CYCLES2(27,43)
-};
-static uint32_t opcode_timings_f7_mod3[8] =
-{
- CYCLES(1), INVALID, CYCLES(1), CYCLES(1), CYCLES(21), CYCLES2(22,38), CYCLES2(24,40), CYCLES2(27,43)
-};
-static uint32_t opcode_timings_ff[8] =
-{
- CYCLES(2), CYCLES(2), CYCLES(5), CYCLES(0), CYCLES(5), CYCLES(0), CYCLES(5), INVALID
-};
-static uint32_t opcode_timings_ff_mod3[8] =
-{
- CYCLES(1), CYCLES(1), CYCLES(5), CYCLES(0), CYCLES(5), CYCLES(0), CYCLES(5), INVALID
-};
-
-static uint32_t opcode_timings_d8[8] =
-{
-/* FADDs FMULs FCOMs FCOMPs*/
- FPU_CYCLES(4,2,2), FPU_CYCLES(4,2,2), FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0),
-/* FSUBs FSUBRs FDIVs FDIVRs*/
- FPU_CYCLES(4,2,2), FPU_CYCLES(4,2,2), FPU_CYCLES(39,38,2), FPU_CYCLES(39,38,2)
-};
-static uint32_t opcode_timings_d8_mod3[8] =
-{
-/* FADD FMUL FCOM FCOMP*/
- FPU_CYCLES(4,2,2), FPU_CYCLES(4,2,2), FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0),
-/* FSUB FSUBR FDIV FDIVR*/
- FPU_CYCLES(4,2,2), FPU_CYCLES(4,2,2), FPU_CYCLES(39,38,2), FPU_CYCLES(39,38,2)
-};
-
-static uint32_t opcode_timings_d9[8] =
-{
-/* FLDs FSTs FSTPs*/
- FPU_CYCLES(2,0,0), INVALID, FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0),
-/* FLDENV FLDCW FSTENV FSTCW*/
- FPU_CYCLES(32,0,0), FPU_CYCLES(8,0,0), FPU_CYCLES(48,0,0), FPU_CYCLES(2,0,0)
-};
-static uint32_t opcode_timings_d9_mod3[64] =
-{
- /*FLD*/
- FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0),
- FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0),
- /*FXCH*/
- FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0),
- FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0),
- /*FNOP*/
- FPU_CYCLES(3,0,0), INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- /*FSTP*/
- FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0),
- FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0),
-/* opFCHS opFABS*/
- FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0), INVALID, INVALID,
-/* opFTST opFXAM*/
- FPU_CYCLES(2,0,0), FPU_CYCLES(21,4,0), INVALID, INVALID,
-/* opFLD1 opFLDL2T opFLDL2E opFLDPI*/
- FPU_CYCLES(2,0,0), FPU_CYCLES(5,2,2), FPU_CYCLES(5,2,2), FPU_CYCLES(5,2,2),
-/* opFLDEG2 opFLDLN2 opFLDZ*/
- FPU_CYCLES(5,2,2), FPU_CYCLES(5,2,2), FPU_CYCLES(2,0,0), INVALID,
-/* opF2XM1 opFYL2X opFPTAN opFPATAN*/
- FPU_CYCLES(53,2,2), FPU_CYCLES(103,2,2),FPU_CYCLES(120,36,0),FPU_CYCLES(112,2,2),
-/* opFDECSTP opFINCSTP,*/
- INVALID, INVALID, FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0),
-/* opFPREM opFSQRT opFSINCOS*/
- FPU_CYCLES(64,2,2), INVALID, FPU_CYCLES(70,69,2),FPU_CYCLES(89,2,2),
-/* opFRNDINT opFSCALE opFSIN opFCOS*/
- FPU_CYCLES(9,0,0), FPU_CYCLES(20,5,0), FPU_CYCLES(65,2,2), FPU_CYCLES(65,2,2)
-};
-
-static uint32_t opcode_timings_da[8] =
-{
-/* FIADDl FIMULl FICOMl FICOMPl*/
- FPU_CYCLES(6,2,2), FPU_CYCLES(6,2,2), FPU_CYCLES(4,0,0), FPU_CYCLES(4,0,0),
-/* FISUBl FISUBRl FIDIVl FIDIVRl*/
- FPU_CYCLES(6,2,2), FPU_CYCLES(6,2,2), FPU_CYCLES(42,38,2), FPU_CYCLES(42,38,2)
-};
-static uint32_t opcode_timings_da_mod3[8] =
-{
- INVALID, INVALID, INVALID, INVALID,
-/* FCOMPP*/
- INVALID, FPU_CYCLES(2,0,0), INVALID, INVALID
-};
-
-
-static uint32_t opcode_timings_db[8] =
-{
-/* FLDil FSTil FSTPil*/
- FPU_CYCLES(3,2,2), INVALID, FPU_CYCLES(6,0,0), FPU_CYCLES(6,0,0),
-/* FLDe FSTPe*/
- INVALID, FPU_CYCLES(3,0,0), INVALID, FPU_CYCLES(3,0,0)
-};
-static uint32_t opcode_timings_db_mod3[64] =
-{
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/* opFNOP opFCLEX opFINIT*/
- INVALID, FPU_CYCLES(2,0,0), FPU_CYCLES(7,0,0), FPU_CYCLES(17,0,0),
-/* opFNOP opFNOP*/
- FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0), INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-};
-
-static uint32_t opcode_timings_dc[8] =
-{
-/* FADDd FMULd FCOMd FCOMPd*/
- FPU_CYCLES(4,2,2), FPU_CYCLES(4,2,2), FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0),
-/* FSUBd FSUBRd FDIVd FDIVRd*/
- FPU_CYCLES(4,2,2), FPU_CYCLES(4,2,2), FPU_CYCLES(39,38,2), FPU_CYCLES(39,38,2)
-};
-static uint32_t opcode_timings_dc_mod3[8] =
-{
-/* opFADDr opFMULr*/
- FPU_CYCLES(4,2,2), FPU_CYCLES(4,2,2),INVALID, INVALID,
-/* opFSUBRr opFSUBr opFDIVRr opFDIVr*/
- FPU_CYCLES(4,2,2), FPU_CYCLES(4,2,2),FPU_CYCLES(39,38,2), FPU_CYCLES(39,38,2)
-};
-
-static uint32_t opcode_timings_dd[8] =
-{
-/* FLDd FSTd FSTPd*/
- FPU_CYCLES(2,0,0), INVALID, FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0),
-/* FRSTOR FSAVE FSTSW*/
- FPU_CYCLES(70,0,0), INVALID, FPU_CYCLES(127,0,0), FPU_CYCLES(6,0,0)
-};
-static uint32_t opcode_timings_dd_mod3[8] =
-{
-/* FFFREE FST FSTP*/
- FPU_CYCLES(2,0,0), INVALID, FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0),
-/* FUCOM FUCOMP*/
- FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0),INVALID, INVALID
-};
-
-static uint32_t opcode_timings_de[8] =
-{
-/* FIADDw FIMULw FICOMw FICOMPw*/
- FPU_CYCLES(6,2,2), FPU_CYCLES(6,2,2), FPU_CYCLES(4,0,0), FPU_CYCLES(4,0,0),
-/* FISUBw FISUBRw FIDIVw FIDIVRw*/
- FPU_CYCLES(6,2,2), FPU_CYCLES(6,2,2), FPU_CYCLES(42,38,2), FPU_CYCLES(42,38,2)
-};
-static uint32_t opcode_timings_de_mod3[8] =
-{
-/* FADDP FMULP FCOMPP*/
- FPU_CYCLES(4,2,2), FPU_CYCLES(4,2,2), INVALID, FPU_CYCLES(2,0,0),
-/* FSUBP FSUBRP FDIVP FDIVRP*/
- FPU_CYCLES(4,2,2), FPU_CYCLES(4,2,2), FPU_CYCLES(39,38,2), FPU_CYCLES(39,38,2)
-};
-
-static uint32_t opcode_timings_df[8] =
-{
-/* FILDiw FISTiw FISTPiw*/
- FPU_CYCLES(3,2,2), INVALID, FPU_CYCLES(6,0,0), FPU_CYCLES(6,0,0),
-/* FILDiq FBSTP FISTPiq*/
- INVALID, FPU_CYCLES(3,2,2), FPU_CYCLES(148,0,0), FPU_CYCLES(6,0,0)
-};
-static uint32_t opcode_timings_df_mod3[8] =
-{
- INVALID, INVALID, INVALID, INVALID,
-/* FSTSW AX*/
- FPU_CYCLES(6,0,0), INVALID, INVALID, INVALID
-};
-
-static uint32_t opcode_timings_8x[8] =
-{
- CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2)
-};
-static uint32_t opcode_timings_8x_mod3[8] =
-{
- CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2)
-};
-static uint32_t opcode_timings_81[8] =
-{
- CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2)
-};
-static uint32_t opcode_timings_81_mod3[8] =
-{
- CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2)
-};
-
-static int timing_count;
-static uint8_t last_prefix;
-static uint32_t regmask_modified;
-static int decode_delay, decode_delay_offset;
-static int fpu_latency;
-static int fpu_st_latency[8];
-
-
-static inline int COUNT(uint32_t c, int op_32)
-{
- if (c & CYCLES_FPU)
- return FPU_I_LATENCY(c);
- if (c & CYCLES_HAS_MULTI)
- {
- if (op_32 & 0x100)
- return (c >> 8) & 0xff;
- return c & 0xff;
- }
- return GET_CYCLES(c);
-}
-
-static int check_agi(uint64_t *deps, uint8_t opcode, uint32_t fetchdat, int op_32)
-{
- uint32_t addr_regmask = get_addr_regmask(deps[opcode], fetchdat, op_32);
-
- /*Instructions that use ESP implicitly (eg PUSH, POP, CALL etc) do not
- cause AGIs with each other, but do with instructions that use it explicitly*/
- if ((addr_regmask & REGMASK_IMPL_ESP) && (regmask_modified & (1 << REG_ESP)) && !(regmask_modified & REGMASK_IMPL_ESP))
- addr_regmask |= (1 << REG_ESP);
-
- return (regmask_modified & addr_regmask) & ~REGMASK_IMPL_ESP;
-}
-
-static int codegen_fpu_latencies(uint64_t deps, int reg)
-{
- int latency = fpu_latency;
-
- if ((deps & FPU_RW_ST0) && fpu_st_latency[0] && fpu_st_latency[0] > latency)
- latency = fpu_st_latency[0];
- if ((deps & FPU_RW_ST1) && fpu_st_latency[1] && fpu_st_latency[1] > latency)
- latency = fpu_st_latency[1];
- if ((deps & FPU_RW_STREG) && fpu_st_latency[reg] && fpu_st_latency[reg] > latency)
- latency = fpu_st_latency[reg];
-
- return latency;
-}
-
-#define SUB_AND_CLAMP(latency, count) \
- latency -= count; \
- if (latency < 0) \
- latency = 0
-
-static void codegen_fpu_latency_clock(int count)
-{
- SUB_AND_CLAMP(fpu_latency, count);
- SUB_AND_CLAMP(fpu_st_latency[0], count);
- SUB_AND_CLAMP(fpu_st_latency[1], count);
- SUB_AND_CLAMP(fpu_st_latency[2], count);
- SUB_AND_CLAMP(fpu_st_latency[3], count);
- SUB_AND_CLAMP(fpu_st_latency[4], count);
- SUB_AND_CLAMP(fpu_st_latency[5], count);
- SUB_AND_CLAMP(fpu_st_latency[6], count);
- SUB_AND_CLAMP(fpu_st_latency[7], count);
-}
-
-static void codegen_instruction(uint32_t *timings, uint64_t *deps, uint8_t opcode, uint32_t fetchdat, int decode_delay_offset, int op_32, int exec_delay)
-{
- int instr_cycles, latency = 0;
-
- if ((timings[opcode] & CYCLES_FPU) && !(deps[opcode] & FPU_FXCH))
- instr_cycles = latency = codegen_fpu_latencies(deps[opcode], fetchdat & 7);
- else
- instr_cycles = 0;
-
- if ((decode_delay + decode_delay_offset) > 0)
- codegen_fpu_latency_clock(decode_delay + decode_delay_offset + instr_cycles);
- else
- codegen_fpu_latency_clock(instr_cycles);
- instr_cycles += COUNT(timings[opcode], op_32);
- instr_cycles += exec_delay;
- if ((decode_delay + decode_delay_offset) > 0)
- codegen_block_cycles += instr_cycles + decode_delay + decode_delay_offset;
- else
- codegen_block_cycles += instr_cycles;
- decode_delay = (-instr_cycles) + 1;
-
- if (deps[opcode] & FPU_POP)
- {
- int c;
-
- for (c = 0; c < 7; c++)
- fpu_st_latency[c] = fpu_st_latency[c+1];
- fpu_st_latency[7] = 0;
- }
- if (deps[opcode] & FPU_POP2)
- {
- int c;
-
- for (c = 0; c < 6; c++)
- fpu_st_latency[c] = fpu_st_latency[c+2];
- fpu_st_latency[6] = fpu_st_latency[7] = 0;
- }
- if (timings[opcode] & CYCLES_FPU)
- {
- /* if (fpu_latency)
- fatal("Bad latency FPU\n");*/
- fpu_latency = FPU_F_LATENCY(timings[opcode]);
- }
-
- if (deps[opcode] & FPU_PUSH)
- {
- int c;
-
- for (c = 0; c < 7; c++)
- fpu_st_latency[c+1] = fpu_st_latency[c];
- fpu_st_latency[0] = 0;
- }
- if (deps[opcode] & FPU_WRITE_ST0)
- {
-/* if (fpu_st_latency[0])
- fatal("Bad latency ST0\n");*/
- fpu_st_latency[0] = FPU_RESULT_LATENCY(timings[opcode]);
- }
- if (deps[opcode] & FPU_WRITE_ST1)
- {
-/* if (fpu_st_latency[1])
- fatal("Bad latency ST1\n");*/
- fpu_st_latency[1] = FPU_RESULT_LATENCY(timings[opcode]);
- }
- if (deps[opcode] & FPU_WRITE_STREG)
- {
- int reg = fetchdat & 7;
- if (deps[opcode] & FPU_POP)
- reg--;
- if (reg >= 0 &&
- !(reg == 0 && (deps[opcode] & FPU_WRITE_ST0)) &&
- !(reg == 1 && (deps[opcode] & FPU_WRITE_ST1)))
- {
-/* if (fpu_st_latency[reg])
- fatal("Bad latency STREG %i %08x %i %016llx %02x\n",fpu_st_latency[reg], fetchdat, reg, timings[opcode], opcode);*/
- fpu_st_latency[reg] = FPU_RESULT_LATENCY(timings[opcode]);
- }
- }
-}
-
-static void codegen_timing_cyrixiii_block_start()
-{
- regmask_modified = 0;
- decode_delay = decode_delay_offset = 0;
-}
-
-static void codegen_timing_cyrixiii_start()
-{
- timing_count = 0;
- last_prefix = 0;
-}
-
-static void codegen_timing_cyrixiii_prefix(uint8_t prefix, uint32_t fetchdat)
-{
- if (prefix == 0x0f)
- {
- /*0fh prefix is 'free'*/
- last_prefix = prefix;
- return;
- }
- /*On C3 all prefixes take 1 cycle to decode. Decode may be shadowed
- by execution of previous instructions*/
- decode_delay_offset++;
- last_prefix = prefix;
-}
-
-static void codegen_timing_cyrixiii_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t op_pc)
-{
- uint32_t *timings;
- uint64_t *deps;
- int mod3 = ((fetchdat & 0xc0) == 0xc0);
- int bit8 = !(opcode & 1);
- int agi_stall = 0;
-
- switch (last_prefix)
- {
- case 0x0f:
- timings = mod3 ? opcode_timings_0f_mod3 : opcode_timings_0f;
- deps = mod3 ? opcode_deps_0f_mod3 : opcode_deps_0f;
-// pclog("timings 0f\n");
- break;
-
- case 0xd8:
- timings = mod3 ? opcode_timings_d8_mod3 : opcode_timings_d8;
- deps = mod3 ? opcode_deps_d8_mod3 : opcode_deps_d8;
- opcode = (opcode >> 3) & 7;
-// pclog("timings d8\n");
- break;
- case 0xd9:
- timings = mod3 ? opcode_timings_d9_mod3 : opcode_timings_d9;
- deps = mod3 ? opcode_deps_d9_mod3 : opcode_deps_d9;
- opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
-// pclog("timings d9\n");
- break;
- case 0xda:
- timings = mod3 ? opcode_timings_da_mod3 : opcode_timings_da;
- deps = mod3 ? opcode_deps_da_mod3 : opcode_deps_da;
- opcode = (opcode >> 3) & 7;
-// pclog("timings da\n");
- break;
- case 0xdb:
- timings = mod3 ? opcode_timings_db_mod3 : opcode_timings_db;
- deps = mod3 ? opcode_deps_db_mod3 : opcode_deps_db;
- opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
-// pclog("timings db\n");
- break;
- case 0xdc:
- timings = mod3 ? opcode_timings_dc_mod3 : opcode_timings_dc;
- deps = mod3 ? opcode_deps_dc_mod3 : opcode_deps_dc;
- opcode = (opcode >> 3) & 7;
-// pclog("timings dc\n");
- break;
- case 0xdd:
- timings = mod3 ? opcode_timings_dd_mod3 : opcode_timings_dd;
- deps = mod3 ? opcode_deps_dd_mod3 : opcode_deps_dd;
- opcode = (opcode >> 3) & 7;
-// pclog("timings dd\n");
- break;
- case 0xde:
- timings = mod3 ? opcode_timings_de_mod3 : opcode_timings_de;
- deps = mod3 ? opcode_deps_de_mod3 : opcode_deps_de;
- opcode = (opcode >> 3) & 7;
-// pclog("timings de\n");
- break;
- case 0xdf:
- timings = mod3 ? opcode_timings_df_mod3 : opcode_timings_df;
- deps = mod3 ? opcode_deps_df_mod3 : opcode_deps_df;
- opcode = (opcode >> 3) & 7;
-// pclog("timings df\n");
- break;
-
- default:
- switch (opcode)
- {
- case 0x80: case 0x82: case 0x83:
- timings = mod3 ? opcode_timings_8x_mod3 : opcode_timings_8x;
- deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x_mod3;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings 80 %p %p %p\n", (void *)timings, (void *)opcode_timings_mod3, (void *)opcode_timings_8x);
- break;
- case 0x81:
- timings = mod3 ? opcode_timings_81_mod3 : opcode_timings_81;
- deps = mod3 ? opcode_deps_81_mod3 : opcode_deps_81;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings 80 %p %p %p\n", (void *)timings, (void *)opcode_timings_mod3, (void *)opcode_timings_8x);
- break;
-
- case 0xc0: case 0xc1: case 0xd0: case 0xd1: case 0xd2: case 0xd3:
- timings = mod3 ? opcode_timings_shift_mod3 : opcode_timings_shift;
- deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings c0\n");
- break;
-
- case 0xf6:
- timings = mod3 ? opcode_timings_f6_mod3 : opcode_timings_f6;
- deps = mod3 ? opcode_deps_f6_mod3 : opcode_deps_f6;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings f6\n");
- break;
- case 0xf7:
- timings = mod3 ? opcode_timings_f7_mod3 : opcode_timings_f7;
- deps = mod3 ? opcode_deps_f7_mod3 : opcode_deps_f7;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings f7\n");
- break;
- case 0xff:
- timings = mod3 ? opcode_timings_ff_mod3 : opcode_timings_ff;
- deps = mod3 ? opcode_deps_ff_mod3 : opcode_deps_ff;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings ff\n");
- break;
-
- default:
- timings = mod3 ? opcode_timings_mod3 : opcode_timings;
- deps = mod3 ? opcode_deps_mod3 : opcode_deps;
-// pclog("timings normal\n");
- break;
- }
- }
-
- if (check_agi(deps, opcode, fetchdat, op_32))
- agi_stall = 1;
- codegen_instruction(timings, deps, opcode, fetchdat, decode_delay_offset, op_32, agi_stall);
- decode_delay_offset = 0;
- regmask_modified = get_dstdep_mask(deps[opcode], fetchdat, bit8);
-}
-
-static void codegen_timing_cyrixiii_block_end()
-{
-}
-
-int codegen_timing_cyrixiii_jump_cycles()
-{
- return 0;
-}
-
-codegen_timing_t codegen_timing_cyrixiii =
-{
- codegen_timing_cyrixiii_start,
- codegen_timing_cyrixiii_prefix,
- codegen_timing_cyrixiii_opcode,
- codegen_timing_cyrixiii_block_start,
- codegen_timing_cyrixiii_block_end,
- codegen_timing_cyrixiii_jump_cycles
-};
diff --git a/src/codegen_timing_k6.c b/src/codegen_timing_k6.c
deleted file mode 100644
index 5d5aa8e..0000000
--- a/src/codegen_timing_k6.c
+++ /dev/null
@@ -1,2365 +0,0 @@
-/*Most of the vector instructions here are a total guess.
- Some of the timings are based on http://users.atw.hu/instlatx64/AuthenticAMD0000562_K6_InstLatX86.txt*/
-#include "ibm.h"
-#include "cpu.h"
-#include "model.h"
-#include "x86.h"
-#include "x86_ops.h"
-#include "x87.h"
-#include "386_common.h"
-#include "mem.h"
-#include "codegen.h"
-#include "codegen_ops.h"
-#include "codegen_timing_common.h"
-
-typedef enum uop_type_t
-{
- UOP_ALU = 0, /*Executes in Integer X or Y units*/
- UOP_ALUX, /*Executes in Integer X unit*/
- UOP_LOAD, /*Executes in Load unit*/
- UOP_STORE, /*Executes in Store unit*/
- UOP_FLOAD, /*Executes in Load unit*/
- UOP_FSTORE, /*Executes in Store unit*/
- UOP_MLOAD, /*Executes in Load unit*/
- UOP_MSTORE, /*Executes in Store unit*/
- UOP_FLOAT, /*Executes in Floating Point unit*/
- UOP_MEU, /*Executes in Multimedia unit*/
- UOP_MEU_SHIFT, /*Executes in Multimedia unit or ALU X/Y. Uses MMX shifter*/
- UOP_MEU_MUL, /*Executes in Multimedia unit or ALU X/Y. Uses MMX/3DNow multiplier*/
- UOP_MEU_3DN, /*Executes in Multimedia unit or ALU X/Y. Uses 3DNow ALU*/
- UOP_BRANCH, /*Executes in Branch unit*/
- UOP_LIMM /*Does not require an execution unit*/
-} uop_type_t;
-
-typedef enum decode_type_t
-{
- DECODE_SHORT,
- DECODE_LONG,
- DECODE_VECTOR
-} decode_type_t;
-
-#define MAX_UOPS 10
-
-typedef struct risc86_uop_t
-{
- uop_type_t type;
- int throughput;
- int latency;
-} risc86_uop_t;
-
-typedef struct risc86_instruction_t
-{
- int nr_uops;
- decode_type_t decode_type;
- risc86_uop_t uop[MAX_UOPS];
-} risc86_instruction_t;
-
-static const risc86_instruction_t alu_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t alux_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t load_alu_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t load_alux_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALUX, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t alu_store_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_LONG,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STORE, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t alux_store_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_LONG,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STORE, .throughput = 1, .latency = 1}
-};
-
-static const risc86_instruction_t branch_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_BRANCH, .throughput = 1, .latency = 1}
-};
-
-static const risc86_instruction_t limm_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_LIMM, .throughput = 1, .latency = 1}
-};
-
-static const risc86_instruction_t load_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2}
-};
-
-static const risc86_instruction_t store_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_STORE, .throughput = 1, .latency = 1}
-};
-
-
-static const risc86_instruction_t bswap_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_LONG,
- .uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t leave_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_LONG,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t lods_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_LONG,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t loop_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_BRANCH, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t mov_reg_seg_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_LONG,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
-};
-static const risc86_instruction_t movs_op =
-{
- .nr_uops = 4,
- .decode_type = DECODE_LONG,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t pop_reg_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t pop_mem_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_LONG,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t push_imm_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_LONG,
- .uop[0] = {.type = UOP_STORE, .throughput = 1, .latency = 2},
-};
-static const risc86_instruction_t push_mem_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_LONG,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_STORE, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t push_seg_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_LONG,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_STORE, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t stos_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_LONG,
- .uop[1] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t test_reg_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_LONG,
- .uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t test_reg_b_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_LONG,
- .uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t test_mem_imm_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_LONG,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t test_mem_imm_b_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_LONG,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALUX, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t xchg_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_LONG,
- .uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-
-static const risc86_instruction_t m3dn_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_MEU_3DN, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t mmx_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_MEU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t mmx_mul_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_MEU_MUL, .throughput = 1, .latency = 2}
-};
-static const risc86_instruction_t mmx_shift_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_MEU_SHIFT, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t load_3dn_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_MEU_3DN, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t load_mmx_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_MEU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t load_mmx_mul_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_MEU_MUL, .throughput = 1, .latency = 2}
-};
-static const risc86_instruction_t load_mmx_shift_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_MEU_SHIFT, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t mload_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_MLOAD, .throughput = 1, .latency = 2}
-};
-
-static const risc86_instruction_t mstore_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_MSTORE, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t pmul_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_MEU_MUL, .throughput = 1, .latency = 2}
-};
-static const risc86_instruction_t pmul_mem_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_MEU_MUL, .throughput = 1, .latency = 2}
-};
-
-static const risc86_instruction_t float_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 2, .latency = 2}
-};
-static const risc86_instruction_t load_float_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_FLOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_FLOAT, .throughput = 2, .latency = 2}
-};
-static const risc86_instruction_t fstore_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_FSTORE, .throughput = 1, .latency = 1}
-};
-
-static const risc86_instruction_t fdiv_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 40, .latency = 40}
-};
-static const risc86_instruction_t fdiv_mem_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_FLOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_FLOAT, .throughput = 40, .latency = 40}
-};
-static const risc86_instruction_t fsin_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 62, .latency = 62}
-};
-static const risc86_instruction_t fsqrt_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_SHORT,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 41, .latency = 41}
-};
-
-static const risc86_instruction_t vector_fldcw_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 8, .latency = 8}
-};
-static const risc86_instruction_t vector_float_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 2, .latency = 2}
-};
-static const risc86_instruction_t vector_float_l_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 50, .latency = 50}
-};
-static const risc86_instruction_t vector_flde_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_FLOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_FLOAD, .throughput = 1, .latency = 2},
- .uop[2] = {.type = UOP_FLOAT, .throughput = 2, .latency = 2}
-};
-static const risc86_instruction_t vector_fste_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 2, .latency = 2},
- .uop[1] = {.type = UOP_FSTORE, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_FSTORE, .throughput = 1, .latency = 1}
-};
-
-static const risc86_instruction_t vector_alu1_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_alu2_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_alu3_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_alu6_op =
-{
- .nr_uops = 6,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_alux1_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_alux3_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALUX, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_alux6_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_ALUX, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_alu_store_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STORE, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_alux_store_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STORE, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_arpl_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALU, .throughput = 3, .latency = 3},
- .uop[1] = {.type = UOP_ALU, .throughput = 3, .latency = 3}
-};
-static const risc86_instruction_t vector_bound_op =
-{
- .nr_uops = 4,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[2] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_bsx_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALU, .throughput = 10, .latency = 10}
-};
-static const risc86_instruction_t vector_call_far_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALU, .throughput = 3, .latency = 3},
- .uop[1] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_BRANCH, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_cli_sti_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALU, .throughput = 7, .latency = 7}
-};
-static const risc86_instruction_t vector_cmps_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_cmpsb_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_cmpxchg_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
-};
-static const risc86_instruction_t vector_cmpxchg_b_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
-};
-static const risc86_instruction_t vector_cpuid_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALU, .throughput = 22, .latency = 22}
-};
-static const risc86_instruction_t vector_div16_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALUX, .throughput = 10, .latency = 10}
-};
-static const risc86_instruction_t vector_div16_mem_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALUX, .throughput = 10, .latency = 10}
-};
-static const risc86_instruction_t vector_div32_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALUX, .throughput = 18, .latency = 18}
-};
-static const risc86_instruction_t vector_div32_mem_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALUX, .throughput = 18, .latency = 18}
-};
-static const risc86_instruction_t vector_emms_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALU, .throughput = 25, .latency = 25}
-};
-static const risc86_instruction_t vector_enter_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_STORE, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU, .throughput = 10, .latency = 10}
-};
-static const risc86_instruction_t vector_femms_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALU, .throughput = 6, .latency = 6}
-};
-static const risc86_instruction_t vector_in_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 10, .latency = 11}
-};
-static const risc86_instruction_t vector_ins_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 10, .latency = 11},
- .uop[1] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_int_op =
-{
- .nr_uops = 5,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALU, .throughput = 20, .latency = 20},
- .uop[1] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_BRANCH, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_iret_op =
-{
- .nr_uops = 5,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[2] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[3] = {.type = UOP_ALU, .throughput = 20, .latency = 20},
- .uop[4] = {.type = UOP_BRANCH, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_invd_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALU, .throughput = 1000, .latency = 1000}
-};
-static const risc86_instruction_t vector_jmp_far_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALU, .throughput = 3, .latency = 3},
- .uop[1] = {.type = UOP_BRANCH, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_load_alu_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_load_alux_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALUX, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_loop_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_BRANCH, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_lss_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[2] = {.type = UOP_ALU, .throughput = 3, .latency = 3}
-};
-static const risc86_instruction_t vector_mov_mem_seg_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_STORE, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_mov_seg_mem_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU, .throughput = 3, .latency = 3}
-};
-static const risc86_instruction_t vector_mov_seg_reg_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALU, .throughput = 3, .latency = 3}
-};
-static const risc86_instruction_t vector_mul_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALUX, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_mul_mem_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALUX, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_mul64_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALUX, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_mul64_mem_op =
-{
- .nr_uops = 4,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALUX, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_out_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_STORE, .throughput = 10, .latency = 10}
-};
-static const risc86_instruction_t vector_outs_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_STORE, .throughput = 10, .latency = 10},
- .uop[2] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_pusha_op =
-{
- .nr_uops = 8,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
- .uop[6] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
- .uop[7] = {.type = UOP_STORE, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_popa_op =
-{
- .nr_uops = 8,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[6] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[7] = {.type = UOP_LOAD, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_popf_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALUX, .throughput = 17, .latency = 17}
-};
-static const risc86_instruction_t vector_push_mem_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_STORE, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_pushf_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_STORE, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_ret_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_BRANCH, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_retf_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU, .throughput = 3, .latency = 3},
- .uop[2] = {.type = UOP_BRANCH, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_scas_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_scasb_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_setcc_mem_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_FSTORE, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_setcc_reg_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALUX, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_test_mem_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_test_mem_b_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALUX, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_xchg_mem_op =
-{
- .nr_uops = 3,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_STORE, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU, .throughput = 1, .latency = 1}
-};
-static const risc86_instruction_t vector_xlat_op =
-{
- .nr_uops = 2,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALU, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_LOAD, .throughput = 1, .latency = 2}
-};
-static const risc86_instruction_t vector_wbinvd_op =
-{
- .nr_uops = 1,
- .decode_type = DECODE_VECTOR,
- .uop[0] = {.type = UOP_ALU, .throughput = 10000, .latency = 10000}
-};
-
-#define INVALID NULL
-
-static const risc86_instruction_t *opcode_timings[256] =
-{
-/* ADD ADD ADD ADD*/
-/*00*/ &alux_store_op, &alu_store_op, &load_alux_op, &load_alu_op,
-/* ADD ADD PUSH ES POP ES*/
- &alux_op, &alu_op, &push_seg_op, &vector_mov_seg_mem_op,
-/* OR OR OR OR*/
- &alux_store_op, &alu_store_op, &load_alux_op, &load_alu_op,
-/* OR OR PUSH CS */
- &alux_op, &alu_op, &push_seg_op, INVALID,
-
-/* ADC ADC ADC ADC*/
-/*10*/ &vector_alux_store_op, &vector_alu_store_op, &vector_load_alux_op, &vector_load_alu_op,
-/* ADC ADC PUSH SS POP SS*/
- &vector_alux1_op, &vector_alu1_op, &push_seg_op, &vector_mov_seg_mem_op,
-/* SBB SBB SBB SBB*/
-/*10*/ &vector_alux_store_op, &vector_alu_store_op, &vector_load_alux_op, &vector_load_alu_op,
-/* SBB SBB PUSH DS POP DS*/
- &vector_alux1_op, &vector_alu1_op, &push_seg_op, &vector_mov_seg_mem_op,
-
-/* AND AND AND AND*/
-/*20*/ &alux_store_op, &alu_store_op, &load_alux_op, &load_alu_op,
-/* AND AND DAA*/
- &alux_op, &alu_op, INVALID, &vector_alux1_op,
-/* SUB SUB SUB SUB*/
- &alux_store_op, &alu_store_op, &load_alux_op, &load_alu_op,
-/* SUB SUB DAS*/
- &alux_op, &alu_op, INVALID, &vector_alux1_op,
-
-/* XOR XOR XOR XOR*/
-/*30*/ &alux_store_op, &alu_store_op, &load_alux_op, &load_alu_op,
-/* XOR XOR AAA*/
- &alux_op, &alu_op, INVALID, &vector_alux6_op,
-/* CMP CMP CMP CMP*/
- &load_alux_op, &load_alu_op, &load_alux_op, &load_alu_op,
-/* CMP CMP AAS*/
- &alux_op, &alu_op, INVALID, &vector_alux6_op,
-
-/* INC EAX INC ECX INC EDX INC EBX*/
-/*40*/ &alu_op, &alu_op, &alu_op, &alu_op,
-/* INC ESP INC EBP INC ESI INC EDI*/
- &alu_op, &alu_op, &alu_op, &alu_op,
-/* DEC EAX DEC ECX DEC EDX DEC EBX*/
- &alu_op, &alu_op, &alu_op, &alu_op,
-/* DEC ESP DEC EBP DEC ESI DEC EDI*/
- &alu_op, &alu_op, &alu_op, &alu_op,
-
-/* PUSH EAX PUSH ECX PUSH EDX PUSH EBX*/
-/*50*/ &store_op, &store_op, &store_op, &store_op,
-/* PUSH ESP PUSH EBP PUSH ESI PUSH EDI*/
- &store_op, &store_op, &store_op, &store_op,
-/* POP EAX POP ECX POP EDX POP EBX*/
- &pop_reg_op, &pop_reg_op, &pop_reg_op, &pop_reg_op,
-/* POP ESP POP EBP POP ESI POP EDI*/
- &pop_reg_op, &pop_reg_op, &pop_reg_op, &pop_reg_op,
-
-/* PUSHA POPA BOUND ARPL*/
-/*60*/ &vector_pusha_op, &vector_popa_op, &vector_bound_op, &vector_arpl_op,
- INVALID, INVALID, INVALID, INVALID,
-/* PUSH imm IMUL PUSH imm IMUL*/
- &push_imm_op, &vector_mul_op, &push_imm_op, &vector_mul_op,
-/* INSB INSW OUTSB OUTSW*/
- &vector_ins_op, &vector_ins_op, &vector_outs_op, &vector_outs_op,
-
-/* Jxx*/
-/*70*/ &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
-
-/*80*/ INVALID, INVALID, INVALID, INVALID,
-/* TEST TEST XCHG XCHG*/
- &vector_test_mem_b_op, &vector_test_mem_op, &vector_xchg_mem_op, &vector_xchg_mem_op,
-/* MOV MOV MOV MOV*/
- &store_op, &store_op, &load_op, &load_op,
-/* MOV from seg LEA MOV to seg POP*/
- &vector_mov_mem_seg_op, &store_op, &vector_mov_seg_mem_op, &pop_mem_op,
-
-/* NOP XCHG XCHG XCHG*/
-/*90*/ &limm_op, &xchg_op, &xchg_op, &xchg_op,
-/* XCHG XCHG XCHG XCHG*/
- &xchg_op, &xchg_op, &xchg_op, &xchg_op,
-/* CBW CWD CALL far WAIT*/
- &vector_alu1_op, &vector_alu1_op, &vector_call_far_op, &limm_op,
-/* PUSHF POPF SAHF LAHF*/
- &vector_pushf_op, &vector_popf_op, &vector_alux1_op, &vector_alux1_op,
-
-/* MOV MOV MOV MOV*/
-/*a0*/ &load_op, &load_op, &store_op, &store_op,
-/* MOVSB MOVSW CMPSB CMPSW*/
- &movs_op, &movs_op, &vector_cmpsb_op, &vector_cmps_op,
-/* TEST TEST STOSB STOSW*/
- &test_reg_b_op, &test_reg_op, &stos_op, &stos_op,
-/* LODSB LODSW SCASB SCASW*/
- &lods_op, &lods_op, &vector_scasb_op, &vector_scas_op,
-
-/* MOV*/
-/*b0*/ &limm_op, &limm_op, &limm_op, &limm_op,
- &limm_op, &limm_op, &limm_op, &limm_op,
- &limm_op, &limm_op, &limm_op, &limm_op,
- &limm_op, &limm_op, &limm_op, &limm_op,
-
-/* RET imm RET*/
-/*c0*/ INVALID, INVALID, &vector_ret_op, &vector_ret_op,
-/* LES LDS MOV MOV*/
- &vector_lss_op, &vector_lss_op, &store_op, &store_op,
-/* ENTER LEAVE RETF RETF*/
- &vector_enter_op, &leave_op, &vector_retf_op, &vector_retf_op,
-/* INT3 INT INTO IRET*/
- &vector_int_op, &vector_int_op, &vector_int_op, &vector_iret_op,
-
-
-/*d0*/ INVALID, INVALID, INVALID, INVALID,
-/* AAM AAD SETALC XLAT*/
- &vector_alux6_op, &vector_alux3_op, &vector_alux1_op, &vector_xlat_op,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-/* LOOPNE LOOPE LOOP JCXZ*/
-/*e0*/ &vector_loop_op, &vector_loop_op, &loop_op, &vector_loop_op,
-/* IN AL IN AX OUT_AL OUT_AX*/
- &vector_in_op, &vector_in_op, &vector_out_op, &vector_out_op,
-/* CALL JMP JMP JMP*/
- &store_op, &branch_op, &vector_jmp_far_op, &branch_op,
-/* IN AL IN AX OUT_AL OUT_AX*/
- &vector_in_op, &vector_in_op, &vector_out_op, &vector_out_op,
-
-/* REPNE REPE*/
-/*f0*/ INVALID, INVALID, INVALID, INVALID,
-/* HLT CMC*/
- &vector_alux1_op, &vector_alu2_op, INVALID, INVALID,
-/* CLC STC CLI STI*/
- &vector_alu1_op, &vector_alu1_op, &vector_cli_sti_op, &vector_cli_sti_op,
-/* CLD STD INCDEC*/
- &vector_alu1_op, &vector_alu1_op, &alux_store_op, INVALID
-};
-
-static const risc86_instruction_t *opcode_timings_mod3[256] =
-{
-/* ADD ADD ADD ADD*/
-/*00*/ &alux_op, &alu_op, &alux_op, &alu_op,
-/* ADD ADD PUSH ES POP ES*/
- &alux_op, &alu_op, &push_seg_op, &vector_mov_seg_mem_op,
-/* OR OR OR OR*/
- &alux_op, &alu_op, &alux_op, &alu_op,
-/* OR OR PUSH CS */
- &alux_op, &alu_op, &push_seg_op, INVALID,
-
-/* ADC ADC ADC ADC*/
-/*10*/ &vector_alux1_op, &vector_alu1_op, &vector_alux1_op, &vector_alu1_op,
-/* ADC ADC PUSH SS POP SS*/
- &vector_alux1_op, &vector_alu1_op, &push_seg_op, &vector_mov_seg_mem_op,
-/* SBB SBB SBB SBB*/
- &vector_alux1_op, &vector_alu1_op, &vector_alux1_op, &vector_alu1_op,
-/* SBB SBB PUSH DS POP DS*/
- &vector_alux1_op, &vector_alu1_op, &push_seg_op, &vector_mov_seg_mem_op,
-
-/* AND AND AND AND*/
-/*20*/ &alux_op, &alu_op, &alux_op, &alu_op,
-/* AND AND DAA*/
- &alux_op, &alu_op, INVALID, &vector_alux1_op,
-/* SUB SUB SUB SUB*/
- &alux_op, &alu_op, &alux_op, &alu_op,
-/* SUB SUB DAS*/
- &alux_op, &alu_op, INVALID, &vector_alux1_op,
-
-/* XOR XOR XOR XOR*/
-/*30*/ &alux_op, &alu_op, &alux_op, &alu_op,
-/* XOR XOR AAA*/
- &alux_op, &alu_op, INVALID, &vector_alux6_op,
-/* CMP CMP CMP CMP*/
- &alux_op, &alu_op, &alux_op, &alu_op,
-/* CMP CMP AAS*/
- &alux_op, &alu_op, INVALID, &vector_alux6_op,
-
-/* INC EAX INC ECX INC EDX INC EBX*/
-/*40*/ &alu_op, &alu_op, &alu_op, &alu_op,
-/* INC ESP INC EBP INC ESI INC EDI*/
- &alu_op, &alu_op, &alu_op, &alu_op,
-/* DEC EAX DEC ECX DEC EDX DEC EBX*/
- &alu_op, &alu_op, &alu_op, &alu_op,
-/* DEC ESP DEC EBP DEC ESI DEC EDI*/
- &alu_op, &alu_op, &alu_op, &alu_op,
-
-/* PUSH EAX PUSH ECX PUSH EDX PUSH EBX*/
-/*50*/ &store_op, &store_op, &store_op, &store_op,
-/* PUSH ESP PUSH EBP PUSH ESI PUSH EDI*/
- &store_op, &store_op, &store_op, &store_op,
-/* POP EAX POP ECX POP EDX POP EBX*/
- &pop_reg_op, &pop_reg_op, &pop_reg_op, &pop_reg_op,
-/* POP ESP POP EBP POP ESI POP EDI*/
- &pop_reg_op, &pop_reg_op, &pop_reg_op, &pop_reg_op,
-
-/* PUSHA POPA BOUND ARPL*/
-/*60*/ &vector_pusha_op, &vector_popa_op, &vector_bound_op, &vector_arpl_op,
- INVALID, INVALID, INVALID, INVALID,
-/* PUSH imm IMUL PUSH imm IMUL*/
- &push_imm_op, &vector_mul_op, &push_imm_op, &vector_mul_op,
-/* INSB INSW OUTSB OUTSW*/
- &vector_ins_op, &vector_ins_op, &vector_outs_op, &vector_outs_op,
-
-/* Jxx*/
-/*70*/ &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
-
-/*80*/ INVALID, INVALID, INVALID, INVALID,
-/* TEST TEST XCHG XCHG*/
- &vector_alu1_op, &vector_alu1_op, &vector_alu3_op, &vector_alu3_op,
-/* MOV MOV MOV MOV*/
- &store_op, &store_op, &load_op, &load_op,
-/* MOV from seg LEA MOV to seg POP*/
- &mov_reg_seg_op, &store_op, &vector_mov_seg_reg_op, &pop_reg_op,
-
-/* NOP XCHG XCHG XCHG*/
-/*90*/ &limm_op, &xchg_op, &xchg_op, &xchg_op,
-/* XCHG XCHG XCHG XCHG*/
- &xchg_op, &xchg_op, &xchg_op, &xchg_op,
-/* CBW CWD CALL far WAIT*/
- &vector_alu1_op, &vector_alu1_op, &vector_call_far_op, &limm_op,
-/* PUSHF POPF SAHF LAHF*/
- &vector_pushf_op, &vector_popf_op, &vector_alux1_op, &vector_alux1_op,
-
-/* MOV MOV MOV MOV*/
-/*a0*/ &load_op, &load_op, &store_op, &store_op,
-/* MOVSB MOVSW CMPSB CMPSW*/
- &movs_op, &movs_op, &vector_cmpsb_op, &vector_cmps_op,
-/* TEST TEST STOSB STOSW*/
- &test_reg_b_op, &test_reg_op, &stos_op, &stos_op,
-/* LODSB LODSW SCASB SCASW*/
- &lods_op, &lods_op, &vector_scasb_op, &vector_scas_op,
-
-/* MOV*/
-/*b0*/ &limm_op, &limm_op, &limm_op, &limm_op,
- &limm_op, &limm_op, &limm_op, &limm_op,
- &limm_op, &limm_op, &limm_op, &limm_op,
- &limm_op, &limm_op, &limm_op, &limm_op,
-
-/* RET imm RET*/
-/*c0*/ INVALID, INVALID, &vector_ret_op, &vector_ret_op,
-/* LES LDS MOV MOV*/
- &vector_lss_op, &vector_lss_op, &store_op, &store_op,
-/* ENTER LEAVE RETF RETF*/
- &vector_enter_op, &leave_op, &vector_retf_op, &vector_retf_op,
-/* INT3 INT INTO IRET*/
- &vector_int_op, &vector_int_op, &vector_int_op, &vector_iret_op,
-
-
-/*d0*/ INVALID, INVALID, INVALID, INVALID,
-/* AAM AAD SETALC XLAT*/
- &vector_alux6_op, &vector_alux3_op, &vector_alux1_op, &vector_xlat_op,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-/* LOOPNE LOOPE LOOP JCXZ*/
-/*e0*/ &vector_loop_op, &vector_loop_op, &loop_op, &vector_loop_op,
-/* IN AL IN AX OUT_AL OUT_AX*/
- &vector_in_op, &vector_in_op, &vector_out_op, &vector_out_op,
-/* CALL JMP JMP JMP*/
- &store_op, &branch_op, &vector_jmp_far_op, &branch_op,
-/* IN AL IN AX OUT_AL OUT_AX*/
- &vector_in_op, &vector_in_op, &vector_out_op, &vector_out_op,
-
-/* REPNE REPE*/
-/*f0*/ INVALID, INVALID, INVALID, INVALID,
-/* HLT CMC*/
- &vector_alux1_op, &vector_alu2_op, INVALID, INVALID,
-/* CLC STC CLI STI*/
- &vector_alu1_op, &vector_alu1_op, &vector_cli_sti_op, &vector_cli_sti_op,
-/* CLD STD INCDEC*/
- &vector_alu1_op, &vector_alu1_op, &vector_alux1_op, INVALID
-};
-
-static const risc86_instruction_t *opcode_timings_0f[256] =
-{
-/*00*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, &vector_alu6_op,
- INVALID, &vector_alu6_op, &vector_alu6_op, INVALID,
- &vector_invd_op, &vector_wbinvd_op, INVALID, INVALID,
- INVALID, &load_op, &vector_femms_op, &load_3dn_op,
-
-/*10*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*20*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, &vector_alu6_op,
- &vector_alu6_op, &vector_alu6_op, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*30*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*40*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*50*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*60*/ &load_mmx_op, &load_mmx_op, &load_mmx_op, &load_mmx_op,
- &load_mmx_op, &load_mmx_op, &load_mmx_op, &load_mmx_op,
- &load_mmx_op, &load_mmx_op, &load_mmx_op, &load_mmx_op,
- INVALID, INVALID, &mload_op, &mload_op,
-
-/*70*/ INVALID, &load_mmx_shift_op, &load_mmx_shift_op, &load_mmx_shift_op,
- &load_mmx_op, &load_mmx_op, &load_mmx_op, &vector_emms_op,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, &mstore_op, &mstore_op,
-
-/*80*/ &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
-
-/*90*/ &vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op,
- &vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op,
- &vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op,
- &vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op, &vector_setcc_reg_op,
-
-/*a0*/ &push_seg_op, &vector_mov_seg_mem_op, &vector_cpuid_op, &vector_load_alu_op,
- &vector_alu_store_op, &vector_alu_store_op, INVALID, INVALID,
- &push_seg_op, &vector_mov_seg_mem_op, INVALID, &vector_load_alu_op,
- &vector_alu_store_op, &vector_alu_store_op, INVALID, &vector_mul_op,
-
-/*b0*/ &vector_cmpxchg_b_op, &vector_cmpxchg_op, &vector_lss_op, &vector_load_alu_op,
- &vector_lss_op, &vector_lss_op, &load_alux_op, &load_alu_op,
- INVALID, INVALID, &vector_load_alu_op, &vector_load_alu_op,
- &vector_bsx_op, &vector_bsx_op, &load_alux_op, &load_alu_op,
-
-/*c0*/ &vector_alux_store_op, &vector_alu_store_op, INVALID, INVALID,
- INVALID, INVALID, INVALID, &vector_cmpxchg_op,
- &bswap_op, &bswap_op, &bswap_op, &bswap_op,
- &bswap_op, &bswap_op, &bswap_op, &bswap_op,
-
-/*d0*/ INVALID, &load_mmx_shift_op, &load_mmx_shift_op, &load_mmx_shift_op,
- INVALID, &load_mmx_mul_op, INVALID, INVALID,
- &load_mmx_op, &load_mmx_op, INVALID, &load_mmx_op,
- &load_mmx_op, &load_mmx_op, INVALID, &load_mmx_op,
-
-/*e0*/ &load_mmx_op, &load_mmx_shift_op, &load_mmx_shift_op, INVALID,
- INVALID, &pmul_mem_op, INVALID, INVALID,
- &load_mmx_op, &load_mmx_op, INVALID, &load_mmx_op,
- &load_mmx_op, &load_mmx_op, INVALID, &load_mmx_op,
-
-/*f0*/ INVALID, &load_mmx_shift_op, &load_mmx_shift_op, &load_mmx_shift_op,
- INVALID, &pmul_mem_op, INVALID, INVALID,
- &load_mmx_op, &load_mmx_op, &load_mmx_op, INVALID,
- &load_mmx_op, &load_mmx_op, &load_mmx_op, INVALID,
-};
-static const risc86_instruction_t *opcode_timings_0f_mod3[256] =
-{
-/*00*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, &vector_alu6_op,
- INVALID, &vector_alu6_op, &vector_alu6_op, INVALID,
- &vector_invd_op, &vector_wbinvd_op, INVALID, INVALID,
- INVALID, INVALID, &vector_femms_op, &m3dn_op,
-
-/*10*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*20*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, &vector_alu6_op,
- &vector_alu6_op, &vector_alu6_op, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*30*/ &vector_alu6_op, &vector_alu6_op, &vector_alu6_op, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*40*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*50*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*60*/ &mmx_op, &mmx_op, &mmx_op, &mmx_op,
- &mmx_op, &mmx_op, &mmx_op, &mmx_op,
- &mmx_op, &mmx_op, &mmx_op, &mmx_op,
- INVALID, INVALID, &mmx_op, &mmx_op,
-
-/*70*/ INVALID, &mmx_shift_op, &mmx_shift_op, &mmx_shift_op,
- &mmx_op, &mmx_op, &mmx_op, &vector_emms_op,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, &mmx_op, &mmx_op,
-
-/*80*/ &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
-
-/*90*/ &vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op,
- &vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op,
- &vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op,
- &vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op, &vector_setcc_mem_op,
-
-/*a0*/ &push_seg_op, &vector_mov_seg_mem_op, &vector_cpuid_op, &vector_alu1_op,
- &vector_alu1_op, &vector_alu1_op, INVALID, INVALID,
- &push_seg_op, &vector_mov_seg_mem_op, INVALID, &vector_alu1_op,
- &vector_alu1_op, &vector_alu1_op, INVALID, &vector_mul_op,
-
-/*b0*/ &vector_cmpxchg_b_op, &vector_cmpxchg_op, &vector_lss_op, &vector_alu1_op,
- &vector_lss_op, &vector_lss_op, &alux_op, &alu_op,
- INVALID, INVALID, &vector_alu1_op, &vector_alu1_op,
- &vector_bsx_op, &vector_bsx_op, &alux_op, &alu_op,
-
-/*c0*/ &vector_alux1_op, &vector_alu1_op, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- &bswap_op, &bswap_op, &bswap_op, &bswap_op,
- &bswap_op, &bswap_op, &bswap_op, &bswap_op,
-
-/*d0*/ INVALID, &mmx_shift_op, &mmx_shift_op, &mmx_shift_op,
- INVALID, &mmx_mul_op, INVALID, INVALID,
- &mmx_op, &mmx_op, INVALID, &mmx_op,
- &mmx_op, &mmx_op, INVALID, &mmx_op,
-
-/*e0*/ &mmx_op, &mmx_shift_op, &mmx_shift_op, INVALID,
- INVALID, &pmul_op, INVALID, INVALID,
- &mmx_op, &mmx_op, INVALID, &mmx_op,
- &mmx_op, &mmx_op, INVALID, &mmx_op,
-
-/*f0*/ INVALID, &mmx_shift_op, &mmx_shift_op, &mmx_shift_op,
- INVALID, &pmul_op, INVALID, INVALID,
- &mmx_op, &mmx_op, &mmx_op, INVALID,
- &mmx_op, &mmx_op, &mmx_op, INVALID,
-};
-
-static const risc86_instruction_t *opcode_timings_0f0f[256] =
-{
-/*00*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, &load_3dn_op, INVALID, INVALID,
-
-/*10*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, &load_3dn_op, INVALID, INVALID,
-
-/*20*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*30*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*40*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*50*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*60*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*70*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*80*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*90*/ &load_3dn_op, INVALID, INVALID, INVALID,
- &load_3dn_op, INVALID, &load_3dn_op, &load_3dn_op,
- INVALID, INVALID, &load_3dn_op, INVALID,
- INVALID, INVALID, &load_3dn_op, INVALID,
-
-/*a0*/ &load_3dn_op, INVALID, INVALID, INVALID,
- &load_3dn_op, INVALID, &load_mmx_mul_op, &load_mmx_mul_op,
- INVALID, INVALID, &load_3dn_op, INVALID,
- INVALID, INVALID, &load_3dn_op, INVALID,
-
-/*b0*/ &load_3dn_op, INVALID, INVALID, INVALID,
- &load_mmx_mul_op, INVALID, &load_mmx_mul_op, &load_mmx_mul_op,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, &load_mmx_op,
-
-/*c0*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*d0*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*e0*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*f0*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-};
-static const risc86_instruction_t *opcode_timings_0f0f_mod3[256] =
-{
-/*00*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, &m3dn_op, INVALID, INVALID,
-
-/*10*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, &m3dn_op, INVALID, INVALID,
-
-/*20*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*30*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*40*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*50*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*60*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*70*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*80*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*90*/ &m3dn_op, INVALID, INVALID, INVALID,
- &m3dn_op, INVALID, &m3dn_op, &m3dn_op,
- INVALID, INVALID, &m3dn_op, INVALID,
- INVALID, INVALID, &m3dn_op, INVALID,
-
-/*a0*/ &m3dn_op, INVALID, INVALID, INVALID,
- &m3dn_op, INVALID, &mmx_mul_op, &mmx_mul_op,
- INVALID, INVALID, &m3dn_op, INVALID,
- INVALID, INVALID, &m3dn_op, INVALID,
-
-/*b0*/ &m3dn_op, INVALID, INVALID, INVALID,
- &mmx_mul_op, INVALID, &mmx_mul_op, &mmx_mul_op,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, &mmx_op,
-
-/*c0*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*d0*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*e0*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*f0*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-};
-
-static const risc86_instruction_t *opcode_timings_shift[8] =
-{
- &vector_alu_store_op, &vector_alu_store_op, &vector_alu_store_op, &vector_alu_store_op,
- &vector_alu_store_op, &vector_alu_store_op, &vector_alu_store_op, &vector_alu_store_op
-};
-static const risc86_instruction_t *opcode_timings_shift_b[8] =
-{
- &vector_alux_store_op, &vector_alux_store_op, &vector_alux_store_op, &vector_alux_store_op,
- &vector_alux_store_op, &vector_alux_store_op, &vector_alux_store_op, &vector_alux_store_op
-};
-static const risc86_instruction_t *opcode_timings_shift_mod3[8] =
-{
- &vector_alu1_op, &vector_alu1_op, &vector_alu1_op, &vector_alu1_op,
- &alu_op, &alu_op, &alu_op, &alu_op
-};
-static const risc86_instruction_t *opcode_timings_shift_b_mod3[8] =
-{
- &vector_alux1_op, &vector_alux1_op, &vector_alux1_op, &vector_alux1_op,
- &alux_op, &alux_op, &alux_op, &alux_op
-};
-
-static const risc86_instruction_t *opcode_timings_80[8] =
-{
- &alux_store_op, &alux_store_op, &vector_alux_store_op, &vector_alux_store_op,
- &alux_store_op, &alux_store_op, &alux_store_op, &alux_store_op,
-};
-static const risc86_instruction_t *opcode_timings_80_mod3[8] =
-{
- &alux_op, &alux_op, &alux_store_op, &alux_store_op,
- &alux_op, &alux_op, &alux_op, &alux_op,
-};
-static const risc86_instruction_t *opcode_timings_8x[8] =
-{
- &alu_store_op, &alu_store_op, &vector_alu_store_op, &vector_alu_store_op,
- &alu_store_op, &alu_store_op, &alu_store_op, &alu_store_op,
-};
-static const risc86_instruction_t *opcode_timings_8x_mod3[8] =
-{
- &alu_op, &alu_op, &alu_store_op, &alu_store_op,
- &alu_op, &alu_op, &alu_op, &alu_op,
-};
-
-static const risc86_instruction_t *opcode_timings_f6[8] =
-{
-/* TST NOT NEG*/
- &test_mem_imm_b_op, INVALID, &vector_alux_store_op, &vector_alux_store_op,
-/* MUL IMUL DIV IDIV*/
- &vector_mul_mem_op, &vector_mul_mem_op, &vector_div16_mem_op, &vector_div16_mem_op,
-};
-static const risc86_instruction_t *opcode_timings_f6_mod3[8] =
-{
-/* TST NOT NEG*/
- &test_reg_b_op, INVALID, &alux_op, &alux_op,
-/* MUL IMUL DIV IDIV*/
- &vector_mul_op, &vector_mul_op, &vector_div16_op, &vector_div16_op,
-};
-static const risc86_instruction_t *opcode_timings_f7[8] =
-{
-/* TST NOT NEG*/
- &test_mem_imm_op, INVALID, &vector_alu_store_op, &vector_alu_store_op,
-/* MUL IMUL DIV IDIV*/
- &vector_mul64_mem_op, &vector_mul64_mem_op, &vector_div32_mem_op, &vector_div32_mem_op,
-};
-static const risc86_instruction_t *opcode_timings_f7_mod3[8] =
-{
-/* TST NOT NEG*/
- &test_reg_op, INVALID, &alu_op, &alu_op,
-/* MUL IMUL DIV IDIV*/
- &vector_mul64_op, &vector_mul64_op, &vector_div32_op, &vector_div32_op,
-};
-static const risc86_instruction_t *opcode_timings_ff[8] =
-{
-/* INC DEC CALL CALL far*/
- &alu_store_op, &alu_store_op, &store_op, &vector_call_far_op,
-/* JMP JMP far PUSH*/
- &branch_op, &vector_jmp_far_op, &push_mem_op, INVALID
-};
-static const risc86_instruction_t *opcode_timings_ff_mod3[8] =
-{
-/* INC DEC CALL CALL far*/
- &vector_alu1_op, &vector_alu1_op, &store_op, &vector_call_far_op,
-/* JMP JMP far PUSH*/
- &branch_op, &vector_jmp_far_op, &vector_push_mem_op, INVALID
-};
-
-static const risc86_instruction_t *opcode_timings_d8[8] =
-{
-/* FADDs FMULs FCOMs FCOMPs*/
- &load_float_op, &load_float_op, &load_float_op, &load_float_op,
-/* FSUBs FSUBRs FDIVs FDIVRs*/
- &load_float_op, &load_float_op, &fdiv_mem_op, &fdiv_mem_op,
-};
-static const risc86_instruction_t *opcode_timings_d8_mod3[8] =
-{
-/* FADD FMUL FCOM FCOMP*/
- &float_op, &float_op, &float_op, &float_op,
-/* FSUB FSUBR FDIV FDIVR*/
- &float_op, &float_op, &fdiv_op, &fdiv_op,
-};
-
-static const risc86_instruction_t *opcode_timings_d9[8] =
-{
-/* FLDs FSTs FSTPs*/
- &load_float_op, INVALID, &fstore_op, &fstore_op,
-/* FLDENV FLDCW FSTENV FSTCW*/
- &vector_float_l_op, &vector_fldcw_op, &vector_float_l_op, &vector_float_op
-};
-static const risc86_instruction_t *opcode_timings_d9_mod3[64] =
-{
- /*FLD*/
- &float_op, &float_op, &float_op, &float_op,
- &float_op, &float_op, &float_op, &float_op,
- /*FXCH*/
- &float_op, &float_op, &float_op, &float_op,
- &float_op, &float_op, &float_op, &float_op,
- /*FNOP*/
- &float_op, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- /*FSTP*/
- &float_op, &float_op, &float_op, &float_op,
- &float_op, &float_op, &float_op, &float_op,
-/* opFCHS opFABS*/
- &float_op, &float_op, INVALID, INVALID,
-/* opFTST opFXAM*/
- &float_op, &float_op, INVALID, INVALID,
-/* opFLD1 opFLDL2T opFLDL2E opFLDPI*/
- &float_op, &float_op, &float_op, &float_op,
-/* opFLDEG2 opFLDLN2 opFLDZ*/
- &float_op, &float_op, &float_op, INVALID,
-/* opF2XM1 opFYL2X opFPTAN opFPATAN*/
- &fsin_op, &fsin_op, &fsin_op, &fsin_op,
-/* opFDECSTP opFINCSTP,*/
- INVALID, INVALID, &float_op, &float_op,
-/* opFPREM opFSQRT opFSINCOS*/
- &fdiv_op, INVALID, &fsqrt_op, &fsin_op,
-/* opFRNDINT opFSCALE opFSIN opFCOS*/
- &float_op, &fdiv_op, &fsin_op, &fsin_op
-};
-
-static const risc86_instruction_t *opcode_timings_da[8] =
-{
-/* FIADDl FIMULl FICOMl FICOMPl*/
- &load_float_op, &load_float_op, &load_float_op, &load_float_op,
-/* FISUBl FISUBRl FIDIVl FIDIVRl*/
- &load_float_op, &load_float_op, &fdiv_mem_op, &fdiv_mem_op,
-};
-static const risc86_instruction_t *opcode_timings_da_mod3[8] =
-{
- INVALID, INVALID, INVALID, INVALID,
-/* FCOMPP*/
- INVALID, &float_op, INVALID, INVALID
-};
-
-static const risc86_instruction_t *opcode_timings_db[8] =
-{
-/* FLDil FSTil FSTPil*/
- &load_float_op, INVALID, &fstore_op, &fstore_op,
-/* FLDe FSTPe*/
- INVALID, &vector_flde_op, INVALID, &vector_fste_op
-};
-static const risc86_instruction_t *opcode_timings_db_mod3[64] =
-{
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/* opFNOP opFCLEX opFINIT*/
- INVALID, &float_op, &float_op, &float_op,
-/* opFNOP opFNOP*/
- &float_op, &float_op, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-};
-
-static const risc86_instruction_t *opcode_timings_dc[8] =
-{
-/* FADDd FMULd FCOMd FCOMPd*/
- &load_float_op, &load_float_op, &load_float_op, &load_float_op,
-/* FSUBd FSUBRd FDIVd FDIVRd*/
- &load_float_op, &load_float_op, &fdiv_mem_op, &fdiv_mem_op,
-};
-static const risc86_instruction_t *opcode_timings_dc_mod3[8] =
-{
-/* opFADDr opFMULr*/
- &float_op, &float_op, INVALID, INVALID,
-/* opFSUBRr opFSUBr opFDIVRr opFDIVr*/
- &float_op, &float_op, &fdiv_op, &fdiv_op
-};
-
-static const risc86_instruction_t *opcode_timings_dd[8] =
-{
-/* FLDd FSTd FSTPd*/
- &load_float_op, INVALID, &fstore_op, &fstore_op,
-/* FRSTOR FSAVE FSTSW*/
- &vector_float_l_op, INVALID, &vector_float_l_op, &vector_float_l_op
-};
-static const risc86_instruction_t *opcode_timings_dd_mod3[8] =
-{
-/* FFFREE FST FSTP*/
- &float_op, INVALID, &float_op, &float_op,
-/* FUCOM FUCOMP*/
- &float_op, &float_op, INVALID, INVALID
-};
-
-static const risc86_instruction_t *opcode_timings_de[8] =
-{
-/* FIADDw FIMULw FICOMw FICOMPw*/
- &load_float_op, &load_float_op, &load_float_op, &load_float_op,
-/* FISUBw FISUBRw FIDIVw FIDIVRw*/
- &load_float_op, &load_float_op, &fdiv_mem_op, &fdiv_mem_op,
-};
-static const risc86_instruction_t *opcode_timings_de_mod3[8] =
-{
-/* FADDP FMULP FCOMPP*/
- &float_op, &float_op, INVALID, &float_op,
-/* FSUBP FSUBRP FDIVP FDIVRP*/
- &float_op, &float_op, &fdiv_op, &fdiv_op,
-};
-
-static const risc86_instruction_t *opcode_timings_df[8] =
-{
-/* FILDiw FISTiw FISTPiw*/
- &load_float_op, INVALID, &fstore_op, &fstore_op,
-/* FILDiq FBSTP FISTPiq*/
- INVALID, &load_float_op, &vector_float_l_op, &fstore_op,
-};
-static const risc86_instruction_t *opcode_timings_df_mod3[8] =
-{
- INVALID, INVALID, INVALID, INVALID,
-/* FSTSW AX*/
- &float_op, INVALID, INVALID, INVALID
-};
-
-
-static uint8_t last_prefix;
-static int prefixes;
-
-static int decode_timestamp;
-static int last_complete_timestamp;
-
-typedef struct k6_unit_t
-{
- uint32_t uop_mask;
- int first_available_cycle;
-} k6_unit_t;
-
-static int nr_units;
-static k6_unit_t *units;
-
-/*K6 has dedicated MMX unit*/
-static k6_unit_t k6_units[] =
-{
- {.uop_mask = (1 << UOP_ALU) | (1 << UOP_ALUX)}, /*Integer X*/
- {.uop_mask = (1 << UOP_ALU)}, /*Integer Y*/
- {.uop_mask = (1 << UOP_MEU) | (1 << UOP_MEU_SHIFT) | (1 << UOP_MEU_MUL)}, /*Multimedia*/
- {.uop_mask = (1 << UOP_FLOAT)}, /*Floating point*/
- {.uop_mask = (1 << UOP_LOAD) | (1 << UOP_FLOAD) | (1 << UOP_MLOAD)}, /*Load*/
- {.uop_mask = (1 << UOP_STORE) | (1 << UOP_FSTORE) | (1 << UOP_MSTORE)}, /*Store*/
- {.uop_mask = (1 << UOP_BRANCH)} /*Branch*/
-};
-#define NR_K6_UNITS (sizeof(k6_units) / sizeof(k6_unit_t))
-
-/*K6-2 and later integrate MMX into ALU X & Y, sharing multiplier, shifter and
- 3DNow ALU between two execution units*/
-static k6_unit_t k6_2_units[] =
-{
- {.uop_mask = (1 << UOP_ALU) | (1 << UOP_ALUX) | (1 << UOP_MEU) | /*Integer X*/
- (1 << UOP_MEU_SHIFT) | (1 << UOP_MEU_MUL) | (1 << UOP_MEU_3DN)},
- {.uop_mask = (1 << UOP_ALU) | (1 << UOP_MEU) | /*Integer Y*/
- (1 << UOP_MEU_SHIFT) | (1 << UOP_MEU_MUL) | (1 << UOP_MEU_3DN)},
- {.uop_mask = (1 << UOP_FLOAT)}, /*Floating point*/
- {.uop_mask = (1 << UOP_LOAD) | (1 << UOP_FLOAD) | (1 << UOP_MLOAD)}, /*Load*/
- {.uop_mask = (1 << UOP_STORE) | (1 << UOP_FSTORE) | (1 << UOP_MSTORE)}, /*Store*/
- {.uop_mask = (1 << UOP_BRANCH)} /*Branch*/
-};
-#define NR_K6_2_UNITS (sizeof(k6_2_units) / sizeof(k6_unit_t))
-
-/*First available cycles of shared execution units. Each of these can be submitted
- to by ALU X and Y*/
-static int mul_first_available_cycle;
-static int shift_first_available_cycle;
-static int m3dnow_first_available_cycle;
-
-static int uop_run(const risc86_uop_t *uop, int decode_time)
-{
- int c;
- k6_unit_t *best_unit = NULL;
- int best_start_cycle = 99999;
-
- /*UOP_LIMM does not require execution*/
- if (uop->type == UOP_LIMM)
- return decode_time;
-
- /*Handle shared units on K6-2 and later*/
- if (units == k6_2_units)
- {
- if (uop->type == UOP_MEU_MUL && decode_time < mul_first_available_cycle)
- decode_time = mul_first_available_cycle;
- else if (uop->type == UOP_MEU_SHIFT && decode_time < mul_first_available_cycle)
- decode_time = shift_first_available_cycle;
- else if (uop->type == UOP_MEU_3DN && decode_time < mul_first_available_cycle)
- decode_time = m3dnow_first_available_cycle;
- }
-
- /*Find execution unit for this uOP*/
- for (c = 0; c < nr_units; c++)
- {
- if (units[c].uop_mask & (1 << uop->type))
- {
- if (units[c].first_available_cycle < best_start_cycle)
- {
- best_unit = &units[c];
- best_start_cycle = units[c].first_available_cycle;
- }
- }
- }
- if (!best_unit)
- fatal("uop_run: can not find execution unit\n");
-
- if (best_start_cycle < decode_time)
- best_start_cycle = decode_time;
- best_unit->first_available_cycle = best_start_cycle + uop->throughput;
-
- if (units == k6_2_units)
- {
- if (uop->type == UOP_MEU_MUL)
- mul_first_available_cycle = best_start_cycle + uop->throughput;
- else if (uop->type == UOP_MEU_SHIFT)
- shift_first_available_cycle = best_start_cycle + uop->throughput;
- else if (uop->type == UOP_MEU_3DN)
- m3dnow_first_available_cycle = best_start_cycle + uop->throughput;
- }
-
- return best_start_cycle + uop->throughput;
-}
-
-/*The K6 decoder can decode, per clock :
- - 1 or 2 'short' instructions, each up to 2 uOPs and 7 bytes long
- - 1 'long' instruction, up to 4 uOPs
- - 1 'vector' instruction, up to 4 uOPs per cycle, plus (I think) 1 cycle startup delay)
-*/
-static struct
-{
- int nr_uops;
- const risc86_uop_t *uops[4];
- /*Earliest time a uop can start. If the timestamp is -1, then the uop is
- part of a dependency chain and the start time is the completion time of
- the previous uop*/
- int earliest_start[4];
-} decode_buffer;
-
-#define NR_OPQUADS 6
-/*Timestamps of when the last six opquads completed. The K6 scheduler retires
- opquads in order, so this is needed to determine when the next can be scheduled*/
-static int opquad_completion_timestamp[NR_OPQUADS];
-static int next_opquad = 0;
-
-#define NR_REGS 8
-/*Timestamp of when last operation on an integer register completed*/
-static int reg_available_timestamp[NR_REGS];
-/*Timestamp of when last operation on an FPU register completed*/
-static int fpu_st_timestamp[8];
-/*Completion time of the last uop to be processed. Used to calculate timing of
- dependent uop chains*/
-static int last_uop_timestamp = 0;
-
-void decode_flush()
-{
- int c;
- int uop_timestamp = 0;
-
- /*Decoded opquad can not be submitted if there are no free spaces in the
- opquad buffer*/
- if (decode_timestamp < opquad_completion_timestamp[next_opquad])
- decode_timestamp = opquad_completion_timestamp[next_opquad];
-
- /*Ensure that uops can not be submitted before they have been decoded*/
- if (decode_timestamp > last_uop_timestamp)
- last_uop_timestamp = decode_timestamp;
-
- /*Submit uops to execution units, and determine the latest completion time*/
- for (c = 0; c < decode_buffer.nr_uops; c++)
- {
- int start_timestamp;
-
- if (decode_buffer.earliest_start[c] == -1)
- start_timestamp = last_uop_timestamp;
- else
- start_timestamp = decode_buffer.earliest_start[c];
-
- last_uop_timestamp = uop_run(decode_buffer.uops[c], start_timestamp);
- if (last_uop_timestamp > uop_timestamp)
- uop_timestamp = last_uop_timestamp;
- }
-
- /*Calculate opquad completion time. Since opquads complete in order, it
- must be after the last completion.*/
- if (uop_timestamp <= last_complete_timestamp)
- last_complete_timestamp = last_complete_timestamp + 1;
- else
- last_complete_timestamp = uop_timestamp;
-
- /*Advance to next opquad in buffer*/
- opquad_completion_timestamp[next_opquad] = last_complete_timestamp;
- next_opquad++;
- if (next_opquad == NR_OPQUADS)
- next_opquad = 0;
-
- decode_timestamp++;
- decode_buffer.nr_uops = 0;
-}
-
-/*The instruction is only of interest here if it's longer than 7 bytes, as that's the
- limit on K6 short decoding*/
-static int codegen_timing_instr_length(uint64_t deps, uint32_t fetchdat, int op_32)
-{
- int len = prefixes + 1; /*Opcode*/
- if (deps & MODRM)
- {
- len++; /*ModR/M*/
- if (deps & HAS_IMM8)
- len++;
- if (deps & HAS_IMM1632)
- len += (op_32 & 0x100) ? 4 : 2;
-
- if (op_32 & 0x200)
- {
- if ((fetchdat & 7) == 4 && (fetchdat & 0xc0) != 0xc0)
- {
- /* Has SIB*/
- len++;
- if ((fetchdat & 0xc0) == 0x40)
- len++;
- else if ((fetchdat & 0xc0) == 0x80)
- len += 4;
- else if ((fetchdat & 0x700) == 0x500)
- len += 4;
- }
- else
- {
- if ((fetchdat & 0xc0) == 0x40)
- len++;
- else if ((fetchdat & 0xc0) == 0x80)
- len += 4;
- else if ((fetchdat & 0xc7) == 0x05)
- len += 4;
- }
- }
- else
- {
- if ((fetchdat & 0xc0) == 0x40)
- len++;
- else if ((fetchdat & 0xc0) == 0x80)
- len += 2;
- else if ((fetchdat & 0xc7) == 0x06)
- len += 2;
- }
- }
-
- return len;
-}
-
-static void decode_instruction(const risc86_instruction_t *ins, uint64_t deps, uint32_t fetchdat, int op_32, int bit8)
-{
- uint32_t regmask_required;
- uint32_t regmask_modified;
- int c, d;
- int earliest_start = 0;
- decode_type_t decode_type = ins->decode_type;
- int instr_length = codegen_timing_instr_length(deps, fetchdat, op_32);
-
- /*Generate input register mask, and determine the earliest time this
- instruction can start. This is not accurate, as this is calculated per
- x86 instruction when it should be handled per uop*/
- regmask_required = get_dstdep_mask(deps, fetchdat, bit8);
- regmask_required |= get_addr_regmask(deps, fetchdat, op_32);
- for (c = 0; c < 8; c++)
- {
- if (regmask_required & (1 << c))
- {
- if (reg_available_timestamp[c] > decode_timestamp)
- earliest_start = reg_available_timestamp[c];
- }
- }
- if ((deps & FPU_RW_ST0) && fpu_st_timestamp[0] > decode_timestamp)
- earliest_start = fpu_st_timestamp[0];
- if ((deps & FPU_RW_ST1) && fpu_st_timestamp[1] > decode_timestamp)
- earliest_start = fpu_st_timestamp[1];
- if ((deps & FPU_RW_STREG))
- {
- int reg = fetchdat & 7;
-
- if (fpu_st_timestamp[reg] > decode_timestamp)
- earliest_start = fpu_st_timestamp[reg];
- }
-
- /*Short decoders are limited to 7 bytes*/
- if (decode_type == DECODE_SHORT && instr_length > 7)
- decode_type = DECODE_LONG;
- /*Long decoder is limited to 11 bytes*/
- else if (instr_length > 11)
- decode_type = DECODE_VECTOR;
-
- switch (decode_type)
- {
- case DECODE_SHORT:
- if (decode_buffer.nr_uops)
- {
- decode_buffer.uops[decode_buffer.nr_uops] = &ins->uop[0];
- decode_buffer.earliest_start[decode_buffer.nr_uops] = earliest_start;
- if (ins->nr_uops > 1)
- {
- decode_buffer.uops[decode_buffer.nr_uops+1] = &ins->uop[1];
- decode_buffer.earliest_start[decode_buffer.nr_uops+1] = -1;
- }
- decode_buffer.nr_uops += ins->nr_uops;
-
- decode_flush();
- }
- else
- {
- decode_buffer.nr_uops = ins->nr_uops;
- decode_buffer.uops[0] = &ins->uop[0];
- decode_buffer.earliest_start[0] = earliest_start;
- if (ins->nr_uops > 1)
- {
- decode_buffer.uops[1] = &ins->uop[1];
- decode_buffer.earliest_start[1] = -1;
- }
- }
- break;
-
- case DECODE_LONG:
- if (decode_buffer.nr_uops)
- decode_flush();
-
- decode_buffer.nr_uops = ins->nr_uops;
- for (c = 0; c < ins->nr_uops; c++)
- {
- decode_buffer.uops[c] = &ins->uop[c];
- if (c == 0)
- decode_buffer.earliest_start[c] = earliest_start;
- else
- decode_buffer.earliest_start[c] = -1;
- }
- decode_flush();
- break;
-
- case DECODE_VECTOR:
- if (decode_buffer.nr_uops)
- decode_flush();
-
- decode_timestamp++;
- d = 0;
-
- for (c = 0; c < ins->nr_uops; c++)
- {
- decode_buffer.uops[d] = &ins->uop[c];
- if (c == 0)
- decode_buffer.earliest_start[d] = earliest_start;
- else
- decode_buffer.earliest_start[d] = -1;
- d++;
-
- if (d == 4)
- {
- d = 0;
- decode_buffer.nr_uops = 4;
- decode_flush();
- }
- }
- if (d)
- {
- decode_buffer.nr_uops = d;
- decode_flush();
- }
- break;
- }
-
- /*Update write timestamps for any output registers*/
- regmask_modified = get_dstdep_mask(deps, fetchdat, bit8);
- for (c = 0; c < 8; c++)
- {
- if (regmask_modified & (1 << c))
- reg_available_timestamp[c] = last_complete_timestamp;
- }
- if (deps & FPU_POP)
- {
- for (c = 0; c < 7; c++)
- fpu_st_timestamp[c] = fpu_st_timestamp[c+1];
- fpu_st_timestamp[7] = 0;
- }
- if (deps & FPU_POP2)
- {
- for (c = 0; c < 6; c++)
- fpu_st_timestamp[c] = fpu_st_timestamp[c+2];
- fpu_st_timestamp[6] = fpu_st_timestamp[7] = 0;
- }
- if (deps & FPU_PUSH)
- {
- for (c = 0; c < 7; c++)
- fpu_st_timestamp[c+1] = fpu_st_timestamp[c];
- fpu_st_timestamp[0] = 0;
- }
- if (deps & FPU_WRITE_ST0)
- fpu_st_timestamp[0] = last_complete_timestamp;
- if (deps & FPU_WRITE_ST1)
- fpu_st_timestamp[1] = last_complete_timestamp;
- if (deps & FPU_WRITE_STREG)
- {
- int reg = fetchdat & 7;
- if (deps & FPU_POP)
- reg--;
- if (reg >= 0 &&
- !(reg == 0 && (deps & FPU_WRITE_ST0)) &&
- !(reg == 1 && (deps & FPU_WRITE_ST1)))
- fpu_st_timestamp[reg] = last_complete_timestamp;
- }
-}
-
-void codegen_timing_k6_block_start()
-{
- int c;
-
- for (c = 0; c < nr_units; c++)
- units[c].first_available_cycle = 0;
-
- mul_first_available_cycle = 0;
- shift_first_available_cycle = 0;
- m3dnow_first_available_cycle = 0;
-
- decode_timestamp = 0;
- last_complete_timestamp = 0;
-
- for (c = 0; c < NR_OPQUADS; c++)
- opquad_completion_timestamp[c] = 0;
- next_opquad = 0;
-
- for (c = 0; c < NR_REGS; c++)
- reg_available_timestamp[c] = 0;
- for (c = 0; c < 8; c++)
- fpu_st_timestamp[c] = 0;
-}
-
-void codegen_timing_k6_start()
-{
- if (models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_K6)
- {
- units = k6_units;
- nr_units = NR_K6_UNITS;
- }
- else
- {
- units = k6_2_units;
- nr_units = NR_K6_2_UNITS;
- }
- last_prefix = 0;
- prefixes = 0;
-}
-
-void codegen_timing_k6_prefix(uint8_t prefix, uint32_t fetchdat)
-{
- if (prefix != 0x0f)
- decode_timestamp++;
-
- last_prefix = prefix;
- prefixes++;
-}
-
-void codegen_timing_k6_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t op_pc)
-{
- const risc86_instruction_t **ins_table;
- uint64_t *deps;
- int mod3 = ((fetchdat & 0xc0) == 0xc0);
- int old_last_complete_timestamp = last_complete_timestamp;
- int bit8 = !(opcode & 1);
-
- switch (last_prefix)
- {
- case 0x0f:
- if (opcode == 0x0f)
- {
- /*3DNow has the actual opcode after ModR/M, SIB and any offset*/
- uint32_t opcode_pc = op_pc + 1; /*Byte after ModR/M*/
- uint8_t modrm = fetchdat & 0xff;
- uint8_t sib = (fetchdat >> 8) & 0xff;
-
- if ((modrm & 0xc0) != 0xc0)
- {
- if (op_32 & 0x200)
- {
- if ((modrm & 7) == 4)
- {
- /* Has SIB*/
- opcode_pc++;
- if ((modrm & 0xc0) == 0x40)
- opcode_pc++;
- else if ((modrm & 0xc0) == 0x80)
- opcode_pc += 4;
- else if ((sib & 0x07) == 0x05)
- opcode_pc += 4;
- }
- else
- {
- if ((modrm & 0xc0) == 0x40)
- opcode_pc++;
- else if ((modrm & 0xc0) == 0x80)
- opcode_pc += 4;
- else if ((modrm & 0xc7) == 0x05)
- opcode_pc += 4;
- }
- }
- else
- {
- if ((modrm & 0xc0) == 0x40)
- opcode_pc++;
- else if ((modrm & 0xc0) == 0x80)
- opcode_pc += 2;
- else if ((modrm & 0xc7) == 0x06)
- opcode_pc += 2;
- }
- }
-
- opcode = fastreadb(cs + opcode_pc);
-
- ins_table = mod3 ? opcode_timings_0f0f_mod3 : opcode_timings_0f0f;
- deps = mod3 ? opcode_deps_0f0f_mod3 : opcode_deps_0f0f;
- }
- else
- {
- ins_table = mod3 ? opcode_timings_0f_mod3 : opcode_timings_0f;
- deps = mod3 ? opcode_deps_0f_mod3 : opcode_deps_0f;
- }
-// pclog("timings 0f\n");
- break;
-
- case 0xd8:
- ins_table = mod3 ? opcode_timings_d8_mod3 : opcode_timings_d8;
- deps = mod3 ? opcode_deps_d8_mod3 : opcode_deps_d8;
- opcode = (opcode >> 3) & 7;
-// pclog("timings d8\n");
- break;
- case 0xd9:
- ins_table = mod3 ? opcode_timings_d9_mod3 : opcode_timings_d9;
- deps = mod3 ? opcode_deps_d9_mod3 : opcode_deps_d9;
- opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
-// pclog("timings d9\n");
- break;
- case 0xda:
- ins_table = mod3 ? opcode_timings_da_mod3 : opcode_timings_da;
- deps = mod3 ? opcode_deps_da_mod3 : opcode_deps_da;
- opcode = (opcode >> 3) & 7;
-// pclog("timings da\n");
- break;
- case 0xdb:
- ins_table = mod3 ? opcode_timings_db_mod3 : opcode_timings_db;
- deps = mod3 ? opcode_deps_db_mod3 : opcode_deps_db;
- opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
-// pclog("timings db\n");
- break;
- case 0xdc:
- ins_table = mod3 ? opcode_timings_dc_mod3 : opcode_timings_dc;
- deps = mod3 ? opcode_deps_dc_mod3 : opcode_deps_dc;
- opcode = (opcode >> 3) & 7;
-// pclog("timings dc\n");
- break;
- case 0xdd:
- ins_table = mod3 ? opcode_timings_dd_mod3 : opcode_timings_dd;
- deps = mod3 ? opcode_deps_dd_mod3 : opcode_deps_dd;
- opcode = (opcode >> 3) & 7;
-// pclog("timings dd\n");
- break;
- case 0xde:
- ins_table = mod3 ? opcode_timings_de_mod3 : opcode_timings_de;
- deps = mod3 ? opcode_deps_de_mod3 : opcode_deps_de;
- opcode = (opcode >> 3) & 7;
-// pclog("timings de\n");
- break;
- case 0xdf:
- ins_table = mod3 ? opcode_timings_df_mod3 : opcode_timings_df;
- deps = mod3 ? opcode_deps_df_mod3 : opcode_deps_df;
- opcode = (opcode >> 3) & 7;
-// pclog("timings df\n");
- break;
-
- default:
- switch (opcode)
- {
- case 0x80: case 0x82:
- ins_table = mod3 ? opcode_timings_80_mod3 : opcode_timings_80;
- deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings 80 %p %p %p\n", (void *)timings, (void *)opcode_timings_mod3, (void *)opcode_timings_8x);
- break;
- case 0x81: case 0x83:
- ins_table = mod3 ? opcode_timings_8x_mod3 : opcode_timings_8x;
- deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings 80 %p %p %p\n", (void *)timings, (void *)opcode_timings_mod3, (void *)opcode_timings_8x);
- break;
-
- case 0xc0: case 0xd0: case 0xd2:
- ins_table = mod3 ? opcode_timings_shift_b_mod3 : opcode_timings_shift_b;
- deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings c0\n");
- break;
-
- case 0xc1: case 0xd1: case 0xd3:
- ins_table = mod3 ? opcode_timings_shift_mod3 : opcode_timings_shift;
- deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings c1\n");
- break;
-
- case 0xf6:
- ins_table = mod3 ? opcode_timings_f6_mod3 : opcode_timings_f6;
- deps = mod3 ? opcode_deps_f6_mod3 : opcode_deps_f6;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings f6\n");
- break;
- case 0xf7:
- ins_table = mod3 ? opcode_timings_f7_mod3 : opcode_timings_f7;
- deps = mod3 ? opcode_deps_f7_mod3 : opcode_deps_f7;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings f7\n");
- break;
- case 0xff:
- ins_table = mod3 ? opcode_timings_ff_mod3 : opcode_timings_ff;
- deps = mod3 ? opcode_deps_ff_mod3 : opcode_deps_ff;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings ff\n");
- break;
-
- default:
- ins_table = mod3 ? opcode_timings_mod3 : opcode_timings;
- deps = mod3 ? opcode_deps_mod3 : opcode_deps;
-// pclog("timings normal\n");
- break;
- }
- }
-
- if (ins_table[opcode])
- decode_instruction(ins_table[opcode], deps[opcode], fetchdat, op_32, bit8);
- else
- decode_instruction(&vector_alu1_op, 0, fetchdat, op_32, bit8);
- codegen_block_cycles += (last_complete_timestamp - old_last_complete_timestamp);
-}
-
-void codegen_timing_k6_block_end()
-{
- if (decode_buffer.nr_uops)
- {
- int old_last_complete_timestamp = last_complete_timestamp;
- decode_flush();
- codegen_block_cycles += (last_complete_timestamp - old_last_complete_timestamp);
- }
-}
-
-int codegen_timing_k6_jump_cycles()
-{
- if (decode_buffer.nr_uops)
- return 1;
- return 0;
-}
-
-codegen_timing_t codegen_timing_k6 =
-{
- codegen_timing_k6_start,
- codegen_timing_k6_prefix,
- codegen_timing_k6_opcode,
- codegen_timing_k6_block_start,
- codegen_timing_k6_block_end,
- codegen_timing_k6_jump_cycles
-};
diff --git a/src/codegen_timing_p6.c b/src/codegen_timing_p6.c
deleted file mode 100644
index a608164..0000000
--- a/src/codegen_timing_p6.c
+++ /dev/null
@@ -1,2154 +0,0 @@
-#include "ibm.h"
-#include "cpu.h"
-#include "model.h"
-#include "x86.h"
-#include "x86_ops.h"
-#include "x87.h"
-#include "386_common.h"
-#include "mem.h"
-#include "codegen.h"
-#include "codegen_ops.h"
-#include "codegen_timing_common.h"
-
-typedef enum uop_type_t
-{
- UOP_ALU0 = 0, /*Executes in port 0 ALU*/
- UOP_ALU1, /*Executes in port 1 ALU*/
- UOP_ALU01, /*Executes in either port 0 or 1 ALU*/
- UOP_BRANCH, /*Executes in port 1 branch*/
- UOP_LOAD, /*Executes in port 2 Load unit*/
- UOP_STOREADDR, /*Executes in port 3 Store Address unit*/
- UOP_STOREDATA, /*Executes in port 4 Store Data unit*/
- UOP_FLOAT, /*Executes in port 0 Floating Point unit*/
- UOP_ALU0_SEG /*Executes in port 0 ALU, loads segment, causing pipeline flush on PPro*/
-} uop_type_t;
-
-#define MAX_UOPS 300
-
-typedef struct p6_uop_t
-{
- uop_type_t type;
- int throughput;
- int latency;
-} p6_uop_t;
-
-typedef struct p6_instruction_t
-{
- int nr_uops;
- p6_uop_t uop[MAX_UOPS];
-} p6_instruction_t;
-
-static const p6_instruction_t alu_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t alu0_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_ALU0, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t alu1_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_ALU1, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t alu01_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_ALU0, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t alu4_op =
-{
- .nr_uops = 4,
- .uop[0] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t alu6_op =
-{
- .nr_uops = 6,
- .uop[0] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t aluc_op =
-{
- .nr_uops = 2,
- .uop[0] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[0] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t load_alu_op =
-{
- .nr_uops = 2,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t load_aluc_op =
-{
- .nr_uops = 3,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t alu_store_op =
-{
- .nr_uops = 4,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t alu0_store_op =
-{
- .nr_uops = 4,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t aluc_store_op =
-{
- .nr_uops = 6,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1}
-};
-
-static const p6_instruction_t branch_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_BRANCH, .throughput = 1, .latency = 1}
-};
-
-static const p6_instruction_t load_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2}
-};
-
-static const p6_instruction_t store_op =
-{
- .nr_uops = 2,
- .uop[0] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1}
-};
-
-
-static const p6_instruction_t bswap_op =
-{
- .nr_uops = 2,
- .uop[0] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[0] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t leave_op =
-{
- .nr_uops = 3,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t lods_op =
-{
- .nr_uops = 2,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_LOAD, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t loop_op =
-{
- .nr_uops = 11,
- .uop[0] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU1, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[6] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[7] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[8] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[9] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[10] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
-};
-static const p6_instruction_t movs_op =
-{
- .nr_uops = 6,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
-};
-static const p6_instruction_t pop_reg_op =
-{
- .nr_uops = 2,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t pop_mem_op =
-{
- .nr_uops = 8,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[6] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[7] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t push_imm_op =
-{
- .nr_uops = 3,
- .uop[0] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t push_mem_op =
-{
- .nr_uops = 4,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
-};
-static const p6_instruction_t push_seg_op =
-{
- .nr_uops = 4,
- .uop[0] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t rcx_op =
-{
- .nr_uops = 8,
- .uop[0] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[6] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[7] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
-};
-static const p6_instruction_t rcx_store_op =
-{
- .nr_uops = 11,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[6] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[7] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[8] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[9] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[10] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t stos_op =
-{
- .nr_uops = 3,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t xchg_op =
-{
- .nr_uops = 3,
- .uop[0] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-
-static const p6_instruction_t mmx_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t mmx_mul_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_ALU0, .throughput = 1, .latency = 3}
-};
-static const p6_instruction_t mmx_shift_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_ALU1, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t load_mmx_op =
-{
- .nr_uops = 2,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t load_mmx_mul_op =
-{
- .nr_uops = 2,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU0, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t load_mmx_shift_op =
-{
- .nr_uops = 2,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU1, .throughput = 1, .latency = 1}
-};
-
-static const p6_instruction_t faddsub_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 1, .latency = 3}
-};
-static const p6_instruction_t load_faddsub_op =
-{
- .nr_uops = 2,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_FLOAT, .throughput = 1, .latency = 3}
-};
-static const p6_instruction_t fbstp_op =
-{
- .nr_uops = 5,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 165, .latency = 165},
- .uop[1] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t fcom_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t load_fcom_op =
-{
- .nr_uops = 2,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t fcompp_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t fild_op =
-{
- .nr_uops = 4,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t load_fi_op =
-{
- .nr_uops = 7,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1},
- .uop[6] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t fmul_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 1, .latency = 5}
-};
-static const p6_instruction_t load_fmul_op =
-{
- .nr_uops = 2,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_FLOAT, .throughput = 1, .latency = 5}
-};
-
-static const p6_instruction_t fxch_op =
-{
- .nr_uops = 0
-};
-
-static const p6_instruction_t fist_op =
-{
- .nr_uops = 4,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1}
-};
-
-static const p6_instruction_t fdiv_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 37, .latency = 38}
-};
-static const p6_instruction_t fdiv_mem_op =
-{
- .nr_uops = 2,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_FLOAT, .throughput = 37, .latency = 38}
-};
-static const p6_instruction_t fsin_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 62, .latency = 62}
-};
-static const p6_instruction_t fsqrt_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 69, .latency = 69}
-};
-
-static const p6_instruction_t float_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1}
-};
-
-static const p6_instruction_t fldcw_op =
-{
- .nr_uops = 3,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_FLOAT, .throughput = 7, .latency = 7},
-};
-static const p6_instruction_t flde_op =
-{
- .nr_uops = 4,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[2] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t frstor_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 72, .latency = 72}
-};
-static const p6_instruction_t fsave_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 141, .latency = 141}
-};
-static const p6_instruction_t fste_op =
-{
- .nr_uops = 6,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t fstsw_ax_op =
-{
- .nr_uops = 3,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU0, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t fstsw_mem_op =
-{
- .nr_uops = 3,
- .uop[0] = {.type = UOP_FLOAT, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1}
-};
-
-static const p6_instruction_t aad_op =
-{
- .nr_uops = 3,
- .uop[0] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU0, .throughput = 1, .latency = 4},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t aam_op =
-{
- .nr_uops = 3,
- .uop[0] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU0, .throughput = 1, .latency = 4},
- .uop[2] = {.type = UOP_ALU1, .throughput = 1, .latency = 9},
- .uop[3] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t arpl_op =
-{
- .nr_uops = 2,
- .uop[0] = {.type = UOP_ALU01, .throughput = 3, .latency = 3},
- .uop[1] = {.type = UOP_ALU01, .throughput = 3, .latency = 3}
-};
-static const p6_instruction_t bound_op =
-{
- .nr_uops = 4,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[2] = {.type = UOP_ALU0, .throughput = 7, .latency = 7},
- .uop[3] = {.type = UOP_ALU01, .throughput = 6, .latency = 6}
-};
-static const p6_instruction_t bsx_op =
-{
- .nr_uops = 2,
- .uop[0] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU1, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t load_bsx_op =
-{
- .nr_uops = 3,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU1, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t call_far_op =
-{
- .nr_uops = 6,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_ALU0_SEG, .throughput = 28, .latency = 28}
-};
-static const p6_instruction_t load_call_far_op =
-{
- .nr_uops = 7,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[2] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[6] = {.type = UOP_ALU0_SEG, .throughput = 28, .latency = 28}
-};
-static const p6_instruction_t cli_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_ALU01, .throughput = 9, .latency = 9}
-};
-static const p6_instruction_t sti_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_ALU01, .throughput = 17, .latency = 17}
-};
-static const p6_instruction_t cmps_op =
-{
- .nr_uops = 6,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t cmpxchg_op =
-{
- .nr_uops = 4,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t cpuid_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_ALU0, .throughput = 48, .latency = 48}
-};
-/*static const p6_instruction_t div8_op =
-{
- .nr_uops = 3,
- .uop[0] = {.type = UOP_ALU0, .throughput = 12, .latency = 17},
- .uop[1] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};*/
-/*static const p6_instruction_t div8_mem_op =
-{
- .nr_uops = 4,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[0] = {.type = UOP_ALU0, .throughput = 12, .latency = 17},
- .uop[1] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};*/
-static const p6_instruction_t div16_op =
-{
- .nr_uops = 3,
- .uop[0] = {.type = UOP_ALU0, .throughput = 21, .latency = 21},
- .uop[1] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t div16_mem_op =
-{
- .nr_uops = 4,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[0] = {.type = UOP_ALU0, .throughput = 21, .latency = 21},
- .uop[1] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t div32_op =
-{
- .nr_uops = 3,
- .uop[0] = {.type = UOP_ALU0, .throughput = 35, .latency = 35},
- .uop[1] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t div32_mem_op =
-{
- .nr_uops = 4,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[0] = {.type = UOP_ALU0, .throughput = 35, .latency = 35},
- .uop[1] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t emms_op =
-{
- .nr_uops = 11,
- .uop[0] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[6] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[7] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[8] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[9] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[10] = {.type = UOP_ALU0, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t enter_op =
-{
- .nr_uops = 14,
- .uop[0] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[6] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[7] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[8] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[9] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[10] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[11] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[12] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[13] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t io_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_LOAD, .throughput = 18, .latency = 18}
-};
-static const p6_instruction_t ins_op =
-{
- .nr_uops = 4,
- .uop[0] = {.type = UOP_ALU0, .throughput = 18, .latency = 18},
- .uop[1] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t int_op =
-{
- .nr_uops = 7,
- .uop[0] = {.type = UOP_ALU0, .throughput = 20, .latency = 20},
- .uop[1] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[6] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
-};
-static const p6_instruction_t iret_op =
-{
- .nr_uops = 4,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[2] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[3] = {.type = UOP_ALU01, .throughput = 20, .latency = 20},
-};
-static const p6_instruction_t invd_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_ALU01, .throughput = 1000, .latency = 1000}
-};
-static const p6_instruction_t jmp_far_op =
-{
- .nr_uops = 2,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU0_SEG, .throughput = 21, .latency = 21}
-};
-static const p6_instruction_t load_jmp_far_op =
-{
- .nr_uops = 3,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[2] = {.type = UOP_ALU0_SEG, .throughput = 21, .latency = 21}
-};
-static const p6_instruction_t lss_op =
-{
- .nr_uops = 11,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[2] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[3] = {.type = UOP_ALU0_SEG,.throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[6] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[7] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[8] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[9] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[10] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-/*static const p6_instruction_t mov_mem_seg_op =
-{
- .nr_uops = 3,
- .uop[0] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
-};*/
-static const p6_instruction_t mov_seg_mem_op =
-{
- .nr_uops = 9,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU0_SEG,.throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[6] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[7] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[8] = {.type = UOP_ALU0, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t mov_seg_reg_op =
-{
- .nr_uops = 8,
- .uop[0] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU0_SEG,.throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[6] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[7] = {.type = UOP_ALU0, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t mul_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_ALU0, .throughput = 1, .latency = 4}
-};
-static const p6_instruction_t mul_mem_op =
-{
- .nr_uops = 2,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU0, .throughput = 1, .latency = 4}
-};
-static const p6_instruction_t outs_op =
-{
- .nr_uops = 3,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU0, .throughput = 18, .latency = 18},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t pusha_op =
-{
- .nr_uops = 18,
- .uop[0] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[6] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[7] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[8] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[9] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[10] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[11] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[12] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[13] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[14] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[15] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[16] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[17] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t popa_op =
-{
- .nr_uops = 10,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[6] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[7] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[8] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[9] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t popf_op =
-{
- .nr_uops = 17,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[6] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[7] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[8] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[9] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[10] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[11] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[12] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[13] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[14] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[15] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[16] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
-};
-static const p6_instruction_t pushf_op =
-{
- .nr_uops = 16,
- .uop[0] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[6] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[7] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[8] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[9] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[10] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[11] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[12] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[13] = {.type = UOP_ALU0, .throughput = 1, .latency = 1},
- .uop[14] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[15] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t ret_op =
-{
- .nr_uops = 4,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU1, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t reti_op =
-{
- .nr_uops = 5,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_ALU1, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t retf_op =
-{
- .nr_uops = 4,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[2] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[3] = {.type = UOP_ALU0, .throughput = 23, .latency = 23},
-};
-static const p6_instruction_t scas_op =
-{
- .nr_uops = 3,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[1] = {.type = UOP_LOAD, .throughput = 1, .latency = 2},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t xchg_mem_op =
-{
- .nr_uops = 7,
- .uop[0] = {.type = UOP_LOAD, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[2] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[3] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[4] = {.type = UOP_STOREADDR, .throughput = 1, .latency = 1},
- .uop[5] = {.type = UOP_STOREDATA, .throughput = 1, .latency = 1},
- .uop[6] = {.type = UOP_ALU01, .throughput = 1, .latency = 1}
-};
-static const p6_instruction_t xlat_op =
-{
- .nr_uops = 2,
- .uop[0] = {.type = UOP_ALU01, .throughput = 1, .latency = 1},
- .uop[1] = {.type = UOP_LOAD, .throughput = 1, .latency = 2}
-};
-static const p6_instruction_t wbinvd_op =
-{
- .nr_uops = 1,
- .uop[0] = {.type = UOP_ALU0, .throughput = 10000, .latency = 10000}
-};
-
-#define INVALID NULL
-
-static const p6_instruction_t *opcode_timings[256] =
-{
-/* ADD ADD ADD ADD*/
-/*00*/ &alu_store_op, &alu_store_op, &load_alu_op, &load_alu_op,
-/* ADD ADD PUSH ES POP ES*/
- &alu_op, &alu_op, &push_seg_op, &mov_seg_mem_op,
-/* OR OR OR OR*/
- &alu_store_op, &alu_store_op, &load_alu_op, &load_alu_op,
-/* OR OR PUSH CS */
- &alu_op, &alu_op, &push_seg_op, INVALID,
-
-/* ADC ADC ADC ADC*/
-/*10*/ &aluc_store_op, &aluc_store_op, &load_aluc_op, &load_aluc_op,
-/* ADC ADC PUSH SS POP SS*/
- &aluc_op, &aluc_op, &push_seg_op, &mov_seg_mem_op,
-/* SBB SBB SBB SBB*/
-/*10*/ &aluc_store_op, &aluc_store_op, &load_aluc_op, &load_aluc_op,
-/* SBB SBB PUSH DS POP DS*/
- &aluc_op, &aluc_op, &push_seg_op, &mov_seg_mem_op,
-
-/* AND AND AND AND*/
-/*20*/ &alu_store_op, &alu_store_op, &load_alu_op, &load_alu_op,
-/* AND AND DAA*/
- &alu_op, &alu_op, INVALID, &alu1_op,
-/* SUB SUB SUB SUB*/
- &alu_store_op, &alu_store_op, &load_alu_op, &load_alu_op,
-/* SUB SUB DAS*/
- &alu_op, &alu_op, INVALID, &alu1_op,
-
-/* XOR XOR XOR XOR*/
-/*30*/ &alu_store_op, &alu_store_op, &load_alu_op, &load_alu_op,
-/* XOR XOR AAA*/
- &alu_op, &alu_op, INVALID, &alu1_op,
-/* CMP CMP CMP CMP*/
- &load_alu_op, &load_alu_op, &load_alu_op, &load_alu_op,
-/* CMP CMP AAS*/
- &alu_op, &alu_op, INVALID, &alu1_op,
-
-/* INC EAX INC ECX INC EDX INC EBX*/
-/*40*/ &alu_op, &alu_op, &alu_op, &alu_op,
-/* INC ESP INC EBP INC ESI INC EDI*/
- &alu_op, &alu_op, &alu_op, &alu_op,
-/* DEC EAX DEC ECX DEC EDX DEC EBX*/
- &alu_op, &alu_op, &alu_op, &alu_op,
-/* DEC ESP DEC EBP DEC ESI DEC EDI*/
- &alu_op, &alu_op, &alu_op, &alu_op,
-
-/* PUSH EAX PUSH ECX PUSH EDX PUSH EBX*/
-/*50*/ &store_op, &store_op, &store_op, &store_op,
-/* PUSH ESP PUSH EBP PUSH ESI PUSH EDI*/
- &store_op, &store_op, &store_op, &store_op,
-/* POP EAX POP ECX POP EDX POP EBX*/
- &pop_reg_op, &pop_reg_op, &pop_reg_op, &pop_reg_op,
-/* POP ESP POP EBP POP ESI POP EDI*/
- &pop_reg_op, &pop_reg_op, &pop_reg_op, &pop_reg_op,
-
-/* PUSHA POPA BOUND ARPL*/
-/*60*/ &pusha_op, &popa_op, &bound_op, &arpl_op,
- INVALID, INVALID, INVALID, INVALID,
-/* PUSH imm IMUL PUSH imm IMUL*/
- &push_imm_op, &mul_op, &push_imm_op, &mul_op,
-/* INSB INSW OUTSB OUTSW*/
- &ins_op, &ins_op, &outs_op, &outs_op,
-
-/* Jxx*/
-/*70*/ &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
-
-/*80*/ INVALID, INVALID, INVALID, INVALID,
-/* TEST TEST XCHG XCHG*/
- &load_alu_op, &load_alu_op, &xchg_mem_op, &xchg_mem_op,
-/* MOV MOV MOV MOV*/
- &store_op, &store_op, &load_op, &load_op,
-/* MOV from seg LEA MOV to seg POP*/
- &store_op, &alu0_op, &mov_seg_mem_op, &pop_mem_op,
-
-/* NOP XCHG XCHG XCHG*/
-/*90*/ &alu_op, &xchg_op, &xchg_op, &xchg_op,
-/* XCHG XCHG XCHG XCHG*/
- &xchg_op, &xchg_op, &xchg_op, &xchg_op,
-/* CBW CWD CALL far WAIT*/
- &alu_op, &alu0_op, &call_far_op, &alu_op,
-/* PUSHF POPF SAHF LAHF*/
- &pushf_op, &popf_op, &alu_op, &alu_op,
-
-/* MOV MOV MOV MOV*/
-/*a0*/ &load_op, &load_op, &store_op, &store_op,
-/* MOVSB MOVSW CMPSB CMPSW*/
- &movs_op, &movs_op, &cmps_op, &cmps_op,
-/* TEST TEST STOSB STOSW*/
- &load_alu_op, &load_alu_op, &stos_op, &stos_op,
-/* LODSB LODSW SCASB SCASW*/
- &lods_op, &lods_op, &scas_op, &scas_op,
-
-/* MOV*/
-/*b0*/ &alu_op, &alu_op, &alu_op, &alu_op,
- &alu_op, &alu_op, &alu_op, &alu_op,
- &alu_op, &alu_op, &alu_op, &alu_op,
- &alu_op, &alu_op, &alu_op, &alu_op,
-
-/* RET imm RET*/
-/*c0*/ INVALID, INVALID, &reti_op, &ret_op,
-/* LES LDS MOV MOV*/
- &lss_op, &lss_op, &store_op, &store_op,
-/* ENTER LEAVE RETF RETF*/
- &enter_op, &leave_op, &retf_op, &retf_op,
-/* INT3 INT INTO IRET*/
- &int_op, &int_op, &int_op, &iret_op,
-
-
-/*d0*/ INVALID, INVALID, INVALID, INVALID,
-/* AAM AAD SETALC XLAT*/
- &aam_op, &aad_op, &alu_op, &xlat_op,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-/* LOOPNE LOOPE LOOP JCXZ*/
-/*e0*/ &loop_op, &loop_op, &loop_op, &loop_op,
-/* IN AL IN AX OUT_AL OUT_AX*/
- &io_op, &io_op, &io_op, &io_op,
-/* CALL JMP JMP JMP*/
- &store_op, &branch_op, &jmp_far_op, &branch_op,
-/* IN AL IN AX OUT_AL OUT_AX*/
- &io_op, &io_op, &io_op, &io_op,
-
-/* REPNE REPE*/
-/*f0*/ INVALID, INVALID, INVALID, INVALID,
-/* HLT CMC*/
- &alu4_op, &alu_op, INVALID, INVALID,
-/* CLC STC CLI STI*/
- &alu_op, &alu_op, &cli_op, &sti_op,
-/* CLD STD INCDEC*/
- &alu4_op, &alu4_op, &store_op, INVALID
-};
-
-static const p6_instruction_t *opcode_timings_mod3[256] =
-{
-/* ADD ADD ADD ADD*/
-/*00*/ &alu_op, &alu_op, &alu_op, &alu_op,
-/* ADD ADD PUSH ES POP ES*/
- &alu_op, &alu_op, &push_seg_op, &mov_seg_mem_op,
-/* OR OR OR OR*/
- &alu_op, &alu_op, &alu_op, &alu_op,
-/* OR OR PUSH CS */
- &alu_op, &alu_op, &push_seg_op, INVALID,
-
-/* ADC ADC ADC ADC*/
-/*10*/ &aluc_op, &aluc_op, &aluc_op, &aluc_op,
-/* ADC ADC PUSH SS POP SS*/
- &aluc_op, &aluc_op, &push_seg_op, &mov_seg_mem_op,
-/* SBB SBB SBB SBB*/
- &aluc_op, &aluc_op, &aluc_op, &aluc_op,
-/* SBB SBB PUSH DS POP DS*/
- &aluc_op, &aluc_op, &push_seg_op, &mov_seg_mem_op,
-
-/* AND AND AND AND*/
-/*20*/ &alu_op, &alu_op, &alu_op, &alu_op,
-/* AND AND DAA*/
- &alu_op, &alu_op, INVALID, &alu1_op,
-/* SUB SUB SUB SUB*/
- &alu_op, &alu_op, &alu_op, &alu_op,
-/* SUB SUB DAS*/
- &alu_op, &alu_op, INVALID, &alu1_op,
-
-/* XOR XOR XOR XOR*/
-/*30*/ &alu_op, &alu_op, &alu_op, &alu_op,
-/* XOR XOR AAA*/
- &alu_op, &alu_op, INVALID, &alu1_op,
-/* CMP CMP CMP CMP*/
- &alu_op, &alu_op, &alu_op, &alu_op,
-/* CMP CMP AAS*/
- &alu_op, &alu_op, INVALID, &alu1_op,
-
-/* INC EAX INC ECX INC EDX INC EBX*/
-/*40*/ &alu_op, &alu_op, &alu_op, &alu_op,
-/* INC ESP INC EBP INC ESI INC EDI*/
- &alu_op, &alu_op, &alu_op, &alu_op,
-/* DEC EAX DEC ECX DEC EDX DEC EBX*/
- &alu_op, &alu_op, &alu_op, &alu_op,
-/* DEC ESP DEC EBP DEC ESI DEC EDI*/
- &alu_op, &alu_op, &alu_op, &alu_op,
-
-/* PUSH EAX PUSH ECX PUSH EDX PUSH EBX*/
-/*50*/ &store_op, &store_op, &store_op, &store_op,
-/* PUSH ESP PUSH EBP PUSH ESI PUSH EDI*/
- &store_op, &store_op, &store_op, &store_op,
-/* POP EAX POP ECX POP EDX POP EBX*/
- &pop_reg_op, &pop_reg_op, &pop_reg_op, &pop_reg_op,
-/* POP ESP POP EBP POP ESI POP EDI*/
- &pop_reg_op, &pop_reg_op, &pop_reg_op, &pop_reg_op,
-
-/* PUSHA POPA BOUND ARPL*/
-/*60*/ &pusha_op, &popa_op, &bound_op, &arpl_op,
- INVALID, INVALID, INVALID, INVALID,
-/* PUSH imm IMUL PUSH imm IMUL*/
- &push_imm_op, &mul_op, &push_imm_op, &mul_op,
-/* INSB INSW OUTSB OUTSW*/
- &ins_op, &ins_op, &outs_op, &outs_op,
-
-/* Jxx*/
-/*70*/ &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
-
-/*80*/ INVALID, INVALID, INVALID, INVALID,
-/* TEST TEST XCHG XCHG*/
- &alu_op, &alu_op, &xchg_op, &xchg_op,
-/* MOV MOV MOV MOV*/
- &store_op, &store_op, &load_op, &load_op,
-/* MOV from seg LEA MOV to seg POP*/
- &alu_op, &alu0_op, &mov_seg_reg_op, &pop_reg_op,
-
-/* NOP XCHG XCHG XCHG*/
-/*90*/ &alu_op, &xchg_op, &xchg_op, &xchg_op,
-/* XCHG XCHG XCHG XCHG*/
- &xchg_op, &xchg_op, &xchg_op, &xchg_op,
-/* CBW CWD CALL far WAIT*/
- &alu_op, &alu0_op, &call_far_op, &alu_op,
-/* PUSHF POPF SAHF LAHF*/
- &pushf_op, &popf_op, &alu_op, &alu_op,
-
-/* MOV MOV MOV MOV*/
-/*a0*/ &load_op, &load_op, &store_op, &store_op,
-/* MOVSB MOVSW CMPSB CMPSW*/
- &movs_op, &movs_op, &cmps_op, &cmps_op,
-/* TEST TEST STOSB STOSW*/
- &alu_op, &alu_op, &stos_op, &stos_op,
-/* LODSB LODSW SCASB SCASW*/
- &lods_op, &lods_op, &scas_op, &scas_op,
-
-/* MOV*/
-/*b0*/ &alu_op, &alu_op, &alu_op, &alu_op,
- &alu_op, &alu_op, &alu_op, &alu_op,
- &alu_op, &alu_op, &alu_op, &alu_op,
- &alu_op, &alu_op, &alu_op, &alu_op,
-
-/* RET imm RET*/
-/*c0*/ INVALID, INVALID, &reti_op, &ret_op,
-/* LES LDS MOV MOV*/
- &lss_op, &lss_op, &store_op, &store_op,
-/* ENTER LEAVE RETF RETF*/
- &enter_op, &leave_op, &retf_op, &retf_op,
-/* INT3 INT INTO IRET*/
- &int_op, &int_op, &int_op, &iret_op,
-
-
-/*d0*/ INVALID, INVALID, INVALID, INVALID,
-/* AAM AAD SETALC XLAT*/
- &aam_op, &aad_op, &alu_op, &xlat_op,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-/* LOOPNE LOOPE LOOP JCXZ*/
-/*e0*/ &loop_op, &loop_op, &loop_op, &loop_op,
-/* IN AL IN AX OUT_AL OUT_AX*/
- &io_op, &io_op, &io_op, &io_op,
-/* CALL JMP JMP JMP*/
- &store_op, &branch_op, &jmp_far_op, &branch_op,
-/* IN AL IN AX OUT_AL OUT_AX*/
- &io_op, &io_op, &io_op, &io_op,
-
-/* REPNE REPE*/
-/*f0*/ INVALID, INVALID, INVALID, INVALID,
-/* HLT CMC*/
- &alu4_op, &alu_op, INVALID, INVALID,
-/* CLC STC CLI STI*/
- &alu_op, &alu_op, &cli_op, &sti_op,
-/* CLD STD INCDEC*/
- &alu4_op, &alu4_op, &alu_op, INVALID
-};
-
-static const p6_instruction_t *opcode_timings_0f[256] =
-{
-/*00*/ &alu6_op, &alu6_op, &alu6_op, &alu6_op,
- INVALID, &alu6_op, &alu6_op, INVALID,
- &invd_op, &wbinvd_op, INVALID, INVALID,
- INVALID, &load_op, INVALID, INVALID,
-
-/*10*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*20*/ &alu6_op, &alu6_op, &alu6_op, &alu6_op,
- &alu6_op, &alu6_op, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*30*/ &alu6_op, &alu6_op, &alu6_op, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*40*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*50*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*60*/ &load_mmx_op, &load_mmx_op, &load_mmx_op, &load_mmx_op,
- &load_mmx_op, &load_mmx_op, &load_mmx_op, &load_mmx_op,
- &load_mmx_op, &load_mmx_op, &load_mmx_op, &load_mmx_op,
- INVALID, INVALID, &load_op, &load_op,
-
-/*70*/ INVALID, &load_mmx_shift_op, &load_mmx_shift_op, &load_mmx_shift_op,
- &load_mmx_op, &load_mmx_op, &load_mmx_op, &emms_op,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, &store_op, &store_op,
-
-/*80*/ &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
-
-/*90*/ &alu_op, &alu_op, &alu_op, &alu_op,
- &alu_op, &alu_op, &alu_op, &alu_op,
- &alu_op, &alu_op, &alu_op, &alu_op,
- &alu_op, &alu_op, &alu_op, &alu_op,
-
-/*a0*/ &push_seg_op, &mov_seg_mem_op, &cpuid_op, &load_alu_op,
- &alu_store_op, &alu_store_op, INVALID, INVALID,
- &push_seg_op, &mov_seg_mem_op, INVALID, &load_alu_op,
- &alu_store_op, &alu_store_op, INVALID, &mul_op,
-
-/*b0*/ &cmpxchg_op, &cmpxchg_op, &lss_op, &load_alu_op,
- &lss_op, &lss_op, &load_alu_op, &load_alu_op,
- INVALID, INVALID, &load_alu_op, &load_alu_op,
- &load_bsx_op, &load_bsx_op, &load_alu_op, &load_alu_op,
-
-/*c0*/ &alu_store_op, &alu_store_op, INVALID, INVALID,
- INVALID, INVALID, INVALID, &cmpxchg_op,
- &bswap_op, &bswap_op, &bswap_op, &bswap_op,
- &bswap_op, &bswap_op, &bswap_op, &bswap_op,
-
-/*d0*/ INVALID, &load_mmx_shift_op, &load_mmx_shift_op, &load_mmx_shift_op,
- INVALID, &load_mmx_mul_op, INVALID, INVALID,
- &load_mmx_op, &load_mmx_op, INVALID, &load_mmx_op,
- &load_mmx_op, &load_mmx_op, INVALID, &load_mmx_op,
-
-/*e0*/ &load_mmx_op, &load_mmx_shift_op, &load_mmx_shift_op, INVALID,
- INVALID, &load_mmx_mul_op, INVALID, INVALID,
- &load_mmx_op, &load_mmx_op, INVALID, &load_mmx_op,
- &load_mmx_op, &load_mmx_op, INVALID, &load_mmx_op,
-
-/*f0*/ INVALID, &load_mmx_shift_op, &load_mmx_shift_op, &load_mmx_shift_op,
- INVALID, &load_mmx_mul_op, INVALID, INVALID,
- &load_mmx_op, &load_mmx_op, &load_mmx_op, INVALID,
- &load_mmx_op, &load_mmx_op, &load_mmx_op, INVALID,
-};
-static const p6_instruction_t *opcode_timings_0f_mod3[256] =
-{
-/*00*/ &alu6_op, &alu6_op, &alu6_op, &alu6_op,
- INVALID, &alu6_op, &alu6_op, INVALID,
- &invd_op, &wbinvd_op, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*10*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*20*/ &alu6_op, &alu6_op, &alu6_op, &alu6_op,
- &alu6_op, &alu6_op, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*30*/ &alu6_op, &alu6_op, &alu6_op, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*40*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*50*/ INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/*60*/ &mmx_op, &mmx_op, &mmx_op, &mmx_op,
- &mmx_op, &mmx_op, &mmx_op, &mmx_op,
- &mmx_op, &mmx_op, &mmx_op, &mmx_op,
- INVALID, INVALID, &mmx_op, &mmx_op,
-
-/*70*/ INVALID, &mmx_shift_op, &mmx_shift_op, &mmx_shift_op,
- &mmx_op, &mmx_op, &mmx_op, &emms_op,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, &mmx_op, &mmx_op,
-
-/*80*/ &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
- &branch_op, &branch_op, &branch_op, &branch_op,
-
-/*90*/ &alu_op, &alu_op, &alu_op, &alu_op,
- &alu_op, &alu_op, &alu_op, &alu_op,
- &alu_op, &alu_op, &alu_op, &alu_op,
- &alu_op, &alu_op, &alu_op, &alu_op,
-
-/*a0*/ &push_seg_op, &mov_seg_mem_op, &cpuid_op, &alu_op,
- &alu_op, &alu_op, INVALID, INVALID,
- &push_seg_op, &mov_seg_mem_op, INVALID, &alu_op,
- &alu_op, &alu_op, INVALID, &mul_op,
-
-/*b0*/ &cmpxchg_op, &cmpxchg_op, &lss_op, &alu_op,
- &lss_op, &lss_op, &alu_op, &alu_op,
- INVALID, INVALID, &alu_op, &alu_op,
- &bsx_op, &bsx_op, &alu_op, &alu_op,
-
-/*c0*/ &alu_op, &alu_op, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- &bswap_op, &bswap_op, &bswap_op, &bswap_op,
- &bswap_op, &bswap_op, &bswap_op, &bswap_op,
-
-/*d0*/ INVALID, &mmx_shift_op, &mmx_shift_op, &mmx_shift_op,
- INVALID, &mmx_mul_op, INVALID, INVALID,
- &mmx_op, &mmx_op, INVALID, &mmx_op,
- &mmx_op, &mmx_op, INVALID, &mmx_op,
-
-/*e0*/ &mmx_op, &mmx_shift_op, &mmx_shift_op, INVALID,
- INVALID, &mmx_mul_op, INVALID, INVALID,
- &mmx_op, &mmx_op, INVALID, &mmx_op,
- &mmx_op, &mmx_op, INVALID, &mmx_op,
-
-/*f0*/ INVALID, &mmx_shift_op, &mmx_shift_op, &mmx_shift_op,
- INVALID, &mmx_mul_op, INVALID, INVALID,
- &mmx_op, &mmx_op, &mmx_op, INVALID,
- &mmx_op, &mmx_op, &mmx_op, INVALID,
-};
-
-static const p6_instruction_t *opcode_timings_shift[8] =
-{
- &alu0_store_op, &alu0_store_op, &rcx_store_op, &rcx_store_op,
- &alu0_store_op, &alu0_store_op, &alu0_store_op, &alu0_store_op
-};
-static const p6_instruction_t *opcode_timings_shift_mod3[8] =
-{
- &alu0_op, &alu0_op, &rcx_op, &rcx_op,
- &alu0_op, &alu0_op, &alu0_op, &alu0_op
-};
-
-static const p6_instruction_t *opcode_timings_8x[8] =
-{
- &alu_store_op, &alu_store_op, &aluc_store_op, &aluc_store_op,
- &alu_store_op, &alu_store_op, &alu_store_op, &alu_store_op,
-};
-static const p6_instruction_t *opcode_timings_8x_mod3[8] =
-{
- &alu_op, &alu_op, &aluc_op, &aluc_op,
- &alu_op, &alu_op, &alu_op, &alu_op,
-};
-
-static const p6_instruction_t *opcode_timings_f6[8] =
-{
-/* TST NOT NEG*/
- &load_alu_op, INVALID, &alu_store_op, &alu_store_op,
-/* MUL IMUL DIV IDIV*/
- &mul_mem_op, &mul_mem_op, &div16_mem_op, &div16_mem_op,
-};
-static const p6_instruction_t *opcode_timings_f6_mod3[8] =
-{
-/* TST NOT NEG*/
- &alu_op, INVALID, &alu_op, &alu_op,
-/* MUL IMUL DIV IDIV*/
- &mul_op, &mul_op, &div16_op, &div16_op,
-};
-static const p6_instruction_t *opcode_timings_f7[8] =
-{
-/* TST NOT NEG*/
- &load_alu_op, INVALID, &alu_store_op, &alu_store_op,
-/* MUL IMUL DIV IDIV*/
- &mul_mem_op, &mul_mem_op, &div32_mem_op, &div32_mem_op,
-};
-static const p6_instruction_t *opcode_timings_f7_mod3[8] =
-{
-/* TST NOT NEG*/
- &alu_op, INVALID, &alu_op, &alu_op,
-/* MUL IMUL DIV IDIV*/
- &mul_op, &mul_op, &div32_op, &div32_op,
-};
-static const p6_instruction_t *opcode_timings_ff[8] =
-{
-/* INC DEC CALL CALL far*/
- &alu_store_op, &alu_store_op, &store_op, &load_call_far_op,
-/* JMP JMP far PUSH*/
- &branch_op, &load_jmp_far_op, &push_mem_op, INVALID
-};
-static const p6_instruction_t *opcode_timings_ff_mod3[8] =
-{
-/* INC DEC CALL CALL far*/
- &alu_op, &alu_op, &store_op, &call_far_op,
-/* JMP JMP far PUSH*/
- &branch_op, &load_jmp_far_op, &push_mem_op, INVALID
-};
-
-static const p6_instruction_t *opcode_timings_d8[8] =
-{
-/* FADDs FMULs FCOMs FCOMPs*/
- &load_faddsub_op, &load_fmul_op, &fcom_op, &load_fcom_op,
-/* FSUBs FSUBRs FDIVs FDIVRs*/
- &load_faddsub_op, &load_faddsub_op, &fdiv_mem_op, &fdiv_mem_op,
-};
-static const p6_instruction_t *opcode_timings_d8_mod3[8] =
-{
-/* FADD FMUL FCOM FCOMP*/
- &faddsub_op, &fmul_op, &fcom_op, &fcom_op,
-/* FSUB FSUBR FDIV FDIVR*/
- &faddsub_op, &faddsub_op, &fdiv_op, &fdiv_op,
-};
-
-static const p6_instruction_t *opcode_timings_d9[8] =
-{
-/* FLDs FSTs FSTPs*/
- &load_op, INVALID, &store_op, &store_op,
-/* FLDENV FLDCW FSTENV FSTCW*/
- &flde_op, &fldcw_op, &fste_op, &fstsw_mem_op
-};
-static const p6_instruction_t *opcode_timings_d9_mod3[64] =
-{
- /*FLD*/
- &float_op, &float_op, &float_op, &float_op,
- &float_op, &float_op, &float_op, &float_op,
- /*FXCH*/
- &fxch_op, &fxch_op, &fxch_op, &fxch_op,
- &fxch_op, &fxch_op, &fxch_op, &fxch_op,
- /*FNOP*/
- &float_op, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- /*FSTP*/
- &float_op, &float_op, &float_op, &float_op,
- &float_op, &float_op, &float_op, &float_op,
-/* opFCHS opFABS*/
- &float_op, &float_op, INVALID, INVALID,
-/* opFTST opFXAM*/
- &float_op, &float_op, INVALID, INVALID,
-/* opFLD1 opFLDL2T opFLDL2E opFLDPI*/
- &float_op, &float_op, &float_op, &float_op,
-/* opFLDEG2 opFLDLN2 opFLDZ*/
- &float_op, &float_op, &float_op, INVALID,
-/* opF2XM1 opFYL2X opFPTAN opFPATAN*/
- &fsin_op, &fsin_op, &fsin_op, &fsin_op,
-/* opFDECSTP opFINCSTP,*/
- INVALID, INVALID, &float_op, &float_op,
-/* opFPREM opFSQRT opFSINCOS*/
- &fdiv_op, INVALID, &fsqrt_op, &fsin_op,
-/* opFRNDINT opFSCALE opFSIN opFCOS*/
- &float_op, &fdiv_op, &fsin_op, &fsin_op
-};
-
-static const p6_instruction_t *opcode_timings_da[8] =
-{
-/* FIADDl FIMULl FICOMl FICOMPl*/
- &load_fi_op, &load_fi_op, &load_fcom_op, &load_fcom_op,
-/* FISUBl FISUBRl FIDIVl FIDIVRl*/
- &load_fi_op, &load_fi_op, &load_fi_op, &load_fi_op,
-};
-static const p6_instruction_t *opcode_timings_da_mod3[8] =
-{
- INVALID, INVALID, INVALID, INVALID,
-/* FCOMPP*/
- INVALID, &fcompp_op, INVALID, INVALID
-};
-
-static const p6_instruction_t *opcode_timings_db[8] =
-{
-/* FLDil FSTil FSTPil*/
- &fild_op, INVALID, &fist_op, &fist_op,
-/* FLDe FSTPe*/
- INVALID, &flde_op, INVALID, &fste_op
-};
-static const p6_instruction_t *opcode_timings_db_mod3[64] =
-{
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/* opFNOP opFCLEX opFINIT*/
- INVALID, &float_op, &float_op, &float_op,
-/* opFNOP opFNOP*/
- &float_op, &float_op, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-};
-
-static const p6_instruction_t *opcode_timings_dc[8] =
-{
-/* FADDd FMULd FCOMd FCOMPd*/
- &load_faddsub_op, &load_fmul_op, &load_fcom_op, &load_fcom_op,
-/* FSUBd FSUBRd FDIVd FDIVRd*/
- &load_faddsub_op, &load_faddsub_op, &fdiv_mem_op, &fdiv_mem_op,
-};
-static const p6_instruction_t *opcode_timings_dc_mod3[8] =
-{
-/* opFADDr opFMULr*/
- &faddsub_op, &fmul_op, INVALID, INVALID,
-/* opFSUBRr opFSUBr opFDIVRr opFDIVr*/
- &faddsub_op, &faddsub_op, &fdiv_op, &fdiv_op
-};
-
-static const p6_instruction_t *opcode_timings_dd[8] =
-{
-/* FLDd FSTd FSTPd*/
- &load_op, INVALID, &store_op, &store_op,
-/* FRSTOR FSAVE FSTSW*/
- &frstor_op, INVALID, &fsave_op, &fstsw_mem_op
-};
-static const p6_instruction_t *opcode_timings_dd_mod3[8] =
-{
-/* FFFREE FST FSTP*/
- &float_op, INVALID, &float_op, &float_op,
-/* FUCOM FUCOMP*/
- &float_op, &float_op, INVALID, INVALID
-};
-
-static const p6_instruction_t *opcode_timings_de[8] =
-{
-/* FIADDw FIMULw FICOMw FICOMPw*/
- &load_fi_op, &load_fi_op, &load_fcom_op, &load_fcom_op,
-/* FISUBw FISUBRw FIDIVw FIDIVRw*/
- &load_fi_op, &load_fi_op, &load_fi_op, &load_fi_op,
-};
-static const p6_instruction_t *opcode_timings_de_mod3[8] =
-{
-/* FADDP FMULP FCOMPP*/
- &faddsub_op, &fmul_op, INVALID, &fcompp_op,
-/* FSUBP FSUBRP FDIVP FDIVRP*/
- &faddsub_op, &faddsub_op, &fdiv_op, &fdiv_op,
-};
-
-static const p6_instruction_t *opcode_timings_df[8] =
-{
-/* FILDiw FISTiw FISTPiw*/
- &fild_op, INVALID, &fist_op, &fist_op,
-/* FILDiq FBSTP FISTPiq*/
- INVALID, &fild_op, &fbstp_op, &fist_op,
-};
-static const p6_instruction_t *opcode_timings_df_mod3[8] =
-{
- INVALID, INVALID, INVALID, INVALID,
-/* FSTSW AX*/
- &fstsw_ax_op, INVALID, INVALID, INVALID
-};
-
-
-static uint8_t last_prefix;
-static int prefixes;
-
-static int decode_timestamp;
-static int last_complete_timestamp;
-
-typedef struct p6_unit_t
-{
- const uint32_t uop_mask;
- const int port;
- int first_available_cycle;
-} p6_unit_t;
-
-enum
-{
- UNIT_INT0 = 0,
- UNIT_INT1,
- UNIT_FPU,
- UNIT_MMX_ADD,
- UNIT_MMX_MUL,
- UNIT_JUMP,
- UNIT_LOAD,
- UNIT_STORE_ADDR,
- UNIT_STORE_DATA
-};
-
-/*Each port can only be used once per clock*/
-typedef struct p6_port_t
-{
- uint32_t unit_mask;
-} p6_port_t;
-
-static int port_last_timestamps[5];
-
-static const p6_port_t ports[] =
-{
- {UNIT_INT0 | UNIT_FPU | UNIT_MMX_MUL},
- {UNIT_INT1 | UNIT_MMX_ADD | UNIT_JUMP},
- {UNIT_LOAD},
- {UNIT_STORE_ADDR},
- {UNIT_STORE_DATA}
-};
-const int nr_ports = (sizeof(ports) / sizeof(p6_port_t));
-
-static p6_unit_t units[] =
-{
- [UNIT_INT0] = {.uop_mask = (1 << UOP_ALU0) | (1 << UOP_ALU0_SEG) | (1 << UOP_ALU01), .port = 0}, /*Integer 0*/
- [UNIT_INT1] = {.uop_mask = (1 << UOP_ALU1) | (1 << UOP_ALU01), .port = 1}, /*Integer 1*/
- [UNIT_FPU] = {.uop_mask = 1 << UOP_FLOAT, .port = 0},
- [UNIT_MMX_ADD] = {.uop_mask = 0, .port = 1},
- [UNIT_MMX_MUL] = {.uop_mask = 0, .port = 0},
- [UNIT_JUMP] = {.uop_mask = 1 << UOP_BRANCH, .port = 1},
- [UNIT_LOAD] = {.uop_mask = 1 << UOP_LOAD, .port = 2},
- [UNIT_STORE_ADDR] = {.uop_mask = 1 << UOP_STOREADDR, .port = 3},
- [UNIT_STORE_DATA] = {.uop_mask = 1 << UOP_STOREDATA, .port = 4}
-};
-const int nr_units = (sizeof(units) / sizeof(p6_unit_t));
-
-static int rat_timestamp = 0;
-static int rat_uops = 0;
-
-static int uop_run(const p6_uop_t *uop, int decode_time)
-{
- int c;
- p6_unit_t *best_unit = NULL;
- int best_start_cycle = 99999;
-
- /*Peak of 3 uOPs from decode to RAT per cycle*/
- if (decode_time < rat_timestamp)
- decode_time = rat_timestamp;
- else if (decode_time > rat_timestamp)
- {
- rat_timestamp = decode_time;
- rat_uops = 0;
- }
-
- rat_uops++;
- if (rat_uops == 3)
- {
- rat_timestamp++;
- rat_uops = 0;
- }
-
-
- /*Find execution unit for this uOP*/
- for (c = 0; c < nr_units; c++)
- {
- p6_unit_t *unit = &units[c];
- if (unit->uop_mask & (1 << uop->type))
- {
- int start_cycle = MAX(unit->first_available_cycle,
- port_last_timestamps[units[c].port]);
-
- if (start_cycle < best_start_cycle)
- {
- best_unit = unit;
- best_start_cycle = start_cycle;
- }
- }
- }
- if (!best_unit)
- fatal("uop_run: can not find execution unit %x\n", uop->type);
-
- if (cpu_s->cpu_type == CPU_PENTIUMPRO && uop->type == UOP_ALU0_SEG)
- {
- /*Pentium Pro will flush pipeline on a segment load. Find last
- execution unit to complete, then set earliest start times on
- _all_ execution units to after this point*/
- int last_start_cycle = 0;
-
- for (c = 0; c < nr_units; c++)
- {
- p6_unit_t *unit = &units[c];
- int start_cycle = unit->first_available_cycle;
-
- if (start_cycle > last_start_cycle)
- last_start_cycle = start_cycle;
- }
- for (c = 0; c < nr_units; c++)
- units[c].first_available_cycle = last_start_cycle+1;
- }
- if (best_start_cycle < decode_time)
- best_start_cycle = decode_time;
- best_unit->first_available_cycle = best_start_cycle + uop->throughput;
- port_last_timestamps[best_unit->port] = best_start_cycle + 1;
-
- return best_start_cycle + uop->throughput;
-// return decode_time+1;
-}
-
-/*The P6 decoder can decode up to three instructions per clock
- First can be up to 4 uOPs
- Second and third must be 1 uOP each
- Up to 16 bytes per cycle
- 1 cycle per prefix beyond 1 prefix
- 0x66 causes delays if instruction has immediate
- 0x67 causes delays if modr/m present (and mod != 3)
-*/
-static struct
-{
- int nr_ins;
- int nr_uops;
- const p6_uop_t *uops[6];
- /*Earliest time a uop can start. If the timestamp is -1, then the uop is
- part of a dependency chain and the start time is the completion time of
- the previous uop*/
- int earliest_start[6];
-} decode_buffer;
-
-#define NR_REGS 8
-/*Timestamp of when last operation on an integer register completed*/
-static int reg_available_timestamp[NR_REGS];
-/*Timestamp of when last operation on an FPU register completed*/
-static int fpu_st_timestamp[8];
-/*Completion time of the last uop to be processed. Used to calculate timing of
- dependent uop chains*/
-static int last_uop_timestamp = 0;
-
-static int ifetch_length = 0;
-static int has_66_prefix, has_67_prefix;
-
-static void decode_flush()
-{
- int c;
- int uop_timestamp = 0;
-
- /*Ensure that uops can not be submitted before they have been decoded*/
- if (decode_timestamp > last_uop_timestamp)
- last_uop_timestamp = decode_timestamp;
-
- /*Submit uops to execution units, and determine the latest completion time*/
- for (c = 0; c < decode_buffer.nr_uops; c++)
- {
- int start_timestamp;
-
-// pclog("uOP %i, %p\n", c, decode_buffer.uops[c]);
-
- if (decode_buffer.earliest_start[c] == -1)
- start_timestamp = last_uop_timestamp;
- else
- start_timestamp = decode_buffer.earliest_start[c];
-
- last_uop_timestamp = uop_run(decode_buffer.uops[c], start_timestamp);
- if (last_uop_timestamp > uop_timestamp)
- uop_timestamp = last_uop_timestamp;
- }
-
- /*Calculate opquad completion time. Since opquads complete in order, it
- must be after the last completion.*/
- if (uop_timestamp <= last_complete_timestamp)
- last_complete_timestamp = last_complete_timestamp + 1;
- else
- last_complete_timestamp = uop_timestamp;
-
- decode_timestamp++;
- decode_buffer.nr_uops = 0;
- decode_buffer.nr_ins = 0;
- ifetch_length = 0;
-}
-
-/*The instruction is only of interest here if it's longer than 8 bytes, as that's the
- limit on P6 short decoding*/
-static int codegen_timing_instr_length(uint64_t deps, uint32_t fetchdat, int op_32)
-{
- int len = prefixes + 1; /*Opcode*/
- if (deps & MODRM)
- {
- len++; /*ModR/M*/
- if (deps & HAS_IMM8)
- len++;
- if (deps & HAS_IMM1632)
- len += (op_32 & 0x100) ? 4 : 2;
-
- if (op_32 & 0x200)
- {
- if ((fetchdat & 7) == 4 && (fetchdat & 0xc0) != 0xc0)
- {
- /* Has SIB*/
- len++;
- if ((fetchdat & 0xc0) == 0x40)
- len++;
- else if ((fetchdat & 0xc0) == 0x80)
- len += 4;
- else if ((fetchdat & 0x700) == 0x500)
- len += 4;
- }
- else
- {
- if ((fetchdat & 0xc0) == 0x40)
- len++;
- else if ((fetchdat & 0xc0) == 0x80)
- len += 4;
- else if ((fetchdat & 0xc7) == 0x05)
- len += 4;
- }
- }
- else
- {
- if ((fetchdat & 0xc0) == 0x40)
- len++;
- else if ((fetchdat & 0xc0) == 0x80)
- len += 2;
- else if ((fetchdat & 0xc7) == 0x06)
- len += 2;
- }
- }
-
- return len;
-}
-
-static void decode_instruction(const p6_instruction_t *ins, uint64_t deps, uint32_t fetchdat, int op_32, uint32_t op_pc, int bit8)
-{
- uint32_t regmask_required;
- uint32_t regmask_modified;
- int c, d;
- int earliest_start;
- int instr_length = codegen_timing_instr_length(deps, fetchdat, op_32);
-
- if (has_66_prefix && (deps & HAS_IMM1632))
- decode_timestamp += 2;
- if (has_67_prefix && (deps & MODRM))
- decode_timestamp += 4;
-
- earliest_start = decode_timestamp;
-
- /*Generate input register mask, and determine the earliest time this
- instruction can start. This is not accurate, as this is calculated per
- x86 instruction when it should be handled per uop*/
- regmask_required = get_dstdep_mask(deps, fetchdat, bit8);
- regmask_required |= get_addr_regmask(deps, fetchdat, op_32);
- for (c = 0; c < 8; c++)
- {
- if (regmask_required & (1 << c))
- {
- if (reg_available_timestamp[c] > decode_timestamp)
- earliest_start = reg_available_timestamp[c];
- }
- }
- if ((deps & FPU_RW_ST0) && fpu_st_timestamp[0] > decode_timestamp)
- earliest_start = fpu_st_timestamp[0];
- if ((deps & FPU_RW_ST1) && fpu_st_timestamp[1] > decode_timestamp)
- earliest_start = fpu_st_timestamp[1];
- if ((deps & FPU_RW_STREG))
- {
- int reg = fetchdat & 7;
-
- if (fpu_st_timestamp[reg] > decode_timestamp)
- earliest_start = fpu_st_timestamp[reg];
- }
-
-// pclog("ins->nr_uops=%i decode_buffer.nr_uops=%i decode_buffer.nr_ins=%i instr_length=%i\n", ins->nr_uops, decode_buffer.nr_uops, decode_buffer.nr_ins, instr_length);
-
- /*Can only decode 16 bytes per cycle*/
- if ((ifetch_length + instr_length) > 16)
- decode_flush();
- else
- ifetch_length += instr_length;
-
- if (ins->nr_uops > 4)
- {
-// pclog("Long decode\n");
- /*Multi-cycle decode (> 4 uOPs) instruction*/
- if (decode_buffer.nr_ins)
- decode_flush();
-
- d = 0;
-
- for (c = 0; c < ins->nr_uops; c++)
- {
- decode_buffer.uops[d] = &ins->uop[c];
- if (c == 0)
- decode_buffer.earliest_start[d] = earliest_start;
- else
- decode_buffer.earliest_start[d] = -1;
- d++;
-
- if (d == 4)
- {
- d = 0;
- decode_buffer.nr_uops = 4;
- decode_flush();
- }
- }
- if (d)
- {
- decode_buffer.nr_uops = d;
- decode_flush();
- }
- }
- else if (ins->nr_uops > 1 || instr_length > 8)
- {
-// pclog("Mid decode\n");
- /*Long (> 1 uOPs) instruction*/
- if (decode_buffer.nr_ins)
- decode_flush();
-
- decode_buffer.nr_uops = ins->nr_uops;
-
- for (c = 0; c < ins->nr_uops; c++)
- {
- decode_buffer.uops[c] = &ins->uop[c];
- if (c == 0)
- decode_buffer.earliest_start[c] = earliest_start;
- else
- decode_buffer.earliest_start[c] = -1;
- }
- decode_buffer.nr_ins++;
- }
- else if (ins->nr_uops == 1)
- {
-// pclog("Short decode\n");
- /*Short (1 uOP) instruction*/
- decode_buffer.uops[decode_buffer.nr_uops] = &ins->uop[0];
- decode_buffer.earliest_start[decode_buffer.nr_uops] = earliest_start;
- decode_buffer.nr_ins++;
- decode_buffer.nr_uops++;
-
- if (decode_buffer.nr_ins == 3)
- decode_flush();
- }
-
- /*Update write timestamps for any output registers*/
- regmask_modified = get_dstdep_mask(deps, fetchdat, bit8);
- for (c = 0; c < 8; c++)
- {
- if (regmask_modified & (1 << c))
- reg_available_timestamp[c] = last_complete_timestamp;
- }
- if (deps & FPU_POP)
- {
- for (c = 0; c < 7; c++)
- fpu_st_timestamp[c] = fpu_st_timestamp[c+1];
- fpu_st_timestamp[7] = 0;
- }
- if (deps & FPU_POP2)
- {
- for (c = 0; c < 6; c++)
- fpu_st_timestamp[c] = fpu_st_timestamp[c+2];
- fpu_st_timestamp[6] = fpu_st_timestamp[7] = 0;
- }
- if (deps & FPU_PUSH)
- {
- for (c = 0; c < 7; c++)
- fpu_st_timestamp[c+1] = fpu_st_timestamp[c];
- fpu_st_timestamp[0] = 0;
- }
- if (deps & FPU_WRITE_ST0)
- fpu_st_timestamp[0] = last_complete_timestamp;
- if (deps & FPU_WRITE_ST1)
- fpu_st_timestamp[1] = last_complete_timestamp;
- if (deps & FPU_WRITE_STREG)
- {
- int reg = fetchdat & 7;
- if (deps & FPU_POP)
- reg--;
- if (reg >= 0 &&
- !(reg == 0 && (deps & FPU_WRITE_ST0)) &&
- !(reg == 1 && (deps & FPU_WRITE_ST1)))
- fpu_st_timestamp[reg] = last_complete_timestamp;
- }
-}
-
-void codegen_timing_p6_block_start()
-{
- int c;
-
- for (c = 0; c < nr_units; c++)
- units[c].first_available_cycle = 0;
-
- decode_timestamp = 0;
- last_complete_timestamp = 0;
-
- rat_timestamp = 0;
- rat_uops = 0;
-
- for (c = 0; c < 5; c++)
- port_last_timestamps[c] = 0;
-
- for (c = 0; c < NR_REGS; c++)
- reg_available_timestamp[c] = 0;
- for (c = 0; c < 8; c++)
- fpu_st_timestamp[c] = 0;
-
- ifetch_length = 0;
-}
-
-void codegen_timing_p6_start()
-{
-// units = p6_units;
-// nr_units = NR_P6_UNITS;
- last_prefix = 0;
- prefixes = 0;
- has_66_prefix = 0;
- has_67_prefix = 0;
-}
-
-/*Prefixes :
- - first is free
- - operand size prefix has a penalty of 'a few clocks' if instruction has 16 or
- 32 bit immediate
- - address size prefix has penalty if instruction has explicit memory operand*/
-void codegen_timing_p6_prefix(uint8_t prefix, uint32_t fetchdat)
-{
- if (last_prefix) /*First prefix is free*/
- decode_timestamp++;
- if (prefix == 0x66)
- has_66_prefix = 1;
- if (prefix == 0x67)
- has_67_prefix = 1;
-
- last_prefix = prefix;
- prefixes++;
-}
-
-void codegen_timing_p6_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t op_pc)
-{
- const p6_instruction_t **ins_table;
- uint64_t *deps;
- int mod3 = ((fetchdat & 0xc0) == 0xc0);
- int old_last_complete_timestamp = last_complete_timestamp;
- int bit8 = !(opcode & 1);
-
-// pclog("timing_opcode %02x\n", opcode);
- switch (last_prefix)
- {
- case 0x0f:
- ins_table = mod3 ? opcode_timings_0f_mod3 : opcode_timings_0f;
- deps = mod3 ? opcode_deps_0f_mod3 : opcode_deps_0f;
-// pclog("timings 0f\n");
- break;
-
- case 0xd8:
- ins_table = mod3 ? opcode_timings_d8_mod3 : opcode_timings_d8;
- deps = mod3 ? opcode_deps_d8_mod3 : opcode_deps_d8;
- opcode = (opcode >> 3) & 7;
-// pclog("timings d8\n");
- break;
- case 0xd9:
- ins_table = mod3 ? opcode_timings_d9_mod3 : opcode_timings_d9;
- deps = mod3 ? opcode_deps_d9_mod3 : opcode_deps_d9;
- opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
-// pclog("timings d9\n");
- break;
- case 0xda:
- ins_table = mod3 ? opcode_timings_da_mod3 : opcode_timings_da;
- deps = mod3 ? opcode_deps_da_mod3 : opcode_deps_da;
- opcode = (opcode >> 3) & 7;
-// pclog("timings da\n");
- break;
- case 0xdb:
- ins_table = mod3 ? opcode_timings_db_mod3 : opcode_timings_db;
- deps = mod3 ? opcode_deps_db_mod3 : opcode_deps_db;
- opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
-// pclog("timings db\n");
- break;
- case 0xdc:
- ins_table = mod3 ? opcode_timings_dc_mod3 : opcode_timings_dc;
- deps = mod3 ? opcode_deps_dc_mod3 : opcode_deps_dc;
- opcode = (opcode >> 3) & 7;
-// pclog("timings dc\n");
- break;
- case 0xdd:
- ins_table = mod3 ? opcode_timings_dd_mod3 : opcode_timings_dd;
- deps = mod3 ? opcode_deps_dd_mod3 : opcode_deps_dd;
- opcode = (opcode >> 3) & 7;
-// pclog("timings dd\n");
- break;
- case 0xde:
- ins_table = mod3 ? opcode_timings_de_mod3 : opcode_timings_de;
- deps = mod3 ? opcode_deps_de_mod3 : opcode_deps_de;
- opcode = (opcode >> 3) & 7;
-// pclog("timings de\n");
- break;
- case 0xdf:
- ins_table = mod3 ? opcode_timings_df_mod3 : opcode_timings_df;
- deps = mod3 ? opcode_deps_df_mod3 : opcode_deps_df;
- opcode = (opcode >> 3) & 7;
-// pclog("timings df\n");
- break;
-
- default:
- switch (opcode)
- {
- case 0x80: case 0x81: case 0x82: case 0x83:
- ins_table = mod3 ? opcode_timings_8x_mod3 : opcode_timings_8x;
- deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings 80 %p %p %p\n", (void *)timings, (void *)opcode_timings_mod3, (void *)opcode_timings_8x);
- break;
-
- case 0xc0: case 0xd0: case 0xd2:
- case 0xc1: case 0xd1: case 0xd3:
- ins_table = mod3 ? opcode_timings_shift_mod3 : opcode_timings_shift;
- deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings c1\n");
- break;
-
- case 0xf6:
- ins_table = mod3 ? opcode_timings_f6_mod3 : opcode_timings_f6;
- deps = mod3 ? opcode_deps_f6_mod3 : opcode_deps_f6;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings f6\n");
- break;
- case 0xf7:
- ins_table = mod3 ? opcode_timings_f7_mod3 : opcode_timings_f7;
- deps = mod3 ? opcode_deps_f7_mod3 : opcode_deps_f7;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings f7\n");
- break;
- case 0xff:
- ins_table = mod3 ? opcode_timings_ff_mod3 : opcode_timings_ff;
- deps = mod3 ? opcode_deps_ff_mod3 : opcode_deps_ff;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings ff\n");
- break;
-
- default:
- ins_table = mod3 ? opcode_timings_mod3 : opcode_timings;
- deps = mod3 ? opcode_deps_mod3 : opcode_deps;
-// pclog("timings normal\n");
- break;
- }
- }
-
- if (ins_table[opcode])
- decode_instruction(ins_table[opcode], deps[opcode], fetchdat, op_32, op_pc, bit8);
- else
- decode_instruction(&alu01_op, 0, fetchdat, op_32, op_pc, bit8);
- codegen_block_cycles += (last_complete_timestamp - old_last_complete_timestamp);
-}
-
-void codegen_timing_p6_block_end()
-{
- if (decode_buffer.nr_ins)
- {
- int old_last_complete_timestamp = last_complete_timestamp;
- decode_flush();
- codegen_block_cycles += (last_complete_timestamp - old_last_complete_timestamp);
- }
-// pclog("codegen_block_cycles=%i\n", codegen_block_cycles);
-}
-
-int codegen_timing_p6_jump_cycles()
-{
- if (decode_buffer.nr_uops)
- return 1;
- return 0;
-}
-
-codegen_timing_t codegen_timing_p6 =
-{
- codegen_timing_p6_start,
- codegen_timing_p6_prefix,
- codegen_timing_p6_opcode,
- codegen_timing_p6_block_start,
- codegen_timing_p6_block_end,
- codegen_timing_p6_jump_cycles
-};
-
diff --git a/src/codegen_timing_pentium.c b/src/codegen_timing_pentium.c
index 9690087..0fbf5e6 100644
--- a/src/codegen_timing_pentium.c
+++ b/src/codegen_timing_pentium.c
@@ -2,11 +2,10 @@
- U/V integer pairing
- FPU/FXCH pairing
- Prefix decode delay (including shadowing)
- - FPU latencies
- - AGI stalls
Elements not taken into account :
- Branch prediction (beyond most simplistic approximation)
- PMMX decode queue
+ - FPU latencies
- MMX latencies
*/
@@ -17,10 +16,6 @@
#include "x87.h"
#include "mem.h"
#include "codegen.h"
-#include "codegen_ops.h"
-#include "codegen_timing_common.h"
-
-
/*Instruction has different execution time for 16 and 32 bit data. Does not pair */
#define CYCLES_HAS_MULTI (1 << 28)
@@ -42,126 +37,179 @@ static int pair_timings[4][4] =
/*Instruction follows either register timing, read-modify, or read-modify-write.
May be pairable*/
-#define CYCLES_REG (0ull << 0)
-#define CYCLES_RM (1ull << 0)
-#define CYCLES_RMW (2ull << 0)
-#define CYCLES_BRANCH (3ull << 0)
+#define CYCLES_REG (0 << 0)
+#define CYCLES_RM (1 << 0)
+#define CYCLES_RMW (2 << 0)
+#define CYCLES_BRANCH (3 << 0)
-/*Instruction has immediate data. Can only be used with PAIR_U/PAIR_V/PAIR_UV*/
-#define CYCLES_HASIMM (3ull << 2)
-#define CYCLES_IMM8 (1ull << 2)
-#define CYCLES_IMM1632 (2ull << 2)
-
-#define CYCLES_MASK ((1ull << 7) - 1)
+#define CYCLES_MASK ((1 << 7) - 1)
+/*Instruction is MMX shift or pack/unpack instruction*/
+#define MMX_SHIFTPACK (1 << 7)
+/*Instruction is MMX multiply instruction*/
+#define MMX_MULTIPLY (1 << 8)
/*Instruction does not pair*/
-#define PAIR_NP (0ull << 29)
+#define PAIR_NP (0 << 29)
/*Instruction pairs in U pipe only*/
-#define PAIR_U (1ull << 29)
+#define PAIR_U (1 << 29)
/*Instruction pairs in V pipe only*/
-#define PAIR_V (2ull << 29)
+#define PAIR_V (2 << 29)
/*Instruction pairs in both U and V pipes*/
-#define PAIR_UV (3ull << 29)
+#define PAIR_UV (3 << 29)
/*Instruction pairs in U pipe only and only with FXCH*/
-#define PAIR_FX (5ull << 29)
+#define PAIR_FX (5 << 29)
/*Instruction is FXCH and only pairs in V pipe with FX pairable instruction*/
-#define PAIR_FXCH (6ull << 29)
+#define PAIR_FXCH (6 << 29)
-#define PAIR_FPU (4ull << 29)
+#define PAIR_MASK (7 << 29)
-#define PAIR_MASK (7ull << 29)
+/*Instruction has input dependency on register in REG field*/
+#define SRCDEP_REG (1 << 9)
+/*Instruction has input dependency on register in R/M field*/
+#define SRCDEP_RM (1 << 10)
+/*Instruction modifies register in REG field*/
+#define DSTDEP_REG (1 << 11)
+/*Instruction modifies register in R/M field*/
+#define DSTDEP_RM (1 << 12)
+/*Instruction has input dependency on given register*/
+#define SRCDEP_EAX (1 << 13)
+#define SRCDEP_ECX (1 << 14)
+#define SRCDEP_EDX (1 << 15)
+#define SRCDEP_EBX (1 << 16)
+#define SRCDEP_ESP (1 << 17)
+#define SRCDEP_EBP (1 << 18)
+#define SRCDEP_ESI (1 << 19)
+#define SRCDEP_EDI (1 << 20)
-/*comp_time = cycles until instruction complete
- i_overlap = cycles that overlap with integer
- f_overlap = cycles that overlap with subsequent FPU*/
-#define FPU_CYCLES(comp_time, i_overlap, f_overlap) ((uint64_t)comp_time) | ((uint64_t)i_overlap << 41) | ((uint64_t)f_overlap << 49) | PAIR_FPU
-
-#define FPU_COMP_TIME(timing) (timing & 0xff)
-#define FPU_I_OVERLAP(timing) ((timing >> 41) & 0xff)
-#define FPU_F_OVERLAP(timing) ((timing >> 49) & 0xff)
-
-#define FPU_I_LATENCY(timing) (FPU_COMP_TIME(timing) - FPU_I_OVERLAP(timing))
-
-#define FPU_F_LATENCY(timing) (FPU_I_OVERLAP(timing) - FPU_F_OVERLAP(timing))
-
-#define FPU_RESULT_LATENCY(timing) ((timing >> 41) & 0xff)
-
+/*Instruction modifies given register*/
+#define DSTDEP_EAX (1 << 21)
+#define DSTDEP_ECX (1 << 22)
+#define DSTDEP_EDX (1 << 23)
+#define DSTDEP_EBX (1 << 24)
+#define DSTDEP_ESP (1 << 25)
+#define DSTDEP_EBP (1 << 26)
+#define DSTDEP_ESI (1 << 27)
+#define DSTDEP_EDI (1 << 28)
#define INVALID 0
static int u_pipe_full;
static uint32_t u_pipe_opcode;
-static uint64_t *u_pipe_timings;
+static uint32_t *u_pipe_timings;
static uint32_t u_pipe_op_32;
static uint32_t u_pipe_regmask;
-static uint32_t u_pipe_fetchdat;
-static int u_pipe_decode_delay_offset;
-static uint64_t *u_pipe_deps;
-static uint32_t regmask_modified;
+#define REGMASK_SHIFTPACK (1 << 8)
+#define REGMASK_MULTIPLY (1 << 8)
-static uint32_t addr_regmask;
-
-static int fpu_latency;
-static int fpu_st_latency[8];
-
-static uint64_t opcode_timings[256] =
+static uint32_t get_srcdep_mask(uint32_t data, uint32_t fetchdat, int bit8)
{
-/* ADD ADD ADD ADD*/
-/*00*/ PAIR_UV | CYCLES_RMW, PAIR_UV | CYCLES_RMW, PAIR_UV | CYCLES_RM, PAIR_UV | CYCLES_RM,
-/* ADD ADD PUSH ES POP ES*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(3),
-/* OR OR OR OR*/
- PAIR_UV | CYCLES_RMW, PAIR_UV | CYCLES_RMW, PAIR_UV | CYCLES_RM, PAIR_UV | CYCLES_RM,
-/* OR OR PUSH CS */
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_NP | CYCLES(1), INVALID,
-
-/* ADC ADC ADC ADC*/
-/*10*/ PAIR_U | CYCLES_RMW, PAIR_U | CYCLES_RMW, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM,
-/* ADC ADC PUSH SS POP SS*/
- PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(3),
-/* SBB SBB SBB SBB*/
- PAIR_U | CYCLES_RMW, PAIR_U | CYCLES_RMW, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM,
-/* SBB SBB PUSH DS POP DS*/
- PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(3),
-
-/* AND AND AND AND*/
-/*20*/ PAIR_UV | CYCLES_RMW, PAIR_UV | CYCLES_RMW, PAIR_UV | CYCLES_RM, PAIR_UV | CYCLES_RM,
-/* AND AND DAA*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID, PAIR_NP | CYCLES(3),
-/* SUB SUB SUB SUB*/
- PAIR_UV | CYCLES_RMW, PAIR_UV | CYCLES_RMW, PAIR_UV | CYCLES_RM, PAIR_UV | CYCLES_RM,
-/* SUB SUB DAS*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID, PAIR_NP | CYCLES(3),
+ uint32_t mask = 0;
+ if (data & SRCDEP_REG)
+ {
+ int reg = (fetchdat >> 3) & 7;
+ if (bit8)
+ reg &= 3;
+ mask |= (1 << reg);
+ }
+ if (data & SRCDEP_RM)
+ {
+ int reg = fetchdat & 7;
+ if (bit8)
+ reg &= 3;
+ mask |= (1 << reg);
+ }
+ mask |= ((data >> 16) & 0xff);
+ if (data & MMX_SHIFTPACK)
+ mask |= REGMASK_SHIFTPACK;
+ if (data & MMX_MULTIPLY)
+ mask |= REGMASK_MULTIPLY;
-/* XOR XOR XOR XOR*/
-/*30*/ PAIR_UV | CYCLES_RMW, PAIR_UV | CYCLES_RMW, PAIR_UV | CYCLES_RM, PAIR_UV | CYCLES_RM,
-/* XOR XOR AAA*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID, PAIR_NP | CYCLES(3),
-/* CMP CMP CMP CMP*/
- PAIR_UV | CYCLES_RM, PAIR_UV | CYCLES_RM, PAIR_UV | CYCLES_RM, PAIR_UV | CYCLES_RM,
-/* CMP CMP AAS*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID, PAIR_NP | CYCLES(3),
+ return mask;
+}
-/* INC EAX INC ECX INC EDX INC EBX*/
-/*40*/ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* INC ESP INC EBP INC ESI INC EDI*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* DEC EAX DEC ECX DEC EDX DEC EBX*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* DEC ESP DEC EBP DEC ESI DEC EDI*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
+static uint32_t get_dstdep_mask(uint32_t data, uint32_t fetchdat, int bit8)
+{
+ uint32_t mask = 0;
+ if (data & DSTDEP_REG)
+ {
+ int reg = (fetchdat >> 3) & 7;
+ if (bit8)
+ reg &= 3;
+ mask |= (1 << reg);
+ }
+ if (data & DSTDEP_RM)
+ {
+ int reg = fetchdat & 7;
+ if (bit8)
+ reg &= 3;
+ mask |= (1 << reg);
+ }
+ mask |= ((data >> 24) & 0xff);
+ if (data & MMX_SHIFTPACK)
+ mask |= REGMASK_SHIFTPACK;
+ if (data & MMX_MULTIPLY)
+ mask |= REGMASK_MULTIPLY;
-/* PUSH EAX PUSH ECX PUSH EDX PUSH EBX*/
-/*50*/ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* PUSH ESP PUSH EBP PUSH ESI PUSH EDI*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* POP EAX POP ECX POP EDX POP EBX*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* POP ESP POP EBP POP ESI POP EDI*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
+ return mask;
+}
+static uint32_t opcode_timings[256] =
+{
+/* ADD ADD ADD ADD*/
+/*00*/ PAIR_UV | CYCLES_RMW | SRCDEP_REG, PAIR_UV | CYCLES_RMW | SRCDEP_REG, PAIR_UV | CYCLES_RM | SRCDEP_REG | DSTDEP_REG, PAIR_UV | CYCLES_RM | SRCDEP_REG | DSTDEP_REG,
+/* ADD ADD PUSH ES POP ES*/
+ PAIR_UV | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(3),
+/* OR OR OR OR*/
+ PAIR_UV | CYCLES_RMW | SRCDEP_REG, PAIR_UV | CYCLES_RMW | SRCDEP_REG, PAIR_UV | CYCLES_RM | SRCDEP_REG | DSTDEP_REG, PAIR_UV | CYCLES_RM | SRCDEP_REG | DSTDEP_REG,
+/* OR OR PUSH CS */
+ PAIR_UV | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_NP | CYCLES(1), INVALID,
+
+/* ADC ADC ADC ADC*/
+/*10*/ PAIR_U | CYCLES_RMW | SRCDEP_REG, PAIR_U | CYCLES_RMW | SRCDEP_REG, PAIR_U | CYCLES_RM | SRCDEP_REG | DSTDEP_REG, PAIR_U | CYCLES_RM | SRCDEP_REG | DSTDEP_REG,
+/* ADC ADC PUSH SS POP SS*/
+ PAIR_U | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_U | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(3),
+/* SBB SBB SBB SBB*/
+ PAIR_U | CYCLES_RMW | SRCDEP_REG, PAIR_U | CYCLES_RMW | SRCDEP_REG, PAIR_U | CYCLES_RM | SRCDEP_REG | DSTDEP_REG, PAIR_U | CYCLES_RM | SRCDEP_REG | DSTDEP_REG,
+/* SBB SBB PUSH DS POP DS*/
+ PAIR_U | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_U | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(3),
+
+/* AND AND AND AND*/
+/*20*/ PAIR_UV | CYCLES_RMW | SRCDEP_REG, PAIR_UV | CYCLES_RMW | SRCDEP_REG, PAIR_UV | CYCLES_RM | SRCDEP_REG | DSTDEP_REG, PAIR_UV | CYCLES_RM | SRCDEP_REG | DSTDEP_REG,
+/* AND AND DAA*/
+ PAIR_UV | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, INVALID, PAIR_NP | CYCLES(3),
+/* SUB SUB SUB SUB*/
+ PAIR_UV | CYCLES_RMW | SRCDEP_REG, PAIR_UV | CYCLES_RMW | SRCDEP_REG, PAIR_UV | CYCLES_RM | SRCDEP_REG | DSTDEP_REG, PAIR_UV | CYCLES_RM | SRCDEP_REG | DSTDEP_REG,
+/* SUB SUB DAS*/
+ PAIR_UV | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, INVALID, PAIR_NP | CYCLES(3),
+
+/* XOR XOR XOR XOR*/
+/*30*/ PAIR_UV | CYCLES_RMW | SRCDEP_REG, PAIR_UV | CYCLES_RMW | SRCDEP_REG, PAIR_UV | CYCLES_RM | SRCDEP_REG | DSTDEP_REG, PAIR_UV | CYCLES_RM | SRCDEP_REG | DSTDEP_REG,
+/* XOR XOR AAA*/
+ PAIR_UV | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, INVALID, PAIR_NP | CYCLES(3),
+/* CMP CMP CMP CMP*/
+ PAIR_UV | CYCLES_RM | SRCDEP_REG, PAIR_UV | CYCLES_RM | SRCDEP_REG, PAIR_UV | CYCLES_RM | SRCDEP_REG, PAIR_UV | CYCLES_RM | SRCDEP_REG,
+/* CMP CMP AAS*/
+ PAIR_UV | CYCLES_REG | SRCDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_EAX, INVALID, PAIR_NP | CYCLES(3),
+
+/* INC EAX INC ECX INC EDX INC EBX*/
+/*40*/ PAIR_UV | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_ECX | DSTDEP_ECX, PAIR_UV | CYCLES_REG | SRCDEP_EDX | DSTDEP_EDX, PAIR_UV | CYCLES_REG | SRCDEP_EBX | DSTDEP_EBX,
+/* INC ESP INC EBP INC ESI INC EDI*/
+ PAIR_UV | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_UV | CYCLES_REG | SRCDEP_EBP | DSTDEP_EBP, PAIR_UV | CYCLES_REG | SRCDEP_ESI | DSTDEP_ESI, PAIR_UV | CYCLES_REG | SRCDEP_EDI | DSTDEP_EDI,
+/* DEC EAX DEC ECX DEC EDX DEC EBX*/
+ PAIR_UV | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_ECX | DSTDEP_ECX, PAIR_UV | CYCLES_REG | SRCDEP_EDX | DSTDEP_EDX, PAIR_UV | CYCLES_REG | SRCDEP_EBX | DSTDEP_EBX,
+/* DEC ESP DEC EBP DEC ESI DEC EDI*/
+ PAIR_UV | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_UV | CYCLES_REG | SRCDEP_EBP | DSTDEP_EBP, PAIR_UV | CYCLES_REG | SRCDEP_ESI | DSTDEP_ESI, PAIR_UV | CYCLES_REG | SRCDEP_EDI | DSTDEP_EDI,
+
+/* PUSH EAX PUSH ECX PUSH EDX PUSH EBX*/
+/*50*/ PAIR_UV | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_ECX | DSTDEP_ECX, PAIR_UV | CYCLES_REG | SRCDEP_EDX | DSTDEP_EDX, PAIR_UV | CYCLES_REG | SRCDEP_EBX | DSTDEP_EBX,
+/* PUSH ESP PUSH EBP PUSH ESI PUSH EDI*/
+ PAIR_UV | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_UV | CYCLES_REG | SRCDEP_EBP | DSTDEP_EBP, PAIR_UV | CYCLES_REG | SRCDEP_ESI | DSTDEP_ESI, PAIR_UV | CYCLES_REG | SRCDEP_EDI | DSTDEP_EDI,
+/* POP EAX POP ECX POP EDX POP EBX*/
+ PAIR_UV | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_ECX | DSTDEP_ECX, PAIR_UV | CYCLES_REG | SRCDEP_EDX | DSTDEP_EDX, PAIR_UV | CYCLES_REG | SRCDEP_EBX | DSTDEP_EBX,
+/* POP ESP POP EBP POP ESI POP EDI*/
+ PAIR_UV | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_UV | CYCLES_REG | SRCDEP_EBP | DSTDEP_EBP, PAIR_UV | CYCLES_REG | SRCDEP_ESI | DSTDEP_ESI, PAIR_UV | CYCLES_REG | SRCDEP_EDI | DSTDEP_EDI,
/* PUSHA POPA BOUND ARPL*/
/*60*/ PAIR_NP | CYCLES(5), PAIR_NP | CYCLES(5), PAIR_NP | CYCLES(8), PAIR_NP | CYCLES(7),
@@ -177,13 +225,13 @@ static uint64_t opcode_timings[256] =
PAIR_V | CYCLES_BRANCH, PAIR_V | CYCLES_BRANCH, PAIR_V | CYCLES_BRANCH, PAIR_V | CYCLES_BRANCH,
PAIR_V | CYCLES_BRANCH, PAIR_V | CYCLES_BRANCH, PAIR_V | CYCLES_BRANCH, PAIR_V | CYCLES_BRANCH,
-/*80*/ INVALID, INVALID, INVALID, INVALID,
-/* TEST TEST XCHG XCHG*/
- PAIR_UV | CYCLES_RM, PAIR_UV | CYCLES_RM, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
-/* MOV MOV MOV MOV*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV,
-/* MOV from seg LEA MOV to seg POP*/
- PAIR_NP | CYCLES(1), PAIR_UV | CYCLES_REG, CYCLES(3), PAIR_NP | CYCLES(3),
+/*80*/ INVALID, INVALID, INVALID, INVALID,
+/* TEST TEST XCHG XCHG*/
+ PAIR_UV | CYCLES_RM | SRCDEP_REG, PAIR_UV | CYCLES_RM | SRCDEP_REG, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
+/* MOV MOV MOV MOV*/
+ PAIR_UV | CYCLES_REG | SRCDEP_REG, PAIR_UV | CYCLES_REG | SRCDEP_REG, PAIR_UV | CYCLES_REG | DSTDEP_REG, PAIR_UV | CYCLES_REG | DSTDEP_REG,
+/* MOV from seg LEA MOV to seg POP*/
+ PAIR_NP | CYCLES(1), PAIR_UV | CYCLES_REG | DSTDEP_REG, CYCLES(3), PAIR_NP | CYCLES(3),
/* NOP XCHG XCHG XCHG*/
/*90*/ PAIR_UV | CYCLES_REG, PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2),
@@ -195,19 +243,19 @@ static uint64_t opcode_timings[256] =
PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2),
/* MOV MOV MOV MOV*/
-/*a0*/ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
+/*a0*/ PAIR_UV | CYCLES_REG | DSTDEP_EAX, PAIR_UV | CYCLES_REG | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_EAX,
/* MOVSB MOVSW CMPSB CMPSW*/
PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(5), PAIR_NP | CYCLES(5),
/* TEST TEST STOSB STOSW*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
+ PAIR_UV | CYCLES_REG | SRCDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_EAX, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
/* LODSB LODSW SCASB SCASW*/
PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(4),
/* MOV*/
-/*b0*/ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
+/*b0*/ PAIR_UV | CYCLES_REG | DSTDEP_EAX, PAIR_UV | CYCLES_REG | DSTDEP_ECX, PAIR_UV | CYCLES_REG | DSTDEP_EDX, PAIR_UV | CYCLES_REG | DSTDEP_EBX,
+ PAIR_UV | CYCLES_REG | DSTDEP_EAX, PAIR_UV | CYCLES_REG | DSTDEP_ECX, PAIR_UV | CYCLES_REG | DSTDEP_EDX, PAIR_UV | CYCLES_REG | DSTDEP_EBX,
+ PAIR_UV | CYCLES_REG | DSTDEP_EAX, PAIR_UV | CYCLES_REG | DSTDEP_ECX, PAIR_UV | CYCLES_REG | DSTDEP_EDX, PAIR_UV | CYCLES_REG | DSTDEP_EBX,
+ PAIR_UV | CYCLES_REG | DSTDEP_ESP, PAIR_UV | CYCLES_REG | DSTDEP_EBP, PAIR_UV | CYCLES_REG | DSTDEP_ESI, PAIR_UV | CYCLES_REG | DSTDEP_EDI,
/* RET imm RET*/
/*c0*/ INVALID, INVALID, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(2),
@@ -243,61 +291,61 @@ static uint64_t opcode_timings[256] =
PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2), PAIR_UV | CYCLES_RMW, INVALID
};
-static uint64_t opcode_timings_mod3[256] =
+static uint32_t opcode_timings_mod3[256] =
{
-/* ADD ADD ADD ADD*/
-/*00*/ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* ADD ADD PUSH ES POP ES*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(3),
-/* OR OR OR OR*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* OR OR PUSH CS */
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_NP | CYCLES(1), INVALID,
+/* ADD ADD ADD ADD*/
+/*00*/ PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG,
+/* ADD ADD PUSH ES POP ES*/
+ PAIR_UV | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(3),
+/* OR OR OR OR*/
+ PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG,
+/* OR OR PUSH CS */
+ PAIR_UV | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_NP | CYCLES(1), INVALID,
-/* ADC ADC ADC ADC*/
-/*10*/ PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG,
-/* ADC ADC PUSH SS POP SS*/
- PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(3),
-/* SBB SBB SBB SBB*/
- PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG,
-/* SBB SBB PUSH DS POP DS*/
- PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(3),
+/* ADC ADC ADC ADC*/
+/*10*/ PAIR_U | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_U | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_U | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_U | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG,
+/* ADC ADC PUSH SS POP SS*/
+ PAIR_U | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_U | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(3),
+/* SBB SBB SBB SBB*/
+ PAIR_U | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_U | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_U | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_U | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG,
+/* SBB SBB PUSH DS POP DS*/
+ PAIR_U | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_U | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(3),
-/* AND AND AND AND*/
-/*20*/ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* AND AND DAA*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID, PAIR_NP | CYCLES(3),
-/* SUB SUB SUB SUB*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* SUB SUB DAS*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID, PAIR_NP | CYCLES(3),
+/* AND AND AND AND*/
+/*20*/ PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG,
+/* AND AND DAA*/
+ PAIR_UV | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, INVALID, PAIR_NP | CYCLES(3),
+/* SUB SUB SUB SUB*/
+ PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG,
+/* SUB SUB DAS*/
+ PAIR_UV | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, INVALID, PAIR_NP | CYCLES(3),
-/* XOR XOR XOR XOR*/
-/*30*/ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* XOR XOR AAA*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID, PAIR_NP | CYCLES(3),
-/* CMP CMP CMP CMP*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* CMP CMP AAS*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID, PAIR_NP | CYCLES(3),
+/* XOR XOR XOR XOR*/
+/*30*/ PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG, PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM | DSTDEP_REG,
+/* XOR XOR AAA*/
+ PAIR_UV | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM | DSTDEP_EAX, INVALID, PAIR_NP | CYCLES(3),
+/* CMP CMP CMP CMP*/
+ PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM, PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM, PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM, PAIR_UV | CYCLES_REG | SRCDEP_RM | SRCDEP_REG,
+/* CMP CMP AAS*/
+ PAIR_UV | CYCLES_REG | SRCDEP_EAX | SRCDEP_RM, PAIR_UV | CYCLES_REG | SRCDEP_EAX, INVALID, PAIR_NP | CYCLES(3),
-/* INC EAX INC ECX INC EDX INC EBX*/
-/*40*/ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* INC ESP INC EBP INC ESI INC EDI*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* DEC EAX DEC ECX DEC EDX DEC EBX*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* DEC ESP DEC EBP DEC ESI DEC EDI*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
+/* INC EAX INC ECX INC EDX INC EBX*/
+/*40*/ PAIR_UV | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_ECX | DSTDEP_ECX, PAIR_UV | CYCLES_REG | SRCDEP_EDX | DSTDEP_EDX, PAIR_UV | CYCLES_REG | SRCDEP_EBX | DSTDEP_EBX,
+/* INC ESP INC EBP INC ESI INC EDI*/
+ PAIR_UV | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_UV | CYCLES_REG | SRCDEP_EBP | DSTDEP_EBP, PAIR_UV | CYCLES_REG | SRCDEP_ESI | DSTDEP_ESI, PAIR_UV | CYCLES_REG | SRCDEP_EDI | DSTDEP_EDI,
+/* DEC EAX DEC ECX DEC EDX DEC EBX*/
+ PAIR_UV | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_ECX | DSTDEP_ECX, PAIR_UV | CYCLES_REG | SRCDEP_EDX | DSTDEP_EDX, PAIR_UV | CYCLES_REG | SRCDEP_EBX | DSTDEP_EBX,
+/* DEC ESP DEC EBP DEC ESI DEC EDI*/
+ PAIR_UV | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_UV | CYCLES_REG | SRCDEP_EBP | DSTDEP_EBP, PAIR_UV | CYCLES_REG | SRCDEP_ESI | DSTDEP_ESI, PAIR_UV | CYCLES_REG | SRCDEP_EDI | DSTDEP_EDI,
-/* PUSH EAX PUSH ECX PUSH EDX PUSH EBX*/
-/*50*/ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* PUSH ESP PUSH EBP PUSH ESI PUSH EDI*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* POP EAX POP ECX POP EDX POP EBX*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* POP ESP POP EBP POP ESI POP EDI*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
+/* PUSH EAX PUSH ECX PUSH EDX PUSH EBX*/
+/*50*/ PAIR_UV | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_ECX | DSTDEP_ECX, PAIR_UV | CYCLES_REG | SRCDEP_EDX | DSTDEP_EDX, PAIR_UV | CYCLES_REG | SRCDEP_EBX | DSTDEP_EBX,
+/* PUSH ESP PUSH EBP PUSH ESI PUSH EDI*/
+ PAIR_UV | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_UV | CYCLES_REG | SRCDEP_EBP | DSTDEP_EBP, PAIR_UV | CYCLES_REG | SRCDEP_ESI | DSTDEP_ESI, PAIR_UV | CYCLES_REG | SRCDEP_EDI | DSTDEP_EDI,
+/* POP EAX POP ECX POP EDX POP EBX*/
+ PAIR_UV | CYCLES_REG | SRCDEP_EAX | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_ECX | DSTDEP_ECX, PAIR_UV | CYCLES_REG | SRCDEP_EDX | DSTDEP_EDX, PAIR_UV | CYCLES_REG | SRCDEP_EBX | DSTDEP_EBX,
+/* POP ESP POP EBP POP ESI POP EDI*/
+ PAIR_UV | CYCLES_REG | SRCDEP_ESP | DSTDEP_ESP, PAIR_UV | CYCLES_REG | SRCDEP_EBP | DSTDEP_EBP, PAIR_UV | CYCLES_REG | SRCDEP_ESI | DSTDEP_ESI, PAIR_UV | CYCLES_REG | SRCDEP_EDI | DSTDEP_EDI,
/* PUSHA POPA BOUND ARPL*/
/*60*/ PAIR_NP | CYCLES(5), PAIR_NP | CYCLES(5), PAIR_NP | CYCLES(8), PAIR_NP | CYCLES(7),
@@ -313,13 +361,13 @@ static uint64_t opcode_timings_mod3[256] =
PAIR_V | CYCLES_BRANCH, PAIR_V | CYCLES_BRANCH, PAIR_V | CYCLES_BRANCH, PAIR_V | CYCLES_BRANCH,
PAIR_V | CYCLES_BRANCH, PAIR_V | CYCLES_BRANCH, PAIR_V | CYCLES_BRANCH, PAIR_V | CYCLES_BRANCH,
-/*80*/ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* TEST TEST XCHG XCHG*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
-/* MOV MOV MOV MOV*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/* MOV from seg LEA MOV to seg POP*/
- PAIR_NP | CYCLES(1), PAIR_UV | CYCLES_REG, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
+/*80*/ PAIR_UV | CYCLES_REG | SRCDEP_RM | DSTDEP_RM, PAIR_UV | CYCLES_REG | SRCDEP_RM | DSTDEP_RM, PAIR_UV | CYCLES_REG | SRCDEP_RM | DSTDEP_RM, PAIR_UV | CYCLES_REG | SRCDEP_RM | DSTDEP_RM,
+/* TEST TEST XCHG XCHG*/
+ PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM, PAIR_UV | CYCLES_REG | SRCDEP_REG | SRCDEP_RM, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
+/* MOV MOV MOV MOV*/
+ PAIR_UV | CYCLES_REG | SRCDEP_REG | DSTDEP_RM, PAIR_UV | CYCLES_REG | SRCDEP_REG | DSTDEP_RM, PAIR_UV | CYCLES_REG | SRCDEP_RM | DSTDEP_REG, PAIR_UV | CYCLES_REG | SRCDEP_RM | DSTDEP_REG,
+/* MOV from seg LEA MOV to seg POP*/
+ PAIR_NP | CYCLES(1), PAIR_UV | CYCLES_REG | DSTDEP_REG, CYCLES(3), PAIR_NP | CYCLES(3),
/* NOP XCHG XCHG XCHG*/
/*90*/ PAIR_UV | CYCLES_REG, PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2),
@@ -331,19 +379,19 @@ static uint64_t opcode_timings_mod3[256] =
PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2),
/* MOV MOV MOV MOV*/
-/*a0*/ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
+/*a0*/ PAIR_UV | CYCLES_REG | DSTDEP_EAX, PAIR_UV | CYCLES_REG | DSTDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_EAX,
/* MOVSB MOVSW CMPSB CMPSW*/
PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(5), PAIR_NP | CYCLES(5),
/* TEST TEST STOSB STOSW*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
+ PAIR_UV | CYCLES_REG | SRCDEP_EAX, PAIR_UV | CYCLES_REG | SRCDEP_EAX, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
/* LODSB LODSW SCASB SCASW*/
PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(4),
/* MOV*/
-/*b0*/ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
+/*b0*/ PAIR_UV | CYCLES_REG | DSTDEP_EAX, PAIR_UV | CYCLES_REG | DSTDEP_ECX, PAIR_UV | CYCLES_REG | DSTDEP_EDX, PAIR_UV | CYCLES_REG | DSTDEP_EBX,
+ PAIR_UV | CYCLES_REG | DSTDEP_EAX, PAIR_UV | CYCLES_REG | DSTDEP_ECX, PAIR_UV | CYCLES_REG | DSTDEP_EDX, PAIR_UV | CYCLES_REG | DSTDEP_EBX,
+ PAIR_UV | CYCLES_REG | DSTDEP_EAX, PAIR_UV | CYCLES_REG | DSTDEP_ECX, PAIR_UV | CYCLES_REG | DSTDEP_EDX, PAIR_UV | CYCLES_REG | DSTDEP_EBX,
+ PAIR_UV | CYCLES_REG | DSTDEP_ESP, PAIR_UV | CYCLES_REG | DSTDEP_EBP, PAIR_UV | CYCLES_REG | DSTDEP_ESI, PAIR_UV | CYCLES_REG | DSTDEP_EDI,
/* RET imm RET*/
/*c0*/ INVALID, INVALID, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(2),
@@ -380,22 +428,22 @@ static uint64_t opcode_timings_mod3[256] =
PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2), PAIR_UV | CYCLES_REG, INVALID
};
-static uint64_t opcode_timings_0f[256] =
+static uint32_t opcode_timings_0f[256] =
{
-/*00*/ PAIR_NP | CYCLES(20), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(10),
- INVALID, PAIR_NP | CYCLES(195), PAIR_NP | CYCLES(7), INVALID,
- PAIR_NP | CYCLES(1000), PAIR_NP | CYCLES(10000), INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
+/*00*/ PAIR_NP | CYCLES(20), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(10),
+ INVALID, PAIR_NP | CYCLES(195), PAIR_NP | CYCLES(7), INVALID,
+ PAIR_NP | CYCLES(1000), PAIR_NP | CYCLES(10000), INVALID, INVALID,
+ INVALID, INVALID, INVALID, INVALID,
/*10*/ INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
-/*20*/ PAIR_NP | CYCLES(6), PAIR_NP | CYCLES(6), PAIR_NP | CYCLES(6), PAIR_NP | CYCLES(6),
- PAIR_NP | CYCLES(6), PAIR_NP | CYCLES(6), INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
+/*20*/ PAIR_NP | CYCLES(6), PAIR_NP | CYCLES(6), PAIR_NP | CYCLES(6), PAIR_NP | CYCLES(6),
+ PAIR_NP | CYCLES(6), PAIR_NP | CYCLES(6), INVALID, INVALID,
+ INVALID, INVALID, INVALID, INVALID,
+ INVALID, INVALID, INVALID, INVALID,
/*30*/ PAIR_NP | CYCLES(9), CYCLES(1), PAIR_NP | CYCLES(9), INVALID,
INVALID, INVALID, INVALID, INVALID,
@@ -412,15 +460,15 @@ static uint64_t opcode_timings_0f[256] =
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
-/*60*/ PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM,
- PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM,
- PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM,
- INVALID, INVALID, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM,
+/*60*/ PAIR_U | MMX_SHIFTPACK | CYCLES_RM, PAIR_U | MMX_SHIFTPACK | CYCLES_RM, PAIR_U | MMX_SHIFTPACK | CYCLES_RM, PAIR_U | MMX_SHIFTPACK | CYCLES_RM,
+ PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM,
+ PAIR_U | MMX_SHIFTPACK | CYCLES_RM, PAIR_U | MMX_SHIFTPACK | CYCLES_RM, PAIR_U | MMX_SHIFTPACK | CYCLES_RM, PAIR_U | MMX_SHIFTPACK | CYCLES_RM,
+ INVALID, INVALID, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM,
-/*70*/ INVALID, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM,
- PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_NP | CYCLES(100),
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM,
+/*70*/ INVALID, PAIR_U | MMX_SHIFTPACK | CYCLES_RM, PAIR_U | MMX_SHIFTPACK | CYCLES_RM, PAIR_U | MMX_SHIFTPACK | CYCLES_RM,
+ PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_NP | CYCLES(100),
+ INVALID, INVALID, INVALID, INVALID,
+ INVALID, INVALID, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM,
/*80*/ PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2),
PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2),
@@ -447,22 +495,22 @@ static uint64_t opcode_timings_0f[256] =
PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1),
PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1),
-/*d0*/ INVALID, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM,
- INVALID, PAIR_U | CYCLES_RM, INVALID, INVALID,
- PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, INVALID, PAIR_U | CYCLES_RM,
- PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, INVALID, PAIR_U | CYCLES_RM,
+/*d0*/ INVALID, PAIR_U | MMX_SHIFTPACK | CYCLES_RM, PAIR_U | MMX_SHIFTPACK | CYCLES_RM, PAIR_U | MMX_SHIFTPACK | CYCLES_RM,
+ INVALID, PAIR_U | CYCLES_RM, INVALID, INVALID,
+ PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, INVALID, PAIR_U | CYCLES_RM,
+ PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, INVALID, PAIR_U | CYCLES_RM,
-/*e0*/ INVALID, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, INVALID,
- INVALID, PAIR_U | CYCLES_RM, INVALID, INVALID,
- PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, INVALID, PAIR_U | CYCLES_RM,
- PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, INVALID, PAIR_U | CYCLES_RM,
+/*e0*/ INVALID, PAIR_U | MMX_SHIFTPACK | CYCLES_RM, PAIR_U | MMX_SHIFTPACK | CYCLES_RM, INVALID,
+ INVALID, PAIR_U | CYCLES_RM, INVALID, INVALID,
+ PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, INVALID, PAIR_U | CYCLES_RM,
+ PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, INVALID, PAIR_U | CYCLES_RM,
-/*f0*/ INVALID, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM,
- INVALID, PAIR_U | CYCLES_RM, INVALID, INVALID,
- PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, INVALID,
- PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, INVALID,
+/*f0*/ INVALID, PAIR_U | MMX_SHIFTPACK | CYCLES_RM, PAIR_U | MMX_SHIFTPACK | CYCLES_RM, PAIR_U | MMX_SHIFTPACK | CYCLES_RM,
+ INVALID, PAIR_U | CYCLES_RM, INVALID, INVALID,
+ PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, INVALID,
+ PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, PAIR_U | CYCLES_RM, INVALID,
};
-static uint64_t opcode_timings_0f_mod3[256] =
+static uint32_t opcode_timings_0f_mod3[256] =
{
/*00*/ PAIR_NP | CYCLES(20), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(10),
INVALID, PAIR_NP | CYCLES(195), PAIR_NP | CYCLES(7), INVALID,
@@ -494,15 +542,15 @@ static uint64_t opcode_timings_0f_mod3[256] =
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
-/*60*/ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
- INVALID, INVALID, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
+/*60*/ PAIR_UV | MMX_SHIFTPACK | CYCLES_REG, PAIR_UV | MMX_SHIFTPACK | CYCLES_REG, PAIR_UV | MMX_SHIFTPACK | CYCLES_REG, PAIR_UV | MMX_SHIFTPACK | CYCLES_REG,
+ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
+ PAIR_UV | MMX_SHIFTPACK | CYCLES_REG, PAIR_UV | MMX_SHIFTPACK | CYCLES_REG, PAIR_UV | MMX_SHIFTPACK | CYCLES_REG, PAIR_UV | MMX_SHIFTPACK | CYCLES_REG,
+ INVALID, INVALID, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
-/*70*/ INVALID, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_NP | CYCLES(100),
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
+/*70*/ INVALID, PAIR_UV | MMX_SHIFTPACK | CYCLES_REG, PAIR_UV | MMX_SHIFTPACK | CYCLES_REG, PAIR_UV | MMX_SHIFTPACK | CYCLES_REG,
+ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_NP | CYCLES(100),
+ INVALID, INVALID, INVALID, INVALID,
+ INVALID, INVALID, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
/*80*/ PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2),
PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2),
@@ -529,153 +577,152 @@ static uint64_t opcode_timings_0f_mod3[256] =
PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1),
PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1),
-/*d0*/ INVALID, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
- INVALID, PAIR_UV | CYCLES_REG, INVALID, INVALID,
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID, PAIR_UV | CYCLES_REG,
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID, PAIR_UV | CYCLES_REG,
+/*d0*/ INVALID, PAIR_UV | MMX_SHIFTPACK | CYCLES_REG, PAIR_UV | MMX_SHIFTPACK | CYCLES_REG, PAIR_UV | MMX_SHIFTPACK | CYCLES_REG,
+ INVALID, PAIR_UV | MMX_MULTIPLY | CYCLES_REG, INVALID, INVALID,
+ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID, PAIR_UV | CYCLES_REG,
+ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID, PAIR_UV | CYCLES_REG,
-/*e0*/ INVALID, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID,
- INVALID, PAIR_UV | CYCLES_REG, INVALID, INVALID,
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID, PAIR_UV | CYCLES_REG,
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID, PAIR_UV | CYCLES_REG,
+/*e0*/ INVALID, PAIR_UV | MMX_SHIFTPACK | CYCLES_REG, PAIR_UV | MMX_SHIFTPACK | CYCLES_REG, INVALID,
+ INVALID, PAIR_UV | MMX_MULTIPLY | CYCLES_REG, INVALID, INVALID,
+ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID, PAIR_UV | CYCLES_REG,
+ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID, PAIR_UV | CYCLES_REG,
-/*f0*/ INVALID, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
- INVALID, PAIR_UV | CYCLES_REG, INVALID, INVALID,
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID,
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID,
+/*f0*/ INVALID, PAIR_UV | MMX_SHIFTPACK | CYCLES_REG, PAIR_UV | MMX_SHIFTPACK | CYCLES_REG, PAIR_UV | MMX_SHIFTPACK | CYCLES_REG,
+ INVALID, PAIR_UV | MMX_MULTIPLY | CYCLES_REG, INVALID, INVALID,
+ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID,
+ PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, INVALID,
};
-static uint64_t opcode_timings_shift[8] =
+static uint32_t opcode_timings_shift[8] =
{
PAIR_U | CYCLES_RMW, PAIR_U | CYCLES_RMW, PAIR_U | CYCLES_RMW, PAIR_U | CYCLES_RMW,
PAIR_U | CYCLES_RMW, PAIR_U | CYCLES_RMW, PAIR_U | CYCLES_RMW, PAIR_U | CYCLES_RMW,
};
-static uint64_t opcode_timings_shift_mod3[8] =
+static uint32_t opcode_timings_shift_mod3[8] =
{
- PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG,
- PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG, PAIR_U | CYCLES_REG,
+ PAIR_U | CYCLES_REG | DSTDEP_RM, PAIR_U | CYCLES_REG | DSTDEP_RM, PAIR_U | CYCLES_REG | DSTDEP_RM, PAIR_U | CYCLES_REG | DSTDEP_RM,
+ PAIR_U | CYCLES_REG | DSTDEP_RM, PAIR_U | CYCLES_REG | DSTDEP_RM, PAIR_U | CYCLES_REG | DSTDEP_RM, PAIR_U | CYCLES_REG | DSTDEP_RM,
};
-static uint64_t opcode_timings_f6[8] =
+static uint32_t opcode_timings_f6[8] =
{
/* TST NOT NEG*/
PAIR_UV | CYCLES_RM, INVALID, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
/* MUL IMUL DIV IDIV*/
PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(17), PAIR_NP | CYCLES(22)
};
-static uint64_t opcode_timings_f6_mod3[8] =
+static uint32_t opcode_timings_f6_mod3[8] =
{
/* TST NOT NEG*/
- PAIR_UV | CYCLES_REG, INVALID, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
+ PAIR_UV | CYCLES_REG | SRCDEP_RM, INVALID, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
/* MUL IMUL DIV IDIV*/
PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(11), PAIR_NP | CYCLES(17), PAIR_NP | CYCLES(22)
};
-static uint64_t opcode_timings_f7[8] =
+static uint32_t opcode_timings_f7[8] =
{
-/* TST NOT NEG*/
- PAIR_UV | CYCLES_RM, INVALID, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
-/* MUL IMUL DIV IDIV*/
- PAIR_NP | CYCLES_MULTI(11,10), PAIR_NP | CYCLES_MULTI(11,10), PAIR_NP | CYCLES_MULTI(25,41), PAIR_NP | CYCLES_MULTI(30,46)
+/* TST NOT NEG*/
+ PAIR_UV | CYCLES_RM, INVALID, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
+/* MUL IMUL DIV IDIV*/
+ PAIR_NP | CYCLES_MULTI(11,10), PAIR_NP | CYCLES_MULTI(11,10), PAIR_NP | CYCLES_MULTI(25,41), PAIR_NP | CYCLES_MULTI(30,46)
};
-static uint64_t opcode_timings_f7_mod3[8] =
+static uint32_t opcode_timings_f7_mod3[8] =
{
-/* TST NOT NEG*/
- PAIR_UV | CYCLES_REG, INVALID, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
-/* MUL IMUL DIV IDIV*/
- PAIR_NP | CYCLES_MULTI(11,10), PAIR_NP | CYCLES_MULTI(11,10), PAIR_NP | CYCLES_MULTI(25,41), PAIR_NP | CYCLES_MULTI(30,46)
+/* TST NOT NEG*/
+ PAIR_UV | CYCLES_REG | SRCDEP_RM, INVALID, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
+/* MUL IMUL DIV IDIV*/
+ PAIR_NP | CYCLES_MULTI(11,10), PAIR_NP | CYCLES_MULTI(11,10), PAIR_NP | CYCLES_MULTI(25,41), PAIR_NP | CYCLES_MULTI(30,46)
};
-static uint64_t opcode_timings_ff[8] =
-{
-/* INC DEC CALL CALL far*/
- PAIR_UV | CYCLES_RMW, PAIR_UV | CYCLES_RMW, PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(0),
-/* JMP JMP far PUSH*/
- PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(0), PAIR_NP | CYCLES(2), INVALID
-};
-static uint64_t opcode_timings_ff_mod3[8] =
+static uint32_t opcode_timings_ff[8] =
{
/* INC DEC CALL CALL far*/
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(0),
+ PAIR_UV | CYCLES_RMW, PAIR_UV | CYCLES_RMW, PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(0),
+/* JMP JMP far PUSH*/
+ PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(0), PAIR_NP | CYCLES(2), INVALID
+};
+static uint32_t opcode_timings_ff_mod3[8] =
+{
+/* INC DEC CALL CALL far*/
+ PAIR_UV | CYCLES_REG | SRCDEP_RM | DSTDEP_RM, PAIR_UV | CYCLES_REG | SRCDEP_RM | DSTDEP_RM, PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(0),
/* JMP JMP far PUSH*/
PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(0), PAIR_NP | CYCLES(2), INVALID
};
-static uint64_t opcode_timings_d8[8] =
+static uint32_t opcode_timings_d8[8] =
{
-/* FADDs FMULs FCOMs FCOMPs*/
- PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(1,0,0), PAIR_FX | FPU_CYCLES(1,0,0),
-/* FSUBs FSUBRs FDIVs FDIVRs*/
- PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(39,38,2), PAIR_FX | FPU_CYCLES(39,38,2)
+/* FADDs FMULs FCOMs FCOMPs*/
+ PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1),
+/* FSUBs FSUBRs FDIVs FDIVRs*/
+ PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(39), PAIR_FX | CYCLES(39)
};
-static uint64_t opcode_timings_d8_mod3[8] =
+static uint32_t opcode_timings_d8_mod3[8] =
{
-/* FADD FMUL FCOM FCOMP*/
- PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(1,0,0), PAIR_FX | FPU_CYCLES(1,0,0),
-/* FSUB FSUBR FDIV FDIVR*/
- PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(39,38,2), PAIR_FX | FPU_CYCLES(39,38,2)
+/* FADD FMUL FCOM FCOMP*/
+ PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1),
+/* FSUB FSUBR FDIV FDIVR*/
+ PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(39), PAIR_FX | CYCLES(39)
};
-static uint64_t opcode_timings_d9[8] =
+static uint32_t opcode_timings_d9[8] =
{
-/* FLDs FSTs FSTPs*/
- PAIR_FX | FPU_CYCLES(1,0,0), INVALID, PAIR_NP | FPU_CYCLES(2,0,0), PAIR_NP | FPU_CYCLES(2,0,0),
-/* FLDENV FLDCW FSTENV FSTCW*/
- PAIR_NP | FPU_CYCLES(32,0,0), PAIR_NP | FPU_CYCLES(8,0,0), PAIR_NP | FPU_CYCLES(48,0,0), PAIR_NP | FPU_CYCLES(2,0,0)
+/* FLDs FSTs FSTPs*/
+ PAIR_FX | CYCLES(1), INVALID, PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2),
+/* FLDENV FLDCW FSTENV FSTCW*/
+ PAIR_NP | CYCLES(32), PAIR_NP | CYCLES(7), PAIR_NP | CYCLES(48), PAIR_NP | CYCLES(2)
};
-static uint64_t opcode_timings_d9_mod3[64] =
+static uint32_t opcode_timings_d9_mod3[64] =
{
/*FLD*/
- PAIR_FX | FPU_CYCLES(1,0,0), PAIR_FX | FPU_CYCLES(1,0,0), PAIR_FX | FPU_CYCLES(1,0,0), PAIR_FX | FPU_CYCLES(1,0,0),
- PAIR_FX | FPU_CYCLES(1,0,0), PAIR_FX | FPU_CYCLES(1,0,0), PAIR_FX | FPU_CYCLES(1,0,0), PAIR_FX | FPU_CYCLES(1,0,0),
+ PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1),
+ PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1),
/*FXCH*/
- PAIR_FXCH | CYCLES(0), PAIR_FXCH | CYCLES(0), PAIR_FXCH | CYCLES(0), PAIR_FXCH | CYCLES(0),
- PAIR_FXCH | CYCLES(0), PAIR_FXCH | CYCLES(0), PAIR_FXCH | CYCLES(0), PAIR_FXCH | CYCLES(0),
+ PAIR_V | CYCLES(0), PAIR_V | CYCLES(0), PAIR_V | CYCLES(0), PAIR_V | CYCLES(0),
+ PAIR_V | CYCLES(0), PAIR_V | CYCLES(0), PAIR_V | CYCLES(0), PAIR_V | CYCLES(0),
/*FNOP*/
- PAIR_NP | FPU_CYCLES(3,0,0), INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
+ PAIR_NP | CYCLES(3), INVALID, INVALID, INVALID,
+ INVALID, INVALID, INVALID, INVALID,
/*FSTP*/
- PAIR_NP | FPU_CYCLES(1,0,0), PAIR_NP | FPU_CYCLES(1,0,0), PAIR_NP | FPU_CYCLES(1,0,0), PAIR_NP | FPU_CYCLES(1,0,0),
- PAIR_NP | FPU_CYCLES(1,0,0), PAIR_NP | FPU_CYCLES(1,0,0), PAIR_NP | FPU_CYCLES(1,0,0), PAIR_NP | FPU_CYCLES(1,0,0),
-/* opFCHS opFABS*/
- PAIR_FX | FPU_CYCLES(1,0,0), PAIR_FX | FPU_CYCLES(1,0,0), INVALID, INVALID,
-/* opFTST opFXAM*/
- PAIR_NP | FPU_CYCLES(1,0,0), PAIR_NP | FPU_CYCLES(21,4,0), INVALID, INVALID,
-/* opFLD1 opFLDL2T opFLDL2E opFLDPI*/
- PAIR_NP | FPU_CYCLES(2,0,0), PAIR_NP | FPU_CYCLES(5,2,2), PAIR_NP | FPU_CYCLES(5,2,2), PAIR_NP | FPU_CYCLES(5,2,2),
-/* opFLDEG2 opFLDLN2 opFLDZ*/
- PAIR_NP | FPU_CYCLES(5,2,2), PAIR_NP | FPU_CYCLES(5,2,2), PAIR_NP | FPU_CYCLES(2,0,0), INVALID,
-/* opF2XM1 opFYL2X opFPTAN opFPATAN*/
- PAIR_NP | FPU_CYCLES(53,2,2), PAIR_NP | FPU_CYCLES(103,2,2), PAIR_NP | FPU_CYCLES(120,36,0), PAIR_NP | FPU_CYCLES(112,2,2),
-/* opFDECSTP opFINCSTP,*/
- INVALID, INVALID, PAIR_NP | FPU_CYCLES(2,0,0), PAIR_NP | FPU_CYCLES(2,0,0),
-/* opFPREM opFSQRT opFSINCOS*/
- PAIR_NP | FPU_CYCLES(64,2,2), INVALID, PAIR_NP | FPU_CYCLES(70,69,2), PAIR_NP | FPU_CYCLES(89,2,2),
-/* opFRNDINT opFSCALE opFSIN opFCOS*/
- PAIR_NP | FPU_CYCLES(9,0,0), PAIR_NP | FPU_CYCLES(20,5,0), PAIR_NP | FPU_CYCLES(65,2,2), PAIR_NP | FPU_CYCLES(65,2,2)
+ PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1),
+ PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1),
+/* opFCHS opFABS*/
+ PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(3), INVALID, INVALID,
+/* opFTST opFXAM*/
+ PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(21), INVALID, INVALID,
+/* opFLD1 opFLDL2T opFLDL2E opFLDPI*/
+ PAIR_NP | CYCLES(2), CYCLES(3), PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3),
+/* opFLDEG2 opFLDLN2 opFLDZ*/
+ PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(2), INVALID,
+/* opF2XM1 opFYL2X opFPTAN opFPATAN*/
+ PAIR_NP | CYCLES(13), PAIR_NP | CYCLES(22), PAIR_NP | CYCLES(100), PAIR_NP | CYCLES(100),
+/* opFDECSTP opFINCSTP,*/
+ INVALID, INVALID, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(1),
+/* opFPREM opFSQRT opFSINCOS*/
+ PAIR_NP | CYCLES(70), INVALID, PAIR_NP | CYCLES(70), PAIR_NP | CYCLES(50),
+/* opFRNDINT opFSCALE opFSIN opFCOS*/
+ PAIR_NP | CYCLES(9), PAIR_NP | CYCLES(20), PAIR_NP | CYCLES(50), PAIR_NP | CYCLES(50)
};
-static uint64_t opcode_timings_da[8] =
+static uint32_t opcode_timings_da[8] =
{
-/* FIADDl FIMULl FICOMl FICOMPl*/
- PAIR_NP | FPU_CYCLES(6,2,2), PAIR_NP | FPU_CYCLES(6,2,2), PAIR_NP | FPU_CYCLES(4,0,0), PAIR_NP | FPU_CYCLES(4,0,0),
-/* FISUBl FISUBRl FIDIVl FIDIVRl*/
- PAIR_NP | FPU_CYCLES(6,2,2), PAIR_NP | FPU_CYCLES(6,2,2), PAIR_NP | FPU_CYCLES(42,38,2), PAIR_NP | FPU_CYCLES(42,38,2)
+/* FIADDl FIMULl FICOMl FICOMPl*/
+ PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(4),
+/* FISUBl FISUBRl FIDIVl FIDIVRl*/
+ PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(42), PAIR_NP | CYCLES(42)
};
-static uint64_t opcode_timings_da_mod3[8] =
+static uint32_t opcode_timings_da_mod3[8] =
{
- INVALID, INVALID, INVALID, INVALID,
-/* FCOMPP*/
- INVALID, PAIR_NP | FPU_CYCLES(1,0,0), INVALID, INVALID
+ INVALID, INVALID, INVALID, INVALID,
+ INVALID, PAIR_NP | CYCLES(5), INVALID, INVALID
};
-static uint64_t opcode_timings_db[8] =
+static uint32_t opcode_timings_db[8] =
{
-/* FLDil FSTil FSTPil*/
- PAIR_NP | FPU_CYCLES(3,2,2), INVALID, PAIR_NP | FPU_CYCLES(6,0,0), PAIR_NP | FPU_CYCLES(6,0,0),
-/* FLDe FSTPe*/
- INVALID, PAIR_NP | FPU_CYCLES(3,0,0), INVALID, PAIR_NP | FPU_CYCLES(3,0,0)
+/* FLDil FSTil FSTPil*/
+ PAIR_NP | CYCLES(1), INVALID, PAIR_NP | CYCLES(6), PAIR_NP | CYCLES(6),
+/* FLDe FSTPe*/
+ INVALID, PAIR_NP | CYCLES(3), INVALID, PAIR_NP | CYCLES(3)
};
-static uint64_t opcode_timings_db_mod3[64] =
+static uint32_t opcode_timings_db_mod3[64] =
{
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
@@ -689,10 +736,10 @@ static uint64_t opcode_timings_db_mod3[64] =
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
-/* opFNOP opFCLEX opFINIT*/
- INVALID, PAIR_NP | FPU_CYCLES(1,0,0), PAIR_NP | FPU_CYCLES(7,0,0), PAIR_NP | FPU_CYCLES(17,0,0),
-/* opFNOP opFNOP*/
- PAIR_NP | FPU_CYCLES(1,0,0), PAIR_NP | FPU_CYCLES(1,0,0), INVALID, INVALID,
+/* opFNOP opFCLEX opFINIT*/
+ INVALID, PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(7), PAIR_NP | CYCLES(17),
+/* opFNOP opFNOP*/
+ PAIR_NP | CYCLES(3), PAIR_NP | CYCLES(3), INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
INVALID, INVALID, INVALID, INVALID,
@@ -704,109 +751,87 @@ static uint64_t opcode_timings_db_mod3[64] =
INVALID, INVALID, INVALID, INVALID,
};
-static uint64_t opcode_timings_dc[8] =
+static uint32_t opcode_timings_dc[8] =
{
-/* FADDd FMULd FCOMd FCOMPd*/
- PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(1,0,0), PAIR_FX | FPU_CYCLES(1,0,0),
-/* FSUBd FSUBRd FDIVd FDIVRd*/
- PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(39,38,2), PAIR_FX | FPU_CYCLES(39,38,2)
+/* FADDd FMULd FCOMd FCOMPd*/
+ PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1),
+/* FSUBd FSUBRd FDIVd FDIVRd*/
+ PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(39), PAIR_FX | CYCLES(39)
};
-static uint64_t opcode_timings_dc_mod3[8] =
+static uint32_t opcode_timings_dc_mod3[8] =
{
-/* opFADDr opFMULr*/
- PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(3,2,2), INVALID, INVALID,
-/* opFSUBRr opFSUBr opFDIVRr opFDIVr*/
- PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(39,38,2), PAIR_FX | FPU_CYCLES(39,38,2)
+/* opFADDr opFMULr*/
+ PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1), INVALID, INVALID,
+/* opFSUBRr opFSUBr opFDIVRr opFDIVr*/
+ PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(39), PAIR_FX | CYCLES(39)
};
-static uint64_t opcode_timings_dd[8] =
+static uint32_t opcode_timings_dd[8] =
{
-/* FLDd FSTd FSTPd*/
- PAIR_FX | FPU_CYCLES(1,0,0), INVALID, PAIR_NP | FPU_CYCLES(2,0,0), PAIR_NP | FPU_CYCLES(2,0,0),
-/* FRSTOR FSAVE FSTSW*/
- PAIR_NP | FPU_CYCLES(70,0,0), INVALID, PAIR_NP | FPU_CYCLES(127,0,0), PAIR_NP | FPU_CYCLES(6,0,0)
+/* FLDd FSTd FSTPd*/
+ PAIR_FX | CYCLES(1), INVALID, PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2),
+/* FRSTOR FSAVE FSTSW*/
+ PAIR_NP | CYCLES(70), INVALID, PAIR_NP | CYCLES(127), PAIR_NP | CYCLES(2)
};
-static uint64_t opcode_timings_dd_mod3[8] =
+static uint32_t opcode_timings_dd_mod3[8] =
{
-/* FFFREE FST FSTP*/
- PAIR_NP | FPU_CYCLES(2,0,0), INVALID, PAIR_NP | FPU_CYCLES(1,0,0), PAIR_NP | FPU_CYCLES(1,0,0),
-/* FUCOM FUCOMP*/
- PAIR_NP | FPU_CYCLES(1,0,0), PAIR_NP | FPU_CYCLES(1,0,0), INVALID, INVALID
+/* FFFREE FST FSTP*/
+ PAIR_NP | CYCLES(3), INVALID, PAIR_NP | CYCLES(2), PAIR_NP | CYCLES(2),
+/* FUCOM FUCOMP*/
+ PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(4), INVALID, INVALID
};
-static uint64_t opcode_timings_de[8] =
+static uint32_t opcode_timings_de[8] =
{
-/* FIADDw FIMULw FICOMw FICOMPw*/
- PAIR_NP | FPU_CYCLES(6,2,2), PAIR_NP | FPU_CYCLES(6,2,2), PAIR_NP | FPU_CYCLES(4,0,0), PAIR_NP | FPU_CYCLES(4,0,0),
-/* FISUBw FISUBRw FIDIVw FIDIVRw*/
- PAIR_NP | FPU_CYCLES(6,2,2), PAIR_NP | FPU_CYCLES(6,2,2), PAIR_NP | FPU_CYCLES(42,38,2), PAIR_NP | FPU_CYCLES(42,38,2)
+/* FIADDw FIMULw FICOMw FICOMPw*/
+ PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(4),
+/* FISUBw FISUBRw FIDIVw FIDIVRw*/
+ PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(4), PAIR_NP | CYCLES(42), PAIR_NP | CYCLES(42)
};
-static uint64_t opcode_timings_de_mod3[8] =
+static uint32_t opcode_timings_de_mod3[8] =
{
-/* FADDP FMULP FCOMPP*/
- PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(3,2,2), INVALID, PAIR_FX | FPU_CYCLES(1,0,0),
-/* FSUBP FSUBRP FDIVP FDIVRP*/
- PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(3,2,2), PAIR_FX | FPU_CYCLES(39,38,2), PAIR_FX | FPU_CYCLES(39,38,2)
+/* FADD FMUL FCOMPP*/
+ PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1), INVALID, PAIR_FX | CYCLES(1),
+/* FSUB FSUBR FDIV FDIVR*/
+ PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(1), PAIR_FX | CYCLES(39), PAIR_FX | CYCLES(39)
};
-static uint64_t opcode_timings_df[8] =
+static uint32_t opcode_timings_df[8] =
{
-/* FILDiw FISTiw FISTPiw*/
- PAIR_NP | FPU_CYCLES(3,2,2), INVALID, PAIR_NP | FPU_CYCLES(6,0,0), PAIR_NP | FPU_CYCLES(6,0,0),
-/* FILDiq FBSTP FISTPiq*/
- INVALID, PAIR_NP | FPU_CYCLES(3,2,2), PAIR_NP | FPU_CYCLES(148,0,0), PAIR_NP | FPU_CYCLES(6,0,0)
+/* FILDiw FISTiw FISTPiw*/
+ PAIR_NP | CYCLES(1), INVALID, PAIR_NP | CYCLES(6), PAIR_NP | CYCLES(6),
+/* FILDiq FBSTP FISTPiq*/
+ INVALID, PAIR_NP | CYCLES(1), PAIR_NP | CYCLES(148), PAIR_NP | CYCLES(6)
};
-static uint64_t opcode_timings_df_mod3[8] =
+static uint32_t opcode_timings_df_mod3[8] =
{
- INVALID, INVALID, INVALID, INVALID,
+ INVALID, INVALID, INVALID, INVALID,
/* FSTSW AX*/
- PAIR_NP | FPU_CYCLES(6,0,0), INVALID, INVALID, INVALID
+ PAIR_NP | CYCLES(2), INVALID, INVALID, INVALID
};
-static uint64_t opcode_timings_81[8] =
+static uint32_t opcode_timings_8x[8] =
{
- PAIR_UV | CYCLES_RMW | CYCLES_IMM1632, PAIR_UV | CYCLES_RMW | CYCLES_IMM1632, PAIR_UV | CYCLES_RMW | CYCLES_IMM1632, PAIR_UV | CYCLES_RMW | CYCLES_IMM1632,
- PAIR_UV | CYCLES_RMW | CYCLES_IMM1632, PAIR_UV | CYCLES_RMW | CYCLES_IMM1632, PAIR_UV | CYCLES_RMW | CYCLES_IMM1632, PAIR_UV | CYCLES_RM | CYCLES_IMM1632
-};
-static uint64_t opcode_timings_81_mod3[8] =
-{
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG
-};
-static uint64_t opcode_timings_8x[8] =
-{
- PAIR_UV | CYCLES_RMW | CYCLES_IMM8, PAIR_UV | CYCLES_RMW | CYCLES_IMM8, PAIR_UV | CYCLES_RMW | CYCLES_IMM8, PAIR_UV | CYCLES_RMW | CYCLES_IMM8,
- PAIR_UV | CYCLES_RMW | CYCLES_IMM8, PAIR_UV | CYCLES_RMW | CYCLES_IMM8, PAIR_UV | CYCLES_RMW | CYCLES_IMM8, PAIR_UV | CYCLES_RM | CYCLES_IMM8
-};
-static uint64_t opcode_timings_8x_mod3[8] =
-{
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG,
- PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG, PAIR_UV | CYCLES_REG
+ PAIR_UV | CYCLES_RMW | SRCDEP_REG, PAIR_UV | CYCLES_RMW | SRCDEP_REG, PAIR_UV | CYCLES_RMW | SRCDEP_REG, PAIR_UV | CYCLES_RMW | SRCDEP_REG,
+ PAIR_UV | CYCLES_RMW | SRCDEP_REG, PAIR_UV | CYCLES_RMW | SRCDEP_REG, PAIR_UV | CYCLES_RMW | SRCDEP_REG, PAIR_UV | CYCLES_RM | SRCDEP_REG
};
-static int decode_delay, decode_delay_offset;
+static int decode_delay;
static uint8_t last_prefix;
-static int prefixes;
-static inline int COUNT(uint64_t timings, uint64_t deps, int op_32)
+static inline int COUNT(uint32_t c, int op_32)
{
- if ((timings & PAIR_FPU) && !(deps & FPU_FXCH))
- return FPU_I_LATENCY(timings);
- if (timings & CYCLES_HAS_MULTI)
+ if (c & CYCLES_HAS_MULTI)
{
if (op_32 & 0x100)
- return ((uintptr_t)timings >> 8) & 0xff;
- return (uintptr_t)timings & 0xff;
+ return ((uintptr_t)c >> 8) & 0xff;
+ return (uintptr_t)c & 0xff;
}
- if (!(timings & PAIR_MASK))
- return timings & 0xffff;
- if ((timings & PAIR_MASK) == PAIR_FX)
- return timings & 0xffff;
- if ((timings & PAIR_MASK) == PAIR_FXCH)
- return timings & 0xffff;
- if ((timings & PAIR_UV) && !(timings & PAIR_FPU))
- timings &= 3;
- switch (timings & CYCLES_MASK)
+ if (!(c & PAIR_MASK))
+ return c & 0xffff;
+ if ((c & PAIR_MASK) == PAIR_FX)
+ return c & 0xffff;
+ switch (c & CYCLES_MASK)
{
case CYCLES_REG:
return 1;
@@ -815,154 +840,41 @@ static inline int COUNT(uint64_t timings, uint64_t deps, int op_32)
case CYCLES_RMW:
return 3;
case CYCLES_BRANCH:
- return cpu_has_feature(CPU_FEATURE_MMX) ? 1 : 2;
+ return cpu_hasMMX ? 1 : 2;
}
- fatal("Illegal COUNT %016llx\n", timings);
+ fatal("Illegal COUNT %08x\n", c);
- return timings;
-}
-
-static int codegen_fpu_latencies(uint64_t deps, int reg)
-{
- int latency = fpu_latency;
-
- if ((deps & FPU_RW_ST0) && fpu_st_latency[0] && fpu_st_latency[0] > latency)
- latency = fpu_st_latency[0];
- if ((deps & FPU_RW_ST1) && fpu_st_latency[1] && fpu_st_latency[1] > latency)
- latency = fpu_st_latency[1];
- if ((deps & FPU_RW_STREG) && fpu_st_latency[reg] && fpu_st_latency[reg] > latency)
- latency = fpu_st_latency[reg];
-
- return latency;
-}
-
-#define SUB_AND_CLAMP(latency, count) \
- latency -= count; \
- if (latency < 0) \
- latency = 0
-
-static void codegen_fpu_latency_clock(int count)
-{
- SUB_AND_CLAMP(fpu_latency, count);
- SUB_AND_CLAMP(fpu_st_latency[0], count);
- SUB_AND_CLAMP(fpu_st_latency[1], count);
- SUB_AND_CLAMP(fpu_st_latency[2], count);
- SUB_AND_CLAMP(fpu_st_latency[3], count);
- SUB_AND_CLAMP(fpu_st_latency[4], count);
- SUB_AND_CLAMP(fpu_st_latency[5], count);
- SUB_AND_CLAMP(fpu_st_latency[6], count);
- SUB_AND_CLAMP(fpu_st_latency[7], count);
-}
-
-static inline int codegen_timing_has_displacement(uint32_t fetchdat, int op_32)
-{
- if (op_32 & 0x200)
- {
- if ((fetchdat & 7) == 4 && (fetchdat & 0xc0) != 0xc0)
- {
- /*Has SIB*/
- if ((fetchdat & 0xc0) == 0x40 || (fetchdat & 0xc0) == 0x80 || (fetchdat & 0x700) == 0x500)
- return 1;
- }
- else
- {
- if ((fetchdat & 0xc0) == 0x40 || (fetchdat & 0xc0) == 0x80 || (fetchdat & 0xc7) == 0x05)
- return 1;
- }
- }
- else
- {
- if ((fetchdat & 0xc0) == 0x40 || (fetchdat & 0xc0) == 0x80 || (fetchdat & 0xc7) == 0x06)
- return 1;
- }
- return 0;
-}
-
-/*The instruction is only of interest here if it's longer than 7 bytes, as that's the
- limit on Pentium MMX parallel decoding*/
-static inline int codegen_timing_instr_length(uint64_t timing, uint32_t fetchdat, int op_32)
-{
- int len = prefixes;
- if ((timing & CYCLES_MASK) == CYCLES_RM || (timing & CYCLES_MASK) == CYCLES_RMW)
- {
- len += 2; /*Opcode + ModR/M*/
- if ((timing & CYCLES_HASIMM) == CYCLES_IMM8)
- len++;
- if ((timing & CYCLES_HASIMM) == CYCLES_IMM1632)
- len += (op_32 & 0x100) ? 4 : 2;
-
- if (op_32 & 0x200)
- {
- if ((fetchdat & 7) == 4 && (fetchdat & 0xc0) != 0xc0)
- {
- /* Has SIB*/
- len++;
- if ((fetchdat & 0xc0) == 0x40)
- len++;
- else if ((fetchdat & 0xc0) == 0x80)
- len += 4;
- else if ((fetchdat & 0x700) == 0x500)
- len += 4;
- }
- else
- {
- if ((fetchdat & 0xc0) == 0x40)
- len++;
- else if ((fetchdat & 0xc0) == 0x80)
- len += 4;
- else if ((fetchdat & 0xc7) == 0x05)
- len += 4;
- }
- }
- else
- {
- if ((fetchdat & 0xc0) == 0x40)
- len++;
- else if ((fetchdat & 0xc0) == 0x80)
- len += 2;
- else if ((fetchdat & 0xc7) == 0x06)
- len += 2;
- }
- }
-
- return len;
+ return c;
}
void codegen_timing_pentium_block_start()
{
- u_pipe_full = decode_delay = decode_delay_offset = 0;
+ u_pipe_full = decode_delay = 0;
}
void codegen_timing_pentium_start()
{
// decode_delay = 0;
last_prefix = 0;
- prefixes = 0;
}
void codegen_timing_pentium_prefix(uint8_t prefix, uint32_t fetchdat)
{
- prefixes++;
- if ((prefix & 0xf8) == 0xd8)
- {
- last_prefix = prefix;
- return;
- }
- if (cpu_has_feature(CPU_FEATURE_MMX) && prefix == 0x0f)
+ if (cpu_hasMMX && prefix == 0x0f)
{
/*On Pentium MMX 0fh prefix is 'free'*/
last_prefix = prefix;
return;
}
- if (cpu_has_feature(CPU_FEATURE_MMX) && (prefix == 0x66 || prefix == 0x67))
+ if (cpu_hasMMX && (prefix == 0x66 || prefix == 0x67))
{
/*On Pentium MMX 66h and 67h prefixes take 2 clocks*/
- decode_delay_offset += 2;
+ decode_delay += 2;
last_prefix = prefix;
return;
}
- if (prefix == 0x0f && (fetchdat & 0xf0) == 0x80)
+ if (prefix == 0x0f && (opcode & 0xf0) == 0x80)
{
/*On Pentium 0fh prefix is 'free' when used on conditional jumps*/
last_prefix = prefix;
@@ -970,172 +882,60 @@ void codegen_timing_pentium_prefix(uint8_t prefix, uint32_t fetchdat)
}
/*On Pentium all prefixes take 1 cycle to decode. Decode may be shadowed
by execution of previous instructions*/
- decode_delay_offset++;
+ decode_delay++;
last_prefix = prefix;
}
-static int check_agi(uint64_t *deps, uint8_t opcode, uint32_t fetchdat, int op_32)
+void codegen_timing_pentium_opcode(uint8_t opcode, uint32_t fetchdat, int op_32)
{
- uint32_t addr_regmask = get_addr_regmask(deps[opcode], fetchdat, op_32);
-
- /*Instructions that use ESP implicitly (eg PUSH, POP, CALL etc) do not
- cause AGIs with each other, but do with instructions that use it explicitly*/
- if ((addr_regmask & REGMASK_IMPL_ESP) && (regmask_modified & (1 << REG_ESP)) && !(regmask_modified & REGMASK_IMPL_ESP))
- addr_regmask |= (1 << REG_ESP);
-
- return (regmask_modified & addr_regmask) & ~REGMASK_IMPL_ESP;
-}
-
-static void codegen_instruction(uint64_t *timings, uint64_t *deps, uint8_t opcode, uint32_t fetchdat, int decode_delay_offset, int op_32, int exec_delay)
-{
- int instr_cycles, latency = 0;
-
- if ((timings[opcode] & PAIR_FPU) && !(deps[opcode] & FPU_FXCH))
- instr_cycles = latency = codegen_fpu_latencies(deps[opcode], fetchdat & 7);
- else
- {
-/* if (timings[opcode] & FPU_WRITE_ST0)
- fatal("FPU_WRITE_ST0\n");
- if (timings[opcode] & FPU_WRITE_ST1)
- fatal("FPU_WRITE_ST1\n");
- if (timings[opcode] & FPU_WRITE_STREG)
- fatal("FPU_WRITE_STREG\n");*/
- instr_cycles = 0;
- }
-
- if ((decode_delay + decode_delay_offset) > 0)
- codegen_fpu_latency_clock(decode_delay + decode_delay_offset + instr_cycles);
- else
- codegen_fpu_latency_clock(instr_cycles);
- instr_cycles += COUNT(timings[opcode], deps[opcode], op_32);
- instr_cycles += exec_delay;
- if ((decode_delay + decode_delay_offset) > 0)
- codegen_block_cycles += instr_cycles + decode_delay + decode_delay_offset;
- else
- codegen_block_cycles += instr_cycles;
-
- decode_delay = (-instr_cycles) + 1;
-
- if (deps[opcode] & FPU_POP)
- {
- int c;
-
- for (c = 0; c < 7; c++)
- fpu_st_latency[c] = fpu_st_latency[c+1];
- fpu_st_latency[7] = 0;
- }
- if (deps[opcode] & FPU_POP2)
- {
- int c;
-
- for (c = 0; c < 6; c++)
- fpu_st_latency[c] = fpu_st_latency[c+2];
- fpu_st_latency[6] = fpu_st_latency[7] = 0;
- }
- if ((timings[opcode] & PAIR_FPU) && !(deps[opcode] & FPU_FXCH))
- {
- /* if (fpu_latency)
- fatal("Bad latency FPU\n");*/
- fpu_latency = FPU_F_LATENCY(timings[opcode]);
- }
-
- if (deps[opcode] & FPU_PUSH)
- {
- int c;
-
- for (c = 0; c < 7; c++)
- fpu_st_latency[c+1] = fpu_st_latency[c];
- fpu_st_latency[0] = 0;
- }
- if (deps[opcode] & FPU_WRITE_ST0)
- {
-/* if (fpu_st_latency[0])
- fatal("Bad latency ST0\n");*/
- fpu_st_latency[0] = FPU_RESULT_LATENCY(timings[opcode]);
- }
- if (deps[opcode] & FPU_WRITE_ST1)
- {
-/* if (fpu_st_latency[1])
- fatal("Bad latency ST1\n");*/
- fpu_st_latency[1] = FPU_RESULT_LATENCY(timings[opcode]);
- }
- if (deps[opcode] & FPU_WRITE_STREG)
- {
- int reg = fetchdat & 7;
- if (deps[opcode] & FPU_POP)
- reg--;
- if (reg >= 0 &&
- !(reg == 0 && (deps[opcode] & FPU_WRITE_ST0)) &&
- !(reg == 1 && (deps[opcode] & FPU_WRITE_ST1)))
- {
-/* if (fpu_st_latency[reg])
- fatal("Bad latency STREG %i %08x %i %016llx %02x\n",fpu_st_latency[reg], fetchdat, reg, timings[opcode], opcode);*/
- fpu_st_latency[reg] = FPU_RESULT_LATENCY(timings[opcode]);
- }
- }
-}
-
-void codegen_timing_pentium_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t op_pc)
-{
- uint64_t *timings;
- uint64_t *deps;
+ uint32_t *timings;
int mod3 = ((fetchdat & 0xc0) == 0xc0);
int bit8 = !(opcode & 1);
- int agi_stall = 0;
switch (last_prefix)
{
case 0x0f:
timings = mod3 ? opcode_timings_0f_mod3 : opcode_timings_0f;
- deps = mod3 ? opcode_deps_0f_mod3 : opcode_deps_0f;
// pclog("timings 0f\n");
break;
case 0xd8:
timings = mod3 ? opcode_timings_d8_mod3 : opcode_timings_d8;
- deps = mod3 ? opcode_deps_d8_mod3 : opcode_deps_d8;
opcode = (opcode >> 3) & 7;
// pclog("timings d8\n");
break;
case 0xd9:
timings = mod3 ? opcode_timings_d9_mod3 : opcode_timings_d9;
- deps = mod3 ? opcode_deps_d9_mod3 : opcode_deps_d9;
-// pclog("timings d9\n");
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
+// pclog("timings d9\n");
break;
case 0xda:
timings = mod3 ? opcode_timings_da_mod3 : opcode_timings_da;
- deps = mod3 ? opcode_deps_da_mod3 : opcode_deps_da;
opcode = (opcode >> 3) & 7;
// pclog("timings da\n");
break;
case 0xdb:
timings = mod3 ? opcode_timings_db_mod3 : opcode_timings_db;
- deps = mod3 ? opcode_deps_db_mod3 : opcode_deps_db;
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
// pclog("timings db\n");
break;
case 0xdc:
timings = mod3 ? opcode_timings_dc_mod3 : opcode_timings_dc;
- deps = mod3 ? opcode_deps_dc_mod3 : opcode_deps_dc;
opcode = (opcode >> 3) & 7;
// pclog("timings dc\n");
break;
case 0xdd:
timings = mod3 ? opcode_timings_dd_mod3 : opcode_timings_dd;
- deps = mod3 ? opcode_deps_dd_mod3 : opcode_deps_dd;
opcode = (opcode >> 3) & 7;
// pclog("timings dd\n");
break;
case 0xde:
timings = mod3 ? opcode_timings_de_mod3 : opcode_timings_de;
- deps = mod3 ? opcode_deps_de_mod3 : opcode_deps_de;
opcode = (opcode >> 3) & 7;
// pclog("timings de\n");
break;
case 0xdf:
timings = mod3 ? opcode_timings_df_mod3 : opcode_timings_df;
- deps = mod3 ? opcode_deps_df_mod3 : opcode_deps_df;
opcode = (opcode >> 3) & 7;
// pclog("timings df\n");
break;
@@ -1143,64 +943,49 @@ void codegen_timing_pentium_opcode(uint8_t opcode, uint32_t fetchdat, int op_32,
default:
switch (opcode)
{
- case 0x80: case 0x82: case 0x83:
- timings = mod3 ? opcode_timings_8x_mod3 : opcode_timings_8x;
- deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x_mod3;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings 80 %p %p %p\n", (void *)timings, (void *)opcode_timings_mod3, (void *)opcode_timings_8x);
- break;
- case 0x81:
- timings = mod3 ? opcode_timings_81_mod3 : opcode_timings_81;
- deps = mod3 ? opcode_deps_81_mod3 : opcode_deps_81;
- opcode = (fetchdat >> 3) & 7;
+ case 0x80: case 0x81: case 0x82: case 0x83:
+ timings = mod3 ? opcode_timings_mod3 : opcode_timings_8x;
+ if (!mod3)
+ opcode = (fetchdat >> 3) & 7;
// pclog("timings 80 %p %p %p\n", (void *)timings, (void *)opcode_timings_mod3, (void *)opcode_timings_8x);
break;
- case 0xc0: case 0xc1: case 0xd0: case 0xd1:
+ case 0xc0: case 0xc1: case 0xd0: case 0xd1: case 0xd2: case 0xd3:
timings = mod3 ? opcode_timings_shift_mod3 : opcode_timings_shift;
- deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
opcode = (fetchdat >> 3) & 7;
// pclog("timings c0\n");
break;
- case 0xd2: case 0xd3:
- timings = mod3 ? opcode_timings_shift_mod3 : opcode_timings_shift;
- deps = mod3 ? opcode_deps_shift_cl_mod3 : opcode_deps_shift_cl;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings d2\n");
- break;
-
case 0xf6:
timings = mod3 ? opcode_timings_f6_mod3 : opcode_timings_f6;
- deps = mod3 ? opcode_deps_f6_mod3 : opcode_deps_f6;
opcode = (fetchdat >> 3) & 7;
// pclog("timings f6\n");
break;
case 0xf7:
timings = mod3 ? opcode_timings_f7_mod3 : opcode_timings_f7;
- deps = mod3 ? opcode_deps_f7_mod3 : opcode_deps_f7;
opcode = (fetchdat >> 3) & 7;
// pclog("timings f7\n");
break;
case 0xff:
timings = mod3 ? opcode_timings_ff_mod3 : opcode_timings_ff;
- deps = mod3 ? opcode_deps_ff_mod3 : opcode_deps_ff;
opcode = (fetchdat >> 3) & 7;
// pclog("timings ff\n");
break;
default:
timings = mod3 ? opcode_timings_mod3 : opcode_timings;
- deps = mod3 ? opcode_deps_mod3 : opcode_deps;
// pclog("timings normal\n");
break;
}
}
+ if (decode_delay < 0)
+ decode_delay = 0;
+
if (u_pipe_full)
{
- uint8_t regmask = get_srcdep_mask(deps[opcode], fetchdat, bit8, u_pipe_op_32);
-
+ uint8_t regmask = get_srcdep_mask(timings[opcode], fetchdat, bit8);
+
if ((u_pipe_timings[u_pipe_opcode] & PAIR_MASK) == PAIR_FX &&
(timings[opcode] & PAIR_MASK) != PAIR_FXCH)
goto nopair;
@@ -1208,112 +993,52 @@ void codegen_timing_pentium_opcode(uint8_t opcode, uint32_t fetchdat, int op_32,
if ((timings[opcode] & PAIR_MASK) == PAIR_FXCH &&
(u_pipe_timings[u_pipe_opcode] & PAIR_MASK) != PAIR_FX)
goto nopair;
-
- if ((u_pipe_timings[u_pipe_opcode] & PAIR_MASK) == PAIR_FX &&
- (timings[opcode] & PAIR_MASK) == PAIR_FXCH)
- {
- int temp;
-
- if (check_agi(u_pipe_deps, u_pipe_opcode, u_pipe_fetchdat, u_pipe_op_32))
- agi_stall = 1;
-
- codegen_instruction(u_pipe_timings, u_pipe_deps, u_pipe_opcode, u_pipe_fetchdat, u_pipe_decode_delay_offset, u_pipe_op_32, agi_stall);
-
- temp = fpu_st_latency[fetchdat & 7];
- fpu_st_latency[fetchdat & 7] = fpu_st_latency[0];
- fpu_st_latency[0] = temp;
-
- u_pipe_full = 0;
- decode_delay_offset = 0;
- regmask_modified = u_pipe_regmask;
- addr_regmask = 0;
- return;
- }
- if ((timings[opcode] & PAIR_V) && !(u_pipe_regmask & regmask) && (decode_delay+decode_delay_offset+u_pipe_decode_delay_offset) <= 0)
+ if ((timings[opcode] & PAIR_V) && !(u_pipe_regmask & regmask) && !decode_delay)
{
- int has_displacement;
+ int t1 = u_pipe_timings[u_pipe_opcode] & CYCLES_MASK;
+ int t2 = timings[opcode] & CYCLES_MASK;
+ int t_pair;
- if (timings[opcode] & CYCLES_HASIMM)
- has_displacement = codegen_timing_has_displacement(fetchdat, op_32);
- else
- has_displacement = 0;
-
- if (!has_displacement && (!cpu_has_feature(CPU_FEATURE_MMX) || codegen_timing_instr_length(timings[opcode], fetchdat, op_32) <= 7))
- {
- int t1 = u_pipe_timings[u_pipe_opcode] & CYCLES_MASK;
- int t2 = timings[opcode] & CYCLES_MASK;
- int t_pair;
- uint64_t temp_timing;
- uint64_t temp_deps = 0;
+ if (t1 < 0 || t2 < 0 || t1 > CYCLES_BRANCH || t2 > CYCLES_BRANCH)
+ fatal("Pair out of range\n");
- if (!(u_pipe_timings[u_pipe_opcode] & PAIR_FPU))
- t1 &= 3;
- if (!(timings[opcode] & PAIR_FPU))
- t2 &= 3;
+ t_pair = pair_timings[t1][t2];
+ if (t_pair < 1)
+ fatal("Illegal pair timings : t1=%i t2=%i u_opcode=%02x v_opcode=%02x\n", t1, t2, u_pipe_opcode, opcode);
- if (t1 < 0 || t2 < 0 || t1 > CYCLES_BRANCH || t2 > CYCLES_BRANCH)
- fatal("Pair out of range\n");
+// pclog("Paired timings : t_pair=%i t1=%i t2=%i u_opcode=%02x v_opcode=%02x %08x:%08x\n", t_pair, t1, t2, u_pipe_opcode, opcode, cs, pc);
+ codegen_block_cycles += t_pair;
+ decode_delay = (-t_pair) + 1;
- t_pair = pair_timings[t1][t2];
- if (t_pair < 1)
- fatal("Illegal pair timings : t1=%i t2=%i u_opcode=%02x v_opcode=%02x\n", t1, t2, u_pipe_opcode, opcode);
-
- /*Instruction can pair with previous*/
- temp_timing = t_pair;
- if (check_agi(deps, opcode, fetchdat, op_32) || check_agi(u_pipe_deps, u_pipe_opcode, u_pipe_fetchdat, u_pipe_op_32))
- agi_stall = 1;
- codegen_instruction(&temp_timing, &temp_deps, 0, 0, 0, 0, agi_stall);
- u_pipe_full = 0;
- decode_delay_offset = 0;
-
- regmask_modified = get_dstdep_mask(deps[opcode], fetchdat, bit8) | u_pipe_regmask;
- addr_regmask = 0;
- return;
- }
+ /*Instruction can pair with previous*/
+ u_pipe_full = 0;
+ return;
}
nopair:
/*Instruction can not pair with previous*/
/*Run previous now*/
- if (check_agi(u_pipe_deps, u_pipe_opcode, u_pipe_fetchdat, u_pipe_op_32))
- agi_stall = 1;
- codegen_instruction(u_pipe_timings, u_pipe_deps, u_pipe_opcode, u_pipe_fetchdat, u_pipe_decode_delay_offset, u_pipe_op_32, agi_stall);
+ codegen_block_cycles += COUNT(u_pipe_timings[u_pipe_opcode], u_pipe_op_32) + decode_delay;
+ decode_delay = (-COUNT(u_pipe_timings[u_pipe_opcode], u_pipe_op_32)) + 1;
u_pipe_full = 0;
- regmask_modified = u_pipe_regmask;
- addr_regmask = 0;
+// pclog("Evicited U-pipe timings : t1=%i u_opcode=%02x decode_delay=%i %08x:%08x\n", COUNT(u_pipe_timings[u_pipe_opcode], u_pipe_op_32), u_pipe_opcode, decode_delay, cs, pc);
}
- if ((timings[opcode] & PAIR_U) && (decode_delay + decode_delay_offset) <= 0)
+ if ((timings[opcode] & PAIR_U) && !decode_delay)
{
- int has_displacement;
-
- if (timings[opcode] & CYCLES_HASIMM)
- has_displacement = codegen_timing_has_displacement(fetchdat, op_32);
- else
- has_displacement = 0;
-
- if ((!has_displacement || cpu_has_feature(CPU_FEATURE_MMX)) && (!cpu_has_feature(CPU_FEATURE_MMX) || codegen_timing_instr_length(timings[opcode], fetchdat, op_32) <= 7))
- {
- /*Instruction might pair with next*/
- u_pipe_full = 1;
- u_pipe_opcode = opcode;
- u_pipe_timings = timings;
- u_pipe_op_32 = op_32;
- u_pipe_regmask = get_dstdep_mask(deps[opcode], fetchdat, bit8);
- u_pipe_fetchdat = fetchdat;
- u_pipe_decode_delay_offset = decode_delay_offset;
- u_pipe_deps = deps;
- decode_delay_offset = 0;
- return;
- }
+ /*Instruction might pair with next*/
+ u_pipe_full = 1;
+ u_pipe_opcode = opcode;
+ u_pipe_timings = timings;
+ u_pipe_op_32 = op_32;
+ u_pipe_regmask = get_dstdep_mask(timings[opcode], fetchdat, bit8);
+ return;
}
/*Instruction can not pair and must run now*/
- if (check_agi(deps, opcode, fetchdat, op_32))
- agi_stall = 1;
- codegen_instruction(timings, deps, opcode, fetchdat, decode_delay_offset, op_32, agi_stall);
- decode_delay_offset = 0;
- regmask_modified = get_dstdep_mask(deps[opcode], fetchdat, bit8);
- addr_regmask = 0;
+
+ codegen_block_cycles += COUNT(timings[opcode], op_32) + decode_delay;
+ decode_delay = (-COUNT(timings[opcode], op_32)) + 1;
+// pclog("Non-pairable timings : %08x t1=%i opcode=%02x mod3=%i decode_delay=%i %08x:%08x %08x %p %p\n", timings[opcode], COUNT(timings[opcode], op_32), opcode, mod3, decode_delay, cs, pc, opcode_timings[0x04], (void *)timings, (void *)opcode_timings);
}
void codegen_timing_pentium_block_end()
@@ -1321,24 +1046,16 @@ void codegen_timing_pentium_block_end()
if (u_pipe_full)
{
/*Run previous now*/
- if (check_agi(u_pipe_deps, u_pipe_opcode, u_pipe_fetchdat, u_pipe_op_32))
- codegen_block_cycles++;
- codegen_block_cycles += COUNT(u_pipe_timings[u_pipe_opcode], u_pipe_deps[u_pipe_opcode], u_pipe_op_32) + decode_delay + decode_delay_offset;
+ codegen_block_cycles += COUNT(u_pipe_timings[u_pipe_opcode], u_pipe_op_32) + decode_delay;
u_pipe_full = 0;
}
}
-int codegen_timing_pentium_jump_cycles()
-{
- return 0;
-}
-
codegen_timing_t codegen_timing_pentium =
{
codegen_timing_pentium_start,
codegen_timing_pentium_prefix,
codegen_timing_pentium_opcode,
codegen_timing_pentium_block_start,
- codegen_timing_pentium_block_end,
- codegen_timing_pentium_jump_cycles
+ codegen_timing_pentium_block_end
};
diff --git a/src/codegen_timing_winchip.c b/src/codegen_timing_winchip.c
index c23b30b..160650e 100644
--- a/src/codegen_timing_winchip.c
+++ b/src/codegen_timing_winchip.c
@@ -5,8 +5,6 @@
#include "x87.h"
#include "mem.h"
#include "codegen.h"
-#include "codegen_ops.h"
-#include "codegen_timing_common.h"
#define CYCLES(c) (int *)c
#define CYCLES2(c16, c32) (int *)((-1 & ~0xffff) | c16 | (c32 << 8))
@@ -74,7 +72,7 @@ static int *opcode_timings_0f[256] =
/*a0*/ CYCLES(3), CYCLES(3), CYCLES(14), CYCLES(8), CYCLES(3), CYCLES(4), NULL, NULL, CYCLES(3), CYCLES(3), NULL, CYCLES(13), CYCLES(3), CYCLES(3), NULL, CYCLES2(18,30),
/*b0*/ CYCLES(10), CYCLES(10), CYCLES(6), CYCLES(13), CYCLES(6), CYCLES(6), CYCLES(3), CYCLES(3), NULL, NULL, CYCLES(6), CYCLES(13), CYCLES(7), CYCLES(7), CYCLES(3), CYCLES(3),
-/*c0*/ CYCLES(4), CYCLES(4), NULL, NULL, NULL, NULL, NULL, CYCLES(3), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
+/*c0*/ CYCLES(4), CYCLES(4), NULL, NULL, NULL, NULL, NULL, NULL, CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
/*d0*/ NULL, &timing_rm, &timing_rm, &timing_rm, NULL, &timing_rm, NULL, NULL, &timing_rm, &timing_rm, NULL, &timing_rm, &timing_rm, &timing_rm, NULL, &timing_rm,
/*e0*/ NULL, &timing_rm, &timing_rm, NULL, NULL, &timing_rm, NULL, NULL, &timing_rm, &timing_rm, NULL, &timing_rm, &timing_rm, &timing_rm, NULL, &timing_rm,
/*f0*/ NULL, &timing_rm, &timing_rm, &timing_rm, NULL, &timing_rm, NULL, NULL, &timing_rm, &timing_rm, &timing_rm, NULL, &timing_rm, &timing_rm, &timing_rm, NULL,
@@ -96,7 +94,7 @@ static int *opcode_timings_0f_mod3[256] =
/*a0*/ CYCLES(3), CYCLES(3), CYCLES(14), CYCLES(8), CYCLES(3), CYCLES(4), NULL, NULL, CYCLES(3), CYCLES(3), NULL, CYCLES(13), CYCLES(3), CYCLES(3), NULL, CYCLES2(18,30),
/*b0*/ CYCLES(10), CYCLES(10), CYCLES(6), CYCLES(13), CYCLES(6), CYCLES(6), CYCLES(3), CYCLES(3), NULL, NULL, CYCLES(6), CYCLES(13), CYCLES(7), CYCLES(7), CYCLES(3), CYCLES(3),
-/*c0*/ CYCLES(4), CYCLES(4), NULL, NULL, NULL, NULL, NULL, CYCLES(3), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
+/*c0*/ CYCLES(4), CYCLES(4), NULL, NULL, NULL, NULL, NULL, NULL, CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
/*d0*/ NULL, &timing_rr, &timing_rr, &timing_rr, NULL, &timing_rr, NULL, NULL, &timing_rr, &timing_rr, NULL, &timing_rr, &timing_rr, &timing_rr, NULL, &timing_rr,
/*e0*/ NULL, &timing_rr, &timing_rr, NULL, NULL, &timing_rr, NULL, NULL, &timing_rr, &timing_rr, NULL, &timing_rr, &timing_rr, &timing_rr, NULL, &timing_rr,
/*f0*/ NULL, &timing_rr, &timing_rr, &timing_rr, NULL, &timing_rr, NULL, NULL, &timing_rr, &timing_rr, &timing_rr, NULL, &timing_rr, &timing_rr, &timing_rr, NULL,
@@ -249,22 +247,9 @@ static int *opcode_timings_8x[8] =
{
&timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_rm
};
-static int *opcode_timings_8x_mod3[8] =
-{
- &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_rm
-};
-static int *opcode_timings_81[8] =
-{
- &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_rm
-};
-static int *opcode_timings_81_mod3[8] =
-{
- &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_mr, &timing_rm
-};
static int timing_count;
static uint8_t last_prefix;
-static uint32_t regmask_modified;
static inline int COUNT(int *c, int op_32)
{
@@ -281,7 +266,6 @@ static inline int COUNT(int *c, int op_32)
void codegen_timing_winchip_block_start()
{
- regmask_modified = 0;
}
void codegen_timing_winchip_start()
@@ -296,143 +280,96 @@ void codegen_timing_winchip_prefix(uint8_t prefix, uint32_t fetchdat)
last_prefix = prefix;
}
-void codegen_timing_winchip_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t op_pc)
+void codegen_timing_winchip_opcode(uint8_t opcode, uint32_t fetchdat, int op_32)
{
int **timings;
- uint64_t *deps;
int mod3 = ((fetchdat & 0xc0) == 0xc0);
- int bit8 = !(opcode & 1);
switch (last_prefix)
{
case 0x0f:
timings = mod3 ? opcode_timings_0f_mod3 : opcode_timings_0f;
- deps = mod3 ? opcode_deps_0f_mod3 : opcode_deps_0f;
-// pclog("timings 0f\n");
break;
case 0xd8:
timings = mod3 ? opcode_timings_d8_mod3 : opcode_timings_d8;
- deps = mod3 ? opcode_deps_d8_mod3 : opcode_deps_d8;
opcode = (opcode >> 3) & 7;
-// pclog("timings d8\n");
break;
case 0xd9:
timings = mod3 ? opcode_timings_d9_mod3 : opcode_timings_d9;
- deps = mod3 ? opcode_deps_d9_mod3 : opcode_deps_d9;
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
-// pclog("timings d9\n");
break;
case 0xda:
timings = mod3 ? opcode_timings_da_mod3 : opcode_timings_da;
- deps = mod3 ? opcode_deps_da_mod3 : opcode_deps_da;
opcode = (opcode >> 3) & 7;
-// pclog("timings da\n");
break;
case 0xdb:
timings = mod3 ? opcode_timings_db_mod3 : opcode_timings_db;
- deps = mod3 ? opcode_deps_db_mod3 : opcode_deps_db;
opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
-// pclog("timings db\n");
break;
case 0xdc:
timings = mod3 ? opcode_timings_dc_mod3 : opcode_timings_dc;
- deps = mod3 ? opcode_deps_dc_mod3 : opcode_deps_dc;
opcode = (opcode >> 3) & 7;
-// pclog("timings dc\n");
break;
case 0xdd:
timings = mod3 ? opcode_timings_dd_mod3 : opcode_timings_dd;
- deps = mod3 ? opcode_deps_dd_mod3 : opcode_deps_dd;
opcode = (opcode >> 3) & 7;
-// pclog("timings dd\n");
break;
case 0xde:
timings = mod3 ? opcode_timings_de_mod3 : opcode_timings_de;
- deps = mod3 ? opcode_deps_de_mod3 : opcode_deps_de;
opcode = (opcode >> 3) & 7;
-// pclog("timings de\n");
break;
case 0xdf:
timings = mod3 ? opcode_timings_df_mod3 : opcode_timings_df;
- deps = mod3 ? opcode_deps_df_mod3 : opcode_deps_df;
opcode = (opcode >> 3) & 7;
-// pclog("timings df\n");
break;
default:
switch (opcode)
{
- case 0x80: case 0x82: case 0x83:
- timings = mod3 ? opcode_timings_8x_mod3 : opcode_timings_8x;
- deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x_mod3;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings 80 %p %p %p\n", (void *)timings, (void *)opcode_timings_mod3, (void *)opcode_timings_8x);
- break;
- case 0x81:
- timings = mod3 ? opcode_timings_81_mod3 : opcode_timings_81;
- deps = mod3 ? opcode_deps_81_mod3 : opcode_deps_81;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings 80 %p %p %p\n", (void *)timings, (void *)opcode_timings_mod3, (void *)opcode_timings_8x);
+ case 0x80: case 0x81: case 0x82: case 0x83:
+ timings = mod3 ? opcode_timings_mod3 : opcode_timings_8x;
+ if (!mod3)
+ opcode = (fetchdat >> 3) & 7;
break;
case 0xc0: case 0xc1: case 0xd0: case 0xd1: case 0xd2: case 0xd3:
timings = mod3 ? opcode_timings_shift_mod3 : opcode_timings_shift;
- deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
opcode = (fetchdat >> 3) & 7;
-// pclog("timings c0\n");
break;
case 0xf6:
timings = mod3 ? opcode_timings_f6_mod3 : opcode_timings_f6;
- deps = mod3 ? opcode_deps_f6_mod3 : opcode_deps_f6;
opcode = (fetchdat >> 3) & 7;
-// pclog("timings f6\n");
break;
case 0xf7:
timings = mod3 ? opcode_timings_f7_mod3 : opcode_timings_f7;
- deps = mod3 ? opcode_deps_f7_mod3 : opcode_deps_f7;
opcode = (fetchdat >> 3) & 7;
-// pclog("timings f7\n");
break;
case 0xff:
timings = mod3 ? opcode_timings_ff_mod3 : opcode_timings_ff;
- deps = mod3 ? opcode_deps_ff_mod3 : opcode_deps_ff;
opcode = (fetchdat >> 3) & 7;
-// pclog("timings ff\n");
break;
default:
timings = mod3 ? opcode_timings_mod3 : opcode_timings;
- deps = mod3 ? opcode_deps_mod3 : opcode_deps;
-// pclog("timings normal\n");
break;
}
}
timing_count += COUNT(timings[opcode], op_32);
- if (regmask_modified & get_addr_regmask(deps[opcode], fetchdat, op_32))
- timing_count++; /*AGI stall*/
codegen_block_cycles += timing_count;
-
- regmask_modified = get_dstdep_mask(deps[opcode], fetchdat, bit8);
}
void codegen_timing_winchip_block_end()
{
}
-int codegen_timing_winchip_jump_cycles()
-{
- return 0;
-}
-
codegen_timing_t codegen_timing_winchip =
{
codegen_timing_winchip_start,
codegen_timing_winchip_prefix,
codegen_timing_winchip_opcode,
codegen_timing_winchip_block_start,
- codegen_timing_winchip_block_end,
- codegen_timing_winchip_jump_cycles
+ codegen_timing_winchip_block_end
};
diff --git a/src/codegen_timing_winchip2.c b/src/codegen_timing_winchip2.c
deleted file mode 100644
index c85a0e9..0000000
--- a/src/codegen_timing_winchip2.c
+++ /dev/null
@@ -1,759 +0,0 @@
-/*Since IDT/Centaur didn't document cycle timings in the WinChip datasheets, and
- I don't currently own a WinChip 2 to test against, most of the timing here is
- a guess. This code makes the current (probably wrong) assumptions :
- - FPU uses same timings as a Pentium, except for FXCH (which doesn't pair)
- - 3DNow! instructions perfectly pair
- - MMX follows mostly Pentium rules - one pipeline has shift/pack, one has
- multiply, and other instructions can execute in either pipeline
- - Instructions with prefixes can pair if both instructions are fully decoded
- when the first instruction starts execution.*/
-#include "ibm.h"
-#include "cpu.h"
-#include "x86.h"
-#include "x86_ops.h"
-#include "x87.h"
-#include "mem.h"
-#include "codegen.h"
-#include "codegen_ops.h"
-#include "codegen_timing_common.h"
-
-/*Instruction has different execution time for 16 and 32 bit data. Does not pair */
-#define CYCLES_HAS_MULTI (1 << 31)
-
-#define CYCLES_FPU (1 << 30)
-
-#define CYCLES_IS_MMX_MUL (1 << 29)
-#define CYCLES_IS_MMX_SHIFT (1 << 28)
-#define CYCLES_IS_MMX_ANY (1 << 27)
-#define CYCLES_IS_3DNOW (1 << 26)
-
-#define CYCLES_MMX_MUL(c) (CYCLES_IS_MMX_MUL | c)
-#define CYCLES_MMX_SHIFT(c) (CYCLES_IS_MMX_SHIFT | c)
-#define CYCLES_MMX_ANY(c) (CYCLES_IS_MMX_ANY | c)
-#define CYCLES_3DNOW(c) (CYCLES_IS_3DNOW | c)
-
-#define CYCLES_IS_MMX (CYCLES_IS_MMX_MUL | CYCLES_IS_MMX_SHIFT | CYCLES_IS_MMX_ANY | CYCLES_IS_3DNOW)
-
-#define GET_CYCLES(c) (c & ~(CYCLES_HAS_MULTI | CYCLES_FPU | CYCLES_IS_MMX))
-
-#define CYCLES(c) c
-#define CYCLES2(c16, c32) (CYCLES_HAS_MULTI | c16 | (c32 << 8))
-
-/*comp_time = cycles until instruction complete
- i_overlap = cycles that overlap with integer
- f_overlap = cycles that overlap with subsequent FPU*/
-#define FPU_CYCLES(comp_time, i_overlap, f_overlap) (comp_time) | (i_overlap << 8) | (f_overlap << 16) | CYCLES_FPU
-
-#define FPU_COMP_TIME(timing) (timing & 0xff)
-#define FPU_I_OVERLAP(timing) ((timing >> 8) & 0xff)
-#define FPU_F_OVERLAP(timing) ((timing >> 16) & 0xff)
-
-#define FPU_I_LATENCY(timing) (FPU_COMP_TIME(timing) - FPU_I_OVERLAP(timing))
-
-#define FPU_F_LATENCY(timing) (FPU_I_OVERLAP(timing) - FPU_F_OVERLAP(timing))
-
-#define FPU_RESULT_LATENCY(timing) ((timing >> 8) & 0xff)
-
-#define INVALID 0
-
-static uint32_t opcode_timings[256] =
-{
-/*00*/ CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(3), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(1), CYCLES(1), CYCLES(2), INVALID,
-/*10*/ CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(3), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(3),
-/*20*/ CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(3), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(3),
-/*30*/ CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2),
-
-/*40*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-/*50*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-/*60*/ CYCLES(11), CYCLES(9), CYCLES(7), CYCLES(9), CYCLES(4), CYCLES(4), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES2(17,25), CYCLES(1), CYCLES2(17,20), CYCLES(17), CYCLES(17), CYCLES(17), CYCLES(17),
-/*70*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-
-/*80*/ CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(5), CYCLES(5), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(3), CYCLES(1), CYCLES(5), CYCLES(6),
-/*90*/ CYCLES(1), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(0), CYCLES(4), CYCLES(4), CYCLES(5), CYCLES(2), CYCLES(3),
-/*a0*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(7), CYCLES(7), CYCLES(8), CYCLES(8), CYCLES(1), CYCLES(1), CYCLES(5), CYCLES(5), CYCLES(5), CYCLES(5), CYCLES(6), CYCLES(6),
-/*b0*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-
-/*c0*/ CYCLES(4), CYCLES(4), CYCLES(5), CYCLES(5), CYCLES(6), CYCLES(6), CYCLES(1), CYCLES(1), CYCLES(14), CYCLES(5), CYCLES(0), CYCLES(0), CYCLES(0), CYCLES(0), CYCLES(3), CYCLES(0),
-/*d0*/ CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(15), CYCLES(14), CYCLES(2), CYCLES(4), INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*e0*/ CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(5), CYCLES(14), CYCLES(14), CYCLES(16), CYCLES(16), CYCLES(3), CYCLES(3), CYCLES(17), CYCLES(3), CYCLES(14), CYCLES(14), CYCLES(14), CYCLES(14),
-/*f0*/ CYCLES(4), CYCLES(0), CYCLES(0), CYCLES(0), CYCLES(4), CYCLES(2), INVALID, INVALID, CYCLES(2), CYCLES(2), CYCLES(3), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(3), INVALID
-};
-
-static uint32_t opcode_timings_mod3[256] =
-{
-/*00*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(3), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), INVALID,
-/*10*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(3), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(3),
-/*20*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(3), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(3),
-/*30*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2),
-
-/*40*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-/*50*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-/*60*/ CYCLES(11), CYCLES(9), CYCLES(7), CYCLES(9), CYCLES(4), CYCLES(4), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES2(14,25), CYCLES(1), CYCLES2(17,20), CYCLES(17), CYCLES(17), CYCLES(17), CYCLES(17),
-/*70*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-
-/*80*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(5), CYCLES(5), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(2), CYCLES(1), CYCLES(2), CYCLES(1),
-/*90*/ CYCLES(1), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(0), CYCLES(4), CYCLES(4), CYCLES(5), CYCLES(2), CYCLES(3),
-/*a0*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(7), CYCLES(7), CYCLES(8), CYCLES(8), CYCLES(1), CYCLES(1), CYCLES(5), CYCLES(5), CYCLES(5), CYCLES(5), CYCLES(6), CYCLES(6),
-/*b0*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-
-/*c0*/ CYCLES(4), CYCLES(4), CYCLES(5), CYCLES(5), CYCLES(6), CYCLES(6), CYCLES(1), CYCLES(1), CYCLES(14), CYCLES(5), CYCLES(0), CYCLES(0), CYCLES(0), CYCLES(0), CYCLES(3), CYCLES(0),
-/*d0*/ CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(4), CYCLES(15), CYCLES(14), CYCLES(2), CYCLES(4), INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*e0*/ CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(5), CYCLES(14), CYCLES(14), CYCLES(16), CYCLES(16), CYCLES(3), CYCLES(3), CYCLES(17), CYCLES(3), CYCLES(14), CYCLES(14), CYCLES(14), CYCLES(14),
-/*f0*/ CYCLES(4), CYCLES(0), CYCLES(0), CYCLES(0), CYCLES(4), CYCLES(2), INVALID, INVALID, CYCLES(2), CYCLES(2), CYCLES(3), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(3), INVALID,
-};
-
-static uint32_t opcode_timings_0f[256] =
-{
-/*00*/ CYCLES(20), CYCLES(11), CYCLES(11), CYCLES(10), INVALID, CYCLES(195), CYCLES(7), INVALID, CYCLES(1000), CYCLES(10000), INVALID, INVALID, INVALID, CYCLES_3DNOW(1), CYCLES(1), CYCLES_3DNOW(1),
-/*10*/ INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*20*/ CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(6), INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*30*/ CYCLES(9), CYCLES(1), CYCLES(9), INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-
-/*40*/ INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*50*/ INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*60*/ CYCLES_MMX_SHIFT(2), CYCLES_MMX_SHIFT(2), CYCLES_MMX_SHIFT(2), CYCLES_MMX_SHIFT(2), CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2), CYCLES_MMX_SHIFT(2), CYCLES_MMX_SHIFT(2), CYCLES_MMX_SHIFT(2), CYCLES_MMX_SHIFT(2), CYCLES_MMX_SHIFT(2), INVALID, INVALID, CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2),
-/*70*/ INVALID, CYCLES_MMX_SHIFT(2), CYCLES_MMX_SHIFT(2), CYCLES_MMX_SHIFT(2), CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2), CYCLES(100), INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2),
-
-/*80*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-/*90*/ CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3),
-/*a0*/ CYCLES(3), CYCLES(3), CYCLES(14), CYCLES(8), CYCLES(3), CYCLES(4), INVALID, INVALID, CYCLES(3), CYCLES(3), INVALID, CYCLES(13), CYCLES(3), CYCLES(3), INVALID, CYCLES2(18,30),
-/*b0*/ CYCLES(10), CYCLES(10), CYCLES(6), CYCLES(13), CYCLES(6), CYCLES(6), CYCLES(3), CYCLES(3), INVALID, INVALID, CYCLES(6), CYCLES(13), CYCLES(7), CYCLES(7), CYCLES(3), CYCLES(3),
-
-/*c0*/ CYCLES(4), CYCLES(4), INVALID, INVALID, INVALID, INVALID, INVALID, CYCLES(3), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-/*d0*/ INVALID, CYCLES_MMX_SHIFT(2), CYCLES_MMX_SHIFT(2), CYCLES_MMX_SHIFT(2), INVALID, CYCLES_MMX_MUL(2), INVALID, INVALID, CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2), INVALID, CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2), INVALID, CYCLES_MMX_ANY(2),
-/*e0*/ INVALID, CYCLES_MMX_SHIFT(2), CYCLES_MMX_SHIFT(2), INVALID, INVALID, CYCLES_MMX_MUL(2), INVALID, INVALID, CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2), INVALID, CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2), INVALID, CYCLES_MMX_ANY(2),
-/*f0*/ INVALID, CYCLES_MMX_SHIFT(2), CYCLES_MMX_SHIFT(2), CYCLES_MMX_SHIFT(2), INVALID, CYCLES_MMX_MUL(2), INVALID, INVALID, CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2), INVALID, CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2), CYCLES_MMX_ANY(2), INVALID,
-};
-static uint32_t opcode_timings_0f_mod3[256] =
-{
-/*00*/ CYCLES(20), CYCLES(11), CYCLES(11), CYCLES(10), INVALID, CYCLES(195), CYCLES(7), INVALID, CYCLES(1000), CYCLES(10000), INVALID, INVALID, INVALID, CYCLES_3DNOW(1), CYCLES(1), CYCLES_3DNOW(1),
-/*10*/ INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*20*/ CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(6), CYCLES(6), INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*30*/ CYCLES(9), CYCLES(1), CYCLES(9), INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-
-/*40*/ INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*50*/ INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, INVALID,
-/*60*/ CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), INVALID, INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1),
-/*70*/ INVALID, CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES(100), INVALID, INVALID, INVALID, INVALID, INVALID, INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1),
-
-/*80*/ CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-/*90*/ CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3),
-/*a0*/ CYCLES(3), CYCLES(3), CYCLES(14), CYCLES(8), CYCLES(3), CYCLES(4), INVALID, INVALID, CYCLES(3), CYCLES(3), INVALID, CYCLES(13), CYCLES(3), CYCLES(3), INVALID, CYCLES2(18,30),
-/*b0*/ CYCLES(10), CYCLES(10), CYCLES(6), CYCLES(13), CYCLES(6), CYCLES(6), CYCLES(3), CYCLES(3), INVALID, INVALID, CYCLES(6), CYCLES(13), CYCLES(7), CYCLES(7), CYCLES(3), CYCLES(3),
-
-/*c0*/ CYCLES(4), CYCLES(4), INVALID, INVALID, INVALID, INVALID, INVALID, CYCLES(3), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1), CYCLES(1),
-/*d0*/ INVALID, CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), INVALID, CYCLES_MMX_MUL(1), INVALID, INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), INVALID, CYCLES_MMX_ANY(1),
-/*e0*/ INVALID, CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), INVALID, INVALID, CYCLES_MMX_MUL(1), INVALID, INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), INVALID, CYCLES_MMX_ANY(1),
-/*f0*/ INVALID, CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), CYCLES_MMX_SHIFT(1), INVALID, CYCLES_MMX_MUL(1), INVALID, INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), INVALID, CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), CYCLES_MMX_ANY(1), INVALID,
-};
-
-static uint32_t opcode_timings_shift[8] =
-{
- CYCLES(7), CYCLES(7), CYCLES(10), CYCLES(10), CYCLES(7), CYCLES(7), CYCLES(7), CYCLES(7)
-};
-static uint32_t opcode_timings_shift_mod3[8] =
-{
- CYCLES(3), CYCLES(3), CYCLES(9), CYCLES(9), CYCLES(3), CYCLES(3), CYCLES(3), CYCLES(3)
-};
-
-static uint32_t opcode_timings_f6[8] =
-{
- CYCLES(2), INVALID, CYCLES(2), CYCLES(2), CYCLES(13), CYCLES(14), CYCLES(16), CYCLES(19)
-};
-static uint32_t opcode_timings_f6_mod3[8] =
-{
- CYCLES(1), INVALID, CYCLES(1), CYCLES(1), CYCLES(13), CYCLES(14), CYCLES(16), CYCLES(19)
-};
-static uint32_t opcode_timings_f7[8] =
-{
- CYCLES(2), INVALID, CYCLES(2), CYCLES(2), CYCLES(21), CYCLES2(22,38), CYCLES2(24,40), CYCLES2(27,43)
-};
-static uint32_t opcode_timings_f7_mod3[8] =
-{
- CYCLES(1), INVALID, CYCLES(1), CYCLES(1), CYCLES(21), CYCLES2(22,38), CYCLES2(24,40), CYCLES2(27,43)
-};
-static uint32_t opcode_timings_ff[8] =
-{
- CYCLES(2), CYCLES(2), CYCLES(5), CYCLES(0), CYCLES(5), CYCLES(0), CYCLES(5), INVALID
-};
-static uint32_t opcode_timings_ff_mod3[8] =
-{
- CYCLES(1), CYCLES(1), CYCLES(5), CYCLES(0), CYCLES(5), CYCLES(0), CYCLES(5), INVALID
-};
-
-static uint32_t opcode_timings_d8[8] =
-{
-/* FADDs FMULs FCOMs FCOMPs*/
- FPU_CYCLES(3,2,2), FPU_CYCLES(3,2,2), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0),
-/* FSUBs FSUBRs FDIVs FDIVRs*/
- FPU_CYCLES(3,2,2), FPU_CYCLES(3,2,2), FPU_CYCLES(39,38,2), FPU_CYCLES(39,38,2)
-};
-static uint32_t opcode_timings_d8_mod3[8] =
-{
-/* FADD FMUL FCOM FCOMP*/
- FPU_CYCLES(3,2,2), FPU_CYCLES(3,2,2), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0),
-/* FSUB FSUBR FDIV FDIVR*/
- FPU_CYCLES(3,2,2), FPU_CYCLES(3,2,2), FPU_CYCLES(39,38,2), FPU_CYCLES(39,38,2)
-};
-
-static uint32_t opcode_timings_d9[8] =
-{
-/* FLDs FSTs FSTPs*/
- FPU_CYCLES(1,0,0), INVALID, FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0),
-/* FLDENV FLDCW FSTENV FSTCW*/
- FPU_CYCLES(32,0,0), FPU_CYCLES(8,0,0), FPU_CYCLES(48,0,0), FPU_CYCLES(2,0,0)
-};
-static uint32_t opcode_timings_d9_mod3[64] =
-{
- /*FLD*/
- FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0),
- FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0),
- /*FXCH*/
- FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0),
- FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0),
- /*FNOP*/
- FPU_CYCLES(3,0,0), INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
- /*FSTP*/
- FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0),
- FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0),
-/* opFCHS opFABS*/
- FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0), INVALID, INVALID,
-/* opFTST opFXAM*/
- FPU_CYCLES(1,0,0), FPU_CYCLES(21,4,0), INVALID, INVALID,
-/* opFLD1 opFLDL2T opFLDL2E opFLDPI*/
- FPU_CYCLES(2,0,0), FPU_CYCLES(5,2,2), FPU_CYCLES(5,2,2), FPU_CYCLES(5,2,2),
-/* opFLDEG2 opFLDLN2 opFLDZ*/
- FPU_CYCLES(5,2,2), FPU_CYCLES(5,2,2), FPU_CYCLES(2,0,0), INVALID,
-/* opF2XM1 opFYL2X opFPTAN opFPATAN*/
- FPU_CYCLES(53,2,2), FPU_CYCLES(103,2,2),FPU_CYCLES(120,36,0),FPU_CYCLES(112,2,2),
-/* opFDECSTP opFINCSTP,*/
- INVALID, INVALID, FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0),
-/* opFPREM opFSQRT opFSINCOS*/
- FPU_CYCLES(64,2,2), INVALID, FPU_CYCLES(70,69,2),FPU_CYCLES(89,2,2),
-/* opFRNDINT opFSCALE opFSIN opFCOS*/
- FPU_CYCLES(9,0,0), FPU_CYCLES(20,5,0), FPU_CYCLES(65,2,2), FPU_CYCLES(65,2,2)
-};
-
-static uint32_t opcode_timings_da[8] =
-{
-/* FIADDl FIMULl FICOMl FICOMPl*/
- FPU_CYCLES(6,2,2), FPU_CYCLES(6,2,2), FPU_CYCLES(4,0,0), FPU_CYCLES(4,0,0),
-/* FISUBl FISUBRl FIDIVl FIDIVRl*/
- FPU_CYCLES(6,2,2), FPU_CYCLES(6,2,2), FPU_CYCLES(42,38,2), FPU_CYCLES(42,38,2)
-};
-static uint32_t opcode_timings_da_mod3[8] =
-{
- INVALID, INVALID, INVALID, INVALID,
-/* FCOMPP*/
- INVALID, FPU_CYCLES(1,0,0), INVALID, INVALID
-};
-
-
-static uint32_t opcode_timings_db[8] =
-{
-/* FLDil FSTil FSTPil*/
- FPU_CYCLES(3,2,2), INVALID, FPU_CYCLES(6,0,0), FPU_CYCLES(6,0,0),
-/* FLDe FSTPe*/
- INVALID, FPU_CYCLES(3,0,0), INVALID, FPU_CYCLES(3,0,0)
-};
-static uint32_t opcode_timings_db_mod3[64] =
-{
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
-/* opFNOP opFCLEX opFINIT*/
- INVALID, FPU_CYCLES(1,0,0), FPU_CYCLES(7,0,0), FPU_CYCLES(17,0,0),
-/* opFNOP opFNOP*/
- FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0), INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-
- INVALID, INVALID, INVALID, INVALID,
- INVALID, INVALID, INVALID, INVALID,
-};
-
-static uint32_t opcode_timings_dc[8] =
-{
-/* FADDd FMULd FCOMd FCOMPd*/
- FPU_CYCLES(3,2,2), FPU_CYCLES(3,2,2), FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0),
-/* FSUBd FSUBRd FDIVd FDIVRd*/
- FPU_CYCLES(3,2,2), FPU_CYCLES(3,2,2), FPU_CYCLES(39,38,2), FPU_CYCLES(39,38,2)
-};
-static uint32_t opcode_timings_dc_mod3[8] =
-{
-/* opFADDr opFMULr*/
- FPU_CYCLES(3,2,2), FPU_CYCLES(3,2,2),INVALID, INVALID,
-/* opFSUBRr opFSUBr opFDIVRr opFDIVr*/
- FPU_CYCLES(3,2,2), FPU_CYCLES(3,2,2),FPU_CYCLES(39,38,2), FPU_CYCLES(39,38,2)
-};
-
-static uint32_t opcode_timings_dd[8] =
-{
-/* FLDd FSTd FSTPd*/
- FPU_CYCLES(1,0,0), INVALID, FPU_CYCLES(2,0,0), FPU_CYCLES(2,0,0),
-/* FRSTOR FSAVE FSTSW*/
- FPU_CYCLES(70,0,0), INVALID, FPU_CYCLES(127,0,0), FPU_CYCLES(6,0,0)
-};
-static uint32_t opcode_timings_dd_mod3[8] =
-{
-/* FFFREE FST FSTP*/
- FPU_CYCLES(2,0,0), INVALID, FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0),
-/* FUCOM FUCOMP*/
- FPU_CYCLES(1,0,0), FPU_CYCLES(1,0,0),INVALID, INVALID
-};
-
-static uint32_t opcode_timings_de[8] =
-{
-/* FIADDw FIMULw FICOMw FICOMPw*/
- FPU_CYCLES(6,2,2), FPU_CYCLES(6,2,2), FPU_CYCLES(4,0,0), FPU_CYCLES(4,0,0),
-/* FISUBw FISUBRw FIDIVw FIDIVRw*/
- FPU_CYCLES(6,2,2), FPU_CYCLES(6,2,2), FPU_CYCLES(42,38,2), FPU_CYCLES(42,38,2)
-};
-static uint32_t opcode_timings_de_mod3[8] =
-{
-/* FADDP FMULP FCOMPP*/
- FPU_CYCLES(3,2,2), FPU_CYCLES(3,2,2), INVALID, FPU_CYCLES(1,0,0),
-/* FSUBP FSUBRP FDIVP FDIVRP*/
- FPU_CYCLES(3,2,2), FPU_CYCLES(3,2,2), FPU_CYCLES(39,38,2), FPU_CYCLES(39,38,2)
-};
-
-static uint32_t opcode_timings_df[8] =
-{
-/* FILDiw FISTiw FISTPiw*/
- FPU_CYCLES(3,2,2), INVALID, FPU_CYCLES(6,0,0), FPU_CYCLES(6,0,0),
-/* FILDiq FBSTP FISTPiq*/
- INVALID, FPU_CYCLES(3,2,2), FPU_CYCLES(148,0,0), FPU_CYCLES(6,0,0)
-};
-static uint32_t opcode_timings_df_mod3[8] =
-{
- INVALID, INVALID, INVALID, INVALID,
-/* FSTSW AX*/
- FPU_CYCLES(6,0,0), INVALID, INVALID, INVALID
-};
-
-static uint32_t opcode_timings_8x[8] =
-{
- CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2)
-};
-static uint32_t opcode_timings_8x_mod3[8] =
-{
- CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2)
-};
-static uint32_t opcode_timings_81[8] =
-{
- CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2)
-};
-static uint32_t opcode_timings_81_mod3[8] =
-{
- CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2), CYCLES(2)
-};
-
-static int timing_count;
-static uint8_t last_prefix;
-static uint32_t regmask_modified;
-static int decode_delay, decode_delay_offset;
-static int fpu_latency;
-static int fpu_st_latency[8];
-
-static int u_pipe_full;
-static uint32_t u_pipe_opcode;
-static uint32_t *u_pipe_timings;
-static uint32_t u_pipe_op_32;
-static uint32_t u_pipe_regmask;
-static uint32_t u_pipe_fetchdat;
-static int u_pipe_decode_delay_offset;
-static uint64_t *u_pipe_deps;
-
-int can_pair(uint32_t timing_a, uint32_t timing_b, uint8_t regmask_b)
-{
- /*Only MMX/3DNow instructions can pair*/
- if (!(timing_b & CYCLES_IS_MMX))
- return 0;
- /*Only one MMX multiply per cycle*/
- if ((timing_a & CYCLES_IS_MMX_MUL) && (timing_b & CYCLES_IS_MMX_MUL))
- return 0;
- /*Only one MMX shift/pack per cycle*/
- if ((timing_a & CYCLES_IS_MMX_SHIFT) && (timing_b & CYCLES_IS_MMX_SHIFT))
- return 0;
- /*Second instruction can not access registers written by first*/
- if (u_pipe_regmask & regmask_b)
- return 0;
- /*Must have had enough time to decode prefixes*/
- if ((decode_delay+decode_delay_offset+u_pipe_decode_delay_offset) > 0)
- return 0;
-
- return 1;
-}
-
-static inline int COUNT(uint32_t c, int op_32)
-{
- if (c & CYCLES_FPU)
- return FPU_I_LATENCY(c);
- if (c & CYCLES_HAS_MULTI)
- {
- if (op_32 & 0x100)
- return (c >> 8) & 0xff;
- return c & 0xff;
- }
- return GET_CYCLES(c);
-}
-
-static int check_agi(uint64_t *deps, uint8_t opcode, uint32_t fetchdat, int op_32)
-{
- uint32_t addr_regmask = get_addr_regmask(deps[opcode], fetchdat, op_32);
-
- /*Instructions that use ESP implicitly (eg PUSH, POP, CALL etc) do not
- cause AGIs with each other, but do with instructions that use it explicitly*/
- if ((addr_regmask & REGMASK_IMPL_ESP) && (regmask_modified & (1 << REG_ESP)) && !(regmask_modified & REGMASK_IMPL_ESP))
- addr_regmask |= (1 << REG_ESP);
-
- return (regmask_modified & addr_regmask) & ~REGMASK_IMPL_ESP;
-}
-
-static int codegen_fpu_latencies(uint64_t deps, int reg)
-{
- int latency = fpu_latency;
-
- if ((deps & FPU_RW_ST0) && fpu_st_latency[0] && fpu_st_latency[0] > latency)
- latency = fpu_st_latency[0];
- if ((deps & FPU_RW_ST1) && fpu_st_latency[1] && fpu_st_latency[1] > latency)
- latency = fpu_st_latency[1];
- if ((deps & FPU_RW_STREG) && fpu_st_latency[reg] && fpu_st_latency[reg] > latency)
- latency = fpu_st_latency[reg];
-
- return latency;
-}
-
-#define SUB_AND_CLAMP(latency, count) \
- latency -= count; \
- if (latency < 0) \
- latency = 0
-
-static void codegen_fpu_latency_clock(int count)
-{
- SUB_AND_CLAMP(fpu_latency, count);
- SUB_AND_CLAMP(fpu_st_latency[0], count);
- SUB_AND_CLAMP(fpu_st_latency[1], count);
- SUB_AND_CLAMP(fpu_st_latency[2], count);
- SUB_AND_CLAMP(fpu_st_latency[3], count);
- SUB_AND_CLAMP(fpu_st_latency[4], count);
- SUB_AND_CLAMP(fpu_st_latency[5], count);
- SUB_AND_CLAMP(fpu_st_latency[6], count);
- SUB_AND_CLAMP(fpu_st_latency[7], count);
-}
-
-static void codegen_instruction(uint32_t *timings, uint64_t *deps, uint8_t opcode, uint32_t fetchdat, int decode_delay_offset, int op_32, int exec_delay)
-{
- int instr_cycles, latency = 0;
-
- if ((timings[opcode] & CYCLES_FPU) && !(deps[opcode] & FPU_FXCH))
- instr_cycles = latency = codegen_fpu_latencies(deps[opcode], fetchdat & 7);
- else
- instr_cycles = 0;
-
- if ((decode_delay + decode_delay_offset) > 0)
- codegen_fpu_latency_clock(decode_delay + decode_delay_offset + instr_cycles);
- else
- codegen_fpu_latency_clock(instr_cycles);
- instr_cycles += COUNT(timings[opcode], op_32);
- instr_cycles += exec_delay;
- if ((decode_delay + decode_delay_offset) > 0)
- codegen_block_cycles += instr_cycles + decode_delay + decode_delay_offset;
- else
- codegen_block_cycles += instr_cycles;
- decode_delay = (-instr_cycles) + 1;
-
- if (deps[opcode] & FPU_POP)
- {
- int c;
-
- for (c = 0; c < 7; c++)
- fpu_st_latency[c] = fpu_st_latency[c+1];
- fpu_st_latency[7] = 0;
- }
- if (deps[opcode] & FPU_POP2)
- {
- int c;
-
- for (c = 0; c < 6; c++)
- fpu_st_latency[c] = fpu_st_latency[c+2];
- fpu_st_latency[6] = fpu_st_latency[7] = 0;
- }
- if (timings[opcode] & CYCLES_FPU)
- {
- /* if (fpu_latency)
- fatal("Bad latency FPU\n");*/
- fpu_latency = FPU_F_LATENCY(timings[opcode]);
- }
-
- if (deps[opcode] & FPU_PUSH)
- {
- int c;
-
- for (c = 0; c < 7; c++)
- fpu_st_latency[c+1] = fpu_st_latency[c];
- fpu_st_latency[0] = 0;
- }
- if (deps[opcode] & FPU_WRITE_ST0)
- {
-/* if (fpu_st_latency[0])
- fatal("Bad latency ST0\n");*/
- fpu_st_latency[0] = FPU_RESULT_LATENCY(timings[opcode]);
- }
- if (deps[opcode] & FPU_WRITE_ST1)
- {
-/* if (fpu_st_latency[1])
- fatal("Bad latency ST1\n");*/
- fpu_st_latency[1] = FPU_RESULT_LATENCY(timings[opcode]);
- }
- if (deps[opcode] & FPU_WRITE_STREG)
- {
- int reg = fetchdat & 7;
- if (deps[opcode] & FPU_POP)
- reg--;
- if (reg >= 0 &&
- !(reg == 0 && (deps[opcode] & FPU_WRITE_ST0)) &&
- !(reg == 1 && (deps[opcode] & FPU_WRITE_ST1)))
- {
-/* if (fpu_st_latency[reg])
- fatal("Bad latency STREG %i %08x %i %016llx %02x\n",fpu_st_latency[reg], fetchdat, reg, timings[opcode], opcode);*/
- fpu_st_latency[reg] = FPU_RESULT_LATENCY(timings[opcode]);
- }
- }
-}
-
-static void codegen_timing_winchip2_block_start()
-{
- regmask_modified = 0;
- decode_delay = decode_delay_offset = 0;
- u_pipe_full = 0;
-}
-
-static void codegen_timing_winchip2_start()
-{
- timing_count = 0;
- last_prefix = 0;
-}
-
-static void codegen_timing_winchip2_prefix(uint8_t prefix, uint32_t fetchdat)
-{
- if (prefix == 0x0f)
- {
- /*0fh prefix is 'free'*/
- last_prefix = prefix;
- return;
- }
- /*On WinChip all prefixes take 1 cycle to decode. Decode may be shadowed
- by execution of previous instructions*/
- decode_delay_offset++;
- last_prefix = prefix;
-}
-
-static void codegen_timing_winchip2_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t op_pc)
-{
- uint32_t *timings;
- uint64_t *deps;
- int mod3 = ((fetchdat & 0xc0) == 0xc0);
- int bit8 = !(opcode & 1);
- int agi_stall = 0;
-
- switch (last_prefix)
- {
- case 0x0f:
- timings = mod3 ? opcode_timings_0f_mod3 : opcode_timings_0f;
- deps = mod3 ? opcode_deps_0f_mod3 : opcode_deps_0f;
-// pclog("timings 0f\n");
- break;
-
- case 0xd8:
- timings = mod3 ? opcode_timings_d8_mod3 : opcode_timings_d8;
- deps = mod3 ? opcode_deps_d8_mod3 : opcode_deps_d8;
- opcode = (opcode >> 3) & 7;
-// pclog("timings d8\n");
- break;
- case 0xd9:
- timings = mod3 ? opcode_timings_d9_mod3 : opcode_timings_d9;
- deps = mod3 ? opcode_deps_d9_mod3 : opcode_deps_d9;
- opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
-// pclog("timings d9\n");
- break;
- case 0xda:
- timings = mod3 ? opcode_timings_da_mod3 : opcode_timings_da;
- deps = mod3 ? opcode_deps_da_mod3 : opcode_deps_da;
- opcode = (opcode >> 3) & 7;
-// pclog("timings da\n");
- break;
- case 0xdb:
- timings = mod3 ? opcode_timings_db_mod3 : opcode_timings_db;
- deps = mod3 ? opcode_deps_db_mod3 : opcode_deps_db;
- opcode = mod3 ? opcode & 0x3f : (opcode >> 3) & 7;
-// pclog("timings db\n");
- break;
- case 0xdc:
- timings = mod3 ? opcode_timings_dc_mod3 : opcode_timings_dc;
- deps = mod3 ? opcode_deps_dc_mod3 : opcode_deps_dc;
- opcode = (opcode >> 3) & 7;
-// pclog("timings dc\n");
- break;
- case 0xdd:
- timings = mod3 ? opcode_timings_dd_mod3 : opcode_timings_dd;
- deps = mod3 ? opcode_deps_dd_mod3 : opcode_deps_dd;
- opcode = (opcode >> 3) & 7;
-// pclog("timings dd\n");
- break;
- case 0xde:
- timings = mod3 ? opcode_timings_de_mod3 : opcode_timings_de;
- deps = mod3 ? opcode_deps_de_mod3 : opcode_deps_de;
- opcode = (opcode >> 3) & 7;
-// pclog("timings de\n");
- break;
- case 0xdf:
- timings = mod3 ? opcode_timings_df_mod3 : opcode_timings_df;
- deps = mod3 ? opcode_deps_df_mod3 : opcode_deps_df;
- opcode = (opcode >> 3) & 7;
-// pclog("timings df\n");
- break;
-
- default:
- switch (opcode)
- {
- case 0x80: case 0x82: case 0x83:
- timings = mod3 ? opcode_timings_8x_mod3 : opcode_timings_8x;
- deps = mod3 ? opcode_deps_8x_mod3 : opcode_deps_8x_mod3;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings 80 %p %p %p\n", (void *)timings, (void *)opcode_timings_mod3, (void *)opcode_timings_8x);
- break;
- case 0x81:
- timings = mod3 ? opcode_timings_81_mod3 : opcode_timings_81;
- deps = mod3 ? opcode_deps_81_mod3 : opcode_deps_81;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings 80 %p %p %p\n", (void *)timings, (void *)opcode_timings_mod3, (void *)opcode_timings_8x);
- break;
-
- case 0xc0: case 0xc1: case 0xd0: case 0xd1: case 0xd2: case 0xd3:
- timings = mod3 ? opcode_timings_shift_mod3 : opcode_timings_shift;
- deps = mod3 ? opcode_deps_shift_mod3 : opcode_deps_shift;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings c0\n");
- break;
-
- case 0xf6:
- timings = mod3 ? opcode_timings_f6_mod3 : opcode_timings_f6;
- deps = mod3 ? opcode_deps_f6_mod3 : opcode_deps_f6;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings f6\n");
- break;
- case 0xf7:
- timings = mod3 ? opcode_timings_f7_mod3 : opcode_timings_f7;
- deps = mod3 ? opcode_deps_f7_mod3 : opcode_deps_f7;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings f7\n");
- break;
- case 0xff:
- timings = mod3 ? opcode_timings_ff_mod3 : opcode_timings_ff;
- deps = mod3 ? opcode_deps_ff_mod3 : opcode_deps_ff;
- opcode = (fetchdat >> 3) & 7;
-// pclog("timings ff\n");
- break;
-
- default:
- timings = mod3 ? opcode_timings_mod3 : opcode_timings;
- deps = mod3 ? opcode_deps_mod3 : opcode_deps;
-// pclog("timings normal\n");
- break;
- }
- }
-
- if (u_pipe_full)
- {
- uint8_t regmask = get_srcdep_mask(deps[opcode], fetchdat, bit8, u_pipe_op_32);
-
- if (can_pair(u_pipe_timings[u_pipe_opcode], timings[opcode], regmask))
- {
- int cycles_a = u_pipe_timings[u_pipe_opcode] & 0xff;
- int cycles_b = timings[opcode] & 0xff;
- uint32_t timing = (cycles_a > cycles_b) ? u_pipe_timings[u_pipe_opcode] : timings[opcode];
- uint64_t temp_deps = 0;
-
- if (check_agi(deps, opcode, fetchdat, op_32) || check_agi(u_pipe_deps, u_pipe_opcode, u_pipe_fetchdat, u_pipe_op_32))
- agi_stall = 1;
-
- codegen_instruction(&timing, &temp_deps, 0, 0, 0, 0, agi_stall);
- u_pipe_full = 0;
- decode_delay_offset = 0;
- regmask_modified = get_dstdep_mask(deps[opcode], fetchdat, bit8) | u_pipe_regmask;
- return;
- }
- else
- {
- /*No pairing, run first instruction now*/
- if (check_agi(u_pipe_deps, u_pipe_opcode, u_pipe_fetchdat, u_pipe_op_32))
- agi_stall = 1;
- codegen_instruction(u_pipe_timings, u_pipe_deps, u_pipe_opcode, u_pipe_fetchdat, u_pipe_decode_delay_offset, u_pipe_op_32, agi_stall);
- u_pipe_full = 0;
- regmask_modified = u_pipe_regmask;
- }
- }
- if (timings[opcode] & CYCLES_IS_MMX)
- {
- /*Might pair with next instruction*/
- u_pipe_full = 1;
- u_pipe_opcode = opcode;
- u_pipe_timings = timings;
- u_pipe_op_32 = op_32;
- u_pipe_regmask = get_dstdep_mask(deps[opcode], fetchdat, bit8);
- u_pipe_fetchdat = fetchdat;
- u_pipe_decode_delay_offset = decode_delay_offset;
- u_pipe_deps = deps;
- decode_delay_offset = 0;
- return;
- }
-
- if (check_agi(deps, opcode, fetchdat, op_32))
- agi_stall = 1;
- codegen_instruction(timings, deps, opcode, fetchdat, decode_delay_offset, op_32, agi_stall);
- decode_delay_offset = 0;
- regmask_modified = get_dstdep_mask(deps[opcode], fetchdat, bit8);
-}
-
-static void codegen_timing_winchip2_block_end()
-{
- if (u_pipe_full)
- {
- int agi_stall = 0;
-
- if (check_agi(u_pipe_deps, u_pipe_opcode, u_pipe_fetchdat, u_pipe_op_32))
- agi_stall = 1;
- codegen_instruction(u_pipe_timings, u_pipe_deps, u_pipe_opcode, u_pipe_fetchdat, u_pipe_decode_delay_offset, u_pipe_op_32, agi_stall);
- u_pipe_full = 0;
- }
-}
-
-int codegen_timing_winchip2_jump_cycles()
-{
- return 0;
-}
-
-codegen_timing_t codegen_timing_winchip2 =
-{
- codegen_timing_winchip2_start,
- codegen_timing_winchip2_prefix,
- codegen_timing_winchip2_opcode,
- codegen_timing_winchip2_block_start,
- codegen_timing_winchip2_block_end,
- codegen_timing_winchip2_jump_cycles
-};
diff --git a/src/codegen_x86-64.c b/src/codegen_x86-64.c
index 2c599f0..d421c7f 100644
--- a/src/codegen_x86-64.c
+++ b/src/codegen_x86-64.c
@@ -15,7 +15,7 @@
#include "codegen_ops.h"
#include "codegen_ops_x86-64.h"
-#if defined(__linux__) || defined(__APPLE__)
+#ifdef __linux__
#include
#include
#endif
@@ -23,7 +23,7 @@
#include
#endif
-int codegen_flat_ds, codegen_flat_ss;
+
int codegen_flags_changed = 0;
int codegen_fpu_entered = 0;
int codegen_fpu_loaded_iq[8];
@@ -61,9 +61,7 @@ static int last_ssegs;
void codegen_init()
{
- int c;
-
-#if defined(__linux__) || defined(__APPLE__)
+#ifdef __linux__
void *start;
size_t len;
long pagesize = sysconf(_SC_PAGESIZE);
@@ -80,10 +78,7 @@ void codegen_init()
memset(codeblock, 0, BLOCK_SIZE * sizeof(codeblock_t));
memset(codeblock_hash, 0, HASH_SIZE * sizeof(codeblock_t *));
- for (c = 0; c < BLOCK_SIZE; c++)
- codeblock[c].pc = BLOCK_PC_INVALID;
-
-#if defined(__linux__) || defined(__APPLE__)
+#ifdef __linux__
start = (void *)((long)codeblock & pagemask);
len = ((BLOCK_SIZE * sizeof(codeblock_t)) + pagesize) & pagemask;
if (mprotect(start, len, PROT_READ | PROT_WRITE | PROT_EXEC) != 0)
@@ -97,19 +92,14 @@ void codegen_init()
void codegen_reset()
{
- int c;
-
memset(codeblock, 0, BLOCK_SIZE * sizeof(codeblock_t));
memset(codeblock_hash, 0, HASH_SIZE * sizeof(codeblock_t *));
mem_reset_page_blocks();
-
- for (c = 0; c < BLOCK_SIZE; c++)
- codeblock[c].pc = BLOCK_PC_INVALID;
}
void dump_block()
{
-/* codeblock_t *block = pages[0x119000 >> 12].block;
+ codeblock_t *block = pages[0x119000 >> 12].block;
pclog("dump_block:\n");
while (block)
@@ -122,12 +112,12 @@ void dump_block()
block = block->next;
}
- pclog("dump_block done\n");*/
+ pclog("dump_block done\n");
}
static void add_to_block_list(codeblock_t *block)
{
- codeblock_t *block_prev = pages[block->phys >> 12].block[(block->phys >> 10) & 3];
+ codeblock_t *block_prev = pages[block->phys >> 12].block;
if (!block->page_mask)
fatal("add_to_block_list - mask = 0\n");
@@ -136,34 +126,34 @@ static void add_to_block_list(codeblock_t *block)
{
block->next = block_prev;
block_prev->prev = block;
- pages[block->phys >> 12].block[(block->phys >> 10) & 3] = block;
+ pages[block->phys >> 12].block = block;
}
else
{
block->next = NULL;
- pages[block->phys >> 12].block[(block->phys >> 10) & 3] = block;
+ pages[block->phys >> 12].block = block;
}
if (block->next)
{
- if (block->next->pc == BLOCK_PC_INVALID)
- fatal("block->next->pc=BLOCK_PC_INVALID %p %p %x %x\n", (void *)block->next, (void *)codeblock, block_current, block_pos);
+ if (!block->next->pc)
+ fatal("block->next->pc=0 %p %p %x %x\n", (void *)block->next, (void *)codeblock, block_current, block_pos);
}
if (block->page_mask2)
{
- block_prev = pages[block->phys_2 >> 12].block_2[(block->phys_2 >> 10) & 3];
+ block_prev = pages[block->phys_2 >> 12].block_2;
if (block_prev)
{
block->next_2 = block_prev;
block_prev->prev_2 = block;
- pages[block->phys_2 >> 12].block_2[(block->phys_2 >> 10) & 3] = block;
+ pages[block->phys_2 >> 12].block_2 = block;
}
else
{
block->next_2 = NULL;
- pages[block->phys_2 >> 12].block_2[(block->phys_2 >> 10) & 3] = block;
+ pages[block->phys_2 >> 12].block_2 = block;
}
}
}
@@ -181,7 +171,7 @@ static void remove_from_block_list(codeblock_t *block, uint32_t pc)
}
else
{
- pages[block->phys >> 12].block[(block->phys >> 10) & 3] = block->next;
+ pages[block->phys >> 12].block = block->next;
if (block->next)
block->next->prev = NULL;
else
@@ -203,7 +193,7 @@ static void remove_from_block_list(codeblock_t *block, uint32_t pc)
else
{
// pclog(" pages.block_2=%p 3 %p %p\n", (void *)block->next_2, (void *)block, (void *)pages[block->phys_2 >> 12].block_2);
- pages[block->phys_2 >> 12].block_2[(block->phys_2 >> 10) & 3] = block->next_2;
+ pages[block->phys_2 >> 12].block_2 = block->next_2;
if (block->next_2)
block->next_2->prev_2 = NULL;
else
@@ -218,9 +208,9 @@ static void delete_block(codeblock_t *block)
if (block == codeblock_hash[HASH(block->phys)])
codeblock_hash[HASH(block->phys)] = NULL;
- if (block->pc == BLOCK_PC_INVALID)
+ if (!block->pc)
fatal("Deleting deleted block\n");
- block->pc = BLOCK_PC_INVALID;
+ block->pc = 0;
codeblock_tree_delete(block);
remove_from_block_list(block, old_pc);
@@ -228,7 +218,7 @@ static void delete_block(codeblock_t *block)
void codegen_check_flush(page_t *page, uint64_t mask, uint32_t phys_addr)
{
- struct codeblock_t *block = page->block[(phys_addr >> 10) & 3];
+ struct codeblock_t *block = page->block;
while (block)
{
@@ -242,7 +232,7 @@ void codegen_check_flush(page_t *page, uint64_t mask, uint32_t phys_addr)
block = block->next;
}
- block = page->block_2[(phys_addr >> 10) & 3];
+ block = page->block_2;
while (block)
{
@@ -262,7 +252,7 @@ void codegen_block_init(uint32_t phys_addr)
codeblock_t *block;
page_t *page = &pages[phys_addr >> 12];
- if (!page->block[(phys_addr >> 10) & 3])
+ if (!page->block)
mem_flush_write_page(phys_addr, cs+cpu_state.pc);
block_current = (block_current + 1) & BLOCK_MASK;
@@ -270,7 +260,7 @@ void codegen_block_init(uint32_t phys_addr)
// if (block->pc == 0xb00b4ff5)
// pclog("Init target block\n");
- if (block->pc != BLOCK_PC_INVALID)
+ if (block->pc != 0)
{
// pclog("Reuse block : was %08x now %08x\n", block->pc, cs+pc);
delete_block(block);
@@ -284,14 +274,13 @@ void codegen_block_init(uint32_t phys_addr)
block->_cs = cs;
block->pnt = block_current;
block->phys = phys_addr;
- block->dirty_mask = &page->dirty_mask[(phys_addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK];
- block->dirty_mask2 = NULL;
+ block->use32 = use32;
+ block->stack32 = stack32;
block->next = block->prev = NULL;
block->next_2 = block->prev_2 = NULL;
block->page_mask = 0;
block->flags = 0;
- block->status = cpu_cur_status;
-
+
block->was_recompiled = 0;
recomp_page = block->phys & ~0xfff;
@@ -303,7 +292,7 @@ void codegen_block_start_recompile(codeblock_t *block)
{
page_t *page = &pages[block->phys >> 12];
- if (!page->block[(block->phys >> 10) & 3])
+ if (!page->block)
mem_flush_write_page(block->phys, cs+cpu_state.pc);
block_num = HASH(block->phys);
@@ -312,8 +301,6 @@ void codegen_block_start_recompile(codeblock_t *block)
if (block->pc != cs + cpu_state.pc || block->was_recompiled)
fatal("Recompile to used block!\n");
- block->status = cpu_cur_status;
-
block_pos = BLOCK_GPF_OFFSET;
#if WIN64
addbyte(0x48); /*XOR RCX, RCX*/
@@ -398,9 +385,6 @@ void codegen_block_start_recompile(codeblock_t *block)
codegen_reg_loaded[4] = codegen_reg_loaded[5] = codegen_reg_loaded[6] = codegen_reg_loaded[7] = 0;
block->was_recompiled = 1;
-
- codegen_flat_ds = !(cpu_cur_status & CPU_STATUS_NOTFLATDS);
- codegen_flat_ss = !(cpu_cur_status & CPU_STATUS_NOTFLATSS);
}
void codegen_block_remove()
@@ -416,19 +400,17 @@ void codegen_block_remove()
void codegen_block_generate_end_mask()
{
codeblock_t *block = &codeblock[block_current];
- uint32_t start_pc;
- uint32_t end_pc;
+ uint32_t start_pc = (block->pc & 0xffc) | (block->phys & ~0xfff);
+ uint32_t end_pc = ((codegen_endpc + 3) & 0xffc) | (block->phys & ~0xfff);
block->endpc = codegen_endpc;
block->page_mask = 0;
- start_pc = (block->pc & 0x3ff) & ~15;
- if ((block->pc ^ block->endpc) & ~0x3ff)
- end_pc = 0x3ff & ~15;
- else
- end_pc = (block->endpc & 0x3ff) & ~15;
- if (end_pc < start_pc)
- end_pc = 0x3ff;
+ start_pc = block->pc & 0xffc;
+ start_pc &= ~PAGE_MASK_MASK;
+ end_pc = ((block->endpc & 0xffc) + PAGE_MASK_MASK) & ~PAGE_MASK_MASK;
+ if (end_pc > 0xfff || end_pc < start_pc)
+ end_pc = 0xfff;
start_pc >>= PAGE_MASK_SHIFT;
end_pc >>= PAGE_MASK_SHIFT;
@@ -439,37 +421,34 @@ void codegen_block_generate_end_mask()
// pclog(" %08x %llx\n", start_pc, block->page_mask);
}
- pages[block->phys >> 12].code_present_mask[(block->phys >> 10) & 3] |= block->page_mask;
+ pages[block->phys >> 12].code_present_mask |= block->page_mask;
block->phys_2 = -1;
block->page_mask2 = 0;
block->next_2 = block->prev_2 = NULL;
- if ((block->pc ^ block->endpc) & ~0x3ff)
+ if ((block->pc ^ block->endpc) & ~0xfff)
{
block->phys_2 = get_phys_noabrt(block->endpc);
if (block->phys_2 != -1)
{
- page_t *page_2 = &pages[block->phys_2 >> 12];
+// pclog("start block - %08x %08x %p %p %p %08x\n", block->pc, block->endpc, (void *)block, (void *)block->next_2, (void *)pages[block->phys_2 >> 12].block_2, block->phys_2);
start_pc = 0;
- end_pc = (block->endpc & 0x3ff) >> PAGE_MASK_SHIFT;
+ end_pc = (block->endpc & 0xfff) >> PAGE_MASK_SHIFT;
for (; start_pc <= end_pc; start_pc++)
block->page_mask2 |= ((uint64_t)1 << start_pc);
- page_2->code_present_mask[(block->phys_2 >> 10) & 3] |= block->page_mask2;
-
- if (!pages[block->phys_2 >> 12].block_2[(block->phys_2 >> 10) & 3])
+
+ if (!pages[block->phys_2 >> 12].block_2)
mem_flush_write_page(block->phys_2, block->endpc);
-
+// pclog("New block - %08x %08x %p %p phys %08x %08x %016llx\n", block->pc, block->endpc, (void *)block, (void *)block->next_2, block->phys, block->phys_2, block->page_mask2);
if (!block->page_mask2)
fatal("!page_mask2\n");
if (block->next_2)
{
// pclog(" next_2->pc=%08x\n", block->next_2->pc);
- if (block->next_2->pc == BLOCK_PC_INVALID)
- fatal("block->next_2->pc=BLOCK_PC_INVALID %p\n", (void *)block->next_2);
+ if (!block->next_2->pc)
+ fatal("block->next_2->pc=0 %p\n", (void *)block->next_2);
}
-
- block->dirty_mask2 = &page_2->dirty_mask[(block->phys_2 >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK];
}
}
@@ -1071,15 +1050,6 @@ void codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t
case 0xf0: /*LOCK*/
break;
- case 0xf2: /*REPNE*/
- op_table = x86_dynarec_opcodes_REPNE;
- recomp_op_table = recomp_opcodes_REPNE;
- break;
- case 0xf3: /*REPE*/
- op_table = x86_dynarec_opcodes_REPE;
- recomp_op_table = recomp_opcodes_REPE;
- break;
-
default:
goto generate_call;
}
@@ -1131,13 +1101,6 @@ generate_call:
}
#endif
}
-
- if ((op_table == x86_dynarec_opcodes_REPNE || op_table == x86_dynarec_opcodes_REPE) && !op_table[opcode | op_32])
- {
- op_table = x86_dynarec_opcodes;
- recomp_op_table = recomp_opcodes;
- }
-
if (recomp_op_table && recomp_op_table[(opcode | op_32) & 0x1ff])
{
uint32_t new_pc = recomp_op_table[(opcode | op_32) & 0x1ff](opcode, fetchdat, op_32, op_pc, block);
diff --git a/src/codegen_x86.c b/src/codegen_x86.c
new file mode 100644
index 0000000..b9893ba
--- /dev/null
+++ b/src/codegen_x86.c
@@ -0,0 +1,2152 @@
+#if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined WIN32 || defined _WIN32 || defined _WIN32
+
+#include
+#include "ibm.h"
+#include "cpu.h"
+#include "x86.h"
+#include "x86_flags.h"
+#include "x86_ops.h"
+#include "x87.h"
+#include "mem.h"
+
+#include "386_common.h"
+
+#include "codegen.h"
+#include "codegen_ops.h"
+#include "codegen_ops_x86.h"
+
+#ifdef __linux__
+#include
+#include
+#endif
+#if defined WIN32 || defined _WIN32 || defined _WIN32
+#include
+#endif
+
+int mmx_ebx_ecx_loaded;
+int codegen_flags_changed = 0;
+int codegen_fpu_entered = 0;
+int codegen_mmx_entered = 0;
+int codegen_fpu_loaded_iq[8];
+x86seg *op_ea_seg;
+int op_ssegs;
+uint32_t op_old_pc;
+
+uint32_t recomp_page = -1;
+
+int host_reg_mapping[NR_HOST_REGS];
+int host_reg_xmm_mapping[NR_HOST_XMM_REGS];
+codeblock_t *codeblock;
+codeblock_t **codeblock_hash;
+
+
+int block_current = 0;
+static int block_num;
+int block_pos;
+
+int cpu_recomp_flushes, cpu_recomp_flushes_latched;
+int cpu_recomp_evicted, cpu_recomp_evicted_latched;
+int cpu_recomp_reuse, cpu_recomp_reuse_latched;
+int cpu_recomp_removed, cpu_recomp_removed_latched;
+
+uint32_t codegen_endpc;
+
+int codegen_block_cycles;
+static int codegen_block_ins;
+static int codegen_block_full_ins;
+
+static uint32_t last_op32;
+static x86seg *last_ea_seg;
+static int last_ssegs;
+
+static uint32_t mem_abrt_rout;
+uint32_t mem_load_addr_ea_b;
+uint32_t mem_load_addr_ea_w;
+uint32_t mem_load_addr_ea_l;
+uint32_t mem_load_addr_ea_q;
+uint32_t mem_store_addr_ea_b;
+uint32_t mem_store_addr_ea_w;
+uint32_t mem_store_addr_ea_l;
+uint32_t mem_store_addr_ea_q;
+uint32_t mem_load_addr_ea_b_no_abrt;
+uint32_t mem_store_addr_ea_b_no_abrt;
+uint32_t mem_load_addr_ea_w_no_abrt;
+uint32_t mem_store_addr_ea_w_no_abrt;
+uint32_t mem_load_addr_ea_l_no_abrt;
+uint32_t mem_store_addr_ea_l_no_abrt;
+uint32_t mem_check_write;
+uint32_t mem_check_write_w;
+uint32_t mem_check_write_l;
+
+static uint32_t gen_MEM_LOAD_ADDR_EA_B()
+{
+ uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
+
+ addbyte(0x89); /*MOV ESI, EDX*/
+ addbyte(0xd6);
+ addbyte(0x01); /*ADDL EDX, EAX*/
+ addbyte(0xc2);
+ addbyte(0x89); /*MOV EDI, EDX*/
+ addbyte(0xd7);
+ addbyte(0xc1); /*SHR EDX, 12*/
+ addbyte(0xea);
+ addbyte(12);
+ addbyte(0x8b); /*MOV EDX, readlookup2[EDX*4]*/
+ addbyte(0x14);
+ addbyte(0x95);
+ addlong((uint32_t)readlookup2);
+ addbyte(0x83); /*CMP EDX, -1*/
+ addbyte(0xfa);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(4+1);
+ addbyte(0x0f); /*MOVZX EAX, B[EDX+EDI]*/
+ addbyte(0xb6);
+ addbyte(0x04);
+ addbyte(0x3a);
+ addbyte(0xc3); /*RET*/
+
+ addbyte(0x50); /*slowpath: PUSH EAX*/
+ addbyte(0x56); /*PUSH ESI*/
+ addbyte(0xe8); /*CALL readmembl*/
+ addlong((uint32_t)readmemb386l - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ addbyte(0x83); /*ADD ESP, 8*/
+ addbyte(0xc4);
+ addbyte(8);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*MOVZX EAX, AL*/
+ addbyte(0xb6);
+ addbyte(0xc0);
+ addbyte(0x0f); /*JNE mem_abrt_rout*/
+ addbyte(0x85);
+ addlong(mem_abrt_rout - ((uint32_t)(&codeblock[block_current].data[block_pos]) + 4));
+ addbyte(0xc3); /*RET*/
+
+ return addr;
+}
+
+static uint32_t gen_MEM_LOAD_ADDR_EA_W()
+{
+ uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
+
+ addbyte(0x89); /*MOV ESI, EDX*/
+ addbyte(0xd6);
+ addbyte(0x01); /*ADDL EDX, EAX*/
+ addbyte(0xc2);
+ addbyte(0x8d); /*LEA EDI, 1[EDX]*/
+ addbyte(0x7a);
+ addbyte(0x01);
+ addbyte(0xc1); /*SHR EDX, 12*/
+ addbyte(0xea);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xfff*/
+ addbyte(0xc7);
+ addlong(0xfff);
+ addbyte(0x8b); /*MOV EDX, readlookup2[EDX*4]*/
+ addbyte(0x14);
+ addbyte(0x95);
+ addlong((uint32_t)readlookup2);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+5+1);
+ addbyte(0x83); /*CMP EDX, -1*/
+ addbyte(0xfa);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(5+1);
+ addbyte(0x0f); /*MOVZX EAX, -1[EDX+EDI]W*/
+ addbyte(0xb7);
+ addbyte(0x44);
+ addbyte(0x3a);
+ addbyte(-1);
+ addbyte(0xc3); /*RET*/
+
+ addbyte(0x50); /*slowpath: PUSH EAX*/
+ addbyte(0x56); /*PUSH ESI*/
+ addbyte(0xe8); /*CALL readmemwl*/
+ addlong((uint32_t)readmemwl - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ addbyte(0x83); /*ADD ESP, 8*/
+ addbyte(0xc4);
+ addbyte(8);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*MOVZX EAX, AX*/
+ addbyte(0xb7);
+ addbyte(0xc0);
+ addbyte(0x0f); /*JNE mem_abrt_rout*/
+ addbyte(0x85);
+ addlong(mem_abrt_rout - ((uint32_t)(&codeblock[block_current].data[block_pos]) + 4));
+ addbyte(0xc3); /*RET*/
+
+ return addr;
+}
+
+static uint32_t gen_MEM_LOAD_ADDR_EA_L()
+{
+ uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
+
+ addbyte(0x89); /*MOV ESI, EDX*/
+ addbyte(0xd6);
+ addbyte(0x01); /*ADDL EDX, EAX*/
+ addbyte(0xc2);
+ addbyte(0x8d); /*LEA EDI, 3[EDX]*/
+ addbyte(0x7a);
+ addbyte(0x03);
+ addbyte(0xc1); /*SHR EDX, 12*/
+ addbyte(0xea);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xffc*/
+ addbyte(0xc7);
+ addlong(0xffc);
+ addbyte(0x8b); /*MOV EDX, readlookup2[EDX*4]*/
+ addbyte(0x14);
+ addbyte(0x95);
+ addlong((uint32_t)readlookup2);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+4+1);
+ addbyte(0x83); /*CMP EDX, -1*/
+ addbyte(0xfa);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(4+1);
+ addbyte(0x8b); /*MOV EAX, -3[EDX+EDI]*/
+ addbyte(0x44);
+ addbyte(0x3a);
+ addbyte(-3);
+ addbyte(0xc3); /*RET*/
+
+ addbyte(0x50); /*slowpath: PUSH EAX*/
+ addbyte(0x56); /*PUSH ESI*/
+ addbyte(0xe8); /*CALL readmemll*/
+ addlong((uint32_t)readmemll - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ addbyte(0x83); /*ADD ESP, 8*/
+ addbyte(0xc4);
+ addbyte(8);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE mem_abrt_rout*/
+ addbyte(0x85);
+ addlong(mem_abrt_rout - ((uint32_t)(&codeblock[block_current].data[block_pos]) + 4));
+ addbyte(0xc3); /*RET*/
+
+ return addr;
+}
+
+static uint32_t gen_MEM_LOAD_ADDR_EA_Q()
+{
+ uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
+
+ addbyte(0x89); /*MOV ESI, EDX*/
+ addbyte(0xd6);
+ addbyte(0x01); /*ADDL EDX, EAX*/
+ addbyte(0xc2);
+ addbyte(0x8d); /*LEA EDI, 7[EDX]*/
+ addbyte(0x7a);
+ addbyte(0x07);
+ addbyte(0xc1); /*SHR EDX, 12*/
+ addbyte(0xea);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xff8*/
+ addbyte(0xc7);
+ addlong(0xff8);
+ addbyte(0x8b); /*MOV EDX, readlookup2[EDX*4]*/
+ addbyte(0x14);
+ addbyte(0x95);
+ addlong((uint32_t)readlookup2);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+4+4+1);
+ addbyte(0x83); /*CMP EDX, -1*/
+ addbyte(0xfa);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(4+4+1);
+ addbyte(0x8b); /*MOV EAX, [EDX+EDI]*/
+ addbyte(0x44);
+ addbyte(0x3a);
+ addbyte(-7);
+ addbyte(0x8b); /*MOV EDX, [EDX+EDI+4]*/
+ addbyte(0x54);
+ addbyte(0x3a);
+ addbyte(-7+4);
+ addbyte(0xc3); /*RET*/
+
+ addbyte(0x50); /*slowpath: PUSH EAX*/
+ addbyte(0x56); /*PUSH ESI*/
+ addbyte(0xe8); /*CALL readmemql*/
+ addlong((uint32_t)readmemql - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ addbyte(0x83); /*ADD ESP, 8*/
+ addbyte(0xc4);
+ addbyte(8);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE mem_abrt_rout*/
+ addbyte(0x85);
+ addlong(mem_abrt_rout - ((uint32_t)(&codeblock[block_current].data[block_pos]) + 4));
+ addbyte(0xc3); /*RET*/
+
+ return addr;
+}
+
+static uint32_t gen_MEM_STORE_ADDR_EA_B()
+{
+ uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
+
+ /*dat = ECX, seg = ESI, addr = EAX*/
+ addbyte(0x89); /*MOV EBX, ESI*/
+ addbyte(0xf3);
+ addbyte(0x01); /*ADDL ESI, EAX*/
+ addbyte(0xc0 | (REG_EAX << 3) | REG_ESI);
+ addbyte(0x89); /*MOV EDI, ESI*/
+ addbyte(0xc0 | (REG_ESI << 3) | REG_EDI);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ addbyte(0x8b); /*MOV ESI, readlookup2[ESI*4]*/
+ addbyte(0x04 | (REG_ESI << 3));
+ addbyte(0x85 | (REG_ESI << 3));
+ addlong((uint32_t)writelookup2);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+1);
+ addbyte(0x88); /*MOV [EDI+ESI],CL*/
+ addbyte(0x04 | (REG_ECX << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(0xc3); /*RET*/
+
+ addbyte(0x51); /*slowpath: PUSH ECX*/
+ addbyte(0x50); /*PUSH EAX*/
+ addbyte(0x53); /*PUSH EBX*/
+ addbyte(0xe8); /*CALL writememb386l*/
+ addlong((uint32_t)writememb386l - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ addbyte(0x83); /*ADD ESP, 12*/
+ addbyte(0xc4);
+ addbyte(12);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE mem_abrt_rout*/
+ addbyte(0x85);
+ addlong(mem_abrt_rout - ((uint32_t)(&codeblock[block_current].data[block_pos]) + 4));
+ addbyte(0xc3); /*RET*/
+
+ return addr;
+}
+
+static uint32_t gen_MEM_STORE_ADDR_EA_W()
+{
+ uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
+
+ /*dat = ECX, seg = ESI, addr = EAX*/
+ addbyte(0x89); /*MOV EBX, ESI*/
+ addbyte(0xf3);
+ addbyte(0x01); /*ADDL ESI, EAX*/
+ addbyte(0xc0 | (REG_EAX << 3) | REG_ESI);
+ addbyte(0x8d); /*LEA EDI, 1[ESI]*/
+ addbyte(0x7e);
+ addbyte(0x01);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xfff*/
+ addbyte(0xc7);
+ addlong(0xfff);
+ addbyte(0x8b); /*MOV ESI, readlookup2[ESI*4]*/
+ addbyte(0x04 | (REG_ESI << 3));
+ addbyte(0x85 | (REG_ESI << 3));
+ addlong((uint32_t)writelookup2);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+5+1);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(5+1);
+ addbyte(0x66); /*MOV -1[EDI+ESI],CX*/
+ addbyte(0x89);
+ addbyte(0x44 | (REG_CX << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-1);
+ addbyte(0xc3); /*RET*/
+
+ addbyte(0x51); /*slowpath: PUSH ECX*/
+ addbyte(0x50); /*PUSH EAX*/
+ addbyte(0x53); /*PUSH EBX*/
+ addbyte(0xe8); /*CALL writememwl*/
+ addlong((uint32_t)writememwl - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ addbyte(0x83); /*ADD ESP, 12*/
+ addbyte(0xc4);
+ addbyte(12);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE mem_abrt_rout*/
+ addbyte(0x85);
+ addlong(mem_abrt_rout - ((uint32_t)(&codeblock[block_current].data[block_pos]) + 4));
+ addbyte(0xc3); /*RET*/
+
+ return addr;
+}
+
+static uint32_t gen_MEM_STORE_ADDR_EA_L()
+{
+ uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
+
+ /*dat = ECX, seg = ESI, addr = EAX*/
+ addbyte(0x89); /*MOV EBX, ESI*/
+ addbyte(0xf3);
+ addbyte(0x01); /*ADDL ESI, EAX*/
+ addbyte(0xc0 | (REG_EAX << 3) | REG_ESI);
+ addbyte(0x8d); /*LEA EDI, 3[ESI]*/
+ addbyte(0x7e);
+ addbyte(0x03);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xffc*/
+ addbyte(0xc7);
+ addlong(0xffc);
+ addbyte(0x8b); /*MOV ESI, readlookup2[ESI*4]*/
+ addbyte(0x04 | (REG_ESI << 3));
+ addbyte(0x85 | (REG_ESI << 3));
+ addlong((uint32_t)writelookup2);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+4+1);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(4+1);
+ addbyte(0x89); /*MOV -3[EDI+ESI],ECX*/
+ addbyte(0x44 | (REG_ECX << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-3);
+ addbyte(0xc3); /*RET*/
+
+ addbyte(0x51); /*slowpath: PUSH ECX*/
+ addbyte(0x50); /*PUSH EAX*/
+ addbyte(0x53); /*PUSH EBX*/
+ addbyte(0xe8); /*CALL writememll*/
+ addlong((uint32_t)writememll - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ addbyte(0x83); /*ADD ESP, 12*/
+ addbyte(0xc4);
+ addbyte(12);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE mem_abrt_rout*/
+ addbyte(0x85);
+ addlong(mem_abrt_rout - ((uint32_t)(&codeblock[block_current].data[block_pos]) + 4));
+ addbyte(0xc3); /*RET*/
+
+ return addr;
+}
+
+static uint32_t gen_MEM_STORE_ADDR_EA_Q()
+{
+ uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
+
+ /*dat = EBX/ECX, seg = ESI, addr = EAX*/
+ addbyte(0x89); /*MOV EDX, ESI*/
+ addbyte(0xf2);
+ addbyte(0x01); /*ADDL ESI, EAX*/
+ addbyte(0xc0 | (REG_EAX << 3) | REG_ESI);
+ addbyte(0x8d); /*LEA EDI, 7[ESI]*/
+ addbyte(0x7e);
+ addbyte(0x07);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xff8*/
+ addbyte(0xc7);
+ addlong(0xff8);
+ addbyte(0x8b); /*MOV ESI, readlookup2[ESI*4]*/
+ addbyte(0x04 | (REG_ESI << 3));
+ addbyte(0x85 | (REG_ESI << 3));
+ addlong((uint32_t)writelookup2);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+4+4+1);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(4+4+1);
+ addbyte(0x89); /*MOV -7[EDI+ESI],EBX*/
+ addbyte(0x44 | (REG_EBX << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-7);
+ addbyte(0x89); /*MOV -7[EDI+ESI],EBX*/
+ addbyte(0x44 | (REG_ECX << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-7+4);
+ addbyte(0xc3); /*RET*/
+
+ addbyte(0x51); /*slowpath: PUSH ECX*/
+ addbyte(0x53); /*PUSH EBX*/
+ addbyte(0x50); /*PUSH EAX*/
+ addbyte(0x52); /*PUSH EDX*/
+ addbyte(0xe8); /*CALL writememql*/
+ addlong((uint32_t)writememql - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ addbyte(0x83); /*ADD ESP, 16*/
+ addbyte(0xc4);
+ addbyte(16);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE mem_abrt_rout*/
+ addbyte(0x85);
+ addlong(mem_abrt_rout - ((uint32_t)(&codeblock[block_current].data[block_pos]) + 4));
+ addbyte(0xc3); /*RET*/
+
+ return addr;
+}
+
+static char gen_MEM_LOAD_ADDR_EA_B_NO_ABRT_err[] = "gen_MEM_LOAD_ADDR_EA_B_NO_ABRT aborted\n";
+static uint32_t gen_MEM_LOAD_ADDR_EA_B_NO_ABRT()
+{
+ uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
+
+ addbyte(0x89); /*MOV ESI, EDX*/
+ addbyte(0xd6);
+ addbyte(0x01); /*ADDL EDX, EAX*/
+ addbyte(0xc2);
+ addbyte(0x89); /*MOV EDI, EDX*/
+ addbyte(0xd7);
+ addbyte(0xc1); /*SHR EDX, 12*/
+ addbyte(0xea);
+ addbyte(12);
+ addbyte(0x8b); /*MOV EDX, readlookup2[EDX*4]*/
+ addbyte(0x14);
+ addbyte(0x95);
+ addlong((uint32_t)readlookup2);
+ addbyte(0x83); /*CMP EDX, -1*/
+ addbyte(0xfa);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(4+1);
+ addbyte(0x0f); /*MOVZX ECX, B[EDX+EDI]*/
+ addbyte(0xb6);
+ addbyte(0x0c);
+ addbyte(0x3a);
+ addbyte(0xc3); /*RET*/
+
+ addbyte(0x50); /*slowpath: PUSH EAX*/
+ addbyte(0x56); /*PUSH ESI*/
+ addbyte(0xe8); /*CALL readmembl*/
+ addlong((uint32_t)readmemb386l - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ addbyte(0x83); /*ADD ESP, 8*/
+ addbyte(0xc4);
+ addbyte(8);
+#ifndef RELEASE_BUILD
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+#endif
+ addbyte(0x0f); /*MOVZX ECX, AL*/
+ addbyte(0xb6);
+ addbyte(0xc8);
+#ifndef RELEASE_BUILD
+ addbyte(0x75); /*JNE mem_abrt_rout*/
+ addbyte(1);
+#endif
+ addbyte(0xc3); /*RET*/
+#ifndef RELEASE_BUILD
+ addbyte(0xc7); /*MOV [ESP], gen_MEM_LOAD_ADDR_EA_B_NO_ABRT_err*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addlong((uint32_t)gen_MEM_LOAD_ADDR_EA_B_NO_ABRT_err);
+ addbyte(0xe8); /*CALL fatal*/
+ addlong((uint32_t)fatal - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ /*Should not return!*/
+#endif
+ return addr;
+}
+
+static char gen_MEM_LOAD_ADDR_EA_W_NO_ABRT_err[] = "gen_MEM_LOAD_ADDR_EA_W_NO_ABRT aborted\n";
+static uint32_t gen_MEM_LOAD_ADDR_EA_W_NO_ABRT()
+{
+ uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
+
+ addbyte(0x89); /*MOV ESI, EDX*/
+ addbyte(0xd6);
+ addbyte(0x01); /*ADDL EDX, EAX*/
+ addbyte(0xc2);
+ addbyte(0x8d); /*LEA EDI, 1[EDX]*/
+ addbyte(0x7a);
+ addbyte(0x01);
+ addbyte(0xc1); /*SHR EDX, 12*/
+ addbyte(0xea);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xfff*/
+ addbyte(0xc7);
+ addlong(0xfff);
+ addbyte(0x8b); /*MOV EDX, readlookup2[EDX*4]*/
+ addbyte(0x14);
+ addbyte(0x95);
+ addlong((uint32_t)readlookup2);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+5+1);
+ addbyte(0x83); /*CMP EDX, -1*/
+ addbyte(0xfa);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(5+1);
+ addbyte(0x0f); /*MOVZX EEX, -1[EDX+EDI]W*/
+ addbyte(0xb7);
+ addbyte(0x4c);
+ addbyte(0x3a);
+ addbyte(-1);
+ addbyte(0xc3); /*RET*/
+
+ addbyte(0x50); /*slowpath: PUSH EAX*/
+ addbyte(0x56); /*PUSH ESI*/
+ addbyte(0xe8); /*CALL readmemwl*/
+ addlong((uint32_t)readmemwl - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ addbyte(0x83); /*ADD ESP, 8*/
+ addbyte(0xc4);
+ addbyte(8);
+#ifndef RELEASE_BUILD
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+#endif
+ addbyte(0x0f); /*MOVZX ECX, AX*/
+ addbyte(0xb7);
+ addbyte(0xc8);
+#ifndef RELEASE_BUILD
+ addbyte(0x75); /*JNE mem_abrt_rout*/
+ addbyte(1);
+#endif
+ addbyte(0xc3); /*RET*/
+#ifndef RELEASE_BUILD
+ addbyte(0xc7); /*MOV [ESP], gen_MEM_LOAD_ADDR_EA_W_NO_ABRT_err*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addlong((uint32_t)gen_MEM_LOAD_ADDR_EA_W_NO_ABRT_err);
+ addbyte(0xe8); /*CALL fatal*/
+ addlong((uint32_t)fatal - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ /*Should not return!*/
+#endif
+ return addr;
+}
+
+static char gen_MEM_LOAD_ADDR_EA_L_NO_ABRT_err[] = "gen_MEM_LOAD_ADDR_EA_L_NO_ABRT aborted\n";
+static uint32_t gen_MEM_LOAD_ADDR_EA_L_NO_ABRT()
+{
+ uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
+
+ addbyte(0x89); /*MOV ESI, EDX*/
+ addbyte(0xd6);
+ addbyte(0x01); /*ADDL EDX, EAX*/
+ addbyte(0xc2);
+ addbyte(0x8d); /*LEA EDI, 3[EDX]*/
+ addbyte(0x7a);
+ addbyte(0x03);
+ addbyte(0xc1); /*SHR EDX, 12*/
+ addbyte(0xea);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xffc*/
+ addbyte(0xc7);
+ addlong(0xffc);
+ addbyte(0x8b); /*MOV EDX, readlookup2[EDX*4]*/
+ addbyte(0x14);
+ addbyte(0x95);
+ addlong((uint32_t)readlookup2);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+4+1);
+ addbyte(0x83); /*CMP EDX, -1*/
+ addbyte(0xfa);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(4+1);
+ addbyte(0x8b); /*MOV ECX, -3[EDX+EDI]*/
+ addbyte(0x4c);
+ addbyte(0x3a);
+ addbyte(-3);
+ addbyte(0xc3); /*RET*/
+
+ addbyte(0x50); /*slowpath: PUSH EAX*/
+ addbyte(0x56); /*PUSH ESI*/
+ addbyte(0xe8); /*CALL readmemll*/
+ addlong((uint32_t)readmemll - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ addbyte(0x83); /*ADD ESP, 8*/
+ addbyte(0xc4);
+ addbyte(8);
+ addbyte(0x89); /*MOV ECX, EAX*/
+ addbyte(0xc1);
+#ifndef RELEASE_BUILD
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x75); /*JNE mem_abrt_rout*/
+ addbyte(1);
+#endif
+ addbyte(0xc3); /*RET*/
+#ifndef RELEASE_BUILD
+ addbyte(0x83); /*SUBL 4,%esp*/
+ addbyte(0xEC);
+ addbyte(4);
+ addbyte(0xc7); /*MOV [ESP], gen_MEM_LOAD_ADDR_EA_L_NO_ABRT_err*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addlong((uint32_t)gen_MEM_LOAD_ADDR_EA_L_NO_ABRT_err);
+ addbyte(0xe8); /*CALL fatal*/
+ addlong((uint32_t)fatal - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ /*Should not return!*/
+#endif
+ return addr;
+}
+
+static char gen_MEM_STORE_ADDR_EA_B_NO_ABRT_err[] = "gen_MEM_STORE_ADDR_EA_B_NO_ABRT aborted\n";
+static uint32_t gen_MEM_STORE_ADDR_EA_B_NO_ABRT()
+{
+ uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
+
+ /*dat = ECX, seg = ESI, addr = EAX*/
+ addbyte(0x89); /*MOV EBX, ESI*/
+ addbyte(0xf3);
+ addbyte(0x01); /*ADDL ESI, EAX*/
+ addbyte(0xc0 | (REG_EAX << 3) | REG_ESI);
+ addbyte(0x89); /*MOV EDI, ESI*/
+ addbyte(0xc0 | (REG_ESI << 3) | REG_EDI);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ addbyte(0x8b); /*MOV ESI, readlookup2[ESI*4]*/
+ addbyte(0x04 | (REG_ESI << 3));
+ addbyte(0x85 | (REG_ESI << 3));
+ addlong((uint32_t)writelookup2);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+1);
+ addbyte(0x88); /*MOV [EDI+ESI],CL*/
+ addbyte(0x04 | (REG_ECX << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(0xc3); /*RET*/
+
+ addbyte(0x51); /*slowpath: PUSH ECX*/
+ addbyte(0x50); /*PUSH EAX*/
+ addbyte(0x53); /*PUSH EBX*/
+ addbyte(0xe8); /*CALL writememb386l*/
+ addlong((uint32_t)writememb386l - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ addbyte(0x83); /*ADD ESP, 12*/
+ addbyte(0xc4);
+ addbyte(12);
+#ifndef RELEASE_BUILD
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x75); /*JNE mem_abrt_rout*/
+ addbyte(1);
+#endif
+ addbyte(0xc3); /*RET*/
+#ifndef RELEASE_BUILD
+ addbyte(0xc7); /*MOV [ESP], gen_MEM_STORE_ADDR_EA_B_NO_ABRT_err*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addlong((uint32_t)gen_MEM_STORE_ADDR_EA_B_NO_ABRT_err);
+ addbyte(0xe8); /*CALL fatal*/
+ addlong((uint32_t)fatal - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ /*Should not return!*/
+#endif
+ return addr;
+}
+
+static char gen_MEM_STORE_ADDR_EA_W_NO_ABRT_err[] = "gen_MEM_STORE_ADDR_EA_W_NO_ABRT aborted\n";
+static uint32_t gen_MEM_STORE_ADDR_EA_W_NO_ABRT()
+{
+ uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
+
+ /*dat = ECX, seg = ESI, addr = EAX*/
+ addbyte(0x89); /*MOV EBX, ESI*/
+ addbyte(0xf3);
+ addbyte(0x01); /*ADDL ESI, EAX*/
+ addbyte(0xc0 | (REG_EAX << 3) | REG_ESI);
+ addbyte(0x8d); /*LEA EDI, 1[ESI]*/
+ addbyte(0x7e);
+ addbyte(0x01);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xfff*/
+ addbyte(0xc7);
+ addlong(0xfff);
+ addbyte(0x8b); /*MOV ESI, readlookup2[ESI*4]*/
+ addbyte(0x04 | (REG_ESI << 3));
+ addbyte(0x85 | (REG_ESI << 3));
+ addlong((uint32_t)writelookup2);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+5+1);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(5+1);
+ addbyte(0x66); /*MOV -1[EDI+ESI],CX*/
+ addbyte(0x89);
+ addbyte(0x44 | (REG_CX << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-1);
+ addbyte(0xc3); /*RET*/
+
+ addbyte(0x51); /*slowpath: PUSH ECX*/
+ addbyte(0x50); /*PUSH EAX*/
+ addbyte(0x53); /*PUSH EBX*/
+ addbyte(0xe8); /*CALL writememwl*/
+ addlong((uint32_t)writememwl - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ addbyte(0x83); /*ADD ESP, 12*/
+ addbyte(0xc4);
+ addbyte(12);
+#ifndef RELEASE_BUILD
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x75); /*JNE mem_abrt_rout*/
+ addbyte(1);
+#endif
+ addbyte(0xc3); /*RET*/
+#ifndef RELEASE_BUILD
+ addbyte(0xc7); /*MOV [ESP], gen_MEM_STORE_ADDR_EA_W_NO_ABRT_err*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addlong((uint32_t)gen_MEM_STORE_ADDR_EA_W_NO_ABRT_err);
+ addbyte(0xe8); /*CALL fatal*/
+ addlong((uint32_t)fatal - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ /*Should not return!*/
+#endif
+ return addr;
+}
+
+static char gen_MEM_STORE_ADDR_EA_L_NO_ABRT_err[] = "gen_MEM_STORE_ADDR_EA_L_NO_ABRT aborted\n";
+static uint32_t gen_MEM_STORE_ADDR_EA_L_NO_ABRT()
+{
+ uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
+
+ /*dat = ECX, seg = ESI, addr = EAX*/
+ addbyte(0x89); /*MOV EBX, ESI*/
+ addbyte(0xf3);
+ addbyte(0x01); /*ADDL ESI, EAX*/
+ addbyte(0xc0 | (REG_EAX << 3) | REG_ESI);
+ addbyte(0x8d); /*LEA EDI, 3[ESI]*/
+ addbyte(0x7e);
+ addbyte(0x03);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xe8 | REG_ESI);
+ addbyte(12);
+ addbyte(0xf7); /*TEST EDI, 0xffc*/
+ addbyte(0xc7);
+ addlong(0xffc);
+ addbyte(0x8b); /*MOV ESI, readlookup2[ESI*4]*/
+ addbyte(0x04 | (REG_ESI << 3));
+ addbyte(0x85 | (REG_ESI << 3));
+ addlong((uint32_t)writelookup2);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(3+2+4+1);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xf8 | REG_ESI);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(4+1);
+ addbyte(0x89); /*MOV -3[EDI+ESI],ECX*/
+ addbyte(0x44 | (REG_ECX << 3));
+ addbyte(REG_EDI | (REG_ESI << 3));
+ addbyte(-3);
+ addbyte(0xc3); /*RET*/
+
+ addbyte(0x51); /*slowpath: PUSH ECX*/
+ addbyte(0x50); /*PUSH EAX*/
+ addbyte(0x53); /*PUSH EBX*/
+ addbyte(0xe8); /*CALL writememll*/
+ addlong((uint32_t)writememll - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ addbyte(0x83); /*ADD ESP, 12*/
+ addbyte(0xc4);
+ addbyte(12);
+#ifndef RELEASE_BUILD
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x75); /*JNE mem_abrt_rout*/
+ addbyte(1);
+#endif
+ addbyte(0xc3); /*RET*/
+#ifndef RELEASE_BUILD
+ addbyte(0xc7); /*MOV [ESP], gen_MEM_STORE_ADDR_EA_L_NO_ABRT_err*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addlong((uint32_t)gen_MEM_STORE_ADDR_EA_L_NO_ABRT_err);
+ addbyte(0xe8); /*CALL fatal*/
+ addlong((uint32_t)fatal - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ /*Should not return!*/
+#endif
+ return addr;
+}
+
+static uint32_t gen_MEM_CHECK_WRITE()
+{
+ uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
+
+ /*seg = ESI, addr = EAX*/
+
+ addbyte(0x8d); /*LEA EDI, [EAX+ESI]*/
+ addbyte(0x3c);
+ addbyte(0x30);
+ addbyte(0x83); /*CMP cr0, 0*/
+ addbyte(0x3d);
+ addlong((uint32_t)&cr0);
+ addbyte(0);
+ addbyte(0x78); /*JS +*/
+ addbyte(1);
+ addbyte(0xc3); /*RET*/
+ addbyte(0xc1); /*SHR EDI, 12*/
+ addbyte(0xef);
+ addbyte(12);
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xfe);
+ addbyte(-1);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(11);
+ addbyte(0x83); /*CMP writelookup2[EDI*4],-1*/
+ addbyte(0x3c);
+ addbyte(0xbd);
+ addlong((uint32_t)writelookup2);
+ addbyte(-1);
+ addbyte(0x74); /*JE +*/
+ addbyte(1);
+ addbyte(0xc3); /*RET*/
+
+ /*slowpath:*/
+ addbyte(0x8d); /*LEA EDI, [EAX+ESI]*/
+ addbyte(0x3c);
+ addbyte(0x30);
+ addbyte(0x6a); /*PUSH 1*/
+ addbyte(1);
+ addbyte(0x57); /*PUSH EDI*/
+ addbyte(0xe8); /*CALL mmutranslatereal*/
+ addlong((uint32_t)mmutranslatereal - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ addbyte(0x83); /*ADD ESP, 8*/
+ addbyte(0xc4);
+ addbyte(8);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE mem_abrt_rout*/
+ addbyte(0x85);
+ addlong(mem_abrt_rout - ((uint32_t)(&codeblock[block_current].data[block_pos]) + 4));
+ addbyte(0xc3); /*RET*/
+
+ return addr;
+}
+
+/*static void checkdebug(uint32_t a)
+{
+ pclog("checkdebug %08x\n", a);
+}*/
+
+static uint32_t gen_MEM_CHECK_WRITE_W()
+{
+ uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
+
+ /*seg = ESI, addr = EAX*/
+
+ addbyte(0x8d); /*LEA EDI, [EAX+ESI]*/
+ addbyte(0x3c);
+ addbyte(0x30);
+ addbyte(0x83); /*CMP cr0, 0*/
+ addbyte(0x3d);
+ addlong((uint32_t)&cr0);
+ addbyte(0);
+ addbyte(0x78); /*JS +*/
+ addbyte(1);
+ addbyte(0xc3); /*RET*/
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xfe);
+ addbyte(-1);
+ addbyte(0x8d); /*LEA ESI, 1[EDI]*/
+ addbyte(0x77);
+ addbyte(0x01);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(11);
+ addbyte(0x89); /*MOV EAX, EDI*/
+ addbyte(0xf8);
+ addbyte(0xc1); /*SHR EDI, 12*/
+ addbyte(0xef);
+ addbyte(12);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xee);
+ addbyte(12);
+ addbyte(0x83); /*CMP writelookup2[EDI*4],-1*/
+ addbyte(0x3c);
+ addbyte(0xbd);
+ addlong((uint32_t)writelookup2);
+ addbyte(-1);
+ addbyte(0x74); /*JE +*/
+ addbyte(11);
+ addbyte(0x83); /*CMP writelookup2[ESI*4],-1*/
+ addbyte(0x3c);
+ addbyte(0xb5);
+ addlong((uint32_t)writelookup2);
+ addbyte(-1);
+ addbyte(0x74); /*JE +*/
+ addbyte(1);
+ addbyte(0xc3); /*RET*/
+
+ /*slowpath:*/
+ addbyte(0x89); /*MOV EDI, EAX*/
+ addbyte(0xc7);
+ /*slowpath_lp:*/
+ addbyte(0x6a); /*PUSH 1*/
+ addbyte(1);
+ addbyte(0x57); /*PUSH EDI*/
+ addbyte(0xe8); /*CALL mmutranslatereal*/
+ addlong((uint32_t)mmutranslatereal - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ addbyte(0x5f); /*POP EDI*/
+ addbyte(0x83); /*ADD ESP, 4*/
+ addbyte(0xc4);
+ addbyte(4);
+ addbyte(0x83); /*ADD EDI, 1*/
+ addbyte(0xc7);
+ addbyte(1);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE mem_abrt_rout*/
+ addbyte(0x85);
+ addlong(mem_abrt_rout - ((uint32_t)(&codeblock[block_current].data[block_pos]) + 4));
+ /*If bits 0-11 of the address are now 0 then this crosses a page, so loop back*/
+ addbyte(0xf7); /*TEST $fff, EDI*/
+ addbyte(0xc7);
+ addlong(0xfff);
+ addbyte(0x74); /*JE slowpath_lp*/
+ addbyte(-33);
+ addbyte(0xc3); /*RET*/
+
+ return addr;
+}
+
+static uint32_t gen_MEM_CHECK_WRITE_L()
+{
+ uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
+
+ /*seg = ESI, addr = EAX*/
+
+ addbyte(0x8d); /*LEA EDI, [EAX+ESI]*/
+ addbyte(0x3c);
+ addbyte(0x30);
+ addbyte(0x83); /*CMP cr0, 0*/
+ addbyte(0x3d);
+ addlong((uint32_t)&cr0);
+ addbyte(0);
+ addbyte(0x78); /*JS +*/
+ addbyte(1);
+ addbyte(0xc3); /*RET*/
+ addbyte(0x83); /*CMP ESI, -1*/
+ addbyte(0xfe);
+ addbyte(-1);
+ addbyte(0x8d); /*LEA ESI, 3[EDI]*/
+ addbyte(0x77);
+ addbyte(0x03);
+ addbyte(0x74); /*JE slowpath*/
+ addbyte(11);
+ addbyte(0x89); /*MOV EAX, EDI*/
+ addbyte(0xf8);
+ addbyte(0xc1); /*SHR EDI, 12*/
+ addbyte(0xef);
+ addbyte(12);
+ addbyte(0xc1); /*SHR ESI, 12*/
+ addbyte(0xee);
+ addbyte(12);
+ addbyte(0x83); /*CMP writelookup2[EDI*4],-1*/
+ addbyte(0x3c);
+ addbyte(0xbd);
+ addlong((uint32_t)writelookup2);
+ addbyte(-1);
+ addbyte(0x74); /*JE +*/
+ addbyte(11);
+ addbyte(0x83); /*CMP writelookup2[ESI*4],-1*/
+ addbyte(0x3c);
+ addbyte(0xb5);
+ addlong((uint32_t)writelookup2);
+ addbyte(-1);
+ addbyte(0x74); /*JE +*/
+ addbyte(1);
+ addbyte(0xc3); /*RET*/
+
+ /*slowpath:*/
+ addbyte(0x89); /*MOV EDI, EAX*/
+ addbyte(0xc7);
+ /*slowpath_lp:*/
+ addbyte(0x6a); /*PUSH 1*/
+ addbyte(1);
+ addbyte(0x57); /*PUSH EDI*/
+ addbyte(0xe8); /*CALL mmutranslatereal*/
+ addlong((uint32_t)mmutranslatereal - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ addbyte(0x5f); /*POP EDI*/
+ addbyte(0x83); /*ADD ESP, 4*/
+ addbyte(0xc4);
+ addbyte(4);
+ addbyte(0x83); /*ADD EDI, 3*/
+ addbyte(0xc7);
+ addbyte(3);
+ addbyte(0x80); /*CMP abrt, 0*/
+ addbyte(0x7d);
+ addbyte((uint8_t)cpu_state_offset(abrt));
+ addbyte(0);
+ addbyte(0x0f); /*JNE mem_abrt_rout*/
+ addbyte(0x85);
+ addlong(mem_abrt_rout - ((uint32_t)(&codeblock[block_current].data[block_pos]) + 4));
+ /*If bits 2-11 of the address are now 0 then this crosses a page, so loop back*/
+ addbyte(0xf7); /*TEST EDI, FFC*/
+ addbyte(0xc7);
+ addlong(0xffc);
+ addbyte(0x74); /*JE slowpath_lp*/
+ addbyte(-33);
+ addbyte(0xc3); /*RET*/
+
+ return addr;
+}
+
+void codegen_init()
+{
+#ifdef __linux__
+ void *start;
+ size_t len;
+ long pagesize = sysconf(_SC_PAGESIZE);
+ long pagemask = ~(pagesize - 1);
+#endif
+
+#if defined WIN32 || defined _WIN32 || defined _WIN32
+ codeblock = VirtualAlloc(NULL, (BLOCK_SIZE+1) * sizeof(codeblock_t), MEM_COMMIT, PAGE_EXECUTE_READWRITE);
+#else
+ codeblock = malloc((BLOCK_SIZE+1) * sizeof(codeblock_t));
+#endif
+ codeblock_hash = malloc(HASH_SIZE * sizeof(codeblock_t *));
+
+ memset(codeblock, 0, (BLOCK_SIZE+1) * sizeof(codeblock_t));
+ memset(codeblock_hash, 0, HASH_SIZE * sizeof(codeblock_t *));
+
+#ifdef __linux__
+ start = (void *)((long)codeblock & pagemask);
+ len = (((BLOCK_SIZE+1) * sizeof(codeblock_t)) + pagesize) & pagemask;
+ if (mprotect(start, len, PROT_READ | PROT_WRITE | PROT_EXEC) != 0)
+ {
+ perror("mprotect");
+ exit(-1);
+ }
+#endif
+// pclog("Codegen is %p\n", (void *)pages[0xfab12 >> 12].block);
+
+ block_current = BLOCK_SIZE;
+ block_pos = 0;
+ mem_abrt_rout = (uint32_t)&codeblock[block_current].data[block_pos];
+ addbyte(0x83); /*ADDL $16+4,%esp*/
+ addbyte(0xC4);
+ addbyte(0x10+4);
+ addbyte(0x5f); /*POP EDI*/
+ addbyte(0x5e); /*POP ESI*/
+ addbyte(0x5d); /*POP EBP*/
+ addbyte(0x5b); /*POP EDX*/
+ addbyte(0xC3); /*RET*/
+ block_pos = (block_pos + 15) & ~15;
+ mem_load_addr_ea_l = (uint32_t)gen_MEM_LOAD_ADDR_EA_L();
+ block_pos = (block_pos + 15) & ~15;
+ mem_load_addr_ea_w = (uint32_t)gen_MEM_LOAD_ADDR_EA_W();
+ block_pos = (block_pos + 15) & ~15;
+ mem_load_addr_ea_b = (uint32_t)gen_MEM_LOAD_ADDR_EA_B();
+ block_pos = (block_pos + 15) & ~15;
+ mem_load_addr_ea_q = (uint32_t)gen_MEM_LOAD_ADDR_EA_Q();
+ block_pos = (block_pos + 15) & ~15;
+ mem_store_addr_ea_l = (uint32_t)gen_MEM_STORE_ADDR_EA_L();
+ block_pos = (block_pos + 15) & ~15;
+ mem_store_addr_ea_w = (uint32_t)gen_MEM_STORE_ADDR_EA_W();
+ block_pos = (block_pos + 15) & ~15;
+ mem_store_addr_ea_b = (uint32_t)gen_MEM_STORE_ADDR_EA_B();
+ block_pos = (block_pos + 15) & ~15;
+ mem_store_addr_ea_q = (uint32_t)gen_MEM_STORE_ADDR_EA_Q();
+ block_pos = (block_pos + 15) & ~15;
+ mem_load_addr_ea_b_no_abrt = (uint32_t)gen_MEM_LOAD_ADDR_EA_B_NO_ABRT();
+ block_pos = (block_pos + 15) & ~15;
+ mem_store_addr_ea_b_no_abrt = (uint32_t)gen_MEM_STORE_ADDR_EA_B_NO_ABRT();
+ block_pos = (block_pos + 15) & ~15;
+ mem_load_addr_ea_w_no_abrt = (uint32_t)gen_MEM_LOAD_ADDR_EA_W_NO_ABRT();
+ block_pos = (block_pos + 15) & ~15;
+ mem_store_addr_ea_w_no_abrt = (uint32_t)gen_MEM_STORE_ADDR_EA_W_NO_ABRT();
+ block_pos = (block_pos + 15) & ~15;
+ mem_load_addr_ea_l_no_abrt = (uint32_t)gen_MEM_LOAD_ADDR_EA_L_NO_ABRT();
+ block_pos = (block_pos + 15) & ~15;
+ mem_store_addr_ea_l_no_abrt = (uint32_t)gen_MEM_STORE_ADDR_EA_L_NO_ABRT();
+ block_pos = (block_pos + 15) & ~15;
+ mem_check_write = (uint32_t)gen_MEM_CHECK_WRITE();
+ block_pos = (block_pos + 15) & ~15;
+ mem_check_write_w = (uint32_t)gen_MEM_CHECK_WRITE_W();
+ block_pos = (block_pos + 15) & ~15;
+ mem_check_write_l = (uint32_t)gen_MEM_CHECK_WRITE_L();
+
+ asm(
+ "fstcw %0\n"
+ : "=m" (cpu_state.old_npxc)
+ );
+}
+
+void codegen_reset()
+{
+ memset(codeblock, 0, BLOCK_SIZE * sizeof(codeblock_t));
+ memset(codeblock_hash, 0, HASH_SIZE * sizeof(codeblock_t *));
+ mem_reset_page_blocks();
+}
+
+void dump_block()
+{
+ codeblock_t *block = pages[0x119000 >> 12].block;
+
+ pclog("dump_block:\n");
+ while (block)
+ {
+ uint32_t start_pc = (block->pc & 0xffc) | (block->phys & ~0xfff);
+ uint32_t end_pc = (block->endpc & 0xffc) | (block->phys & ~0xfff);
+ pclog(" %p : %08x-%08x %08x-%08x %p %p\n", (void *)block, start_pc, end_pc, block->pc, block->endpc, (void *)block->prev, (void *)block->next);
+ if (!block->pc)
+ fatal("Dead PC=0\n");
+
+ block = block->next;
+ }
+ pclog("dump_block done\n");
+}
+
+static void add_to_block_list(codeblock_t *block)
+{
+ codeblock_t *block_prev = pages[block->phys >> 12].block;
+
+ if (!block->page_mask)
+ fatal("add_to_block_list - mask = 0\n");
+
+ if (block_prev)
+ {
+ block->next = block_prev;
+ block_prev->prev = block;
+ pages[block->phys >> 12].block = block;
+ }
+ else
+ {
+ block->next = NULL;
+ pages[block->phys >> 12].block = block;
+ }
+
+ if (block->next)
+ {
+ if (!block->next->pc)
+ fatal("block->next->pc=0 %p %p %x %x\n", (void *)block->next, (void *)codeblock, block_current, block_pos);
+ }
+
+ if (block->page_mask2)
+ {
+ block_prev = pages[block->phys_2 >> 12].block_2;
+
+ if (block_prev)
+ {
+ block->next_2 = block_prev;
+ block_prev->prev_2 = block;
+ pages[block->phys_2 >> 12].block_2 = block;
+ }
+ else
+ {
+ block->next_2 = NULL;
+ pages[block->phys_2 >> 12].block_2 = block;
+ }
+ }
+}
+
+static void remove_from_block_list(codeblock_t *block, uint32_t pc)
+{
+ if (!block->page_mask)
+ return;
+
+ if (block->prev)
+ {
+ block->prev->next = block->next;
+ if (block->next)
+ block->next->prev = block->prev;
+ }
+ else
+ {
+ pages[block->phys >> 12].block = block->next;
+ if (block->next)
+ block->next->prev = NULL;
+ else
+ mem_flush_write_page(block->phys, 0);
+ }
+ if (!block->page_mask2)
+ {
+ if (block->prev_2 || block->next_2)
+ fatal("Invalid block_2\n");
+ return;
+ }
+
+ if (block->prev_2)
+ {
+ block->prev_2->next_2 = block->next_2;
+ if (block->next_2)
+ block->next_2->prev_2 = block->prev_2;
+ }
+ else
+ {
+// pclog(" pages.block_2=%p 3 %p %p\n", (void *)block->next_2, (void *)block, (void *)pages[block->phys_2 >> 12].block_2);
+ pages[block->phys_2 >> 12].block_2 = block->next_2;
+ if (block->next_2)
+ block->next_2->prev_2 = NULL;
+ else
+ mem_flush_write_page(block->phys_2, 0);
+ }
+}
+
+static void delete_block(codeblock_t *block)
+{
+ uint32_t old_pc = block->pc;
+
+ if (block == codeblock_hash[HASH(block->phys)])
+ codeblock_hash[HASH(block->phys)] = NULL;
+
+ if (!block->pc)
+ fatal("Deleting deleted block\n");
+ block->pc = 0;
+
+ codeblock_tree_delete(block);
+ remove_from_block_list(block, old_pc);
+}
+
+void codegen_check_flush(page_t *page, uint64_t mask, uint32_t phys_addr)
+{
+ struct codeblock_t *block = page->block;
+
+ while (block)
+ {
+ if (mask & block->page_mask)
+ {
+ delete_block(block);
+ cpu_recomp_evicted++;
+ }
+ if (block == block->next)
+ fatal("Broken 1\n");
+ block = block->next;
+ }
+
+ block = page->block_2;
+
+ while (block)
+ {
+ if (mask & block->page_mask2)
+ {
+ delete_block(block);
+ cpu_recomp_evicted++;
+ }
+ if (block == block->next_2)
+ fatal("Broken 2\n");
+ block = block->next_2;
+ }
+}
+
+void codegen_block_init(uint32_t phys_addr)
+{
+ codeblock_t *block;
+ page_t *page = &pages[phys_addr >> 12];
+
+ if (!page->block)
+ mem_flush_write_page(phys_addr, cs+cpu_state.pc);
+
+ block_current = (block_current + 1) & BLOCK_MASK;
+ block = &codeblock[block_current];
+
+// if (block->pc == 0xb00b4ff5)
+// pclog("Init target block\n");
+ if (block->pc != 0)
+ {
+// pclog("Reuse block : was %08x now %08x\n", block->pc, cs+pc);
+ delete_block(block);
+ cpu_recomp_reuse++;
+ }
+ block_num = HASH(phys_addr);
+ codeblock_hash[block_num] = &codeblock[block_current];
+
+ block->ins = 0;
+ block->pc = cs + cpu_state.pc;
+ block->_cs = cs;
+ block->pnt = block_current;
+ block->phys = phys_addr;
+ block->use32 = use32;
+ block->stack32 = stack32;
+ block->next = block->prev = NULL;
+ block->next_2 = block->prev_2 = NULL;
+ block->page_mask = 0;
+ block->flags = CODEBLOCK_STATIC_TOP;
+
+ block->was_recompiled = 0;
+
+ recomp_page = block->phys & ~0xfff;
+
+ codeblock_tree_add(block);
+}
+
+void codegen_block_start_recompile(codeblock_t *block)
+{
+ page_t *page = &pages[block->phys >> 12];
+
+ if (!page->block)
+ mem_flush_write_page(block->phys, cs+cpu_state.pc);
+
+ block_num = HASH(block->phys);
+ block_current = block->pnt;
+
+ if (block->pc != cs + cpu_state.pc || block->was_recompiled)
+ fatal("Recompile to used block!\n");
+
+ block_pos = BLOCK_GPF_OFFSET;
+ addbyte(0xc7); /*MOV [ESP],0*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addlong(0);
+ addbyte(0xc7); /*MOV [ESP+4],0*/
+ addbyte(0x44);
+ addbyte(0x24);
+ addbyte(0x04);
+ addlong(0);
+ addbyte(0xe8); /*CALL x86gpf*/
+ addlong((uint32_t)x86gpf - (uint32_t)(&codeblock[block_current].data[block_pos + 4]));
+ block_pos = BLOCK_EXIT_OFFSET; /*Exit code*/
+ addbyte(0x83); /*ADDL $16,%esp*/
+ addbyte(0xC4);
+ addbyte(0x10);
+ addbyte(0x5f); /*POP EDI*/
+ addbyte(0x5e); /*POP ESI*/
+ addbyte(0x5d); /*POP EBP*/
+ addbyte(0x5b); /*POP EDX*/
+ addbyte(0xC3); /*RET*/
+ cpu_block_end = 0;
+ block_pos = 0; /*Entry code*/
+ addbyte(0x53); /*PUSH EBX*/
+ addbyte(0x55); /*PUSH EBP*/
+ addbyte(0x56); /*PUSH ESI*/
+ addbyte(0x57); /*PUSH EDI*/
+ addbyte(0x83); /*SUBL $16,%esp*/
+ addbyte(0xEC);
+ addbyte(0x10);
+ addbyte(0xBD); /*MOVL EBP, &cpu_state*/
+ addlong(((uintptr_t)&cpu_state) + 128);
+
+// pclog("New block %i for %08X %03x\n", block_current, cs+pc, block_num);
+
+ last_op32 = -1;
+ last_ea_seg = NULL;
+ last_ssegs = -1;
+
+ codegen_block_cycles = 0;
+ codegen_timing_block_start();
+
+ codegen_block_ins = 0;
+ codegen_block_full_ins = 0;
+
+ recomp_page = block->phys & ~0xfff;
+
+ codegen_flags_changed = 0;
+ codegen_fpu_entered = 0;
+ codegen_mmx_entered = 0;
+
+ codegen_fpu_loaded_iq[0] = codegen_fpu_loaded_iq[1] = codegen_fpu_loaded_iq[2] = codegen_fpu_loaded_iq[3] =
+ codegen_fpu_loaded_iq[4] = codegen_fpu_loaded_iq[5] = codegen_fpu_loaded_iq[6] = codegen_fpu_loaded_iq[7] = 0;
+
+ _ds.checked = _es.checked = _fs.checked = _gs.checked = (cr0 & 1) ? 0 : 1;
+
+ block->TOP = cpu_state.TOP;
+ block->was_recompiled = 1;
+}
+
+void codegen_block_remove()
+{
+ codeblock_t *block = &codeblock[block_current];
+
+ delete_block(block);
+ cpu_recomp_removed++;
+
+ recomp_page = -1;
+}
+
+void codegen_block_generate_end_mask()
+{
+ codeblock_t *block = &codeblock[block_current];
+ uint32_t start_pc = (block->pc & 0xffc) | (block->phys & ~0xfff);
+ uint32_t end_pc = ((codegen_endpc + 3) & 0xffc) | (block->phys & ~0xfff);
+
+ block->endpc = codegen_endpc;
+
+ block->page_mask = 0;
+ start_pc = block->pc & 0xffc;
+ start_pc &= ~PAGE_MASK_MASK;
+ end_pc = ((block->endpc & 0xffc) + PAGE_MASK_MASK) & ~PAGE_MASK_MASK;
+ if (end_pc > 0xfff || end_pc < start_pc)
+ end_pc = 0xfff;
+ start_pc >>= PAGE_MASK_SHIFT;
+ end_pc >>= PAGE_MASK_SHIFT;
+
+// pclog("block_end: %08x %08x\n", start_pc, end_pc);
+ for (; start_pc <= end_pc; start_pc++)
+ {
+ block->page_mask |= ((uint64_t)1 << start_pc);
+// pclog(" %08x %llx\n", start_pc, block->page_mask);
+ }
+
+ pages[block->phys >> 12].code_present_mask |= block->page_mask;
+
+ block->phys_2 = -1;
+ block->page_mask2 = 0;
+ block->next_2 = block->prev_2 = NULL;
+ if ((block->pc ^ block->endpc) & ~0xfff)
+ {
+ block->phys_2 = get_phys_noabrt(block->endpc);
+ if (block->phys_2 != -1)
+ {
+// pclog("start block - %08x %08x %p %p %p %08x\n", block->pc, block->endpc, (void *)block, (void *)block->next_2, (void *)pages[block->phys_2 >> 12].block_2, block->phys_2);
+
+ start_pc = 0;
+ end_pc = (block->endpc & 0xfff) >> PAGE_MASK_SHIFT;
+ for (; start_pc <= end_pc; start_pc++)
+ block->page_mask2 |= ((uint64_t)1 << start_pc);
+
+ if (!pages[block->phys_2 >> 12].block_2)
+ mem_flush_write_page(block->phys_2, block->endpc);
+// pclog("New block - %08x %08x %p %p phys %08x %08x %016llx\n", block->pc, block->endpc, (void *)block, (void *)block->next_2, block->phys, block->phys_2, block->page_mask2);
+ if (!block->page_mask2)
+ fatal("!page_mask2\n");
+ if (block->next_2)
+ {
+// pclog(" next_2->pc=%08x\n", block->next_2->pc);
+ if (!block->next_2->pc)
+ fatal("block->next_2->pc=0 %p\n", (void *)block->next_2);
+ }
+ }
+ }
+
+// pclog("block_end: %08x %08x %016llx\n", block->pc, block->endpc, block->page_mask);
+ recomp_page = -1;
+}
+
+void codegen_block_end()
+{
+ codeblock_t *block = &codeblock[block_current];
+
+ codegen_block_generate_end_mask();
+ add_to_block_list(block);
+}
+
+void codegen_block_end_recompile(codeblock_t *block)
+{
+ codegen_timing_block_end();
+
+ if (codegen_block_cycles)
+ {
+ addbyte(0x81); /*SUB $codegen_block_cycles, cyclcs*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(_cycles));
+ addlong(codegen_block_cycles);
+ }
+ if (codegen_block_ins)
+ {
+ addbyte(0x81); /*ADD $codegen_block_ins,ins*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(cpu_recomp_ins));
+ addlong(codegen_block_ins);
+ }
+#if 0
+ if (codegen_block_full_ins)
+ {
+ addbyte(0x81); /*ADD $codegen_block_ins,ins*/
+ addbyte(0x05);
+ addlong((uint32_t)&cpu_recomp_full_ins);
+ addlong(codegen_block_full_ins);
+ }
+#endif
+ addbyte(0x83); /*ADDL $16,%esp*/
+ addbyte(0xC4);
+ addbyte(0x10);
+ addbyte(0x5f); /*POP EDI*/
+ addbyte(0x5e); /*POP ESI*/
+ addbyte(0x5d); /*POP EBP*/
+ addbyte(0x5b); /*POP EDX*/
+ addbyte(0xC3); /*RET*/
+
+ if (block_pos > BLOCK_GPF_OFFSET)
+ fatal("Over limit!\n");
+
+ remove_from_block_list(block, block->pc);
+ block->next = block->prev = NULL;
+ block->next_2 = block->prev_2 = NULL;
+ codegen_block_generate_end_mask();
+ add_to_block_list(block);
+// pclog("End block %i\n", block_num);
+
+ if (!(block->flags & CODEBLOCK_HAS_FPU))
+ block->flags &= ~CODEBLOCK_STATIC_TOP;
+}
+
+void codegen_flush()
+{
+ return;
+}
+
+static int opcode_modrm[256] =
+{
+ 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, /*00*/
+ 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, /*10*/
+ 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, /*20*/
+ 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, /*30*/
+
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*40*/
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*50*/
+ 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, /*60*/
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*70*/
+
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*80*/
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*90*/
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*a0*/
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*b0*/
+
+ 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, /*c0*/
+ 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, /*d0*/
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*e0*/
+ 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, /*f0*/
+};
+int opcode_0f_modrm[256] =
+{
+ 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*00*/
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*10*/
+ 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*20*/
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*30*/
+
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*40*/
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*50*/
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, /*60*/
+ 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, /*70*/
+
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /*80*/
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /*90*/
+ 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, /*a0*/
+ 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, /*b0*/
+
+ 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, /*c0*/
+ 0, 1, 1, 1, 0, 1, 0, 0, 1, 1, 0, 1, 1, 1, 0, 1, /*d0*/
+ 0, 1, 1, 0, 0, 1, 0, 0, 1, 1, 0, 1, 1, 1, 0, 1, /*e0*/
+ 0, 1, 1, 1, 0, 1, 0, 0, 1, 1, 1, 0, 1, 1, 1, 0 /*f0*/
+};
+
+void codegen_debug()
+{
+ if (output)
+ {
+ pclog("At %04x(%08x):%04x %04x(%08x):%04x es=%08x EAX=%08x BX=%04x ECX=%08x BP=%04x EDX=%08x EDI=%08x\n", CS, cs, cpu_state.pc, SS, ss, ESP, es,EAX, BX,ECX,BP, EDX,EDI);
+ }
+}
+
+static x86seg *codegen_generate_ea_16_long(x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc)
+{
+ if (!cpu_mod && cpu_rm == 6)
+ {
+ addbyte(0xC7); /*MOVL $0,(ssegs)*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(eaaddr));
+ addlong((fetchdat >> 8) & 0xffff);
+ (*op_pc) += 2;
+ }
+ else
+ {
+ switch (cpu_mod)
+ {
+ case 0:
+ addbyte(0xa1); /*MOVL *mod1add[0][cpu_rm], %eax*/
+ addlong((uint32_t)mod1add[0][cpu_rm]);
+ addbyte(0x03); /*ADDL *mod1add[1][cpu_rm], %eax*/
+ addbyte(0x05);
+ addlong((uint32_t)mod1add[1][cpu_rm]);
+ break;
+ case 1:
+ addbyte(0xb8); /*MOVL ,%eax*/
+ addlong((uint32_t)(int8_t)(rmdat >> 8));// pc++;
+ addbyte(0x03); /*ADDL *mod1add[0][cpu_rm], %eax*/
+ addbyte(0x05);
+ addlong((uint32_t)mod1add[0][cpu_rm]);
+ addbyte(0x03); /*ADDL *mod1add[1][cpu_rm], %eax*/
+ addbyte(0x05);
+ addlong((uint32_t)mod1add[1][cpu_rm]);
+ (*op_pc)++;
+ break;
+ case 2:
+ addbyte(0xb8); /*MOVL ,%eax*/
+ addlong((fetchdat >> 8) & 0xffff);// pc++;
+ addbyte(0x03); /*ADDL *mod1add[0][cpu_rm], %eax*/
+ addbyte(0x05);
+ addlong((uint32_t)mod1add[0][cpu_rm]);
+ addbyte(0x03); /*ADDL *mod1add[1][cpu_rm], %eax*/
+ addbyte(0x05);
+ addlong((uint32_t)mod1add[1][cpu_rm]);
+ (*op_pc) += 2;
+ break;
+ }
+ addbyte(0x25); /*ANDL $0xffff, %eax*/
+ addlong(0xffff);
+ addbyte(0xa3);
+ addlong((uint32_t)&cpu_state.eaaddr);
+
+ if (mod1seg[cpu_rm] == &ss && !op_ssegs)
+ op_ea_seg = &_ss;
+ }
+ return op_ea_seg;
+}
+
+static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc, int stack_offset)
+{
+ uint32_t new_eaaddr;
+
+ if (cpu_rm == 4)
+ {
+ uint8_t sib = fetchdat >> 8;
+ (*op_pc)++;
+
+ switch (cpu_mod)
+ {
+ case 0:
+ if ((sib & 7) == 5)
+ {
+ new_eaaddr = fastreadl(cs + (*op_pc) + 1);
+ addbyte(0xb8); /*MOVL ,%eax*/
+ addlong(new_eaaddr);// pc++;
+ (*op_pc) += 4;
+ }
+ else
+ {
+ addbyte(0x8b); /*MOVL regs[sib&7].l, %eax*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[sib & 7].l));
+ }
+ break;
+ case 1:
+ new_eaaddr = (uint32_t)(int8_t)((fetchdat >> 16) & 0xff);
+ addbyte(0xb8); /*MOVL new_eaaddr, %eax*/
+ addlong(new_eaaddr);
+ addbyte(0x03); /*ADDL regs[sib&7].l, %eax*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[sib & 7].l));
+ (*op_pc)++;
+ break;
+ case 2:
+ new_eaaddr = fastreadl(cs + (*op_pc) + 1);
+ addbyte(0xb8); /*MOVL new_eaaddr, %eax*/
+ addlong(new_eaaddr);
+ addbyte(0x03); /*ADDL regs[sib&7].l, %eax*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[sib & 7].l));
+ (*op_pc) += 4;
+ break;
+ }
+ if (stack_offset && (sib & 7) == 4 && (cpu_mod || (sib & 7) != 5)) /*ESP*/
+ {
+ addbyte(0x05);
+ addlong(stack_offset);
+ }
+ if (((sib & 7) == 4 || (cpu_mod && (sib & 7) == 5)) && !op_ssegs)
+ op_ea_seg = &_ss;
+ if (((sib >> 3) & 7) != 4)
+ {
+ switch (sib >> 6)
+ {
+ case 0:
+ addbyte(0x03); /*ADDL regs[sib&7].l, %eax*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[(sib >> 3) & 7].l));
+ break;
+ case 1:
+ addbyte(0x8B); addbyte(0x5D); addbyte((uint8_t)cpu_state_offset(regs[(sib >> 3) & 7].l)); /*MOVL armregs[RD],%ebx*/
+ addbyte(0x01); addbyte(0xD8); /*ADDL %ebx,%eax*/
+ addbyte(0x01); addbyte(0xD8); /*ADDL %ebx,%eax*/
+ break;
+ case 2:
+ addbyte(0x8B); addbyte(0x5D); addbyte((uint8_t)cpu_state_offset(regs[(sib >> 3) & 7].l)); /*MOVL armregs[RD],%ebx*/
+ addbyte(0xC1); addbyte(0xE3); addbyte(2); /*SHL $2,%ebx*/
+ addbyte(0x01); addbyte(0xD8); /*ADDL %ebx,%eax*/
+ break;
+ case 3:
+ addbyte(0x8B); addbyte(0x5D); addbyte((uint8_t)cpu_state_offset(regs[(sib >> 3) & 7].l)); /*MOVL armregs[RD],%ebx*/
+ addbyte(0xC1); addbyte(0xE3); addbyte(3); /*SHL $2,%ebx*/
+ addbyte(0x01); addbyte(0xD8); /*ADDL %ebx,%eax*/
+ break;
+ }
+ }
+ addbyte(0xa3);
+ addlong((uint32_t)&cpu_state.eaaddr);
+ }
+ else
+ {
+ if (!cpu_mod && cpu_rm == 5)
+ {
+ new_eaaddr = fastreadl(cs + (*op_pc) + 1);
+ addbyte(0xC7); /*MOVL $new_eaaddr,(eaaddr)*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(eaaddr));
+ addlong(new_eaaddr);
+ (*op_pc) += 4;
+ return op_ea_seg;
+ }
+ addbyte(0x8b); /*MOVL regs[sib&7].l, %eax*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(regs[cpu_rm].l));
+// addbyte(0xa1); /*MOVL regs[cpu_rm].l, %eax*/
+// addlong((uint32_t)&cpu_state.regs[cpu_rm].l);
+ cpu_state.eaaddr = cpu_state.regs[cpu_rm].l;
+ if (cpu_mod)
+ {
+ if (cpu_rm == 5 && !op_ssegs)
+ op_ea_seg = &_ss;
+ if (cpu_mod == 1)
+ {
+ addbyte(0x05);
+ addlong((uint32_t)(int8_t)(fetchdat >> 8));
+ (*op_pc)++;
+ }
+ else
+ {
+ new_eaaddr = fastreadl(cs + (*op_pc) + 1);
+ addbyte(0x05);
+ addlong(new_eaaddr);
+ (*op_pc) += 4;
+ }
+ }
+ addbyte(0xa3);
+ addlong((uint32_t)&cpu_state.eaaddr);
+ }
+ return op_ea_seg;
+}
+
+void codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_pc, uint32_t old_pc)
+{
+ codeblock_t *block = &codeblock[block_current];
+ uint32_t op_32 = use32;
+ uint32_t op_pc = new_pc;
+ OpFn *op_table = x86_dynarec_opcodes;
+ RecompOpFn *recomp_op_table = recomp_opcodes;
+ int opcode_shift = 0;
+ int opcode_mask = 0x3ff;
+ int over = 0;
+ int pc_off = 0;
+ int test_modrm = 1;
+ int c;
+
+ op_ea_seg = &_ds;
+ op_ssegs = 0;
+ op_old_pc = old_pc;
+
+ for (c = 0; c < NR_HOST_REGS; c++)
+ host_reg_mapping[c] = -1;
+ mmx_ebx_ecx_loaded = 0;
+ for (c = 0; c < NR_HOST_XMM_REGS; c++)
+ host_reg_xmm_mapping[c] = -1;
+
+ codegen_timing_start();
+
+ while (!over)
+ {
+ switch (opcode)
+ {
+ case 0x0f:
+ op_table = x86_dynarec_opcodes_0f;
+ recomp_op_table = recomp_opcodes_0f;
+ over = 1;
+ break;
+
+ case 0x26: /*ES:*/
+ op_ea_seg = &_es;
+ op_ssegs = 1;
+ break;
+ case 0x2e: /*CS:*/
+ op_ea_seg = &_cs;
+ op_ssegs = 1;
+ break;
+ case 0x36: /*SS:*/
+ op_ea_seg = &_ss;
+ op_ssegs = 1;
+ break;
+ case 0x3e: /*DS:*/
+ op_ea_seg = &_ds;
+ op_ssegs = 1;
+ break;
+ case 0x64: /*FS:*/
+ op_ea_seg = &_fs;
+ op_ssegs = 1;
+ break;
+ case 0x65: /*GS:*/
+ op_ea_seg = &_gs;
+ op_ssegs = 1;
+ break;
+
+ case 0x66: /*Data size select*/
+ op_32 = ((use32 & 0x100) ^ 0x100) | (op_32 & 0x200);
+ break;
+ case 0x67: /*Address size select*/
+ op_32 = ((use32 & 0x200) ^ 0x200) | (op_32 & 0x100);
+ break;
+
+ case 0xd8:
+ op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_d8_a32 : x86_dynarec_opcodes_d8_a16;
+ recomp_op_table = recomp_opcodes_d8;
+ opcode_shift = 3;
+ opcode_mask = 0x1f;
+ over = 1;
+ pc_off = -1;
+ test_modrm = 0;
+ block->flags |= CODEBLOCK_HAS_FPU;
+ break;
+ case 0xd9:
+ op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_d9_a32 : x86_dynarec_opcodes_d9_a16;
+ recomp_op_table = recomp_opcodes_d9;
+ opcode_mask = 0xff;
+ over = 1;
+ pc_off = -1;
+ test_modrm = 0;
+ block->flags |= CODEBLOCK_HAS_FPU;
+ break;
+ case 0xda:
+ op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_da_a32 : x86_dynarec_opcodes_da_a16;
+ recomp_op_table = recomp_opcodes_da;
+ opcode_mask = 0xff;
+ over = 1;
+ pc_off = -1;
+ test_modrm = 0;
+ block->flags |= CODEBLOCK_HAS_FPU;
+ break;
+ case 0xdb:
+ op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_db_a32 : x86_dynarec_opcodes_db_a16;
+ recomp_op_table = recomp_opcodes_db;
+ opcode_mask = 0xff;
+ over = 1;
+ pc_off = -1;
+ test_modrm = 0;
+ block->flags |= CODEBLOCK_HAS_FPU;
+ break;
+ case 0xdc:
+ op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_dc_a32 : x86_dynarec_opcodes_dc_a16;
+ recomp_op_table = recomp_opcodes_dc;
+ opcode_shift = 3;
+ opcode_mask = 0x1f;
+ over = 1;
+ pc_off = -1;
+ test_modrm = 0;
+ block->flags |= CODEBLOCK_HAS_FPU;
+ break;
+ case 0xdd:
+ op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_dd_a32 : x86_dynarec_opcodes_dd_a16;
+ recomp_op_table = recomp_opcodes_dd;
+ opcode_mask = 0xff;
+ over = 1;
+ pc_off = -1;
+ test_modrm = 0;
+ block->flags |= CODEBLOCK_HAS_FPU;
+ break;
+ case 0xde:
+ op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_de_a32 : x86_dynarec_opcodes_de_a16;
+ recomp_op_table = recomp_opcodes_de;
+ opcode_mask = 0xff;
+ over = 1;
+ pc_off = -1;
+ test_modrm = 0;
+ block->flags |= CODEBLOCK_HAS_FPU;
+ break;
+ case 0xdf:
+ op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_df_a32 : x86_dynarec_opcodes_df_a16;
+ recomp_op_table = recomp_opcodes_df;
+ opcode_mask = 0xff;
+ over = 1;
+ pc_off = -1;
+ test_modrm = 0;
+ block->flags |= CODEBLOCK_HAS_FPU;
+ break;
+
+ case 0xf0: /*LOCK*/
+ break;
+
+ default:
+ goto generate_call;
+ }
+ fetchdat = fastreadl(cs + op_pc);
+ codegen_timing_prefix(opcode, fetchdat);
+ if (cpu_state.abrt)
+ return;
+ opcode = fetchdat & 0xff;
+ if (!pc_off)
+ fetchdat >>= 8;
+
+ op_pc++;
+ }
+
+generate_call:
+ codegen_timing_opcode(opcode, fetchdat, op_32);
+
+ if ((op_table == x86_dynarec_opcodes &&
+ ((opcode & 0xf0) == 0x70 || (opcode & 0xfc) == 0xe0 || opcode == 0xc2 ||
+ (opcode & 0xfe) == 0xca || (opcode & 0xfc) == 0xcc || (opcode & 0xfc) == 0xe8 ||
+ (opcode == 0xff && ((fetchdat & 0x38) >= 0x10 && (fetchdat & 0x38) < 0x30)))) ||
+ (op_table == x86_dynarec_opcodes_0f && ((opcode & 0xf0) == 0x80)))
+ {
+ /*Opcode is likely to cause block to exit, update cycle count*/
+ if (codegen_block_cycles)
+ {
+ addbyte(0x81); /*SUB $codegen_block_cycles, cyclcs*/
+ addbyte(0x6d);
+ addbyte((uint8_t)cpu_state_offset(_cycles));
+ addlong(codegen_block_cycles);
+ codegen_block_cycles = 0;
+ }
+ if (codegen_block_ins)
+ {
+ addbyte(0x81); /*ADD $codegen_block_ins,ins*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(cpu_recomp_ins));
+ addlong(codegen_block_ins);
+ codegen_block_ins = 0;
+ }
+#if 0
+ if (codegen_block_full_ins)
+ {
+ addbyte(0x81); /*ADD $codegen_block_ins,ins*/
+ addbyte(0x05);
+ addlong((uint32_t)&cpu_recomp_full_ins);
+ addlong(codegen_block_full_ins);
+ codegen_block_full_ins = 0;
+ }
+#endif
+ }
+
+ if (recomp_op_table && recomp_op_table[(opcode | op_32) & 0x1ff])
+ {
+ uint32_t new_pc = recomp_op_table[(opcode | op_32) & 0x1ff](opcode, fetchdat, op_32, op_pc, block);
+ if (new_pc)
+ {
+ if (new_pc != -1)
+ STORE_IMM_ADDR_L((uintptr_t)&cpu_state.pc, new_pc);
+
+ codegen_block_ins++;
+ block->ins++;
+ codegen_block_full_ins++;
+ codegen_endpc = (cs + cpu_state.pc) + 8;
+
+ return;
+ }
+ }
+
+ op = op_table[((opcode >> opcode_shift) | op_32) & opcode_mask];
+// if (output)
+// pclog("Generate call at %08X %02X %08X %02X %08X %08X %08X %08X %08X %02X %02X %02X %02X\n", &codeblock[block_current][block_pos], opcode, new_pc, ram[old_pc], EAX, EBX, ECX, EDX, ESI, ram[0x7bd2+6],ram[0x7bd2+7],ram[0x7bd2+8],ram[0x7bd2+9]);
+ if (op_ssegs != last_ssegs)
+ {
+ last_ssegs = op_ssegs;
+
+ addbyte(0xC6); /*MOVB [ssegs],op_ssegs*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ssegs));
+ addbyte(op_pc + pc_off);
+ }
+
+ if (!test_modrm ||
+ (op_table == x86_dynarec_opcodes && opcode_modrm[opcode]) ||
+ (op_table == x86_dynarec_opcodes_0f && opcode_0f_modrm[opcode]))
+ {
+ int stack_offset = 0;
+
+ if (op_table == x86_dynarec_opcodes && opcode == 0x8f) /*POP*/
+ stack_offset = (op_32 & 0x100) ? 4 : 2;
+
+ cpu_mod = (fetchdat >> 6) & 3;
+ cpu_reg = (fetchdat >> 3) & 7;
+ cpu_rm = fetchdat & 7;
+
+ addbyte(0xC7); /*MOVL $rm | mod | reg,(rm_mod_reg_data)*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(rm_data.rm_mod_reg_data));
+ addlong(cpu_rm | (cpu_mod << 8) | (cpu_reg << 16));
+
+ op_pc += pc_off;
+ if (cpu_mod != 3 && !(op_32 & 0x200))
+ op_ea_seg = codegen_generate_ea_16_long(op_ea_seg, fetchdat, op_ssegs, &op_pc);
+ if (cpu_mod != 3 && (op_32 & 0x200))
+ op_ea_seg = codegen_generate_ea_32_long(op_ea_seg, fetchdat, op_ssegs, &op_pc, stack_offset);
+ op_pc -= pc_off;
+ }
+
+ if (op_ea_seg != last_ea_seg)
+ {
+ last_ea_seg = op_ea_seg;
+ addbyte(0xC7); /*MOVL $&_ds,(ea_seg)*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(ea_seg));
+ addlong((uint32_t)op_ea_seg);
+ }
+
+ addbyte(0xC7); /*MOVL pc,new_pc*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(pc));
+ addlong(op_pc + pc_off);
+
+ addbyte(0xC7); /*MOVL $old_pc,(oldpc)*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(oldpc));
+ addlong(old_pc);
+
+ if (op_32 != last_op32)
+ {
+ last_op32 = op_32;
+ addbyte(0xC7); /*MOVL $use32,(op32)*/
+ addbyte(0x45);
+ addbyte((uint8_t)cpu_state_offset(op32));
+ addlong(op_32);
+ }
+
+ addbyte(0xC7); /*MOVL $fetchdat,(%esp)*/
+ addbyte(0x04);
+ addbyte(0x24);
+ addlong(fetchdat);
+
+ addbyte(0xE8); /*CALL*/
+ addlong(((uint8_t *)op - (uint8_t *)(&block->data[block_pos + 4])));
+
+ codegen_block_ins++;
+
+ block->ins++;
+
+ addbyte(0x09); /*OR %eax, %eax*/
+ addbyte(0xc0);
+ addbyte(0x0F); addbyte(0x85); /*JNZ 0*/
+ addlong((uint32_t)&block->data[BLOCK_EXIT_OFFSET] - (uint32_t)(&block->data[block_pos + 4]));
+
+// addbyte(0xE8); /*CALL*/
+// addlong(((uint8_t *)codegen_debug - (uint8_t *)(&block->data[block_pos + 4])));
+
+ codegen_endpc = (cs + cpu_state.pc) + 8;
+}
+
+#endif
diff --git a/src/codegen_x86.h b/src/codegen_x86.h
new file mode 100644
index 0000000..c01608e
--- /dev/null
+++ b/src/codegen_x86.h
@@ -0,0 +1,42 @@
+#define BLOCK_SIZE 0x4000
+#define BLOCK_MASK 0x3fff
+#define BLOCK_START 0
+
+#define HASH_SIZE 0x20000
+#define HASH_MASK 0x1ffff
+
+#define HASH(l) ((l) & 0x1ffff)
+
+#define BLOCK_EXIT_OFFSET 0x7f0
+#define BLOCK_GPF_OFFSET (BLOCK_EXIT_OFFSET - 20)
+
+#define BLOCK_MAX 1720
+
+enum
+{
+ OP_RET = 0xc3
+};
+
+#define NR_HOST_REGS 4
+extern int host_reg_mapping[NR_HOST_REGS];
+#define NR_HOST_XMM_REGS 7
+extern int host_reg_xmm_mapping[NR_HOST_XMM_REGS];
+
+extern uint32_t mem_load_addr_ea_b;
+extern uint32_t mem_load_addr_ea_w;
+extern uint32_t mem_load_addr_ea_l;
+extern uint32_t mem_load_addr_ea_q;
+extern uint32_t mem_store_addr_ea_b;
+extern uint32_t mem_store_addr_ea_w;
+extern uint32_t mem_store_addr_ea_l;
+extern uint32_t mem_store_addr_ea_q;
+
+extern uint32_t mem_load_addr_ea_b_no_abrt;
+extern uint32_t mem_store_addr_ea_b_no_abrt;
+extern uint32_t mem_load_addr_ea_w_no_abrt;
+extern uint32_t mem_store_addr_ea_w_no_abrt;
+extern uint32_t mem_load_addr_ea_l_no_abrt;
+extern uint32_t mem_store_addr_ea_l_no_abrt;
+extern uint32_t mem_check_write;
+extern uint32_t mem_check_write_w;
+extern uint32_t mem_check_write_l;
diff --git a/src/config.c b/src/config.c
index b880aab..ca2a184 100644
--- a/src/config.c
+++ b/src/config.c
@@ -5,7 +5,6 @@
#include "config.h"
char config_file_default[256];
-char config_name[256];
static char config_file[256];
@@ -99,43 +98,6 @@ void config_free(int is_global)
}
}
-int config_free_section(int is_global, char *name)
-{
- section_t *current_section, *prev_section;
- list_t *head = is_global ? &global_config_head : &machine_config_head;
- current_section = (section_t *)head->next;
- prev_section = 0;
-
- while (current_section)
- {
- section_t *next_section = (section_t *)current_section->list.next;
- if (!strcmp(current_section->name, name))
- {
- entry_t *current_entry;
-
- current_entry = (entry_t *)current_section->entry_head.next;
-
- while (current_entry)
- {
- entry_t *next_entry = (entry_t *)current_entry->list.next;
-
- free(current_entry);
- current_entry = next_entry;
- }
-
- free(current_section);
- if (!prev_section)
- head->next = (list_t*)next_section;
- else
- prev_section->list.next = (list_t*)next_section;
- return 1;
- }
- prev_section = current_section;
- current_section = next_section;
- }
- return 0;
-}
-
void config_load(int is_global, char *fn)
{
FILE *f = fopen(fn, "rt");
@@ -228,6 +190,8 @@ void config_load(int is_global, char *fn)
}
fclose(f);
+
+ config_dump(is_global);
}
@@ -317,27 +281,6 @@ int config_get_int(int is_global, char *head, char *name, int def)
return value;
}
-float config_get_float(int is_global, char *head, char *name, float def)
-{
- section_t *section;
- entry_t *entry;
- float value;
-
- section = find_section(head, is_global);
-
- if (!section)
- return def;
-
- entry = find_entry(section, name);
-
- if (!entry)
- return def;
-
- sscanf(entry->data, "%f", &value);
-
- return value;
-}
-
char *config_get_string(int is_global, char *head, char *name, char *def)
{
section_t *section;
@@ -374,24 +317,6 @@ void config_set_int(int is_global, char *head, char *name, int val)
sprintf(entry->data, "%i", val);
}
-void config_set_float(int is_global, char *head, char *name, float val)
-{
- section_t *section;
- entry_t *entry;
-
- section = find_section(head, is_global);
-
- if (!section)
- section = create_section(head, is_global);
-
- entry = find_entry(section, name);
-
- if (!entry)
- entry = create_entry(section, name);
-
- sprintf(entry->data, "%f", val);
-}
-
void config_set_string(int is_global, char *head, char *name, char *val)
{
section_t *section;
@@ -428,26 +353,11 @@ void append_filename(char *dest, char *s1, char *s2, int size)
sprintf(dest, "%s%s", s1, s2);
}
-void append_slash(char *s, int size)
-{
- int c = strlen(s)-1;
- if (s[c] != '/' && s[c] != '\\')
- {
- if (c < size-2)
- strcat(s, "/");
- else
- s[c] = '/';
- }
-}
-
void put_backslash(char *s)
{
int c = strlen(s) - 1;
if (s[c] != '/' && s[c] != '\\')
- {
- s[c+1] = '/';
- s[c+2] = 0;
- }
+ s[c] = '/';
}
char *get_extension(char *s)
diff --git a/src/config.h b/src/config.h
index dd2dceb..23b0a48 100644
--- a/src/config.h
+++ b/src/config.h
@@ -1,17 +1,10 @@
-float config_get_float(int is_global, char *head, char *name, float def);
int config_get_int(int is_global, char *head, char *name, int def);
char *config_get_string(int is_global, char *head, char *name, char *def);
-void config_set_float(int is_global, char *head, char *name, float val);
void config_set_int(int is_global, char *head, char *name, int val);
void config_set_string(int is_global, char *head, char *name, char *val);
-int config_free_section(int is_global, char *head);
-
-void add_config_callback(void(*loadconfig)(), void(*saveconfig)(), void(*onloaded)());
-
char *get_filename(char *s);
void append_filename(char *dest, char *s1, char *s2, int size);
-void append_slash(char *s, int size);
void put_backslash(char *s);
char *get_extension(char *s);
@@ -21,7 +14,6 @@ void config_dump(int is_global);
void config_free(int is_global);
extern char config_file_default[256];
-extern char config_name[256];
#define CFG_MACHINE 0
#define CFG_GLOBAL 1
diff --git a/src/cpu.c b/src/cpu.c
index 99c0c8b..540ba2d 100644
--- a/src/cpu.c
+++ b/src/cpu.c
@@ -6,16 +6,8 @@
#include "mem.h"
#include "pci.h"
#include "codegen.h"
-#include "x87_timings.h"
-
-int fpu_type;
-uint32_t cpu_features;
-
-static int cpu_turbo_speed, cpu_nonturbo_speed;
-static int cpu_turbo = 1;
int isa_cycles;
-int has_vlb;
static uint8_t ccr0, ccr1, ccr2, ccr3, ccr4, ccr5, ccr6;
OpFn *x86_dynarec_opcodes;
@@ -36,9 +28,6 @@ OpFn *x86_dynarec_opcodes_de_a16;
OpFn *x86_dynarec_opcodes_de_a32;
OpFn *x86_dynarec_opcodes_df_a16;
OpFn *x86_dynarec_opcodes_df_a32;
-OpFn *x86_dynarec_opcodes_REPE;
-OpFn *x86_dynarec_opcodes_REPNE;
-OpFn *x86_dynarec_opcodes_3DNOW;
OpFn *x86_opcodes;
OpFn *x86_opcodes_0f;
@@ -58,48 +47,36 @@ OpFn *x86_opcodes_de_a16;
OpFn *x86_opcodes_de_a32;
OpFn *x86_opcodes_df_a16;
OpFn *x86_opcodes_df_a32;
-OpFn *x86_opcodes_REPE;
-OpFn *x86_opcodes_REPNE;
-OpFn *x86_opcodes_3DNOW;
enum
{
CPUID_FPU = (1 << 0),
- CPUID_VME = (1 << 1),
- CPUID_PSE = (1 << 3),
CPUID_TSC = (1 << 4),
CPUID_MSR = (1 << 5),
CPUID_CMPXCHG8B = (1 << 8),
- CPUID_SEP = (1 << 11),
CPUID_CMOV = (1 << 15),
CPUID_MMX = (1 << 23)
};
-/*Addition flags returned by CPUID function 0x80000001*/
-enum
-{
- CPUID_3DNOW = (1 << 31)
-};
-
int cpu = 3, cpu_manufacturer = 0;
CPU *cpu_s;
int cpu_multi;
int cpu_iscyrix;
int cpu_16bitbus;
int cpu_busspeed;
+int cpu_hasrdtsc;
+int cpu_hasMMX, cpu_hasMSR;
+int cpu_hasCR4;
int cpu_use_dynarec;
-int cpu_cyrix_alignment;
uint64_t cpu_CR4_mask;
int cpu_cycles_read, cpu_cycles_read_l, cpu_cycles_write, cpu_cycles_write_l;
-int cpu_prefetch_cycles, cpu_prefetch_width, cpu_mem_prefetch_cycles, cpu_rom_prefetch_cycles;
+int cpu_prefetch_cycles, cpu_prefetch_width;
int cpu_waitstates;
int cpu_cache_int_enabled, cpu_cache_ext_enabled;
int is386;
-int is486;
-int CPUID;
uint64_t tsc = 0;
@@ -113,7 +90,6 @@ int timing_iret_rm, timing_iret_v86, timing_iret_pm, timing_iret_pm_outer;
int timing_call_rm, timing_call_pm, timing_call_pm_gate, timing_call_pm_gate_inner;
int timing_retf_rm, timing_retf_pm, timing_retf_pm_outer;
int timing_jmp_rm, timing_jmp_pm, timing_jmp_pm_gate;
-int timing_misaligned;
static struct
{
@@ -123,64 +99,356 @@ static struct
uint64_t fcr2, fcr3;
} msr;
+/*Available cpuspeeds :
+ 0 = 16 MHz
+ 1 = 20 MHz
+ 2 = 25 MHz
+ 3 = 33 MHz
+ 4 = 40 MHz
+ 5 = 50 MHz
+ 6 = 66 MHz
+ 7 = 75 MHz
+ 8 = 80 MHz
+ 9 = 90 MHz
+ 10 = 100 MHz
+ 11 = 120 MHz
+ 12 = 133 MHz
+ 13 = 150 MHz
+ 14 = 160 MHz
+ 15 = 166 MHz
+ 16 = 180 MHz
+ 17 = 200 MHz
+*/
+
+CPU cpus_8088[] =
+{
+ /*8088 standard*/
+ {"8088/4.77", CPU_8088, 0, 4772728, 1, 0, 0, 0, 0, 0, 0,0,0,0},
+ {"8088/7.16", CPU_8088, 1, 14318184/2, 1, 0, 0, 0, 0, 0, 0,0,0,0},
+ {"8088/8", CPU_8088, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
+ {"8088/10", CPU_8088, 2, 10000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
+ {"8088/12", CPU_8088, 3, 12000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
+ {"8088/16", CPU_8088, 4, 16000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
+ {"", -1, 0, 0, 0, 0}
+};
+
+CPU cpus_pcjr[] =
+{
+ /*8088 PCjr*/
+ {"8088/4.77", CPU_8088, 0, 4772728, 1, 0, 0, 0, 0, 0, 0,0,0,0},
+ {"", -1, 0, 0, 0, 0}
+};
+
+CPU cpus_8086[] =
+{
+ /*8086 standard*/
+ {"8086/7.16", CPU_8086, 1, 14318184/2, 1, 0, 0, 0, 0, 0, 0,0,0,0},
+ {"8086/8", CPU_8086, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
+ {"8086/9.54", CPU_8086, 1, 4772728*2, 1, 0, 0, 0, 0, 0, 0,0,0,0},
+ {"8086/10", CPU_8086, 2, 10000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
+ {"8086/12", CPU_8086, 3, 12000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
+ {"8086/16", CPU_8086, 4, 16000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
+ {"", -1, 0, 0, 0, 0}
+};
+
+CPU cpus_pc1512[] =
+{
+ /*8086 Amstrad*/
+ {"8086/8", CPU_8086, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
+ {"", -1, 0, 0, 0, 0}
+};
+
+CPU cpus_286[] =
+{
+ /*286*/
+ {"286/6", CPU_286, 0, 6000000, 1, 0, 0, 0, 0, 0, 2,2,2,2},
+ {"286/8", CPU_286, 1, 8000000, 1, 0, 0, 0, 0, 0, 2,2,2,2},
+ {"286/10", CPU_286, 2, 10000000, 1, 0, 0, 0, 0, 0, 2,2,2,2},
+ {"286/12", CPU_286, 3, 12000000, 1, 0, 0, 0, 0, 0, 3,3,3,3},
+ {"286/16", CPU_286, 4, 16000000, 1, 0, 0, 0, 0, 0, 3,3,3,3},
+ {"286/20", CPU_286, 5, 20000000, 1, 0, 0, 0, 0, 0, 4,4,4,4},
+ {"286/25", CPU_286, 6, 25000000, 1, 0, 0, 0, 0, 0, 4,4,4,4},
+ {"", -1, 0, 0, 0, 0}
+};
+
+CPU cpus_ibmat[] =
+{
+ /*286*/
+ {"286/6", CPU_286, 0, 6000000, 1, 0, 0, 0, 0, 0, 3,3,3,3},
+ {"286/8", CPU_286, 0, 8000000, 1, 0, 0, 0, 0, 0, 3,3,3,3},
+ {"", -1, 0, 0, 0, 0}
+};
+
+CPU cpus_ps1_m2011[] =
+{
+ /*286*/
+ {"286/10", CPU_286, 2, 10000000, 1, 0, 0, 0, 0, 0, 2,2,2,2},
+ {"", -1, 0, 0, 0, 0}
+};
+
+CPU cpus_ps2_m30_286[] =
+{
+ /*286*/
+ {"286/10", CPU_286, 2, 10000000, 1, 0, 0, 0, 0, 0, 2,2,2,2},
+ {"286/12", CPU_286, 3, 12000000, 1, 0, 0, 0, 0, 0, 3,3,3,3},
+ {"286/16", CPU_286, 4, 16000000, 1, 0, 0, 0, 0, 0, 3,3,3,3},
+ {"286/20", CPU_286, 5, 20000000, 1, 0, 0, 0, 0, 0, 4,4,4,4},
+ {"286/25", CPU_286, 6, 25000000, 1, 0, 0, 0, 0, 0, 4,4,4,4},
+ {"", -1, 0, 0, 0, 0}
+};
+
+CPU cpus_i386SX[] =
+{
+ /*i386SX*/
+ {"i386SX/16", CPU_386SX, 0, 16000000, 1, 0, 0x2308, 0, 0, 0, 3,3,3,3},
+ {"i386SX/20", CPU_386SX, 1, 20000000, 1, 0, 0x2308, 0, 0, 0, 4,4,3,3},
+ {"i386SX/25", CPU_386SX, 2, 25000000, 1, 0, 0x2308, 0, 0, 0, 4,4,3,3},
+ {"i386SX/33", CPU_386SX, 3, 33333333, 1, 0, 0x2308, 0, 0, 0, 6,6,3,3},
+ {"", -1, 0, 0, 0}
+};
+
+CPU cpus_i386DX[] =
+{
+ /*i386DX*/
+ {"i386DX/16", CPU_386DX, 0, 16000000, 1, 0, 0x0308, 0, 0, 0, 3,3,3,3},
+ {"i386DX/20", CPU_386DX, 1, 20000000, 1, 0, 0x0308, 0, 0, 0, 4,4,3,3},
+ {"i386DX/25", CPU_386DX, 2, 25000000, 1, 0, 0x0308, 0, 0, 0, 4,4,3,3},
+ {"i386DX/33", CPU_386DX, 3, 33333333, 1, 0, 0x0308, 0, 0, 0, 6,6,3,3},
+ {"", -1, 0, 0, 0}
+};
+
+CPU cpus_acer[] =
+{
+ /*i386SX*/
+ {"i386SX/25", CPU_386SX, 2, 25000000, 1, 0, 0x2308, 0, 0, 0, 4,4,4,4},
+ {"", -1, 0, 0, 0}
+};
+
+CPU cpus_Am386SX[] =
+{
+ /*Am386*/
+ {"Am386SX/16", CPU_386SX, 0, 16000000, 1, 0, 0x2308, 0, 0, 0, 3,3,3,3},
+ {"Am386SX/20", CPU_386SX, 1, 20000000, 1, 0, 0x2308, 0, 0, 0, 4,4,3,3},
+ {"Am386SX/25", CPU_386SX, 2, 25000000, 1, 0, 0x2308, 0, 0, 0, 4,4,3,3},
+ {"Am386SX/33", CPU_386SX, 3, 33333333, 1, 0, 0x2308, 0, 0, 0, 6,6,3,3},
+ {"Am386SX/40", CPU_386SX, 4, 40000000, 1, 0, 0x2308, 0, 0, 0, 7,7,3,3},
+ {"", -1, 0, 0, 0}
+};
+
+CPU cpus_Am386DX[] =
+{
+ /*Am386*/
+ {"Am386DX/25", CPU_386DX, 2, 25000000, 1, 0, 0x0308, 0, 0, 0, 4,4,3,3},
+ {"Am386DX/33", CPU_386DX, 3, 33333333, 1, 0, 0x0308, 0, 0, 0, 6,6,3,3},
+ {"Am386DX/40", CPU_386DX, 4, 40000000, 1, 0, 0x0308, 0, 0, 0, 7,7,3,3},
+ {"", -1, 0, 0, 0}
+};
+
+CPU cpus_486SLC[] =
+{
+ /*Cx486SLC*/
+ {"Cx486SLC/20", CPU_486SLC, 1, 20000000, 1, 0, 0x400, 0, 0x0000, 0, 4,4,3,3},
+ {"Cx486SLC/25", CPU_486SLC, 2, 25000000, 1, 0, 0x400, 0, 0x0000, 0, 4,4,3,3},
+ {"Cx486SLC/33", CPU_486SLC, 3, 33333333, 1, 0, 0x400, 0, 0x0000, 0, 6,6,3,3},
+ {"Cx486SRx2/32", CPU_486SLC, 3, 32000000, 2, 0, 0x406, 0, 0x0006, 0, 6,6,6,6},
+ {"Cx486SRx2/40", CPU_486SLC, 4, 40000000, 2, 0, 0x406, 0, 0x0006, 0, 8,8,6,6},
+ {"Cx486SRx2/50", CPU_486SLC, 5, 50000000, 2, 0, 0x406, 0, 0x0006, 0, 8,8,6,6},
+ {"", -1, 0, 0, 0}
+};
+
+CPU cpus_486DLC[] =
+{
+ /*Cx486DLC*/
+ {"Cx486DLC/25", CPU_486DLC, 2, 25000000, 1, 0, 0x401, 0, 0x0001, 0, 4,4,3,3},
+ {"Cx486DLC/33", CPU_486DLC, 3, 33333333, 1, 0, 0x401, 0, 0x0001, 0, 6,6,3,3},
+ {"Cx486DLC/40", CPU_486DLC, 4, 40000000, 1, 0, 0x401, 0, 0x0001, 0, 7,7,3,3},
+ {"Cx486DRx2/32", CPU_486DLC, 3, 32000000, 2, 0, 0x407, 0, 0x0007, 0, 6,6,6,6},
+ {"Cx486DRx2/40", CPU_486DLC, 4, 40000000, 2, 0, 0x407, 0, 0x0007, 0, 8,8,6,6},
+ {"Cx486DRx2/50", CPU_486DLC, 5, 50000000, 2, 0, 0x407, 0, 0x0007, 0, 8,8,6,6},
+ {"Cx486DRx2/66", CPU_486DLC, 6, 66666666, 2, 0, 0x407, 0, 0x0007, 0, 12,12,6,6},
+ {"", -1, 0, 0, 0}
+};
+
+CPU cpus_i486[] =
+{
+ /*i486*/
+ {"i486SX/16", CPU_i486SX, 0, 16000000, 1, 16000000, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 3,3,3,3},
+ {"i486SX/20", CPU_i486SX, 1, 20000000, 1, 20000000, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 4,4,3,3},
+ {"i486SX/25", CPU_i486SX, 2, 25000000, 1, 25000000, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 4,4,3,3},
+ {"i486SX/33", CPU_i486SX, 3, 33333333, 1, 33333333, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3},
+ {"i486SX2/50", CPU_i486SX, 5, 50000000, 2, 25000000, 0x45b, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6},
+ {"i486DX/25", CPU_i486DX, 2, 25000000, 1, 25000000, 0x404, 0, 0, CPU_SUPPORTS_DYNAREC, 4,4,3,3},
+ {"i486DX/33", CPU_i486DX, 3, 33333333, 1, 33333333, 0x404, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3},
+ {"i486DX/50", CPU_i486DX, 5, 50000000, 1, 25000000, 0x404, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,4,4},
+ {"i486DX2/40", CPU_i486DX, 4, 40000000, 2, 20000000, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6},
+ {"i486DX2/50", CPU_i486DX, 5, 50000000, 2, 25000000, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6},
+ {"i486DX2/66", CPU_i486DX, 6, 66666666, 2, 33333333, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6},
+ {"iDX4/75", CPU_i486DX, 7, 75000000, 3, 25000000, 0x481, 0x481, 0, CPU_SUPPORTS_DYNAREC, 12,12,9,9}, /*CPUID available on DX4, >= 75 MHz*/
+ {"iDX4/100", CPU_i486DX,10, 100000000, 3, 33333333, 0x481, 0x481, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9}, /*Is on some real Intel DX2s, limit here is pretty arbitary*/
+ {"Pentium OverDrive/63", CPU_PENTIUM, 6, 62500000, 3, 25000000, 0x1531, 0x1531, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,7,7},
+ {"Pentium OverDrive/83", CPU_PENTIUM, 8, 83333333, 3, 33333333, 0x1532, 0x1532, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,8,8},
+ {"", -1, 0, 0, 0}
+};
+
+CPU cpus_Am486[] =
+{
+ /*Am486/5x86*/
+ {"Am486SX/33", CPU_Am486SX, 3, 33333333, 1, 33333333, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3},
+ {"Am486SX/40", CPU_Am486SX, 4, 40000000, 1, 20000000, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 7,7,3,3},
+ {"Am486SX2/50", CPU_Am486SX, 5, 50000000, 2, 25000000, 0x45b, 0x45b, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6}, /*CPUID available on SX2, DX2, DX4, 5x86, >= 50 MHz*/
+ {"Am486SX2/66", CPU_Am486SX, 6, 66666666, 2, 33333333, 0x45b, 0x45b, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6}, /*Isn't on all real AMD SX2s and DX2s, availability here is pretty arbitary (and distinguishes them from the Intel chips)*/
+ {"Am486DX/33", CPU_Am486DX, 3, 33333333, 1, 33333333, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3},
+ {"Am486DX/40", CPU_Am486DX, 4, 40000000, 1, 20000000, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 7,7,3,3},
+ {"Am486DX2/50", CPU_Am486DX, 5, 50000000, 2, 25000000, 0x470, 0x470, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6},
+ {"Am486DX2/66", CPU_Am486DX, 6, 66666666, 2, 33333333, 0x470, 0x470, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6},
+ {"Am486DX2/80", CPU_Am486DX, 8, 80000000, 2, 20000000, 0x470, 0x470, 0, CPU_SUPPORTS_DYNAREC, 14,14,6,6},
+ {"Am486DX4/75", CPU_Am486DX, 7, 75000000, 3, 25000000, 0x482, 0x482, 0, CPU_SUPPORTS_DYNAREC, 12,12,9,9},
+ {"Am486DX4/90", CPU_Am486DX, 9, 90000000, 3, 30000000, 0x482, 0x482, 0, CPU_SUPPORTS_DYNAREC, 15,15,9,9},
+ {"Am486DX4/100", CPU_Am486DX, 10, 100000000, 3, 33333333, 0x482, 0x482, 0, CPU_SUPPORTS_DYNAREC, 15,15,9,9},
+ {"Am486DX4/120", CPU_Am486DX, 11, 120000000, 3, 20000000, 0x482, 0x482, 0, CPU_SUPPORTS_DYNAREC, 21,21,9,9},
+ {"Am5x86/P75", CPU_Am486DX, 12, 133333333, 4, 33333333, 0x4e0, 0x4e0, 0, CPU_SUPPORTS_DYNAREC, 24,24,12,12},
+ {"Am5x86/P75+", CPU_Am486DX, 13, 160000000, 4, 20000000, 0x4e0, 0x4e0, 0, CPU_SUPPORTS_DYNAREC, 28,28,12,12},
+ {"", -1, 0, 0, 0}
+};
+
+CPU cpus_Cx486[] =
+{
+ /*Cx486/5x86*/
+ {"Cx486S/25", CPU_Cx486S, 2, 25000000, 1, 25000000, 0x420, 0, 0x0010, CPU_SUPPORTS_DYNAREC, 4,4,3,3},
+ {"Cx486S/33", CPU_Cx486S, 3, 33333333, 1, 33333333, 0x420, 0, 0x0010, CPU_SUPPORTS_DYNAREC, 6,6,3,3},
+ {"Cx486S/40", CPU_Cx486S, 4, 40000000, 1, 20000000, 0x420, 0, 0x0010, CPU_SUPPORTS_DYNAREC, 7,7,3,3},
+ {"Cx486DX/33", CPU_Cx486DX, 3, 33333333, 1, 33333333, 0x430, 0, 0x051a, CPU_SUPPORTS_DYNAREC, 6,6,3,3},
+ {"Cx486DX/40", CPU_Cx486DX, 4, 40000000, 1, 20000000, 0x430, 0, 0x051a, CPU_SUPPORTS_DYNAREC, 7,7,3,3},
+ {"Cx486DX2/50", CPU_Cx486DX, 5, 50000000, 2, 25000000, 0x430, 0, 0x081b, CPU_SUPPORTS_DYNAREC, 8,8,6,6},
+ {"Cx486DX2/66", CPU_Cx486DX, 6, 66666666, 2, 33333333, 0x430, 0, 0x0b1b, CPU_SUPPORTS_DYNAREC, 12,12,6,6},
+ {"Cx486DX2/80", CPU_Cx486DX, 8, 80000000, 2, 20000000, 0x430, 0, 0x311b, CPU_SUPPORTS_DYNAREC, 14,14,16,16},
+ {"Cx486DX4/75", CPU_Cx486DX, 7, 75000000, 3, 25000000, 0x480, 0, 0x361f, CPU_SUPPORTS_DYNAREC, 12,12,9,9},
+ {"Cx486DX4/100", CPU_Cx486DX, 10, 100000000, 3, 33333333, 0x480, 0, 0x361f, CPU_SUPPORTS_DYNAREC, 15,15,9,9},
+ {"Cx5x86/100", CPU_Cx5x86, 10, 100000000, 3, 33333333, 0x480, 0, 0x002f, CPU_SUPPORTS_DYNAREC, 15,15,9,9},
+ {"Cx5x86/120", CPU_Cx5x86, 11, 120000000, 3, 20000000, 0x480, 0, 0x002f, CPU_SUPPORTS_DYNAREC, 21,21,9,9},
+ {"Cx5x86/133", CPU_Cx5x86, 12, 133333333, 4, 33333333, 0x480, 0, 0x002f, CPU_SUPPORTS_DYNAREC, 24,24,12,12},
+ {"", -1, 0, 0, 0}
+};
+
+ CPU cpus_6x86[] =
+ {
+ /*Cyrix 6x86*/
+ {"6x86-P90", CPU_Cx6x86, 17, 80000000, 3, 40000000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 8,8,6,6},
+ {"6x86-PR120+", CPU_Cx6x86, 17, 100000000, 3, 25000000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6},
+ {"6x86-PR133+", CPU_Cx6x86, 17, 110000000, 3, 27500000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6},
+ {"6x86-PR150+", CPU_Cx6x86, 17, 120000000, 3, 30000000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
+ {"6x86-PR166+", CPU_Cx6x86, 17, 133333333, 3, 33333333, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
+ {"6x86-PR200+", CPU_Cx6x86, 17, 150000000, 3, 37500000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
+
+ /*Cyrix 6x86L*/
+ {"6x86L-PR133+", CPU_Cx6x86L, 19, 110000000, 3, 27500000, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6},
+ {"6x86L-PR150+", CPU_Cx6x86L, 19, 120000000, 3, 30000000, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
+ {"6x86L-PR166+", CPU_Cx6x86L, 19, 133333333, 3, 33333333, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
+ {"6x86L-PR200+", CPU_Cx6x86L, 19, 150000000, 3, 37500000, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
+
+ /*Cyrix 6x86MX*/
+ {"6x86MX-PR166", CPU_Cx6x86MX, 18, 133333333, 3, 33333333, 0x600, 0x600, 0x0451, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
+ {"6x86MX-PR200", CPU_Cx6x86MX, 18, 166666666, 3, 33333333, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
+ {"6x86MX-PR233", CPU_Cx6x86MX, 18, 188888888, 3, 37500000, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
+ {"6x86MX-PR266", CPU_Cx6x86MX, 18, 207500000, 3, 41666667, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 17,17,7,7},
+ {"6x86MX-PR300", CPU_Cx6x86MX, 18, 233333333, 3, 33333333, 0x600, 0x600, 0x0454, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,7,7},
+ {"6x86MX-PR333", CPU_Cx6x86MX, 18, 250000000, 3, 41666667, 0x600, 0x600, 0x0453, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 20,20,9,9},
+ {"6x86MX-PR366", CPU_Cx6x86MX, 18, 250000000, 3, 33333333, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12},
+ {"6x86MX-PR400", CPU_Cx6x86MX, 18, 285000000, 3, 31666667, 0x600, 0x600, 0x0453, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
+ {"", -1, 0, 0, 0}
+ };
+
+
+
+CPU cpus_WinChip[] =
+{
+ /*IDT WinChip*/
+ {"WinChip 75", CPU_WINCHIP, 7, 75000000, 2, 25000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 8,8,4,4},
+ {"WinChip 90", CPU_WINCHIP, 9, 90000000, 2, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 9,9,4,4},
+ {"WinChip 100", CPU_WINCHIP, 10, 100000000, 2, 33333333, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 9,9,4,4},
+ {"WinChip 120", CPU_WINCHIP, 11, 120000000, 2, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6},
+ {"WinChip 133", CPU_WINCHIP, 12, 133333333, 2, 33333333, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6},
+ {"WinChip 150", CPU_WINCHIP, 13, 150000000, 3, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 15,15,7,7},
+ {"WinChip 166", CPU_WINCHIP, 15, 166666666, 3, 33333333, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 15,15,7,7},
+ {"WinChip 180", CPU_WINCHIP, 16, 180000000, 3, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9},
+ {"WinChip 200", CPU_WINCHIP, 17, 200000000, 3, 33333333, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9},
+ {"WinChip 225", CPU_WINCHIP, 17, 225000000, 3, 37500000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9},
+ {"WinChip 240", CPU_WINCHIP, 17, 240000000, 6, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 24,24,12,12},
+ {"", -1, 0, 0, 0}
+};
+
+CPU cpus_Pentium5V[] =
+{
+ /*Intel Pentium (5V, socket 4)*/
+ {"Pentium 60", CPU_PENTIUM, 6, 60000000, 1, 30000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3},
+ {"Pentium 66", CPU_PENTIUM, 6, 66666666, 1, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3},
+ {"Pentium OverDrive 120",CPU_PENTIUM, 14, 120000000, 2, 30000000, 0x51A, 0x51A, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
+ {"Pentium OverDrive 133",CPU_PENTIUM, 16, 133333333, 2, 33333333, 0x51A, 0x51A, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
+ {"", -1, 0, 0, 0}
+};
+
+CPU cpus_PentiumS5[] =
+{
+ /*Intel Pentium (Socket 5)*/
+ {"Pentium 75", CPU_PENTIUM, 9, 75000000, 2, 25000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
+ {"Pentium 90", CPU_PENTIUM, 12, 90000000, 2, 30000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
+ {"Pentium 100/50", CPU_PENTIUM, 13, 100000000, 2, 25000000, 0x525, 0x525, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6},
+ {"Pentium 100/66", CPU_PENTIUM, 13, 100000000, 2, 33333333, 0x525, 0x525, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
+ {"Pentium 120", CPU_PENTIUM, 14, 120000000, 2, 30000000, 0x526, 0x526, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
+ {"Pentium OverDrive 125",CPU_PENTIUM,15, 125000000, 3, 25000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,7,7},
+ {"Pentium OverDrive 150",CPU_PENTIUM,17, 150000000, 3, 30000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
+ {"Pentium OverDrive 166",CPU_PENTIUM,17, 166666666, 3, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
+ {"Pentium OverDrive MMX 125", CPU_PENTIUMMMX,15,125000000, 3, 25000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,7,7},
+ {"Pentium OverDrive MMX 150/60", CPU_PENTIUMMMX,17,150000000, 3, 30000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
+ {"Pentium OverDrive MMX 166", CPU_PENTIUMMMX,19,166000000, 3, 33333333, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
+ {"Pentium OverDrive MMX 180", CPU_PENTIUMMMX,20,180000000, 3, 30000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
+ {"Pentium OverDrive MMX 200", CPU_PENTIUMMMX,21,200000000, 3, 33333333, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
+ {"", -1, 0, 0, 0}
+};
+
+CPU cpus_Pentium[] =
+{
+ /*Intel Pentium*/
+ {"Pentium 75", CPU_PENTIUM, 9, 75000000, 2, 25000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
+ {"Pentium 90", CPU_PENTIUM, 12, 90000000, 2, 30000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
+ {"Pentium 100/50", CPU_PENTIUM, 13, 100000000, 2, 25000000, 0x525, 0x525, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6},
+ {"Pentium 100/66", CPU_PENTIUM, 13, 100000000, 2, 33333333, 0x525, 0x525, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
+ {"Pentium 120", CPU_PENTIUM, 14, 120000000, 2, 30000000, 0x526, 0x526, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
+ {"Pentium 133", CPU_PENTIUM, 16, 133333333, 2, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
+ {"Pentium 150", CPU_PENTIUM, 17, 150000000, 3, 30000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
+ {"Pentium 166", CPU_PENTIUM, 19, 166666666, 3, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
+ {"Pentium 200", CPU_PENTIUM, 21, 200000000, 3, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
+ {"Pentium MMX 166", CPU_PENTIUMMMX, 19, 166666666, 3, 33333333, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
+ {"Pentium MMX 200", CPU_PENTIUMMMX, 21, 200000000, 3, 33333333, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
+ {"Pentium MMX 233", CPU_PENTIUMMMX, 24, 233333333, 4, 33333333, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10},
+ {"Mobile Pentium MMX 120", CPU_PENTIUMMMX, 14, 120000000, 2, 30000000, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
+ {"Mobile Pentium MMX 133", CPU_PENTIUMMMX, 16, 133333333, 2, 33333333, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
+ {"Mobile Pentium MMX 150", CPU_PENTIUMMMX, 17, 150000000, 3, 30000000, 0x544, 0x544, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
+ {"Mobile Pentium MMX 166", CPU_PENTIUMMMX, 19, 166666666, 3, 33333333, 0x544, 0x544, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
+ {"Mobile Pentium MMX 200", CPU_PENTIUMMMX, 21, 200000000, 3, 33333333, 0x581, 0x581, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
+ {"Mobile Pentium MMX 233", CPU_PENTIUMMMX, 24, 233333333, 4, 33333333, 0x581, 0x581, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10},
+ {"Mobile Pentium MMX 266", CPU_PENTIUMMMX, 26, 266666666, 4, 33333333, 0x582, 0x582, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12},
+ {"Mobile Pentium MMX 300", CPU_PENTIUMMMX, 28, 300000000, 5, 33333333, 0x582, 0x582, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13},
+ {"Pentium OverDrive 125",CPU_PENTIUM,15, 125000000, 3, 25000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,7,7},
+ {"Pentium OverDrive 150",CPU_PENTIUM,17, 150000000, 3, 30000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
+ {"Pentium OverDrive 166",CPU_PENTIUM,17, 166666666, 3, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
+ {"Pentium OverDrive MMX 125", CPU_PENTIUMMMX,15,125000000, 3, 25000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,7,7},
+ {"Pentium OverDrive MMX 150/60", CPU_PENTIUMMMX,17,150000000, 3, 30000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
+ {"Pentium OverDrive MMX 166", CPU_PENTIUMMMX,19,166000000, 3, 33333333, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
+ {"Pentium OverDrive MMX 180", CPU_PENTIUMMMX,20,180000000, 3, 30000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
+ {"Pentium OverDrive MMX 200", CPU_PENTIUMMMX,21,200000000, 3, 33333333, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
+ {"", -1, 0, 0, 0}
+};
+
void cpu_set_edx()
{
EDX = models[model].cpu[cpu_manufacturer].cpus[cpu].edx_reset;
}
-int fpu_get_type(int model, int manu, int cpu, const char *internal_name)
-{
- CPU *cpu_s = &models[model].cpu[manu].cpus[cpu];
- const FPU *fpus = cpu_s->fpus;
- int fpu_type = fpus[0].type;
- int c = 0;
-
- while (fpus[c].internal_name)
- {
- if (!strcmp(internal_name, fpus[c].internal_name))
- fpu_type = fpus[c].type;
- c++;
- }
-
- return fpu_type;
-}
-
-const char *fpu_get_internal_name(int model, int manu, int cpu, int type)
-{
- CPU *cpu_s = &models[model].cpu[manu].cpus[cpu];
- const FPU *fpus = cpu_s->fpus;
- int c = 0;
-
- while (fpus[c].internal_name)
- {
- if (fpus[c].type == type)
- return fpus[c].internal_name;
- c++;
- }
-
- return fpus[0].internal_name;
-}
-
-const char *fpu_get_name_from_index(int model, int manu, int cpu, int c)
-{
- CPU *cpu_s = &models[model].cpu[manu].cpus[cpu];
- const FPU *fpus = cpu_s->fpus;
-
- return fpus[c].name;
-}
-
-int fpu_get_type_from_index(int model, int manu, int cpu, int c)
-{
- CPU *cpu_s = &models[model].cpu[manu].cpus[cpu];
- const FPU *fpus = cpu_s->fpus;
-
- return fpus[c].type;
-}
-
-CPU *cpu_s;
-
void cpu_set()
{
+ CPU *cpu_s;
+
if (!models[model].cpu[cpu_manufacturer].cpus)
{
/*CPU is invalid, set to default*/
@@ -195,33 +463,21 @@ void cpu_set()
is8086 = (cpu_s->cpu_type > CPU_8088);
is386 = (cpu_s->cpu_type >= CPU_386SX);
is486 = (cpu_s->cpu_type >= CPU_i486SX) || (cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_486DLC);
- hasfpu = (fpu_type != FPU_NONE);
-
+ hasfpu = (cpu_s->cpu_type >= CPU_i486DX);
cpu_iscyrix = (cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_486DLC || cpu_s->cpu_type == CPU_Cx486S || cpu_s->cpu_type == CPU_Cx486DX || cpu_s->cpu_type == CPU_Cx5x86 || cpu_s->cpu_type == CPU_Cx6x86 || cpu_s->cpu_type == CPU_Cx6x86MX || cpu_s->cpu_type == CPU_Cx6x86L || cpu_s->cpu_type == CPU_CxGX1);
cpu_16bitbus = (cpu_s->cpu_type == CPU_286 || cpu_s->cpu_type == CPU_386SX || cpu_s->cpu_type == CPU_486SLC);
if (cpu_s->multi)
cpu_busspeed = cpu_s->rspeed / cpu_s->multi;
cpu_multi = cpu_s->multi;
+ cpu_hasrdtsc = 0;
+ cpu_hasMMX = 0;
+ cpu_hasMSR = 0;
+ cpu_hasCR4 = 0;
ccr0 = ccr1 = ccr2 = ccr3 = ccr4 = ccr5 = ccr6 = 0;
- has_vlb = (cpu_s->cpu_type >= CPU_i486SX) && (cpu_s->cpu_type <= CPU_Cx5x86);
-
- cpu_turbo_speed = cpu_s->rspeed;
- if (cpu_s->cpu_type < CPU_286)
- cpu_nonturbo_speed = 4772728;
- else if (cpu_s->rspeed < 8000000)
- cpu_nonturbo_speed = cpu_s->rspeed;
- else
- cpu_nonturbo_speed = 8000000;
- cpu_turbo = 1;
cpu_update_waitstates();
-
- isa_cycles = cpu_s->atclk_div;
- if (cpu_s->rspeed <= 8000000)
- cpu_rom_prefetch_cycles = cpu_mem_prefetch_cycles;
- else
- cpu_rom_prefetch_cycles = cpu_s->rspeed / 1000000;
+ isa_cycles = (int)(((int64_t)cpu_s->rspeed << ISA_CYCLES_SHIFT) / 8000000ll);
if (cpu_s->pci_speed)
{
@@ -244,12 +500,6 @@ void cpu_set()
pclog("is486 - %i %i\n",is486,cpu_s->cpu_type);
x86_setopcodes(ops_386, ops_386_0f, dynarec_ops_386, dynarec_ops_386_0f);
- x86_opcodes_REPE = ops_REPE;
- x86_opcodes_REPNE = ops_REPNE;
- x86_opcodes_3DNOW = ops_3DNOW;
- x86_dynarec_opcodes_REPE = dynarec_ops_REPE;
- x86_dynarec_opcodes_REPNE = dynarec_ops_REPNE;
- x86_dynarec_opcodes_3DNOW = dynarec_ops_3DNOW;
if (hasfpu)
{
@@ -331,10 +581,6 @@ void cpu_set()
}
memset(&msr, 0, sizeof(msr));
-
- timing_misaligned = 0;
- cpu_cyrix_alignment = 0;
- cpu_CR4_mask = 0;
switch (cpu_s->cpu_type)
{
@@ -466,7 +712,6 @@ void cpu_set()
timing_jmp_rm = 9;
timing_jmp_pm = 26;
timing_jmp_pm_gate = 37;
- timing_misaligned = 3;
break;
case CPU_486DLC:
@@ -499,12 +744,8 @@ void cpu_set()
timing_jmp_rm = 9;
timing_jmp_pm = 26;
timing_jmp_pm_gate = 37;
- timing_misaligned = 3;
break;
-
- case CPU_iDX4:
- cpu_features = CPU_FEATURE_CR4 | CPU_FEATURE_VME;
- cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_VME;
+
case CPU_i486SX:
case CPU_i486DX:
timing_rr = 1; /*register dest - register src*/
@@ -535,7 +776,6 @@ void cpu_set()
timing_jmp_rm = 17;
timing_jmp_pm = 19;
timing_jmp_pm_gate = 32;
- timing_misaligned = 3;
break;
case CPU_Am486SX:
@@ -569,7 +809,6 @@ void cpu_set()
timing_jmp_rm = 17;
timing_jmp_pm = 19;
timing_jmp_pm_gate = 32;
- timing_misaligned = 3;
break;
case CPU_Cx486S:
@@ -602,7 +841,6 @@ void cpu_set()
timing_jmp_rm = 9;
timing_jmp_pm = 26;
timing_jmp_pm_gate = 37;
- timing_misaligned = 3;
break;
case CPU_Cx5x86:
@@ -634,8 +872,6 @@ void cpu_set()
timing_jmp_rm = 5;
timing_jmp_pm = 7;
timing_jmp_pm_gate = 17;
- timing_misaligned = 2;
- cpu_cyrix_alignment = 1;
break;
case CPU_WINCHIP:
@@ -649,8 +885,10 @@ void cpu_set()
timing_mml = 3;
timing_bt = 3-1; /*branch taken*/
timing_bnt = 1; /*branch not taken*/
- cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MMX | CPU_FEATURE_MSR | CPU_FEATURE_CR4;
- msr.fcr = (1 << 8) | (1 << 16);
+ cpu_hasrdtsc = 1;
+ msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
+ cpu_hasMMX = cpu_hasMSR = 1;
+ cpu_hasCR4 = 1;
cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE | CR4_PCE;
/*unknown*/
timing_int_rm = 26;
@@ -671,49 +909,9 @@ void cpu_set()
timing_jmp_rm = 5;
timing_jmp_pm = 7;
timing_jmp_pm_gate = 17;
- timing_misaligned = 2;
- cpu_cyrix_alignment = 1;
codegen_timing_set(&codegen_timing_winchip);
break;
- case CPU_WINCHIP2:
- x86_setopcodes(ops_386, ops_winchip2_0f, dynarec_ops_386, dynarec_ops_winchip2_0f);
- timing_rr = 1; /*register dest - register src*/
- timing_rm = 2; /*register dest - memory src*/
- timing_mr = 2; /*memory dest - register src*/
- timing_mm = 3;
- timing_rml = 2; /*register dest - memory src long*/
- timing_mrl = 2; /*memory dest - register src long*/
- timing_mml = 3;
- timing_bt = 3-1; /*branch taken*/
- timing_bnt = 1; /*branch not taken*/
- cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MMX | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_3DNOW;
- msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 18) | (1 << 19) | (1 << 20) | (1 << 21);
- cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE | CR4_PCE;
- /*unknown*/
- timing_int_rm = 26;
- timing_int_v86 = 82;
- timing_int_pm = 44;
- timing_int_pm_outer = 71;
- timing_iret_rm = 7;
- timing_iret_v86 = 26;
- timing_iret_pm = 10;
- timing_iret_pm_outer = 26;
- timing_call_rm = 4;
- timing_call_pm = 15;
- timing_call_pm_gate = 26;
- timing_call_pm_gate_inner = 35;
- timing_retf_rm = 4;
- timing_retf_pm = 7;
- timing_retf_pm_outer = 23;
- timing_jmp_rm = 5;
- timing_jmp_pm = 7;
- timing_jmp_pm_gate = 17;
- timing_misaligned = 2;
- cpu_cyrix_alignment = 1;
- codegen_timing_set(&codegen_timing_winchip2);
- break;
-
case CPU_PENTIUM:
x86_setopcodes(ops_386, ops_pentium_0f, dynarec_ops_386, dynarec_ops_pentium_0f);
timing_rr = 1; /*register dest - register src*/
@@ -744,10 +942,12 @@ void cpu_set()
timing_jmp_rm = 3;
timing_jmp_pm = 3;
timing_jmp_pm_gate = 18;
- timing_misaligned = 3;
- cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_VME;
+ cpu_hasrdtsc = 1;
msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
- cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE | CR4_PCE;
+ cpu_hasMMX = 0;
+ cpu_hasMSR = 1;
+ cpu_hasCR4 = 1;
+ cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE | CR4_PCE;
codegen_timing_set(&codegen_timing_pentium);
break;
@@ -781,15 +981,17 @@ void cpu_set()
timing_jmp_rm = 3;
timing_jmp_pm = 3;
timing_jmp_pm_gate = 18;
- timing_misaligned = 3;
- cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_VME | CPU_FEATURE_MMX;
+ cpu_hasrdtsc = 1;
msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
- cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE | CR4_PCE;
+ cpu_hasMMX = 1;
+ cpu_hasMSR = 1;
+ cpu_hasCR4 = 1;
+ cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE | CR4_PCE;
codegen_timing_set(&codegen_timing_pentium);
break;
case CPU_Cx6x86:
- x86_setopcodes(ops_386, ops_c6x86_0f, dynarec_ops_386, dynarec_ops_c6x86_0f);
+ x86_setopcodes(ops_386, ops_pentium_0f, dynarec_ops_386, dynarec_ops_pentium_0f);
timing_rr = 1; /*register dest - register src*/
timing_rm = 1; /*register dest - memory src*/
timing_mr = 2; /*memory dest - register src*/
@@ -817,10 +1019,11 @@ void cpu_set()
timing_jmp_rm = 1;
timing_jmp_pm = 4;
timing_jmp_pm_gate = 14;
- timing_misaligned = 2;
- cpu_cyrix_alignment = 1;
- cpu_features = CPU_FEATURE_RDTSC;
+ cpu_hasrdtsc = 1;
msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
+ cpu_hasMMX = 0;
+ cpu_hasMSR = 0;
+ cpu_hasCR4 = 0;
codegen_timing_set(&codegen_timing_686);
CPUID = 0; /*Disabled on powerup by default*/
break;
@@ -854,10 +1057,11 @@ void cpu_set()
timing_jmp_rm = 1;
timing_jmp_pm = 4;
timing_jmp_pm_gate = 14;
- timing_misaligned = 2;
- cpu_cyrix_alignment = 1;
- cpu_features = CPU_FEATURE_RDTSC;
+ cpu_hasrdtsc = 1;
msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
+ cpu_hasMMX = 0;
+ cpu_hasMSR = 0;
+ cpu_hasCR4 = 0;
codegen_timing_set(&codegen_timing_686);
ccr4 = 0x80;
break;
@@ -874,8 +1078,11 @@ void cpu_set()
timing_mml = 2;
timing_bt = 5-1; /*branch taken*/
timing_bnt = 1; /*branch not taken*/
- cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4;
+ cpu_hasrdtsc = 1;
msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
+ cpu_hasMMX = 0;
+ cpu_hasMSR = 1;
+ cpu_hasCR4 = 1;
cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_PCE;
codegen_timing_set(&codegen_timing_686);
break;
@@ -922,256 +1129,19 @@ void cpu_set()
timing_jmp_rm = 1;
timing_jmp_pm = 4;
timing_jmp_pm_gate = 14;
- timing_misaligned = 2;
- cpu_cyrix_alignment = 1;
- cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_MMX;
+ cpu_hasrdtsc = 1;
msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
+ cpu_hasMMX = 1;
+ cpu_hasMSR = 1;
+ cpu_hasCR4 = 1;
cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_PCE;
codegen_timing_set(&codegen_timing_686);
ccr4 = 0x80;
break;
- case CPU_K6:
- x86_setopcodes(ops_386, ops_pentiummmx_0f, dynarec_ops_386, dynarec_ops_pentiummmx_0f);
- timing_rr = 1; /*register dest - register src*/
- timing_rm = 2; /*register dest - memory src*/
- timing_mr = 3; /*memory dest - register src*/
- timing_mm = 3;
- timing_rml = 2; /*register dest - memory src long*/
- timing_mrl = 3; /*memory dest - register src long*/
- timing_mml = 3;
- timing_bt = 0; /*branch taken*/
- timing_bnt = 1; /*branch not taken*/
- timing_int = 6;
- timing_int_rm = 11;
- timing_int_v86 = 54;
- timing_int_pm = 25;
- timing_int_pm_outer = 42;
- timing_iret_rm = 7;
- timing_iret_v86 = 27; /*unknown*/
- timing_iret_pm = 10;
- timing_iret_pm_outer = 27;
- timing_call_rm = 4;
- timing_call_pm = 4;
- timing_call_pm_gate = 22;
- timing_call_pm_gate_inner = 44;
- timing_retf_rm = 4;
- timing_retf_pm = 4;
- timing_retf_pm_outer = 23;
- timing_jmp_rm = 3;
- timing_jmp_pm = 3;
- timing_jmp_pm_gate = 18;
- timing_misaligned = 3;
- cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_VME | CPU_FEATURE_MMX;
- msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
- cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE;
- codegen_timing_set(&codegen_timing_k6);
- break;
-
- case CPU_K6_2:
- case CPU_K6_3:
- case CPU_K6_2P:
- case CPU_K6_3P:
- x86_setopcodes(ops_386, ops_winchip2_0f, dynarec_ops_386, dynarec_ops_winchip2_0f);
- timing_rr = 1; /*register dest - register src*/
- timing_rm = 2; /*register dest - memory src*/
- timing_mr = 3; /*memory dest - register src*/
- timing_mm = 3;
- timing_rml = 2; /*register dest - memory src long*/
- timing_mrl = 3; /*memory dest - register src long*/
- timing_mml = 3;
- timing_bt = 0; /*branch taken*/
- timing_bnt = 1; /*branch not taken*/
- timing_int = 6;
- timing_int_rm = 11;
- timing_int_v86 = 54;
- timing_int_pm = 25;
- timing_int_pm_outer = 42;
- timing_iret_rm = 7;
- timing_iret_v86 = 27; /*unknown*/
- timing_iret_pm = 10;
- timing_iret_pm_outer = 27;
- timing_call_rm = 4;
- timing_call_pm = 4;
- timing_call_pm_gate = 22;
- timing_call_pm_gate_inner = 44;
- timing_retf_rm = 4;
- timing_retf_pm = 4;
- timing_retf_pm_outer = 23;
- timing_jmp_rm = 3;
- timing_jmp_pm = 3;
- timing_jmp_pm_gate = 18;
- timing_misaligned = 3;
- cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_VME | CPU_FEATURE_MMX | CPU_FEATURE_3DNOW;
- msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
- cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE;
- codegen_timing_set(&codegen_timing_k6);
- break;
-
- case CPU_PENTIUMPRO:
- x86_setopcodes(ops_386, ops_pentiumpro_0f, dynarec_ops_386, dynarec_ops_pentiumpro_0f);
- x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_686_da_a16;
- x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_686_da_a32;
- x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_686_db_a16;
- x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_686_db_a32;
- x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_686_df_a16;
- x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_686_df_a32;
- x86_opcodes_da_a16 = ops_fpu_686_da_a16;
- x86_opcodes_da_a32 = ops_fpu_686_da_a32;
- x86_opcodes_db_a16 = ops_fpu_686_db_a16;
- x86_opcodes_db_a32 = ops_fpu_686_db_a32;
- x86_opcodes_df_a16 = ops_fpu_686_df_a16;
- x86_opcodes_df_a32 = ops_fpu_686_df_a32;
- timing_rr = 1; /*register dest - register src*/
- timing_rm = 2; /*register dest - memory src*/
- timing_mr = 3; /*memory dest - register src*/
- timing_mm = 3;
- timing_rml = 2; /*register dest - memory src long*/
- timing_mrl = 3; /*memory dest - register src long*/
- timing_mml = 3;
- timing_bt = 0; /*branch taken*/
- timing_bnt = 2; /*branch not taken*/
- timing_int = 6;
- timing_int_rm = 11;
- timing_int_v86 = 54;
- timing_int_pm = 25;
- timing_int_pm_outer = 42;
- timing_iret_rm = 7;
- timing_iret_v86 = 27; /*unknown*/
- timing_iret_pm = 10;
- timing_iret_pm_outer = 27;
- timing_call_rm = 4;
- timing_call_pm = 4;
- timing_call_pm_gate = 22;
- timing_call_pm_gate_inner = 44;
- timing_retf_rm = 4;
- timing_retf_pm = 4;
- timing_retf_pm_outer = 23;
- timing_jmp_rm = 3;
- timing_jmp_pm = 3;
- timing_jmp_pm_gate = 18;
- timing_misaligned = 3;
- cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_VME | CPU_FEATURE_CX8 | CPU_FEATURE_SYSCALL;
- msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
- cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE | CR4_PCE;
- codegen_timing_set(&codegen_timing_p6);
- break;
-
- case CPU_PENTIUM_2:
- case CPU_CELERON:
- case CPU_CELERON_A:
- x86_setopcodes(ops_386, ops_pentium2_0f, dynarec_ops_386, dynarec_ops_pentium2_0f);
- x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_686_da_a16;
- x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_686_da_a32;
- x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_686_db_a16;
- x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_686_db_a32;
- x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_686_df_a16;
- x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_686_df_a32;
- x86_opcodes_da_a16 = ops_fpu_686_da_a16;
- x86_opcodes_da_a32 = ops_fpu_686_da_a32;
- x86_opcodes_db_a16 = ops_fpu_686_db_a16;
- x86_opcodes_db_a32 = ops_fpu_686_db_a32;
- x86_opcodes_df_a16 = ops_fpu_686_df_a16;
- x86_opcodes_df_a32 = ops_fpu_686_df_a32;
- timing_rr = 1; /*register dest - register src*/
- timing_rm = 2; /*register dest - memory src*/
- timing_mr = 3; /*memory dest - register src*/
- timing_mm = 3;
- timing_rml = 2; /*register dest - memory src long*/
- timing_mrl = 3; /*memory dest - register src long*/
- timing_mml = 3;
- timing_bt = 0; /*branch taken*/
- timing_bnt = 2; /*branch not taken*/
- timing_int = 6;
- timing_int_rm = 11;
- timing_int_v86 = 54;
- timing_int_pm = 25;
- timing_int_pm_outer = 42;
- timing_iret_rm = 7;
- timing_iret_v86 = 27; /*unknown*/
- timing_iret_pm = 10;
- timing_iret_pm_outer = 27;
- timing_call_rm = 4;
- timing_call_pm = 4;
- timing_call_pm_gate = 22;
- timing_call_pm_gate_inner = 44;
- timing_retf_rm = 4;
- timing_retf_pm = 4;
- timing_retf_pm_outer = 23;
- timing_jmp_rm = 3;
- timing_jmp_pm = 3;
- timing_jmp_pm_gate = 18;
- timing_misaligned = 3;
- cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_VME | CPU_FEATURE_CX8 | CPU_FEATURE_MMX | CPU_FEATURE_SYSCALL;
- msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
- cpu_CR4_mask = CR4_VME | CR4_PVI | CR4_TSD | CR4_DE | CR4_PSE | CR4_MCE | CR4_PCE;
- codegen_timing_set(&codegen_timing_p6);
- break;
-
- case CPU_CYRIX_III:
- x86_setopcodes(ops_386, ops_winchip2_0f, dynarec_ops_386, dynarec_ops_winchip2_0f);
- timing_rr = 1; /*register dest - register src*/
- timing_rm = 1; /*register dest - memory src*/
- timing_mr = 1; /*memory dest - register src*/
- timing_mm = 1;
- timing_rml = 1; /*register dest - memory src long*/
- timing_mrl = 1; /*memory dest - register src long*/
- timing_mml = 1;
- timing_bt = 1; /*branch taken*/
- timing_bnt = 1; /*branch not taken*/
- cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MMX | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_3DNOW;
- msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 18) | (1 << 19) | (1 << 20) | (1 << 21);
- cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE | CR4_PCE;
- /*unknown*/
- timing_int_rm = 26;
- timing_int_v86 = 82;
- timing_int_pm = 44;
- timing_int_pm_outer = 71;
- timing_iret_rm = 7;
- timing_iret_v86 = 26;
- timing_iret_pm = 10;
- timing_iret_pm_outer = 26;
- timing_call_rm = 4;
- timing_call_pm = 15;
- timing_call_pm_gate = 26;
- timing_call_pm_gate_inner = 35;
- timing_retf_rm = 4;
- timing_retf_pm = 7;
- timing_retf_pm_outer = 23;
- timing_jmp_rm = 5;
- timing_jmp_pm = 7;
- timing_jmp_pm_gate = 17;
- timing_misaligned = 2;
- cpu_cyrix_alignment = 1;
- codegen_timing_set(&codegen_timing_cyrixiii);
- break;
-
default:
fatal("cpu_set : unknown CPU type %i\n", cpu_s->cpu_type);
}
-
- switch (fpu_type)
- {
- case FPU_NONE:
- break;
-
- case FPU_8087:
- x87_timings = x87_timings_8087;
- break;
-
- case FPU_287:
- x87_timings = x87_timings_287;
- break;
-
- case FPU_287XL:
- case FPU_387:
- x87_timings = x87_timings_387;
- break;
-
- default:
- x87_timings = x87_timings_486;
- break;
- }
}
void cpu_CPUID()
@@ -1193,25 +1163,7 @@ void cpu_CPUID()
EDX = CPUID_FPU; /*FPU*/
}
else
- EAX = EBX = ECX = EDX = 0;
- break;
-
- case CPU_iDX4:
- if (!EAX)
- {
- EAX = 0x00000001;
- EBX = 0x756e6547;
- EDX = 0x49656e69;
- ECX = 0x6c65746e;
- }
- else if (EAX == 1)
- {
- EAX = CPUID;
- EBX = ECX = 0;
- EDX = CPUID_FPU | CPUID_VME;
- }
- else
- EAX = EBX = ECX = EDX = 0;
+ EAX = 0;
break;
case CPU_Am486SX:
@@ -1228,7 +1180,7 @@ void cpu_CPUID()
EBX = ECX = EDX = 0; /*No FPU*/
}
else
- EAX = EBX = ECX = EDX = 0;
+ EAX = 0;
break;
case CPU_Am486DX:
@@ -1246,7 +1198,7 @@ void cpu_CPUID()
EDX = CPUID_FPU; /*FPU*/
}
else
- EAX = EBX = ECX = EDX = 0;
+ EAX = 0;
break;
case CPU_WINCHIP:
@@ -1262,7 +1214,7 @@ void cpu_CPUID()
else
{
EBX = 0x746e6543; /*CentaurHauls*/
- ECX = 0x736c7561;
+ ECX = 0x736c7561;
EDX = 0x48727561;
}
}
@@ -1271,73 +1223,11 @@ void cpu_CPUID()
EAX = 0x540;
EBX = ECX = 0;
EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR;
- if (cpu_has_feature(CPU_FEATURE_CX8))
- EDX |= CPUID_CMPXCHG8B;
if (msr.fcr & (1 << 9))
EDX |= CPUID_MMX;
}
else
- EAX = EBX = ECX = EDX = 0;
- break;
-
- case CPU_WINCHIP2:
- switch (EAX)
- {
- case 0:
- EAX = 1;
- if (msr.fcr2 & (1 << 14))
- {
- EBX = msr.fcr3 >> 32;
- ECX = msr.fcr3 & 0xffffffff;
- EDX = msr.fcr2 >> 32;
- }
- else
- {
- EBX = 0x746e6543; /*CentaurHauls*/
- ECX = 0x736c7561;
- EDX = 0x48727561;
- }
- break;
- case 1:
- EAX = 0x580;
- EBX = ECX = 0;
- EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR;
- if (cpu_has_feature(CPU_FEATURE_CX8))
- EDX |= CPUID_CMPXCHG8B;
- if (msr.fcr & (1 << 9))
- EDX |= CPUID_MMX;
- break;
- case 0x80000000:
- EAX = 0x80000005;
- break;
- case 0x80000001:
- EAX = 0x580;
- EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR;
- if (cpu_has_feature(CPU_FEATURE_CX8))
- EDX |= CPUID_CMPXCHG8B;
- if (msr.fcr & (1 << 9))
- EDX |= CPUID_MMX;
- if (cpu_has_feature(CPU_FEATURE_3DNOW))
- EDX |= CPUID_3DNOW;
- break;
-
- case 0x80000002: /*Processor name string*/
- EAX = 0x20544449; /*IDT WinChip 2-3D*/
- EBX = 0x436e6957;
- ECX = 0x20706968;
- EDX = 0x44332d32;
- break;
-
- case 0x80000005: /*Cache information*/
- EBX = 0x08800880; /*TLBs*/
- ECX = 0x20040120; /*L1 data cache*/
- EDX = 0x20020120; /*L1 instruction cache*/
- break;
-
- default:
- EAX = EBX = ECX = EDX = 0;
- break;
- }
+ EAX = 0;
break;
case CPU_PENTIUM:
@@ -1352,10 +1242,10 @@ void cpu_CPUID()
{
EAX = CPUID;
EBX = ECX = 0;
- EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B;
+ EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B;
}
else
- EAX = EBX = ECX = EDX = 0;
+ EAX = 0;
break;
case CPU_PENTIUMMMX:
@@ -1370,10 +1260,10 @@ void cpu_CPUID()
{
EAX = CPUID;
EBX = ECX = 0;
- EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_MMX;
+ EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_MMX;
}
else
- EAX = EBX = ECX = EDX = 0;
+ EAX = 0;
break;
@@ -1392,7 +1282,7 @@ void cpu_CPUID()
EDX = CPUID_FPU;
}
else
- EAX = EBX = ECX = EDX = 0;
+ EAX = 0;
break;
@@ -1411,7 +1301,7 @@ void cpu_CPUID()
EDX = CPUID_FPU | CPUID_CMPXCHG8B;
}
else
- EAX = EBX = ECX = EDX = 0;
+ EAX = 0;
break;
@@ -1430,7 +1320,7 @@ void cpu_CPUID()
EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B;
}
else
- EAX = EBX = ECX = EDX = 0;
+ EAX = 0;
break;
@@ -1450,349 +1340,9 @@ void cpu_CPUID()
EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_CMOV | CPUID_MMX;
}
else
- EAX = EBX = ECX = EDX = 0;
+ EAX = 0;
break;
- case CPU_K6:
- switch (EAX)
- {
- case 0:
- EAX = 1;
- EBX = 0x68747541; /*AuthenticAMD*/
- ECX = 0x444d4163;
- EDX = 0x69746e65;
- break;
- case 1:
- EAX = CPUID;
- EBX = ECX = 0;
- EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_MMX;
- break;
- case 0x80000000:
- EAX = 0x80000005;
- break;
- case 0x80000001:
- EAX = CPUID+0x100;
- EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_MMX;
- break;
-
- case 0x80000002: /*Processor name string*/
- EAX = 0x2d444d41; /*AMD-K6tm w/ mult*/
- EBX = 0x6d74364b;
- ECX = 0x202f7720;
- EDX = 0x746c756d;
- break;
-
- case 0x80000003: /*Processor name string*/
- EAX = 0x64656d69; /*imedia extension*/
- EBX = 0x65206169;
- ECX = 0x6e657478;
- EDX = 0x6e6f6973;
- break;
-
- case 0x80000004: /*Processor name string*/
- EAX = 0x00000073; /*s*/
- EBX = 0x00000000;
- ECX = 0x00000000;
- EDX = 0x00000000;
- break;
-
- case 0x80000005: /*Cache information*/
- EBX = 0x02800140; /*TLBs*/
- ECX = 0x20020220; /*L1 data cache*/
- EDX = 0x20020220; /*L1 instruction cache*/
- break;
-
- default:
- EAX = EBX = ECX = EDX = 0;
- break;
- }
- break;
-
- case CPU_K6_2:
- switch (EAX)
- {
- case 0:
- EAX = 1;
- EBX = 0x68747541; /*AuthenticAMD*/
- ECX = 0x444d4163;
- EDX = 0x69746e65;
- break;
- case 1:
- EAX = CPUID;
- EBX = ECX = 0;
- EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_MMX;
- break;
- case 0x80000000:
- EAX = 0x80000005;
- break;
- case 0x80000001:
- EAX = CPUID+0x100;
- EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_MMX | CPUID_3DNOW;
- break;
-
- case 0x80000002: /*Processor name string*/
- EAX = 0x2d444d41; /*AMD-K6(tm) 3D pr*/
- EBX = 0x7428364b;
- ECX = 0x3320296d;
- EDX = 0x72702044;
- break;
-
- case 0x80000003: /*Processor name string*/
- EAX = 0x7365636f; /*ocessor*/
- EBX = 0x00726f73;
- ECX = 0x00000000;
- EDX = 0x00000000;
- break;
-
- case 0x80000005: /*Cache information*/
- EBX = 0x02800140; /*TLBs*/
- ECX = 0x20020220; /*L1 data cache*/
- EDX = 0x20020220; /*L1 instruction cache*/
- break;
-
- default:
- EAX = EBX = ECX = EDX = 0;
- break;
- }
- break;
-
- case CPU_K6_3:
- switch (EAX)
- {
- case 0:
- EAX = 1;
- EBX = 0x68747541; /*AuthenticAMD*/
- ECX = 0x444d4163;
- EDX = 0x69746e65;
- break;
- case 1:
- EAX = CPUID;
- EBX = ECX = 0;
- EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_MMX;
- break;
- case 0x80000000:
- EAX = 0x80000006;
- break;
- case 0x80000001:
- EAX = CPUID+0x100;
- EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_MMX | CPUID_3DNOW;
- break;
-
- case 0x80000002: /*Processor name string*/
- EAX = 0x2d444d41; /*AMD-K6(tm) 3D+ P*/
- EBX = 0x7428364b;
- ECX = 0x3320296d;
- EDX = 0x50202b44;
- break;
-
- case 0x80000003: /*Processor name string*/
- EAX = 0x65636f72; /*rocessor*/
- EBX = 0x726f7373;
- ECX = 0x00000000;
- EDX = 0x00000000;
- break;
-
- case 0x80000005: /*Cache information*/
- EBX = 0x02800140; /*TLBs*/
- ECX = 0x20020220; /*L1 data cache*/
- EDX = 0x20020220; /*L1 instruction cache*/
- break;
-
- case 0x80000006: /*L2 Cache information*/
- ECX = 0x01004220;
- break;
-
- default:
- EAX = EBX = ECX = EDX = 0;
- break;
- }
- break;
-
- case CPU_K6_2P:
- case CPU_K6_3P:
- switch (EAX)
- {
- case 0:
- EAX = 1;
- EBX = 0x68747541; /*AuthenticAMD*/
- ECX = 0x444d4163;
- EDX = 0x69746e65;
- break;
- case 1:
- EAX = CPUID;
- EBX = ECX = 0;
- EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_MMX;
- break;
- case 0x80000000:
- EAX = 0x80000007;
- break;
- case 0x80000001:
- EAX = CPUID+0x100;
- EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_MMX | CPUID_3DNOW;
- break;
-
- case 0x80000002: /*Processor name string*/
- EAX = 0x2d444d41; /*AMD-K6(tm)-III P*/
- EBX = 0x7428364b;
- ECX = 0x492d296d;
- EDX = 0x50204949;
- break;
-
- case 0x80000003: /*Processor name string*/
- EAX = 0x65636f72; /*rocessor*/
- EBX = 0x726f7373;
- ECX = 0x00000000;
- EDX = 0x00000000;
- break;
-
- case 0x80000005: /*Cache information*/
- EBX = 0x02800140; /*TLBs*/
- ECX = 0x20020220; /*L1 data cache*/
- EDX = 0x20020220; /*L1 instruction cache*/
- break;
-
- case 0x80000006: /*L2 Cache information*/
- if (models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_K6_3P)
- ECX = 0x01004220;
- else
- ECX = 0x00804220;
- break;
-
- case 0x80000007: /*PowerNow information*/
- EDX = 7;
- break;
-
- default:
- EAX = EBX = ECX = EDX = 0;
- break;
- }
- break;
-
- case CPU_PENTIUMPRO:
- if (!EAX)
- {
- EAX = 0x00000002;
- EBX = 0x756e6547;
- EDX = 0x49656e69;
- ECX = 0x6c65746e;
- }
- else if (EAX == 1)
- {
- EAX = CPUID;
- EBX = ECX = 0;
- EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_CMOV | CPUID_SEP;
- }
- else if (EAX == 2)
- {
- EAX = 0x03020101;
- EBX = 0;
- ECX = 0;
- EDX = 0x06040a42;
- }
- else
- EAX = EBX = ECX = EDX = 0;
- break;
-
- case CPU_PENTIUM_2:
- case CPU_CELERON:
- case CPU_CELERON_A:
- if (!EAX)
- {
- EAX = 0x00000002;
- EBX = 0x756e6547;
- EDX = 0x49656e69;
- ECX = 0x6c65746e;
- }
- else if (EAX == 1)
- {
- EAX = CPUID;
- EBX = ECX = 0;
- EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_CMPXCHG8B | CPUID_CMOV | CPUID_MMX | CPUID_SEP;
- }
- else if (EAX == 2)
- {
- EAX = 0x03020101;
- EBX = 0;
- ECX = 0;
- if (models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_PENTIUM_2)
- EDX = 0x08040c43; /*512kb L2 cache*/
- else if (models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_CELERON)
- EDX = 0x08040c40; /*No L2 cache*/
- else
- EDX = 0x08040c41; /*128kb L2 cache*/
- }
- else
- EAX = EBX = ECX = EDX = 0;
- break;
-
- case CPU_CYRIX_III:
- switch (EAX)
- {
- case 0:
- EAX = 1;
- EBX = 0x746e6543; /*CentaurHauls*/
- ECX = 0x736c7561;
- EDX = 0x48727561;
- break;
- case 1:
- EAX = models[model].cpu[cpu_manufacturer].cpus[cpu].cpuid_model;
- EBX = ECX = 0;
- EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR;
- if (cpu_has_feature(CPU_FEATURE_CX8))
- EDX |= CPUID_CMPXCHG8B;
- if (msr.fcr & (1 << 9))
- EDX |= CPUID_MMX;
- break;
- case 0x80000000:
- EAX = 0x80000006;
- break;
- case 0x80000001:
- EAX = models[model].cpu[cpu_manufacturer].cpus[cpu].edx_reset;
- EDX = CPUID_FPU | CPUID_TSC | CPUID_MSR;
- if (cpu_has_feature(CPU_FEATURE_CX8))
- EDX |= CPUID_CMPXCHG8B;
- if (msr.fcr & (1 << 9))
- EDX |= CPUID_MMX;
- if (cpu_has_feature(CPU_FEATURE_3DNOW))
- EDX |= CPUID_3DNOW;
- break;
-
- case 0x80000002: /*Processor name string*/
- if (models[model].cpu[cpu_manufacturer].cpus[cpu].cpuid_model >= 0x670)
- {
- EAX = 0x20414956; /*VIA Samuel 2*/
- EBX = 0x756d6153;
- ECX = 0x32206c65;
- EDX = 0x00000000;
- }
- else
- {
- EAX = 0x20414956; /*VIA SamuelM*/
- EBX = 0x756d6153;
- ECX = 0x004d6c65;
- EDX = 0x00000000;
- }
- break;
-
- case 0x80000005: /*Cache information*/
- EBX = 0x08800880; /*TLBs*/
- ECX = 0x40040120; /*L1 data cache*/
- EDX = 0x40020120; /*L1 instruction cache*/
- break;
-
- case 0x80000006: /*L2 Cache information*/
- if (models[model].cpu[cpu_manufacturer].cpus[cpu].cpuid_model >= 0x670)
- ECX = 0x40040120; /*L2 cache*/
- else
- ECX = 0;
- EAX = EBX = EDX = 0;
- break;
-
- default:
- EAX = EBX = ECX = EDX = 0;
- break;
- }
- break;
}
}
@@ -1801,8 +1351,6 @@ void cpu_RDMSR()
switch (models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type)
{
case CPU_WINCHIP:
- case CPU_WINCHIP2:
- case CPU_CYRIX_III:
EAX = EDX = 0;
switch (ECX)
{
@@ -1855,46 +1403,6 @@ void cpu_RDMSR()
break;
}
break;
- case CPU_K6:
- case CPU_K6_2:
- case CPU_K6_3:
- case CPU_K6_2P:
- case CPU_K6_3P:
- EAX = EDX = 0;
- switch (ECX)
- {
- case 0x10:
- EAX = tsc & 0xffffffff;
- EDX = tsc >> 32;
- break;
- }
- break;
- case CPU_PENTIUMPRO:
- case CPU_PENTIUM_2:
- case CPU_CELERON:
- case CPU_CELERON_A:
- EAX = EDX = 0;
- switch (ECX)
- {
- case 0x10:
- EAX = tsc & 0xffffffff;
- EDX = tsc >> 32;
- break;
-
- case 0x174:
- EAX = sysenter_cs;
- EDX = 0;
- break;
- case 0x175:
- EAX = sysenter_esp;
- EDX = 0;
- break;
- case 0x176:
- EAX = sysenter_eip;
- EDX = 0;
- break;
- }
- break;
}
}
@@ -1903,8 +1411,6 @@ void cpu_WRMSR()
switch (models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type)
{
case CPU_WINCHIP:
- case CPU_WINCHIP2:
- case CPU_CYRIX_III:
switch (ECX)
{
case 0x02:
@@ -1921,18 +1427,7 @@ void cpu_WRMSR()
break;
case 0x107:
msr.fcr = EAX;
- if (EAX & (1 << 9))
- cpu_features |= CPU_FEATURE_MMX;
- else
- cpu_features &= ~CPU_FEATURE_MMX;
- if (EAX & (1 << 1))
- cpu_features |= CPU_FEATURE_CX8;
- else
- cpu_features &= ~CPU_FEATURE_CX8;
- if ((EAX & (1 << 20)) && models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type >= CPU_WINCHIP2)
- cpu_features |= CPU_FEATURE_3DNOW;
- else
- cpu_features &= ~CPU_FEATURE_3DNOW;
+ cpu_hasMMX = EAX & (1 << 9);
if (EAX & (1 << 29))
CPUID = 0;
else
@@ -1967,51 +1462,11 @@ void cpu_WRMSR()
break;
}
break;
- case CPU_K6:
- case CPU_K6_2:
- case CPU_K6_3:
- case CPU_K6_2P:
- case CPU_K6_3P:
- switch (ECX)
- {
- case 0x10:
- tsc = EAX | ((uint64_t)EDX << 32);
- break;
- }
- break;
- case CPU_PENTIUMPRO:
- case CPU_PENTIUM_2:
- case CPU_CELERON:
- case CPU_CELERON_A:
- switch (ECX)
- {
- case 0x10:
- tsc = EAX | ((uint64_t)EDX << 32);
- break;
-
- case 0x174:
- sysenter_cs = EAX & 0xffff;
- break;
- case 0x175:
- sysenter_esp = EAX;
- break;
- case 0x176:
- sysenter_eip = EAX;
- break;
- }
- break;
}
}
static int cyrix_addr;
-#define CCR1_USE_SMI (1 << 1)
-#define CCR1_SMAC (1 << 2)
-#define CCR1_SM3 (1 << 7)
-
-#define CCR3_SMI_LOCK (1 << 0)
-#define CCR3_NMI_EN (1 << 1)
-
void cyrix_write(uint16_t addr, uint8_t val, void *priv)
{
if (!(addr & 1))
@@ -2022,46 +1477,14 @@ void cyrix_write(uint16_t addr, uint8_t val, void *priv)
ccr0 = val;
break;
case 0xc1: /*CCR1*/
- if ((ccr3 & CCR3_SMI_LOCK) && !(cpu_cur_status & CPU_STATUS_SMM))
- val = (val & ~(CCR1_USE_SMI | CCR1_SMAC | CCR1_SM3)) | (ccr1 & (CCR1_USE_SMI | CCR1_SMAC | CCR1_SM3));
ccr1 = val;
break;
case 0xc2: /*CCR2*/
ccr2 = val;
break;
case 0xc3: /*CCR3*/
- if ((ccr3 & CCR3_SMI_LOCK) && !(cpu_cur_status & CPU_STATUS_SMM))
- val = (val & ~(CCR3_NMI_EN)) | (ccr3 & CCR3_NMI_EN) | CCR3_SMI_LOCK;
ccr3 = val;
break;
- case 0xcd:
- if (!(ccr3 & CCR3_SMI_LOCK) || (cpu_cur_status & CPU_STATUS_SMM))
- {
- cyrix.arr[3].base = (cyrix.arr[3].base & ~0xff000000) | (val << 24);
- cyrix.smhr &= ~SMHR_VALID;
- }
- break;
- case 0xce:
- if (!(ccr3 & CCR3_SMI_LOCK) || (cpu_cur_status & CPU_STATUS_SMM))
- {
- cyrix.arr[3].base = (cyrix.arr[3].base & ~0x00ff0000) | (val << 16);
- cyrix.smhr &= ~SMHR_VALID;
- }
- break;
- case 0xcf:
- if (!(ccr3 & CCR3_SMI_LOCK) || (cpu_cur_status & CPU_STATUS_SMM))
- {
- cyrix.arr[3].base = (cyrix.arr[3].base & ~0x0000f000) | ((val & 0xf0) << 8);
- if ((val & 0xf) == 0xf)
- cyrix.arr[3].size = 1ull << 32; /*4 GB*/
- else if (val & 0xf)
- cyrix.arr[3].size = 2048 << (val & 0xf);
- else
- cyrix.arr[3].size = 0; /*Disabled*/
- cyrix.smhr &= ~SMHR_VALID;
- }
- break;
-
case 0xe8: /*CCR4*/
if ((ccr3 & 0xf0) == 0x10)
{
@@ -2102,6 +1525,7 @@ uint8_t cyrix_read(uint16_t addr, void *priv)
case 0xfe: return models[model].cpu[cpu_manufacturer].cpus[cpu].cyrix_id & 0xff;
case 0xff: return models[model].cpu[cpu_manufacturer].cpus[cpu].cyrix_id >> 8;
}
+ if ((cyrix_addr & ~0xf0) == 0xc0) return 0xff;
if (cyrix_addr == 0x20 && models[model].cpu[cpu_manufacturer].cpus[cpu].cpu_type == CPU_Cx5x86) return 0xff;
}
return 0xff;
@@ -2119,10 +1543,7 @@ void cpu_update_waitstates()
{
cpu_s = &models[model].cpu[cpu_manufacturer].cpus[cpu];
- if (is486)
- cpu_prefetch_width = 16;
- else
- cpu_prefetch_width = cpu_16bitbus ? 2 : 4;
+ cpu_prefetch_width = cpu_16bitbus ? 2 : 4;
if (cpu_cache_int_enabled)
{
@@ -2156,51 +1577,4 @@ void cpu_update_waitstates()
cpu_cycles_write = cpu_s->mem_write_cycles;
cpu_cycles_write_l = (cpu_16bitbus ? 2 : 1) * cpu_s->mem_write_cycles;
}
- if (is486)
- cpu_prefetch_cycles = (cpu_prefetch_cycles * 11) / 16;
- cpu_mem_prefetch_cycles = cpu_prefetch_cycles;
- if (cpu_s->rspeed <= 8000000)
- cpu_rom_prefetch_cycles = cpu_mem_prefetch_cycles;
-}
-
-void cpu_set_turbo(int turbo)
-{
- if (cpu_turbo != turbo)
- {
- cpu_turbo = turbo;
-
- cpu_s = &models[model].cpu[cpu_manufacturer].cpus[cpu];
- if (cpu_s->cpu_type >= CPU_286)
- {
- if (cpu_turbo)
- setpitclock(cpu_turbo_speed);
- else
- setpitclock(cpu_nonturbo_speed);
- }
- else
- setpitclock(14318184.0);
- }
-}
-
-int cpu_get_turbo()
-{
- return cpu_turbo;
-}
-
-int cpu_get_speed()
-{
- if (cpu_turbo)
- return cpu_turbo_speed;
- return cpu_nonturbo_speed;
-}
-
-void cpu_set_nonturbo_divider(int divider)
-{
- if (divider < 2)
- cpu_set_turbo(1);
- else
- {
- cpu_nonturbo_speed = cpu_turbo_speed / divider;
- cpu_set_turbo(0);
- }
}
diff --git a/src/cpu.h b/src/cpu.h
index 97acec1..4a5a679 100644
--- a/src/cpu.h
+++ b/src/cpu.h
@@ -2,7 +2,6 @@
#define _CPU_H_
extern int cpu, cpu_manufacturer;
-extern int fpu_type;
/*808x class CPUs*/
#define CPU_8088 0
@@ -24,34 +23,21 @@ extern int fpu_type;
#define CPU_i486DX 10
#define CPU_Am486DX 11
#define CPU_Cx486DX 12
-#define CPU_iDX4 13
-#define CPU_Cx5x86 14
+#define CPU_Cx5x86 13
/*586 class CPUs*/
-#define CPU_WINCHIP 15
-#define CPU_WINCHIP2 16
-#define CPU_PENTIUM 17
-#define CPU_PENTIUMMMX 18
-#define CPU_Cx6x86 19
-#define CPU_Cx6x86MX 20
-#define CPU_Cx6x86L 21
-#define CPU_CxGX1 22
-#define CPU_K6 23
-#define CPU_K6_2 24
-#define CPU_K6_3 25
-#define CPU_K6_2P 26
-#define CPU_K6_3P 27
-#define CPU_PENTIUMPRO 28
-#define CPU_PENTIUM_2 29
-#define CPU_CELERON 30
-#define CPU_CELERON_A 31
-#define CPU_CYRIX_III 32
+#define CPU_WINCHIP 14
+#define CPU_PENTIUM 15
+#define CPU_PENTIUMMMX 16
+#define CPU_Cx6x86 17
+#define CPU_Cx6x86MX 18
+#define CPU_Cx6x86L 19
+#define CPU_CxGX1 20
#define MANU_INTEL 0
#define MANU_AMD 1
#define MANU_CYRIX 2
#define MANU_IDT 3
-#define MANU_VIA 4
extern int timing_rr;
extern int timing_mr, timing_mrl;
@@ -65,30 +51,11 @@ extern int timing_call_rm, timing_call_pm, timing_call_pm_gate, timing_call_pm_g
extern int timing_retf_rm, timing_retf_pm, timing_retf_pm_outer;
extern int timing_jmp_rm, timing_jmp_pm, timing_jmp_pm_gate;
-extern int timing_misaligned;
-
-enum
-{
- FPU_NONE,
- FPU_8087,
- FPU_287,
- FPU_287XL,
- FPU_387,
- FPU_BUILTIN
-};
-
-typedef struct
-{
- const char *name;
- const char *internal_name;
- const int type;
-} FPU;
typedef struct
{
char name[32];
int cpu_type;
- const FPU *fpus;
int speed;
int rspeed;
int multi;
@@ -99,11 +66,8 @@ typedef struct
int cpu_flags;
int mem_read_cycles, mem_write_cycles;
int cache_read_cycles, cache_write_cycles;
- int atclk_div;
} CPU;
-extern CPU *cpu_s;
-
extern CPU cpus_8088[];
extern CPU cpus_8086[];
extern CPU cpus_286[];
@@ -117,24 +81,14 @@ extern CPU cpus_i486[];
extern CPU cpus_Am486[];
extern CPU cpus_Cx486[];
extern CPU cpus_WinChip[];
-extern CPU cpus_WinChip_SS7[];
extern CPU cpus_Pentium5V[];
extern CPU cpus_PentiumS5[];
extern CPU cpus_Pentium[];
extern CPU cpus_6x86[];
-extern CPU cpus_6x86_SS7[];
-extern CPU cpus_K6_S7[];
-extern CPU cpus_K6_SS7[];
-extern CPU cpus_PentiumPro[];
-extern CPU cpus_Slot1_100MHz[];
-extern CPU cpus_VIA_100MHz[];
extern CPU cpus_pcjr[];
-extern CPU cpus_europc[];
extern CPU cpus_pc1512[];
-extern CPU cpus_super286tr[];
extern CPU cpus_ibmat[];
-extern CPU cpus_ibmxt286[];
extern CPU cpus_ps1_m2011[];
extern CPU cpus_ps2_m30_286[];
extern CPU cpus_acer[];
@@ -143,23 +97,11 @@ extern int cpu_iscyrix;
extern int cpu_16bitbus;
extern int cpu_busspeed;
extern int cpu_multi;
-/*Cyrix 5x86/6x86 only has data misalignment penalties when crossing 8-byte boundaries*/
-extern int cpu_cyrix_alignment;
-#define CPU_FEATURE_RDTSC (1 << 0)
-#define CPU_FEATURE_MSR (1 << 1)
-#define CPU_FEATURE_MMX (1 << 2)
-#define CPU_FEATURE_CR4 (1 << 3)
-#define CPU_FEATURE_VME (1 << 4)
-#define CPU_FEATURE_CX8 (1 << 5)
-#define CPU_FEATURE_3DNOW (1 << 6)
-#define CPU_FEATURE_SYSCALL (1 << 7)
-
-extern uint32_t cpu_features;
-static inline int cpu_has_feature(int feature)
-{
- return cpu_features & feature;
-}
+extern int cpu_hasrdtsc;
+extern int cpu_hasMSR;
+extern int cpu_hasMMX;
+extern int cpu_hasCR4;
#define CR4_TSD (1 << 2)
#define CR4_DE (1 << 3)
@@ -172,7 +114,7 @@ extern uint64_t cpu_CR4_mask;
#define CPU_REQUIRES_DYNAREC 2
extern int cpu_cycles_read, cpu_cycles_read_l, cpu_cycles_write, cpu_cycles_write_l;
-extern int cpu_prefetch_cycles, cpu_prefetch_width, cpu_mem_prefetch_cycles, cpu_rom_prefetch_cycles;
+extern int cpu_prefetch_cycles, cpu_prefetch_width;
extern int cpu_waitstates;
extern int cpu_cache_int_enabled, cpu_cache_ext_enabled;
@@ -182,8 +124,6 @@ void cyrix_write(uint16_t addr, uint8_t val, void *priv);
uint8_t cyrix_read(uint16_t addr, void *priv);
extern int is8086;
-extern int is486;
-extern int CPUID;
void cpu_CPUID();
void cpu_RDMSR();
@@ -191,25 +131,14 @@ void cpu_WRMSR();
extern int cpu_use_dynarec;
-extern uint64_t xt_cpu_multi;
+extern int xt_cpu_multi;
+#define ISA_CYCLES_SHIFT 6
extern int isa_cycles;
-#define ISA_CYCLES(x) (x * isa_cycles)
+#define ISA_CYCLES(x) ((x * isa_cycles) >> ISA_CYCLES_SHIFT)
-#define CPU_CLOCK_DIVIDER_MAX 16384
void cpu_update_waitstates();
void cpu_set();
void cpu_set_edx();
-void cpu_set_turbo(int turbo);
-int cpu_get_turbo();
-void cpu_set_nonturbo_divider(int divider);
-int cpu_get_speed();
-
-extern int has_vlb;
-
-int fpu_get_type(int model, int manu, int cpu, const char *internal_name);
-const char *fpu_get_internal_name(int model, int manu, int cpu, int type);
-const char *fpu_get_name_from_index(int model, int manu, int cpu, int c);
-int fpu_get_type_from_index(int model, int manu, int cpu, int c);
#endif
diff --git a/src/cpu_tables.c b/src/cpu_tables.c
deleted file mode 100644
index c0bd920..0000000
--- a/src/cpu_tables.c
+++ /dev/null
@@ -1,551 +0,0 @@
-#include "ibm.h"
-#include "cpu.h"
-
-/*Available cpuspeeds :
- 0 = 16 MHz
- 1 = 20 MHz
- 2 = 25 MHz
- 3 = 33 MHz
- 4 = 40 MHz
- 5 = 50 MHz
- 6 = 66 MHz
- 7 = 75 MHz
- 8 = 80 MHz
- 9 = 90 MHz
- 10 = 100 MHz
- 11 = 120 MHz
- 12 = 133 MHz
- 13 = 150 MHz
- 14 = 160 MHz
- 15 = 166 MHz
- 16 = 180 MHz
- 17 = 200 MHz
-*/
-
-FPU fpus_none[] =
-{
- {"None", "none", FPU_NONE},
- {NULL, NULL, 0}
-};
-FPU fpus_8088[] =
-{
- {"None", "none", FPU_NONE},
- {"8087", "8087", FPU_8087},
- {NULL, NULL, 0}
-};
-FPU fpus_80286[] =
-{
- {"None", "none", FPU_NONE},
- {"287", "287", FPU_287},
- {"287XL", "287xl", FPU_287XL},
- {NULL, NULL, 0}
-};
-FPU fpus_80386[] =
-{
- {"None", "none", FPU_NONE},
- {"387", "387", FPU_387},
- {NULL, NULL, 0}
-};
-FPU fpus_builtin[] =
-{
- {"Built-in", "builtin", FPU_BUILTIN},
- {NULL, NULL, 0}
-};
-
-CPU cpus_8088[] =
-{
- /*8088 standard*/
- {"8088/4.77", CPU_8088, fpus_8088, 0, 4772728, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
- {"8088/7.16", CPU_8088, fpus_8088, 1, 14318184/2, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
- {"8088/8", CPU_8088, fpus_8088, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
- {"8088/10", CPU_8088, fpus_8088, 2, 10000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
- {"8088/12", CPU_8088, fpus_8088, 3, 12000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
- {"8088/16", CPU_8088, fpus_8088, 4, 16000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
- {"", -1, 0, 0, 0, 0}
-};
-
-CPU cpus_pcjr[] =
-{
- /*8088 PCjr*/
- {"8088/4.77", CPU_8088, fpus_none, 0, 4772728, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
- {"", -1, 0, 0, 0, 0}
-};
-
-CPU cpus_europc[] =
-{
- /*8088 EuroPC*/
- {"8088/4.77", CPU_8088, fpus_8088, 0, 4772728, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
- {"8088/7.16", CPU_8088, fpus_8088, 1, 14318184/2, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
- {"8088/9.54", CPU_8088, fpus_8088, 1, 4772728*2, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
- {"", -1, 0, 0, 0, 0}
-};
-
-CPU cpus_8086[] =
-{
- /*8086 standard*/
- {"8086/7.16", CPU_8086, fpus_8088, 1, 14318184/2, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
- {"8086/8", CPU_8086, fpus_8088, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
- {"8086/9.54", CPU_8086, fpus_8088, 1, 4772728*2, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
- {"8086/10", CPU_8086, fpus_8088, 2, 10000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
- {"8086/12", CPU_8086, fpus_8088, 3, 12000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
- {"8086/16", CPU_8086, fpus_8088, 4, 16000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 2},
- {"", -1, 0, 0, 0, 0}
-};
-
-CPU cpus_pc1512[] =
-{
- /*8086 Amstrad*/
- {"8086/8", CPU_8086, fpus_8088, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
- {"", -1, 0, 0, 0, 0}
-};
-
-CPU cpus_286[] =
-{
- /*286*/
- {"286/6", CPU_286, fpus_80286, 0, 6000000, 1, 0, 0, 0, 0, 0, 2,2,2,2, 1},
- {"286/8", CPU_286, fpus_80286, 1, 8000000, 1, 0, 0, 0, 0, 0, 2,2,2,2, 1},
- {"286/10", CPU_286, fpus_80286, 2, 10000000, 1, 0, 0, 0, 0, 0, 2,2,2,2, 1},
- {"286/12", CPU_286, fpus_80286, 3, 12000000, 1, 0, 0, 0, 0, 0, 3,3,3,3, 2},
- {"286/16", CPU_286, fpus_80286, 4, 16000000, 1, 0, 0, 0, 0, 0, 3,3,3,3, 2},
- {"286/20", CPU_286, fpus_80286, 5, 20000000, 1, 0, 0, 0, 0, 0, 4,4,4,4, 3},
- {"286/25", CPU_286, fpus_80286, 6, 25000000, 1, 0, 0, 0, 0, 0, 4,4,4,4, 3},
- {"", -1, 0, 0, 0, 0}
-};
-
-CPU cpus_super286tr[] =
-{
- /*286*/
- {"286/12", CPU_286, fpus_80286, 3, 12000000, 1, 0, 0, 0, 0, 0, 3,3,3,3, 2},
- {"", -1, 0, 0, 0, 0}
-};
-
-CPU cpus_ibmat[] =
-{
- /*286*/
- {"286/6", CPU_286, fpus_80286, 0, 6000000, 1, 0, 0, 0, 0, 0, 3,3,3,3, 1},
- {"286/8", CPU_286, fpus_80286, 0, 8000000, 1, 0, 0, 0, 0, 0, 3,3,3,3, 1},
- {"", -1, 0, 0, 0, 0}
-};
-
-CPU cpus_ibmxt286[] =
-{
- /*286*/
- {"286/6", CPU_286, fpus_80286, 0, 6000000, 1, 0, 0, 0, 0, 0, 2,2,2,2, 1},
- {"", -1, 0, 0, 0, 0}
-};
-
-CPU cpus_ps1_m2011[] =
-{
- /*286*/
- {"286/10", CPU_286, fpus_80286, 2, 10000000, 1, 0, 0, 0, 0, 0, 2,2,2,2, 1},
- {"", -1, 0, 0, 0, 0}
-};
-
-CPU cpus_ps2_m30_286[] =
-{
- /*286*/
- {"286/10", CPU_286, fpus_80286, 2, 10000000, 1, 0, 0, 0, 0, 0, 2,2,2,2, 1},
- {"286/12", CPU_286, fpus_80286, 3, 12000000, 1, 0, 0, 0, 0, 0, 3,3,3,3, 2},
- {"286/16", CPU_286, fpus_80286, 4, 16000000, 1, 0, 0, 0, 0, 0, 3,3,3,3, 2},
- {"286/20", CPU_286, fpus_80286, 5, 20000000, 1, 0, 0, 0, 0, 0, 4,4,4,4, 3},
- {"286/25", CPU_286, fpus_80286, 6, 25000000, 1, 0, 0, 0, 0, 0, 4,4,4,4, 3},
- {"", -1, 0, 0, 0, 0}
-};
-
-CPU cpus_i386SX[] =
-{
- /*i386SX*/
- {"i386SX/16", CPU_386SX, fpus_80386, 0, 16000000, 1, 0, 0x2308, 0, 0, 0, 3,3,3,3, 2},
- {"i386SX/20", CPU_386SX, fpus_80386, 1, 20000000, 1, 0, 0x2308, 0, 0, 0, 4,4,3,3, 3},
- {"i386SX/25", CPU_386SX, fpus_80386, 2, 25000000, 1, 0, 0x2308, 0, 0, 0, 4,4,3,3, 3},
- {"i386SX/33", CPU_386SX, fpus_80386, 3, 33333333, 1, 0, 0x2308, 0, 0, 0, 6,6,3,3, 4},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_i386DX[] =
-{
- /*i386DX*/
- {"i386DX/16", CPU_386DX, fpus_80386, 0, 16000000, 1, 0, 0x0308, 0, 0, 0, 3,3,3,3, 2},
- {"i386DX/20", CPU_386DX, fpus_80386, 1, 20000000, 1, 0, 0x0308, 0, 0, 0, 4,4,3,3, 3},
- {"i386DX/25", CPU_386DX, fpus_80386, 2, 25000000, 1, 0, 0x0308, 0, 0, 0, 4,4,3,3, 3},
- {"i386DX/33", CPU_386DX, fpus_80386, 3, 33333333, 1, 0, 0x0308, 0, 0, 0, 6,6,3,3, 4},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_acer[] =
-{
- /*i386SX*/
- {"i386SX/25", CPU_386SX, fpus_80386, 2, 25000000, 1, 0, 0x2308, 0, 0, 0, 4,4,4,4, 3},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_Am386SX[] =
-{
- /*Am386*/
- {"Am386SX/16", CPU_386SX, fpus_80386, 0, 16000000, 1, 0, 0x2308, 0, 0, 0, 3,3,3,3, 2},
- {"Am386SX/20", CPU_386SX, fpus_80386, 1, 20000000, 1, 0, 0x2308, 0, 0, 0, 4,4,3,3, 3},
- {"Am386SX/25", CPU_386SX, fpus_80386, 2, 25000000, 1, 0, 0x2308, 0, 0, 0, 4,4,3,3, 3},
- {"Am386SX/33", CPU_386SX, fpus_80386, 3, 33333333, 1, 0, 0x2308, 0, 0, 0, 6,6,3,3, 4},
- {"Am386SX/40", CPU_386SX, fpus_80386, 4, 40000000, 1, 0, 0x2308, 0, 0, 0, 7,7,3,3, 5},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_Am386DX[] =
-{
- /*Am386*/
- {"Am386DX/25", CPU_386DX, fpus_80386, 2, 25000000, 1, 0, 0x0308, 0, 0, 0, 4,4,3,3, 3},
- {"Am386DX/33", CPU_386DX, fpus_80386, 3, 33333333, 1, 0, 0x0308, 0, 0, 0, 6,6,3,3, 4},
- {"Am386DX/40", CPU_386DX, fpus_80386, 4, 40000000, 1, 0, 0x0308, 0, 0, 0, 7,7,3,3, 5},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_486SLC[] =
-{
- /*Cx486SLC*/
- {"Cx486SLC/20", CPU_486SLC, fpus_80386, 1, 20000000, 1, 0, 0x400, 0, 0x0000, 0, 4,4,3,3, 3},
- {"Cx486SLC/25", CPU_486SLC, fpus_80386, 2, 25000000, 1, 0, 0x400, 0, 0x0000, 0, 4,4,3,3, 3},
- {"Cx486SLC/33", CPU_486SLC, fpus_80386, 3, 33333333, 1, 0, 0x400, 0, 0x0000, 0, 6,6,3,3, 4},
- {"Cx486SRx2/32", CPU_486SLC, fpus_80386, 3, 32000000, 2, 0, 0x406, 0, 0x0006, 0, 6,6,6,6, 2*2},
- {"Cx486SRx2/40", CPU_486SLC, fpus_80386, 4, 40000000, 2, 0, 0x406, 0, 0x0006, 0, 8,8,6,6, 2*3},
- {"Cx486SRx2/50", CPU_486SLC, fpus_80386, 5, 50000000, 2, 0, 0x406, 0, 0x0006, 0, 8,8,6,6, 2*3},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_486DLC[] =
-{
- /*Cx486DLC*/
- {"Cx486DLC/25", CPU_486DLC, fpus_80386, 2, 25000000, 1, 0, 0x401, 0, 0x0001, 0, 4,4,3,3, 3},
- {"Cx486DLC/33", CPU_486DLC, fpus_80386, 3, 33333333, 1, 0, 0x401, 0, 0x0001, 0, 6,6,3,3, 4},
- {"Cx486DLC/40", CPU_486DLC, fpus_80386, 4, 40000000, 1, 0, 0x401, 0, 0x0001, 0, 7,7,3,3, 5},
- {"Cx486DRx2/32", CPU_486DLC, fpus_80386, 3, 32000000, 2, 0, 0x407, 0, 0x0007, 0, 6,6,6,6, 2*2},
- {"Cx486DRx2/40", CPU_486DLC, fpus_80386, 4, 40000000, 2, 0, 0x407, 0, 0x0007, 0, 8,8,6,6, 2*3},
- {"Cx486DRx2/50", CPU_486DLC, fpus_80386, 5, 50000000, 2, 0, 0x407, 0, 0x0007, 0, 8,8,6,6, 2*3},
- {"Cx486DRx2/66", CPU_486DLC, fpus_80386, 6, 66666666, 2, 0, 0x407, 0, 0x0007, 0, 12,12,6,6, 2*4},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_i486[] =
-{
- /*i486*/
- {"i486SX/16", CPU_i486SX, fpus_none, 0, 16000000, 1, 16000000, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 3,3,3,3, 2},
- {"i486SX/20", CPU_i486SX, fpus_none, 1, 20000000, 1, 20000000, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 4,4,3,3, 3},
- {"i486SX/25", CPU_i486SX, fpus_none, 2, 25000000, 1, 25000000, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 4,4,3,3, 3},
- {"i486SX/33", CPU_i486SX, fpus_none, 3, 33333333, 1, 33333333, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3, 4},
- {"i486SX2/50", CPU_i486SX, fpus_none, 5, 50000000, 2, 25000000, 0x45b, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6, 2*3},
- {"i486DX/25", CPU_i486DX, fpus_builtin, 2, 25000000, 1, 25000000, 0x404, 0, 0, CPU_SUPPORTS_DYNAREC, 4,4,3,3, 3},
- {"i486DX/33", CPU_i486DX, fpus_builtin, 3, 33333333, 1, 33333333, 0x404, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3, 4},
- {"i486DX/50", CPU_i486DX, fpus_builtin, 5, 50000000, 1, 25000000, 0x404, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,4,4, 6},
- {"i486DX2/40", CPU_i486DX, fpus_builtin, 4, 40000000, 2, 20000000, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6, 2*3},
- {"i486DX2/50", CPU_i486DX, fpus_builtin, 5, 50000000, 2, 25000000, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6, 2*3},
- {"i486DX2/66", CPU_i486DX, fpus_builtin, 6, 66666666, 2, 33333333, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6, 2*4},
- {"iDX4/75", CPU_iDX4, fpus_builtin, 7, 75000000, 3, 25000000, 0x481, 0x481, 0, CPU_SUPPORTS_DYNAREC, 12,12,9,9, 3*3}, /*CPUID available on DX4, >= 75 MHz*/
- {"iDX4/100", CPU_iDX4, fpus_builtin, 10, 100000000, 3, 33333333, 0x481, 0x481, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9, 3*4}, /*Is on some real Intel DX2s, limit here is pretty arbitary*/
- {"Pentium OverDrive/63", CPU_PENTIUM, fpus_builtin, 6, 62500000, 3, 25000000, 0x1531, 0x1531, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,7,7, (5*3)/2},
- {"Pentium OverDrive/83", CPU_PENTIUM, fpus_builtin, 8, 83333333, 3, 33333333, 0x1532, 0x1532, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,8,8, (5*4)/2},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_Am486[] =
-{
- /*Am486/5x86*/
- {"Am486SX/33", CPU_Am486SX, fpus_none, 3, 33333333, 1, 33333333, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3, 4},
- {"Am486SX/40", CPU_Am486SX, fpus_none, 4, 40000000, 1, 20000000, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 7,7,3,3, 5},
- {"Am486SX2/50", CPU_Am486SX, fpus_none, 5, 50000000, 2, 25000000, 0x45b, 0x45b, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6, 2*3}, /*CPUID available on SX2, DX2, DX4, 5x86, >= 50 MHz*/
- {"Am486SX2/66", CPU_Am486SX, fpus_none, 6, 66666666, 2, 33333333, 0x45b, 0x45b, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6, 2*4}, /*Isn't on all real AMD SX2s and DX2s, availability here is pretty arbitary (and distinguishes them from the Intel chips)*/
- {"Am486DX/33", CPU_Am486DX, fpus_builtin, 3, 33333333, 1, 33333333, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3, 4},
- {"Am486DX/40", CPU_Am486DX, fpus_builtin, 4, 40000000, 1, 20000000, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 7,7,3,3, 5},
- {"Am486DX2/50", CPU_Am486DX, fpus_builtin, 5, 50000000, 2, 25000000, 0x470, 0x470, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6, 2*3},
- {"Am486DX2/66", CPU_Am486DX, fpus_builtin, 6, 66666666, 2, 33333333, 0x470, 0x470, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6, 2*4},
- {"Am486DX2/80", CPU_Am486DX, fpus_builtin, 8, 80000000, 2, 20000000, 0x470, 0x470, 0, CPU_SUPPORTS_DYNAREC, 14,14,6,6, 2*5},
- {"Am486DX4/75", CPU_Am486DX, fpus_builtin, 7, 75000000, 3, 25000000, 0x482, 0x482, 0, CPU_SUPPORTS_DYNAREC, 12,12,9,9, 3*3},
- {"Am486DX4/90", CPU_Am486DX, fpus_builtin, 9, 90000000, 3, 30000000, 0x482, 0x482, 0, CPU_SUPPORTS_DYNAREC, 15,15,9,9, 3*4},
- {"Am486DX4/100", CPU_Am486DX, fpus_builtin, 10, 100000000, 3, 33333333, 0x482, 0x482, 0, CPU_SUPPORTS_DYNAREC, 15,15,9,9, 3*4},
- {"Am486DX4/120", CPU_Am486DX, fpus_builtin, 11, 120000000, 3, 20000000, 0x482, 0x482, 0, CPU_SUPPORTS_DYNAREC, 21,21,9,9, 3*5},
- {"Am5x86/P75", CPU_Am486DX, fpus_builtin, 12, 133333333, 4, 33333333, 0x4e0, 0x4e0, 0, CPU_SUPPORTS_DYNAREC, 24,24,12,12, 4*4},
- {"Am5x86/P75+", CPU_Am486DX, fpus_builtin, 13, 160000000, 4, 20000000, 0x4e0, 0x4e0, 0, CPU_SUPPORTS_DYNAREC, 28,28,12,12, 4*5},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_Cx486[] =
-{
- /*Cx486/5x86*/
- {"Cx486S/25", CPU_Cx486S, fpus_none, 2, 25000000, 1, 25000000, 0x420, 0, 0x0010, CPU_SUPPORTS_DYNAREC, 4,4,3,3, 3},
- {"Cx486S/33", CPU_Cx486S, fpus_none, 3, 33333333, 1, 33333333, 0x420, 0, 0x0010, CPU_SUPPORTS_DYNAREC, 6,6,3,3, 4},
- {"Cx486S/40", CPU_Cx486S, fpus_none, 4, 40000000, 1, 20000000, 0x420, 0, 0x0010, CPU_SUPPORTS_DYNAREC, 7,7,3,3, 5},
- {"Cx486DX/33", CPU_Cx486DX, fpus_builtin, 3, 33333333, 1, 33333333, 0x430, 0, 0x051a, CPU_SUPPORTS_DYNAREC, 6,6,3,3, 4},
- {"Cx486DX/40", CPU_Cx486DX, fpus_builtin, 4, 40000000, 1, 20000000, 0x430, 0, 0x051a, CPU_SUPPORTS_DYNAREC, 7,7,3,3, 5},
- {"Cx486DX2/50", CPU_Cx486DX, fpus_builtin, 5, 50000000, 2, 25000000, 0x430, 0, 0x081b, CPU_SUPPORTS_DYNAREC, 8,8,6,6, 2*3},
- {"Cx486DX2/66", CPU_Cx486DX, fpus_builtin, 6, 66666666, 2, 33333333, 0x430, 0, 0x0b1b, CPU_SUPPORTS_DYNAREC, 12,12,6,6, 2*4},
- {"Cx486DX2/80", CPU_Cx486DX, fpus_builtin, 8, 80000000, 2, 20000000, 0x430, 0, 0x311b, CPU_SUPPORTS_DYNAREC, 14,14,16,16, 2*5},
- {"Cx486DX4/75", CPU_Cx486DX, fpus_builtin, 7, 75000000, 3, 25000000, 0x480, 0, 0x361f, CPU_SUPPORTS_DYNAREC, 12,12,9,9, 3*3},
- {"Cx486DX4/100", CPU_Cx486DX, fpus_builtin, 10, 100000000, 3, 33333333, 0x480, 0, 0x361f, CPU_SUPPORTS_DYNAREC, 15,15,9,9, 3*4},
- {"Cx5x86/100", CPU_Cx5x86, fpus_builtin, 10, 100000000, 3, 33333333, 0x480, 0, 0x002f, CPU_SUPPORTS_DYNAREC, 15,15,9,9, 3*4},
- {"Cx5x86/120", CPU_Cx5x86, fpus_builtin, 11, 120000000, 3, 20000000, 0x480, 0, 0x002f, CPU_SUPPORTS_DYNAREC, 21,21,9,9, 3*5},
- {"Cx5x86/133", CPU_Cx5x86, fpus_builtin, 12, 133333333, 4, 33333333, 0x480, 0, 0x002f, CPU_SUPPORTS_DYNAREC, 24,24,12,12, 4*4},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_6x86[] =
-{
- /*Cyrix 6x86*/
- {"6x86-P90", CPU_Cx6x86, fpus_builtin, 17, 80000000, 3, 40000000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 8,8,6,6, 2*5},
- {"6x86-PR120+", CPU_Cx6x86, fpus_builtin, 17, 100000000, 3, 25000000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6, 2*6},
- {"6x86-PR133+", CPU_Cx6x86, fpus_builtin, 17, 110000000, 3, 27500000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6, 2*7},
- {"6x86-PR150+", CPU_Cx6x86, fpus_builtin, 17, 120000000, 3, 30000000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*7},
- {"6x86-PR166+", CPU_Cx6x86, fpus_builtin, 17, 133333333, 3, 33333333, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*8},
- {"6x86-PR200+", CPU_Cx6x86, fpus_builtin, 17, 150000000, 3, 37500000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*9},
-
- /*Cyrix 6x86L*/
- {"6x86L-PR133+", CPU_Cx6x86L, fpus_builtin, 19, 110000000, 3, 27500000, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6, 2*7},
- {"6x86L-PR150+", CPU_Cx6x86L, fpus_builtin, 19, 120000000, 3, 30000000, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*7},
- {"6x86L-PR166+", CPU_Cx6x86L, fpus_builtin, 19, 133333333, 3, 33333333, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*8},
- {"6x86L-PR200+", CPU_Cx6x86L, fpus_builtin, 19, 150000000, 3, 37500000, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*9},
-
- /*Cyrix 6x86MX*/
- {"6x86MX-PR166", CPU_Cx6x86MX, fpus_builtin, 18, 133333333, 3, 33333333, 0x600, 0x600, 0x0451, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*8},
- {"6x86MX-PR200", CPU_Cx6x86MX, fpus_builtin, 18, 166666666, 3, 33333333, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*8)/2},
- {"6x86MX-PR233", CPU_Cx6x86MX, fpus_builtin, 18, 188888888, 3, 37500000, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*9)/2},
- {"6x86MX-PR266", CPU_Cx6x86MX, fpus_builtin, 18, 207500000, 3, 41666667, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 17,17,7,7, (5*10)/2},
-
- /*Cyrix M II*/
- {"M II-200", CPU_Cx6x86MX, fpus_builtin, 18, 166666666, 3, 33333333, 0x600, 0x600, 0x0854, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*8)/2},
- {"M II-233", CPU_Cx6x86MX, fpus_builtin, 18, 188888888, 3, 37500000, 0x601, 0x601, 0x0854, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*9)/2},
- {"M II-266", CPU_Cx6x86MX, fpus_builtin, 18, 207500000, 3, 41666667, 0x601, 0x601, 0x0853, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 17,17,7,7, (5*10)/2},
- {"M II-300", CPU_Cx6x86MX, fpus_builtin, 18, 233333333, 3, 33333333, 0x601, 0x601, 0x0852, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,7,7, (7*8)/2},
- {"M II-333", CPU_Cx6x86MX, fpus_builtin, 18, 250000000, 3, 41666667, 0x601, 0x601, 0x0853, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 20,20,9,9, 3*10},
-
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_6x86_SS7[] =
-{
- /*Cyrix 6x86*/
- {"6x86-P90", CPU_Cx6x86, fpus_builtin, 17, 80000000, 3, 40000000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 8,8,6,6, 2*5},
- {"6x86-PR120+", CPU_Cx6x86, fpus_builtin, 17, 100000000, 3, 25000000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6, 2*6},
- {"6x86-PR133+", CPU_Cx6x86, fpus_builtin, 17, 110000000, 3, 27500000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6, 2*7},
- {"6x86-PR150+", CPU_Cx6x86, fpus_builtin, 17, 120000000, 3, 30000000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*7},
- {"6x86-PR166+", CPU_Cx6x86, fpus_builtin, 17, 133333333, 3, 33333333, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*8},
- {"6x86-PR200+", CPU_Cx6x86, fpus_builtin, 17, 150000000, 3, 37500000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*9},
-
- /*Cyrix 6x86L*/
- {"6x86L-PR133+", CPU_Cx6x86L, fpus_builtin, 19, 110000000, 3, 27500000, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6, 2*7},
- {"6x86L-PR150+", CPU_Cx6x86L, fpus_builtin, 19, 120000000, 3, 30000000, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*7},
- {"6x86L-PR166+", CPU_Cx6x86L, fpus_builtin, 19, 133333333, 3, 33333333, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*8},
- {"6x86L-PR200+", CPU_Cx6x86L, fpus_builtin, 19, 150000000, 3, 37500000, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*9},
-
- /*Cyrix 6x86MX*/
- {"6x86MX-PR166", CPU_Cx6x86MX, fpus_builtin, 18, 133333333, 3, 33333333, 0x600, 0x600, 0x0451, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*8},
- {"6x86MX-PR200", CPU_Cx6x86MX, fpus_builtin, 18, 166666666, 3, 33333333, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*8)/2},
- {"6x86MX-PR233", CPU_Cx6x86MX, fpus_builtin, 18, 188888888, 3, 37500000, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*9)/2},
- {"6x86MX-PR266", CPU_Cx6x86MX, fpus_builtin, 18, 207500000, 3, 41666667, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 17,17,7,7, (5*10)/2},
-
- /*Cyrix M II*/
- {"M II-200", CPU_Cx6x86MX, fpus_builtin, 18, 166666666, 3, 33333333, 0x600, 0x600, 0x0854, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*8)/2},
- {"M II-233", CPU_Cx6x86MX, fpus_builtin, 18, 188888888, 3, 37500000, 0x601, 0x601, 0x0854, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*9)/2},
- {"M II-266", CPU_Cx6x86MX, fpus_builtin, 18, 207500000, 3, 41666667, 0x601, 0x601, 0x0853, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 17,17,7,7, (5*10)/2},
- {"M II-300", CPU_Cx6x86MX, fpus_builtin, 18, 233333333, 3, 33333333, 0x601, 0x601, 0x0852, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,7,7, (7*8)/2},
- {"M II-333", CPU_Cx6x86MX, fpus_builtin, 18, 250000000, 3, 41666667, 0x601, 0x601, 0x0853, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 20,20,9,9, 3*10},
- {"M II-366", CPU_Cx6x86MX, fpus_builtin, 18, 250000000, 3, 33333333, 0x601, 0x601, 0x0852, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12, 3*10},
- {"M II-400", CPU_Cx6x86MX, fpus_builtin, 18, 285000000, 3, 31666667, 0x601, 0x601, 0x0853, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 3*11},
- {"M II-433", CPU_Cx6x86MX, fpus_builtin, 18, 300000000, 3, 33333333, 0x601, 0x601, 0x0853, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 3*12},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_WinChip[] =
-{
- /*IDT WinChip*/
- {"WinChip 75", CPU_WINCHIP, fpus_builtin, 7, 75000000, 2, 25000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 8,8,4,4, (3*6)/2},
- {"WinChip 90", CPU_WINCHIP, fpus_builtin, 9, 90000000, 2, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 9,9,4,4, (3*7)/2},
- {"WinChip 100", CPU_WINCHIP, fpus_builtin, 10, 100000000, 2, 33333333, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 9,9,4,4, (3*8)/2},
- {"WinChip 120", CPU_WINCHIP, fpus_builtin, 11, 120000000, 2, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6, 2*7},
- {"WinChip 133", CPU_WINCHIP, fpus_builtin, 12, 133333333, 2, 33333333, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6, 2*8},
- {"WinChip 150", CPU_WINCHIP, fpus_builtin, 13, 150000000, 3, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 15,15,7,7, (5*7)/2},
- {"WinChip 166", CPU_WINCHIP, fpus_builtin, 15, 166666666, 3, 33333333, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 15,15,7,7, (5*8)/2},
- {"WinChip 180", CPU_WINCHIP, fpus_builtin, 16, 180000000, 3, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9, 3*7},
- {"WinChip 200", CPU_WINCHIP, fpus_builtin, 17, 200000000, 3, 33333333, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9, 3*8},
- {"WinChip 240", CPU_WINCHIP, fpus_builtin, 17, 240000000, 6, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 24,24,12,12, 4*7},
- {"WinChip 2/200", CPU_WINCHIP2, fpus_builtin, 17, 200000000, 3, 33333333, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9, 3*8},
- {"WinChip 2/240", CPU_WINCHIP2, fpus_builtin, 17, 240000000, 6, 30000000, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC, 24,24,12,12, 30},
- {"WinChip 2A/200", CPU_WINCHIP2, fpus_builtin, 17, 200000000, 3, 33333333, 0x587, 0x587, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9, 3*8},
- {"WinChip 2A/233", CPU_WINCHIP2, fpus_builtin, 17, 233333333, 3, 33333333, 0x587, 0x587, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9, (7*8)/2},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_WinChip_SS7[] =
-{
- /*IDT WinChip (Super Socket 7)*/
- {"WinChip 200", CPU_WINCHIP, fpus_builtin, 17, 200000000, 3, 33333333, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9, 3*8},
- {"WinChip 225", CPU_WINCHIP, fpus_builtin, 17, 225000000, 3, 37500000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9, 3*9},
- {"WinChip 240", CPU_WINCHIP, fpus_builtin, 17, 240000000, 6, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 24,24,12,12, 4*7},
- {"WinChip 2/200", CPU_WINCHIP2, fpus_builtin, 17, 200000000, 3, 33333333, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9, 3*8},
- {"WinChip 2/225", CPU_WINCHIP2, fpus_builtin, 17, 225000000, 3, 37500000, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9, 3*9},
- {"WinChip 2/240", CPU_WINCHIP2, fpus_builtin, 17, 240000000, 6, 30000000, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC, 24,24,12,12, 30},
- {"WinChip 2/250", CPU_WINCHIP2, fpus_builtin, 17, 250000000, 6, 41666667, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC, 24,24,12,12, 30},
- {"WinChip 2A/200", CPU_WINCHIP2, fpus_builtin, 17, 200000000, 3, 33333333, 0x587, 0x587, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9, 24},
- {"WinChip 2A/233", CPU_WINCHIP2, fpus_builtin, 17, 233333333, 3, 33333333, 0x587, 0x587, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9, 28},
- {"WinChip 2A/266", CPU_WINCHIP2, fpus_builtin, 17, 233333333, 6, 33333333, 0x587, 0x587, 0, CPU_SUPPORTS_DYNAREC, 24,24,12,12, 28},
- {"WinChip 2A/300", CPU_WINCHIP2, fpus_builtin, 17, 250000000, 6, 33333333, 0x587, 0x587, 0, CPU_SUPPORTS_DYNAREC, 24,24,12,12, 30},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_Pentium5V[] =
-{
- /*Intel Pentium (5V, socket 4)*/
- {"Pentium 60", CPU_PENTIUM, fpus_builtin, 6, 60000000, 1, 30000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3, 7},
- {"Pentium 66", CPU_PENTIUM, fpus_builtin, 6, 66666666, 1, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3, 8},
- {"Pentium OverDrive 120", CPU_PENTIUM, fpus_builtin, 14, 120000000, 2, 30000000, 0x51A, 0x51A, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*7},
- {"Pentium OverDrive 133", CPU_PENTIUM, fpus_builtin, 16, 133333333, 2, 33333333, 0x51A, 0x51A, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*8},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_PentiumS5[] =
-{
- /*Intel Pentium (Socket 5)*/
- {"Pentium 75", CPU_PENTIUM, fpus_builtin, 9, 75000000, 2, 25000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4, (3*6)/2},
- {"Pentium 90", CPU_PENTIUM, fpus_builtin, 12, 90000000, 2, 30000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4, (3*7)/2},
- {"Pentium 100/50", CPU_PENTIUM, fpus_builtin, 13, 100000000, 2, 25000000, 0x525, 0x525, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6, 2*6},
- {"Pentium 100/66", CPU_PENTIUM, fpus_builtin, 13, 100000000, 2, 33333333, 0x525, 0x525, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4, (3*8)/2},
- {"Pentium 120", CPU_PENTIUM, fpus_builtin, 14, 120000000, 2, 30000000, 0x526, 0x526, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*7},
- {"Pentium 133", CPU_PENTIUM, fpus_builtin, 16, 133333333, 2, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*8},
- {"Pentium OverDrive 125",CPU_PENTIUM,fpus_builtin, 15, 125000000, 3, 25000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,7,7, (5*6)/2},
- {"Pentium OverDrive 150",CPU_PENTIUM,fpus_builtin, 17, 150000000, 3, 30000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*7)/2},
- {"Pentium OverDrive 166",CPU_PENTIUM,fpus_builtin, 17, 166666666, 3, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*8)/2},
- {"Pentium OverDrive MMX 125", CPU_PENTIUMMMX, fpus_builtin, 15,125000000, 3, 25000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,7,7, (5*6)/2},
- {"Pentium OverDrive MMX 150/60", CPU_PENTIUMMMX, fpus_builtin, 17,150000000, 3, 30000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*7)/2},
- {"Pentium OverDrive MMX 166", CPU_PENTIUMMMX, fpus_builtin, 19,166000000, 3, 33333333, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*8)/2},
- {"Pentium OverDrive MMX 180", CPU_PENTIUMMMX, fpus_builtin, 20,180000000, 3, 30000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 3*7},
- {"Pentium OverDrive MMX 200", CPU_PENTIUMMMX, fpus_builtin, 21,200000000, 3, 33333333, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 3*8},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_Pentium[] =
-{
- /*Intel Pentium*/
- {"Pentium 75", CPU_PENTIUM, fpus_builtin, 9, 75000000, 2, 25000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4, (3*6)/2},
- {"Pentium 90", CPU_PENTIUM, fpus_builtin, 12, 90000000, 2, 30000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4, (3*7)/2},
- {"Pentium 100/50", CPU_PENTIUM, fpus_builtin, 13, 100000000, 2, 25000000, 0x525, 0x525, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6, 2*6},
- {"Pentium 100/66", CPU_PENTIUM, fpus_builtin, 13, 100000000, 2, 33333333, 0x525, 0x525, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4, (3*8)/2},
- {"Pentium 120", CPU_PENTIUM, fpus_builtin, 14, 120000000, 2, 30000000, 0x526, 0x526, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*7},
- {"Pentium 133", CPU_PENTIUM, fpus_builtin, 16, 133333333, 2, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*8},
- {"Pentium 150", CPU_PENTIUM, fpus_builtin, 17, 150000000, 3, 30000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*7)/2},
- {"Pentium 166", CPU_PENTIUM, fpus_builtin, 19, 166666666, 3, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*8)/2},
- {"Pentium 200", CPU_PENTIUM, fpus_builtin, 21, 200000000, 3, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 3*8},
- {"Pentium MMX 166", CPU_PENTIUMMMX, fpus_builtin, 19, 166666666, 3, 33333333, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*8)/2},
- {"Pentium MMX 200", CPU_PENTIUMMMX, fpus_builtin, 21, 200000000, 3, 33333333, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 3*8},
- {"Pentium MMX 233", CPU_PENTIUMMMX, fpus_builtin, 24, 233333333, 4, 33333333, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10, (7*8)/2},
- {"Mobile Pentium MMX 120", CPU_PENTIUMMMX, fpus_builtin, 14, 120000000, 2, 30000000, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*7},
- {"Mobile Pentium MMX 133", CPU_PENTIUMMMX, fpus_builtin, 16, 133333333, 2, 33333333, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6, 2*8},
- {"Mobile Pentium MMX 150", CPU_PENTIUMMMX, fpus_builtin, 17, 150000000, 3, 30000000, 0x544, 0x544, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*7)/2},
- {"Mobile Pentium MMX 166", CPU_PENTIUMMMX, fpus_builtin, 19, 166666666, 3, 33333333, 0x544, 0x544, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*8)/2},
- {"Mobile Pentium MMX 200", CPU_PENTIUMMMX, fpus_builtin, 21, 200000000, 3, 33333333, 0x581, 0x581, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 3*8},
- {"Mobile Pentium MMX 233", CPU_PENTIUMMMX, fpus_builtin, 24, 233333333, 4, 33333333, 0x581, 0x581, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10, (7*8)/2},
- {"Mobile Pentium MMX 266", CPU_PENTIUMMMX, fpus_builtin, 26, 266666666, 4, 33333333, 0x582, 0x582, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12, 4*8},
- {"Mobile Pentium MMX 300", CPU_PENTIUMMMX, fpus_builtin, 28, 300000000, 5, 33333333, 0x582, 0x582, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, (9*8)/2},
- {"Pentium OverDrive 125", CPU_PENTIUM, fpus_builtin, 15, 125000000, 3, 25000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,7,7, (5*6)/2},
- {"Pentium OverDrive 150", CPU_PENTIUM, fpus_builtin, 17, 150000000, 3, 30000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*7)/2},
- {"Pentium OverDrive 166", CPU_PENTIUM, fpus_builtin, 17, 166666666, 3, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*8)/2},
- {"Pentium OverDrive MMX 125", CPU_PENTIUMMMX, fpus_builtin, 15,125000000, 3, 25000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,7,7, (5*6)/2},
- {"Pentium OverDrive MMX 150/60", CPU_PENTIUMMMX, fpus_builtin, 17,150000000, 3, 30000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*7)/2},
- {"Pentium OverDrive MMX 166", CPU_PENTIUMMMX, fpus_builtin, 19,166000000, 3, 33333333, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*8)/2},
- {"Pentium OverDrive MMX 180", CPU_PENTIUMMMX, fpus_builtin, 20,180000000, 3, 30000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 3*7},
- {"Pentium OverDrive MMX 200", CPU_PENTIUMMMX, fpus_builtin, 21,200000000, 3, 33333333, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 3*8},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_K6_S7[] =
-{
- /*AMD K6*/
- {"K6/166", CPU_K6, fpus_builtin, 19, 166666666, 3, 33333333, 0x561, 0x561, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, 20},
- {"K6/200", CPU_K6, fpus_builtin, 21, 200000000, 3, 33333333, 0x561, 0x561, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 24},
- {"K6/233", CPU_K6, fpus_builtin, 24, 233333333, 4, 33333333, 0x561, 0x561, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10, 28},
- {"K6/266", CPU_K6, fpus_builtin, 26, 266666666, 4, 33333333, 0x570, 0x570, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12, 32},
- {"K6/300", CPU_K6, fpus_builtin, 28, 300000000, 5, 33333333, 0x570, 0x570, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 36},
- {"K6-2/233", CPU_K6_2, fpus_builtin, 24, 233333333, 4, 33333333, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10, 28},
- {"K6-2/266", CPU_K6_2, fpus_builtin, 26, 266666666, 4, 33333333, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12, 32},
- {"K6-2/300 AFR-66", CPU_K6_2, fpus_builtin, 28, 300000000, 5, 33333333, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 36},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_K6_SS7[] =
-{
- /*AMD K6*/
- {"K6/166", CPU_K6, fpus_builtin, 19, 166666666, 3, 33333333, 0x561, 0x561, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, 20},
- {"K6/200", CPU_K6, fpus_builtin, 21, 200000000, 3, 33333333, 0x561, 0x561, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 24},
- {"K6/233", CPU_K6, fpus_builtin, 24, 233333333, 4, 33333333, 0x561, 0x561, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10, 28},
- {"K6/266", CPU_K6, fpus_builtin, 26, 266666666, 4, 33333333, 0x570, 0x570, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12, 32},
- {"K6/300", CPU_K6, fpus_builtin, 28, 300000000, 5, 33333333, 0x570, 0x570, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 36},
- {"K6-2/233", CPU_K6_2, fpus_builtin, 24, 233333333, 4, 33333333, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10, 28},
- {"K6-2/266", CPU_K6_2, fpus_builtin, 26, 266666666, 4, 33333333, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12, 32},
- {"K6-2/300", CPU_K6_2, fpus_builtin, 28, 300000000, 5, 33333333, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 36},
- {"K6-2/333", CPU_K6_2, fpus_builtin, 28, 333333333, 5, 31666667, 0x580, 0x580, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 40},
- {"K6-2/350", CPU_K6_2, fpus_builtin, 28, 350000000, 5, 33333333, 0x58c, 0x58c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 42},
- {"K6-2/366", CPU_K6_2, fpus_builtin, 28, 366666666, 5, 33333333, 0x58c, 0x58c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 44},
- {"K6-2/380", CPU_K6_2, fpus_builtin, 28, 380000000, 5, 31666667, 0x58c, 0x58c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 46},
- {"K6-2/400", CPU_K6_2, fpus_builtin, 28, 400000000, 5, 33333333, 0x58c, 0x58c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 48},
- {"K6-2/450", CPU_K6_2, fpus_builtin, 28, 450000000, 5, 33333333, 0x58c, 0x58c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 54},
- {"K6-2/475", CPU_K6_2, fpus_builtin, 28, 475000000, 5, 31666667, 0x58c, 0x58c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 57},
- {"K6-2/500", CPU_K6_2, fpus_builtin, 28, 500000000, 5, 33333333, 0x58c, 0x58c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 60},
- {"K6-2/533", CPU_K6_2, fpus_builtin, 28, 533333333, 5, 31666667, 0x58c, 0x58c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 64},
- {"K6-2/550", CPU_K6_2, fpus_builtin, 28, 550000000, 5, 33333333, 0x58c, 0x58c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 66},
- {"K6-2+/450", CPU_K6_2P, fpus_builtin, 28, 450000000, 5, 33333333, 0x5d4, 0x5d4, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 54},
- {"K6-2+/475", CPU_K6_2P, fpus_builtin, 28, 475000000, 5, 31666667, 0x5d4, 0x5d4, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 57},
- {"K6-2+/500", CPU_K6_2P, fpus_builtin, 28, 500000000, 5, 33333333, 0x5d4, 0x5d4, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 60},
- {"K6-2+/533", CPU_K6_2P, fpus_builtin, 28, 533333333, 5, 31666667, 0x5d4, 0x5d4, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 64},
- {"K6-2+/550", CPU_K6_2P, fpus_builtin, 28, 550000000, 5, 33333333, 0x5d4, 0x5d4, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 66},
- {"K6-III/400", CPU_K6_3, fpus_builtin, 28, 400000000, 5, 33333333, 0x591, 0x591, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 48},
- {"K6-III/450", CPU_K6_3, fpus_builtin, 28, 450000000, 5, 33333333, 0x591, 0x591, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 54},
- {"K6-III+/400", CPU_K6_3P, fpus_builtin, 28, 400000000, 5, 33333333, 0x5d0, 0x5d0, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 48},
- {"K6-III+/450", CPU_K6_3P, fpus_builtin, 28, 450000000, 5, 33333333, 0x5d0, 0x5d0, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 54},
- {"K6-III+/475", CPU_K6_3P, fpus_builtin, 28, 475000000, 5, 31666667, 0x5d0, 0x5d0, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 57},
- {"K6-III+/500", CPU_K6_3P, fpus_builtin, 28, 500000000, 5, 33333333, 0x5d0, 0x5d0, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13, 60},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_PentiumPro[] =
-{
- /*Intel Pentium Pro*/
- {"Pentium Pro 150", CPU_PENTIUMPRO, fpus_builtin, 17, 150000000, 3, 30000000, 0x617, 0x617, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*7)/2},
- {"Pentium Pro 166", CPU_PENTIUMPRO, fpus_builtin, 19, 166666666, 3, 33333333, 0x617, 0x617, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7, (5*8)/2},
- {"Pentium Pro 180", CPU_PENTIUMPRO, fpus_builtin, 20, 180000000, 3, 30000000, 0x617, 0x617, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 3*8},
- {"Pentium Pro 200", CPU_PENTIUMPRO, fpus_builtin, 21, 200000000, 3, 33333333, 0x617, 0x617, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 3*8},
- {"Pentium II Overdrive 300", CPU_PENTIUM_2, fpus_builtin, 20, 300000000, 3, 30000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 36},
- {"Pentium II Overdrive 333", CPU_PENTIUM_2, fpus_builtin, 21, 333333333, 3, 33333333, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 40},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_Slot1_100MHz[] =
-{
- /*Intel Pentium II*/
- {"Pentium II/233", CPU_PENTIUM_2, fpus_builtin, 20, 233333333, 3, 33333333, 0x634, 0x634, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 28},
- {"Pentium II/266", CPU_PENTIUM_2, fpus_builtin, 20, 266666666, 3, 33333333, 0x634, 0x634, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 32},
- {"Pentium II/300", CPU_PENTIUM_2, fpus_builtin, 20, 300000000, 3, 33333333, 0x634, 0x634, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 36},
- {"Pentium II/333", CPU_PENTIUM_2, fpus_builtin, 20, 333333333, 3, 33333333, 0x651, 0x651, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 40},
- {"Pentium II/350", CPU_PENTIUM_2, fpus_builtin, 20, 350000000, 3, 33333333, 0x651, 0x651, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 42},
- {"Pentium II/400", CPU_PENTIUM_2, fpus_builtin, 20, 400000000, 3, 33333333, 0x652, 0x652, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 48},
- {"Pentium II/450", CPU_PENTIUM_2, fpus_builtin, 20, 450000000, 3, 33333333, 0x652, 0x652, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 54},
- {"Celeron 266", CPU_CELERON, fpus_builtin, 20, 266666666, 3, 33333333, 0x650, 0x650, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 32},
- {"Celeron 300", CPU_CELERON, fpus_builtin, 20, 300000000, 3, 33333333, 0x650, 0x650, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 36},
- {"Celeron-A 300", CPU_CELERON_A, fpus_builtin, 20, 300000000, 3, 33333333, 0x660, 0x660, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 40},
- {"Celeron 333", CPU_CELERON_A, fpus_builtin, 20, 333333333, 3, 33333333, 0x660, 0x660, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 44},
- {"Celeron 366", CPU_CELERON_A, fpus_builtin, 20, 366666666, 3, 33333333, 0x660, 0x660, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 48},
- {"Celeron 400", CPU_CELERON_A, fpus_builtin, 20, 400000000, 3, 33333333, 0x660, 0x660, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 52},
- {"Celeron 433", CPU_CELERON_A, fpus_builtin, 20, 433333333, 3, 33333333, 0x660, 0x660, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 56},
- {"Celeron 466", CPU_CELERON_A, fpus_builtin, 20, 466666666, 3, 33333333, 0x660, 0x660, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 60},
- {"Celeron 500", CPU_CELERON_A, fpus_builtin, 20, 500000000, 3, 33333333, 0x660, 0x660, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 64},
- {"Celeron 533", CPU_CELERON_A, fpus_builtin, 20, 533333333, 3, 33333333, 0x660, 0x660, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 68},
- {"", -1, 0, 0, 0}
-};
-
-CPU cpus_VIA_100MHz[] =
-{
- /*VIA Cyrix III*/
- {"Cyrix III/500", CPU_CYRIX_III, fpus_builtin, 20, 500000000, 3, 33333333, 0x663, 0x663, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 64},
-/*Below are disabled as Windows 98 won't boot. This is most likely a limitation of the timer system*/
-/* {"Cyrix III/550", CPU_CYRIX_III, fpus_builtin, 20, 550000000, 3, 33333333, 0x663, 0x663, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 70},
- {"Cyrix III/600", CPU_CYRIX_III, fpus_builtin, 20, 600000000, 3, 33333333, 0x663, 0x663, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 76},
- {"Cyrix III/650", CPU_CYRIX_III, fpus_builtin, 20, 650000000, 3, 33333333, 0x663, 0x663, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 82},
- {"Cyrix III/700", CPU_CYRIX_III, fpus_builtin, 20, 700000000, 3, 33333333, 0x663, 0x663, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 88},
- {"C3/750", CPU_CYRIX_III, fpus_builtin, 20, 750000000, 3, 33333333, 0x673, 0x673, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 94},
- {"C3/800", CPU_CYRIX_III, fpus_builtin, 20, 800000000, 3, 33333333, 0x673, 0x673, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9, 100},*/
- {"", -1, 0, 0, 0}
-};
diff --git a/src/cs8230.c b/src/cs8230.c
deleted file mode 100644
index c2125ed..0000000
--- a/src/cs8230.c
+++ /dev/null
@@ -1,120 +0,0 @@
-/*CS8230 CHIPSet consists of :
- 82c301 bus controller
- 82c302 page/interleave memory controller
- 82a303 high address buffer
- 82a304 low address buffer
- 82b305 data buffer
- 82a306 control buffer*/
-#include "ibm.h"
-#include "cs8230.h"
-#include "io.h"
-#include "mem.h"
-
-static struct
-{
- int idx;
- uint8_t regs[256];
-} cs8230;
-
-static void shadow_control(uint32_t addr, uint32_t size, int state)
-{
-// pclog("shadow_control: addr=%08x size=%04x state=%02x\n", addr, size, state);
- switch (state)
- {
- case 0x00:
- mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- break;
- case 0x01:
- mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
- break;
- case 0x10:
- mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL);
- break;
- case 0x11:
- mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- break;
- }
- flushmmucache_nopc();
-}
-
-static void rethink_shadow_mappings(void)
-{
- int c;
-
- for (c = 0; c < 4*8; c++) /*Addresses 40000-bffff in 16k blocks*/
- {
- if (cs8230.regs[0xa + (c >> 3)] & (1 << (c & 7)))
- mem_set_mem_state(0x40000 + c*0x4000, 0x4000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); /*IO channel*/
- else
- mem_set_mem_state(0x40000 + c*0x4000, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); /*System board*/
- }
- for (c = 0; c < 2*8; c++) /*Addresses c0000-fffff in 16k blocks. System board ROM can be mapped here*/
- {
- if (cs8230.regs[0xe + (c >> 3)] & (1 << (c & 7)))
- mem_set_mem_state(0xc0000 + c*0x4000, 0x4000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); /*IO channel*/
- else
- shadow_control(0xc0000 + c*0x4000, 0x4000, (cs8230.regs[9] >> (3-(c >> 2))) & 0x11);
- }
-}
-
-static uint8_t cs8230_read(uint16_t port, void *p)
-{
- uint8_t ret = 0xff;
-
- if (port & 1)
- {
- switch (cs8230.idx)
- {
- case 0x04: /*82C301 ID/version*/
- ret = cs8230.regs[cs8230.idx] & ~0xe3;
- break;
-
- case 0x08: /*82C302 ID/Version*/
- ret = cs8230.regs[cs8230.idx] & ~0xe0;
- break;
-
- case 0x05: case 0x06: /*82C301 registers*/
- case 0x09: case 0x0a: case 0x0b: case 0x0c: /*82C302 registers*/
- case 0x0d: case 0x0e: case 0x0f:
- case 0x10: case 0x11: case 0x12: case 0x13:
- case 0x28: case 0x29: case 0x2a:
- ret = cs8230.regs[cs8230.idx];
- break;
- }
- }
-
- return ret;
-}
-
-static void cs8230_write(uint16_t port, uint8_t val, void *p)
-{
- if (!(port & 1))
- cs8230.idx = val;
- else
- {
-// pclog("cs8230_write: reg=%02x val=%02x\n", cs8230.idx, val);
- cs8230.regs[cs8230.idx] = val;
- switch (cs8230.idx)
- {
- case 0x09: /*RAM/ROM Configuration in boot area*/
- case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: /*Address maps*/
- rethink_shadow_mappings();
- break;
- }
- }
-}
-
-void cs8230_init(void)
-{
- memset(&cs8230, 0, sizeof(cs8230));
-
- io_sethandler(0x0022, 0x0002,
- cs8230_read, NULL, NULL,
- cs8230_write, NULL, NULL,
- NULL);
- if (mem_size > 768)
- {
- mem_mapping_set_addr(&ram_mid_mapping, 0xa0000, mem_size > 1024 ? 0x60000 : 0x20000 + (mem_size - 768) * 1024);
- mem_mapping_set_exec(&ram_mid_mapping, ram + 0xa0000);
- }
-}
diff --git a/src/cs8230.h b/src/cs8230.h
deleted file mode 100644
index d4bd4a0..0000000
--- a/src/cs8230.h
+++ /dev/null
@@ -1 +0,0 @@
-void cs8230_init(void);
diff --git a/src/dac.c b/src/dac.c
new file mode 100644
index 0000000..b24561b
--- /dev/null
+++ b/src/dac.c
@@ -0,0 +1,69 @@
+#include "ibm.h"
+#include "dac.h"
+
+uint8_t dac,dac2;
+uint8_t dacctrl;
+int lptfifo;
+uint8_t dssbuffer[16];
+int dssstart=0,dssend=0;
+int dssmode=0;
+
+void writedac(uint16_t addr, uint8_t val)
+{
+ if (dssmode) dac2=val;
+ else dac=val;
+}
+
+void writedacctrl(uint16_t addr, uint8_t val)
+{
+// printf("Write DAC ctrl %02X %i\n",val,lptfifo);
+ if (dacctrl&8 && !(val&8) && (lptfifo!=16))
+ {
+// dac=dac2;
+ dssbuffer[dssend++]=dac2;
+ dssend&=15;
+ lptfifo++;
+ }
+ dacctrl=val;
+}
+
+uint8_t readdacfifo()
+{
+ if (lptfifo==16) return 0x40;
+ return 0;
+}
+
+void pollss()
+{
+ if (lptfifo)
+ {
+ dac=dssbuffer[dssstart++];
+ dssstart&=15;
+ lptfifo--;
+ }
+}
+
+int16_t dacbuffer[SOUNDBUFLEN+20];
+int dacbufferpos=0;
+void getdacsamp()
+{
+ if (dacbufferposSOUNDBUFLEN) dacbufferpos=SOUNDBUFLEN;
+ for (c=0;cname;
if (d->init != NULL)
{
@@ -39,7 +37,6 @@ void device_add(device_t *d)
devices[c] = d;
device_priv[c] = priv;
- current_device_name = NULL;
}
void device_close_all()
diff --git a/src/device.h b/src/device.h
index 38a46bc..0e2dd8c 100644
--- a/src/device.h
+++ b/src/device.h
@@ -1,6 +1,3 @@
-#ifndef _DEVICE_H_
-#define _DEVICE_H_
-
#define CONFIG_STRING 0
#define CONFIG_INT 1
#define CONFIG_BINARY 2
@@ -44,8 +41,6 @@ void device_speed_changed();
void device_force_redraw();
void device_add_status_info(char *s, int max_len);
-extern char *current_device_name;
-
int device_get_config_int(char *name);
char *device_get_config_string(char *name);
@@ -54,11 +49,8 @@ enum
DEVICE_NOT_WORKING = 1, /*Device does not currently work correctly and will be disabled in a release build*/
DEVICE_AT = 2, /*Device requires an AT-compatible system*/
DEVICE_MCA = 0x20, /*Device requires an MCA system*/
- DEVICE_PCI = 0x40, /*Device requires a PCI system*/
- DEVICE_PS1 = 0x80 /*Device is only for IBM PS/1 Model 2011*/
+ DEVICE_PCI = 0x40 /*Device requires a PCI system*/
};
int model_get_config_int(char *s);
char *model_get_config_string(char *s);
-
-#endif
diff --git a/src/disc.c b/src/disc.c
index 6b76b9b..f4ccb2b 100644
--- a/src/disc.c
+++ b/src/disc.c
@@ -9,7 +9,7 @@
#include "timer.h"
int disc_drivesel = 0;
-pc_timer_t disc_poll_timer;
+int disc_poll_time = 16;
int disc_track[2];
int writeprot[2], fwriteprot[2];
@@ -22,6 +22,9 @@ int curdrive = 0;
//char discfns[2][260] = {"", ""};
int defaultwriteprot = 0;
+int fdc_time;
+int disc_time;
+
int fdc_ready;
int drive_empty[2] = {1, 1};
@@ -122,7 +125,7 @@ int disc_hole(int drive)
{
drive ^= fdd_swap;
- if (drive < 2 && drives[drive].hole)
+ if (drives[drive].hole)
{
return drives[drive].hole(drive);
}
@@ -134,16 +137,16 @@ int disc_hole(int drive)
void disc_poll()
{
- timer_advance_u64(&disc_poll_timer, disc_period * TIMER_USEC);
+ disc_poll_time += disc_period * TIMER_USEC;
- if (disc_drivesel < 2 && drives[disc_drivesel].poll)
+ if (drives[disc_drivesel].poll)
drives[disc_drivesel].poll();
if (disc_notfound)
{
disc_notfound--;
if (!disc_notfound)
- fdc_notfound(FDC_STATUS_AM_NOT_FOUND);
+ fdc_notfound();
}
}
@@ -202,29 +205,17 @@ void disc_set_rate(int drive, int drvden, int rate)
void disc_reset()
{
- int drive;
-
curdrive = 0;
disc_period = 32;
- timer_add(&disc_poll_timer, disc_poll, NULL, 0);
-
- for (drive = 0; drive < 2; drive++)
- {
- if (loaders[driveloaders[drive]].close)
- loaders[driveloaders[drive]].close(drive);
- drive_empty[drive] = 1;
- drives[drive].hole = NULL;
- drives[drive].poll = NULL;
- drives[drive].seek = NULL;
- drives[drive].readsector = NULL;
- drives[drive].writesector = NULL;
- drives[drive].readaddress = NULL;
- drives[drive].format = NULL;
- }
+ timer_add(disc_poll, &disc_poll_time, &motoron, NULL);
}
void disc_init()
{
+// pclog("disc_init %p\n", drives);
+ drives[0].poll = drives[1].poll = 0;
+ drives[0].seek = drives[1].seek = 0;
+ drives[0].readsector = drives[1].readsector = 0;
disc_reset();
}
@@ -232,7 +223,7 @@ int oldtrack[2] = {0, 0};
void disc_seek(int drive, int track)
{
// pclog("disc_seek: drive=%i track=%i\n", drive, track);
- if (drive < 2 && drives[drive].seek)
+ if (drives[drive].seek)
drives[drive].seek(drive, track);
// if (track != oldtrack[drive])
// fdc_discchange_clear(drive);
@@ -244,7 +235,7 @@ void disc_readsector(int drive, int sector, int track, int side, int density, in
{
drive ^= fdd_swap;
- if (drive < 2 && drives[drive].readsector)
+ if (drives[drive].readsector)
drives[drive].readsector(drive, sector, track, side, density, sector_size);
else
disc_notfound = 1000;
@@ -254,7 +245,7 @@ void disc_writesector(int drive, int sector, int track, int side, int density, i
{
drive ^= fdd_swap;
- if (drive < 2 && drives[drive].writesector)
+ if (drives[drive].writesector)
drives[drive].writesector(drive, sector, track, side, density, sector_size);
else
disc_notfound = 1000;
@@ -264,7 +255,7 @@ void disc_readaddress(int drive, int track, int side, int density)
{
drive ^= fdd_swap;
- if (drive < 2 && drives[drive].readaddress)
+ if (drives[drive].readaddress)
drives[drive].readaddress(drive, track, side, density);
}
@@ -272,7 +263,7 @@ void disc_format(int drive, int track, int side, int density, uint8_t fill)
{
drive ^= fdd_swap;
- if (drive < 2 && drives[drive].format)
+ if (drives[drive].format)
drives[drive].format(drive, track, side, density, fill);
else
disc_notfound = 1000;
@@ -282,7 +273,7 @@ void disc_stop(int drive)
{
drive ^= fdd_swap;
- if (drive < 2 && drives[drive].stop)
+ if (drives[drive].stop)
drives[drive].stop(drive);
}
@@ -292,12 +283,3 @@ void disc_set_drivesel(int drive)
disc_drivesel = drive;
}
-
-void disc_set_motor_enable(int motor_enable)
-{
- if (motor_enable && !motoron)
- timer_set_delay_u64(&disc_poll_timer, disc_period * TIMER_USEC);
- else if (!motor_enable)
- timer_disable(&disc_poll_timer);
- motoron = motor_enable;
-}
diff --git a/src/disc.h b/src/disc.h
index 714af06..a0214e4 100644
--- a/src/disc.h
+++ b/src/disc.h
@@ -30,21 +30,23 @@ void disc_stop(int drive);
int disc_empty(int drive);
void disc_set_rate(int drive, int drvden, int rate);
void disc_set_drivesel(int drive);
-void disc_set_motor_enable(int motor_enable);
+extern int disc_time;
+extern int disc_poll_time;
extern int disc_drivesel;
void fdc_callback();
int fdc_data(uint8_t dat);
void fdc_spindown();
void fdc_finishread();
-void fdc_notfound(int reason);
+void fdc_notfound();
void fdc_datacrcerror();
void fdc_headercrcerror();
void fdc_writeprotect();
int fdc_getdata(int last);
void fdc_sectorid(uint8_t track, uint8_t side, uint8_t sector, uint8_t size, uint8_t crc1, uint8_t crc2);
void fdc_indexpulse();
-/*extern int fdc_ready;
+/*extern int fdc_time;
+extern int fdc_ready;
extern int fdc_indexcount;*/
extern int motorspin;
diff --git a/src/disc_fdi.c b/src/disc_fdi.c
index 1393bc2..498a623 100644
--- a/src/disc_fdi.c
+++ b/src/disc_fdi.c
@@ -3,7 +3,6 @@
#include "ibm.h"
#include "disc.h"
#include "disc_fdi.h"
-#include "fdc.h"
#include "fdi2raw.h"
static struct
@@ -315,7 +314,7 @@ void fdi_poll()
if (fdi_revs == 3)
{
// pclog("Not found!\n");
- fdc_notfound(FDC_STATUS_NOT_FOUND);
+ fdc_notfound();
fdi_inread = fdi_inreadaddr = 0;
return;
}
diff --git a/src/disc_img.c b/src/disc_img.c
index c18d45a..206eaae 100644
--- a/src/disc_img.c
+++ b/src/disc_img.c
@@ -130,7 +130,7 @@ void img_load(int drive, char *fn)
uint8_t bpb_sectors;
uint8_t bpb_sides;
uint32_t bpt;
- uint8_t max_spt = 0; /* Used for XDF detection. */
+ uint8_t max_spt; /* Used for XDF detection. */
if (!xdf_maps_initialized) initialize_xdf_maps(); /* Initialize XDF maps, will need them to properly register sectors in tracks. */
diff --git a/src/disc_sector.c b/src/disc_sector.c
index 26759bf..8aad435 100644
--- a/src/disc_sector.c
+++ b/src/disc_sector.c
@@ -46,9 +46,7 @@ static int disc_intersector_delay = 0;
static uint8_t disc_sector_fill;
static int cur_sector, cur_byte;
static int index_count;
-
-static int disc_sector_status;
-
+
void disc_sector_reset(int drive, int side)
{
disc_sector_count[drive][side] = 0;
@@ -92,8 +90,6 @@ void disc_sector_readsector(int drive, int sector, int track, int side, int rate
disc_sector_sector = sector;
disc_sector_n = sector_size;
index_count = 0;
-
- disc_sector_status = FDC_STATUS_AM_NOT_FOUND;
}
void disc_sector_writesector(int drive, int sector, int track, int side, int rate, int sector_size)
@@ -107,8 +103,6 @@ void disc_sector_writesector(int drive, int sector, int track, int side, int rat
disc_sector_sector = sector;
disc_sector_n = sector_size;
index_count = 0;
-
- disc_sector_status = FDC_STATUS_AM_NOT_FOUND;
}
void disc_sector_readaddress(int drive, int track, int side, int rate)
@@ -120,8 +114,6 @@ void disc_sector_readaddress(int drive, int track, int side, int rate)
disc_sector_side = side;
disc_sector_drive = drive;
index_count = 0;
-
- disc_sector_status = FDC_STATUS_AM_NOT_FOUND;
}
void disc_sector_format(int drive, int track, int side, int rate, uint8_t fill)
@@ -187,7 +179,7 @@ void disc_sector_poll()
if (index_count > 1)
{
// pclog("Find sector not found\n");
- fdc_notfound(disc_sector_status);
+ fdc_notfound();
disc_sector_state = STATE_IDLE;
break;
}
@@ -195,11 +187,10 @@ void disc_sector_poll()
disc_sector_side != s->h,
disc_sector_sector != s->r,
fdc_get_bitcell_period() != get_bitcell_period());*/
- if (!cur_byte && fdc_get_bitcell_period() == get_bitcell_period() &&
- fdd_can_read_medium(disc_sector_drive ^ fdd_swap))
- disc_sector_status = FDC_STATUS_NOT_FOUND; /*Disc readable, assume address marker found*/
-
- if (cur_byte ||
+ if (cur_byte || disc_sector_track != s->c ||
+ disc_sector_side != s->h ||
+ disc_sector_sector != s->r ||
+ disc_sector_n != s->n ||
fdc_get_bitcell_period() != get_bitcell_period() ||
!fdd_can_read_medium(disc_sector_drive ^ fdd_swap) ||
disc_intersector_delay)
@@ -207,16 +198,6 @@ void disc_sector_poll()
advance_byte();
break;
}
- if (disc_sector_track != s->c ||
- disc_sector_side != s->h ||
- disc_sector_sector != s->r ||
- disc_sector_n != s->n)
- {
- if (disc_sector_track != s->c)
- disc_sector_status = (disc_sector_track == 0xff) ? FDC_STATUS_BAD_CYLINDER : FDC_STATUS_WRONG_CYLINDER;
- advance_byte();
- break;
- }
disc_sector_state = STATE_READ_SECTOR;
case STATE_READ_SECTOR:
// pclog("STATE_READ_SECTOR: cur_byte=%i %i\n", cur_byte, disc_intersector_delay);
@@ -237,14 +218,10 @@ void disc_sector_poll()
if (!(fdd_can_read_medium(disc_sector_drive ^ fdd_swap)))
{
// pclog("Medium is of a density not supported by the drive\n");
- fdc_notfound(FDC_STATUS_AM_NOT_FOUND);
+ fdc_notfound();
disc_sector_state = STATE_IDLE;
break;
}
- if (!cur_byte && fdc_get_bitcell_period() == get_bitcell_period() &&
- fdd_can_read_medium(disc_sector_drive ^ fdd_swap))
- disc_sector_status = FDC_STATUS_NOT_FOUND; /*Disc readable, assume address marker found*/
-
if (cur_byte || !index_count || fdc_get_bitcell_period() != get_bitcell_period() ||
disc_intersector_delay)
{
@@ -267,14 +244,14 @@ void disc_sector_poll()
if (!(fdd_can_read_medium(disc_sector_drive ^ fdd_swap)))
{
// pclog("Medium is of a density not supported by the drive\n");
- fdc_notfound(FDC_STATUS_AM_NOT_FOUND);
+ fdc_notfound();
disc_sector_state = STATE_IDLE;
break;
}
if (index_count)
{
// pclog("Find next sector hit end of track\n");
- fdc_notfound(disc_sector_status);
+ fdc_notfound();
disc_sector_state = STATE_IDLE;
break;
}
@@ -300,45 +277,32 @@ void disc_sector_poll()
if (!(fdd_can_read_medium(disc_sector_drive ^ fdd_swap)))
{
// pclog("Medium is of a density not supported by the drive\n");
- fdc_notfound(FDC_STATUS_AM_NOT_FOUND);
+ fdc_notfound();
disc_sector_state = STATE_IDLE;
break;
}
-
- if (!cur_byte && fdc_get_bitcell_period() == get_bitcell_period() &&
- fdd_can_read_medium(disc_sector_drive ^ fdd_swap))
- disc_sector_status = FDC_STATUS_NOT_FOUND; /*Disc readable, assume address marker found*/
-
if (writeprot[disc_sector_drive])
{
fdc_writeprotect();
- disc_sector_state = STATE_IDLE;
return;
}
if (index_count > 1)
{
// pclog("Write find sector not found\n");
- fdc_notfound(disc_sector_status);
+ fdc_notfound();
disc_sector_state = STATE_IDLE;
break;
}
- if (cur_byte ||
+ if (cur_byte || disc_sector_track != s->c ||
+ disc_sector_side != s->h ||
+ disc_sector_sector != s->r ||
+ disc_sector_n != s->n ||
fdc_get_bitcell_period() != get_bitcell_period() ||
disc_intersector_delay)
{
advance_byte();
break;
}
- if (disc_sector_track != s->c ||
- disc_sector_side != s->h ||
- disc_sector_sector != s->r ||
- disc_sector_n != s->n)
- {
- if (disc_sector_track != s->c)
- disc_sector_status = (disc_sector_track == 0xff) ? FDC_STATUS_BAD_CYLINDER : FDC_STATUS_WRONG_CYLINDER;
- advance_byte();
- break;
- }
disc_sector_state = STATE_WRITE_SECTOR;
case STATE_WRITE_SECTOR:
data = fdc_getdata(cur_byte == ((128 << s->n) - 1));
@@ -358,19 +322,14 @@ void disc_sector_poll()
if (!(fdd_can_read_medium(disc_sector_drive ^ fdd_swap)))
{
// pclog("Medium is of a density not supported by the drive\n");
- fdc_notfound(FDC_STATUS_AM_NOT_FOUND);
+ fdc_notfound();
disc_sector_state = STATE_IDLE;
break;
}
-
- if (!cur_byte && fdc_get_bitcell_period() == get_bitcell_period() &&
- fdd_can_read_medium(disc_sector_drive ^ fdd_swap))
- disc_sector_status = FDC_STATUS_NOT_FOUND; /*Disc readable, assume address marker found*/
-
if (index_count)
{
// pclog("Find next sector hit end of track\n");
- fdc_notfound(disc_sector_status);
+ fdc_notfound();
disc_sector_state = STATE_IDLE;
break;
}
@@ -383,7 +342,6 @@ void disc_sector_poll()
disc_sector_state = STATE_READ_ADDRESS;
case STATE_READ_ADDRESS:
fdc_sectorid(s->c, s->h, s->r, s->n, 0, 0);
- advance_byte();
disc_sector_state = STATE_IDLE;
break;
@@ -391,7 +349,6 @@ void disc_sector_poll()
if (writeprot[disc_sector_drive])
{
fdc_writeprotect();
- disc_sector_state = STATE_IDLE;
return;
}
if (!index_count || fdc_get_bitcell_period() != get_bitcell_period() ||
@@ -403,13 +360,13 @@ void disc_sector_poll()
if (!(fdd_can_read_medium(disc_sector_drive ^ fdd_swap)))
{
// pclog("Medium is of a density not supported by the drive\n");
- fdc_notfound(FDC_STATUS_NOT_FOUND);
+ fdc_notfound();
disc_sector_state = STATE_IDLE;
break;
}
if (fdc_get_bitcell_period() != get_bitcell_period())
{
- fdc_notfound(FDC_STATUS_NOT_FOUND);
+ fdc_notfound();
disc_sector_state = STATE_IDLE;
break;
}
diff --git a/src/dma.c b/src/dma.c
index 76d88a8..eb32dbc 100644
--- a/src/dma.c
+++ b/src/dma.c
@@ -4,7 +4,6 @@
#include "fdc.h"
#include "io.h"
#include "mem.h"
-#include "ps2_mca.h"
#include "video.h"
#include "x86.h"
@@ -12,73 +11,57 @@ static uint8_t dmaregs[16];
static uint8_t dma16regs[16];
static uint8_t dmapages[16];
-static int dma_wp, dma16_wp;
-static uint8_t dma_m;
-static uint8_t dma_stat;
-static uint8_t dma_stat_rq;
-static uint8_t dma_command, dma16_command;
-
-static struct
-{
- int xfr_command, xfr_channel;
- int byte_ptr;
-
- int is_ps2;
-} dma_ps2;
-
-#define DMA_PS2_IOA (1 << 0)
-#define DMA_PS2_XFER_MEM_TO_IO (1 << 2)
-#define DMA_PS2_XFER_IO_TO_MEM (3 << 2)
-#define DMA_PS2_XFER_MASK (3 << 2)
-#define DMA_PS2_DEC2 (1 << 4)
-#define DMA_PS2_SIZE16 (1 << 6)
-
-static void dma_ps2_run(int channel);
-
void dma_reset()
{
int c;
-
- dma_wp = dma16_wp = 0;
- dma_m = 0;
-
+ dma.wp = 0;
for (c = 0; c < 16; c++)
dmaregs[c] = 0;
- for (c = 0; c < 8; c++)
+ for (c = 0; c < 4; c++)
{
- dma[c].mode = 0;
- dma[c].ac = 0;
- dma[c].cc = 0;
- dma[c].ab = 0;
- dma[c].cb = 0;
- dma[c].size = (c & 4) ? 1 : 0;
+ dma.mode[c] = 0;
+ dma.ac[c] = 0;
+ dma.cc[c] = 0;
+ dma.ab[c] = 0;
+ dma.cb[c] = 0;
}
+ dma.m = 0;
+
+ dma16.wp = 0;
+ for (c = 0; c < 16; c++)
+ dma16regs[c] = 0;
+ for (c = 0; c < 4; c++)
+ {
+ dma16.mode[c] = 0;
+ dma16.ac[c] = 0;
+ dma16.cc[c] = 0;
+ dma16.ab[c] = 0;
+ dma16.cb[c] = 0;
+ }
+ dma16.m = 0;
}
uint8_t dma_read(uint16_t addr, void *priv)
{
- int channel = (addr >> 1) & 3;
uint8_t temp;
// printf("Read DMA %04X %04X:%04X %i %02X\n",addr,CS,pc, pic_intpending, pic.pend);
switch (addr & 0xf)
{
case 0: case 2: case 4: case 6: /*Address registers*/
- dma_wp ^= 1;
- if (dma_wp)
- return dma[channel].ac & 0xff;
- return (dma[channel].ac >> 8) & 0xff;
+ dma.wp ^= 1;
+ if (dma.wp)
+ return dma.ac[(addr >> 1) & 3] & 0xff;
+ return (dma.ac[(addr >> 1) & 3] >> 8) & 0xff;
case 1: case 3: case 5: case 7: /*Count registers*/
- dma_wp ^= 1;
- if (dma_wp)
- temp = dma[channel].cc & 0xff;
- else
- temp = dma[channel].cc >> 8;
+ dma.wp ^= 1;
+ if (dma.wp) temp = dma.cc[(addr >> 1) & 3] & 0xff;
+ else temp = dma.cc[(addr >> 1) & 3] >> 8;
return temp;
case 8: /*Status register*/
- temp = dma_stat & 0xf;
- dma_stat &= ~0xf;
+ temp = dma.stat;
+ dma.stat = 0;
return temp;
case 0xd:
@@ -90,131 +73,107 @@ uint8_t dma_read(uint16_t addr, void *priv)
void dma_write(uint16_t addr, uint8_t val, void *priv)
{
- int channel = (addr >> 1) & 3;
// printf("Write DMA %04X %02X %04X:%04X\n",addr,val,CS,pc);
dmaregs[addr & 0xf] = val;
switch (addr & 0xf)
{
case 0: case 2: case 4: case 6: /*Address registers*/
- dma_wp ^= 1;
- if (dma_wp)
- dma[channel].ab = (dma[channel].ab & 0xffff00) | val;
- else
- dma[channel].ab = (dma[channel].ab & 0xff00ff) | (val << 8);
- dma[channel].ac = dma[channel].ab;
+ dma.wp ^= 1;
+ if (dma.wp) dma.ab[(addr >> 1) & 3] = (dma.ab[(addr >> 1) & 3] & 0xffff00) | val;
+ else dma.ab[(addr >> 1) & 3] = (dma.ab[(addr >> 1) & 3] & 0xff00ff) | (val << 8);
+ dma.ac[(addr >> 1) & 3] = dma.ab[(addr >> 1) & 3];
// pclog("Addr = %04x\n", dma.ab[(addr >> 1) & 3]);
return;
case 1: case 3: case 5: case 7: /*Count registers*/
- dma_wp ^= 1;
- if (dma_wp)
- dma[channel].cb = (dma[channel].cb & 0xff00) | val;
- else
- dma[channel].cb = (dma[channel].cb & 0x00ff) | (val << 8);
- dma[channel].cc = dma[channel].cb;
+ dma.wp ^= 1;
+ if (dma.wp) dma.cb[(addr >> 1) & 3] = (dma.cb[(addr >> 1) & 3] & 0xff00) | val;
+ else dma.cb[(addr >> 1) & 3] = (dma.cb[(addr >> 1) & 3] & 0x00ff) | (val << 8);
+ dma.cc[(addr >> 1) & 3] = dma.cb[(addr >> 1) & 3];
return;
case 8: /*Control register*/
- dma_command = val;
+ dma.command = val;
return;
case 0xa: /*Mask*/
- if (val & 4)
- dma_m |= (1 << (val & 3));
- else
- dma_m &= ~(1 << (val & 3));
+ if (val & 4) dma.m |= (1 << (val & 3));
+ else dma.m &= ~(1 << (val & 3));
return;
case 0xb: /*Mode*/
- channel = (val & 3);
- dma[channel].mode = val;
- if (dma_ps2.is_ps2)
+ dma.mode[val & 3] = val;
+ if (dma.is_ps2)
{
- dma[channel].ps2_mode &= ~0x1c;
+ dma.ps2_mode[val & 3] &= ~0x1c;
if (val & 0x20)
- dma[channel].ps2_mode |= 0x10;
+ dma.ps2_mode[val & 3] |= 0x10;
if ((val & 0xc) == 8)
- dma[channel].ps2_mode |= 4;
+ dma.ps2_mode[val & 3] |= 4;
else if ((val & 0xc) == 4)
- dma[channel].ps2_mode |= 0xc;
+ dma.ps2_mode[val & 3] |= 0xc;
}
return;
case 0xc: /*Clear FF*/
- dma_wp = 0;
+ dma.wp = 0;
return;
case 0xd: /*Master clear*/
- dma_wp = 0;
- dma_m |= 0xf;
+ dma.wp = 0;
+ dma.m = 0xf;
return;
case 0xf: /*Mask write*/
- dma_m = (dma_m & 0xf0) | (val & 0xf);
+ dma.m = val & 0xf;
return;
}
}
static uint8_t dma_ps2_read(uint16_t addr, void *priv)
{
- dma_t *dma_c = &dma[dma_ps2.xfr_channel];
uint8_t temp = 0xff;
switch (addr)
{
case 0x1a:
- switch (dma_ps2.xfr_command)
+ switch (dma.xfr_command)
{
case 2: /*Address*/
case 3:
- switch (dma_ps2.byte_ptr)
+ switch (dma.byte_ptr)
{
case 0:
- temp = dma_c->ac & 0xff;
- dma_ps2.byte_ptr = 1;
+ temp = (dma.xfr_channel & 4) ? (dma16.ac[dma.xfr_channel & 3] & 0xff) : (dma.ac[dma.xfr_channel] & 0xff);
+ dma.byte_ptr = 1;
break;
case 1:
- temp = (dma_c->ac >> 8) & 0xff;
- dma_ps2.byte_ptr = 2;
+ temp = (dma.xfr_channel & 4) ? (dma16.ac[dma.xfr_channel & 3] >> 8) : (dma.ac[dma.xfr_channel] >> 8);
+ dma.byte_ptr = 2;
break;
case 2:
- temp = (dma_c->ac >> 16) & 0xff;
- dma_ps2.byte_ptr = 0;
+ temp = (dma.xfr_channel & 4) ? (dma16.ac[dma.xfr_channel & 3] >> 16) : (dma.ac[dma.xfr_channel] >> 16);
+ dma.byte_ptr = 0;
break;
}
break;
case 4: /*Count*/
case 5:
- if (dma_ps2.byte_ptr)
- temp = dma_c->cc >> 8;
+ if (dma.byte_ptr)
+ temp = (dma.xfr_channel & 4) ? (dma16.cc[dma.xfr_channel & 3] >> 8) : (dma.cc[dma.xfr_channel] >> 8);
else
- temp = dma_c->cc & 0xff;
- dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1;
+ temp = (dma.xfr_channel & 4) ? (dma16.cc[dma.xfr_channel & 3] & 0xff) : (dma.cc[dma.xfr_channel] & 0xff);
+ dma.byte_ptr = (dma.byte_ptr + 1) & 1;
break;
- case 6: /*Read DMA status*/
- if (dma_ps2.byte_ptr)
- {
- temp = ((dma_stat_rq & 0xf0) >> 4) | (dma_stat & 0xf0);
- dma_stat &= ~0xf0;
- dma_stat_rq &= ~0xf0;
- }
- else
- {
- temp = (dma_stat_rq & 0xf) | ((dma_stat & 0xf) << 4);
- dma_stat &= ~0xf;
- dma_stat_rq &= ~0xf;
- }
- dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1;
- break;
case 7: /*Mode*/
- temp = dma_c->ps2_mode;
+ temp = (dma.xfr_channel & 4) ? dma16.ps2_mode[dma.xfr_channel & 3] : dma.ps2_mode[dma.xfr_channel];
break;
case 8: /*Arbitration Level*/
- temp = dma_c->arb_level;
+ temp = (dma.xfr_channel & 4) ? dma16.arb_level[dma.xfr_channel & 3] : dma.arb_level[dma.xfr_channel];
break;
default:
- fatal("Bad XFR Read command %i channel %i\n", dma_ps2.xfr_command, dma_ps2.xfr_channel);
+ fatal("Bad XFR Read command %i channel %i\n", dma.xfr_command, dma.xfr_channel);
}
break;
}
@@ -226,7 +185,6 @@ static uint8_t dma_ps2_read(uint16_t addr, void *priv)
static void dma_ps2_write(uint16_t addr, uint8_t val, void *priv)
{
- dma_t *dma_c = &dma[dma_ps2.xfr_channel];
uint8_t mode;
// pclog("Write PS2 DMA %04X %02X %04X:%04X\n",addr,val,CS,cpu_state.pc);
@@ -234,83 +192,114 @@ static void dma_ps2_write(uint16_t addr, uint8_t val, void *priv)
switch (addr)
{
case 0x18:
- dma_ps2.xfr_channel = val & 0x7;
- dma_ps2.xfr_command = val >> 4;
- dma_ps2.byte_ptr = 0;
- switch (dma_ps2.xfr_command)
+ dma.xfr_channel = val & 0x7;
+ dma.xfr_command = val >> 4;
+ dma.byte_ptr = 0;
+ switch (dma.xfr_command)
{
case 9: /*Set DMA mask*/
- dma_m |= (1 << dma_ps2.xfr_channel);
+ if (dma.xfr_channel & 4)
+ dma16.m |= (1 << (dma.xfr_channel & 3));
+ else
+ dma.m |= (1 << dma.xfr_channel);
break;
case 0xa: /*Reset DMA mask*/
- dma_m &= ~(1 << dma_ps2.xfr_channel);
+ if (dma.xfr_channel & 4)
+ dma16.m &= ~(1 << (dma.xfr_channel & 3));
+ else
+ dma.m &= ~(1 << dma.xfr_channel);
break;
- case 0xb:
- if (!(dma_m & (1 << dma_ps2.xfr_channel)))
- dma_ps2_run(dma_ps2.xfr_channel);
- break;
-
-// case 0xb: output = 3; break;
}
break;
case 0x1a:
- switch (dma_ps2.xfr_command)
+ switch (dma.xfr_command)
{
- case 0: /*I/O address*/
- if (dma_ps2.byte_ptr)
- dma_c->io_addr = (dma_c->io_addr & 0x00ff) | (val << 8);
- else
- dma_c->io_addr = (dma_c->io_addr & 0xff00) | val;
- dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1;
- break;
-
case 2: /*Address*/
- switch (dma_ps2.byte_ptr)
+ switch (dma.byte_ptr)
{
case 0:
- dma_c->ac = (dma_c->ac & 0xffff00) | val;
- dma_ps2.byte_ptr = 1;
+ if (dma.xfr_channel & 4)
+ dma16.ac[dma.xfr_channel & 3] = (dma16.ac[dma.xfr_channel & 3] & 0xffff00) | val;
+ else
+ dma.ac[dma.xfr_channel] = (dma.ac[dma.xfr_channel] & 0xffff00) | val;
+ dma.byte_ptr = 1;
break;
case 1:
- dma_c->ac = (dma_c->ac & 0xff00ff) | (val << 8);
- dma_ps2.byte_ptr = 2;
+ if (dma.xfr_channel & 4)
+ dma16.ac[dma.xfr_channel & 3] = (dma16.ac[dma.xfr_channel & 3] & 0xff00ff) | (val << 8);
+ else
+ dma.ac[dma.xfr_channel] = (dma.ac[dma.xfr_channel] & 0xff00ff) | (val << 8);
+ dma.byte_ptr = 2;
break;
case 2:
- dma_c->ac = (dma_c->ac & 0x00ffff) | (val << 16);
- dma_ps2.byte_ptr = 0;
+ if (dma.xfr_channel & 4)
+ dma16.ac[dma.xfr_channel & 3] = (dma16.ac[dma.xfr_channel & 3] & 0x00ffff) | (val << 16);
+ else
+ dma.ac[dma.xfr_channel] = (dma.ac[dma.xfr_channel] & 0x00ffff) | (val << 16);
+ dma.byte_ptr = 0;
break;
}
- dma_c->ab = dma_c->ac;
+ if (dma.xfr_channel & 4)
+ dma16.ab[dma.xfr_channel & 3] = dma16.ac[dma.xfr_channel & 3];
+ else
+ dma.ab[dma.xfr_channel] = dma.ac[dma.xfr_channel];
break;
case 4: /*Count*/
- if (dma_ps2.byte_ptr)
- dma_c->cc = (dma_c->cc & 0xff) | (val << 8);
+ if (dma.byte_ptr)
+ {
+ if (dma.xfr_channel & 4)
+ dma16.cc[dma.xfr_channel & 3] = (dma16.cc[dma.xfr_channel & 3] & 0xff) | (val << 8);
+ else
+ dma.cc[dma.xfr_channel] = (dma.cc[dma.xfr_channel] & 0xff) | (val << 8);
+ }
else
- dma_c->cc = (dma_c->cc & 0xff00) | val;
- dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1;
- dma_c->cb = dma_c->cc;
+ {
+ if (dma.xfr_channel & 4)
+ dma16.cc[dma.xfr_channel & 3] = (dma16.cc[dma.xfr_channel & 3] & 0xff00) | val;
+ else
+ dma.cc[dma.xfr_channel] = (dma.cc[dma.xfr_channel] & 0xff00) | val;
+ }
+ dma.byte_ptr = (dma.byte_ptr + 1) & 1;
+ if (dma.xfr_channel & 4)
+ dma16.cb[dma.xfr_channel & 3] = dma16.cc[dma.xfr_channel & 3];
+ else
+ dma.cb[dma.xfr_channel] = dma.cc[dma.xfr_channel];
break;
case 7: /*Mode register*/
mode = 0;
- if (val & DMA_PS2_DEC2)
+ if (val & 0x10)
mode |= 0x20;
- if ((val & DMA_PS2_XFER_MASK) == DMA_PS2_XFER_MEM_TO_IO)
+ if ((val & 0xc) == 4)
mode |= 8;
- else if ((val & DMA_PS2_XFER_MASK) == DMA_PS2_XFER_IO_TO_MEM)
+ else if ((val & 0xc) == 0xc)
mode |= 4;
- dma_c->mode = (dma_c->mode & ~0x2c) | mode;
- dma_c->ps2_mode = val;
- dma_c->size = val & DMA_PS2_SIZE16;
+ if ((val & 0x40) && !(dma.xfr_channel & 4))
+ fatal("16-bit DMA on 8-bit channel\n");
+ if (!(val & 0x40) && (dma.xfr_channel & 4))
+ fatal("8-bit DMA on 16-bit channel\n");
+ if (dma.xfr_channel & 4)
+ {
+ dma16.mode[dma.xfr_channel & 3] = (dma16.mode[dma.xfr_channel & 3] & ~0x2c) | mode;
+ dma16.ps2_mode[dma.xfr_channel & 3] = val;
+ }
+ else
+ {
+ dma.mode[dma.xfr_channel] = (dma.mode[dma.xfr_channel] & ~0x2c) | mode;
+ dma.ps2_mode[dma.xfr_channel] = val;
+ }
break;
case 8: /*Arbitration Level*/
- dma_c->arb_level = val;
+ if (dma.xfr_channel & 4)
+ dma16.arb_level[dma.xfr_channel & 3] = val;
+ else
+ dma.arb_level[dma.xfr_channel] = val;
break;
default:
- fatal("Bad XFR command %i channel %i val %02x\n", dma_ps2.xfr_command, dma_ps2.xfr_channel, val);
+ fatal("Bad XFR command %i channel %i val %02x\n", dma.xfr_command, dma.xfr_channel, val);
}
break;
}
@@ -318,35 +307,32 @@ static void dma_ps2_write(uint16_t addr, uint8_t val, void *priv)
uint8_t dma16_read(uint16_t addr, void *priv)
{
- int channel = ((addr >> 2) & 3) + 4;
uint8_t temp;
// printf("Read DMA %04X %04X:%04X\n",addr,cs>>4,pc);
addr >>= 1;
switch (addr & 0xf)
{
case 0: case 2: case 4: case 6: /*Address registers*/
- dma16_wp ^= 1;
- if (dma_ps2.is_ps2)
+ dma16.wp ^= 1;
+ if (dma.is_ps2)
{
- if (dma16_wp)
- return dma[channel].ac;
- return (dma[channel].ac >> 8) & 0xff;
+ if (dma16.wp)
+ return dma16.ac[(addr >> 1) & 3] & 0xff;
+ return (dma16.ac[(addr >> 1) & 3] >> 8) & 0xff;
}
- if (dma16_wp)
- return (dma[channel].ac >> 1) & 0xff;
- return (dma[channel].ac >> 9) & 0xff;
+ if (dma16.wp)
+ return (dma16.ac[(addr >> 1) & 3] >> 1) & 0xff;
+ return (dma16.ac[(addr >> 1) & 3] >> 9) & 0xff;
case 1: case 3: case 5: case 7: /*Count registers*/
- dma16_wp ^= 1;
- if (dma16_wp)
- temp = dma[channel].cc & 0xff;
- else
- temp = dma[channel].cc >> 8;
+ dma16.wp ^= 1;
+ if (dma16.wp) temp = dma16.cc[(addr >> 1) & 3] & 0xff;
+ else temp = dma16.cc[(addr >> 1) & 3] >> 8;
return temp;
case 8: /*Status register*/
- temp = dma_stat >> 4;
- dma_stat &= ~0xf0;
+ temp = dma16.stat;
+ dma16.stat = 0;
return temp;
}
return dma16regs[addr & 0xf];
@@ -354,76 +340,66 @@ uint8_t dma16_read(uint16_t addr, void *priv)
void dma16_write(uint16_t addr, uint8_t val, void *priv)
{
- int channel = ((addr >> 2) & 3) + 4;
// printf("Write dma16 %04X %02X %04X:%04X\n",addr,val,CS,pc);
addr >>= 1;
dma16regs[addr & 0xf] = val;
switch (addr & 0xf)
{
case 0: case 2: case 4: case 6: /*Address registers*/
- dma16_wp ^= 1;
- if (dma_ps2.is_ps2)
+ dma16.wp ^= 1;
+ if (dma.is_ps2)
{
- if (dma16_wp)
- dma[channel].ab = (dma[channel].ab & 0xffff00) | val;
- else
- dma[channel].ab = (dma[channel].ab & 0xff00ff) | (val << 8);
+ if (dma16.wp) dma16.ab[(addr >> 1) & 3] = (dma16.ab[(addr >> 1) & 3] & 0xffff00) | val;
+ else dma16.ab[(addr >> 1) & 3] = (dma16.ab[(addr >> 1) & 3] & 0xff00ff) | (val << 8);
}
else
{
- if (dma16_wp)
- dma[channel].ab = (dma[channel].ab & 0xfffe00) | (val << 1);
- else
- dma[channel].ab = (dma[channel].ab & 0xfe01ff) | (val << 9);
+ if (dma16.wp) dma16.ab[(addr >> 1) & 3] = (dma16.ab[(addr >> 1) & 3] & 0xfffe00) | (val << 1);
+ else dma16.ab[(addr >> 1) & 3] = (dma16.ab[(addr >> 1) & 3] & 0xfe01ff) | (val << 9);
}
- dma[channel].ac = dma[channel].ab;
+ dma16.ac[(addr >> 1) & 3] = dma16.ab[(addr >> 1) & 3];
return;
case 1: case 3: case 5: case 7: /*Count registers*/
- dma16_wp ^= 1;
- if (dma16_wp)
- dma[channel].cb = (dma[channel].cb & 0xff00) | val;
- else
- dma[channel].cb = (dma[channel].cb & 0x00ff) | (val << 8);
- dma[channel].cc = dma[channel].cb;
+ dma16.wp ^= 1;
+ if (dma16.wp) dma16.cb[(addr >> 1) & 3] = (dma16.cb[(addr >> 1) & 3] & 0xff00) | val;
+ else dma16.cb[(addr >> 1) & 3] = (dma16.cb[(addr >> 1) & 3] & 0x00ff) | (val << 8);
+ dma16.cc[(addr >> 1) & 3] = dma16.cb[(addr >> 1) & 3];
return;
case 8: /*Control register*/
return;
case 0xa: /*Mask*/
- if (val & 4)
- dma_m |= (0x10 << (val & 3));
- else
- dma_m &= ~(0x10 << (val & 3));
+ if (val & 4) dma16.m |= (1 << (val & 3));
+ else dma16.m &= ~(1 << (val & 3));
return;
case 0xb: /*Mode*/
- channel = (val & 3) + 4;
- dma[channel].mode = val;
- if (dma_ps2.is_ps2)
+ dma16.mode[val & 3] = val;
+ if (dma.is_ps2)
{
- dma[channel].ps2_mode &= ~0x1c;
+ dma16.ps2_mode[val & 3] &= ~0x1c;
if (val & 0x20)
- dma[channel].ps2_mode |= 0x10;
+ dma16.ps2_mode[val & 3] |= 0x10;
if ((val & 0xc) == 8)
- dma[channel].ps2_mode |= 4;
+ dma16.ps2_mode[val & 3] |= 4;
else if ((val & 0xc) == 4)
- dma[channel].ps2_mode |= 0xc;
+ dma16.ps2_mode[val & 3] |= 0xc;
}
return;
case 0xc: /*Clear FF*/
- dma16_wp = 0;
+ dma16.wp = 0;
return;
case 0xd: /*Master clear*/
- dma16_wp = 0;
- dma_m |= 0xf0;
+ dma16.wp = 0;
+ dma16.m = 0xf;
return;
case 0xf: /*Mask write*/
- dma_m = (dma_m & 0x0f) | ((val & 0xf) << 4);
+ dma16.m = val&0xf;
return;
}
}
@@ -435,39 +411,39 @@ void dma_page_write(uint16_t addr, uint8_t val, void *priv)
switch (addr & 0xf)
{
case 1:
- dma[2].page = (AT) ? val : val & 0xf;
- dma[2].ab = (dma[2].ab & 0xffff) | (dma[2].page << 16);
- dma[2].ac = (dma[2].ac & 0xffff) | (dma[2].page << 16);
+ dma.page[2] = (AT) ? val : val & 0xf;
+ dma.ab[2] = (dma.ab[2] & 0xffff) | (dma.page[2] << 16);
+ dma.ac[2] = (dma.ac[2] & 0xffff) | (dma.page[2] << 16);
break;
case 2:
- dma[3].page = (AT) ? val : val & 0xf;
- dma[3].ab = (dma[3].ab & 0xffff) | (dma[3].page << 16);
- dma[3].ac = (dma[3].ac & 0xffff) | (dma[3].page << 16);
+ dma.page[3] = (AT) ? val : val & 0xf;
+ dma.ab[3] = (dma.ab[3] & 0xffff) | (dma.page[3] << 16);
+ dma.ac[3] = (dma.ac[3] & 0xffff) | (dma.page[3] << 16);
break;
case 3:
- dma[1].page = (AT) ? val : val & 0xf;
- dma[1].ab = (dma[1].ab & 0xffff) | (dma[1].page << 16);
- dma[1].ac = (dma[1].ac & 0xffff) | (dma[1].page << 16);
+ dma.page[1] = (AT) ? val : val & 0xf;
+ dma.ab[1] = (dma.ab[1] & 0xffff) | (dma.page[1] << 16);
+ dma.ac[1] = (dma.ac[1] & 0xffff) | (dma.page[1] << 16);
break;
case 7:
- dma[0].page = (AT) ? val : val & 0xf;
- dma[0].ab = (dma[0].ab & 0xffff) | (dma[0].page << 16);
- dma[0].ac = (dma[0].ac & 0xffff) | (dma[0].page << 16);
+ dma.page[0] = (AT) ? val : val & 0xf;
+ dma.ab[0] = (dma.ab[0] & 0xffff) | (dma.page[0] << 16);
+ dma.ac[0] = (dma.ac[0] & 0xffff) | (dma.page[0] << 16);
break;
case 0x9:
- dma[6].page = val & 0xfe;
- dma[6].ab = (dma[6].ab & 0x1ffff) | (dma[6].page << 16);
- dma[6].ac = (dma[6].ac & 0x1ffff) | (dma[6].page << 16);
+ dma16.page[2] = val & 0xfe;
+ dma16.ab[2] = (dma16.ab[2] & 0x1ffff) | (dma16.page[2] << 16);
+ dma16.ac[2] = (dma16.ac[2] & 0x1ffff) | (dma16.page[2] << 16);
break;
case 0xa:
- dma[7].page = val & 0xfe;
- dma[7].ab = (dma[7].ab & 0x1ffff) | (dma[7].page << 16);
- dma[7].ac = (dma[7].ac & 0x1ffff) | (dma[7].page << 16);
+ dma16.page[3] = val & 0xfe;
+ dma16.ab[3] = (dma16.ab[3] & 0x1ffff) | (dma16.page[3] << 16);
+ dma16.ac[3] = (dma16.ac[3] & 0x1ffff) | (dma16.page[3] << 16);
break;
case 0xb:
- dma[5].page = val & 0xfe;
- dma[5].ab = (dma[5].ab & 0x1ffff) | (dma[5].page << 16);
- dma[5].ac = (dma[5].ac & 0x1ffff) | (dma[5].page << 16);
+ dma16.page[1] = val & 0xfe;
+ dma16.ab[1] = (dma16.ab[1] & 0x1ffff) | (dma16.page[1] << 16);
+ dma16.ac[1] = (dma16.ac[1] & 0x1ffff) | (dma16.page[1] << 16);
break;
}
}
@@ -481,7 +457,7 @@ void dma_init()
{
io_sethandler(0x0000, 0x0010, dma_read, NULL, NULL, dma_write, NULL, NULL, NULL);
io_sethandler(0x0080, 0x0008, dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL);
- dma_ps2.is_ps2 = 0;
+ dma.is_ps2 = 0;
}
void dma16_init()
@@ -494,7 +470,7 @@ void ps2_dma_init()
{
io_sethandler(0x0018, 0x0001, dma_ps2_read, NULL, NULL, dma_ps2_write, NULL, NULL, NULL);
io_sethandler(0x001a, 0x0001, dma_ps2_read, NULL, NULL, dma_ps2_write, NULL, NULL, NULL);
- dma_ps2.is_ps2 = 1;
+ dma.is_ps2 = 1;
}
@@ -512,267 +488,190 @@ void _dma_write(uint32_t addr, uint8_t val)
int dma_channel_read(int channel)
{
- dma_t *dma_c = &dma[channel];
uint16_t temp;
int tc = 0;
- if (channel < 4)
- {
- if (dma_command & 0x04)
- return DMA_NODATA;
- }
- else
- {
- if (dma16_command & 0x04)
- return DMA_NODATA;
- }
+ if (dma.command & 0x04)
+ return DMA_NODATA;
if (!AT)
refreshread();
-
- if (dma_m & (1 << channel))
- return DMA_NODATA;
- if ((dma_c->mode & 0xC) != 8)
- return DMA_NODATA;
- if (!dma_c->size)
+ if (channel < 4)
{
- temp = _dma_read(dma_c->ac);
+ if (dma.m & (1 << channel))
+ return DMA_NODATA;
+ if ((dma.mode[channel] & 0xC) != 8)
+ return DMA_NODATA;
- if (dma_c->mode & 0x20)
+ temp = _dma_read(dma.ac[channel]);
+
+ if (dma.mode[channel] & 0x20)
{
- if (dma_ps2.is_ps2)
- dma_c->ac--;
+ if (dma.is_ps2)
+ dma.ac[channel]--;
else
- dma_c->ac = (dma_c->ac & 0xff0000) | ((dma_c->ac - 1) & 0xffff);
+ dma.ac[channel] = (dma.ac[channel] & 0xff0000) | ((dma.ac[channel] - 1) & 0xffff);
}
else
{
- if (dma_ps2.is_ps2)
- dma_c->ac++;
+ if (dma.is_ps2)
+ dma.ac[channel]++;
else
- dma_c->ac = (dma_c->ac & 0xff0000) | ((dma_c->ac + 1) & 0xffff);
+ dma.ac[channel] = (dma.ac[channel] & 0xff0000) | ((dma.ac[channel] + 1) & 0xffff);
}
+ dma.cc[channel]--;
+ if (dma.cc[channel] < 0)
+ {
+ tc = 1;
+ if (dma.mode[channel] & 0x10) /*Auto-init*/
+ {
+ dma.cc[channel] = dma.cb[channel];
+ dma.ac[channel] = dma.ab[channel];
+ }
+ else
+ dma.m |= (1 << channel);
+ dma.stat |= (1 << channel);
+ }
+
+ if (tc)
+ return temp | DMA_OVER;
+ return temp;
}
else
{
- temp = _dma_read(dma_c->ac) |
- (_dma_read(dma_c->ac + 1) << 8);
+ channel &= 3;
+ if (dma16.m & (1 << channel))
+ return DMA_NODATA;
+ if ((dma16.mode[channel] & 0xC) != 8)
+ return DMA_NODATA;
- if (dma_c->mode & 0x20)
+ temp = _dma_read(dma16.ac[channel]) |
+ (_dma_read(dma16.ac[channel] + 1) << 8);
+
+ if (dma16.mode[channel] & 0x20)
{
- if (dma_ps2.is_ps2)
- dma_c->ac -= 2;
+ if (dma.is_ps2)
+ dma16.ac[channel] -= 2;
else
- dma_c->ac = (dma_c->ac & 0xfe0000) | ((dma_c->ac - 2) & 0x1ffff);
+ dma16.ac[channel] = (dma16.ac[channel] & 0xfe0000) | ((dma16.ac[channel] - 2) & 0x1ffff);
}
else
{
- if (dma_ps2.is_ps2)
- dma_c->ac += 2;
+ if (dma.is_ps2)
+ dma16.ac[channel] += 2;
else
- dma_c->ac = (dma_c->ac & 0xfe0000) | ((dma_c->ac + 2) & 0x1ffff);
+ dma16.ac[channel] = (dma16.ac[channel] & 0xfe0000) | ((dma16.ac[channel] + 2) & 0x1ffff);
}
- }
- dma_stat_rq |= (1 << channel);
-
- dma_c->cc--;
- if (dma_c->cc < 0)
- {
- tc = 1;
- if (dma_c->mode & 0x10) /*Auto-init*/
+ dma16.cc[channel]--;
+ if (dma16.cc[channel] < 0)
{
- dma_c->cc = dma_c->cb;
- dma_c->ac = dma_c->ab;
+ tc = 1;
+ if (dma16.mode[channel] & 0x10) /*Auto-init*/
+ {
+ dma16.cc[channel] = dma16.cb[channel];
+ dma16.ac[channel] = dma16.ab[channel];
+ }
+ else
+ dma16.m |= (1 << channel);
+ dma16.stat |= (1 << channel);
}
- else
- dma_m |= (1 << channel);
- dma_stat |= (1 << channel);
- }
- if (tc)
- return temp | DMA_OVER;
- return temp;
+ if (tc)
+ return temp | DMA_OVER;
+ return temp;
+ }
}
int dma_channel_write(int channel, uint16_t val)
{
- dma_t *dma_c = &dma[channel];
-
- if (channel < 4)
- {
- if (dma_command & 0x04)
- return DMA_NODATA;
- }
- else
- {
- if (dma16_command & 0x04)
- return DMA_NODATA;
- }
+ if (dma.command & 0x04)
+ return DMA_NODATA;
if (!AT)
refreshread();
- if (dma_m & (1 << channel))
- return DMA_NODATA;
- if ((dma_c->mode & 0xC) != 4)
- return DMA_NODATA;
-
- if (!dma_c->size)
+ if (channel < 4)
{
- _dma_write(dma_c->ac, val);
-
- if (dma_c->mode & 0x20)
+ if (dma.m & (1 << channel))
+ return DMA_NODATA;
+ if ((dma.mode[channel] & 0xC) != 4)
+ return DMA_NODATA;
+
+ _dma_write(dma.ac[channel], val);
+
+ if (dma.mode[channel] & 0x20)
{
- if (dma_ps2.is_ps2)
- dma_c->ac--;
+ if (dma.is_ps2)
+ dma.ac[channel]--;
else
- dma_c->ac = (dma_c->ac & 0xff0000) | ((dma_c->ac - 1) & 0xffff);
+ dma.ac[channel] = (dma.ac[channel] & 0xff0000) | ((dma.ac[channel] - 1) & 0xffff);
}
else
{
- if (dma_ps2.is_ps2)
- dma_c->ac++;
+ if (dma.is_ps2)
+ dma.ac[channel]++;
else
- dma_c->ac = (dma_c->ac & 0xff0000) | ((dma_c->ac + 1) & 0xffff);
+ dma.ac[channel] = (dma.ac[channel] & 0xff0000) | ((dma.ac[channel] + 1) & 0xffff);
}
+
+ dma.cc[channel]--;
+ if (dma.cc[channel] < 0)
+ {
+ if (dma.mode[channel] & 0x10) /*Auto-init*/
+ {
+ dma.cc[channel] = dma.cb[channel];
+ dma.ac[channel] = dma.ab[channel];
+ }
+ else
+ dma.m |= (1 << channel);
+ dma.stat |= (1 << channel);
+ }
+
+ if (dma.m & (1 << channel))
+ return DMA_OVER;
}
else
{
- _dma_write(dma_c->ac, val);
- _dma_write(dma_c->ac + 1, val >> 8);
+ channel &= 3;
+ if (dma16.m & (1 << channel))
+ return DMA_NODATA;
+ if ((dma16.mode[channel] & 0xC) != 4)
+ return DMA_NODATA;
- if (dma_c->mode & 0x20)
+ _dma_write(dma16.ac[channel], val);
+ _dma_write(dma16.ac[channel] + 1, val >> 8);
+
+ if (dma16.mode[channel] & 0x20)
{
- if (dma_ps2.is_ps2)
- dma_c->ac -= 2;
+ if (dma.is_ps2)
+ dma16.ac[channel] -= 2;
else
- dma_c->ac = (dma_c->ac & 0xfe0000) | ((dma_c->ac - 2) & 0x1ffff);
+ dma16.ac[channel] = (dma16.ac[channel] & 0xfe0000) | ((dma16.ac[channel] - 2) & 0x1ffff);
}
else
{
- if (dma_ps2.is_ps2)
- dma_c->ac += 2;
+ if (dma.is_ps2)
+ dma16.ac[channel] += 2;
else
- dma_c->ac = (dma_c->ac & 0xfe0000) | ((dma_c->ac + 2) & 0x1ffff);
+ dma16.ac[channel] = (dma16.ac[channel] & 0xfe0000) | ((dma16.ac[channel] + 2) & 0x1ffff);
}
- }
- dma_stat_rq |= (1 << channel);
-
- dma_c->cc--;
- if (dma_c->cc < 0)
- {
- if (dma_c->mode & 0x10) /*Auto-init*/
+ dma16.cc[channel]--;
+ if (dma16.cc[channel] < 0)
{
- dma_c->cc = dma_c->cb;
- dma_c->ac = dma_c->ab;
+ if (dma16.mode[channel] & 0x10) /*Auto-init*/
+ {
+ dma16.cc[channel] = dma16.cb[channel] + 1;
+ dma16.ac[channel] = dma16.ab[channel];
+ }
+ dma16.m |= (1 << channel);
+ dma16.stat |= (1 << channel);
}
- else
- dma_m |= (1 << channel);
- dma_stat |= (1 << channel);
+
+ if (dma.m & (1 << channel))
+ return DMA_OVER;
}
-
- if (dma_m & (1 << channel))
- return DMA_OVER;
-
return 0;
}
-
-static void dma_ps2_run(int channel)
-{
- dma_t *dma_c = &dma[channel];
-
- switch (dma_c->ps2_mode & DMA_PS2_XFER_MASK)
- {
- case DMA_PS2_XFER_MEM_TO_IO:
- do
- {
- if (!dma_c->size)
- {
- uint8_t temp = _dma_read(dma_c->ac);
- outb(dma_c->io_addr, temp);
-
- if (dma_c->ps2_mode & DMA_PS2_DEC2)
- dma_c->ac--;
- else
- dma_c->ac++;
- }
- else
- {
- uint16_t temp = _dma_read(dma_c->ac) | (_dma_read(dma_c->ac + 1) << 8);
- outw(dma_c->io_addr, temp);
-
- if (dma_c->ps2_mode & DMA_PS2_DEC2)
- dma_c->ac -= 2;
- else
- dma_c->ac += 2;
- }
-
- dma_stat_rq |= (1 << channel);
- dma_c->cc--;
- } while (dma_c->cc > 0);
-
- dma_stat |= (1 << channel);
- break;
-
- case DMA_PS2_XFER_IO_TO_MEM:
- do
- {
- if (!dma_c->size)
- {
- uint8_t temp = inb(dma_c->io_addr);
- _dma_write(dma_c->ac, temp);
-
- if (dma_c->ps2_mode & DMA_PS2_DEC2)
- dma_c->ac--;
- else
- dma_c->ac++;
- }
- else
- {
- uint16_t temp = inw(dma_c->io_addr);
- _dma_write(dma_c->ac, temp & 0xff);
- _dma_write(dma_c->ac + 1, temp >> 8);
-
- if (dma_c->ps2_mode & DMA_PS2_DEC2)
- dma_c->ac -= 2;
- else
- dma_c->ac += 2;
- }
-
- dma_stat_rq |= (1 << channel);
- dma_c->cc--;
- } while (dma_c->cc > 0);
-
- ps2_cache_clean();
- dma_stat |= (1 << channel);
- break;
-
- default: /*Memory verify*/
- do
- {
- if (!dma_c->size)
- {
- if (dma_c->ps2_mode & DMA_PS2_DEC2)
- dma_c->ac--;
- else
- dma_c->ac++;
- }
- else
- {
- if (dma_c->ps2_mode & DMA_PS2_DEC2)
- dma_c->ac -= 2;
- else
- dma_c->ac += 2;
- }
-
- dma_stat_rq |= (1 << channel);
- dma->cc--;
- } while (dma->cc > 0);
-
- dma_stat |= (1 << channel);
- break;
- }
-}
diff --git a/src/dosbox/cdrom.h b/src/dosbox/cdrom.h
deleted file mode 100644
index 603deb7..0000000
--- a/src/dosbox/cdrom.h
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- * Copyright (C) 2002-2015 The DOSBox Team
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-/* Modified for use with PCem by bit */
-
-#ifndef __CDROM_INTERFACE__
-#define __CDROM_INTERFACE__
-
-#include
-#include
-#include
-#include
-#include
-#include
-//#include "dosbox.h"
-//#include "mem.h"
-//#include "mixer.h"
-//#include "SDL.h"
-//#include "SDL_thread.h"
-
-#include
-typedef signed int Bits;
-typedef unsigned int Bitu;
-typedef int8_t Bit8s;
-typedef uint8_t Bit8u;
-typedef int16_t Bit16s;
-typedef uint16_t Bit16u;
-typedef int32_t Bit32s;
-typedef uint32_t Bit32u;
-
-typedef size_t PhysPt;
-
-#define RAW_SECTOR_SIZE 2352
-#define COOKED_SECTOR_SIZE 2048
-
-#define DATA_TRACK 0x14
-#define AUDIO_TRACK 0x10
-
-#define CD_FPS 75
-#define FRAMES_TO_MSF(f, M,S,F) { \
- int value = f; \
- *(F) = value%CD_FPS; \
- value /= CD_FPS; \
- *(S) = value%60; \
- value /= 60; \
- *(M) = value; \
-}
-#define MSF_TO_FRAMES(M, S, F) ((M)*60*CD_FPS+(S)*CD_FPS+(F))
-
-
-typedef struct SMSF {
- unsigned char min;
- unsigned char sec;
- unsigned char fr;
-} TMSF;
-
-typedef struct SCtrl {
- Bit8u out[4]; // output channel
- Bit8u vol[4]; // channel volume
-} TCtrl;
-
-extern int CDROM_GetMountType(char* path, int force);
-
-class CDROM_Interface
-{
-public:
-// CDROM_Interface (void);
- virtual ~CDROM_Interface (void) {};
-
- virtual bool SetDevice (char* path, int forceCD) = 0;
-
- virtual bool GetUPC (unsigned char& attr, char* upc) = 0;
-
- virtual bool GetAudioTracks (int& stTrack, int& end, TMSF& leadOut) = 0;
- virtual bool GetAudioTrackInfo (int track, int& number, TMSF& start, unsigned char& attr) = 0;
- virtual bool GetAudioSub (int sector, unsigned char& attr, unsigned char& track, unsigned char& index, TMSF& relPos, TMSF& absPos) = 0;
- virtual bool GetMediaTrayStatus (bool& mediaPresent, bool& mediaChanged, bool& trayOpen) = 0;
-
- virtual bool ReadSectors (PhysPt buffer, bool raw, unsigned long sector, unsigned long num) = 0;
-
- virtual bool LoadUnloadMedia (bool unload) = 0;
-
- virtual void InitNewMedia (void) {};
-};
-
-class CDROM_Interface_Image : public CDROM_Interface
-{
-private:
- class TrackFile {
- public:
- virtual bool read(Bit8u *buffer, int seek, int count) = 0;
- virtual int getLength() = 0;
- virtual ~TrackFile() { };
- };
-
- class BinaryFile : public TrackFile {
- public:
- BinaryFile(const char *filename, bool &error);
- ~BinaryFile();
- bool read(Bit8u *buffer, int seek, int count);
- int getLength();
- private:
- BinaryFile();
- std::ifstream *file;
- };
-
- struct Track {
- int number;
- int track_number;
- int attr;
- int start;
- int length;
- int skip;
- int sectorSize;
- bool mode2;
- TrackFile *file;
- };
-
-public:
- CDROM_Interface_Image ();
- virtual ~CDROM_Interface_Image (void);
- void InitNewMedia (void);
- bool SetDevice (char* path, int forceCD);
- bool GetUPC (unsigned char& attr, char* upc);
- bool GetAudioTracks (int& stTrack, int& end, TMSF& leadOut);
- bool GetAudioTrackInfo (int track, int& number, TMSF& start, unsigned char& attr);
- bool GetAudioSub (int sector, unsigned char& attr, unsigned char& track, unsigned char& index, TMSF& relPos, TMSF& absPos);
- bool GetMediaTrayStatus (bool& mediaPresent, bool& mediaChanged, bool& trayOpen);
- bool ReadSectors (PhysPt buffer, bool raw, unsigned long sector, unsigned long num);
- bool LoadUnloadMedia (bool unload);
- bool ReadSector (Bit8u *buffer, bool raw, unsigned long sector);
- bool HasDataTrack (void);
- bool HasAudioTracks (void);
-
- int GetTrack (int sector);
-
-private:
- // player
-static void CDAudioCallBack(Bitu len);
-
- void ClearTracks();
- bool LoadIsoFile(char *filename);
- bool CanReadPVD(TrackFile *file, int sectorSize, bool mode2);
- // cue sheet processing
- bool LoadCueSheet(char *cuefile);
- bool GetRealFileName(std::string& filename, std::string& pathname);
- bool GetCueKeyword(std::string &keyword, std::istream &in);
- bool GetCueFrame(int &frames, std::istream &in);
- bool GetCueString(std::string &str, std::istream &in);
- bool AddTrack(Track &curr, int &shift, int prestart, int &totalPregap, int currPregap);
-
- std::vector tracks;
-typedef std::vector::iterator track_it;
- std::string mcn;
-};
-
-#endif /* __CDROM_INTERFACE__ */
diff --git a/src/dosbox/cdrom_image.cpp b/src/dosbox/cdrom_image.cpp
deleted file mode 100644
index 096777c..0000000
--- a/src/dosbox/cdrom_image.cpp
+++ /dev/null
@@ -1,546 +0,0 @@
-/*
- * Copyright (C) 2002-2015 The DOSBox Team
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-/* Modified for use with PCem by bit */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include //GCC 2.95
-#include
-#include
-#include
-#include "cdrom.h"
-
-#if !defined(WIN32)
-#include
-#else
-#include
-#endif
-
-using namespace std;
-
-#define MAX_LINE_LENGTH 512
-#define MAX_FILENAME_LENGTH 256
-#define CROSS_LEN 512
-
-#define safe_strncpy(a,b,n) do { strncpy((a),(b),(n)-1); (a)[(n)-1] = 0; } while (0)
-
-CDROM_Interface_Image::BinaryFile::BinaryFile(const char *filename, bool &error)
-{
- file = new ifstream(filename, ios::in | ios::binary);
- error = (file == NULL) || (file->fail());
-}
-
-CDROM_Interface_Image::BinaryFile::~BinaryFile()
-{
- delete file;
-}
-
-bool CDROM_Interface_Image::BinaryFile::read(Bit8u *buffer, int seek, int count)
-{
- file->seekg(seek, ios::beg);
- file->read((char*)buffer, count);
- return !(file->fail());
-}
-
-int CDROM_Interface_Image::BinaryFile::getLength()
-{
- file->seekg(0, ios::end);
- int length = (int)file->tellg();
- if (file->fail()) return -1;
- return length;
-}
-
-CDROM_Interface_Image::CDROM_Interface_Image()
-{
-}
-
-CDROM_Interface_Image::~CDROM_Interface_Image()
-{
- ClearTracks();
-}
-
-void CDROM_Interface_Image::InitNewMedia()
-{
-}
-
-bool CDROM_Interface_Image::SetDevice(char* path, int forceCD)
-{
- if (LoadCueSheet(path)) return true;
- if (LoadIsoFile(path)) return true;
-
- // print error message on dosbox console
- //printf("Could not load image file: %s\n", path);
- return false;
-}
-
-bool CDROM_Interface_Image::GetUPC(unsigned char& attr, char* upc)
-{
- attr = 0;
- strcpy(upc, this->mcn.c_str());
- return true;
-}
-
-bool CDROM_Interface_Image::GetAudioTracks(int& stTrack, int& end, TMSF& leadOut)
-{
- stTrack = 1;
- end = (int)(tracks.size() - 1);
- FRAMES_TO_MSF(tracks[tracks.size() - 1].start + 150, &leadOut.min, &leadOut.sec, &leadOut.fr);
- return true;
-}
-
-bool CDROM_Interface_Image::GetAudioTrackInfo(int track, int& track_number, TMSF& start, unsigned char& attr)
-{
- if (track < 1 || track > (int)tracks.size()) return false;
- FRAMES_TO_MSF(tracks[track - 1].start + 150, &start.min, &start.sec, &start.fr);
- track_number = tracks[track - 1].track_number;
- attr = tracks[track - 1].attr;
- return true;
-}
-
-bool CDROM_Interface_Image::GetAudioSub(int sector, unsigned char& attr, unsigned char& track, unsigned char& index, TMSF& relPos, TMSF& absPos)
-{
- int cur_track = GetTrack(sector);
- if (cur_track < 1) return false;
- track = (unsigned char)cur_track;
- attr = tracks[track - 1].attr;
- index = 1;
- FRAMES_TO_MSF(sector + 150, &absPos.min, &absPos.sec, &absPos.fr);
- FRAMES_TO_MSF(sector - tracks[track - 1].start + 150, &relPos.min, &relPos.sec, &relPos.fr);
- return true;
-}
-
-bool CDROM_Interface_Image::GetMediaTrayStatus(bool& mediaPresent, bool& mediaChanged, bool& trayOpen)
-{
- mediaPresent = true;
- mediaChanged = false;
- trayOpen = false;
- return true;
-}
-
-bool CDROM_Interface_Image::ReadSectors(PhysPt buffer, bool raw, unsigned long sector, unsigned long num)
-{
- int sectorSize = raw ? RAW_SECTOR_SIZE : COOKED_SECTOR_SIZE;
- Bitu buflen = num * sectorSize;
- Bit8u* buf = new Bit8u[buflen];
-
- bool success = true; //Gobliiins reads 0 sectors
- for(unsigned long i = 0; i < num; i++) {
- success = ReadSector(&buf[i * sectorSize], raw, sector + i);
- if (!success) break;
- }
-
- memcpy((void*)buffer, buf, buflen);
- delete[] buf;
-
- return success;
-}
-
-bool CDROM_Interface_Image::LoadUnloadMedia(bool unload)
-{
- return true;
-}
-
-int CDROM_Interface_Image::GetTrack(int sector)
-{
- vector::iterator i = tracks.begin();
- vector::iterator end = tracks.end() - 1;
-
- while(i != end) {
- Track &curr = *i;
- Track &next = *(i + 1);
- if (curr.start <= sector && sector < next.start) return curr.number;
- i++;
- }
- return -1;
-}
-
-bool CDROM_Interface_Image::ReadSector(Bit8u *buffer, bool raw, unsigned long sector)
-{
- int track = GetTrack(sector) - 1;
- if (track < 0) return false;
-
- int seek = tracks[track].skip + (sector - tracks[track].start) * tracks[track].sectorSize;
- int length = (raw ? RAW_SECTOR_SIZE : COOKED_SECTOR_SIZE);
- if (tracks[track].sectorSize != RAW_SECTOR_SIZE && raw) return false;
- if (tracks[track].sectorSize == RAW_SECTOR_SIZE && !tracks[track].mode2 && !raw) seek += 16;
- if (tracks[track].mode2 && !raw) seek += 24;
-
- return tracks[track].file->read(buffer, seek, length);
-}
-
-bool CDROM_Interface_Image::LoadIsoFile(char* filename)
-{
- tracks.clear();
-
- // data track
- Track track = {0, 0, 0, 0, 0, 0, 0, false, NULL};
- bool error;
- track.file = new BinaryFile(filename, error);
- if (error) {
- delete track.file;
- return false;
- }
- track.number = 1;
- track.track_number = 1;
- track.attr = DATA_TRACK;//data
-
- // try to detect iso type
- if (CanReadPVD(track.file, COOKED_SECTOR_SIZE, false)) {
- track.sectorSize = COOKED_SECTOR_SIZE;
- track.mode2 = false;
- } else if (CanReadPVD(track.file, RAW_SECTOR_SIZE, false)) {
- track.sectorSize = RAW_SECTOR_SIZE;
- track.mode2 = false;
- } else if (CanReadPVD(track.file, 2336, true)) {
- track.sectorSize = 2336;
- track.mode2 = true;
- } else if (CanReadPVD(track.file, RAW_SECTOR_SIZE, true)) {
- track.sectorSize = RAW_SECTOR_SIZE;
- track.mode2 = true;
- } else return false;
-
- track.length = track.file->getLength() / track.sectorSize;
- tracks.push_back(track);
-
- // leadout track
- track.number = 2;
- track.track_number = 0xAA;
- track.attr = 0;
- track.start = track.length;
- track.length = 0;
- track.file = NULL;
- tracks.push_back(track);
-
- return true;
-}
-
-bool CDROM_Interface_Image::CanReadPVD(TrackFile *file, int sectorSize, bool mode2)
-{
- Bit8u pvd[COOKED_SECTOR_SIZE];
- int seek = 16 * sectorSize; // first vd is located at sector 16
- if (sectorSize == RAW_SECTOR_SIZE && !mode2) seek += 16;
- if (mode2) seek += 24;
- file->read(pvd, seek, COOKED_SECTOR_SIZE);
- // pvd[0] = descriptor type, pvd[1..5] = standard identifier, pvd[6] = iso version (+8 for High Sierra)
- return ((pvd[0] == 1 && !strncmp((char*)(&pvd[1]), "CD001", 5) && pvd[6] == 1) ||
- (pvd[8] == 1 && !strncmp((char*)(&pvd[9]), "CDROM", 5) && pvd[14] == 1));
-}
-
-#if defined(WIN32)
-static string dirname(char * file) {
- char * sep = strrchr(file, '\\');
- if (sep == NULL)
- sep = strrchr(file, '/');
- if (sep == NULL)
- return "";
- else {
- int len = (int)(sep - file);
- char tmp[MAX_FILENAME_LENGTH];
- safe_strncpy(tmp, file, len+1);
- return tmp;
- }
-}
-#endif
-
-bool CDROM_Interface_Image::LoadCueSheet(char *cuefile)
-{
- Track track = {0, 0, 0, 0, 0, 0, 0, false, NULL};
- tracks.clear();
- int shift = 0;
- int currPregap = 0;
- int totalPregap = 0;
- int prestart = 0;
- bool success;
- bool canAddTrack = false;
- char tmp[MAX_FILENAME_LENGTH]; // dirname can change its argument
- safe_strncpy(tmp, cuefile, MAX_FILENAME_LENGTH);
- string pathname(dirname(tmp));
- ifstream in;
- in.open(cuefile, ios::in);
- if (in.fail()) return false;
-
- while(!in.eof()) {
- // get next line
- char buf[MAX_LINE_LENGTH];
- in.getline(buf, MAX_LINE_LENGTH);
- if (in.fail() && !in.eof()) return false; // probably a binary file
- istringstream line(buf);
-
- string command;
- GetCueKeyword(command, line);
-
- if (command == "TRACK") {
- if (canAddTrack) success = AddTrack(track, shift, prestart, totalPregap, currPregap);
- else success = true;
-
- track.start = 0;
- track.skip = 0;
- currPregap = 0;
- prestart = 0;
-
- line >> track.number;
- track.track_number = track.number;
- string type;
- GetCueKeyword(type, line);
-
- if (type == "AUDIO") {
- track.sectorSize = RAW_SECTOR_SIZE;
- track.attr = AUDIO_TRACK;
- track.mode2 = false;
- } else if (type == "MODE1/2048") {
- track.sectorSize = COOKED_SECTOR_SIZE;
- track.attr = DATA_TRACK;
- track.mode2 = false;
- } else if (type == "MODE1/2352") {
- track.sectorSize = RAW_SECTOR_SIZE;
- track.attr = DATA_TRACK;
- track.mode2 = false;
- } else if (type == "MODE2/2336") {
- track.sectorSize = 2336;
- track.attr = DATA_TRACK;
- track.mode2 = true;
- } else if (type == "MODE2/2352") {
- track.sectorSize = RAW_SECTOR_SIZE;
- track.attr = DATA_TRACK;
- track.mode2 = true;
- } else success = false;
-
- canAddTrack = true;
- }
- else if (command == "INDEX") {
- int index;
- line >> index;
- int frame;
- success = GetCueFrame(frame, line);
-
- if (index == 1) track.start = frame;
- else if (index == 0) prestart = frame;
- // ignore other indices
- }
- else if (command == "FILE") {
- if (canAddTrack) success = AddTrack(track, shift, prestart, totalPregap, currPregap);
- else success = true;
- canAddTrack = false;
-
- string filename;
- GetCueString(filename, line);
- GetRealFileName(filename, pathname);
- string type;
- GetCueKeyword(type, line);
-
- track.file = NULL;
- bool error = true;
- if (type == "BINARY") {
- track.file = new BinaryFile(filename.c_str(), error);
- }
- if (error) {
- delete track.file;
- success = false;
- }
- }
- else if (command == "PREGAP") success = GetCueFrame(currPregap, line);
- else if (command == "CATALOG") success = GetCueString(mcn, line);
- // ignored commands
- else if (command == "CDTEXTFILE" || command == "FLAGS" || command == "ISRC"
- || command == "PERFORMER" || command == "POSTGAP" || command == "REM"
- || command == "SONGWRITER" || command == "TITLE" || command == "") success = true;
- // failure
- else success = false;
-
- if (!success) return false;
- }
- // add last track
- if (!AddTrack(track, shift, prestart, totalPregap, currPregap)) return false;
-
- // add leadout track
- track.number++;
- track.track_number = 0xAA;
- track.attr = 0;//sync with load iso
- track.start = 0;
- track.length = 0;
- track.file = NULL;
- if(!AddTrack(track, shift, 0, totalPregap, 0)) return false;
-
- return true;
-}
-
-bool CDROM_Interface_Image::AddTrack(Track &curr, int &shift, int prestart, int &totalPregap, int currPregap)
-{
- // frames between index 0(prestart) and 1(curr.start) must be skipped
- int skip;
- if (prestart > 0) {
- if (prestart > curr.start) return false;
- skip = curr.start - prestart;
- } else skip = 0;
-
- // first track (track number must be 1)
- if (tracks.empty()) {
- if (curr.number != 1) return false;
- curr.skip = skip * curr.sectorSize;
- curr.start += currPregap;
- totalPregap = currPregap;
- tracks.push_back(curr);
- return true;
- }
-
- Track &prev = *(tracks.end() - 1);
-
- // current track consumes data from the same file as the previous
- if (prev.file == curr.file) {
- curr.start += shift;
- prev.length = curr.start + totalPregap - prev.start - skip;
- curr.skip += prev.skip + prev.length * prev.sectorSize + skip * curr.sectorSize;
- totalPregap += currPregap;
- curr.start += totalPregap;
- // current track uses a different file as the previous track
- } else {
- int tmp = prev.file->getLength() - prev.skip;
- prev.length = tmp / prev.sectorSize;
- if (tmp % prev.sectorSize != 0) prev.length++; // padding
-
- curr.start += prev.start + prev.length + currPregap;
- curr.skip = skip * curr.sectorSize;
- shift += prev.start + prev.length;
- totalPregap = currPregap;
- }
-
- // error checks
- if (curr.number <= 1) return false;
- if (prev.number + 1 != curr.number) return false;
- if (curr.start < prev.start + prev.length) return false;
- if (curr.length < 0) return false;
-
- tracks.push_back(curr);
- return true;
-}
-
-bool CDROM_Interface_Image::HasDataTrack(void)
-{
- //Data track has attribute 0x14
- for(track_it it = tracks.begin(); it != tracks.end(); it++) {
- if ((*it).attr == DATA_TRACK) return true;
- }
- return false;
-}
-
-bool CDROM_Interface_Image::HasAudioTracks(void)
-{
- for(track_it it = tracks.begin(); it != tracks.end(); it++) {
- if ((*it).attr == AUDIO_TRACK) return true;
- }
- return false;
-}
-
-
-bool CDROM_Interface_Image::GetRealFileName(string &filename, string &pathname)
-{
- // check if file exists
- struct stat test;
- if (stat(filename.c_str(), &test) == 0) return true;
-
- // check if file with path relative to cue file exists
- string tmpstr(pathname + "/" + filename);
- if (stat(tmpstr.c_str(), &test) == 0) {
- filename = tmpstr;
- return true;
- }
-#if defined (WIN32) || defined(OS2)
- //Nothing
-#else
- //Consider the possibility that the filename has a windows directory seperator (inside the CUE file)
- //which is common for some commercial rereleases of DOS games using DOSBox
-
- string copy = filename;
- size_t l = copy.size();
- for (size_t i = 0; i < l;i++) {
- if(copy[i] == '\\') copy[i] = '/';
- }
-
- if (stat(copy.c_str(), &test) == 0) {
- filename = copy;
- return true;
- }
-
- tmpstr = pathname + "/" + copy;
- if (stat(tmpstr.c_str(), &test) == 0) {
- filename = tmpstr;
- return true;
- }
-
-#endif
- return false;
-}
-
-bool CDROM_Interface_Image::GetCueKeyword(string &keyword, istream &in)
-{
- in >> keyword;
- for(Bitu i = 0; i < keyword.size(); i++) keyword[i] = toupper(keyword[i]);
-
- return true;
-}
-
-bool CDROM_Interface_Image::GetCueFrame(int &frames, istream &in)
-{
- string msf;
- in >> msf;
- int min, sec, fr;
- bool success = sscanf(msf.c_str(), "%d:%d:%d", &min, &sec, &fr) == 3;
- frames = MSF_TO_FRAMES(min, sec, fr);
-
- return success;
-}
-
-bool CDROM_Interface_Image::GetCueString(string &str, istream &in)
-{
- int pos = (int)in.tellg();
- in >> str;
- if (str[0] == '\"') {
- if (str[str.size() - 1] == '\"') {
- str.assign(str, 1, str.size() - 2);
- } else {
- in.seekg(pos, ios::beg);
- char buffer[MAX_FILENAME_LENGTH];
- in.getline(buffer, MAX_FILENAME_LENGTH, '\"'); // skip
- in.getline(buffer, MAX_FILENAME_LENGTH, '\"');
- str = buffer;
- }
- }
- return true;
-}
-
-void CDROM_Interface_Image::ClearTracks()
-{
- vector::iterator i = tracks.begin();
- vector::iterator end = tracks.end();
-
- TrackFile* last = NULL;
- while(i != end) {
- Track &curr = *i;
- if (curr.file != last) {
- delete curr.file;
- last = curr.file;
- }
- i++;
- }
- tracks.clear();
-}
diff --git a/src/dosbox/nukedopl.cpp b/src/dosbox/nukedopl.cpp
deleted file mode 100644
index 374b9bf..0000000
--- a/src/dosbox/nukedopl.cpp
+++ /dev/null
@@ -1,1371 +0,0 @@
-//
-// Nuked OPL3 emulator.
-// Thanks:
-// MAME Development Team(Jarek Burczynski, Tatsuyuki Satoh):
-// Feedback and Rhythm part calculation information.
-// forums.submarine.org.uk(carbon14, opl3):
-// Tremolo and phase generator calculation information.
-// OPLx decapsulated(Matthew Gambrell, Olli Niemitalo):
-// OPL2 ROMs.
-//
-// version: 1.7.4
-//
-
-#include
-#include
-#include
-#include "nukedopl.h"
-
-#define RSM_FRAC 10
-
-// Channel types
-
-enum {
- ch_2op = 0,
- ch_4op = 1,
- ch_4op2 = 2,
- ch_drum = 3
-};
-
-// Envelope key types
-
-enum {
- egk_norm = 0x01,
- egk_drum = 0x02
-};
-
-
-//
-// logsin table
-//
-
-static const Bit16u logsinrom[256] = {
- 0x859, 0x6c3, 0x607, 0x58b, 0x52e, 0x4e4, 0x4a6, 0x471,
- 0x443, 0x41a, 0x3f5, 0x3d3, 0x3b5, 0x398, 0x37e, 0x365,
- 0x34e, 0x339, 0x324, 0x311, 0x2ff, 0x2ed, 0x2dc, 0x2cd,
- 0x2bd, 0x2af, 0x2a0, 0x293, 0x286, 0x279, 0x26d, 0x261,
- 0x256, 0x24b, 0x240, 0x236, 0x22c, 0x222, 0x218, 0x20f,
- 0x206, 0x1fd, 0x1f5, 0x1ec, 0x1e4, 0x1dc, 0x1d4, 0x1cd,
- 0x1c5, 0x1be, 0x1b7, 0x1b0, 0x1a9, 0x1a2, 0x19b, 0x195,
- 0x18f, 0x188, 0x182, 0x17c, 0x177, 0x171, 0x16b, 0x166,
- 0x160, 0x15b, 0x155, 0x150, 0x14b, 0x146, 0x141, 0x13c,
- 0x137, 0x133, 0x12e, 0x129, 0x125, 0x121, 0x11c, 0x118,
- 0x114, 0x10f, 0x10b, 0x107, 0x103, 0x0ff, 0x0fb, 0x0f8,
- 0x0f4, 0x0f0, 0x0ec, 0x0e9, 0x0e5, 0x0e2, 0x0de, 0x0db,
- 0x0d7, 0x0d4, 0x0d1, 0x0cd, 0x0ca, 0x0c7, 0x0c4, 0x0c1,
- 0x0be, 0x0bb, 0x0b8, 0x0b5, 0x0b2, 0x0af, 0x0ac, 0x0a9,
- 0x0a7, 0x0a4, 0x0a1, 0x09f, 0x09c, 0x099, 0x097, 0x094,
- 0x092, 0x08f, 0x08d, 0x08a, 0x088, 0x086, 0x083, 0x081,
- 0x07f, 0x07d, 0x07a, 0x078, 0x076, 0x074, 0x072, 0x070,
- 0x06e, 0x06c, 0x06a, 0x068, 0x066, 0x064, 0x062, 0x060,
- 0x05e, 0x05c, 0x05b, 0x059, 0x057, 0x055, 0x053, 0x052,
- 0x050, 0x04e, 0x04d, 0x04b, 0x04a, 0x048, 0x046, 0x045,
- 0x043, 0x042, 0x040, 0x03f, 0x03e, 0x03c, 0x03b, 0x039,
- 0x038, 0x037, 0x035, 0x034, 0x033, 0x031, 0x030, 0x02f,
- 0x02e, 0x02d, 0x02b, 0x02a, 0x029, 0x028, 0x027, 0x026,
- 0x025, 0x024, 0x023, 0x022, 0x021, 0x020, 0x01f, 0x01e,
- 0x01d, 0x01c, 0x01b, 0x01a, 0x019, 0x018, 0x017, 0x017,
- 0x016, 0x015, 0x014, 0x014, 0x013, 0x012, 0x011, 0x011,
- 0x010, 0x00f, 0x00f, 0x00e, 0x00d, 0x00d, 0x00c, 0x00c,
- 0x00b, 0x00a, 0x00a, 0x009, 0x009, 0x008, 0x008, 0x007,
- 0x007, 0x007, 0x006, 0x006, 0x005, 0x005, 0x005, 0x004,
- 0x004, 0x004, 0x003, 0x003, 0x003, 0x002, 0x002, 0x002,
- 0x002, 0x001, 0x001, 0x001, 0x001, 0x001, 0x001, 0x001,
- 0x000, 0x000, 0x000, 0x000, 0x000, 0x000, 0x000, 0x000
-};
-
-//
-// exp table
-//
-
-static const Bit16u exprom[256] = {
- 0x000, 0x003, 0x006, 0x008, 0x00b, 0x00e, 0x011, 0x014,
- 0x016, 0x019, 0x01c, 0x01f, 0x022, 0x025, 0x028, 0x02a,
- 0x02d, 0x030, 0x033, 0x036, 0x039, 0x03c, 0x03f, 0x042,
- 0x045, 0x048, 0x04b, 0x04e, 0x051, 0x054, 0x057, 0x05a,
- 0x05d, 0x060, 0x063, 0x066, 0x069, 0x06c, 0x06f, 0x072,
- 0x075, 0x078, 0x07b, 0x07e, 0x082, 0x085, 0x088, 0x08b,
- 0x08e, 0x091, 0x094, 0x098, 0x09b, 0x09e, 0x0a1, 0x0a4,
- 0x0a8, 0x0ab, 0x0ae, 0x0b1, 0x0b5, 0x0b8, 0x0bb, 0x0be,
- 0x0c2, 0x0c5, 0x0c8, 0x0cc, 0x0cf, 0x0d2, 0x0d6, 0x0d9,
- 0x0dc, 0x0e0, 0x0e3, 0x0e7, 0x0ea, 0x0ed, 0x0f1, 0x0f4,
- 0x0f8, 0x0fb, 0x0ff, 0x102, 0x106, 0x109, 0x10c, 0x110,
- 0x114, 0x117, 0x11b, 0x11e, 0x122, 0x125, 0x129, 0x12c,
- 0x130, 0x134, 0x137, 0x13b, 0x13e, 0x142, 0x146, 0x149,
- 0x14d, 0x151, 0x154, 0x158, 0x15c, 0x160, 0x163, 0x167,
- 0x16b, 0x16f, 0x172, 0x176, 0x17a, 0x17e, 0x181, 0x185,
- 0x189, 0x18d, 0x191, 0x195, 0x199, 0x19c, 0x1a0, 0x1a4,
- 0x1a8, 0x1ac, 0x1b0, 0x1b4, 0x1b8, 0x1bc, 0x1c0, 0x1c4,
- 0x1c8, 0x1cc, 0x1d0, 0x1d4, 0x1d8, 0x1dc, 0x1e0, 0x1e4,
- 0x1e8, 0x1ec, 0x1f0, 0x1f5, 0x1f9, 0x1fd, 0x201, 0x205,
- 0x209, 0x20e, 0x212, 0x216, 0x21a, 0x21e, 0x223, 0x227,
- 0x22b, 0x230, 0x234, 0x238, 0x23c, 0x241, 0x245, 0x249,
- 0x24e, 0x252, 0x257, 0x25b, 0x25f, 0x264, 0x268, 0x26d,
- 0x271, 0x276, 0x27a, 0x27f, 0x283, 0x288, 0x28c, 0x291,
- 0x295, 0x29a, 0x29e, 0x2a3, 0x2a8, 0x2ac, 0x2b1, 0x2b5,
- 0x2ba, 0x2bf, 0x2c4, 0x2c8, 0x2cd, 0x2d2, 0x2d6, 0x2db,
- 0x2e0, 0x2e5, 0x2e9, 0x2ee, 0x2f3, 0x2f8, 0x2fd, 0x302,
- 0x306, 0x30b, 0x310, 0x315, 0x31a, 0x31f, 0x324, 0x329,
- 0x32e, 0x333, 0x338, 0x33d, 0x342, 0x347, 0x34c, 0x351,
- 0x356, 0x35b, 0x360, 0x365, 0x36a, 0x370, 0x375, 0x37a,
- 0x37f, 0x384, 0x38a, 0x38f, 0x394, 0x399, 0x39f, 0x3a4,
- 0x3a9, 0x3ae, 0x3b4, 0x3b9, 0x3bf, 0x3c4, 0x3c9, 0x3cf,
- 0x3d4, 0x3da, 0x3df, 0x3e4, 0x3ea, 0x3ef, 0x3f5, 0x3fa
-};
-
-//
-// freq mult table multiplied by 2
-//
-// 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 10, 12, 12, 15, 15
-//
-
-static const Bit8u mt[16] = {
- 1, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 20, 24, 24, 30, 30
-};
-
-//
-// ksl table
-//
-
-static const Bit8u kslrom[16] = {
- 0, 32, 40, 45, 48, 51, 53, 55, 56, 58, 59, 60, 61, 62, 63, 64
-};
-
-static const Bit8u kslshift[4] = {
- 8, 1, 2, 0
-};
-
-//
-// envelope generator constants
-//
-
-static const Bit8u eg_incstep[3][4][8] = {
- {
- { 0, 0, 0, 0, 0, 0, 0, 0 },
- { 0, 0, 0, 0, 0, 0, 0, 0 },
- { 0, 0, 0, 0, 0, 0, 0, 0 },
- { 0, 0, 0, 0, 0, 0, 0, 0 }
- },
- {
- { 0, 1, 0, 1, 0, 1, 0, 1 },
- { 0, 1, 0, 1, 1, 1, 0, 1 },
- { 0, 1, 1, 1, 0, 1, 1, 1 },
- { 0, 1, 1, 1, 1, 1, 1, 1 }
- },
- {
- { 1, 1, 1, 1, 1, 1, 1, 1 },
- { 2, 2, 1, 1, 1, 1, 1, 1 },
- { 2, 2, 1, 1, 2, 2, 1, 1 },
- { 2, 2, 2, 2, 2, 2, 1, 1 }
- }
-};
-
-static const Bit8u eg_incdesc[16] = {
- 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2
-};
-
-static const Bit8s eg_incsh[16] = {
- 0, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, -1, -2
-};
-
-//
-// address decoding
-//
-
-static const Bit8s ad_slot[0x20] = {
- 0, 1, 2, 3, 4, 5, -1, -1, 6, 7, 8, 9, 10, 11, -1, -1,
- 12, 13, 14, 15, 16, 17, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
-};
-
-static const Bit8u ch_slot[18] = {
- 0, 1, 2, 6, 7, 8, 12, 13, 14, 18, 19, 20, 24, 25, 26, 30, 31, 32
-};
-
-//
-// Envelope generator
-//
-
-typedef Bit16s(*envelope_sinfunc)(Bit16u phase, Bit16u envelope);
-typedef void(*envelope_genfunc)(opl3_slot *slott);
-
-static Bit16s OPL3_EnvelopeCalcExp(Bit32u level)
-{
- if (level > 0x1fff)
- {
- level = 0x1fff;
- }
- return ((exprom[(level & 0xff) ^ 0xff] | 0x400) << 1) >> (level >> 8);
-}
-
-static Bit16s OPL3_EnvelopeCalcSin0(Bit16u phase, Bit16u envelope)
-{
- Bit16u out = 0;
- Bit16u neg = 0;
- phase &= 0x3ff;
- if (phase & 0x200)
- {
- neg = ~0;
- }
- if (phase & 0x100)
- {
- out = logsinrom[(phase & 0xff) ^ 0xff];
- }
- else
- {
- out = logsinrom[phase & 0xff];
- }
- return OPL3_EnvelopeCalcExp(out + (envelope << 3)) ^ neg;
-}
-
-static Bit16s OPL3_EnvelopeCalcSin1(Bit16u phase, Bit16u envelope)
-{
- Bit16u out = 0;
- phase &= 0x3ff;
- if (phase & 0x200)
- {
- out = 0x1000;
- }
- else if (phase & 0x100)
- {
- out = logsinrom[(phase & 0xff) ^ 0xff];
- }
- else
- {
- out = logsinrom[phase & 0xff];
- }
- return OPL3_EnvelopeCalcExp(out + (envelope << 3));
-}
-
-static Bit16s OPL3_EnvelopeCalcSin2(Bit16u phase, Bit16u envelope)
-{
- Bit16u out = 0;
- phase &= 0x3ff;
- if (phase & 0x100)
- {
- out = logsinrom[(phase & 0xff) ^ 0xff];
- }
- else
- {
- out = logsinrom[phase & 0xff];
- }
- return OPL3_EnvelopeCalcExp(out + (envelope << 3));
-}
-
-static Bit16s OPL3_EnvelopeCalcSin3(Bit16u phase, Bit16u envelope)
-{
- Bit16u out = 0;
- phase &= 0x3ff;
- if (phase & 0x100)
- {
- out = 0x1000;
- }
- else
- {
- out = logsinrom[phase & 0xff];
- }
- return OPL3_EnvelopeCalcExp(out + (envelope << 3));
-}
-
-static Bit16s OPL3_EnvelopeCalcSin4(Bit16u phase, Bit16u envelope)
-{
- Bit16u out = 0;
- Bit16u neg = 0;
- phase &= 0x3ff;
- if ((phase & 0x300) == 0x100)
- {
- neg = ~0;
- }
- if (phase & 0x200)
- {
- out = 0x1000;
- }
- else if (phase & 0x80)
- {
- out = logsinrom[((phase ^ 0xff) << 1) & 0xff];
- }
- else
- {
- out = logsinrom[(phase << 1) & 0xff];
- }
- return OPL3_EnvelopeCalcExp(out + (envelope << 3)) ^ neg;
-}
-
-static Bit16s OPL3_EnvelopeCalcSin5(Bit16u phase, Bit16u envelope)
-{
- Bit16u out = 0;
- phase &= 0x3ff;
- if (phase & 0x200)
- {
- out = 0x1000;
- }
- else if (phase & 0x80)
- {
- out = logsinrom[((phase ^ 0xff) << 1) & 0xff];
- }
- else
- {
- out = logsinrom[(phase << 1) & 0xff];
- }
- return OPL3_EnvelopeCalcExp(out + (envelope << 3));
-}
-
-static Bit16s OPL3_EnvelopeCalcSin6(Bit16u phase, Bit16u envelope)
-{
- Bit16u neg = 0;
- phase &= 0x3ff;
- if (phase & 0x200)
- {
- neg = ~0;
- }
- return OPL3_EnvelopeCalcExp(envelope << 3) ^ neg;
-}
-
-static Bit16s OPL3_EnvelopeCalcSin7(Bit16u phase, Bit16u envelope)
-{
- Bit16u out = 0;
- Bit16u neg = 0;
- phase &= 0x3ff;
- if (phase & 0x200)
- {
- neg = ~0;
- phase = (phase & 0x1ff) ^ 0x1ff;
- }
- out = phase << 3;
- return OPL3_EnvelopeCalcExp(out + (envelope << 3)) ^ neg;
-}
-
-static const envelope_sinfunc envelope_sin[8] = {
- OPL3_EnvelopeCalcSin0,
- OPL3_EnvelopeCalcSin1,
- OPL3_EnvelopeCalcSin2,
- OPL3_EnvelopeCalcSin3,
- OPL3_EnvelopeCalcSin4,
- OPL3_EnvelopeCalcSin5,
- OPL3_EnvelopeCalcSin6,
- OPL3_EnvelopeCalcSin7
-};
-
-static void OPL3_EnvelopeGenOff(opl3_slot *slot);
-static void OPL3_EnvelopeGenAttack(opl3_slot *slot);
-static void OPL3_EnvelopeGenDecay(opl3_slot *slot);
-static void OPL3_EnvelopeGenSustain(opl3_slot *slot);
-static void OPL3_EnvelopeGenRelease(opl3_slot *slot);
-
-envelope_genfunc envelope_gen[5] = {
- OPL3_EnvelopeGenOff,
- OPL3_EnvelopeGenAttack,
- OPL3_EnvelopeGenDecay,
- OPL3_EnvelopeGenSustain,
- OPL3_EnvelopeGenRelease
-};
-
-enum envelope_gen_num
-{
- envelope_gen_num_off = 0,
- envelope_gen_num_attack = 1,
- envelope_gen_num_decay = 2,
- envelope_gen_num_sustain = 3,
- envelope_gen_num_release = 4
-};
-
-static Bit8u OPL3_EnvelopeCalcRate(opl3_slot *slot, Bit8u reg_rate)
-{
- Bit8u rate;
- if (reg_rate == 0x00)
- {
- return 0x00;
- }
- rate = (reg_rate << 2)
- + (slot->reg_ksr ? slot->channel->ksv : (slot->channel->ksv >> 2));
- if (rate > 0x3c)
- {
- rate = 0x3c;
- }
- return rate;
-}
-
-static void OPL3_EnvelopeUpdateKSL(opl3_slot *slot)
-{
- Bit16s ksl = (kslrom[slot->channel->f_num >> 6] << 2)
- - ((0x08 - slot->channel->block) << 5);
- if (ksl < 0)
- {
- ksl = 0;
- }
- slot->eg_ksl = (Bit8u)ksl;
-}
-
-static void OPL3_EnvelopeUpdateRate(opl3_slot *slot)
-{
- switch (slot->eg_gen)
- {
- case envelope_gen_num_off:
- case envelope_gen_num_attack:
- slot->eg_rate = OPL3_EnvelopeCalcRate(slot, slot->reg_ar);
- break;
- case envelope_gen_num_decay:
- slot->eg_rate = OPL3_EnvelopeCalcRate(slot, slot->reg_dr);
- break;
- case envelope_gen_num_sustain:
- case envelope_gen_num_release:
- slot->eg_rate = OPL3_EnvelopeCalcRate(slot, slot->reg_rr);
- break;
- }
-}
-
-static void OPL3_EnvelopeGenOff(opl3_slot *slot)
-{
- slot->eg_rout = 0x1ff;
-}
-
-static void OPL3_EnvelopeGenAttack(opl3_slot *slot)
-{
- if (slot->eg_rout == 0x00)
- {
- slot->eg_gen = envelope_gen_num_decay;
- OPL3_EnvelopeUpdateRate(slot);
- return;
- }
- slot->eg_rout += ((~slot->eg_rout) * slot->eg_inc) >> 3;
- if (slot->eg_rout < 0x00)
- {
- slot->eg_rout = 0x00;
- }
-}
-
-static void OPL3_EnvelopeGenDecay(opl3_slot *slot)
-{
- if (slot->eg_rout >= slot->reg_sl << 4)
- {
- slot->eg_gen = envelope_gen_num_sustain;
- OPL3_EnvelopeUpdateRate(slot);
- return;
- }
- slot->eg_rout += slot->eg_inc;
-}
-
-static void OPL3_EnvelopeGenSustain(opl3_slot *slot)
-{
- if (!slot->reg_type)
- {
- OPL3_EnvelopeGenRelease(slot);
- }
-}
-
-static void OPL3_EnvelopeGenRelease(opl3_slot *slot)
-{
- if (slot->eg_rout >= 0x1ff)
- {
- slot->eg_gen = envelope_gen_num_off;
- slot->eg_rout = 0x1ff;
- OPL3_EnvelopeUpdateRate(slot);
- return;
- }
- slot->eg_rout += slot->eg_inc;
-}
-
-static void OPL3_EnvelopeCalc(opl3_slot *slot)
-{
- Bit8u rate_h, rate_l;
- Bit8u inc = 0;
- rate_h = slot->eg_rate >> 2;
- rate_l = slot->eg_rate & 3;
- if (eg_incsh[rate_h] > 0)
- {
- if ((slot->chip->timer & ((1 << eg_incsh[rate_h]) - 1)) == 0)
- {
- inc = eg_incstep[eg_incdesc[rate_h]][rate_l]
- [((slot->chip->timer)>> eg_incsh[rate_h]) & 0x07];
- }
- }
- else
- {
- inc = eg_incstep[eg_incdesc[rate_h]][rate_l]
- [slot->chip->timer & 0x07] << (-eg_incsh[rate_h]);
- }
- slot->eg_inc = inc;
- slot->eg_out = slot->eg_rout + (slot->reg_tl << 2)
- + (slot->eg_ksl >> kslshift[slot->reg_ksl]) + *slot->trem;
- envelope_gen[slot->eg_gen](slot);
-}
-
-static void OPL3_EnvelopeKeyOn(opl3_slot *slot, Bit8u type)
-{
- if (!slot->key)
- {
- slot->eg_gen = envelope_gen_num_attack;
- OPL3_EnvelopeUpdateRate(slot);
- if ((slot->eg_rate >> 2) == 0x0f)
- {
- slot->eg_gen = envelope_gen_num_decay;
- OPL3_EnvelopeUpdateRate(slot);
- slot->eg_rout = 0x00;
- }
- slot->pg_phase = 0x00;
- }
- slot->key |= type;
-}
-
-static void OPL3_EnvelopeKeyOff(opl3_slot *slot, Bit8u type)
-{
- if (slot->key)
- {
- slot->key &= (~type);
- if (!slot->key)
- {
- slot->eg_gen = envelope_gen_num_release;
- OPL3_EnvelopeUpdateRate(slot);
- }
- }
-}
-
-//
-// Phase Generator
-//
-
-static void OPL3_PhaseGenerate(opl3_slot *slot)
-{
- Bit16u f_num;
- Bit32u basefreq;
-
- f_num = slot->channel->f_num;
- if (slot->reg_vib)
- {
- Bit8s range;
- Bit8u vibpos;
-
- range = (f_num >> 7) & 7;
- vibpos = slot->chip->vibpos;
-
- if (!(vibpos & 3))
- {
- range = 0;
- }
- else if (vibpos & 1)
- {
- range >>= 1;
- }
- range >>= slot->chip->vibshift;
-
- if (vibpos & 4)
- {
- range = -range;
- }
- f_num += range;
- }
- basefreq = (f_num << slot->channel->block) >> 1;
- slot->pg_phase += (basefreq * mt[slot->reg_mult]) >> 1;
-}
-
-//
-// Noise Generator
-//
-
-static void OPL3_NoiseGenerate(opl3_chip *chip)
-{
- if (chip->noise & 0x01)
- {
- chip->noise ^= 0x800302;
- }
- chip->noise >>= 1;
-}
-
-//
-// Slot
-//
-
-static void OPL3_SlotWrite20(opl3_slot *slot, Bit8u data)
-{
- if ((data >> 7) & 0x01)
- {
- slot->trem = &slot->chip->tremolo;
- }
- else
- {
- slot->trem = (Bit8u*)&slot->chip->zeromod;
- }
- slot->reg_vib = (data >> 6) & 0x01;
- slot->reg_type = (data >> 5) & 0x01;
- slot->reg_ksr = (data >> 4) & 0x01;
- slot->reg_mult = data & 0x0f;
- OPL3_EnvelopeUpdateRate(slot);
-}
-
-static void OPL3_SlotWrite40(opl3_slot *slot, Bit8u data)
-{
- slot->reg_ksl = (data >> 6) & 0x03;
- slot->reg_tl = data & 0x3f;
- OPL3_EnvelopeUpdateKSL(slot);
-}
-
-static void OPL3_SlotWrite60(opl3_slot *slot, Bit8u data)
-{
- slot->reg_ar = (data >> 4) & 0x0f;
- slot->reg_dr = data & 0x0f;
- OPL3_EnvelopeUpdateRate(slot);
-}
-
-static void OPL3_SlotWrite80(opl3_slot *slot, Bit8u data)
-{
- slot->reg_sl = (data >> 4) & 0x0f;
- if (slot->reg_sl == 0x0f)
- {
- slot->reg_sl = 0x1f;
- }
- slot->reg_rr = data & 0x0f;
- OPL3_EnvelopeUpdateRate(slot);
-}
-
-static void OPL3_SlotWriteE0(opl3_slot *slot, Bit8u data)
-{
- slot->reg_wf = data & 0x07;
- if (slot->chip->newm == 0x00)
- {
- slot->reg_wf &= 0x03;
- }
-}
-
-static void OPL3_SlotGeneratePhase(opl3_slot *slot, Bit16u phase)
-{
- slot->out = envelope_sin[slot->reg_wf](phase, slot->eg_out);
-}
-
-static void OPL3_SlotGenerate(opl3_slot *slot)
-{
- OPL3_SlotGeneratePhase(slot, (Bit16u)(slot->pg_phase >> 9) + *slot->mod);
-}
-
-static void OPL3_SlotGenerateZM(opl3_slot *slot)
-{
- OPL3_SlotGeneratePhase(slot, (Bit16u)(slot->pg_phase >> 9));
-}
-
-static void OPL3_SlotCalcFB(opl3_slot *slot)
-{
- if (slot->channel->fb != 0x00)
- {
- slot->fbmod = (slot->prout + slot->out) >> (0x09 - slot->channel->fb);
- }
- else
- {
- slot->fbmod = 0;
- }
- slot->prout = slot->out;
-}
-
-//
-// Channel
-//
-
-static void OPL3_ChannelSetupAlg(opl3_channel *channel);
-
-static void OPL3_ChannelUpdateRhythm(opl3_chip *chip, Bit8u data)
-{
- opl3_channel *channel6;
- opl3_channel *channel7;
- opl3_channel *channel8;
- Bit8u chnum;
-
- chip->rhy = data & 0x3f;
- if (chip->rhy & 0x20)
- {
- channel6 = &chip->channel[6];
- channel7 = &chip->channel[7];
- channel8 = &chip->channel[8];
- channel6->out[0] = &channel6->slots[1]->out;
- channel6->out[1] = &channel6->slots[1]->out;
- channel6->out[2] = &chip->zeromod;
- channel6->out[3] = &chip->zeromod;
- channel7->out[0] = &channel7->slots[0]->out;
- channel7->out[1] = &channel7->slots[0]->out;
- channel7->out[2] = &channel7->slots[1]->out;
- channel7->out[3] = &channel7->slots[1]->out;
- channel8->out[0] = &channel8->slots[0]->out;
- channel8->out[1] = &channel8->slots[0]->out;
- channel8->out[2] = &channel8->slots[1]->out;
- channel8->out[3] = &channel8->slots[1]->out;
- for (chnum = 6; chnum < 9; chnum++)
- {
- chip->channel[chnum].chtype = ch_drum;
- }
- OPL3_ChannelSetupAlg(channel6);
- //hh
- if (chip->rhy & 0x01)
- {
- OPL3_EnvelopeKeyOn(channel7->slots[0], egk_drum);
- }
- else
- {
- OPL3_EnvelopeKeyOff(channel7->slots[0], egk_drum);
- }
- //tc
- if (chip->rhy & 0x02)
- {
- OPL3_EnvelopeKeyOn(channel8->slots[1], egk_drum);
- }
- else
- {
- OPL3_EnvelopeKeyOff(channel8->slots[1], egk_drum);
- }
- //tom
- if (chip->rhy & 0x04)
- {
- OPL3_EnvelopeKeyOn(channel8->slots[0], egk_drum);
- }
- else
- {
- OPL3_EnvelopeKeyOff(channel8->slots[0], egk_drum);
- }
- //sd
- if (chip->rhy & 0x08)
- {
- OPL3_EnvelopeKeyOn(channel7->slots[1], egk_drum);
- }
- else
- {
- OPL3_EnvelopeKeyOff(channel7->slots[1], egk_drum);
- }
- //bd
- if (chip->rhy & 0x10)
- {
- OPL3_EnvelopeKeyOn(channel6->slots[0], egk_drum);
- OPL3_EnvelopeKeyOn(channel6->slots[1], egk_drum);
- }
- else
- {
- OPL3_EnvelopeKeyOff(channel6->slots[0], egk_drum);
- OPL3_EnvelopeKeyOff(channel6->slots[1], egk_drum);
- }
- }
- else
- {
- for (chnum = 6; chnum < 9; chnum++)
- {
- chip->channel[chnum].chtype = ch_2op;
- OPL3_ChannelSetupAlg(&chip->channel[chnum]);
- OPL3_EnvelopeKeyOff(chip->channel[chnum].slots[0], egk_drum);
- OPL3_EnvelopeKeyOff(chip->channel[chnum].slots[1], egk_drum);
- }
- }
-}
-
-static void OPL3_ChannelWriteA0(opl3_channel *channel, Bit8u data)
-{
- if (channel->chip->newm && channel->chtype == ch_4op2)
- {
- return;
- }
- channel->f_num = (channel->f_num & 0x300) | data;
- channel->ksv = (channel->block << 1)
- | ((channel->f_num >> (0x09 - channel->chip->nts)) & 0x01);
- OPL3_EnvelopeUpdateKSL(channel->slots[0]);
- OPL3_EnvelopeUpdateKSL(channel->slots[1]);
- OPL3_EnvelopeUpdateRate(channel->slots[0]);
- OPL3_EnvelopeUpdateRate(channel->slots[1]);
- if (channel->chip->newm && channel->chtype == ch_4op)
- {
- channel->pair->f_num = channel->f_num;
- channel->pair->ksv = channel->ksv;
- OPL3_EnvelopeUpdateKSL(channel->pair->slots[0]);
- OPL3_EnvelopeUpdateKSL(channel->pair->slots[1]);
- OPL3_EnvelopeUpdateRate(channel->pair->slots[0]);
- OPL3_EnvelopeUpdateRate(channel->pair->slots[1]);
- }
-}
-
-static void OPL3_ChannelWriteB0(opl3_channel *channel, Bit8u data)
-{
- if (channel->chip->newm && channel->chtype == ch_4op2)
- {
- return;
- }
- channel->f_num = (channel->f_num & 0xff) | ((data & 0x03) << 8);
- channel->block = (data >> 2) & 0x07;
- channel->ksv = (channel->block << 1)
- | ((channel->f_num >> (0x09 - channel->chip->nts)) & 0x01);
- OPL3_EnvelopeUpdateKSL(channel->slots[0]);
- OPL3_EnvelopeUpdateKSL(channel->slots[1]);
- OPL3_EnvelopeUpdateRate(channel->slots[0]);
- OPL3_EnvelopeUpdateRate(channel->slots[1]);
- if (channel->chip->newm && channel->chtype == ch_4op)
- {
- channel->pair->f_num = channel->f_num;
- channel->pair->block = channel->block;
- channel->pair->ksv = channel->ksv;
- OPL3_EnvelopeUpdateKSL(channel->pair->slots[0]);
- OPL3_EnvelopeUpdateKSL(channel->pair->slots[1]);
- OPL3_EnvelopeUpdateRate(channel->pair->slots[0]);
- OPL3_EnvelopeUpdateRate(channel->pair->slots[1]);
- }
-}
-
-static void OPL3_ChannelSetupAlg(opl3_channel *channel)
-{
- if (channel->chtype == ch_drum)
- {
- switch (channel->alg & 0x01)
- {
- case 0x00:
- channel->slots[0]->mod = &channel->slots[0]->fbmod;
- channel->slots[1]->mod = &channel->slots[0]->out;
- break;
- case 0x01:
- channel->slots[0]->mod = &channel->slots[0]->fbmod;
- channel->slots[1]->mod = &channel->chip->zeromod;
- break;
- }
- return;
- }
- if (channel->alg & 0x08)
- {
- return;
- }
- if (channel->alg & 0x04)
- {
- channel->pair->out[0] = &channel->chip->zeromod;
- channel->pair->out[1] = &channel->chip->zeromod;
- channel->pair->out[2] = &channel->chip->zeromod;
- channel->pair->out[3] = &channel->chip->zeromod;
- switch (channel->alg & 0x03)
- {
- case 0x00:
- channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
- channel->pair->slots[1]->mod = &channel->pair->slots[0]->out;
- channel->slots[0]->mod = &channel->pair->slots[1]->out;
- channel->slots[1]->mod = &channel->slots[0]->out;
- channel->out[0] = &channel->slots[1]->out;
- channel->out[1] = &channel->chip->zeromod;
- channel->out[2] = &channel->chip->zeromod;
- channel->out[3] = &channel->chip->zeromod;
- break;
- case 0x01:
- channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
- channel->pair->slots[1]->mod = &channel->pair->slots[0]->out;
- channel->slots[0]->mod = &channel->chip->zeromod;
- channel->slots[1]->mod = &channel->slots[0]->out;
- channel->out[0] = &channel->pair->slots[1]->out;
- channel->out[1] = &channel->slots[1]->out;
- channel->out[2] = &channel->chip->zeromod;
- channel->out[3] = &channel->chip->zeromod;
- break;
- case 0x02:
- channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
- channel->pair->slots[1]->mod = &channel->chip->zeromod;
- channel->slots[0]->mod = &channel->pair->slots[1]->out;
- channel->slots[1]->mod = &channel->slots[0]->out;
- channel->out[0] = &channel->pair->slots[0]->out;
- channel->out[1] = &channel->slots[1]->out;
- channel->out[2] = &channel->chip->zeromod;
- channel->out[3] = &channel->chip->zeromod;
- break;
- case 0x03:
- channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
- channel->pair->slots[1]->mod = &channel->chip->zeromod;
- channel->slots[0]->mod = &channel->pair->slots[1]->out;
- channel->slots[1]->mod = &channel->chip->zeromod;
- channel->out[0] = &channel->pair->slots[0]->out;
- channel->out[1] = &channel->slots[0]->out;
- channel->out[2] = &channel->slots[1]->out;
- channel->out[3] = &channel->chip->zeromod;
- break;
- }
- }
- else
- {
- switch (channel->alg & 0x01)
- {
- case 0x00:
- channel->slots[0]->mod = &channel->slots[0]->fbmod;
- channel->slots[1]->mod = &channel->slots[0]->out;
- channel->out[0] = &channel->slots[1]->out;
- channel->out[1] = &channel->chip->zeromod;
- channel->out[2] = &channel->chip->zeromod;
- channel->out[3] = &channel->chip->zeromod;
- break;
- case 0x01:
- channel->slots[0]->mod = &channel->slots[0]->fbmod;
- channel->slots[1]->mod = &channel->chip->zeromod;
- channel->out[0] = &channel->slots[0]->out;
- channel->out[1] = &channel->slots[1]->out;
- channel->out[2] = &channel->chip->zeromod;
- channel->out[3] = &channel->chip->zeromod;
- break;
- }
- }
-}
-
-static void OPL3_ChannelWriteC0(opl3_channel *channel, Bit8u data)
-{
- channel->fb = (data & 0x0e) >> 1;
- channel->con = data & 0x01;
- channel->alg = channel->con;
- if (channel->chip->newm)
- {
- if (channel->chtype == ch_4op)
- {
- channel->pair->alg = 0x04 | (channel->con << 1) | (channel->pair->con);
- channel->alg = 0x08;
- OPL3_ChannelSetupAlg(channel->pair);
- }
- else if (channel->chtype == ch_4op2)
- {
- channel->alg = 0x04 | (channel->pair->con << 1) | (channel->con);
- channel->pair->alg = 0x08;
- OPL3_ChannelSetupAlg(channel);
- }
- else
- {
- OPL3_ChannelSetupAlg(channel);
- }
- }
- else
- {
- OPL3_ChannelSetupAlg(channel);
- }
- if (channel->chip->newm)
- {
- channel->cha = ((data >> 4) & 0x01) ? ~0 : 0;
- channel->chb = ((data >> 5) & 0x01) ? ~0 : 0;
- }
- else
- {
- channel->cha = channel->chb = ~0;
- }
-}
-
-static void OPL3_ChannelKeyOn(opl3_channel *channel)
-{
- if (channel->chip->newm)
- {
- if (channel->chtype == ch_4op)
- {
- OPL3_EnvelopeKeyOn(channel->slots[0], egk_norm);
- OPL3_EnvelopeKeyOn(channel->slots[1], egk_norm);
- OPL3_EnvelopeKeyOn(channel->pair->slots[0], egk_norm);
- OPL3_EnvelopeKeyOn(channel->pair->slots[1], egk_norm);
- }
- else if (channel->chtype == ch_2op || channel->chtype == ch_drum)
- {
- OPL3_EnvelopeKeyOn(channel->slots[0], egk_norm);
- OPL3_EnvelopeKeyOn(channel->slots[1], egk_norm);
- }
- }
- else
- {
- OPL3_EnvelopeKeyOn(channel->slots[0], egk_norm);
- OPL3_EnvelopeKeyOn(channel->slots[1], egk_norm);
- }
-}
-
-static void OPL3_ChannelKeyOff(opl3_channel *channel)
-{
- if (channel->chip->newm)
- {
- if (channel->chtype == ch_4op)
- {
- OPL3_EnvelopeKeyOff(channel->slots[0], egk_norm);
- OPL3_EnvelopeKeyOff(channel->slots[1], egk_norm);
- OPL3_EnvelopeKeyOff(channel->pair->slots[0], egk_norm);
- OPL3_EnvelopeKeyOff(channel->pair->slots[1], egk_norm);
- }
- else if (channel->chtype == ch_2op || channel->chtype == ch_drum)
- {
- OPL3_EnvelopeKeyOff(channel->slots[0], egk_norm);
- OPL3_EnvelopeKeyOff(channel->slots[1], egk_norm);
- }
- }
- else
- {
- OPL3_EnvelopeKeyOff(channel->slots[0], egk_norm);
- OPL3_EnvelopeKeyOff(channel->slots[1], egk_norm);
- }
-}
-
-static void OPL3_ChannelSet4Op(opl3_chip *chip, Bit8u data)
-{
- Bit8u bit;
- Bit8u chnum;
- for (bit = 0; bit < 6; bit++)
- {
- chnum = bit;
- if (bit >= 3)
- {
- chnum += 9 - 3;
- }
- if ((data >> bit) & 0x01)
- {
- chip->channel[chnum].chtype = ch_4op;
- chip->channel[chnum + 3].chtype = ch_4op2;
- }
- else
- {
- chip->channel[chnum].chtype = ch_2op;
- chip->channel[chnum + 3].chtype = ch_2op;
- }
- }
-}
-
-static Bit16s OPL3_ClipSample(Bit32s sample)
-{
- if (sample > 32767)
- {
- sample = 32767;
- }
- else if (sample < -32768)
- {
- sample = -32768;
- }
- return (Bit16s)sample;
-}
-
-static void OPL3_GenerateRhythm1(opl3_chip *chip)
-{
- opl3_channel *channel6;
- opl3_channel *channel7;
- opl3_channel *channel8;
- Bit16u phase14;
- Bit16u phase17;
- Bit16u phase;
- Bit16u phasebit;
-
- channel6 = &chip->channel[6];
- channel7 = &chip->channel[7];
- channel8 = &chip->channel[8];
- OPL3_SlotGenerate(channel6->slots[0]);
- phase14 = (channel7->slots[0]->pg_phase >> 9) & 0x3ff;
- phase17 = (channel8->slots[1]->pg_phase >> 9) & 0x3ff;
- phase = 0x00;
- //hh tc phase bit
- phasebit = ((phase14 & 0x08) | (((phase14 >> 5) ^ phase14) & 0x04)
- | (((phase17 >> 2) ^ phase17) & 0x08)) ? 0x01 : 0x00;
- //hh
- phase = (phasebit << 9)
- | (0x34 << ((phasebit ^ (chip->noise & 0x01)) << 1));
- OPL3_SlotGeneratePhase(channel7->slots[0], phase);
- //tt
- OPL3_SlotGenerateZM(channel8->slots[0]);
-}
-
-static void OPL3_GenerateRhythm2(opl3_chip *chip)
-{
- opl3_channel *channel6;
- opl3_channel *channel7;
- opl3_channel *channel8;
- Bit16u phase14;
- Bit16u phase17;
- Bit16u phase;
- Bit16u phasebit;
-
- channel6 = &chip->channel[6];
- channel7 = &chip->channel[7];
- channel8 = &chip->channel[8];
- OPL3_SlotGenerate(channel6->slots[1]);
- phase14 = (channel7->slots[0]->pg_phase >> 9) & 0x3ff;
- phase17 = (channel8->slots[1]->pg_phase >> 9) & 0x3ff;
- phase = 0x00;
- //hh tc phase bit
- phasebit = ((phase14 & 0x08) | (((phase14 >> 5) ^ phase14) & 0x04)
- | (((phase17 >> 2) ^ phase17) & 0x08)) ? 0x01 : 0x00;
- //sd
- phase = (0x100 << ((phase14 >> 8) & 0x01)) ^ ((chip->noise & 0x01) << 8);
- OPL3_SlotGeneratePhase(channel7->slots[1], phase);
- //tc
- phase = 0x100 | (phasebit << 9);
- OPL3_SlotGeneratePhase(channel8->slots[1], phase);
-}
-
-void OPL3_Generate(opl3_chip *chip, Bit16s *buf)
-{
- Bit8u ii;
- Bit8u jj;
- Bit16s accm;
-
- buf[1] = OPL3_ClipSample(chip->mixbuff[1]);
-
- for (ii = 0; ii < 12; ii++)
- {
- OPL3_SlotCalcFB(&chip->slot[ii]);
- OPL3_PhaseGenerate(&chip->slot[ii]);
- OPL3_EnvelopeCalc(&chip->slot[ii]);
- OPL3_SlotGenerate(&chip->slot[ii]);
- }
-
- for (ii = 12; ii < 15; ii++)
- {
- OPL3_SlotCalcFB(&chip->slot[ii]);
- OPL3_PhaseGenerate(&chip->slot[ii]);
- OPL3_EnvelopeCalc(&chip->slot[ii]);
- }
-
- if (chip->rhy & 0x20)
- {
- OPL3_GenerateRhythm1(chip);
- }
- else
- {
- OPL3_SlotGenerate(&chip->slot[12]);
- OPL3_SlotGenerate(&chip->slot[13]);
- OPL3_SlotGenerate(&chip->slot[14]);
- }
-
- chip->mixbuff[0] = 0;
- for (ii = 0; ii < 18; ii++)
- {
- accm = 0;
- for (jj = 0; jj < 4; jj++)
- {
- accm += *chip->channel[ii].out[jj];
- }
- chip->mixbuff[0] += (Bit16s)(accm & chip->channel[ii].cha);
- }
-
- for (ii = 15; ii < 18; ii++)
- {
- OPL3_SlotCalcFB(&chip->slot[ii]);
- OPL3_PhaseGenerate(&chip->slot[ii]);
- OPL3_EnvelopeCalc(&chip->slot[ii]);
- }
-
- if (chip->rhy & 0x20)
- {
- OPL3_GenerateRhythm2(chip);
- }
- else
- {
- OPL3_SlotGenerate(&chip->slot[15]);
- OPL3_SlotGenerate(&chip->slot[16]);
- OPL3_SlotGenerate(&chip->slot[17]);
- }
-
- buf[0] = OPL3_ClipSample(chip->mixbuff[0]);
-
- for (ii = 18; ii < 33; ii++)
- {
- OPL3_SlotCalcFB(&chip->slot[ii]);
- OPL3_PhaseGenerate(&chip->slot[ii]);
- OPL3_EnvelopeCalc(&chip->slot[ii]);
- OPL3_SlotGenerate(&chip->slot[ii]);
- }
-
- chip->mixbuff[1] = 0;
- for (ii = 0; ii < 18; ii++)
- {
- accm = 0;
- for (jj = 0; jj < 4; jj++)
- {
- accm += *chip->channel[ii].out[jj];
- }
- chip->mixbuff[1] += (Bit16s)(accm & chip->channel[ii].chb);
- }
-
- for (ii = 33; ii < 36; ii++)
- {
- OPL3_SlotCalcFB(&chip->slot[ii]);
- OPL3_PhaseGenerate(&chip->slot[ii]);
- OPL3_EnvelopeCalc(&chip->slot[ii]);
- OPL3_SlotGenerate(&chip->slot[ii]);
- }
-
- OPL3_NoiseGenerate(chip);
-
- if ((chip->timer & 0x3f) == 0x3f)
- {
- chip->tremolopos = (chip->tremolopos + 1) % 210;
- }
- if (chip->tremolopos < 105)
- {
- chip->tremolo = chip->tremolopos >> chip->tremoloshift;
- }
- else
- {
- chip->tremolo = (210 - chip->tremolopos) >> chip->tremoloshift;
- }
-
- if ((chip->timer & 0x3ff) == 0x3ff)
- {
- chip->vibpos = (chip->vibpos + 1) & 7;
- }
-
- chip->timer++;
-}
-
-void OPL3_GenerateResampled(opl3_chip *chip, Bit16s *buf)
-{
- while (chip->samplecnt >= chip->rateratio)
- {
- chip->oldsamples[0] = chip->samples[0];
- chip->oldsamples[1] = chip->samples[1];
- OPL3_Generate(chip, chip->samples);
- chip->samplecnt -= chip->rateratio;
- }
- buf[0] = (Bit16s)((chip->oldsamples[0] * (chip->rateratio - chip->samplecnt)
- + chip->samples[0] * chip->samplecnt) / chip->rateratio);
- buf[1] = (Bit16s)((chip->oldsamples[1] * (chip->rateratio - chip->samplecnt)
- + chip->samples[1] * chip->samplecnt) / chip->rateratio);
- chip->samplecnt += 1 << RSM_FRAC;
-}
-
-void OPL3_Reset(opl3_chip *chip, Bit32u samplerate)
-{
- Bit8u slotnum;
- Bit8u channum;
-
- memset(chip, 0, sizeof(opl3_chip));
- for (slotnum = 0; slotnum < 36; slotnum++)
- {
- chip->slot[slotnum].chip = chip;
- chip->slot[slotnum].mod = &chip->zeromod;
- chip->slot[slotnum].eg_rout = 0x1ff;
- chip->slot[slotnum].eg_out = 0x1ff;
- chip->slot[slotnum].eg_gen = envelope_gen_num_off;
- chip->slot[slotnum].trem = (Bit8u*)&chip->zeromod;
- }
- for (channum = 0; channum < 18; channum++)
- {
- chip->channel[channum].slots[0] = &chip->slot[ch_slot[channum]];
- chip->channel[channum].slots[1] = &chip->slot[ch_slot[channum] + 3];
- chip->slot[ch_slot[channum]].channel = &chip->channel[channum];
- chip->slot[ch_slot[channum] + 3].channel = &chip->channel[channum];
- if ((channum % 9) < 3)
- {
- chip->channel[channum].pair = &chip->channel[channum + 3];
- }
- else if ((channum % 9) < 6)
- {
- chip->channel[channum].pair = &chip->channel[channum - 3];
- }
- chip->channel[channum].chip = chip;
- chip->channel[channum].out[0] = &chip->zeromod;
- chip->channel[channum].out[1] = &chip->zeromod;
- chip->channel[channum].out[2] = &chip->zeromod;
- chip->channel[channum].out[3] = &chip->zeromod;
- chip->channel[channum].chtype = ch_2op;
- chip->channel[channum].cha = ~0;
- chip->channel[channum].chb = ~0;
- OPL3_ChannelSetupAlg(&chip->channel[channum]);
- }
- chip->noise = 0x306600;
- chip->rateratio = (samplerate << RSM_FRAC) / 49716;
- chip->tremoloshift = 4;
- chip->vibshift = 1;
-}
-
-Bit32u OPL3_WriteAddr(opl3_chip *chip, Bit32u port, Bit8u val)
-{
- Bit16u addr;
- addr = val;
- if ((port & 2) && (addr == 0x05 || chip->newm)) {
- addr |= 0x100;
- }
- return addr;
-}
-
-void OPL3_WriteReg(opl3_chip *chip, Bit16u reg, Bit8u v)
-{
- Bit8u high = (reg >> 8) & 0x01;
- Bit8u regm = reg & 0xff;
- switch (regm & 0xf0)
- {
- case 0x00:
- if (high)
- {
- switch (regm & 0x0f)
- {
- case 0x04:
- OPL3_ChannelSet4Op(chip, v);
- break;
- case 0x05:
- chip->newm = v & 0x01;
- break;
- }
- }
- else
- {
- switch (regm & 0x0f)
- {
- case 0x08:
- chip->nts = (v >> 6) & 0x01;
- break;
- }
- }
- break;
- case 0x20:
- case 0x30:
- if (ad_slot[regm & 0x1f] >= 0)
- {
- OPL3_SlotWrite20(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
- }
- break;
- case 0x40:
- case 0x50:
- if (ad_slot[regm & 0x1f] >= 0)
- {
- OPL3_SlotWrite40(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
- }
- break;
- case 0x60:
- case 0x70:
- if (ad_slot[regm & 0x1f] >= 0)
- {
- OPL3_SlotWrite60(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
- }
- break;
- case 0x80:
- case 0x90:
- if (ad_slot[regm & 0x1f] >= 0)
- {
- OPL3_SlotWrite80(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
- }
- break;
- case 0xe0:
- case 0xf0:
- if (ad_slot[regm & 0x1f] >= 0)
- {
- OPL3_SlotWriteE0(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
- }
- break;
- case 0xa0:
- if ((regm & 0x0f) < 9)
- {
- OPL3_ChannelWriteA0(&chip->channel[9 * high + (regm & 0x0f)], v);
- }
- break;
- case 0xb0:
- if (regm == 0xbd && !high)
- {
- chip->tremoloshift = (((v >> 7) ^ 1) << 1) + 2;
- chip->vibshift = ((v >> 6) & 0x01) ^ 1;
- OPL3_ChannelUpdateRhythm(chip, v);
- }
- else if ((regm & 0x0f) < 9)
- {
- OPL3_ChannelWriteB0(&chip->channel[9 * high + (regm & 0x0f)], v);
- if (v & 0x20)
- {
- OPL3_ChannelKeyOn(&chip->channel[9 * high + (regm & 0x0f)]);
- }
- else
- {
- OPL3_ChannelKeyOff(&chip->channel[9 * high + (regm & 0x0f)]);
- }
- }
- break;
- case 0xc0:
- if ((regm & 0x0f) < 9)
- {
- OPL3_ChannelWriteC0(&chip->channel[9 * high + (regm & 0x0f)], v);
- }
- break;
- }
-}
-
-void OPL3_GenerateStream(opl3_chip *chip, Bit16s *sndptr, Bit32u numsamples)
-{
- Bit32u i;
-
- for(i = 0; i < numsamples; i++)
- {
- OPL3_GenerateResampled(chip, sndptr);
- sndptr += 2;
- }
-}
diff --git a/src/dosbox/nukedopl.h b/src/dosbox/nukedopl.h
deleted file mode 100644
index ccebfc2..0000000
--- a/src/dosbox/nukedopl.h
+++ /dev/null
@@ -1,103 +0,0 @@
-//
-// Nuked OPL3 emulator.
-// Thanks:
-// MAME Development Team(Jarek Burczynski, Tatsuyuki Satoh):
-// Feedback and Rhythm part calculation information.
-// forums.submarine.org.uk(carbon14, opl3):
-// Tremolo and phase generator calculation information.
-// OPLx decapsulated(Matthew Gambrell, Olli Niemitalo):
-// OPL2 ROMs.
-//
-
-#ifndef NUKEDOPL_H
-#define NUKEDOPL_H
-
-//#include "dosbox.h"
-#include
-typedef signed int Bits;
-typedef unsigned int Bitu;
-typedef int8_t Bit8s;
-typedef uint8_t Bit8u;
-typedef int16_t Bit16s;
-typedef uint16_t Bit16u;
-typedef int32_t Bit32s;
-typedef uint32_t Bit32u;
-
-struct opl3_chip;
-struct opl3_slot;
-struct opl3_channel;
-
-struct opl3_slot {
- opl3_channel *channel;
- opl3_chip *chip;
- Bit16s out;
- Bit16s fbmod;
- Bit16s *mod;
- Bit16s prout;
- Bit16s eg_rout;
- Bit16s eg_out;
- Bit8u eg_inc;
- Bit8u eg_gen;
- Bit8u eg_rate;
- Bit8u eg_ksl;
- Bit8u *trem;
- Bit8u reg_vib;
- Bit8u reg_type;
- Bit8u reg_ksr;
- Bit8u reg_mult;
- Bit8u reg_ksl;
- Bit8u reg_tl;
- Bit8u reg_ar;
- Bit8u reg_dr;
- Bit8u reg_sl;
- Bit8u reg_rr;
- Bit8u reg_wf;
- Bit8u key;
- Bit32u pg_phase;
- Bit32u timer;
-};
-
-struct opl3_channel {
- opl3_slot *slots[2];
- opl3_channel *pair;
- opl3_chip *chip;
- Bit16s *out[4];
- Bit8u chtype;
- Bit16u f_num;
- Bit8u block;
- Bit8u fb;
- Bit8u con;
- Bit8u alg;
- Bit8u ksv;
- Bit16u cha, chb;
-};
-
-struct opl3_chip {
- opl3_channel channel[18];
- opl3_slot slot[36];
- Bit16u timer;
- Bit8u newm;
- Bit8u nts;
- Bit8u rhy;
- Bit8u vibpos;
- Bit8u vibshift;
- Bit8u tremolo;
- Bit8u tremolopos;
- Bit8u tremoloshift;
- Bit32u noise;
- Bit16s zeromod;
- Bit32s mixbuff[2];
-
- Bit32s rateratio;
- Bit32s samplecnt;
- Bit16s oldsamples[2];
- Bit16s samples[2];
-};
-
-//void OPL3_Generate(opl3_chip *chip, Bit16s *buf);
-//void OPL3_GenerateResampled(opl3_chip *chip, Bit16s *buf);
-void OPL3_Reset(opl3_chip *chip, Bit32u samplerate);
-Bit32u OPL3_WriteAddr(opl3_chip *chip, Bit32u port, Bit8u val);
-void OPL3_WriteReg(opl3_chip *chip, Bit16u reg, Bit8u v);
-void OPL3_GenerateStream(opl3_chip *chip, Bit16s *sndptr, Bit32u numsamples);
-#endif
diff --git a/src/esdi_at.c b/src/esdi_at.c
deleted file mode 100644
index 9002502..0000000
--- a/src/esdi_at.c
+++ /dev/null
@@ -1,812 +0,0 @@
-#define _LARGEFILE_SOURCE
-#define _LARGEFILE64_SOURCE
-#define _GNU_SOURCE
-
-#include
-#include
-#include
-#include
-
-#include
-
-#include "ibm.h"
-#include "device.h"
-#include "hdd_file.h"
-#include "io.h"
-#include "mem.h"
-#include "pic.h"
-#include "rom.h"
-#include "timer.h"
-
-#include "esdi_at.h"
-
-
-#define IDE_TIME (TIMER_USEC*10)//(5 * 100 * (1 << TIMER_SHIFT))
-
-#define STAT_ERR 0x01
-#define STAT_INDEX 0x02
-#define STAT_CORRECTED_DATA 0x04
-#define STAT_DRQ 0x08 /* Data request */
-#define STAT_DSC 0x10
-#define STAT_SEEK_COMPLETE 0x20
-#define STAT_READY 0x40
-#define STAT_BUSY 0x80
-
-#define ERR_DAM_NOT_FOUND 0x01 /*Data Address Mark not found*/
-#define ERR_TR000 0x02 /*Track 0 not found*/
-#define ERR_ABRT 0x04 /*Command aborted*/
-#define ERR_ID_NOT_FOUND 0x10 /*ID not found*/
-#define ERR_DATA_CRC 0x40 /*Data CRC error*/
-#define ERR_BAD_BLOCK 0x80 /*Bad Block detected*/
-
-#define CMD_NOP 0x00
-#define CMD_RESTORE 0x10
-#define CMD_READ 0x20
-#define CMD_WRITE 0x30
-#define CMD_VERIFY 0x40
-#define CMD_FORMAT 0x50
-#define CMD_SEEK 0x70
-#define CMD_DIAGNOSE 0x90
-#define CMD_SET_PARAMETERS 0x91
-#define CMD_READ_PARAMETERS 0xec
-
-extern char ide_fn[7][512];
-
-typedef struct esdi_drive_t
-{
- int cfg_spt;
- int cfg_hpc;
- int current_cylinder;
- hdd_file_t hdd_file;
-} esdi_drive_t;
-
-typedef struct esdi_t
-{
- uint8_t status;
- uint8_t error;
- int secount,sector,cylinder,head,cylprecomp;
- uint8_t command;
- uint8_t fdisk;
- int pos;
-
- int drive_sel;
- int reset;
- uint16_t buffer[256];
- int irqstat;
-
- pc_timer_t callback_timer;
-
- esdi_drive_t drives[2];
-
- rom_t bios_rom;
-} esdi_t;
-
-uint16_t esdi_readw(uint16_t port, void *p);
-void esdi_writew(uint16_t port, uint16_t val, void *p);
-
-static inline void esdi_irq_raise(esdi_t *esdi)
-{
-// pclog("IDE_IRQ_RAISE\n");
- if (!(esdi->fdisk&2))
- picint(1 << 14);
-
- esdi->irqstat=1;
-}
-
-static inline void esdi_irq_lower(esdi_t *esdi)
-{
- picintc(1 << 14);
-}
-
-void esdi_irq_update(esdi_t *esdi)
-{
- if (esdi->irqstat && !((pic2.pend|pic2.ins)&0x40) && !(esdi->fdisk & 2))
- picint(1 << 14);
-}
-
-/*
- * Return the sector offset for the current register values
- */
-int esdi_get_sector(esdi_t *esdi, off64_t *addr)
-{
- esdi_drive_t *drive = &esdi->drives[esdi->drive_sel];
- int heads = drive->cfg_hpc;
- int sectors = drive->cfg_spt;
-
- if (esdi->head > heads)
- {
- pclog("esdi_get_sector: past end of configured heads\n");
- return 1;
- }
- if (esdi->sector >= sectors+1)
- {
- pclog("esdi_get_sector: past end of configured sectors\n");
- return 1;
- }
-
- if (drive->cfg_spt == drive->hdd_file.spt && drive->cfg_hpc == drive->hdd_file.hpc)
- {
- *addr = ((((off64_t) esdi->cylinder * heads) + esdi->head) *
- sectors) + (esdi->sector - 1);
- }
- else
- {
- /*When performing translation, the firmware seems to leave 1
- sector per track inaccessible (spare sector)*/
- int c, h, s;
- *addr = ((((off64_t) esdi->cylinder * heads) + esdi->head) *
- sectors) + (esdi->sector - 1);
-
- s = *addr % (drive->hdd_file.spt - 1);
- h = (*addr / (drive->hdd_file.spt - 1)) % drive->hdd_file.hpc;
- c = (*addr / (drive->hdd_file.spt - 1)) / drive->hdd_file.hpc;
-
- *addr = ((((off64_t) c * drive->hdd_file.hpc) + h) *
- drive->hdd_file.spt) + s;
- }
-
- return 0;
-}
-
-/**
- * Move to the next sector using CHS addressing
- */
-void esdi_next_sector(esdi_t *esdi)
-{
- esdi_drive_t *drive = &esdi->drives[esdi->drive_sel];
-
- esdi->sector++;
- if (esdi->sector == (drive->cfg_spt + 1))
- {
- esdi->sector = 1;
- esdi->head++;
- if (esdi->head == drive->cfg_hpc)
- {
- esdi->head = 0;
- esdi->cylinder++;
- if (drive->current_cylinder < drive->hdd_file.tracks)
- drive->current_cylinder++;
- }
- }
-}
-
-void esdi_write(uint16_t port, uint8_t val, void *p)
-{
- esdi_t *esdi = (esdi_t *)p;
-
-// pclog("esdi_write: addr=%04x val=%02x\n", port, val);
- switch (port)
- {
- case 0x1F0: /* Data */
- esdi_writew(port, val | (val << 8), p);
- return;
-
- case 0x1F1: /* Write precompenstation */
- esdi->cylprecomp = val;
- return;
-
- case 0x1F2: /* Sector count */
- esdi->secount = val;
- return;
-
- case 0x1F3: /* Sector */
- esdi->sector = val;
- return;
-
- case 0x1F4: /* Cylinder low */
- esdi->cylinder = (esdi->cylinder & 0xFF00) | val;
- return;
-
- case 0x1F5: /* Cylinder high */
- esdi->cylinder = (esdi->cylinder & 0xFF) | (val << 8);
- return;
-
- case 0x1F6: /* Drive/Head */
- esdi->head = val & 0xF;
- esdi->drive_sel = (val & 0x10) ? 1 : 0;
- if (esdi->drives[esdi->drive_sel].hdd_file.f == NULL)
- esdi->status = 0;
- else
- esdi->status = STAT_READY | STAT_DSC;
- return;
-
- case 0x1F7: /* Command register */
-// if (esdi->drives[esdi->drive_sel].hdd_file.f == NULL && val != CMD_SET_PARAMETERS && val != CMD_NOP && val != 0xe0 && (val & ~3) != 0x20 && (val & ~3) != 0x30 && (val & ~3) != 0x40 && val != 0x90 && val != CMD_READ_PARAMETERS)
-// fatal("Command %02x on non-present drive\n", val);
-
- esdi_irq_lower(esdi);
- esdi->command = val;
- esdi->error = 0;
-
- switch (val & 0xf0)
- {
- case CMD_RESTORE:
-// pclog("Restore\n");
- esdi->command &= ~0x0f; /*Mask off step rate*/
- esdi->status = STAT_BUSY;
- timer_set_delay_u64(&esdi->callback_timer, 200*IDE_TIME);
- break;
-
- case CMD_SEEK:
-// pclog("Seek to cylinder %i\n", esdi->cylinder);
- esdi->command &= ~0x0f; /*Mask off step rate*/
- esdi->status = STAT_BUSY;
- timer_set_delay_u64(&esdi->callback_timer, 200*IDE_TIME);
- break;
-
- default:
- switch (val)
- {
- case CMD_NOP:
- esdi->status = STAT_BUSY;
- timer_set_delay_u64(&esdi->callback_timer, 200*IDE_TIME);
- break;
-
- case CMD_READ: case CMD_READ+1:
- case CMD_READ+2: case CMD_READ+3:
-// pclog("Read %i sectors from sector %i cylinder %i head %i %i\n",esdi->secount,esdi->sector,esdi->cylinder,esdi->head,ins);
- esdi->command &= ~3;
- if (val & 2)
- fatal("Read with ECC\n");
- case 0xa0:
- esdi->status = STAT_BUSY;
- timer_set_delay_u64(&esdi->callback_timer, 200*IDE_TIME);
- break;
-
- case CMD_WRITE: case CMD_WRITE+1:
- case CMD_WRITE+2: case CMD_WRITE+3:
-// pclog("Write %i sectors to sector %i cylinder %i head %i\n",esdi->secount,esdi->sector,esdi->cylinder,esdi->head);
- esdi->command &= ~3;
- if (val & 2)
- fatal("Write with ECC\n");
- esdi->status = STAT_DRQ | STAT_DSC;// | STAT_BUSY;
- esdi->pos=0;
- break;
-
- case CMD_VERIFY: case CMD_VERIFY+1:
-// pclog("Read verify %i sectors from sector %i cylinder %i head %i\n",esdi->secount,esdi->sector,esdi->cylinder,esdi->head);
- esdi->command &= ~1;
- esdi->status = STAT_BUSY;
- timer_set_delay_u64(&esdi->callback_timer, 200 * IDE_TIME);
- break;
-
- case CMD_FORMAT:
-// pclog("Format track %i head %i\n", esdi->cylinder, esdi->head);
- esdi->status = STAT_DRQ;// | STAT_BUSY;
- esdi->pos=0;
- break;
-
- case CMD_SET_PARAMETERS: /* Initialize Drive Parameters */
- esdi->status = STAT_BUSY;
- timer_set_delay_u64(&esdi->callback_timer, 30*IDE_TIME);
- break;
-
- case CMD_DIAGNOSE: /* Execute Drive Diagnostics */
- esdi->status = STAT_BUSY;
- timer_set_delay_u64(&esdi->callback_timer, 200*IDE_TIME);
- break;
-
- case 0xe0: /*???*/
- case CMD_READ_PARAMETERS:
- esdi->status = STAT_BUSY;
- timer_set_delay_u64(&esdi->callback_timer, 200*IDE_TIME);
- break;
-
- default:
- pclog("Bad esdi command %02X\n", val);
- case 0xe8: /*???*/
- esdi->status = STAT_BUSY;
- timer_set_delay_u64(&esdi->callback_timer, 200*IDE_TIME);
- break;
- }
- }
- break;
-
- case 0x3F6: /* Device control */
- if ((esdi->fdisk & 4) && !(val & 4))
- {
- timer_set_delay_u64(&esdi->callback_timer, 500*IDE_TIME);
- esdi->reset = 1;
- esdi->status = STAT_BUSY;
-// pclog("esdi Reset\n");
- }
- if (val & 4)
- {
- /*Drive held in reset*/
- timer_disable(&esdi->callback_timer);
- esdi->status = STAT_BUSY;
- }
- esdi->fdisk = val;
- esdi_irq_update(esdi);
- return;
- }
-// fatal("Bad ESDI write %04X %02X\n", port, val);
-}
-
-void esdi_writew(uint16_t port, uint16_t val, void *p)
-{
- esdi_t *esdi = (esdi_t *)p;
-
-// pclog("Write ESDIw %04X\n",val);
- esdi->buffer[esdi->pos >> 1] = val;
- esdi->pos += 2;
-
- if (esdi->pos >= 512)
- {
- esdi->pos = 0;
- esdi->status = STAT_BUSY;
- timer_set_delay_u64(&esdi->callback_timer, 6*IDE_TIME);
- }
-}
-
-uint8_t esdi_read(uint16_t port, void *p)
-{
- esdi_t *esdi = (esdi_t *)p;
- uint8_t temp = 0xff;
-
- switch (port)
- {
- case 0x1F0: /* Data */
- temp = esdi_readw(port, esdi) & 0xff;
- break;
-
- case 0x1F1: /* Error */
- temp = esdi->error;
- break;
-
- case 0x1F2: /* Sector count */
- temp = (uint8_t)esdi->secount;
- break;
-
- case 0x1F3: /* Sector */
- temp = (uint8_t)esdi->sector;
- break;
-
- case 0x1F4: /* Cylinder low */
- temp = (uint8_t)(esdi->cylinder&0xFF);
- break;
-
- case 0x1F5: /* Cylinder high */
- temp = (uint8_t)(esdi->cylinder>>8);
- break;
-
- case 0x1F6: /* Drive/Head */
- temp = (uint8_t)(esdi->head | (esdi->drive_sel ? 0x10 : 0) | 0xa0);
- break;
-
- case 0x1F7: /* Status */
- esdi_irq_lower(esdi);
- temp = esdi->status;
- break;
- }
-
-// if (port != 0x1f7) pclog("esdi_read: addr=%04x val=%02x %04X:%04x\n", port, temp, CS, cpu_state.pc);
- return temp;
-}
-
-uint16_t esdi_readw(uint16_t port, void *p)
-{
- esdi_t *esdi = (esdi_t *)p;
- uint16_t temp;
-
- temp = esdi->buffer[esdi->pos >> 1];
- esdi->pos += 2;
-
- if (esdi->pos >= 512)
- {
-// pclog("Over! packlen %i %i\n",ide->packlen,ide->pos);
- esdi->pos=0;
- esdi->status = STAT_READY | STAT_DSC;
- if (esdi->command == CMD_READ || esdi->command == 0xa0)
- {
- esdi->secount = (esdi->secount - 1) & 0xff;
- if (esdi->secount)
- {
- esdi_next_sector(esdi);
- esdi->status = STAT_BUSY;
- timer_set_delay_u64(&esdi->callback_timer, 6*IDE_TIME);
- }
- }
- }
-
-// pclog("esdi_readw: temp=%04x %i\n", temp, esdi->pos);
- return temp;
-}
-
-void esdi_callback(void *p)
-{
- esdi_t *esdi = (esdi_t *)p;
- esdi_drive_t *drive = &esdi->drives[esdi->drive_sel];
- off64_t addr;
-
-// pclog("esdi_callback: command=%02x reset=%i\n", esdi->command, esdi->reset);
-
- if (esdi->reset)
- {
- esdi->status = STAT_READY | STAT_DSC;
- esdi->error = 1;
- esdi->secount = 1;
- esdi->sector = 1;
- esdi->head = 0;
- esdi->cylinder = 0;
- esdi->reset = 0;
-// pclog("Reset callback\n");
- return;
- }
- switch (esdi->command)
- {
- case CMD_RESTORE:
- if (!drive->hdd_file.f)
- {
- esdi->status = STAT_READY | STAT_ERR | STAT_DSC;
- esdi->error = ERR_ABRT;
- esdi_irq_raise(esdi);
- }
- else
- {
- drive->current_cylinder = 0;
- esdi->status = STAT_READY | STAT_DSC;
- esdi_irq_raise(esdi);
- }
- break;
-
- case CMD_SEEK:
- if (!drive->hdd_file.f)
- {
- esdi->status = STAT_READY | STAT_ERR | STAT_DSC;
- esdi->error = ERR_ABRT;
- esdi_irq_raise(esdi);
- }
- else
- {
- esdi->status = STAT_READY | STAT_DSC;
- esdi_irq_raise(esdi);
- }
- break;
-
- case CMD_READ:
- if (!drive->hdd_file.f)
- {
- esdi->status = STAT_READY | STAT_ERR | STAT_DSC;
- esdi->error = ERR_ABRT;
- esdi_irq_raise(esdi);
- }
- else
- {
- if (esdi_get_sector(esdi, &addr))
- {
- esdi->error = ERR_ID_NOT_FOUND;
- esdi->status = STAT_READY | STAT_DSC | STAT_ERR;
- esdi_irq_raise(esdi);
- break;
- }
- if (hdd_read_sectors(&drive->hdd_file, addr, 1, esdi->buffer))
- {
- esdi->error = ERR_ID_NOT_FOUND;
- esdi->status = STAT_READY | STAT_DSC | STAT_ERR;
- esdi_irq_raise(esdi);
- break;
- }
- esdi->pos = 0;
- esdi->status = STAT_DRQ | STAT_READY | STAT_DSC;
-// pclog("Read sector callback %i %i %i offset %08X %i left %i %02X\n",ide.sector,ide.cylinder,ide.head,addr,ide.secount,ide.spt,ide.atastat[ide.board]);
-// if (addr) output=3;
- esdi_irq_raise(esdi);
- readflash_set(READFLASH_HDC, esdi->drive_sel);
- }
- break;
-
- case CMD_WRITE:
- if (!drive->hdd_file.f)
- {
- esdi->status = STAT_READY | STAT_ERR | STAT_DSC;
- esdi->error = ERR_ABRT;
- esdi_irq_raise(esdi);
- }
- else
- {
- if (esdi_get_sector(esdi, &addr))
- {
- esdi->error = ERR_ID_NOT_FOUND;
- esdi->status = STAT_READY | STAT_DSC | STAT_ERR;
- esdi_irq_raise(esdi);
- break;
- }
- if (hdd_write_sectors(&drive->hdd_file, addr, 1, esdi->buffer))
- {
- esdi->error = ERR_ID_NOT_FOUND;
- esdi->status = STAT_READY | STAT_DSC | STAT_ERR;
- esdi_irq_raise(esdi);
- break;
- }
- esdi_irq_raise(esdi);
- esdi->secount = (esdi->secount - 1) & 0xff;
- if (esdi->secount)
- {
- esdi->status = STAT_DRQ | STAT_READY | STAT_DSC;
- esdi->pos = 0;
- esdi_next_sector(esdi);
- }
- else
- esdi->status = STAT_READY | STAT_DSC;
- readflash_set(READFLASH_HDC, esdi->drive_sel);
- }
- break;
-
- case CMD_VERIFY:
- if (!drive->hdd_file.f)
- {
- esdi->status = STAT_READY | STAT_ERR | STAT_DSC;
- esdi->error = ERR_ABRT;
- esdi_irq_raise(esdi);
- }
- else
- {
- if (esdi_get_sector(esdi, &addr))
- {
- esdi->error = ERR_ID_NOT_FOUND;
- esdi->status = STAT_READY | STAT_DSC | STAT_ERR;
- esdi_irq_raise(esdi);
- break;
- }
- if (hdd_read_sectors(&drive->hdd_file, addr, 1, esdi->buffer))
- {
- esdi->error = ERR_ID_NOT_FOUND;
- esdi->status = STAT_READY | STAT_DSC | STAT_ERR;
- esdi_irq_raise(esdi);
- break;
- }
- readflash_set(READFLASH_HDC, esdi->drive_sel);
- esdi_next_sector(esdi);
- esdi->secount = (esdi->secount - 1) & 0xff;
- if (esdi->secount)
- timer_set_delay_u64(&esdi->callback_timer, 6*IDE_TIME);
- else
- {
- esdi->pos = 0;
- esdi->status = STAT_READY | STAT_DSC;
-// pclog("Read verify callback %i %i %i offset %08X %i left\n",ide.sector,ide.cylinder,ide.head,addr,ide.secount);
- esdi_irq_raise(esdi);
- }
- }
- break;
-
- case CMD_FORMAT:
- if (!drive->hdd_file.f)
- {
- esdi->status = STAT_READY | STAT_ERR | STAT_DSC;
- esdi->error = ERR_ABRT;
- esdi_irq_raise(esdi);
- }
- else
- {
- if (esdi_get_sector(esdi, &addr))
- {
- esdi->error = ERR_ID_NOT_FOUND;
- esdi->status = STAT_READY | STAT_DSC | STAT_ERR;
- esdi_irq_raise(esdi);
- break;
- }
- if (hdd_format_sectors(&drive->hdd_file, addr, esdi->secount))
- {
- esdi->error = ERR_ID_NOT_FOUND;
- esdi->status = STAT_READY | STAT_DSC | STAT_ERR;
- esdi_irq_raise(esdi);
- break;
- }
- esdi->status = STAT_READY | STAT_DSC;
- esdi_irq_raise(esdi);
- readflash_set(READFLASH_HDC, esdi->drive_sel);
- }
- break;
-
- case CMD_DIAGNOSE:
- if (!drive->hdd_file.f)
- {
- esdi->status = STAT_READY | STAT_ERR | STAT_DSC;
- esdi->error = ERR_ABRT;
- esdi_irq_raise(esdi);
- }
- else
- {
- esdi->error = 1; /*No error detected*/
- esdi->status = STAT_READY | STAT_DSC;
- esdi_irq_raise(esdi);
- }
- break;
-
- case CMD_SET_PARAMETERS: /* Initialize Drive Parameters */
- if (!drive->hdd_file.f)
- {
- esdi->status = STAT_READY | STAT_ERR | STAT_DSC;
- esdi->error = ERR_ABRT;
- esdi_irq_raise(esdi);
- }
- else
- {
- drive->cfg_spt = esdi->secount;
- drive->cfg_hpc = esdi->head+1;
- pclog("Parameters: spt=%i hpc=%i\n", drive->cfg_spt,drive->cfg_hpc);
- if (!esdi->secount)
- fatal("secount=0\n");
- esdi->status = STAT_READY | STAT_DSC;
- esdi_irq_raise(esdi);
- }
- break;
-
- case CMD_NOP:
- esdi->status = STAT_READY | STAT_ERR | STAT_DSC;
- esdi->error = ERR_ABRT;
- esdi_irq_raise(esdi);
- break;
-
- case 0xe0:
- if (!drive->hdd_file.f)
- {
- esdi->status = STAT_READY | STAT_ERR | STAT_DSC;
- esdi->error = ERR_ABRT;
- esdi_irq_raise(esdi);
- }
- else
- {
- switch (esdi->cylinder >> 8)
- {
- case 0x31:
- esdi->cylinder = drive->hdd_file.tracks;
- break;
- case 0x33:
- esdi->cylinder = drive->hdd_file.hpc;
- break;
- case 0x35:
- esdi->cylinder = 0x200;
- break;
- case 0x36:
- esdi->cylinder = drive->hdd_file.spt;
- break;
- default:
- pclog("EDSI Bad read config %02x\n", esdi->cylinder >> 8);
- }
- esdi->status = STAT_READY | STAT_DSC;
- esdi_irq_raise(esdi);
- }
- break;
-
- case 0xa0:
- if (!drive->hdd_file.f)
- {
- esdi->status = STAT_READY | STAT_ERR | STAT_DSC;
- esdi->error = ERR_ABRT;
- esdi_irq_raise(esdi);
- }
- else
- {
- memset(esdi->buffer, 0, 512);
- memset(&esdi->buffer[3], 0xff, 512-6);
- esdi->pos = 0;
- esdi->status = STAT_DRQ | STAT_READY | STAT_DSC;
-// pclog("Read sector callback %i %i %i offset %08X %i left %i %02X\n",ide.sector,ide.cylinder,ide.head,addr,ide.secount,ide.spt,ide.atastat[ide.board]);
-// if (addr) output=3;
- esdi_irq_raise(esdi);
- }
- break;
-
- case CMD_READ_PARAMETERS:
- if (!drive->hdd_file.f)
- {
- esdi->status = STAT_READY | STAT_ERR | STAT_DSC;
- esdi->error = ERR_ABRT;
- esdi_irq_raise(esdi);
- }
- else
- {
- memset(esdi->buffer, 0, 512);
-
- esdi->buffer[0] = 0x44; /* general configuration */
- esdi->buffer[1] = drive->hdd_file.tracks; /* number of non-removable cylinders */
- esdi->buffer[2] = 0; /* number of removable cylinders */
- esdi->buffer[3] = drive->hdd_file.hpc; /* number of heads */
- esdi->buffer[5] = esdi->buffer[4] * drive->hdd_file.spt; /* number of unformatted bytes/sector */
- esdi->buffer[4] = 600; /* number of unformatted bytes/track */
- esdi->buffer[6] = drive->hdd_file.spt; /* number of sectors */
- esdi->buffer[7] = 0; /*minimum bytes in inter-sector gap*/
- esdi->buffer[8] = 0; /* minimum bytes in postamble */
- esdi->buffer[9] = 0; /* number of words of vendor status */
- /* controller info */
-// char wdp_cnsn[20]; /* controller serial number */
- esdi->buffer[20] = 2; /* controller type */
- esdi->buffer[21] = 1; /* sector buffer size, in sectors */
- esdi->buffer[22] = 0; /* ecc bytes appended */
-// char wdp_rev[8]; /* firmware revision */
- //27
- esdi->buffer[27] = 'W' | ('D' << 8);
- esdi->buffer[28] = '1' | ('0' << 8);
- esdi->buffer[29] = '0' | ('7' << 8);
- esdi->buffer[30] = 'V' | ('-' << 8);
- esdi->buffer[31] = 'S' | ('E' << 8);
- esdi->buffer[32] = '1';
- esdi->buffer[47] = 0; /* sectors per interrupt */
- esdi->buffer[48] = 0;/* can use double word read/write? */
- esdi->pos = 0;
- esdi->status = STAT_DRQ | STAT_READY | STAT_DSC;
- esdi_irq_raise(esdi);
- }
- break;
-
- default:
- pclog("ESDI Callback on unknown command %02x\n", esdi->command);
- case 0xe8:
- esdi->status = STAT_READY | STAT_ERR | STAT_DSC;
- esdi->error = ERR_ABRT;
- esdi_irq_raise(esdi);
- break;
- }
-}
-
-static void esdi_rom_write(uint32_t addr, uint8_t val, void *p)
-{
- rom_t *rom = (rom_t *)p;
-
- addr &= rom->mask;
-
- if (addr >= 0x1f00 && addr < 0x2000)
- rom->rom[addr] = val;
-}
-
-void *wd1007vse1_init()
-{
- esdi_t *esdi = malloc(sizeof(esdi_t));
- memset(esdi, 0, sizeof(esdi_t));
-
- hdd_load(&esdi->drives[0].hdd_file, 0, ide_fn[0]);
- hdd_load(&esdi->drives[1].hdd_file, 1, ide_fn[1]);
-
- esdi->drives[0].cfg_spt = esdi->drives[0].hdd_file.spt;
- esdi->drives[0].cfg_hpc = esdi->drives[0].hdd_file.hpc;
- esdi->drives[1].cfg_spt = esdi->drives[1].hdd_file.spt;
- esdi->drives[1].cfg_hpc = esdi->drives[1].hdd_file.hpc;
-
- esdi->status = STAT_READY | STAT_DSC;
- esdi->error = 1; /*No errors*/
-
- rom_init(&esdi->bios_rom, "62-000279-061.bin", 0xc8000, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL);
-
- mem_mapping_set_handler(&esdi->bios_rom.mapping,
- rom_read, rom_readw, rom_readl,
- esdi_rom_write, NULL, NULL);
-
- io_sethandler(0x01f0, 0x0001, esdi_read, esdi_readw, NULL, esdi_write, esdi_writew, NULL, esdi);
- io_sethandler(0x01f1, 0x0007, esdi_read, NULL, NULL, esdi_write, NULL, NULL, esdi);
- io_sethandler(0x03f6, 0x0001, NULL, NULL, NULL, esdi_write, NULL, NULL, esdi);
-
- timer_add(&esdi->callback_timer, esdi_callback, esdi, 0);
-
- return esdi;
-}
-
-void wd1007vse1_close(void *p)
-{
- esdi_t *esdi = (esdi_t *)p;
-
- hdd_close(&esdi->drives[0].hdd_file);
- hdd_close(&esdi->drives[1].hdd_file);
-
- free(esdi);
-}
-
-static int wd1007vse1_available()
-{
- return rom_present("62-000279-061.bin");
-}
-
-device_t wd1007vse1_device =
-{
- "Western Digital WD1007V-SE1 (ESDI)",
- DEVICE_AT,
- wd1007vse1_init,
- wd1007vse1_close,
- wd1007vse1_available,
- NULL,
- NULL,
- NULL,
- NULL
-};
diff --git a/src/esdi_at.h b/src/esdi_at.h
deleted file mode 100644
index 75efd32..0000000
--- a/src/esdi_at.h
+++ /dev/null
@@ -1 +0,0 @@
-extern device_t wd1007vse1_device;
diff --git a/src/f82c710_upc.c b/src/f82c710_upc.c
deleted file mode 100644
index 40dfd19..0000000
--- a/src/f82c710_upc.c
+++ /dev/null
@@ -1,529 +0,0 @@
-/*
- * Chips & Technologies F82C710 Universal Peripheral Controller (UPC)
- *
- * Copyright (c) 2020 Eluan Costa Miranda All rights reserved.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see
-
-#include "ibm.h"
-#include "hdd_file.h"
-#include "minivhd/minivhd.h"
-#include "minivhd/minivhd_util.h"
-
-void hdd_load_ext(hdd_file_t *hdd, const char *fn, int spt, int hpc, int tracks, int read_only)
-{
- if (hdd->f == NULL)
- {
- /* Try to open existing hard disk image */
- if (read_only)
- hdd->f = (void*)fopen64(fn, "rb");
- else
- hdd->f = (void*)fopen64(fn, "rb+");
- if (hdd->f != NULL)
- {
- hdd->img_type = HDD_IMG_RAW;
- /* Check if the file we opened is a VHD */
- if (mvhd_file_is_vhd((FILE*)hdd->f))
- {
- int err;
- fclose((FILE*)hdd->f);
- MVHDMeta *vhdm = mvhd_open(fn, (bool)read_only, &err);
- if (vhdm == NULL)
- {
- hdd->f = NULL;
- if (err == MVHD_ERR_FILE)
- {
- pclog("Cannot open VHD file '%s' : %s",
- fn, strerror(mvhd_errno));
- }
- else
- {
- pclog("Cannot open VHD file '%s' : %s",
- fn, mvhd_strerr(err));
- }
- return;
- }
- else if (err == MVHD_ERR_TIMESTAMP)
- {
- pclog("VHD: Parent/child timestamp mismatch");
- mvhd_close(vhdm);
- hdd->f = NULL;
- return;
- }
- hdd->f = (void*)vhdm;
- hdd->img_type = HDD_IMG_VHD;
- }
- }
- else
- {
- /* Failed to open existing hard disk image */
- if (errno == ENOENT && !read_only)
- {
- /* Failed because it does not exist,
- so try to create new file */
- hdd->f = (void*)fopen64(fn, "wb+");
- if (hdd->f == NULL)
- {
- pclog("Cannot create file '%s': %s",
- fn, strerror(errno));
- return;
- }
- }
- else
- {
- /* Failed for another reason */
- pclog("Cannot open file '%s': %s",
- fn, strerror(errno));
- return;
- }
- hdd->img_type = HDD_IMG_RAW;
- }
- }
- if (hdd->img_type == HDD_IMG_VHD)
- {
- MVHDMeta *vhdm = (MVHDMeta*)hdd->f;
- MVHDGeom geom = mvhd_get_geometry(vhdm);
- hdd->spt = geom.spt;
- hdd->hpc = geom.heads;
- hdd->tracks = geom.cyl;
- }
- else if (hdd->img_type == HDD_IMG_RAW)
- {
- hdd->spt = spt;
- hdd->hpc = hpc;
- hdd->tracks = tracks;
- }
- hdd->sectors = hdd->spt * hdd->hpc * hdd->tracks;
- hdd->read_only = read_only;
-}
-
-void hdd_load(hdd_file_t *hdd, int d, const char *fn)
-{
- hdd_load_ext(hdd, fn, hdc[d].spt, hdc[d].hpc, hdc[d].tracks, 0);
-}
-
-void hdd_close(hdd_file_t *hdd)
-{
- if (hdd->f)
- {
- if (hdd->img_type == HDD_IMG_VHD)
- mvhd_close((MVHDMeta*)hdd->f);
- else if (hdd->img_type == HDD_IMG_RAW)
- fclose((FILE*)hdd->f);
- }
- hdd->img_type = HDD_IMG_RAW;
- hdd->f = NULL;
-}
-
-int hdd_read_sectors(hdd_file_t *hdd, int offset, int nr_sectors, void *buffer)
-{
- if (hdd->img_type == HDD_IMG_VHD)
- {
- return mvhd_read_sectors((MVHDMeta*)hdd->f, offset, nr_sectors, buffer);
- }
- else if (hdd->img_type == HDD_IMG_RAW)
- {
- off64_t addr;
- int transfer_sectors = nr_sectors;
-
- if ((hdd->sectors - offset) < transfer_sectors)
- transfer_sectors = hdd->sectors - offset;
- addr = (uint64_t)offset * 512;
-
- fseeko64((FILE*)hdd->f, addr, SEEK_SET);
- fread(buffer, transfer_sectors*512, 1, (FILE*)hdd->f);
-
- if (nr_sectors != transfer_sectors)
- return 1;
- return 0;
- }
- /* Keep the compiler happy */
- return 1;
-}
-
-int hdd_write_sectors(hdd_file_t *hdd, int offset, int nr_sectors, void *buffer)
-{
- if (hdd->img_type == HDD_IMG_VHD)
- {
- return mvhd_write_sectors((MVHDMeta*)hdd->f, offset, nr_sectors, buffer);
- }
- else if (hdd->img_type == HDD_IMG_RAW)
- {
- off64_t addr;
- int transfer_sectors = nr_sectors;
-
- if (hdd->read_only)
- return 1;
-
- if ((hdd->sectors - offset) < transfer_sectors)
- transfer_sectors = hdd->sectors - offset;
- addr = (uint64_t)offset * 512;
-
- fseeko64((FILE*)hdd->f, addr, SEEK_SET);
- fwrite(buffer, transfer_sectors*512, 1, (FILE*)hdd->f);
-
- if (nr_sectors != transfer_sectors)
- return 1;
- return 0;
- }
- /* Keep the compiler happy */
- return 1;
-}
-
-int hdd_format_sectors(hdd_file_t *hdd, int offset, int nr_sectors)
-{
- if (hdd->img_type == HDD_IMG_VHD)
- {
- return mvhd_format_sectors((MVHDMeta*)hdd->f, offset, nr_sectors);
- }
- else if (hdd->img_type == HDD_IMG_RAW)
- {
- off64_t addr;
- int c;
- uint8_t zero_buffer[512];
- int transfer_sectors = nr_sectors;
-
- if (hdd->read_only)
- return 1;
-
- memset(zero_buffer, 0, 512);
-
- if ((hdd->sectors - offset) < transfer_sectors)
- transfer_sectors = hdd->sectors - offset;
- addr = (uint64_t)offset * 512;
- fseeko64((FILE*)hdd->f, addr, SEEK_SET);
- for (c = 0; c < transfer_sectors; c++)
- fwrite(zero_buffer, 512, 1, (FILE*)hdd->f);
-
- if (nr_sectors != transfer_sectors)
- return 1;
- return 0;
- }
- /* Keep the compiler happy */
- return 1;
-}
diff --git a/src/hdd_file.h b/src/hdd_file.h
deleted file mode 100644
index 485e09f..0000000
--- a/src/hdd_file.h
+++ /dev/null
@@ -1,23 +0,0 @@
-typedef enum hdd_img_type
-{
- HDD_IMG_RAW,
- HDD_IMG_VHD,
-} hdd_img_type;
-
-typedef struct hdd_file_t
-{
- void *f;
- int spt;
- int hpc;
- int tracks;
- int sectors;
- int read_only;
- hdd_img_type img_type;
-} hdd_file_t;
-
-void hdd_load(hdd_file_t *hdd, int d, const char *fn);
-void hdd_load_ext(hdd_file_t *hdd, const char *fn, int spt, int hpc, int tracks, int read_only);
-void hdd_close(hdd_file_t *hdd);
-int hdd_read_sectors(hdd_file_t *hdd, int offset, int nr_sectors, void *buffer);
-int hdd_write_sectors(hdd_file_t *hdd, int offset, int nr_sectors, void *buffer);
-int hdd_format_sectors(hdd_file_t *hdd, int offset, int nr_sectors);
diff --git a/src/headland.c b/src/headland.c
index 0208c5d..b4f460f 100644
--- a/src/headland.c
+++ b/src/headland.c
@@ -2,533 +2,45 @@
#include "io.h"
#include "mem.h"
#include "cpu.h"
-#include "x86.h"
#include "headland.h"
static int headland_index;
static uint8_t headland_regs[256];
-static uint8_t headland_port_92 = 0xFC, headland_ems_mar = 0, headland_cri = 0;
-static uint8_t headland_regs_cr[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
-static uint16_t headland_ems_mr[64];
-
-static mem_mapping_t headland_low_mapping;
-static mem_mapping_t headland_ems_mapping[64];
-static mem_mapping_t headland_mid_mapping;
-static mem_mapping_t headland_high_mapping;
-static mem_mapping_t headland_4000_9FFF_mapping[24];
-
-// TODO - Headland chipset's memory address mapping emulation isn't fully implemented yet, so memory configuration is hardcoded now.
-static int headland_mem_conf_cr0[41] = { 0x00, 0x00, 0x20, 0x40, 0x60, 0xA0, 0x40, 0xE0,
- 0xA0, 0xC0, 0xE0, 0xE0, 0xC0, 0xE0, 0xE0, 0xE0,
- 0xE0, 0x20, 0x40, 0x40, 0xA0, 0xC0, 0xE0, 0xE0,
- 0xC0, 0xE0, 0xE0, 0xE0, 0xE0, 0xE0, 0xE0, 0xE0,
- 0x20, 0x40, 0x60, 0x60, 0xC0, 0xE0, 0xE0, 0xE0,
- 0xE0 };
-static int headland_mem_conf_cr1[41] = { 0x00, 0x40, 0x00, 0x00, 0x00, 0x40, 0x40, 0x40,
- 0x00, 0x40, 0x40, 0x40, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x40, 0x40, 0x40, 0x00, 0x00, 0x00, 0x00,
- 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40,
- 0x00, 0x00, 0x40, 0x40, 0x00, 0x00, 0x00, 0x00,
- 0x40 };
-
-uint32_t get_headland_addr(uint32_t addr, uint16_t *mr)
-{
- if (mr && (headland_regs_cr[0] & 2) && (*mr & 0x200))
- {
- addr = (addr & 0x3fff) | ((*mr & 0x1F) << 14);
-
- if(headland_regs_cr[1] & 0x40)
- {
- if((headland_regs_cr[4] & 0x80) && (headland_regs_cr[6] & 1))
- {
- if(headland_regs_cr[0] & 0x80)
- {
- addr |= (*mr & 0x60) << 14;
- if(*mr & 0x100)
- addr += ((*mr & 0xC00) << 13) + (((*mr & 0x80) + 0x80) << 15);
- else
- addr += (*mr & 0x80) << 14;
- }
- else if(*mr & 0x100)
- addr += ((*mr & 0xC00) << 13) + (((*mr & 0x80) + 0x20) << 15);
- else
- addr += (*mr & 0x80) << 12;
- }
- else if(headland_regs_cr[0] & 0x80)
- addr |= (*mr & 0x100) ? ((*mr & 0x80) + 0x400) << 12 : (*mr & 0xE0) << 14;
- else
- addr |= (*mr & 0x100) ? ((*mr & 0xE0) + 0x40) << 14 : (*mr & 0x80) << 12;
- }
- else
- {
- if((headland_regs_cr[4] & 0x80) && (headland_regs_cr[6] & 1))
- {
- if(headland_regs_cr[0] & 0x80)
- {
- addr |= ((*mr & 0x60) << 14);
- if(*mr & 0x180)
- addr += ((*mr & 0xC00) << 13) + (((*mr & 0x180) - 0x60) << 16);
- }
- else
- addr |= ((*mr & 0x60) << 14) | ((*mr & 0x180) << 16) | ((*mr & 0xC00) << 13);
- }
- else if(headland_regs_cr[0] & 0x80)
- addr |= (*mr & 0x1E0) << 14;
- else
- addr |= (*mr & 0x180) << 12;
- }
- }
- else if(mr == NULL && (headland_regs_cr[0] & 4) == 0 && mem_size >= 1024 && addr >= 0x100000)
- addr -= 0x60000;
-
- return addr;
-}
-
-void headland_set_global_EMS_state(int state)
-{
- int i;
- uint32_t base_addr, virt_addr;
-
- for(i=0; i<32; i++)
- {
- base_addr = (i + 16) << 14;
- if(i >= 24)
- base_addr += 0x20000;
- if((state & 2) && (headland_ems_mr[((state & 1) << 5) | i] & 0x200))
- {
- virt_addr = get_headland_addr(base_addr, &headland_ems_mr[((state & 1) << 5) | i]);
- if(i < 24) mem_mapping_disable(&headland_4000_9FFF_mapping[i]);
- mem_mapping_disable(&headland_ems_mapping[(((state ^ 1) & 1) << 5) | i]);
- mem_mapping_enable(&headland_ems_mapping[((state & 1) << 5) | i]);
- if(virt_addr < (mem_size << 10)) mem_mapping_set_exec(&headland_ems_mapping[((state & 1) << 5) | i], ram + virt_addr);
- else mem_mapping_set_exec(&headland_ems_mapping[((state & 1) << 5) | i], NULL);
- }
- else
- {
- mem_mapping_set_exec(&headland_ems_mapping[((state & 1) << 5) | i], ram + base_addr);
- mem_mapping_disable(&headland_ems_mapping[(((state ^ 1) & 1) << 5) | i]);
- mem_mapping_disable(&headland_ems_mapping[((state & 1) << 5) | i]);
-
- if(i < 24)
- mem_mapping_enable(&headland_4000_9FFF_mapping[i]);
- }
- }
- flushmmucache();
-}
-
-void headland_memmap_state_update()
-{
- int i;
- uint32_t addr;
-
- for(i=0;i<24;i++)
- {
- addr = get_headland_addr(0x40000 + (i << 14), NULL);
- mem_mapping_set_exec(&headland_4000_9FFF_mapping[i], addr < (mem_size << 10) ? ram + addr : NULL);
- //pclog("headland_memmap_state_update : Address %06X to %06X\n", 0x40000 + (i << 14), addr);
- }
-
- mem_set_mem_state(0xA0000, 0x40000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
-
- if (mem_size > 640)
- {
- if ((headland_regs_cr[0] & 4) == 0)
- {
- mem_mapping_set_addr(&headland_mid_mapping, 0x100000, mem_size > 1024 ? 0x60000 : (mem_size - 640) << 10);
- mem_mapping_set_exec(&headland_mid_mapping, ram + 0xA0000);
- if (mem_size > 1024)
- {
- mem_mapping_set_addr(&headland_high_mapping, 0x160000, (mem_size - 1024) << 10);
- mem_mapping_set_exec(&headland_high_mapping, ram + 0x100000);
- }
- }
- else
- {
- mem_mapping_set_addr(&headland_mid_mapping, 0xA0000, mem_size > 1024 ? 0x60000 : (mem_size - 640) << 10);
- mem_mapping_set_exec(&headland_mid_mapping, ram + 0xA0000);
- if (mem_size > 1024)
- {
- mem_mapping_set_addr(&headland_high_mapping, 0x100000, (mem_size - 1024) << 10);
- mem_mapping_set_exec(&headland_high_mapping, ram + 0x100000);
- }
- }
- }
-
- headland_set_global_EMS_state(headland_regs_cr[0] & 3);
-}
void headland_write(uint16_t addr, uint8_t val, void *priv)
{
- uint8_t old_val, index;
- uint32_t base_addr, virt_addr;
-
- switch(addr)
+ if (addr & 1)
{
- case 0x22:
- headland_index = val;
- break;
-
- case 0x23:
- old_val = headland_regs[headland_index];
-
if (headland_index == 0xc1 && !is486) val = 0;
headland_regs[headland_index] = val;
- //pclog("Headland write %02X %02X at %04X:%04X\n",headland_index,val,CS,cpu_state.oldpc);
+ pclog("Headland write %02X %02X\n",headland_index,val);
if (headland_index == 0x82)
{
- if (val & 0x10)
+ shadowbios = val & 0x10;
+ shadowbios_write = !(val & 0x10);
+ if (shadowbios)
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED);
else
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
}
- else if (headland_index == 0x87)
- {
- if ((val & 1) && !(old_val & 1))
- softresetx86();
- }
- break;
-
- case 0x92:
- if ((mem_a20_alt ^ val) & 2)
- {
- mem_a20_alt = val & 2;
- mem_a20_recalc();
- }
- if ((~headland_port_92 & val) & 1)
- {
- softresetx86();
- cpu_set_edx();
- }
- headland_port_92 = val | 0xFC;
- break;
-
- case 0x1EC:
- //pclog("Set EMS Map Register to %02X(actually FF%02X) at %04X:%04X\n", val, val, CS, cpu_state.oldpc);
- headland_ems_mr[headland_ems_mar & 0x3F] = val | 0xFF00;
- index = headland_ems_mar & 0x1F;
- base_addr = (index + 16) << 14;
- if(index >= 24)
- base_addr += 0x20000;
- if((headland_regs_cr[0] & 2) && ((headland_regs_cr[0] & 1) == ((headland_ems_mar & 0x20) >> 5)))
- {
- virt_addr = get_headland_addr(base_addr, &headland_ems_mr[headland_ems_mar & 0x3F]);
- if(index < 24) mem_mapping_disable(&headland_4000_9FFF_mapping[index]);
- if(virt_addr < (mem_size << 10)) mem_mapping_set_exec(&headland_ems_mapping[headland_ems_mar & 0x3F], ram + virt_addr);
- else mem_mapping_set_exec(&headland_ems_mapping[headland_ems_mar & 0x3F], NULL);
- mem_mapping_enable(&headland_ems_mapping[headland_ems_mar & 0x3F]);
- pclog("Map page %d(address %05X) to address %06X\n", index, base_addr, virt_addr);
- flushmmucache();
- }
- if(headland_ems_mar & 0x80) headland_ems_mar++;
- break;
-
- case 0x1ED:
- //pclog("Set Control Register Index to %02X at %04X:%04X\n", val, CS, cpu_state.oldpc);
- headland_cri = val;
- break;
-
- case 0x1EE:
- //pclog("Set EMS Map Address Register to %02X at %04X:%04X\n", val, CS, cpu_state.oldpc);
- headland_ems_mar = val;
- break;
-
- case 0x1EF:
- //pclog("Set Control Register %1X to %02X at %04X:%04X\n", headland_cri, val, CS, cpu_state.oldpc);
- old_val = headland_regs_cr[headland_cri];
- switch(headland_cri)
- {
- case 0:
- headland_regs_cr[0] = (val & 0x1F) | headland_mem_conf_cr0[(mem_size > 640 ? mem_size : mem_size - 128) >> 9];
- mem_set_mem_state(0xE0000, 0x10000, (val & 8 ? MEM_READ_INTERNAL : MEM_READ_EXTERNAL) | MEM_WRITE_DISABLED);
- mem_set_mem_state(0xF0000, 0x10000, (val & 0x10 ? MEM_READ_INTERNAL: MEM_READ_EXTERNAL) | MEM_WRITE_DISABLED);
- headland_memmap_state_update();
- break;
- case 1:
- headland_regs_cr[1] = (val & 0xBF) | headland_mem_conf_cr1[(mem_size > 640 ? mem_size : mem_size - 128) >> 9];
- headland_memmap_state_update();
- break;
- case 2:
- case 3:
- case 5:
- headland_regs_cr[headland_cri] = val;
- headland_memmap_state_update();
- break;
- case 4:
- headland_regs_cr[4] = (headland_regs_cr[4] & 0xF0) | (val & 0x0F);
- if(val & 1)
- {
- mem_mapping_disable(&bios_mapping[0]);
- mem_mapping_disable(&bios_mapping[1]);
- mem_mapping_disable(&bios_mapping[2]);
- mem_mapping_disable(&bios_mapping[3]);
- }
- else
- {
- mem_mapping_enable(&bios_mapping[0]);
- mem_mapping_enable(&bios_mapping[1]);
- mem_mapping_enable(&bios_mapping[2]);
- mem_mapping_enable(&bios_mapping[3]);
- }
- break;
- case 6:
- if(headland_regs_cr[4] & 0x80)
- {
- headland_regs_cr[headland_cri] = (val & 0xFE) | (mem_size > 8192 ? 1 : 0);
- headland_memmap_state_update();
- }
- break;
- default:
- break;
- }
- break;
-
- default:
- break;
- }
-}
-
-void headland_writew(uint16_t addr, uint16_t val, void *priv)
-{
- uint8_t index;
- uint32_t base_addr, virt_addr;
-
- switch(addr)
- {
- case 0x1EC:
- //pclog("Set EMS Map Register to %04X at %04X:%04X\n", val, CS, cpu_state.oldpc);
- headland_ems_mr[headland_ems_mar & 0x3F] = val;
- index = headland_ems_mar & 0x1F;
- base_addr = (index + 16) << 14;
- if(index >= 24)
- base_addr += 0x20000;
- if((headland_regs_cr[0] & 2) && (headland_regs_cr[0] & 1) == ((headland_ems_mar & 0x20) >> 5))
- {
- if(val & 0x200)
- {
- virt_addr = get_headland_addr(base_addr, &headland_ems_mr[headland_ems_mar & 0x3F]);
- if(index < 24) mem_mapping_disable(&headland_4000_9FFF_mapping[index]);
- if(virt_addr < (mem_size << 10)) mem_mapping_set_exec(&headland_ems_mapping[headland_ems_mar & 0x3F], ram + virt_addr);
- else mem_mapping_set_exec(&headland_ems_mapping[headland_ems_mar & 0x3F], NULL);
- mem_mapping_enable(&headland_ems_mapping[headland_ems_mar & 0x3F]);
- //pclog("Map page %d(address %05X) to address %07X(val=%04X)\n", index, base_addr, virt_addr, val);
- }
- else
- {
- mem_mapping_set_exec(&headland_ems_mapping[headland_ems_mar & 0x3F], ram + base_addr);
- mem_mapping_disable(&headland_ems_mapping[headland_ems_mar & 0x3F]);
- if(index < 24) mem_mapping_enable(&headland_4000_9FFF_mapping[index]);
- //pclog("Unmap page %d(address %05X)\n", index, base_addr);
- }
- flushmmucache();
- }
- if(headland_ems_mar & 0x80) headland_ems_mar++;
- break;
-
- default:
- break;
}
+ else
+ headland_index = val;
}
uint8_t headland_read(uint16_t addr, void *priv)
{
- uint8_t val;
-
- switch(addr)
+ if (addr & 1)
{
- case 0x22:
- val = headland_index;
- break;
-
- case 0x23:
if ((headland_index >= 0xc0 || headland_index == 0x20) && cpu_iscyrix)
- val = 0xff; /*Don't conflict with Cyrix config registers*/
- else
- val = headland_regs[headland_index];
- break;
-
- case 0x92:
- val = headland_port_92 | 0xFC;
- break;
-
- case 0x1EC:
- val = headland_ems_mr[headland_ems_mar & 0x3F];
- if(headland_ems_mar & 0x80) headland_ems_mar++;
- break;
-
- case 0x1ED:
- val = headland_cri;
- break;
-
- case 0x1EE:
- val = headland_ems_mar;
- break;
-
- case 0x1EF:
- switch(headland_cri)
- {
- case 0:
- val = (headland_regs_cr[0] & 0x1F) | headland_mem_conf_cr0[(mem_size > 640 ? mem_size : mem_size - 128) >> 9];
- break;
- case 1:
- val = (headland_regs_cr[1] & 0xBF) | headland_mem_conf_cr1[(mem_size > 640 ? mem_size : mem_size - 128) >> 9];
- break;
- case 6:
- if(headland_regs_cr[4] & 0x80)
- val = (headland_regs_cr[6] & 0xFE) | (mem_size > 8192 ? 1 : 0);
- else
- val = 0;
- break;
- default:
- val = headland_regs_cr[headland_cri];
- break;
- }
- break;
-
- default:
- val = 0xFF;
- break;
+ return 0xff; /*Don't conflict with Cyrix config registers*/
+ return headland_regs[headland_index];
}
-
- return val;
-}
-
-uint16_t headland_readw(uint16_t addr, void *priv)
-{
- uint16_t val;
-
- switch(addr)
- {
- case 0x1EC:
- val = headland_ems_mr[headland_ems_mar & 0x3F] | ((headland_regs_cr[4] & 0x80) ? 0xF000 : 0xFC00);
- if(headland_ems_mar & 0x80) headland_ems_mar++;
- break;
-
- default:
- val = 0xFFFF;
- break;
- }
-
- return val;
-}
-
-uint8_t mem_read_headlandb(uint32_t addr, void *priv)
-{
- uint8_t val = 0xff;
-
- addr = get_headland_addr(addr, priv);
- if (addr < (mem_size << 10))
- val = ram[addr];
-
- return val;
-}
-
-void mem_write_headlandb(uint32_t addr, uint8_t val, void *priv)
-{
- addr = get_headland_addr(addr, priv);
- if (addr < (mem_size << 10))
- ram[addr] = val;
-}
-
-uint16_t mem_read_headlandw(uint32_t addr, void *priv)
-{
- uint16_t val = 0xffff;
-
- if((addr & 0x3FFF) == 0x3FFF) pclog("mem_read_headlandw(%08X, %p) called.\n", addr, priv);
- addr = get_headland_addr(addr, priv);
- if (addr < (mem_size << 10))
- val = *(uint16_t *)&ram[addr];
-
- return val;
-}
-
-void mem_write_headlandw(uint32_t addr, uint16_t val, void *priv)
-{
- if((addr & 0x3FFF) == 0x3FFF) pclog("mem_write_headlandw(%08X, %04X, %p) called.\n", addr, val, priv);
- addr = get_headland_addr(addr, priv);
- if (addr < (mem_size << 10))
- *(uint16_t *)&ram[addr] = val;
-}
-
-uint32_t mem_read_headlandl(uint32_t addr, void *priv)
-{
- uint32_t val = 0xffffffff;
-
- if((addr & 0x3FFF) > 0x3FFC) pclog("mem_read_headlandl(%08X, %p) called.\n", addr, priv);
- addr = get_headland_addr(addr, priv);
- if (addr < (mem_size << 10))
- val = *(uint32_t *)&ram[addr];
-
- return val;
-}
-
-void mem_write_headlandl(uint32_t addr, uint32_t val, void *priv)
-{
- if((addr & 0x3FFF) > 0x3FFC) pclog("mem_write_headland(%08X, %08X, %p) called.\n", addr, val, priv);
- addr = get_headland_addr(addr, priv);
- if (addr < (mem_size << 10))
- *(uint32_t *)&ram[addr] = val;
+ return headland_index;
}
void headland_init()
{
- int i;
-
- for(i=0; i<8; i++)
- headland_regs_cr[i] = 0;
- headland_regs_cr[0] = 4;
-
- switch(romset)
- {
- case ROM_AMI386SX:
- // Remark - Previously distributed AMI386 BIOS doesn't seem to be for the Headland chipset.
- io_sethandler(0x0022, 0x0002, headland_read, NULL, NULL, headland_write, NULL, NULL, NULL);
- break;
- case ROM_AMA932J:
- headland_regs_cr[4] = 0x20;
- io_sethandler(0x0092, 0x0001, headland_read, NULL, NULL, headland_write, NULL, NULL, NULL);
- break;
- default:
- headland_regs_cr[4] = 0;
- break;
- }
-
- io_sethandler(0x01EC, 0x0001, headland_read, headland_readw, NULL, headland_write, headland_writew, NULL, NULL);
- io_sethandler(0x01ED, 0x0003, headland_read, NULL, NULL, headland_write, NULL, NULL, NULL);
-
- for(i=0; i<64; i++)
- headland_ems_mr[i] = 0;
-
- mem_mapping_disable(&ram_low_mapping);
- mem_mapping_disable(&ram_mid_mapping);
- mem_mapping_disable(&ram_high_mapping);
-
- mem_mapping_add(&headland_low_mapping, 0, 0x40000, mem_read_headlandb, mem_read_headlandw, mem_read_headlandl, mem_write_headlandb, mem_write_headlandw, mem_write_headlandl, ram, MEM_MAPPING_INTERNAL, NULL);
-
- if(mem_size > 640)
- {
- mem_mapping_add(&headland_mid_mapping, 0xA0000, 0x60000, mem_read_headlandb, mem_read_headlandw, mem_read_headlandl, mem_write_headlandb, mem_write_headlandw, mem_write_headlandl, ram + 0xA0000, MEM_MAPPING_INTERNAL, NULL);
- mem_mapping_enable(&headland_mid_mapping);
- }
-
- if(mem_size > 1024)
- {
- mem_mapping_add(&headland_high_mapping, 0x100000, ((mem_size - 1024) * 1024), mem_read_headlandb, mem_read_headlandw, mem_read_headlandl, mem_write_headlandb, mem_write_headlandw, mem_write_headlandl, ram + 0x100000, MEM_MAPPING_INTERNAL, NULL);
- mem_mapping_enable(&headland_high_mapping);
- }
-
- for (i = 0; i < 24; i++)
- {
- mem_mapping_add(&headland_4000_9FFF_mapping[i], 0x40000 + (i << 14), 0x4000, mem_read_headlandb, mem_read_headlandw, mem_read_headlandl, mem_write_headlandb, mem_write_headlandw, mem_write_headlandl, mem_size > 256 + (i << 4) ? ram + 0x40000 + (i << 14) : NULL, MEM_MAPPING_INTERNAL, NULL);
- mem_mapping_enable(&headland_4000_9FFF_mapping[i]);
- }
-
- for (i = 0; i < 64; i++)
- {
- headland_ems_mr[i] = 0;
- mem_mapping_add(&headland_ems_mapping[i], ((i & 31) + ((i & 31) >= 24 ? 24 : 16)) << 14, 0x04000, mem_read_headlandb, mem_read_headlandw, mem_read_headlandl, mem_write_headlandb, mem_write_headlandw, mem_write_headlandl, ram + (((i & 31) + ((i & 31) >= 24 ? 24 : 16)) << 14), 0, &headland_ems_mr[i]);
- mem_mapping_disable(&headland_ems_mapping[i]);
- }
-
- headland_memmap_state_update();
+ io_sethandler(0x0022, 0x0002, headland_read, NULL, NULL, headland_write, NULL, NULL, NULL);
}
diff --git a/src/i430fx.c b/src/i430fx.c
index 678c824..5b7cf7f 100644
--- a/src/i430fx.c
+++ b/src/i430fx.c
@@ -34,37 +34,20 @@ static void i430fx_map(uint32_t addr, uint32_t size, int state)
void i430fx_write(int func, int addr, uint8_t val, void *priv)
{
if (func)
- return;
-
- if (addr >= 0x10 && addr < 0x4f)
- return;
+ return;
switch (addr)
{
case 0x00: case 0x01: case 0x02: case 0x03:
case 0x08: case 0x09: case 0x0a: case 0x0b:
- case 0x0c: case 0x0e:
+ case 0x0e:
return;
- case 0x04: /*Command register*/
- val &= 0x02;
- val |= 0x04;
- break;
- case 0x05:
- val = 0;
- break;
-
- case 0x06: /*Status*/
- val = 0;
- break;
- case 0x07:
- val = 0x02;
- break;
-
case 0x59: /*PAM0*/
if ((card_i430fx[0x59] ^ val) & 0xf0)
{
i430fx_map(0xf0000, 0x10000, val >> 4);
+ shadowbios = (val & 0x10);
}
pclog("i430fx_write : PAM0 write %02X\n", val);
break;
@@ -106,30 +89,6 @@ void i430fx_write(int func, int addr, uint8_t val, void *priv)
i430fx_map(0xec000, 0x04000, val >> 4);
pclog("i430fx_write : PAM6 write %02X\n", val);
break;
-
- case 0x72: /*SMRAM*/
- pclog("Write SMRAM %02x\n", val);
- val = (val & 0x78) | 2; /*SMRAM always at A0000-BFFFF*/
- val |= (card_i430fx[0x72] & 0x10); /*D_LCK can not be cleared by software*/
- if (val & 0x10) /*D_LCK locks D_OPEN and G_SMRAME*/
- {
- val &= ~0x48; /*D_OPEN is forced to 0, G_SMRAME is read only*/
- val |= (card_i430fx[0x72] & 0x08);
- }
- if ((card_i430fx[0x72] ^ val) & 0x40)
- {
- if (val & 0x40) /*SMRAM enabled*/
- {
- pclog("Enable SMRAM\n");
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- }
- else
- {
- pclog("Disable SMRAM\n");
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- }
- }
- break;
}
card_i430fx[addr] = val;
@@ -143,15 +102,21 @@ uint8_t i430fx_read(int func, int addr, void *priv)
return card_i430fx[addr];
}
-static void i430fx_smram_enable(void)
+static uint8_t trc = 0;
+
+void i430fx_trc_write(uint16_t port, uint8_t val, void *p)
{
- if (card_i430fx[0x72] & 8)
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
-}
-static void i430fx_smram_disable(void)
-{
- if (card_i430fx[0x72] & 8)
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
+ if ((val & 4) && !(trc & 4))
+ {
+ if (val & 2) /*Hard reset*/
+ {
+ i430fx_write(0, 0x59, 0xf, NULL); /*Should reset all PCI devices, but just set PAM0 to point to ROM for now*/
+ keyboard_at_reset(); /*Reset keyboard controller to reset system flag*/
+ }
+ resetx86();
+ }
+
+ trc = val;
}
void i430fx_init()
@@ -160,7 +125,7 @@ void i430fx_init()
memset(card_i430fx, 0, 256);
card_i430fx[0x00] = 0x86; card_i430fx[0x01] = 0x80; /*Intel*/
- card_i430fx[0x02] = 0x2d; card_i430fx[0x03] = 0x12; /*SB82437FX-66*/
+ card_i430fx[0x02] = 0x22; card_i430fx[0x03] = 0x01; /*SB82437FX-66*/
card_i430fx[0x04] = 0x06; card_i430fx[0x05] = 0x00;
card_i430fx[0x06] = 0x00; card_i430fx[0x07] = 0x82;
card_i430fx[0x08] = 0x00; /*A0 stepping*/
@@ -177,11 +142,5 @@ void i430fx_init()
// card_i430fx[0x74] = 0x0e;
// card_i430fx[0x78] = 0x23;
- smram_enable = i430fx_smram_enable;
- smram_disable = i430fx_smram_disable;
-}
-
-void i430fx_reset()
-{
- i430fx_write(0, 0x59, 0xf, NULL); /*Should reset all PCI devices, but just set PAM0 to point to ROM for now*/
+ io_sethandler(0x0cf9, 0x0001, NULL, NULL, NULL, i430fx_trc_write, NULL, NULL, NULL);
}
diff --git a/src/i430fx.h b/src/i430fx.h
index 0265f27..fff11d2 100644
--- a/src/i430fx.h
+++ b/src/i430fx.h
@@ -1,2 +1 @@
void i430fx_init();
-void i430fx_reset();
diff --git a/src/i430hx.c b/src/i430hx.c
deleted file mode 100644
index 466b002..0000000
--- a/src/i430hx.c
+++ /dev/null
@@ -1,186 +0,0 @@
-#include
-
-#include "ibm.h"
-#include "io.h"
-#include "mem.h"
-#include "pci.h"
-
-#include "i430hx.h"
-
-static uint8_t card_i430hx[256];
-
-static void i430hx_map(uint32_t addr, uint32_t size, int state)
-{
- switch (state & 3)
- {
- case 0:
- mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- break;
- case 1:
- mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL);
- break;
- case 2:
- mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
- break;
- case 3:
- mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- break;
- }
- flushmmucache_nopc();
-}
-
-void i430hx_write(int func, int addr, uint8_t val, void *priv)
-{
- if (func)
- return;
-
- if (addr >= 0x10 && addr < 0x4f)
- return;
-
- switch (addr)
- {
- case 0x00: case 0x01: case 0x02: case 0x03:
- case 0x08: case 0x09: case 0x0a: case 0x0b:
- case 0x0c: case 0x0e:
- return;
-
- case 0x04: /*Command register*/
- val &= 0x02;
- val |= 0x04;
- break;
- case 0x05:
- val = 0;
- break;
-
- case 0x06: /*Status*/
- val = 0;
- break;
- case 0x07:
- val &= 0x80;
- val |= 0x02;
- break;
-
- case 0x59: /*PAM0*/
- if ((card_i430hx[0x59] ^ val) & 0xf0)
- {
- i430hx_map(0xf0000, 0x10000, val >> 4);
-// shadowbios = (val & 0x10);
- }
- pclog("i430hx_write : PAM0 write %02X\n", val);
- break;
- case 0x5a: /*PAM1*/
- if ((card_i430hx[0x5a] ^ val) & 0x0f)
- i430hx_map(0xc0000, 0x04000, val & 0xf);
- if ((card_i430hx[0x5a] ^ val) & 0xf0)
- i430hx_map(0xc4000, 0x04000, val >> 4);
- break;
- case 0x5b: /*PAM2*/
- if ((card_i430hx[0x5b] ^ val) & 0x0f)
- i430hx_map(0xc8000, 0x04000, val & 0xf);
- if ((card_i430hx[0x5b] ^ val) & 0xf0)
- i430hx_map(0xcc000, 0x04000, val >> 4);
- break;
- case 0x5c: /*PAM3*/
- if ((card_i430hx[0x5c] ^ val) & 0x0f)
- i430hx_map(0xd0000, 0x04000, val & 0xf);
- if ((card_i430hx[0x5c] ^ val) & 0xf0)
- i430hx_map(0xd4000, 0x04000, val >> 4);
- break;
- case 0x5d: /*PAM4*/
- if ((card_i430hx[0x5d] ^ val) & 0x0f)
- i430hx_map(0xd8000, 0x04000, val & 0xf);
- if ((card_i430hx[0x5d] ^ val) & 0xf0)
- i430hx_map(0xdc000, 0x04000, val >> 4);
- break;
- case 0x5e: /*PAM5*/
- if ((card_i430hx[0x5e] ^ val) & 0x0f)
- i430hx_map(0xe0000, 0x04000, val & 0xf);
- if ((card_i430hx[0x5e] ^ val) & 0xf0)
- i430hx_map(0xe4000, 0x04000, val >> 4);
- pclog("i430hx_write : PAM5 write %02X\n", val);
- break;
- case 0x5f: /*PAM6*/
- if ((card_i430hx[0x5f] ^ val) & 0x0f)
- i430hx_map(0xe8000, 0x04000, val & 0xf);
- if ((card_i430hx[0x5f] ^ val) & 0xf0)
- i430hx_map(0xec000, 0x04000, val >> 4);
- pclog("i430hx_write : PAM6 write %02X\n", val);
- break;
-
- case 0x72: /*SMRAM*/
- pclog("Write SMRAM %02x\n", val);
- val = (val & 0x78) | 2; /*SMRAM always at A0000-BFFFF*/
- val |= (card_i430hx[0x72] & 0x10); /*D_LCK can not be cleared by software*/
- if (val & 0x10) /*D_LCK locks D_OPEN and G_SMRAME*/
- {
- val &= ~0x48; /*D_OPEN is forced to 0, G_SMRAME is read only*/
- val |= (card_i430hx[0x72] & 0x08);
- }
- if ((card_i430hx[0x72] ^ val) & 0x40)
- {
- if (val & 0x40) /*SMRAM enabled*/
- {
- pclog("Enable SMRAM\n");
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- }
- else
- {
- pclog("Disable SMRAM\n");
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- }
- }
- break;
- }
-
- card_i430hx[addr] = val;
-}
-
-uint8_t i430hx_read(int func, int addr, void *priv)
-{
- if (func)
- return 0xff;
-
- return card_i430hx[addr];
-}
-
-static void i430hx_smram_enable(void)
-{
- if (card_i430hx[0x72] & 8)
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
-}
-static void i430hx_smram_disable(void)
-{
- if (card_i430hx[0x72] & 8)
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
-}
-
-void i430hx_init()
-{
- pci_add_specific(0, i430hx_read, i430hx_write, NULL);
-
- memset(card_i430hx, 0, 256);
- card_i430hx[0x00] = 0x86; card_i430hx[0x01] = 0x80; /*Intel*/
- card_i430hx[0x02] = 0x50; card_i430hx[0x03] = 0x12; /*82439HX*/
- card_i430hx[0x04] = 0x06; card_i430hx[0x05] = 0x00;
- card_i430hx[0x07] = 0x02;
- card_i430hx[0x08] = 0x00; /*A0 stepping*/
- card_i430hx[0x0B] = 0x06;
- card_i430hx[0x51] = 0x20;
- card_i430hx[0x52] = 0xB5; /*512kb cache*/
- card_i430hx[0x56] = 0x52; /*DRAM control*/
- card_i430hx[0x59] = 0x40;
- card_i430hx[0x5A] = card_i430hx[0x5B] = card_i430hx[0x5C] = card_i430hx[0x5D] = 0x44;
- card_i430hx[0x5E] = card_i430hx[0x5F] = 0x44;
- card_i430hx[0x60] = card_i430hx[0x61] = card_i430hx[0x62] = card_i430hx[0x63] = 0x02;
- card_i430hx[0x64] = card_i430hx[0x5F] = 0x02;
- card_i430hx[0x65] = card_i430hx[0x66] = card_i430hx[0x67] = 0x02;
- card_i430hx[0x68] = 0x11;
-
- smram_enable = i430hx_smram_enable;
- smram_disable = i430hx_smram_disable;
-}
-
-void i430hx_reset()
-{
- i430hx_write(0, 0x59, 0xf, NULL); /*Should reset all PCI devices, but just set PAM0 to point to ROM for now*/
-}
diff --git a/src/i430hx.h b/src/i430hx.h
deleted file mode 100644
index 30a6685..0000000
--- a/src/i430hx.h
+++ /dev/null
@@ -1,2 +0,0 @@
-void i430hx_init();
-void i430hx_reset();
diff --git a/src/i430lx.c b/src/i430lx.c
index 4d2bb74..1f6a874 100644
--- a/src/i430lx.c
+++ b/src/i430lx.c
@@ -1,12 +1,10 @@
#include
#include "ibm.h"
-#include "ide.h"
#include "io.h"
#include "keyboard_at.h"
#include "mem.h"
#include "pci.h"
-#include "sio.h"
#include "x86.h"
#include "i430lx.h"
@@ -38,35 +36,18 @@ void i430lx_write(int func, int addr, uint8_t val, void *priv)
if (func)
return;
- if (addr >= 0x10 && addr < 0x4f)
- return;
-
switch (addr)
{
case 0x00: case 0x01: case 0x02: case 0x03:
case 0x08: case 0x09: case 0x0a: case 0x0b:
- case 0x0c: case 0x0e:
+ case 0x0e:
return;
- case 0x04: /*Command register*/
- val &= 0x42;
- val |= 0x04;
- break;
- case 0x05:
- val &= 0x01;
- break;
-
- case 0x06: /*Status*/
- val = 0;
- break;
- case 0x07:
- val = 0x02;
- break;
-
case 0x59: /*PAM0*/
if ((card_i430lx[0x59] ^ val) & 0xf0)
{
i430lx_map(0xf0000, 0x10000, val >> 4);
+ shadowbios = (val & 0x10);
}
pclog("i430lx_write : PAM0 write %02X\n", val);
break;
@@ -108,30 +89,6 @@ void i430lx_write(int func, int addr, uint8_t val, void *priv)
i430lx_map(0xec000, 0x04000, val >> 4);
pclog("i430lx_write : PAM6 write %02X\n", val);
break;
-
- case 0x72: /*SMRAM*/
- pclog("Write SMRAM %02x\n", val);
- val = (val & 0x38) | 2; /*SMRAM always at A0000-BFFFF*/
- val |= (card_i430lx[0x72] & 0x08); /*D_LCK can not be cleared by software*/
- if (val & 0x08) /*D_LCK locks D_OPEN*/
- {
- val &= ~0x20; /*D_OPEN is forced to 0*/
- }
- val |= (card_i430lx[0x72] & 0x08);
- if ((card_i430lx[0x72] ^ val) & 0x20)
- {
- if (val & 0x20) /*SMRAM enabled*/
- {
- pclog("Enable SMRAM\n");
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- }
- else
- {
- pclog("Disable SMRAM\n");
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- }
- }
- break;
}
card_i430lx[addr] = val;
@@ -159,27 +116,14 @@ void i430lx_trc_write(uint16_t port, uint8_t val, void *p)
if (val & 2) /*Hard reset*/
{
i430lx_write(0, 0x59, 0xf, NULL); /*Should reset all PCI devices, but just set PAM0 to point to ROM for now*/
- card_i430lx[0x72] = 0; /*Also clear SMRAM register so BIOS will relocate SMBASE*/
keyboard_at_reset(); /*Reset keyboard controller to reset system flag*/
- ide_reset_devices();
- resetx86();
}
- else
- softresetx86();
+ resetx86();
}
-
+
trc = val;
}
-static void i430lx_smram_enable(void)
-{
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
-}
-static void i430lx_smram_disable(void)
-{
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
-}
-
void i430lx_init()
{
pci_add_specific(0, i430lx_read, i430lx_write, NULL);
@@ -205,7 +149,4 @@ void i430lx_init()
// card_i430lx[0x78] = 0x23;
io_sethandler(0x0cf9, 0x0001, i430lx_trc_read, NULL, NULL, i430lx_trc_write, NULL, NULL, NULL);
-
- smram_enable = i430lx_smram_enable;
- smram_disable = i430lx_smram_disable;
}
diff --git a/src/i430vx.c b/src/i430vx.c
index fde2258..5f2cb05 100644
--- a/src/i430vx.c
+++ b/src/i430vx.c
@@ -34,36 +34,18 @@ void i430vx_write(int func, int addr, uint8_t val, void *priv)
if (func)
return;
- if (addr >= 0x10 && addr < 0x4f)
- return;
-
switch (addr)
{
case 0x00: case 0x01: case 0x02: case 0x03:
case 0x08: case 0x09: case 0x0a: case 0x0b:
- case 0x0c: case 0x0e:
+ case 0x0e:
return;
- case 0x04: /*Command register*/
- val &= 0x02;
- val |= 0x04;
- break;
- case 0x05:
- val = 0;
- break;
-
- case 0x06: /*Status*/
- val = 0;
- break;
- case 0x07:
- val &= 0x80;
- val |= 0x02;
- break;
-
case 0x59: /*PAM0*/
if ((card_i430vx[0x59] ^ val) & 0xf0)
{
i430vx_map(0xf0000, 0x10000, val >> 4);
+ shadowbios = (val & 0x10);
}
pclog("i430vx_write : PAM0 write %02X\n", val);
break;
@@ -105,30 +87,6 @@ void i430vx_write(int func, int addr, uint8_t val, void *priv)
i430vx_map(0xec000, 0x04000, val >> 4);
pclog("i430vx_write : PAM6 write %02X\n", val);
break;
-
- case 0x72: /*SMRAM*/
- pclog("Write SMRAM %02x\n", val);
- val = (val & 0x78) | 2; /*SMRAM always at A0000-BFFFF*/
- val |= (card_i430vx[0x72] & 0x10); /*D_LCK can not be cleared by software*/
- if (val & 0x10) /*D_LCK locks D_OPEN and G_SMRAME*/
- {
- val &= ~0x48; /*D_OPEN is forced to 0, G_SMRAME is read only*/
- val |= (card_i430vx[0x72] & 0x08);
- }
- if ((card_i430vx[0x72] ^ val) & 0x40)
- {
- if (val & 0x40) /*SMRAM enabled*/
- {
- pclog("Enable SMRAM\n");
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- }
- else
- {
- pclog("Disable SMRAM\n");
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- }
- }
- break;
}
card_i430vx[addr] = val;
@@ -142,17 +100,7 @@ uint8_t i430vx_read(int func, int addr, void *priv)
return card_i430vx[addr];
}
-static void i430vx_smram_enable(void)
-{
- if (card_i430vx[0x72] & 8)
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
-}
-static void i430vx_smram_disable(void)
-{
- if (card_i430vx[0x72] & 8)
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
-}
-
+
void i430vx_init()
{
pci_add_specific(0, i430vx_read, i430vx_write, NULL);
@@ -175,12 +123,4 @@ void i430vx_init()
card_i430vx[0x72] = 0x02;
card_i430vx[0x74] = 0x0e;
card_i430vx[0x78] = 0x23;
-
- smram_enable = i430vx_smram_enable;
- smram_disable = i430vx_smram_disable;
-}
-
-void i430vx_reset()
-{
- i430vx_write(0, 0x59, 0xf, NULL); /*Should reset all PCI devices, but just set PAM0 to point to ROM for now*/
}
diff --git a/src/i430vx.h b/src/i430vx.h
index 25cda4a..22bde47 100644
--- a/src/i430vx.h
+++ b/src/i430vx.h
@@ -1,2 +1 @@
void i430vx_init();
-void i430vx_reset();
diff --git a/src/i440bx.c b/src/i440bx.c
deleted file mode 100644
index 910f71b..0000000
--- a/src/i440bx.c
+++ /dev/null
@@ -1,192 +0,0 @@
-#include
-
-#include "ibm.h"
-#include "io.h"
-#include "keyboard_at.h"
-#include "mem.h"
-#include "pci.h"
-#include "x86.h"
-
-#include "i440bx.h"
-
-static uint8_t card_i440bx[256];
-
-static void i440bx_map(uint32_t addr, uint32_t size, int state)
-{
- switch (state & 3)
- {
- case 0:
- mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- break;
- case 1:
- mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL);
- break;
- case 2:
- mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
- break;
- case 3:
- mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- break;
- }
- flushmmucache_nopc();
-}
-
-void i440bx_write(int func, int addr, uint8_t val, void *priv)
-{
- if (func)
- return;
-
- if (addr >= 0x10 && addr < 0x4f)
- return;
-
- switch (addr)
- {
- case 0x00: case 0x01: case 0x02: case 0x03:
- case 0x08: case 0x09: case 0x0a: case 0x0b:
- case 0x0c: case 0x0e:
- return;
-
- case 0x04: /*Command register*/
- val &= 0x02;
- val |= 0x04;
- break;
- case 0x05:
- val = 0;
- break;
-
- case 0x06: /*Status*/
- val = 0;
- break;
- case 0x07:
- val = 0x02;
- break;
-
- case 0x59: /*PAM0*/
- if ((card_i440bx[0x59] ^ val) & 0xf0)
- {
- i440bx_map(0xf0000, 0x10000, val >> 4);
- }
- pclog("i440bx_write : PAM0 write %02X\n", val);
-// if (val == 0x10)
-// output = 3;
- break;
- case 0x5a: /*PAM1*/
- if ((card_i440bx[0x5a] ^ val) & 0x0f)
- i440bx_map(0xc0000, 0x04000, val & 0xf);
- if ((card_i440bx[0x5a] ^ val) & 0xf0)
- i440bx_map(0xc4000, 0x04000, val >> 4);
- break;
- case 0x5b: /*PAM2*/
- if ((card_i440bx[0x5b] ^ val) & 0x0f)
- i440bx_map(0xc8000, 0x04000, val & 0xf);
- if ((card_i440bx[0x5b] ^ val) & 0xf0)
- i440bx_map(0xcc000, 0x04000, val >> 4);
- break;
- case 0x5c: /*PAM3*/
- if ((card_i440bx[0x5c] ^ val) & 0x0f)
- i440bx_map(0xd0000, 0x04000, val & 0xf);
- if ((card_i440bx[0x5c] ^ val) & 0xf0)
- i440bx_map(0xd4000, 0x04000, val >> 4);
- break;
- case 0x5d: /*PAM4*/
- if ((card_i440bx[0x5d] ^ val) & 0x0f)
- i440bx_map(0xd8000, 0x04000, val & 0xf);
- if ((card_i440bx[0x5d] ^ val) & 0xf0)
- i440bx_map(0xdc000, 0x04000, val >> 4);
- break;
- case 0x5e: /*PAM5*/
- if ((card_i440bx[0x5e] ^ val) & 0x0f)
- i440bx_map(0xe0000, 0x04000, val & 0xf);
- if ((card_i440bx[0x5e] ^ val) & 0xf0)
- i440bx_map(0xe4000, 0x04000, val >> 4);
- pclog("i440bx_write : PAM5 write %02X\n", val);
- break;
- case 0x5f: /*PAM6*/
- if ((card_i440bx[0x5f] ^ val) & 0x0f)
- i440bx_map(0xe8000, 0x04000, val & 0xf);
- if ((card_i440bx[0x5f] ^ val) & 0xf0)
- i440bx_map(0xec000, 0x04000, val >> 4);
- pclog("i440bx_write : PAM6 write %02X\n", val);
- break;
-
- case 0x72: /*SMRAM*/
-// pclog("Write SMRAM %02x was %02x\n", val,
- val = (val & 0x78) | 2; /*SMRAM always at A0000-BFFFF*/
- val |= (card_i440bx[0x72] & 0x10); /*D_LCK can not be cleared by software*/
- if (val & 0x10) /*D_LCK locks D_OPEN and G_SMRAME*/
- {
- val &= ~0x48; /*D_OPEN is forced to 0, G_SMRAME is read only*/
- val |= (card_i440bx[0x72] & 0x08);
- }
- if ((card_i440bx[0x72] ^ val) & 0x40)
- {
- if (val & 0x40) /*SMRAM enabled*/
- {
- pclog("Enable SMRAM\n");
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- }
- else
- {
- pclog("Disable SMRAM\n");
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- }
- }
- break;
- }
-
- card_i440bx[addr] = val;
-}
-
-uint8_t i440bx_read(int func, int addr, void *priv)
-{
- if (func)
- return 0xff;
-
- return card_i440bx[addr];
-}
-
-static void i440bx_smram_enable(void)
-{
-// pclog("i440bx_smram_enable: 440BX 0x72=%02x\n", card_i440bx[0x72]);
- if (card_i440bx[0x72] & 8)
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
-}
-static void i440bx_smram_disable(void)
-{
-// pclog("i440bx_smram_disable: 440BX 0x72=%02x\n", card_i440bx[0x72]);
- if (card_i440bx[0x72] & 8)
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
-}
-
-void i440bx_init()
-{
- pci_add_specific(0, i440bx_read, i440bx_write, NULL);
-
- memset(card_i440bx, 0, 256);
- card_i440bx[0x00] = 0x86; card_i440bx[0x01] = 0x80; /*Intel*/
- card_i440bx[0x02] = 0x92; card_i440bx[0x03] = 0x71; /*82441FX*/
- card_i440bx[0x04] = 0x06; card_i440bx[0x05] = 0x00;
- card_i440bx[0x06] = 0x00; card_i440bx[0x07] = 0x02;
- card_i440bx[0x08] = 0x02; /*B1 stepping*/
- card_i440bx[0x09] = 0x00; card_i440bx[0x0a] = 0x00; card_i440bx[0x0b] = 0x06;
- card_i440bx[0x51] = 0x20; /*66 MHz bus*/
- card_i440bx[0x60] = card_i440bx[0x61] = card_i440bx[0x62] = card_i440bx[0x63] = 0x01;
- card_i440bx[0x64] = card_i440bx[0x65] = card_i440bx[0x66] = card_i440bx[0x67] = 0x01;
- card_i440bx[0x72] = 0x02;
- card_i440bx[0x73] = 0x38;
- card_i440bx[0x7a] = 0x02; /*AGP disabled*/
-
- smram_enable = i440bx_smram_enable;
- smram_disable = i440bx_smram_disable;
-}
-
-void i440bx_reset()
-{
- i440bx_write(0, 0x59, 0xf, NULL); /*Should reset all PCI devices, but just set PAM0 to point to ROM for now*/
- i440bx_write(0, 0x5a, 0x0, NULL);
- i440bx_write(0, 0x5b, 0x0, NULL);
- i440bx_write(0, 0x5c, 0x0, NULL);
- i440bx_write(0, 0x5d, 0x0, NULL);
- i440bx_write(0, 0x5e, 0x0, NULL);
- i440bx_write(0, 0x5f, 0x0, NULL);
-}
diff --git a/src/i440bx.h b/src/i440bx.h
deleted file mode 100644
index 8ed559f..0000000
--- a/src/i440bx.h
+++ /dev/null
@@ -1,2 +0,0 @@
-void i440bx_init();
-void i440bx_reset();
diff --git a/src/i440fx.c b/src/i440fx.c
deleted file mode 100644
index 87d1dfe..0000000
--- a/src/i440fx.c
+++ /dev/null
@@ -1,183 +0,0 @@
-#include
-
-#include "ibm.h"
-#include "io.h"
-#include "keyboard_at.h"
-#include "mem.h"
-#include "pci.h"
-#include "x86.h"
-
-#include "i440fx.h"
-
-static uint8_t card_i440fx[256];
-
-static void i440fx_map(uint32_t addr, uint32_t size, int state)
-{
- switch (state & 3)
- {
- case 0:
- mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- break;
- case 1:
- mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL);
- break;
- case 2:
- mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
- break;
- case 3:
- mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- break;
- }
- flushmmucache_nopc();
-}
-
-void i440fx_write(int func, int addr, uint8_t val, void *priv)
-{
- if (func)
- return;
-
- if (addr >= 0x10 && addr < 0x4f)
- return;
-
- switch (addr)
- {
- case 0x00: case 0x01: case 0x02: case 0x03:
- case 0x08: case 0x09: case 0x0a: case 0x0b:
- case 0x0c: case 0x0e:
- return;
-
- case 0x04: /*Command register*/
- val &= 0x02;
- val |= 0x04;
- break;
- case 0x05:
- val = 0;
- break;
-
- case 0x06: /*Status*/
- val = 0;
- break;
- case 0x07:
- val = 0x02;
- break;
-
- case 0x59: /*PAM0*/
- if ((card_i440fx[0x59] ^ val) & 0xf0)
- {
- i440fx_map(0xf0000, 0x10000, val >> 4);
- }
- pclog("i440fx_write : PAM0 write %02X\n", val);
- break;
- case 0x5a: /*PAM1*/
- if ((card_i440fx[0x5a] ^ val) & 0x0f)
- i440fx_map(0xc0000, 0x04000, val & 0xf);
- if ((card_i440fx[0x5a] ^ val) & 0xf0)
- i440fx_map(0xc4000, 0x04000, val >> 4);
- break;
- case 0x5b: /*PAM2*/
- if ((card_i440fx[0x5b] ^ val) & 0x0f)
- i440fx_map(0xc8000, 0x04000, val & 0xf);
- if ((card_i440fx[0x5b] ^ val) & 0xf0)
- i440fx_map(0xcc000, 0x04000, val >> 4);
- break;
- case 0x5c: /*PAM3*/
- if ((card_i440fx[0x5c] ^ val) & 0x0f)
- i440fx_map(0xd0000, 0x04000, val & 0xf);
- if ((card_i440fx[0x5c] ^ val) & 0xf0)
- i440fx_map(0xd4000, 0x04000, val >> 4);
- break;
- case 0x5d: /*PAM4*/
- if ((card_i440fx[0x5d] ^ val) & 0x0f)
- i440fx_map(0xd8000, 0x04000, val & 0xf);
- if ((card_i440fx[0x5d] ^ val) & 0xf0)
- i440fx_map(0xdc000, 0x04000, val >> 4);
- break;
- case 0x5e: /*PAM5*/
- if ((card_i440fx[0x5e] ^ val) & 0x0f)
- i440fx_map(0xe0000, 0x04000, val & 0xf);
- if ((card_i440fx[0x5e] ^ val) & 0xf0)
- i440fx_map(0xe4000, 0x04000, val >> 4);
- pclog("i440fx_write : PAM5 write %02X\n", val);
- break;
- case 0x5f: /*PAM6*/
- if ((card_i440fx[0x5f] ^ val) & 0x0f)
- i440fx_map(0xe8000, 0x04000, val & 0xf);
- if ((card_i440fx[0x5f] ^ val) & 0xf0)
- i440fx_map(0xec000, 0x04000, val >> 4);
- pclog("i440fx_write : PAM6 write %02X\n", val);
- break;
-
- case 0x72: /*SMRAM*/
- pclog("Write SMRAM %02x\n", val);
- val = (val & 0x78) | 2; /*SMRAM always at A0000-BFFFF*/
- val |= (card_i440fx[0x72] & 0x10); /*D_LCK can not be cleared by software*/
- if (val & 0x10) /*D_LCK locks D_OPEN and G_SMRAME*/
- {
- val &= ~0x48; /*D_OPEN is forced to 0, G_SMRAME is read only*/
- val |= (card_i440fx[0x72] & 0x08);
- }
- if ((card_i440fx[0x72] ^ val) & 0x40)
- {
- if (val & 0x40) /*SMRAM enabled*/
- {
- pclog("Enable SMRAM\n");
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- }
- else
- {
- pclog("Disable SMRAM\n");
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- }
- }
- break;
- }
-
- card_i440fx[addr] = val;
-}
-
-uint8_t i440fx_read(int func, int addr, void *priv)
-{
- if (func)
- return 0xff;
-
- return card_i440fx[addr];
-}
-
-static void i440fx_smram_enable(void)
-{
- if (card_i440fx[0x72] & 8)
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
-}
-static void i440fx_smram_disable(void)
-{
- if (card_i440fx[0x72] & 8)
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
-}
-
-void i440fx_init()
-{
- pci_add_specific(0, i440fx_read, i440fx_write, NULL);
-
- memset(card_i440fx, 0, 256);
- card_i440fx[0x00] = 0x86; card_i440fx[0x01] = 0x80; /*Intel*/
- card_i440fx[0x02] = 0x37; card_i440fx[0x03] = 0x12; /*82441FX*/
- card_i440fx[0x04] = 0x06; card_i440fx[0x05] = 0x00;
- card_i440fx[0x06] = 0x80; card_i440fx[0x07] = 0x02;
- card_i440fx[0x08] = 0x00; /*A0 stepping*/
- card_i440fx[0x09] = 0x00; card_i440fx[0x0a] = 0x00; card_i440fx[0x0b] = 0x06;
- card_i440fx[0x51] = 0x84; /*Uniprocessor, 66 MHz bus*/
- card_i440fx[0x53] = 0x80;
- card_i440fx[0x57] = 0x01;
- card_i440fx[0x58] = 0x10;
- card_i440fx[0x60] = card_i440fx[0x61] = card_i440fx[0x62] = card_i440fx[0x63] = card_i440fx[0x64] = 0x01;
- card_i440fx[0x71] = 0x10;
- card_i440fx[0x72] = 0x02;
-
- smram_enable = i440fx_smram_enable;
- smram_disable = i440fx_smram_disable;
-}
-
-void i440fx_reset()
-{
- i440fx_write(0, 0x59, 0xf, NULL); /*Should reset all PCI devices, but just set PAM0 to point to ROM for now*/
-}
diff --git a/src/i440fx.h b/src/i440fx.h
deleted file mode 100644
index e16eab7..0000000
--- a/src/i440fx.h
+++ /dev/null
@@ -1,2 +0,0 @@
-void i440fx_init();
-void i440fx_reset();
diff --git a/src/ibm.h b/src/ibm.h
index c1b6581..c06010f 100644
--- a/src/ibm.h
+++ b/src/ibm.h
@@ -1,33 +1,8 @@
#include
#include
#include
-
-#include "timer.h"
-
-
-#ifdef PCEM_BUILD_VERSION
-#define STRINGISE2(string) #string
-#define STRINGISE(string) STRINGISE2(string)
-#define PCEM_VERSION_STRING "build " STRINGISE(PCEM_BUILD_VERSION)
-#else
-#define PCEM_VERSION_STRING "v17"
-#endif
-
-#ifdef ABS
-#undef ABS
-#endif
-
-#define ABS(x) ((x) > 0 ? (x) : -(x))
-#define MAX(a, b) (((a) > (b)) ? (a) : (b))
-
#define printf pclog
-#define READFLASH_FDC 0
-#define READFLASH_HDC 4
-#define readflash_set(offset, drive) readflash |= 1<<((offset)+(drive))
-#define readflash_clear(offset, drive) readflash &= ~(1<<((offset)+(drive)))
-#define readflash_get(offset, drive) ((readflash&(1<<((offset)+(drive)))) != 0)
-
/*Memory*/
uint8_t *ram;
@@ -42,14 +17,27 @@ int writelnext;
extern int mmu_perm;
+#define readmemb(a) ((readlookup2[(a)>>12]==-1)?readmembl(a):*(uint8_t *)(readlookup2[(a) >> 12] + (a)))
+#define readmemw(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF || (((s)+(a))&0xFFF)>0xFFE)?readmemwl(s,a):*(uint16_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a))))
+#define readmeml(s,a) ((readlookup2[(uint32_t)((s)+(a))>>12]==-1 || (s)==0xFFFFFFFF || (((s)+(a))&0xFFF)>0xFFC)?readmemll(s,a):*(uint32_t *)(readlookup2[(uint32_t)((s)+(a))>>12]+(uint32_t)((s)+(a))))
+
+//#define writememb(a,v) if (writelookup2[(a)>>12]==0xFFFFFFFF) writemembl(a,v); else ram[writelookup2[(a)>>12]+((a)&0xFFF)]=v
+//#define writememw(s,a,v) if (writelookup2[((s)+(a))>>12]==0xFFFFFFFF || (s)==0xFFFFFFFF) writememwl(s,a,v); else *((uint16_t *)(&ram[writelookup2[((s)+(a))>>12]+(((s)+(a))&0xFFF)]))=v
+//#define writememl(s,a,v) if (writelookup2[((s)+(a))>>12]==0xFFFFFFFF || (s)==0xFFFFFFFF) writememll(s,a,v); else *((uint32_t *)(&ram[writelookup2[((s)+(a))>>12]+(((s)+(a))&0xFFF)]))=v
+//#define readmemb(a) ((isram[((a)>>16)&255] && !(cr0>>31))?ram[a&0xFFFFFF]:readmembl(a))
+//#define writememb(a,v) if (isram[((a)>>16)&255] && !(cr0>>31)) ram[a&0xFFFFFF]=v; else writemembl(a,v)
+
+//void writememb(uint32_t addr, uint8_t val);
uint8_t readmembl(uint32_t addr);
void writemembl(uint32_t addr, uint8_t val);
-uint16_t readmemwl(uint32_t addr);
-void writememwl(uint32_t addr, uint16_t val);
-uint32_t readmemll(uint32_t addr);
-void writememll(uint32_t addr, uint32_t val);
-uint64_t readmemql(uint32_t addr);
-void writememql(uint32_t addr, uint64_t val);
+uint8_t readmemb386l(uint32_t seg, uint32_t addr);
+void writememb386l(uint32_t seg, uint32_t addr, uint8_t val);
+uint16_t readmemwl(uint32_t seg, uint32_t addr);
+void writememwl(uint32_t seg, uint32_t addr, uint16_t val);
+uint32_t readmemll(uint32_t seg, uint32_t addr);
+void writememll(uint32_t seg, uint32_t addr, uint32_t val);
+uint64_t readmemql(uint32_t seg, uint32_t addr);
+void writememql(uint32_t seg, uint32_t addr, uint64_t val);
uint8_t *getpccache(uint32_t a);
@@ -68,14 +56,200 @@ uint32_t inl(uint16_t port);
void outl(uint16_t port, uint32_t val);
FILE *romfopen(char *fn, char *mode);
+extern int shadowbios,shadowbios_write;
extern int mem_size;
extern int readlnum,writelnum;
/*Processor*/
-extern int ins, output, timetolive;
+#define EAX cpu_state.regs[0].l
+#define ECX cpu_state.regs[1].l
+#define EDX cpu_state.regs[2].l
+#define EBX cpu_state.regs[3].l
+#define ESP cpu_state.regs[4].l
+#define EBP cpu_state.regs[5].l
+#define ESI cpu_state.regs[6].l
+#define EDI cpu_state.regs[7].l
+#define AX cpu_state.regs[0].w
+#define CX cpu_state.regs[1].w
+#define DX cpu_state.regs[2].w
+#define BX cpu_state.regs[3].w
+#define SP cpu_state.regs[4].w
+#define BP cpu_state.regs[5].w
+#define SI cpu_state.regs[6].w
+#define DI cpu_state.regs[7].w
+#define AL cpu_state.regs[0].b.l
+#define AH cpu_state.regs[0].b.h
+#define CL cpu_state.regs[1].b.l
+#define CH cpu_state.regs[1].b.h
+#define DL cpu_state.regs[2].b.l
+#define DH cpu_state.regs[2].b.h
+#define BL cpu_state.regs[3].b.l
+#define BH cpu_state.regs[3].b.h
+typedef union
+{
+ uint32_t l;
+ uint16_t w;
+ struct
+ {
+ uint8_t l,h;
+ } b;
+} x86reg;
+
+typedef struct
+{
+ uint32_t base;
+ uint32_t limit;
+ uint8_t access;
+ uint16_t seg;
+ uint32_t limit_low, limit_high;
+ int checked; /*Non-zero if selector is known to be valid*/
+} x86seg;
+
+typedef union MMX_REG
+{
+ uint64_t q;
+ int64_t sq;
+ uint32_t l[2];
+ int32_t sl[2];
+ uint16_t w[4];
+ int16_t sw[4];
+ uint8_t b[8];
+ int8_t sb[8];
+} MMX_REG;
+
+struct
+{
+ x86reg regs[8];
+
+ uint8_t tag[8];
+
+ x86seg *ea_seg;
+ uint32_t eaaddr;
+
+ int flags_op;
+ uint32_t flags_res;
+ uint32_t flags_op1, flags_op2;
+
+ uint32_t pc;
+ uint32_t oldpc;
+ uint32_t op32;
+
+ int TOP;
+
+ union
+ {
+ struct
+ {
+ int8_t rm, mod, reg;
+ } rm_mod_reg;
+ uint32_t rm_mod_reg_data;
+ } rm_data;
+
+ int8_t ssegs;
+ int8_t ismmx;
+ int8_t abrt;
+
+ int _cycles;
+ int cpu_recomp_ins;
+
+ uint16_t npxs, npxc;
+
+ double ST[8];
+
+ uint16_t MM_w4[8];
+
+ MMX_REG MM[8];
+
+ uint16_t old_npxc, new_npxc;
+} cpu_state;
+
+#define cycles cpu_state._cycles
+
+#define COMPILE_TIME_ASSERT(expr) typedef char COMP_TIME_ASSERT[(expr) ? 1 : 0];
+
+COMPILE_TIME_ASSERT(sizeof(cpu_state) <= 128);
+
+#define cpu_state_offset(MEMBER) ((uintptr_t)&cpu_state.MEMBER - (uintptr_t)&cpu_state - 128)
+
+uint16_t flags,eflags;
+uint32_t oldds,oldss,olddslimit,oldsslimit,olddslimitw,oldsslimitw;
+
+extern int ins,output;
+extern int cycdiff;
+
+x86seg gdt,ldt,idt,tr;
+x86seg _cs,_ds,_es,_ss,_fs,_gs;
+x86seg _oldds;
+
+uint32_t pccache;
+uint8_t *pccache2;
+/*Segments -
+ _cs,_ds,_es,_ss are the segment structures
+ CS,DS,ES,SS is the 16-bit data
+ cs,ds,es,ss are defines to the bases*/
+#define CS _cs.seg
+#define DS _ds.seg
+#define ES _es.seg
+#define SS _ss.seg
+#define FS _fs.seg
+#define GS _gs.seg
+#define cs _cs.base
+#define ds _ds.base
+#define es _es.base
+#define ss _ss.base
+#define seg_fs _fs.base
+#define gs _gs.base
+
+#define CPL ((_cs.access>>5)&3)
+
+void loadseg(uint16_t seg, x86seg *s);
+void loadcs(uint16_t seg);
+
+union
+{
+ uint32_t l;
+ uint16_t w;
+} CR0;
+
+#define cr0 CR0.l
+#define msw CR0.w
+
+uint32_t cr2, cr3, cr4;
+uint32_t dr[8];
+
+#define C_FLAG 0x0001
+#define P_FLAG 0x0004
+#define A_FLAG 0x0010
+#define Z_FLAG 0x0040
+#define N_FLAG 0x0080
+#define T_FLAG 0x0100
+#define I_FLAG 0x0200
+#define D_FLAG 0x0400
+#define V_FLAG 0x0800
+#define NT_FLAG 0x4000
+#define VM_FLAG 0x0002 /*In EFLAGS*/
+
+#define WP_FLAG 0x10000 /*In CR0*/
+
+#define IOPL ((flags>>12)&3)
+
+#define IOPLp ((!(msw&1)) || (CPL<=IOPL))
+//#define IOPLp 1
+
+//#define IOPLV86 ((!(msw&1)) || (CPL<=IOPL))
extern int cycles_lost;
+extern int is486;
+extern uint8_t opcode;
+extern int insc;
+extern int fpucount;
+extern float mips,flops;
+extern int clockrate;
+extern int cgate16;
+extern int CPUID;
+
+extern int cpl_override;
/*Timer*/
typedef struct PIT_nr
@@ -87,7 +261,7 @@ typedef struct PIT_nr
typedef struct PIT
{
uint32_t l[3];
- pc_timer_t timer[3];
+ int c[3];
uint8_t m[3];
uint8_t ctrl,ctrls[3];
int wp,rm[3],wm[3];
@@ -105,12 +279,12 @@ typedef struct PIT
int initial[3];
int latched[3];
int disabled[3];
-
+
uint8_t read_status[3];
int do_read_status[3];
-
+
PIT_nr pit_nr[3];
-
+
void (*set_out_funcs[3])(int new_out, int old_out);
} PIT;
@@ -126,24 +300,27 @@ float pit_timer0_freq();
/*DMA*/
-typedef struct dma_t
+typedef struct DMA
{
- uint32_t ab, ac;
- uint16_t cb;
- int cc;
+ uint32_t ab[4],ac[4];
+ uint16_t cb[4];
+ int cc[4];
int wp;
- uint8_t m, mode;
- uint8_t page;
- uint8_t stat, stat_rq;
+ uint8_t m,mode[4];
+ uint8_t page[4];
+ uint8_t stat;
uint8_t command;
- int size;
+
+ int xfr_command, xfr_channel;
+ int byte_ptr;
+
+ int is_ps2;
+ uint8_t arb_level[4];
+ uint8_t ps2_mode[4];
+} DMA;
- uint8_t ps2_mode;
- uint8_t arb_level;
- uint16_t io_addr;
-} dma_t;
+DMA dma,dma16;
-dma_t dma[8];
/*PPI*/
typedef struct PPI
@@ -162,25 +339,28 @@ typedef struct PIC
int icw;
uint8_t vector;
int read;
- uint8_t level_sensitive;
} PIC;
PIC pic,pic2;
extern int pic_intpending;
+int disctime;
char discfns[2][256];
int driveempty[2];
+#define MDA ((gfxcard==GFX_MDA || gfxcard==GFX_HERCULES || gfxcard==GFX_INCOLOR || gfxcard==GFX_GENIUS) && (romset=ROM_IBMAT))
+#define VGA ((gfxcard>=GFX_TVGA || romset==ROM_ACER386) && gfxcard!=GFX_COLORPLUS && gfxcard!=GFX_INCOLOR && gfxcard!=GFX_WY700 && gfxcard!=GFX_GENIUS && romset!=ROM_PC1640 && romset!=ROM_PC1512 && romset!=ROM_TANDY && romset!=ROM_PC200)
#define PCJR (romset == ROM_IBMPCJR)
+#define AMIBIOS (romset==ROM_AMI386SX || romset==ROM_AMI486 || romset == ROM_WIN486)
int GAMEBLASTER, GUS, SSI2001, voodoo_enabled;
-extern int AMSTRAD, AT, is386, PCI, TANDY, MCA;
+extern int AMSTRAD, AT, is386, PCI, TANDY;
enum
{
- ROM_IBMPC = 0,
- ROM_IBMXT,
+ ROM_IBMPC = 0, /*301 keyboard error, 131 cassette (!!!) error*/
+ ROM_IBMXT, /*301 keyboard error*/
ROM_IBMPCJR,
ROM_GENXT, /*'Generic XT BIOS'*/
ROM_DTKXT,
@@ -191,7 +371,7 @@ enum
ROM_PC200,
ROM_PC1640,
ROM_PC2086,
- ROM_PC3086,
+ ROM_PC3086,
ROM_AMIXT, /*XT Clone with AMI BIOS*/
ROM_LTXT,
ROM_LXT3,
@@ -204,29 +384,17 @@ enum
ROM_IBMAT,
ROM_CMDPC30,
ROM_AMI286,
- ROM_TG286M,
ROM_AWARD286,
- ROM_GDC212M,
- ROM_GW286CT,
- ROM_SPC4200P,
- ROM_SPC4216P,
- ROM_SPC4620P,
ROM_DELL200,
ROM_MISC286,
ROM_IBMAT386,
ROM_ACER386,
- ROM_KMXC02,
ROM_MEGAPC,
- ROM_AMA932J,
ROM_AMI386SX,
- ROM_SPC6000A,
- ROM_SPC6033P,
ROM_AMI486,
ROM_WIN486,
ROM_PCI486,
ROM_SIS496,
- ROM_P55VA, /* Epox P55-VA/430VX/Award/SMC FDC37C932FR*/
- ROM_P55TVP4, /* ASUS P/I-P55TVP4/430VX/Award/Winbond W8387F*/
ROM_430VX,
ROM_ENDEAVOR,
ROM_REVENGE,
@@ -235,48 +403,11 @@ enum
ROM_IBMPS1_2121,
ROM_AMI386DX_OPTI495,
ROM_MR386DX_OPTI495,
- ROM_P55T2P4, /* ASUS P/I-P55T2P4/430HX/Award/Winbond W8387F*/
ROM_IBMPS2_M30_286,
ROM_IBMPS2_M50,
ROM_IBMPS2_M55SX,
ROM_IBMPS2_M80,
- ROM_ATARIPC3,
- ROM_IBMXT286,
- ROM_EPSON_PCAX,
- ROM_EPSON_PCAX2E,
- ROM_EPSON_PCAX3,
- ROM_T3100E,
- ROM_T1000,
- ROM_T1200,
- ROM_PB_L300SX,
- ROM_NCR_PC4I,
- ROM_TO16_PC,
- ROM_COMPAQ_PII,
- ROM_ELX_PC425X,
- ROM_PB570,
- ROM_ZAPPA,
- ROM_PB520R,
- ROM_COMPAQ_PIP,
- ROM_XI8088,
- ROM_IBMPS2_M70_TYPE3,
- ROM_IBMPS2_M70_TYPE4,
- ROM_TULIP_TC7,
- ROM_ZD_SUPERS, /* [8088] Zenith Data Systems SupersPort */
- ROM_PB410A,
- ROM_PPC512,
- ROM_BULL_MICRAL_45,
- ROM_FIC_VA503P,
- ROM_CBM_SL386SX25,
- ROM_IBMPS1_2133_451,
- ROM_ECS_386_32,
- ROM_LEDGE_MODELM,
- ROM_HYUNDAI_SUPER286TR,
- ROM_ITAUTEC_INFOWAYM,
- ROM_DESKPRO,
- ROM_VS440FX,
- ROM_GA686BX,
- ROM_PC5086,
-
+
ROM_MAX
};
@@ -287,23 +418,19 @@ int romset;
enum
{
- GFX_BUILTIN = -1,
GFX_CGA = 0,
GFX_MDA,
GFX_HERCULES,
GFX_EGA, /*Using IBM EGA BIOS*/
GFX_TVGA, /*Using Trident TVGA8900D BIOS*/
GFX_ET4000, /*Tseng ET4000*/
- GFX_KASAN16VGA, /*Kasan Hangulmadang-16 (Tseng ET4000AX)*/
- GFX_TGKOREANVGA, /*Trigem Korean VGA(Tseng ET4000AX)*/
GFX_ET4000W32, /*Tseng ET4000/W32p (Diamond Stealth 32)*/
GFX_BAHAMAS64, /*S3 Vision864 (Paradise Bahamas 64)*/
GFX_N9_9FX, /*S3 764/Trio64 (Number Nine 9FX)*/
GFX_VIRGE, /*S3 Virge*/
GFX_TGUI9440, /*Trident TGUI9440*/
- GFX_VGA, /*IBM VGA*/
+ GFX_VGA, /*IBM VGA*/
GFX_VGAEDGE16, /*ATI VGA Edge-16 (18800-1)*/
- GFX_ATIKOREANVGA, /*ATI Korean VGA (28800-5)*/
GFX_VGACHARGER, /*ATI VGA Charger (28800-5)*/
GFX_OTI067, /*Oak OTI-067*/
GFX_MACH64GX, /*ATI Graphics Pro Turbo (Mach64)*/
@@ -311,31 +438,11 @@ enum
GFX_VIRGEDX, /*S3 Virge/DX*/
GFX_PHOENIX_TRIO32, /*S3 732/Trio32 (Phoenix)*/
GFX_PHOENIX_TRIO64, /*S3 764/Trio64 (Phoenix)*/
- GFX_INCOLOR, /* Hercules InColor */
+ GFX_INCOLOR, /* Hercules InColor */
GFX_COLORPLUS, /* Plantronics ColorPlus */
GFX_WY700, /* Wyse 700 */
GFX_GENIUS, /* MDSI Genius */
GFX_MACH64VT2, /*ATI Mach64 VT2*/
- GFX_OLIVETTI_GO481, /*Olivetti GO481 PVGA1A*/
- GFX_TGUI9400CXI, /*Trident TGUI9440CXi*/
- GFX_CL_GD5430, /*Cirrus Logic CL-GD5430*/
- GFX_CL_GD5434, /*Cirrus Logic CL-GD5434*/
- GFX_OTI037, /*Oak OTI-037*/
- GFX_COMPAQ_CGA, /*Compaq CGA*/
- GFX_SIGMA400, /*Sigma Designs Color 400 */
- GFX_PGC, /*Professional Graphics Controller */
- GFX_IM1024, /*Vermont Microsystems IM1024 */
- GFX_EGAWONDER800, /*ATI EGA Wonder 800+*/
- GFX_MYSTIQUE, /*Matrox Mystique*/
- GFX_AVGA2, /*Acumos AVGA2 / Cirrus Logic CL-GD5402*/
- GFX_CL_GD5428, /*Cirrus Logic CL-GD5428*/
- GFX_IBM_GD5428, /*IBM 1MB SVGA Adapter/A*/
- GFX_TVGA9000B, /*Trident TVGA9000B*/
- GFX_BANSHEE, /*Voodoo Banshee - reference PCI board with SGRAM*/
- GFX_CL_BANSHEE, /*Creative Labs Voodoo Blaster Banshee PCI - with SDRAM*/
- GFX_VOODOO_3_2000, /*Voodoo 3 2000*/
- GFX_VOODOO_3_3000, /*Voodoo 3 3000*/
-
GFX_MAX
};
@@ -358,12 +465,14 @@ extern int changeframecount;
/*Sound*/
int ppispeakon;
-extern uint64_t CGACONST;
-extern uint64_t MDACONST;
-extern uint64_t VGACONST1,VGACONST2;
-extern uint64_t RTCCONST;
+float CGACONST;
+float MDACONST;
+float VGACONST1,VGACONST2;
+float RTCCONST;
int gated,speakval,speakon;
+#define SOUNDBUFLEN (48000/20)
+
/*Sound Blaster*/
#define SADLIB 1 /*No DSP*/
@@ -377,6 +486,8 @@ int gated,speakval,speakon;
#define SND_WSS 9 /*Windows Sound System*/
#define SND_PAS16 10 /*Pro Audio Spectrum 16*/
+char pcempath[512];
+
/*Hard disc*/
@@ -387,7 +498,7 @@ typedef struct
int tracks;
} PcemHDC;
-PcemHDC hdc[7];
+PcemHDC hdc[4];
/*Keyboard*/
int keybsenddelay;
@@ -397,6 +508,7 @@ int keybsenddelay;
extern int cdrom_drive;
extern int old_cdrom_drive;
extern int idecallback[2];
+extern int cdrom_enabled;
#define CD_STATUS_EMPTY 0
#define CD_STATUS_DATA_ONLY 1
@@ -432,6 +544,8 @@ void resetpc_cad();
extern int start_in_fullscreen;
extern int window_w, window_h, window_x, window_y, window_remember;
+void get_executable_name(char *s, int size);
+
void startblit();
void endblit();
@@ -447,12 +561,6 @@ void resetpchard();
void speedchanged();
void saveconfig(char *fn);
-void saveconfig_global_only();
+void getpath();
#define UNUSED(x) (void)x
-
-#define MIN(a, b) ((a) < (b) ? (a) : (b))
-
-void ide_padstr(char *str, const char *src, int len);
-
-void stop_emulation_now(void);
diff --git a/src/icons/16x16/cd.png b/src/icons/16x16/cd.png
deleted file mode 100644
index 6afc04b..0000000
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diff --git a/src/icons/16x16/computer_add.png b/src/icons/16x16/computer_add.png
deleted file mode 100644
index e89c1df..0000000
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diff --git a/src/icons/16x16/computer_delete.png b/src/icons/16x16/computer_delete.png
deleted file mode 100644
index 06eb7c6..0000000
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diff --git a/src/icons/16x16/computer_edit.png b/src/icons/16x16/computer_edit.png
deleted file mode 100644
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diff --git a/src/icons/16x16/computer_go.png b/src/icons/16x16/computer_go.png
deleted file mode 100644
index 2cf1c6b..0000000
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diff --git a/src/icons/16x16/control_eject.png b/src/icons/16x16/control_eject.png
deleted file mode 100644
index 00deee0..0000000
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diff --git a/src/icons/16x16/control_play_blue.png b/src/icons/16x16/control_play_blue.png
deleted file mode 100644
index 184be23..0000000
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diff --git a/src/icons/16x16/diskette.png b/src/icons/16x16/diskette.png
deleted file mode 100644
index d0d400e..0000000
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diff --git a/src/icons/16x16/door_out.png b/src/icons/16x16/door_out.png
deleted file mode 100644
index 23805d2..0000000
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diff --git a/src/icons/16x16/drive.png b/src/icons/16x16/drive.png
deleted file mode 100644
index e3979a8..0000000
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diff --git a/src/icons/16x16/drive_add.png b/src/icons/16x16/drive_add.png
deleted file mode 100644
index 0a6b97c..0000000
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diff --git a/src/icons/16x16/folder.png b/src/icons/16x16/folder.png
deleted file mode 100644
index f1ed9ab..0000000
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diff --git a/src/icons/16x16/joystick.png b/src/icons/16x16/joystick.png
deleted file mode 100644
index ee165ef..0000000
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diff --git a/src/icons/16x16/network_ethernet.png b/src/icons/16x16/network_ethernet.png
deleted file mode 100644
index 01b1d4c..0000000
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diff --git a/src/icons/16x16/setting_tools.png b/src/icons/16x16/setting_tools.png
deleted file mode 100644
index 81857cd..0000000
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diff --git a/src/icons/16x16/widescreen.png b/src/icons/16x16/widescreen.png
deleted file mode 100644
index ba7e1c4..0000000
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diff --git a/src/icons/24x24/pause.png b/src/icons/24x24/pause.png
deleted file mode 100644
index 7e2e38d..0000000
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diff --git a/src/icons/24x24/play.png b/src/icons/24x24/play.png
deleted file mode 100644
index bf72ed1..0000000
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diff --git a/src/icons/24x24/refresh.png b/src/icons/24x24/refresh.png
deleted file mode 100644
index c5054b3..0000000
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diff --git a/src/icons/24x24/stop.png b/src/icons/24x24/stop.png
deleted file mode 100644
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deleted file mode 100644
index 60a7a29..0000000
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diff --git a/src/icons/32x32/control_play_blue.png b/src/icons/32x32/control_play_blue.png
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diff --git a/src/icons/32x32/delete.png b/src/icons/32x32/delete.png
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index 30a45b8..0000000
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diff --git a/src/icons/32x32/drive.png b/src/icons/32x32/drive.png
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index 1b21050..0000000
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diff --git a/src/icons/32x32/joystick.png b/src/icons/32x32/joystick.png
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index c7fb11e..0000000
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diff --git a/src/icons/32x32/motherboard.png b/src/icons/32x32/motherboard.png
deleted file mode 100644
index ce695b1..0000000
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diff --git a/src/icons/32x32/mouse_pc.png b/src/icons/32x32/mouse_pc.png
deleted file mode 100644
index d3c75d2..0000000
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diff --git a/src/icons/32x32/network_ethernet.png b/src/icons/32x32/network_ethernet.png
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index 9df8b73..0000000
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diff --git a/src/icons/32x32/setting_tools.png b/src/icons/32x32/setting_tools.png
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diff --git a/src/icons/32x32/sound.png b/src/icons/32x32/sound.png
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diff --git a/src/icons/32x32/textfield_rename.png b/src/icons/32x32/textfield_rename.png
deleted file mode 100644
index d35927f..0000000
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diff --git a/src/icons/32x32/video_mode.png b/src/icons/32x32/video_mode.png
deleted file mode 100644
index e5ee86c..0000000
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diff --git a/src/icons/32x32/widescreen.png b/src/icons/32x32/widescreen.png
deleted file mode 100644
index 60042ac..0000000
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diff --git a/src/icons/cd.png b/src/icons/cd.png
deleted file mode 100644
index ef43223..0000000
Binary files a/src/icons/cd.png and /dev/null differ
diff --git a/src/icons/disk.png b/src/icons/disk.png
deleted file mode 100644
index 99d532e..0000000
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diff --git a/src/icons/drive.png b/src/icons/drive.png
deleted file mode 100644
index 37b7c9b..0000000
Binary files a/src/icons/drive.png and /dev/null differ
diff --git a/src/icons/pause.svg b/src/icons/pause.svg
deleted file mode 100644
index 537fa7f..0000000
--- a/src/icons/pause.svg
+++ /dev/null
@@ -1,43 +0,0 @@
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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-
-
-
-
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diff --git a/src/icons/pause24.png b/src/icons/pause24.png
deleted file mode 100644
index 7e2e38d..0000000
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diff --git a/src/icons/play-button.svg b/src/icons/play-button.svg
deleted file mode 100644
index 9f46031..0000000
--- a/src/icons/play-button.svg
+++ /dev/null
@@ -1,41 +0,0 @@
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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-
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-
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-
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-
diff --git a/src/icons/play24.png b/src/icons/play24.png
deleted file mode 100644
index bf72ed1..0000000
Binary files a/src/icons/play24.png and /dev/null differ
diff --git a/src/icons/refresh.svg b/src/icons/refresh.svg
deleted file mode 100644
index f3f25f1..0000000
--- a/src/icons/refresh.svg
+++ /dev/null
@@ -1,50 +0,0 @@
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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-
-
-
-
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-
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diff --git a/src/icons/refresh24.png b/src/icons/refresh24.png
deleted file mode 100644
index c5054b3..0000000
Binary files a/src/icons/refresh24.png and /dev/null differ
diff --git a/src/icons/stop.svg b/src/icons/stop.svg
deleted file mode 100644
index 65d7bf1..0000000
--- a/src/icons/stop.svg
+++ /dev/null
@@ -1,39 +0,0 @@
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/src/icons/stop24.png b/src/icons/stop24.png
deleted file mode 100644
index 8792c93..0000000
Binary files a/src/icons/stop24.png and /dev/null differ
diff --git a/src/icons/svg/pause.svg b/src/icons/svg/pause.svg
deleted file mode 100644
index 537fa7f..0000000
--- a/src/icons/svg/pause.svg
+++ /dev/null
@@ -1,43 +0,0 @@
-
-
-
-
-
-
-
-
-
-
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-
-
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-
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-
-
-
-
-
-
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-
-
diff --git a/src/icons/svg/play-button.svg b/src/icons/svg/play-button.svg
deleted file mode 100644
index 9f46031..0000000
--- a/src/icons/svg/play-button.svg
+++ /dev/null
@@ -1,41 +0,0 @@
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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diff --git a/src/icons/svg/refresh.svg b/src/icons/svg/refresh.svg
deleted file mode 100644
index f3f25f1..0000000
--- a/src/icons/svg/refresh.svg
+++ /dev/null
@@ -1,50 +0,0 @@
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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-
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-
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-
-
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diff --git a/src/icons/svg/stop.svg b/src/icons/svg/stop.svg
deleted file mode 100644
index 65d7bf1..0000000
--- a/src/icons/svg/stop.svg
+++ /dev/null
@@ -1,39 +0,0 @@
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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-
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-
diff --git a/src/ide.c b/src/ide.c
index 86a3619..766a683 100644
--- a/src/ide.c
+++ b/src/ide.c
@@ -1,4 +1,8 @@
-#define IDE_TIME (10 * TIMER_USEC)
+/*RPCemu v0.6 by Tom Walker
+ IDE emulation*/
+//#define RPCEMU_IDE
+
+#define IDE_TIME (5 * 100 * (1 << TIMER_SHIFT))
#define _LARGEFILE_SOURCE
#define _LARGEFILE64_SOURCE
@@ -10,17 +14,30 @@
#include
-#include "ibm.h"
-#include "hdd.h"
-#include "io.h"
-#include "pic.h"
-#include "timer.h"
-#include "hdd_file.h"
-#include "scsi.h"
-#include "scsi_cd.h"
-#include "scsi_zip.h"
+#ifdef RPCEMU_IDE
+ #include "rpcemu.h"
+ #include "iomd.h"
+ #include "arm.h"
+#else
+ #include "ibm.h"
+ #include "io.h"
+ #include "pic.h"
+ #include "timer.h"
+#endif
#include "ide.h"
+/* Bits of 'atastat' */
+#define ERR_STAT 0x01
+#define DRQ_STAT 0x08 /* Data request */
+#define DSC_STAT 0x10
+#define SERVICE_STAT 0x10
+#define READY_STAT 0x40
+#define BUSY_STAT 0x80
+
+/* Bits of 'error' */
+#define ABRT_ERR 0x04 /* Command aborted */
+#define MCR_ERR 0x08 /* Media change request */
+
/* ATA Commands */
#define WIN_SRST 0x08 /* ATAPI Device Reset */
#define WIN_RECAL 0x10
@@ -43,13 +60,174 @@
#define WIN_READ_DMA 0xC8
#define WIN_WRITE_DMA 0xCA
#define WIN_SETIDLE1 0xE3
-#define WIN_CHECK_POWER_MODE 0xE5
#define WIN_IDENTIFY 0xEC /* Ask drive to identify itself */
-#define WIN_SET_FEATURES 0xEF
+
+/* ATAPI Commands */
+#define GPCMD_TEST_UNIT_READY 0x00
+#define GPCMD_REQUEST_SENSE 0x03
+#define GPCMD_READ_6 0x08
+#define GPCMD_INQUIRY 0x12
+#define GPCMD_MODE_SELECT_6 0x15
+#define GPCMD_MODE_SENSE_6 0x1a
+#define GPCMD_START_STOP_UNIT 0x1b
+#define GPCMD_PREVENT_REMOVAL 0x1e
+#define GPCMD_READ_CDROM_CAPACITY 0x25
+#define GPCMD_READ_10 0x28
+#define GPCMD_SEEK 0x2b
+#define GPCMD_READ_SUBCHANNEL 0x42
+#define GPCMD_READ_TOC_PMA_ATIP 0x43
+#define GPCMD_READ_HEADER 0x44
+#define GPCMD_PLAY_AUDIO_10 0x45
+#define GPCMD_PLAY_AUDIO_MSF 0x47
+#define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a
+#define GPCMD_PAUSE_RESUME 0x4b
+#define GPCMD_STOP_PLAY_SCAN 0x4e
+#define GPCMD_READ_DISC_INFORMATION 0x51
+#define GPCMD_MODE_SELECT_10 0x55
+#define GPCMD_MODE_SENSE_10 0x5a
+#define GPCMD_PLAY_AUDIO_12 0xa5
+#define GPCMD_READ_12 0xa8
+#define GPCMD_SEND_DVD_STRUCTURE 0xad
+#define GPCMD_SET_SPEED 0xbb
+#define GPCMD_MECHANISM_STATUS 0xbd
+#define GPCMD_READ_CD 0xbe
+
+/* Mode page codes for mode sense/set */
+#define GPMODE_R_W_ERROR_PAGE 0x01
+#define GPMODE_CDROM_PAGE 0x0d
+#define GPMODE_CDROM_AUDIO_PAGE 0x0e
+#define GPMODE_CAPABILITIES_PAGE 0x2a
+#define GPMODE_ALL_PAGES 0x3f
+
+/* ATAPI Sense Keys */
+#define SENSE_NONE 0
+#define SENSE_NOT_READY 2
+#define SENSE_ILLEGAL_REQUEST 5
+#define SENSE_UNIT_ATTENTION 6
+
+/* ATAPI Additional Sense Codes */
+#define ASC_AUDIO_PLAY_OPERATION 0x00
+#define ASC_ILLEGAL_OPCODE 0x20
+#define ASC_LBA_OUT_OF_RANGE 0x21
+#define ASC_INV_FIELD_IN_CMD_PACKET 0x24
+#define ASC_MEDIUM_MAY_HAVE_CHANGED 0x28
+#define ASC_MEDIUM_NOT_PRESENT 0x3a
+#define ASC_DATA_PHASE_ERROR 0x4b
+#define ASC_ILLEGAL_MODE_FOR_THIS_TRACK 0x64
+
+#define ASCQ_AUDIO_PLAY_OPERATION_IN_PROGRESS 0x11
+#define ASCQ_AUDIO_PLAY_OPERATION_PAUSED 0x12
+#define ASCQ_AUDIO_PLAY_OPERATION_COMPLETED 0x13
+
+/* Tell RISC OS that we have a 4x CD-ROM drive (600kb/sec data, 706kb/sec raw).
+ Not that it means anything */
+#define CDROM_SPEED 706
/** Evaluate to non-zero if the currently selected drive is an ATAPI device */
#define IDE_DRIVE_IS_CDROM(ide) (ide->type == IDE_CDROM)
+/*
+\
+ (!ide.drive)*/
+/* Event notification classes for GET EVENT STATUS NOTIFICATION */
+#define GESN_NO_EVENTS 0
+#define GESN_OPERATIONAL_CHANGE 1
+#define GESN_POWER_MANAGEMENT 2
+#define GESN_EXTERNAL_REQUEST 3
+#define GESN_MEDIA 4
+#define GESN_MULTIPLE_HOSTS 5
+#define GESN_DEVICE_BUSY 6
+
+/* Event codes for MEDIA event status notification */
+#define MEC_NO_CHANGE 0
+#define MEC_EJECT_REQUESTED 1
+#define MEC_NEW_MEDIA 2
+#define MEC_MEDIA_REMOVAL 3 /* only for media changers */
+#define MEC_MEDIA_CHANGED 4 /* only for media changers */
+#define MEC_BG_FORMAT_COMPLETED 5 /* MRW or DVD+RW b/g format completed */
+#define MEC_BG_FORMAT_RESTARTED 6 /* MRW or DVD+RW b/g format restarted */
+#define MS_TRAY_OPEN 1
+#define MS_MEDIA_PRESENT 2
+
+#define CHECK_READY 2
+#define ALLOW_UA 1
+
+/* Table of all ATAPI commands and their flags, needed for the new disc change / not ready handler. */
+uint8_t atapi_cmd_table[0x100] =
+{
+ [GPCMD_TEST_UNIT_READY] = CHECK_READY,
+ [GPCMD_REQUEST_SENSE] = ALLOW_UA,
+ [GPCMD_READ_6] = CHECK_READY,
+ [GPCMD_INQUIRY] = ALLOW_UA,
+ [GPCMD_MODE_SELECT_6] = 0,
+ [GPCMD_MODE_SENSE_6] = 0,
+ [GPCMD_START_STOP_UNIT] = 0,
+ [GPCMD_PREVENT_REMOVAL] = CHECK_READY,
+ [GPCMD_READ_CDROM_CAPACITY] = CHECK_READY,
+ [GPCMD_READ_10] = CHECK_READY,
+ [GPCMD_SEEK] = CHECK_READY,
+ [GPCMD_READ_SUBCHANNEL] = CHECK_READY,
+ [GPCMD_READ_TOC_PMA_ATIP] = CHECK_READY | ALLOW_UA, /* Read TOC - can get through UNIT_ATTENTION, per VIDE-CDD.SYS */
+ [GPCMD_READ_HEADER] = CHECK_READY,
+ [GPCMD_PLAY_AUDIO_10] = CHECK_READY,
+ [GPCMD_PLAY_AUDIO_MSF] = CHECK_READY,
+ [GPCMD_GET_EVENT_STATUS_NOTIFICATION] = ALLOW_UA,
+ [GPCMD_PAUSE_RESUME] = CHECK_READY,
+ [GPCMD_STOP_PLAY_SCAN] = CHECK_READY,
+ [GPCMD_READ_DISC_INFORMATION] = CHECK_READY,
+ [GPCMD_MODE_SELECT_10] = 0,
+ [GPCMD_MODE_SENSE_10] = 0,
+ [GPCMD_PLAY_AUDIO_12] = CHECK_READY,
+ [GPCMD_READ_12] = CHECK_READY,
+ [GPCMD_SEND_DVD_STRUCTURE] = CHECK_READY, /* Read DVD structure (NOT IMPLEMENTED YET) */
+ [GPCMD_SET_SPEED] = 0,
+ [GPCMD_MECHANISM_STATUS] = 0,
+ [GPCMD_READ_CD] = CHECK_READY,
+ [0xBF] = CHECK_READY /* Send DVD structure (NOT IMPLEMENTED YET) */
+};
+
+#define IMPLEMENTED 1
+
+uint8_t mode_sense_pages[0x40] =
+{
+ [GPMODE_R_W_ERROR_PAGE] = IMPLEMENTED,
+ [GPMODE_CDROM_PAGE] = IMPLEMENTED,
+ [GPMODE_CDROM_AUDIO_PAGE] = IMPLEMENTED,
+ [GPMODE_CAPABILITIES_PAGE] = IMPLEMENTED,
+ [GPMODE_ALL_PAGES] = IMPLEMENTED
+};
+
+ATAPI *atapi;
+
+int atapi_command = 0;
+int readcdmode = 0;
+
+int cdrom_channel = 2;
+
+/* Mode sense/select stuff. */
+uint8_t mode_pages_in[256][256];
+#define PAGE_CHANGEABLE 1
+#define PAGE_CHANGED 2
+uint8_t page_flags[256] =
+{
+ [GPMODE_R_W_ERROR_PAGE] = 0,
+ [GPMODE_CDROM_PAGE] = 0,
+ [GPMODE_CDROM_AUDIO_PAGE] = PAGE_CHANGEABLE,
+ [GPMODE_CAPABILITIES_PAGE] = 0,
+};
+uint8_t prefix_len;
+uint8_t page_current;
+
+#define ATAPI_STATUS_IDLE 0
+#define ATAPI_STATUS_COMMAND 1
+#define ATAPI_STATUS_COMPLETE 2
+#define ATAPI_STATUS_DATA 3
+#define ATAPI_STATUS_PACKET_REQ 4
+#define ATAPI_STATUS_PACKET_RECEIVED 5
+#define ATAPI_STATUS_READCD 6
+#define ATAPI_STATUS_REQ_SENSE 7
+#define ATAPI_STATUS_ERROR 0x80
+#define ATAPI_STATUS_ERROR_2 0x81
enum
{
@@ -58,8 +236,6 @@ enum
IDE_CDROM
};
-struct IDE;
-
typedef struct IDE
{
int type;
@@ -70,7 +246,14 @@ typedef struct IDE
uint8_t command;
uint8_t fdisk;
int pos;
+ int packlen;
+ int spt,hpc;
+ int tracks;
+ int packetstatus;
+ int cdpos,cdlen;
+ uint8_t asc;
int reset;
+ FILE *hdfile;
uint16_t buffer[65536];
int irqstat;
int service;
@@ -78,41 +261,41 @@ typedef struct IDE
uint32_t lba_addr;
int skip512;
int blocksize, blockcount;
- uint8_t sector_buffer[256*512];
- int do_initial_read;
- int sector_pos;
- hdd_file_t hdd_file;
- atapi_device_t atapi;
} IDE;
-int cdrom_channel = 2;
-int zip_channel = -1;
-
-IDE ide_drives[7];
+IDE ide_drives[4];
IDE *ext_ide;
-char ide_fn[7][512];
+char ide_fn[4][512];
-int (*ide_bus_master_read_data)(int channel, uint8_t *data, int size, void *p);
-int (*ide_bus_master_write_data)(int channel, uint8_t *data, int size, void *p);
-void (*ide_bus_master_set_irq)(int channel, void *p);
-void *ide_bus_master_p;
+int (*ide_bus_master_read_sector)(int channel, uint8_t *data);
+int (*ide_bus_master_write_sector)(int channel, uint8_t *data);
+void (*ide_bus_master_set_irq)(int channel);
-pc_timer_t ide_timer[2];
+static void callnonreadcd(IDE *ide);
+static void callreadcd(IDE *ide);
+static void atapicommand(int ide_board);
+
+int idecallback[2] = {0, 0};
int cur_ide[2];
uint8_t getstat(IDE *ide) { return ide->atastat; }
-void ide_irq_raise(IDE *ide)
+static inline void ide_irq_raise(IDE *ide)
{
// pclog("IDE_IRQ_RAISE\n");
if (!(ide->fdisk&2)) {
+#ifdef RPCEMU_IDE
+ iomd.irqb.status |= IOMD_IRQB_IDE;
+ updateirqs();
+#else
// if (ide->board && !ide->irqstat) pclog("IDE_IRQ_RAISE\n");
picint((ide->board)?(1<<15):(1<<14));
if (ide_bus_master_set_irq)
- ide_bus_master_set_irq(ide->board, ide_bus_master_p);
+ ide_bus_master_set_irq(ide->board);
+#endif
}
ide->irqstat=1;
ide->service=1;
@@ -122,17 +305,34 @@ static inline void ide_irq_lower(IDE *ide)
{
// pclog("IDE_IRQ_LOWER\n");
// if (ide.board == 0) {
+#ifdef RPCEMU_IDE
+ iomd.irqb.status &= ~IOMD_IRQB_IDE;
+ updateirqs();
+#else
picintc((ide->board)?(1<<15):(1<<14));
+#endif
// }
ide->irqstat=0;
}
void ide_irq_update(IDE *ide)
{
+#ifdef RPCEMU_IDE
+ if (ide->irqstat && !(iomd.irqb.status & IOMD_IRQB_IDE) && !(ide->fdisk & 2)) {
+ iomd.irqb.status |= IOMD_IRQB_IDE;
+ updateirqs();
+ }
+ else if (iomd.irqb.status & IOMD_IRQB_IDE)
+ {
+ iomd.irqb.status &= ~IOMD_IRQB_IDE;
+ updateirqs();
+ }
+#else
if (ide->irqstat && !((pic2.pend|pic2.ins)&0x40) && !(ide->fdisk & 2))
picint((ide->board)?(1<<15):(1<<14));
else if ((pic2.pend|pic2.ins)&0x40)
picintc((ide->board)?(1<<15):(1<<14));
+#endif
}
/**
* Copy a string into a buffer, padding with spaces, and placing characters as
@@ -143,7 +343,8 @@ void ide_irq_update(IDE *ide)
* @param len Length of destination buffer to fill in. Strings shorter than
* this length will be padded with spaces.
*/
-void ide_padstr(char *str, const char *src, int len)
+static void
+ide_padstr(char *str, const char *src, int len)
{
int i, v;
@@ -157,6 +358,29 @@ void ide_padstr(char *str, const char *src, int len)
}
}
+/**
+ * Copy a string into a buffer, padding with spaces. Does not add string
+ * terminator.
+ *
+ * @param buf Destination buffer
+ * @param buf_size Size of destination buffer to fill in. Strings shorter than
+ * this length will be padded with spaces.
+ * @param src Source string
+ */
+static void
+ide_padstr8(uint8_t *buf, int buf_size, const char *src)
+{
+ int i;
+
+ for (i = 0; i < buf_size; i++) {
+ if (*src != '\0') {
+ buf[i] = *src++;
+ } else {
+ buf[i] = ' ';
+ }
+ }
+}
+
/**
* Fill in ide->buffer with the output of the "IDENTIFY DEVICE" command
*/
@@ -166,17 +390,22 @@ static void ide_identify(IDE *ide)
//ide->buffer[1] = 101; /* Cylinders */
- if ((hdc[cur_ide[ide->board]].tracks * hdc[cur_ide[ide->board]].hpc * hdc[cur_ide[ide->board]].spt) >= 16514064)
- ide->buffer[1] = 16383;
- else
- ide->buffer[1] = hdc[cur_ide[ide->board]].tracks; /* Cylinders */
+#ifdef RPCEMU_IDE
+ ide->buffer[1] = 65535; /* Cylinders */
+ ide->buffer[3] = 16; /* Heads */
+ ide->buffer[6] = 63; /* Sectors */
+#else
+ ide->buffer[1] = hdc[cur_ide[ide->board]].tracks; /* Cylinders */
ide->buffer[3] = hdc[cur_ide[ide->board]].hpc; /* Heads */
ide->buffer[6] = hdc[cur_ide[ide->board]].spt; /* Sectors */
-
+#endif
ide_padstr((char *) (ide->buffer + 10), "", 20); /* Serial Number */
ide_padstr((char *) (ide->buffer + 23), "v1.0", 8); /* Firmware */
+#ifdef RPCEMU_IDE
+ ide_padstr((char *) (ide->buffer + 27), "RPCemuHD", 40); /* Model */
+#else
ide_padstr((char *) (ide->buffer + 27), "PCemHD", 40); /* Model */
-
+#endif
ide->buffer[20] = 3; /*Buffer type*/
ide->buffer[21] = 512; /*Buffer size*/
ide->buffer[47] = 16; /*Max sectors on multiple transfer command*/
@@ -186,12 +415,138 @@ static void ide_identify(IDE *ide)
ide->buffer[51] = 2 << 8; /*PIO timing mode*/
ide->buffer[52] = 2 << 8; /*DMA timing mode*/
ide->buffer[59] = ide->blocksize ? (ide->blocksize | 0x100) : 0;
+#ifdef RPCEMU_IDE
+ ide->buffer[60] = (65535 * 16 * 63) & 0xFFFF; /* Total addressable sectors (LBA) */
+ ide->buffer[61] = (65535 * 16 * 63) >> 16;
+#else
ide->buffer[60] = (hdc[cur_ide[ide->board]].tracks * hdc[cur_ide[ide->board]].hpc * hdc[cur_ide[ide->board]].spt) & 0xFFFF; /* Total addressable sectors (LBA) */
ide->buffer[61] = (hdc[cur_ide[ide->board]].tracks * hdc[cur_ide[ide->board]].hpc * hdc[cur_ide[ide->board]].spt) >> 16;
+#endif
ide->buffer[63] = 7; /*Multiword DMA*/
ide->buffer[80] = 0xe; /*ATA-1 to ATA-3 supported*/
}
+/**
+ * Fill in ide->buffer with the output of the "IDENTIFY PACKET DEVICE" command
+ */
+static void ide_atapi_identify(IDE *ide)
+{
+ memset(ide->buffer, 0, 512);
+
+ ide->buffer[0] = 0x8000 | (5<<8) | 0x80 | (2<<5); /* ATAPI device, CD-ROM drive, removable media, accelerated DRQ */
+ ide_padstr((char *) (ide->buffer + 10), "", 20); /* Serial Number */
+ ide_padstr((char *) (ide->buffer + 23), "v1.0", 8); /* Firmware */
+#ifdef RPCEMU_IDE
+ ide_padstr((char *) (ide->buffer + 27), "RPCemuCD", 40); /* Model */
+#else
+ ide_padstr((char *) (ide->buffer + 27), "PCemCD", 40); /* Model */
+#endif
+ ide->buffer[49] = 0x200; /* LBA supported */
+}
+
+/**
+ * Fill in ide->buffer with the output of the ATAPI "MODE SENSE" command
+ *
+ * @param pos Offset within the buffer to start filling in data
+ *
+ * @return Offset within the buffer after the end of the data
+ */
+static uint32_t ide_atapi_mode_sense(IDE *ide, uint32_t pos, uint8_t type)
+{
+ uint8_t *buf = (uint8_t *) ide->buffer;
+// pclog("ide_atapi_mode_sense %02X\n",type);
+ if (type==GPMODE_ALL_PAGES || type==GPMODE_R_W_ERROR_PAGE)
+ {
+ /* &01 - Read error recovery */
+ buf[pos++] = GPMODE_R_W_ERROR_PAGE;
+ buf[pos++] = 6; /* Page length */
+ buf[pos++] = 0; /* Error recovery parameters */
+ buf[pos++] = 5; /* Read retry count */
+ buf[pos++] = 0; /* Reserved */
+ buf[pos++] = 0; /* Reserved */
+ buf[pos++] = 0; /* Reserved */
+ buf[pos++] = 0; /* Reserved */
+ }
+
+ if (type==GPMODE_ALL_PAGES || type==GPMODE_CDROM_PAGE)
+ {
+ /* &0D - CD-ROM Parameters */
+ buf[pos++] = GPMODE_CDROM_PAGE;
+ buf[pos++] = 6; /* Page length */
+ buf[pos++] = 0; /* Reserved */
+ buf[pos++] = 1; /* Inactivity time multiplier *NEEDED BY RISCOS* value is a guess */
+ buf[pos++] = 0; buf[pos++] = 60; /* MSF settings */
+ buf[pos++] = 0; buf[pos++] = 75; /* MSF settings */
+ }
+
+ if (type==GPMODE_ALL_PAGES || type==GPMODE_CDROM_AUDIO_PAGE)
+ {
+ /* &0e - CD-ROM Audio Control Parameters */
+ buf[pos++] = GPMODE_CDROM_AUDIO_PAGE;
+ buf[pos++] = 0xE; /* Page length */
+ if (page_flags[GPMODE_CDROM_AUDIO_PAGE] & PAGE_CHANGED)
+ {
+ int i;
+
+ for (i = 0; i < 14; i++)
+ {
+ buf[pos++] = mode_pages_in[GPMODE_CDROM_AUDIO_PAGE][i];
+ }
+ }
+ else
+ {
+ buf[pos++] = 4; /* Reserved */
+ buf[pos++] = 0; /* Reserved */
+ buf[pos++] = 0; /* Reserved */
+ buf[pos++] = 0; /* Reserved */
+ buf[pos++] = 0; buf[pos++] = 75; /* Logical audio block per second */
+ buf[pos++] = 1; /* CDDA Output Port 0 Channel Selection */
+ buf[pos++] = 0xFF; /* CDDA Output Port 0 Volume */
+ buf[pos++] = 2; /* CDDA Output Port 1 Channel Selection */
+ buf[pos++] = 0xFF; /* CDDA Output Port 1 Volume */
+ buf[pos++] = 0; /* CDDA Output Port 2 Channel Selection */
+ buf[pos++] = 0; /* CDDA Output Port 2 Volume */
+ buf[pos++] = 0; /* CDDA Output Port 3 Channel Selection */
+ buf[pos++] = 0; /* CDDA Output Port 3 Volume */
+ }
+ }
+
+ if (type==GPMODE_ALL_PAGES || type==GPMODE_CAPABILITIES_PAGE)
+ {
+// pclog("Capabilities page\n");
+ /* &2A - CD-ROM capabilities and mechanical status */
+ buf[pos++] = GPMODE_CAPABILITIES_PAGE;
+ buf[pos++] = 0x12; /* Page length */
+ buf[pos++] = 0; buf[pos++] = 0; /* CD-R methods */
+ buf[pos++] = 1; /* Supports audio play, not multisession */
+ buf[pos++] = 0; /* Some other stuff not supported */
+ buf[pos++] = 0; /* Some other stuff not supported (lock state + eject) */
+ buf[pos++] = 0; /* Some other stuff not supported */
+ buf[pos++] = (uint8_t) (CDROM_SPEED >> 8);
+ buf[pos++] = (uint8_t) CDROM_SPEED; /* Maximum speed */
+ buf[pos++] = 0; buf[pos++] = 2; /* Number of audio levels - on and off only */
+ buf[pos++] = 0; buf[pos++] = 0; /* Buffer size - none */
+ buf[pos++] = (uint8_t) (CDROM_SPEED >> 8);
+ buf[pos++] = (uint8_t) CDROM_SPEED; /* Current speed */
+ buf[pos++] = 0; /* Reserved */
+ buf[pos++] = 0; /* Drive digital format */
+ buf[pos++] = 0; /* Reserved */
+ buf[pos++] = 0; /* Reserved */
+ }
+
+ return pos;
+}
+
+uint32_t atapi_get_cd_channel(int channel)
+{
+ return (page_flags[GPMODE_CDROM_AUDIO_PAGE] & PAGE_CHANGED) ? mode_pages_in[GPMODE_CDROM_AUDIO_PAGE][channel ? 8 : 6] : (channel + 1);
+}
+
+uint32_t atapi_get_cd_volume(int channel)
+{
+ return (page_flags[GPMODE_CDROM_AUDIO_PAGE] & PAGE_CHANGED) ? mode_pages_in[GPMODE_CDROM_AUDIO_PAGE][channel ? 9 : 7] : 0xFF;
+}
+
/*
* Return the sector offset for the current register values
*/
@@ -203,8 +558,8 @@ static off64_t ide_get_sector(IDE *ide)
}
else
{
- int heads = ide->hdd_file.hpc;
- int sectors = ide->hdd_file.spt;
+ int heads = ide->hpc;
+ int sectors = ide->spt;
return ((((off64_t) ide->cylinder * heads) + ide->head) *
sectors) + (ide->sector - 1) + ide->skip512;
@@ -223,12 +578,10 @@ static void ide_next_sector(IDE *ide)
else
{
ide->sector++;
-
- if (ide->sector == (ide->hdd_file.spt + 1)) {
+ if (ide->sector == (ide->spt + 1)) {
ide->sector = 1;
ide->head++;
-
- if (ide->head == ide->hdd_file.hpc) {
+ if (ide->head == ide->hpc) {
ide->head = 0;
ide->cylinder++;
}
@@ -236,15 +589,94 @@ static void ide_next_sector(IDE *ide)
}
}
+#ifdef RPCEMU_IDE
static void loadhd(IDE *ide, int d, const char *fn)
{
- hdd_load(&ide->hdd_file, d, fn);
+ char pathname[512];
+
+ append_filename(pathname, rpcemu_get_datadir(), fn, 512);
+
+ rpclog("Loading %s\n",pathname);
+ if (ide->hdfile == NULL) {
+ /* Try to open existing hard disk image */
+ ide->hdfile = fopen64(pathname, "rb+");
+ if (ide->hdfile == NULL) {
+ /* Failed to open existing hard disk image */
+ if (errno == ENOENT) {
+ /* Failed because it does not exist,
+ so try to create new file */
+ ide->hdfile = fopen64(pathname, "wb+");
+ if (ide->hdfile == NULL) {
+ fatal("Cannot create file '%s': %s",
+ pathname, strerror(errno));
+ }
+ } else {
+ /* Failed for another reason */
+ fatal("Cannot open file '%s': %s",
+ pathname, strerror(errno));
+ }
+ }
+ }
+
+ fseek(ide->hdfile, 0xfc1, SEEK_SET);
+ ide->spt = getc(ide->hdfile);
+ ide->hpc = getc(ide->hdfile);
+ ide->skip512 = 1;
+// rpclog("First check - spt %i hpc %i\n",ide.spt[0],ide.hpc[0]);
+ if (!ide->spt || !ide->hpc)
+ {
+ fseek(ide->hdfile, 0xdc1, SEEK_SET);
+ ide->spt = getc(ide->hdfile);
+ ide->hpc = getc(ide->hdfile);
+// rpclog("Second check - spt %i hpc %i\n",ide.spt[0],ide.hpc[0]);
+ ide->skip512 = 0;
+ if (!ide->spt || !ide->hpc)
+ {
+ ide->spt=63;
+ ide->hpc=16;
+ ide->skip512 = 1;
+// rpclog("Final check - spt %i hpc %i\n",ide.spt[0],ide.hpc[0]);
+ }
+ }
+
+ ide->type = IDE_HDD;
- if (ide->hdd_file.f)
- ide->type = IDE_HDD;
- else
- ide->type = IDE_NONE;
+ rpclog("%i %i %i\n",ide->spt,ide->hpc,ide->skip512);
}
+#else
+static void loadhd(IDE *ide, int d, const char *fn)
+{
+ if (ide->hdfile == NULL) {
+ /* Try to open existing hard disk image */
+ ide->hdfile = fopen64(fn, "rb+");
+ if (ide->hdfile == NULL) {
+ /* Failed to open existing hard disk image */
+ if (errno == ENOENT) {
+ /* Failed because it does not exist,
+ so try to create new file */
+ ide->hdfile = fopen64(fn, "wb+");
+ if (ide->hdfile == NULL) {
+ ide->type = IDE_NONE;
+/* fatal("Cannot create file '%s': %s",
+ fn, strerror(errno));*/
+ return;
+ }
+ } else {
+ /* Failed for another reason */
+ ide->type = IDE_NONE;
+/* fatal("Cannot open file '%s': %s",
+ fn, strerror(errno));*/
+ return;
+ }
+ }
+ }
+
+ ide->spt = hdc[d].spt;
+ ide->hpc = hdc[d].hpc;
+ ide->tracks = hdc[d].tracks;
+ ide->type = IDE_HDD;
+}
+#endif
void ide_set_signature(IDE *ide)
{
@@ -252,7 +684,7 @@ void ide_set_signature(IDE *ide)
ide->sector=1;
ide->head=0;
ide->cylinder=(IDE_DRIVE_IS_CDROM(ide) ? 0xEB14 : ((ide->type == IDE_HDD) ? 0 : 0xFFFF));
-// if (ide->type == IDE_HDD) ide->drive = 0;
+ if (ide->type == IDE_HDD) ide->drive = 0;
}
void resetide(void)
@@ -262,73 +694,122 @@ void resetide(void)
/* Close hard disk image files (if previously open) */
for (d = 0; d < 4; d++) {
ide_drives[d].type = IDE_NONE;
- hdd_close(&ide_drives[d].hdd_file);
-
+ if (ide_drives[d].hdfile != NULL) {
+ fclose(ide_drives[d].hdfile);
+ ide_drives[d].hdfile = NULL;
+ }
ide_drives[d].atastat = READY_STAT | DSC_STAT;
ide_drives[d].service = 0;
ide_drives[d].board = (d & 2) ? 1 : 0;
}
- if (hdd_controller_current_is_ide())
- {
- for (d = 0; d < 4; d++)
- {
- ide_drives[d].drive = d;
+ page_flags[GPMODE_CDROM_AUDIO_PAGE] &= 0xFD; /* Clear changed flag for CDROM AUDIO mode page. */
+ memset(mode_pages_in[GPMODE_CDROM_AUDIO_PAGE], 0, 256); /* Clear the page itself. */
- if (cdrom_channel == d)
- {
- ide_drives[d].type = IDE_CDROM;
- scsi_bus_atapi_init(&ide_drives[d].atapi.bus, &scsi_cd, d, &ide_drives[d].atapi);
- }
- else if (zip_channel == d)
- {
- ide_drives[d].type = IDE_CDROM;
- scsi_bus_atapi_init(&ide_drives[d].atapi.bus, &scsi_zip, d, &ide_drives[d].atapi);
- }
- else
- {
- loadhd(&ide_drives[d], d, ide_fn[d]);
- }
-
- ide_set_signature(&ide_drives[d]);
-
- ide_drives[d].atapi.ide = &ide_drives[d];
- ide_drives[d].atapi.board = (d & 2) ? 1 : 0;
- ide_drives[d].atapi.atastat = &ide_drives[d].atastat;
- ide_drives[d].atapi.error = &ide_drives[d].error;
- ide_drives[d].atapi.cylinder = &ide_drives[d].cylinder;
- }
+ idecallback[0]=idecallback[1]=0;
+#ifdef RPCEMU_IDE
+ loadhd(&ide_drives[0], 0, "hd4.hdf");
+ if (!config.cdromenabled) {
+ loadhd(&ide_drives[1], 1, "hd5.hdf");
}
+ else
+ ide_drives[1].type = IDE_CDROM;
+#else
+ for (d = 0; d < 4; d++)
+ {
+ ide_drives[d].packetstatus = 0xFF;
+ if ((cdrom_channel == d) && cdrom_enabled)
+ {
+ ide_drives[d].type = IDE_CDROM;
+ }
+ else
+ {
+ loadhd(&ide_drives[d], d, ide_fn[d]);
+ }
+
+ ide_set_signature(&ide_drives[d]);
+ }
+#endif
cur_ide[0] = 0;
cur_ide[1] = 2;
-}
+
+// ide_drives[1].type = IDE_CDROM;
+ page_flags[GPMODE_CDROM_AUDIO_PAGE] &= ~PAGE_CHANGED;
+}
int idetimes=0;
void writeidew(int ide_board, uint16_t val)
{
IDE *ide = &ide_drives[cur_ide[ide_board]];
- if (ide->command == WIN_PACKETCMD)
+ /*Some software issue excess writes after the 12 bytes required by the command, this will have all of them ignored*/
+ if (ide->packetstatus && (ide->packetstatus != ATAPI_STATUS_PACKET_REQ))
+ return;
+#ifndef RPCEMU_IDE
+/* if (ide_board && (cr0&1) && !(eflags&VM_FLAG))
{
- atapi_data_write(&ide->atapi, val);
- }
- else
- {
- ide->buffer[ide->pos >> 1] = val;
- ide->pos += 2;
+// pclog("Failed write IDE %04X:%08X\n",CS,pc);
+ return;
+ }*/
+#endif
+#ifdef _RPCEMU_BIG_ENDIAN
+ val=(val>>8)|(val<<8);
+#endif
+// pclog("Write IDEw %04X\n",val);
+ ide->buffer[ide->pos >> 1] = val;
+ ide->pos+=2;
- if (ide->pos>=512)
+ if (ide->packetstatus == ATAPI_STATUS_PACKET_REQ)
+ {
+ if ((ide->pos>=prefix_len+4) && (page_flags[page_current] & PAGE_CHANGEABLE))
+ {
+ mode_pages_in[page_current][ide->pos - prefix_len - 4] = ((uint8_t *) ide->buffer)[ide->pos - 2];
+ mode_pages_in[page_current][ide->pos - prefix_len - 3] = ((uint8_t *) ide->buffer)[ide->pos - 1];
+ }
+ if (ide->pos>=(ide->packlen+2))
{
- ide->pos=0;
- ide->atastat = BUSY_STAT;
- if (ide->command == WIN_WRITE_MULTIPLE)
- callbackide(ide_board);
- else
- timer_set_delay_u64(&ide_timer[ide_board], 6 * IDE_TIME);
+ ide->packetstatus = ATAPI_STATUS_PACKET_RECEIVED;
+ timer_process();
+ idecallback[ide_board]=6*IDE_TIME;
+ timer_update_outstanding();
+// pclog("Packet over!\n");
+ ide_irq_lower(ide);
}
+ return;
+ }
+ else if (ide->packetstatus == ATAPI_STATUS_PACKET_RECEIVED)
+ return;
+ else if (ide->command == WIN_PACKETCMD && ide->pos>=0xC)
+ {
+ ide->pos=0;
+ ide->atastat = BUSY_STAT;
+ ide->packetstatus = ATAPI_STATUS_COMMAND;
+/* idecallback[ide_board]=6*IDE_TIME;*/
+ timer_process();
+ callbackide(ide_board);
+ timer_update_outstanding();
+// idecallback[ide_board]=60*IDE_TIME;
+// if ((ide->buffer[0]&0xFF)==0x43) idecallback[ide_board]=1*IDE_TIME;
+// pclog("Packet now waiting!\n");
+/* if (ide->buffer[0]==0x243)
+ {
+ idetimes++;
+ output=3;
+ }*/
+ }
+ else if (ide->pos>=512)
+ {
+ ide->pos=0;
+ ide->atastat = BUSY_STAT;
+ timer_process();
+ if (ide->command == WIN_WRITE_MULTIPLE)
+ callbackide(ide_board);
+ else
+ idecallback[ide_board]=6*IDE_TIME;
+ timer_update_outstanding();
}
}
@@ -343,15 +824,15 @@ void writeide(int ide_board, uint16_t addr, uint8_t val)
{
IDE *ide = &ide_drives[cur_ide[ide_board]];
IDE *ide_other = &ide_drives[cur_ide[ide_board] ^ 1];
-
+#ifndef RPCEMU_IDE
/* if (ide_board && (cr0&1) && !(eflags&VM_FLAG))
{
// pclog("Failed write IDE %04X:%08X\n",CS,pc);
return;
}*/
+#endif
// if ((cr0&1) && !(eflags&VM_FLAG))
-// if (ide_board)
-// pclog("WriteIDE %04X %02X from %04X(%08X):%08X %i\n", addr, val, CS, cs, cpu_state.pc, ins);
+// pclog("WriteIDE %04X %02X from %04X(%08X):%08X %i\n", addr, val, CS, cs, pc, ins);
// return;
addr|=0x80;
// if (ide_board) pclog("Write IDEb %04X %02X %04X(%08X):%04X %i %02X %02X\n",addr,val,CS,cs,pc,ins,ide->atastat,ide_drives[0].atastat);
@@ -426,7 +907,8 @@ void writeide(int ide_board, uint16_t addr, uint8_t val)
if (IDE_DRIVE_IS_CDROM(ide_other))
ide_other->cylinder=0xEB14;
- timer_disable(&ide_timer[ide_board]);
+ idecallback[ide_board] = 0;
+ timer_update_outstanding();
return;
}
@@ -457,14 +939,18 @@ void writeide(int ide_board, uint16_t addr, uint8_t val)
case WIN_SRST: /* ATAPI Device Reset */
if (IDE_DRIVE_IS_CDROM(ide)) ide->atastat = BUSY_STAT;
else ide->atastat = READY_STAT;
- timer_set_delay_u64(&ide_timer[ide_board], 100*IDE_TIME);
+ timer_process();
+ idecallback[ide_board]=100*IDE_TIME;
+ timer_update_outstanding();
return;
case WIN_RESTORE:
case WIN_SEEK:
// pclog("WIN_RESTORE start\n");
ide->atastat = READY_STAT;
- timer_set_delay_u64(&ide_timer[ide_board], 100*IDE_TIME);
+ timer_process();
+ idecallback[ide_board]=100*IDE_TIME;
+ timer_update_outstanding();
return;
case WIN_READ_MULTIPLE:
@@ -488,8 +974,9 @@ void writeide(int ide_board, uint16_t addr, uint8_t val)
else pclog("Read %i sectors from sector %i cylinder %i head %i %i\n",ide->secount,ide->sector,ide->cylinder,ide->head,ins);
#endif
ide->atastat = BUSY_STAT;
- timer_set_delay_u64(&ide_timer[ide_board], 200*IDE_TIME);
- ide->do_initial_read = 1;
+ timer_process();
+ idecallback[ide_board]=200*IDE_TIME;
+ timer_update_outstanding();
return;
case WIN_WRITE_MULTIPLE:
@@ -521,7 +1008,9 @@ void writeide(int ide_board, uint16_t addr, uint8_t val)
else pclog("Write %i sectors to sector %i cylinder %i head %i\n",ide->secount,ide->sector,ide->cylinder,ide->head);
#endif
ide->atastat = BUSY_STAT;
- timer_set_delay_u64(&ide_timer[ide_board], 200*IDE_TIME);
+ timer_process();
+ idecallback[ide_board]=200*IDE_TIME;
+ timer_update_outstanding();
return;
case WIN_VERIFY:
@@ -531,7 +1020,9 @@ void writeide(int ide_board, uint16_t addr, uint8_t val)
else pclog("Read verify %i sectors from sector %i cylinder %i head %i\n",ide->secount,ide->sector,ide->cylinder,ide->head);
#endif
ide->atastat = BUSY_STAT;
- timer_set_delay_u64(&ide_timer[ide_board], 200*IDE_TIME);
+ timer_process();
+ idecallback[ide_board]=200*IDE_TIME;
+ timer_update_outstanding();
return;
case WIN_FORMAT:
@@ -543,42 +1034,42 @@ void writeide(int ide_board, uint16_t addr, uint8_t val)
case WIN_SPECIFY: /* Initialize Drive Parameters */
ide->atastat = BUSY_STAT;
- timer_set_delay_u64(&ide_timer[ide_board], 30*IDE_TIME);
+ timer_process();
+ idecallback[ide_board]=30*IDE_TIME;
+ timer_update_outstanding();
// pclog("SPECIFY\n");
// output=1;
return;
case WIN_DRIVE_DIAGNOSTICS: /* Execute Drive Diagnostics */
- ide->atastat = BUSY_STAT;
- timer_set_delay_u64(&ide_timer[ide_board], 200*IDE_TIME);
- return;
-
case WIN_PIDENTIFY: /* Identify Packet Device */
case WIN_SET_MULTIPLE_MODE: /*Set Multiple Mode*/
// output=1;
case WIN_SETIDLE1: /* Idle */
- case WIN_CHECK_POWER_MODE:
ide->atastat = BUSY_STAT;
+ timer_process();
callbackide(ide_board);
// idecallback[ide_board]=200*IDE_TIME;
+ timer_update_outstanding();
return;
case WIN_IDENTIFY: /* Identify Device */
- case WIN_SET_FEATURES:
+ case 0xEF:
// output=3;
// timetolive=500;
ide->atastat = BUSY_STAT;
- timer_set_delay_u64(&ide_timer[ide_board], 200*IDE_TIME);
+ timer_process();
+ idecallback[ide_board]=200*IDE_TIME;
+ timer_update_outstanding();
return;
case WIN_PACKETCMD: /* ATAPI Packet */
- if (ide->type == IDE_CDROM)
- atapi_command_start(&ide->atapi, ide->cylprecomp);
-
+ ide->packetstatus = ATAPI_STATUS_IDLE;
ide->atastat = BUSY_STAT;
- timer_set_delay_u64(&ide_timer[ide_board], IDE_TIME);
-
- ide->atapi.bus_state = 0;
+ timer_process();
+ idecallback[ide_board]=1;//30*IDE_TIME;
+ timer_update_outstanding();
+ ide->pos=0;
return;
case 0xF0:
@@ -595,7 +1086,9 @@ void writeide(int ide_board, uint16_t addr, uint8_t val)
case 0x3F6: /* Device control */
if ((ide->fdisk&4) && !(val&4) && (ide->type != IDE_NONE || ide_other->type != IDE_NONE))
{
- timer_set_delay_u64(&ide_timer[ide_board], 500*IDE_TIME);
+ timer_process();
+ idecallback[ide_board]=500*IDE_TIME;
+ timer_update_outstanding();
ide->reset = ide_other->reset = 1;
ide->atastat = ide_other->atastat = BUSY_STAT;
// pclog("IDE Reset %i\n", ide_board);
@@ -603,7 +1096,9 @@ void writeide(int ide_board, uint16_t addr, uint8_t val)
if (val & 4)
{
/*Drive held in reset*/
- timer_disable(&ide_timer[ide_board]);
+ timer_process();
+ idecallback[ide_board] = 0;
+ timer_update_outstanding();
ide->atastat = ide_other->atastat = BUSY_STAT;
}
ide->fdisk = ide_other->fdisk = val;
@@ -620,12 +1115,13 @@ uint8_t readide(int ide_board, uint16_t addr)
uint16_t tempw;
addr|=0x80;
-
+#ifndef RPCEMU_IDE
/* if (ide_board && (cr0&1) && !(eflags&VM_FLAG))
{
// pclog("Failed read IDE %04X:%08X\n",CS,pc);
return 0xFF;
}*/
+#endif
// if ((cr0&1) && !(eflags&VM_FLAG))
// pclog("ReadIDE %04X from %04X(%08X):%08X\n", addr, CS, cs, pc);
// return 0xFF;
@@ -648,10 +1144,7 @@ uint8_t readide(int ide_board, uint16_t addr)
case 0x1F2: /* Sector count */
// pclog("Read sector count %02X\n",ide->secount);
- if (ide->type == IDE_CDROM && ide->command == WIN_PACKETCMD)
- temp = atapi_read_iir(&ide->atapi);
- else
- temp = (uint8_t)ide->secount;
+ temp = (uint8_t)ide->secount;
break;
case 0x1F3: /* Sector */
@@ -684,13 +1177,6 @@ uint8_t readide(int ide_board, uint16_t addr)
{
// pclog("Read CDROM status %02X\n",(ide->atastat & ~DSC_STAT) | (ide->service ? SERVICE_STAT : 0));
temp = (ide->atastat & ~DSC_STAT) | (ide->service ? SERVICE_STAT : 0);
- if (ide->command == WIN_PACKETCMD)
- {
- if (atapi_read_drq(&ide->atapi))
- temp |= DRQ_STAT;
- else
- temp &= ~DRQ_STAT;
- }
}
else
{
@@ -713,13 +1199,6 @@ uint8_t readide(int ide_board, uint16_t addr)
{
// pclog("Read CDROM status %02X\n",(ide->atastat & ~DSC_STAT) | (ide->service ? SERVICE_STAT : 0));
temp = (ide->atastat & ~DSC_STAT) | (ide->service ? SERVICE_STAT : 0);
- if (ide->command == WIN_PACKETCMD)
- {
- if (atapi_read_drq(&ide->atapi))
- temp |= DRQ_STAT;
- else
- temp &= ~DRQ_STAT;
- }
}
else
{
@@ -729,7 +1208,7 @@ uint8_t readide(int ide_board, uint16_t addr)
}
break;
}
-// if (ide_board) pclog("Read IDEb %04X %02X %02X %02X %i %04X:%04X %i\n", addr, temp, ide->atastat,(ide->atastat & ~DSC_STAT) | (ide->service ? SERVICE_STAT : 0),cur_ide[ide_board],CS,cpu_state.pc,ide_board);
+// if (ide_board) pclog("Read IDEb %04X %02X %02X %02X %i %04X:%04X %i\n", addr, temp, ide->atastat,(ide->atastat & ~DSC_STAT) | (ide->service ? SERVICE_STAT : 0),cur_ide[ide_board],CS,pc,ide_board);
return temp;
// fatal("Bad IDE read %04X\n", addr);
}
@@ -738,39 +1217,54 @@ uint16_t readidew(int ide_board)
{
IDE *ide = &ide_drives[cur_ide[ide_board]];
uint16_t temp;
-
+#ifndef RPCEMU_IDE
/* if (ide_board && (cr0&1) && !(eflags&VM_FLAG))
{
// pclog("Failed read IDEw %04X:%08X\n",CS,pc);
return 0xFFFF;
}*/
+#endif
// return 0xFFFF;
// pclog("Read IDEw %04X %04X:%04X %02X %i %i\n",ide->buffer[ide->pos >> 1],CS,pc,opcode,ins, ide->pos);
- if (ide->command == WIN_PACKETCMD)
+//if (idedebug) pclog("Read IDEW %08X\n",PC);
+
+ temp = ide->buffer[ide->pos >> 1];
+ #ifdef _RPCEMU_BIG_ENDIAN
+ temp=(temp>>8)|(temp<<8);
+ #endif
+ ide->pos+=2;
+ if ((ide->command == WIN_PACKETCMD) && ((ide->packetstatus == ATAPI_STATUS_REQ_SENSE) || (ide->packetstatus==8)))
+ {
+ callnonreadcd(ide);
+ return temp;
+ }
+ if ((ide->pos>=512 && ide->command != WIN_PACKETCMD) || (ide->command == WIN_PACKETCMD && ide->pos>=ide->packlen))
{
- temp = atapi_data_read(&ide->atapi);
- }
- else
- {
- temp = ide->buffer[ide->pos >> 1];
- ide->pos += 2;
- if (ide->pos >= 512 && ide->command)
+// pclog("Over! packlen %i %i\n",ide->packlen,ide->pos);
+ ide->pos=0;
+ if (ide->command == WIN_PACKETCMD)// && ide.packetstatus==6)
+ {
+// pclog("Call readCD\n");
+ callreadcd(ide);
+ }
+ else
{
-// pclog("Over! packlen %i %i\n",ide->packlen,ide->pos);
- ide->pos = 0;
ide->atastat = READY_STAT | DSC_STAT;
+ ide->packetstatus = ATAPI_STATUS_IDLE;
if (ide->command == WIN_READ || ide->command == WIN_READ_NORETRY || ide->command == WIN_READ_MULTIPLE)
{
ide->secount = (ide->secount - 1) & 0xff;
if (ide->secount)
{
ide_next_sector(ide);
- ide->atastat = BUSY_STAT | READY_STAT | DSC_STAT;
+ ide->atastat = BUSY_STAT;
+ timer_process();
if (ide->command == WIN_READ_MULTIPLE)
- callbackide(ide_board);
+ callbackide(ide_board);
else
- timer_set_delay_u64(&ide_timer[ide_board], 6 * IDE_TIME);
+ idecallback[ide_board]=6*IDE_TIME;
+ timer_update_outstanding();
// pclog("set idecallback\n");
// callbackide(ide_board);
}
@@ -796,8 +1290,8 @@ void callbackide(int ide_board)
{
IDE *ide = &ide_drives[cur_ide[ide_board]];
IDE *ide_other = &ide_drives[cur_ide[ide_board] ^ 1];
- atapi_device_t *atapi_dev = &ide->atapi;
-
+ off64_t addr;
+ int c;
ext_ide = ide;
// return;
if (ide->command==0x30) times30++;
@@ -819,24 +1313,20 @@ void callbackide(int ide_board)
{
ide->cylinder=0xEB14;
atapi->stop();
- atapi_reset(&ide->atapi);
}
if (ide->type == IDE_NONE)
{
ide->cylinder=0xFFFF;
- ide->error = 0xff;
atapi->stop();
}
if (IDE_DRIVE_IS_CDROM(ide_other))
{
ide_other->cylinder=0xEB14;
atapi->stop();
- atapi_reset(&ide_other->atapi);
}
if (ide_other->type == IDE_NONE)
{
ide_other->cylinder=0xFFFF;
- ide_other->error = 0xff;
atapi->stop();
}
// pclog("Reset callback\n");
@@ -874,48 +1364,40 @@ void callbackide(int ide_board)
ide_set_signature(ide);
goto abort_cmd;
}
- if (ide->do_initial_read)
- {
- ide->do_initial_read = 0;
- ide->sector_pos = 0;
- hdd_read_sectors(&ide->hdd_file, ide_get_sector(ide), ide->secount ? ide->secount : 256, ide->sector_buffer);
- }
- memcpy(ide->buffer, &ide->sector_buffer[ide->sector_pos*512], 512);
- ide->sector_pos++;
+ addr = ide_get_sector(ide) * 512;
// pclog("Read %i %i %i %08X\n",ide.cylinder,ide.head,ide.sector,addr);
/* if (ide.cylinder || ide.head)
{
fatal("Read from other cylinder/head");
}*/
+ fseeko64(ide->hdfile, addr, SEEK_SET);
+ fread(ide->buffer, 512, 1, ide->hdfile);
ide->pos=0;
ide->atastat = DRQ_STAT | READY_STAT | DSC_STAT;
// pclog("Read sector callback %i %i %i offset %08X %i left %i %02X\n",ide.sector,ide.cylinder,ide.head,addr,ide.secount,ide.spt,ide.atastat[ide.board]);
// if (addr) output=3;
ide_irq_raise(ide);
-
- readflash_set(READFLASH_HDC, ide->drive);
+#ifndef RPCEMU_IDE
+ readflash=1;
+#endif
return;
case WIN_READ_DMA:
if (IDE_DRIVE_IS_CDROM(ide)) {
goto abort_cmd;
}
- if (ide->do_initial_read)
- {
- ide->do_initial_read = 0;
- ide->sector_pos = 0;
- hdd_read_sectors(&ide->hdd_file, ide_get_sector(ide), ide->secount ? ide->secount : 256, ide->sector_buffer);
- }
+ addr = ide_get_sector(ide) * 512;
+ fseeko64(ide->hdfile, addr, SEEK_SET);
+ fread(ide->buffer, 512, 1, ide->hdfile);
ide->pos=0;
- if (ide_bus_master_read_data)
+ if (ide_bus_master_read_sector)
{
- if (ide_bus_master_read_data(ide_board, &ide->sector_buffer[ide->sector_pos*512], 512, ide_bus_master_p))
- timer_set_delay_u64(&ide_timer[ide_board], 6*IDE_TIME); /*DMA not performed, try again later*/
+ if (ide_bus_master_read_sector(ide_board, (uint8_t *)ide->buffer))
+ idecallback[ide_board]=6*IDE_TIME; /*DMA not performed, try again later*/
else
{
/*DMA successful*/
- ide->sector_pos++;
ide->atastat = DRQ_STAT | READY_STAT | DSC_STAT;
ide->secount = (ide->secount - 1) & 0xff;
@@ -923,7 +1405,7 @@ void callbackide(int ide_board)
{
ide_next_sector(ide);
ide->atastat = BUSY_STAT;
- timer_set_delay_u64(&ide_timer[ide_board], 6*IDE_TIME);
+ idecallback[ide_board]=6*IDE_TIME;
}
else
{
@@ -931,22 +1413,19 @@ void callbackide(int ide_board)
}
}
}
-
- readflash_set(READFLASH_HDC, ide->drive);
+#ifndef RPCEMU_IDE
+ readflash=1;
+#endif
return;
case WIN_READ_MULTIPLE:
if (IDE_DRIVE_IS_CDROM(ide)) {
goto abort_cmd;
}
- if (ide->do_initial_read)
- {
- ide->do_initial_read = 0;
- ide->sector_pos = 0;
- hdd_read_sectors(&ide->hdd_file, ide_get_sector(ide), ide->secount ? ide->secount : 256, ide->sector_buffer);
- }
- memcpy(ide->buffer, &ide->sector_buffer[ide->sector_pos*512], 512);
- ide->sector_pos++;
+ addr = ide_get_sector(ide) * 512;
+// pclog("Read multiple from %08X %i (%i) %i\n", addr, ide->blockcount, ide->blocksize, ide->secount);
+ fseeko64(ide->hdfile, addr, SEEK_SET);
+ fread(ide->buffer, 512, 1, ide->hdfile);
ide->pos=0;
ide->atastat = DRQ_STAT | READY_STAT | DSC_STAT;
if (!ide->blockcount)// || ide->secount == 1)
@@ -957,8 +1436,9 @@ void callbackide(int ide_board)
ide->blockcount++;
if (ide->blockcount >= ide->blocksize)
ide->blockcount = 0;
-
- readflash_set(READFLASH_HDC, ide->drive);
+#ifndef RPCEMU_IDE
+ readflash=1;
+#endif
return;
case WIN_WRITE:
@@ -966,7 +1446,10 @@ void callbackide(int ide_board)
if (IDE_DRIVE_IS_CDROM(ide)) {
goto abort_cmd;
}
- hdd_write_sectors(&ide->hdd_file, ide_get_sector(ide), 1, ide->buffer);
+ addr = ide_get_sector(ide) * 512;
+// pclog("Write sector callback %i %i %i offset %08X %i left %i\n",ide.sector,ide.cylinder,ide.head,addr,ide.secount,ide.spt);
+ fseeko64(ide->hdfile, addr, SEEK_SET);
+ fwrite(ide->buffer, 512, 1, ide->hdfile);
ide_irq_raise(ide);
ide->secount = (ide->secount - 1) & 0xff;
if (ide->secount)
@@ -977,8 +1460,9 @@ void callbackide(int ide_board)
}
else
ide->atastat = READY_STAT | DSC_STAT;
-
- readflash_set(READFLASH_HDC, ide->drive);
+#ifndef RPCEMU_IDE
+ readflash=1;
+#endif
return;
case WIN_WRITE_DMA:
@@ -986,14 +1470,16 @@ void callbackide(int ide_board)
goto abort_cmd;
}
- if (ide_bus_master_write_data)
+ if (ide_bus_master_write_sector)
{
- if (ide_bus_master_write_data(ide_board, (uint8_t *)ide->buffer, 512, ide_bus_master_p))
- timer_set_delay_u64(&ide_timer[ide_board], 6*IDE_TIME); /*DMA not performed, try again later*/
+ if (ide_bus_master_write_sector(ide_board, (uint8_t *)ide->buffer))
+ idecallback[ide_board]=6*IDE_TIME; /*DMA not performed, try again later*/
else
{
/*DMA successful*/
- hdd_write_sectors(&ide->hdd_file, ide_get_sector(ide), 1, ide->buffer);
+ addr = ide_get_sector(ide) * 512;
+ fseeko64(ide->hdfile, addr, SEEK_SET);
+ fwrite(ide->buffer, 512, 1, ide->hdfile);
ide->atastat = DRQ_STAT | READY_STAT | DSC_STAT;
@@ -1002,7 +1488,7 @@ void callbackide(int ide_board)
{
ide_next_sector(ide);
ide->atastat = BUSY_STAT;
- timer_set_delay_u64(&ide_timer[ide_board], 6*IDE_TIME);
+ idecallback[ide_board]=6*IDE_TIME;
}
else
{
@@ -1010,15 +1496,19 @@ void callbackide(int ide_board)
}
}
}
-
- readflash_set(READFLASH_HDC, ide->drive);
+#ifndef RPCEMU_IDE
+ readflash=1;
+#endif
return;
case WIN_WRITE_MULTIPLE:
if (IDE_DRIVE_IS_CDROM(ide)) {
goto abort_cmd;
}
- hdd_write_sectors(&ide->hdd_file, ide_get_sector(ide), 1, ide->buffer);
+ addr = ide_get_sector(ide) * 512;
+// pclog("Write sector callback %i %i %i offset %08X %i left %i\n",ide.sector,ide.cylinder,ide.head,addr,ide.secount,ide.spt);
+ fseeko64(ide->hdfile, addr, SEEK_SET);
+ fwrite(ide->buffer, 512, 1, ide->hdfile);
ide->blockcount++;
if (ide->blockcount >= ide->blocksize || ide->secount == 1)
{
@@ -1034,8 +1524,9 @@ void callbackide(int ide_board)
}
else
ide->atastat = READY_STAT | DSC_STAT;
-
- readflash_set(READFLASH_HDC, ide->drive);
+#ifndef RPCEMU_IDE
+ readflash=1;
+#endif
return;
case WIN_VERIFY:
@@ -1047,19 +1538,28 @@ void callbackide(int ide_board)
ide->atastat = READY_STAT | DSC_STAT;
// pclog("Read verify callback %i %i %i offset %08X %i left\n",ide.sector,ide.cylinder,ide.head,addr,ide.secount);
ide_irq_raise(ide);
-
- readflash_set(READFLASH_HDC, ide->drive);
+#ifndef RPCEMU_IDE
+ readflash=1;
+#endif
return;
case WIN_FORMAT:
if (IDE_DRIVE_IS_CDROM(ide)) {
goto abort_cmd;
}
- hdd_format_sectors(&ide->hdd_file, ide_get_sector(ide), ide->secount);
+ addr = ide_get_sector(ide) * 512;
+// pclog("Format cyl %i head %i offset %08X %08X %08X secount %i\n",ide.cylinder,ide.head,addr,addr>>32,addr,ide.secount);
+ fseeko64(ide->hdfile, addr, SEEK_SET);
+ memset(ide->buffer, 0, 512);
+ for (c=0;csecount;c++)
+ {
+ fwrite(ide->buffer, 512, 1, ide->hdfile);
+ }
ide->atastat = READY_STAT | DSC_STAT;
ide_irq_raise(ide);
-
- readflash_set(READFLASH_HDC, ide->drive);
+#ifndef RPCEMU_IDE
+ readflash=1;
+#endif
return;
case WIN_DRIVE_DIAGNOSTICS:
@@ -1078,21 +1578,24 @@ void callbackide(int ide_board)
case WIN_SPECIFY: /* Initialize Drive Parameters */
if (IDE_DRIVE_IS_CDROM(ide)) {
+#ifndef RPCEMU_IDE
pclog("IS CDROM - ABORT\n");
+#endif
goto abort_cmd;
}
- ide->hdd_file.spt = ide->secount;
- ide->hdd_file.hpc = ide->head+1;
+ ide->spt=ide->secount;
+ ide->hpc=ide->head+1;
ide->atastat = READY_STAT | DSC_STAT;
+#ifndef RPCEMU_IDE
// pclog("SPECIFY - %i sectors per track, %i heads per cylinder %i %i\n",ide->spt,ide->hpc,cur_ide[ide_board],ide_board);
+#endif
ide_irq_raise(ide);
return;
case WIN_PIDENTIFY: /* Identify Packet Device */
if (IDE_DRIVE_IS_CDROM(ide)) {
// pclog("ATAPI identify\n");
- atapi_dev->bus.devices[0]->atapi_identify(ide->buffer, atapi_dev->bus.device_data[0]);
-
+ ide_atapi_identify(ide);
ide->pos=0;
ide->error=0;
ide->atastat = DRQ_STAT | READY_STAT | DSC_STAT;
@@ -1104,16 +1607,21 @@ void callbackide(int ide_board)
case WIN_SET_MULTIPLE_MODE:
if (IDE_DRIVE_IS_CDROM(ide)) {
+#ifndef RPCEMU_IDE
pclog("IS CDROM - ABORT\n");
+#endif
goto abort_cmd;
}
ide->blocksize = ide->secount;
ide->atastat = READY_STAT | DSC_STAT;
+#ifndef RPCEMU_IDE
pclog("Set multiple mode - %i\n", ide->blocksize);
+#endif
ide_irq_raise(ide);
return;
case WIN_SETIDLE1: /* Idle */
+ case 0xEF:
goto abort_cmd;
case WIN_IDENTIFY: /* Identify Device */
@@ -1136,33 +1644,79 @@ void callbackide(int ide_board)
}
return;
- case WIN_SET_FEATURES:
- if (ide->type == IDE_NONE)
- goto abort_cmd;
- if (!IDE_DRIVE_IS_CDROM(ide))
- goto abort_cmd;
-
- if (!atapi_dev->bus.devices[0]->atapi_set_feature(ide->cylprecomp, ide->secount, atapi_dev->bus.device_data[0]))
- goto abort_cmd;
- ide->atastat = READY_STAT | DSC_STAT;
- ide_irq_raise(ide);
- return;
-
- case WIN_CHECK_POWER_MODE:
- if (ide->type == IDE_NONE)
- {
- goto abort_cmd;
- }
- ide->secount = 0xff;
- ide->atastat = READY_STAT | DSC_STAT;
- ide_irq_raise(ide);
- return;
-
case WIN_PACKETCMD: /* ATAPI Packet */
if (!IDE_DRIVE_IS_CDROM(ide)) goto abort_cmd;
-
- atapi_process_packet(atapi_dev);
-
+// pclog("Packet callback! %i %08X\n",ide->packetstatus,ide);
+
+ if (ide->packetstatus == ATAPI_STATUS_IDLE)
+ {
+ readcdmode=0;
+ ide->pos=0;
+ ide->secount = (uint8_t)((ide->secount&0xF8)|1);
+ ide->atastat = READY_STAT | DRQ_STAT |(ide->atastat&ERR_STAT);
+ //ide_irq_raise(ide);
+// pclog("1 Preparing to recieve packet max DRQ count %04X\n",ide->cylinder);
+ }
+ else if (ide->packetstatus == ATAPI_STATUS_COMMAND)
+ {
+ ide->atastat = BUSY_STAT|(ide->atastat&ERR_STAT);
+// pclog("Running ATAPI command 2\n");
+ atapicommand(ide_board);
+// exit(-1);
+ }
+ else if (ide->packetstatus == ATAPI_STATUS_COMPLETE)
+ {
+// pclog("packetstatus==2\n");
+ ide->atastat = READY_STAT;
+ ide->secount=3;
+ ide_irq_raise(ide);
+// if (iomd.irqb.mask&2) output=1;
+ }
+ else if (ide->packetstatus == ATAPI_STATUS_DATA)
+ {
+ ide->atastat = READY_STAT|DRQ_STAT|(ide->atastat&ERR_STAT);
+// rpclog("Recieve data packet 3! %02X\n",ide->atastat);
+ ide_irq_raise(ide);
+ ide->packetstatus=0xFF;
+ }
+ else if (ide->packetstatus == ATAPI_STATUS_PACKET_REQ)
+ {
+ ide->atastat = 0x58 | (ide->atastat & ERR_STAT);
+// pclog("Send data packet 4!\n");
+ ide_irq_raise(ide);
+// ide.packetstatus=5;
+ ide->pos=2;
+ }
+ else if (ide->packetstatus == ATAPI_STATUS_PACKET_RECEIVED)
+ {
+// pclog("Packetstatus 5 !\n");
+ atapicommand(ide_board);
+ }
+ else if (ide->packetstatus == ATAPI_STATUS_READCD) /*READ CD callback*/
+ {
+ ide->atastat = DRQ_STAT|(ide->atastat&ERR_STAT);
+// pclog("Recieve data packet 6!\n");
+ ide_irq_raise(ide);
+// ide.packetstatus=0xFF;
+ }
+ else if (ide->packetstatus == ATAPI_STATUS_REQ_SENSE) /*REQUEST SENSE callback #1*/
+ {
+ pclog("REQUEST SENSE callback #1: setting status to 0x5A\n");
+ ide->atastat = 0x58 | (ide->atastat & ERR_STAT);
+ ide_irq_raise(ide);
+ }
+ else if (ide->packetstatus == ATAPI_STATUS_ERROR) /*Error callback*/
+ {
+// pclog("Packet error\n");
+ ide->atastat = READY_STAT | ERR_STAT;
+ ide_irq_raise(ide);
+ }
+ else if (ide->packetstatus == ATAPI_STATUS_ERROR_2) /*Error callback with atastat already set - needed for the disc change stuff.*/
+ {
+ //pclog("Packet check status\n");
+ ide->atastat = ERR_STAT;
+ ide_irq_raise(ide);
+ }
return;
}
@@ -1176,14 +1730,978 @@ abort_cmd:
void ide_callback_pri()
{
+ idecallback[0] = 0;
callbackide(0);
}
void ide_callback_sec()
{
+ idecallback[1] = 0;
callbackide(1);
}
+/*ATAPI CD-ROM emulation*/
+
+struct
+{
+ int sensekey,asc,ascq;
+} atapi_sense;
+
+static uint32_t atapi_event_status(IDE *ide, uint8_t *buffer)
+{
+ uint8_t event_code, media_status = 0;
+
+ if (buffer[5])
+ {
+ media_status = MS_TRAY_OPEN;
+ atapi->stop();
+ }
+ else
+ {
+ media_status = MS_MEDIA_PRESENT;
+ }
+
+ event_code = MEC_NO_CHANGE;
+ if (media_status != MS_TRAY_OPEN)
+ {
+ if (!buffer[4])
+ {
+ event_code = MEC_NEW_MEDIA;
+ atapi->load();
+ }
+ else if (buffer[4]==2)
+ {
+ event_code = MEC_EJECT_REQUESTED;
+ atapi->eject();
+ }
+ }
+
+ buffer[4] = event_code;
+ buffer[5] = media_status;
+ buffer[6] = 0;
+ buffer[7] = 0;
+
+ return 8;
+}
+
+void atapi_cmd_error(IDE *ide, uint8_t sensekey, uint8_t asc)
+{
+ ide->error = (sensekey << 4);
+ ide->atastat = READY_STAT | ERR_STAT;
+ ide->secount = (ide->secount & ~7) | 3;
+ ide->packetstatus = 0x80;
+ idecallback[ide->board]=50*IDE_TIME;
+}
+
+uint8_t atapi_prev;
+int toctimes=0;
+
+void atapi_insert_cdrom()
+{
+ atapi_sense.sensekey=SENSE_UNIT_ATTENTION;
+ atapi_sense.asc=ASC_MEDIUM_MAY_HAVE_CHANGED;
+ atapi_sense.ascq=0;
+}
+
+void atapi_command_send_init(IDE *ide, uint8_t command, int req_length, int alloc_length)
+{
+ if (ide->cylinder == 0xffff)
+ ide->cylinder = 0xfffe;
+
+ if ((ide->cylinder & 1) && !(alloc_length <= ide->cylinder))
+ {
+ pclog("Odd byte count (0x%04x) to ATAPI command 0x%02x, using 0x%04x\n", ide->cylinder, command, ide->cylinder - 1);
+ ide->cylinder--;
+ }
+
+ if (alloc_length < 0)
+ fatal("Allocation length < 0\n");
+ if (alloc_length == 0)
+ alloc_length = ide->cylinder;
+
+ // Status: 0x80 (busy), 0x08 (drq), 0x01 (err)
+ // Interrupt: 0x02 (i_o), 0x01 (c_d)
+ /* No atastat setting: PCem actually emulates the callback cycle. */
+ ide->secount = 2;
+
+ // no bytes transferred yet
+ ide->pos = 0;
+
+ if ((ide->cylinder > req_length) || (ide->cylinder == 0))
+ ide->cylinder = req_length;
+ if (ide->cylinder > alloc_length)
+ ide->cylinder = alloc_length;
+
+ //pclog("atapi_command_send_init(ide, %02X, %04X, %04X)\n", command, req_length, alloc_length);
+ //pclog("IDE settings: Pos=%08X, Secount=%08X, Cylinder=%08X\n", ide->pos, ide->secount, ide->cylinder);
+}
+
+static void atapi_command_ready(int ide_board, int packlen)
+{
+ IDE *ide = &ide_drives[cur_ide[ide_board]];
+ ide->packetstatus = ATAPI_STATUS_REQ_SENSE;
+ idecallback[ide_board]=60*IDE_TIME;
+ ide->packlen=packlen;
+}
+
+static void atapi_sense_clear(int command, int ignore_ua)
+{
+ if ((atapi_sense.sensekey == SENSE_UNIT_ATTENTION) || ignore_ua)
+ {
+ atapi_prev=command;
+ atapi_sense.sensekey=0;
+ atapi_sense.asc=0;
+ atapi_sense.ascq=0;
+ }
+}
+
+int cd_status = CD_STATUS_EMPTY;
+int prev_status;
+
+static void atapicommand(int ide_board)
+{
+ IDE *ide = &ide_drives[cur_ide[ide_board]];
+ uint8_t *idebufferb = (uint8_t *) ide->buffer;
+ uint8_t rcdmode = 0;
+ int c;
+ int len;
+ int msf;
+ int pos=0;
+ unsigned char temp;
+ uint32_t size;
+ int is_error;
+ uint8_t page_code;
+ int max_len;
+ unsigned idx = 0;
+ unsigned size_idx;
+ unsigned preamble_len;
+ int toc_format;
+ int temp_command;
+ int alloc_length;
+ int completed;
+
+#ifndef RPCEMU_IDE
+ pclog("New ATAPI command %02X %i\n",idebufferb[0],ins);
+#endif
+// readflash=1;
+ msf=idebufferb[1]&2;
+ ide->cdlen=0;
+
+ is_error = 0;
+
+ if (atapi->medium_changed())
+ {
+ atapi_insert_cdrom();
+ }
+ /*If UNIT_ATTENTION is set, error out with NOT_READY.
+ VIDE-CDD.SYS will then issue a READ_TOC, which can pass through UNIT_ATTENTION and will clear sense.
+ NT 3.1 / AZTIDECD.SYS will then issue a REQUEST_SENSE, which can also pass through UNIT_ATTENTION but will clear sense AFTER sending it back.
+ In any case, if the command cannot pass through, set our state to errored.*/
+ if (!(atapi_cmd_table[idebufferb[0]] & ALLOW_UA) && atapi_sense.sensekey == SENSE_UNIT_ATTENTION)
+ {
+ atapi_cmd_error(ide, atapi_sense.sensekey, atapi_sense.asc);
+ is_error = 1;
+ }
+ /*Unless the command issued was a REQUEST_SENSE or TEST_UNIT_READY, clear sense.
+ This is important because both VIDE-CDD.SYS and NT 3.1 / AZTIDECD.SYS rely on this behaving VERY specifically.
+ VIDE-CDD.SYS will clear sense through READ_TOC, while NT 3.1 / AZTIDECD.SYS will issue a REQUEST_SENSE.*/
+ if ((idebufferb[0]!=GPCMD_REQUEST_SENSE) && (idebufferb[0]!=GPCMD_TEST_UNIT_READY))
+ {
+ /* GPCMD_TEST_UNIT_READY is NOT supposed to clear sense! */
+ atapi_sense_clear(idebufferb[0], 1);
+ }
+
+ /*If our state has been set to errored, clear it, and return.*/
+ if (is_error)
+ {
+ is_error = 0;
+ return;
+ }
+
+ if ((atapi_cmd_table[idebufferb[0]] & CHECK_READY) && !atapi->ready())
+ {
+ atapi_cmd_error(ide, SENSE_NOT_READY, ASC_MEDIUM_NOT_PRESENT);
+ atapi_sense.sensekey = SENSE_NOT_READY;
+ atapi_sense.asc = ASC_MEDIUM_NOT_PRESENT;
+ atapi_sense.ascq = 0;
+ return;
+ }
+
+ prev_status = cd_status;
+ cd_status = atapi->status();
+ if (((prev_status == CD_STATUS_PLAYING) || (prev_status == CD_STATUS_PAUSED)) && ((cd_status != CD_STATUS_PLAYING) && (cd_status != CD_STATUS_PAUSED)))
+ {
+ completed = 1;
+ }
+ else
+ {
+ completed = 0;
+ }
+
+ switch (idebufferb[0])
+ {
+ case GPCMD_TEST_UNIT_READY:
+ ide->packetstatus = ATAPI_STATUS_COMPLETE;
+ idecallback[ide_board]=50*IDE_TIME;
+ break;
+
+ case GPCMD_REQUEST_SENSE: /* Used by ROS 4+ */
+ alloc_length = idebufferb[4];
+ temp_command = idebufferb[0];
+ atapi_command_send_init(ide, temp_command, 18, alloc_length);
+
+ /*Will return 18 bytes of 0*/
+ memset(idebufferb,0,512);
+
+ idebufferb[0]=0x80|0x70;
+
+ if ((atapi_sense.sensekey > 0) || (cd_status < CD_STATUS_PLAYING))
+ {
+ if (completed)
+ {
+ idebufferb[2]=SENSE_ILLEGAL_REQUEST;
+ idebufferb[12]=ASC_AUDIO_PLAY_OPERATION;
+ idebufferb[13]=ASCQ_AUDIO_PLAY_OPERATION_COMPLETED;
+ }
+ else
+ {
+ idebufferb[2]=atapi_sense.sensekey;
+ idebufferb[12]=atapi_sense.asc;
+ idebufferb[13]=atapi_sense.ascq;
+ }
+ }
+ else
+ {
+ idebufferb[2]=SENSE_ILLEGAL_REQUEST;
+ idebufferb[12]=ASC_AUDIO_PLAY_OPERATION;
+ idebufferb[13]=(cd_status == CD_STATUS_PLAYING) ? ASCQ_AUDIO_PLAY_OPERATION_IN_PROGRESS : ASCQ_AUDIO_PLAY_OPERATION_PAUSED;
+ }
+
+ idebufferb[7]=10;
+
+ // pclog("REQUEST SENSE start\n");
+ atapi_command_ready(ide_board, 18);
+
+ /* Clear the sense stuff as per the spec. */
+ atapi_sense_clear(temp_command, 0);
+ break;
+
+ case GPCMD_SET_SPEED:
+ ide->packetstatus = ATAPI_STATUS_COMPLETE;
+ idecallback[ide_board]=50*IDE_TIME;
+ break;
+
+ case GPCMD_MECHANISM_STATUS: /*0xbd*/
+ alloc_length = (idebufferb[7]<<16)|(idebufferb[8]<<8)|idebufferb[9];
+
+ if (alloc_length == 0)
+ fatal("Zero allocation length to MECHANISM STATUS not impl.\n");
+
+ atapi_command_send_init(ide, idebufferb[0], 8, alloc_length);
+
+ idebufferb[0] = 0;
+ idebufferb[1] = 0;
+ idebufferb[2] = 0;
+ idebufferb[3] = 0;
+ idebufferb[4] = 0;
+ idebufferb[5] = 1;
+ idebufferb[6] = 0;
+ idebufferb[7] = 0;
+ // len = 8;
+
+ atapi_command_ready(ide_board, 8);
+ break;
+
+ case GPCMD_READ_TOC_PMA_ATIP:
+// pclog("Read TOC ready? %08X\n",ide);
+ toctimes++;
+// if (toctimes==2) output=3;
+// pclog("Read TOC %02X\n",idebufferb[9]);
+ toc_format = idebufferb[2] & 0xf;
+ if (toc_format == 0)
+ toc_format = (idebufferb[9]>>6) & 3;
+ switch (toc_format)
+ {
+ case 0: /*Normal*/
+ // pclog("ATAPI: READ TOC type requested: Normal\n");
+ len=idebufferb[8]+(idebufferb[7]<<8);
+ len=atapi->readtoc(idebufferb,idebufferb[6],msf,len,0);
+ break;
+ case 1: /*Multi session*/
+ // pclog("ATAPI: READ TOC type requested: Multi-session\n");
+ len=idebufferb[8]+(idebufferb[7]<<8);
+ len=atapi->readtoc_session(idebufferb,msf,len);
+ idebufferb[0]=0; idebufferb[1]=0xA;
+ break;
+ case 2: /*Raw*/
+ // pclog("ATAPI: READ TOC type requested: Raw TOC\n");
+ len=idebufferb[8]+(idebufferb[7]<<8);
+ len=atapi->readtoc_raw(idebufferb,len);
+ break;
+ default:
+ // pclog("ATAPI: Unknown READ TOC type requested: %i\n", (idebufferb[9]>>6));
+ ide->atastat = READY_STAT | ERR_STAT; /*CHECK CONDITION*/
+ ide->error = (SENSE_ILLEGAL_REQUEST << 4) | ABRT_ERR;
+ if (atapi_sense.sensekey == SENSE_UNIT_ATTENTION)
+ ide->error |= MCR_ERR;
+ ide->packetstatus = ATAPI_STATUS_ERROR;
+ idecallback[ide_board]=50*IDE_TIME;
+ return;
+/* pclog("Bad read TOC format\n");
+ pclog("Packet data :\n");
+ for (c=0;c<12;c++)
+ pclog("%02X ",idebufferb[c]);
+ pclog("\n");
+ exit(-1);*/
+ }
+// pclog("ATAPI buffer len %i\n",len);
+ ide->packetstatus = ATAPI_STATUS_DATA;
+ ide->cylinder=len;
+ ide->secount=2;
+ ide->pos=0;
+ idecallback[ide_board]=60*IDE_TIME;
+ ide->packlen=len;
+ return;
+
+ case GPCMD_READ_CD:
+// pclog("Read CD : start LBA %02X%02X%02X%02X Length %02X%02X%02X Flags %02X\n",idebufferb[2],idebufferb[3],idebufferb[4],idebufferb[5],idebufferb[6],idebufferb[7],idebufferb[8],idebufferb[9]);
+ rcdmode = idebufferb[9] & 0xF8;
+ if ((rcdmode != 0x10) && (rcdmode != 0xF8))
+ {
+ ide->atastat = READY_STAT | ERR_STAT; /*CHECK CONDITION*/
+ ide->error = (SENSE_ILLEGAL_REQUEST << 4) | ABRT_ERR;
+ if (atapi_sense.sensekey == SENSE_UNIT_ATTENTION)
+ ide->error |= MCR_ERR;
+ atapi_sense.asc = ASC_ILLEGAL_OPCODE;
+ ide->packetstatus = ATAPI_STATUS_ERROR;
+ idecallback[ide_board]=50*IDE_TIME;
+ break;
+// pclog("Bad flags bits %02X\n",idebufferb[9]);
+// exit(-1);
+ }
+/* if (idebufferb[6] || idebufferb[7] || (idebufferb[8]!=1))
+ {
+ pclog("More than 1 sector!\n");
+ exit(-1);
+ }*/
+ ide->cdlen=(idebufferb[6]<<16)|(idebufferb[7]<<8)|idebufferb[8];
+ ide->cdpos=(idebufferb[2]<<24)|(idebufferb[3]<<16)|(idebufferb[4]<<8)|idebufferb[5];
+// pclog("Read at %08X %08X\n",ide.cdpos,ide.cdpos*2048);
+ if (rcdmode == 0x10)
+ atapi->readsector(idebufferb,ide->cdpos);
+ else
+ atapi->readsector_raw(idebufferb,ide->cdpos);
+#ifndef RPCEMU_IDE
+ readflash=1;
+#endif
+ readcdmode = (rcdmode == 0xF8);
+ ide->cdpos++;
+ ide->cdlen--;
+ if (ide->cdlen >= 0)
+ ide->packetstatus = ATAPI_STATUS_READCD;
+ else
+ ide->packetstatus = ATAPI_STATUS_DATA;
+ ide->cylinder=(idebufferb[9] == 0x10) ? 2048 : 2352;
+ ide->secount=2;
+ ide->pos=0;
+ idecallback[ide_board]=60*IDE_TIME;
+ ide->packlen=(idebufferb[9] == 0x10) ? 2048 : 2352;
+ return;
+
+ case GPCMD_READ_6:
+ case GPCMD_READ_10:
+ case GPCMD_READ_12:
+// pclog("Read 10 : start LBA %02X%02X%02X%02X Length %02X%02X%02X Flags %02X\n",idebufferb[2],idebufferb[3],idebufferb[4],idebufferb[5],idebufferb[6],idebufferb[7],idebufferb[8],idebufferb[9]);
+
+ readcdmode = 0;
+
+ if (idebufferb[0] == GPCMD_READ_6)
+ {
+ ide->cdlen=idebufferb[4];
+ ide->cdpos=((((uint32_t) idebufferb[1]) & 0x1f)<<16)|(((uint32_t) idebufferb[2])<<8)|((uint32_t) idebufferb[3]);
+ }
+ else if (idebufferb[0] == GPCMD_READ_10)
+ {
+ ide->cdlen=(idebufferb[7]<<8)|idebufferb[8];
+ ide->cdpos=(idebufferb[2]<<24)|(idebufferb[3]<<16)|(idebufferb[4]<<8)|idebufferb[5];
+ }
+ else
+ {
+ ide->cdlen=(((uint32_t) idebufferb[6])<<24)|(((uint32_t) idebufferb[7])<<16)|(((uint32_t) idebufferb[8])<<8)|((uint32_t) idebufferb[9]);
+ ide->cdpos=(((uint32_t) idebufferb[2])<<24)|(((uint32_t) idebufferb[3])<<16)|(((uint32_t) idebufferb[4])<<8)|((uint32_t) idebufferb[5]);
+ }
+ if (!ide->cdlen)
+ {
+// pclog("All done - callback set\n");
+ ide->packetstatus = ATAPI_STATUS_COMPLETE;
+ idecallback[ide_board]=20*IDE_TIME;
+ break;
+ }
+
+ if (atapi->readsector(idebufferb,ide->cdpos))
+ {
+// pclog("Read sector failed\n");
+ atapi_sense.sensekey = SENSE_ILLEGAL_REQUEST;
+ atapi_sense.asc = ASC_LBA_OUT_OF_RANGE;
+ atapi_sense.ascq = 0;
+
+ ide->atastat = READY_STAT | ERR_STAT; /*CHECK CONDITION*/
+ ide->error = (SENSE_ILLEGAL_REQUEST << 4) | ABRT_ERR;
+ if (atapi_sense.sensekey == SENSE_UNIT_ATTENTION)
+ {
+ ide->error |= MCR_ERR;
+ }
+ atapi_sense.asc = ASC_ILLEGAL_OPCODE;
+ ide->packetstatus = ATAPI_STATUS_ERROR;
+ idecallback[ide_board]=50*IDE_TIME;
+ break;
+ }
+#ifndef RPCEMU_IDE
+ readflash=1;
+#endif
+ ide->cdpos++;
+ ide->cdlen--;
+ if (ide->cdlen >= 0)
+ ide->packetstatus = ATAPI_STATUS_READCD;
+ else
+ ide->packetstatus = ATAPI_STATUS_DATA;
+ ide->cylinder=2048;
+ ide->secount=2;
+ ide->pos=0;
+ idecallback[ide_board]=60*IDE_TIME;
+ ide->packlen=2048;
+ return;
+
+ case GPCMD_READ_HEADER:
+ if (msf)
+ {
+ ide->atastat = READY_STAT | ERR_STAT; /*CHECK CONDITION*/
+ ide->error = (SENSE_ILLEGAL_REQUEST << 4) | ABRT_ERR;
+ if (atapi_sense.sensekey == SENSE_UNIT_ATTENTION)
+ {
+ ide->error |= MCR_ERR;
+ }
+ atapi_sense.asc = ASC_ILLEGAL_OPCODE;
+ ide->packetstatus = ATAPI_STATUS_ERROR;
+ idecallback[ide_board]=50*IDE_TIME;
+ break;
+// pclog("Read Header MSF!\n");
+// exit(-1);
+ }
+ for (c=0;c<4;c++) idebufferb[c+4]=idebufferb[c+2];
+ idebufferb[0]=1; /*2048 bytes user data*/
+ idebufferb[1]=idebufferb[2]=idebufferb[3]=0;
+
+ ide->packetstatus = ATAPI_STATUS_DATA;
+ ide->cylinder=8;
+ ide->secount=2;
+ ide->pos=0;
+ idecallback[ide_board]=60*IDE_TIME;
+ ide->packlen=8;
+ return;
+
+ case GPCMD_MODE_SENSE_6:
+ case GPCMD_MODE_SENSE_10:
+ temp_command = idebufferb[0];
+
+ if (temp_command == GPCMD_MODE_SENSE_6)
+ len=idebufferb[4];
+ else
+ len=(idebufferb[8]|(idebufferb[7]<<8));
+
+ temp=idebufferb[2] & 0x3F;
+
+ memset(idebufferb, 0, len);
+ alloc_length = len;
+ // for (c=0;catastat = READY_STAT | ERR_STAT; /*CHECK CONDITION*/
+ ide->error = (SENSE_ILLEGAL_REQUEST << 4) | ABRT_ERR;
+ idecallback[ide_board]=50*IDE_TIME;
+ atapi_cmd_error(ide, atapi_sense.sensekey, atapi_sense.asc);
+ ide->atastat = 0x53;
+ ide->packetstatus = ATAPI_STATUS_ERROR;
+ atapi_sense.sensekey = SENSE_ILLEGAL_REQUEST;
+ atapi_sense.asc = ASC_INV_FIELD_IN_CMD_PACKET;
+ atapi_sense.ascq = 0;
+ return;
+ }
+
+ if (temp_command == GPCMD_MODE_SENSE_6)
+ {
+ len = ide_atapi_mode_sense(ide,4,temp);
+ idebufferb[0] = len - 1;
+ idebufferb[1]=3; /*120mm data CD-ROM*/
+ }
+ else
+ {
+ len = ide_atapi_mode_sense(ide,8,temp);
+ idebufferb[0]=(len - 2)>>8;
+ idebufferb[1]=(len - 2)&255;
+ idebufferb[2]=3; /*120mm data CD-ROM*/
+ }
+
+ atapi_command_send_init(ide, temp_command, len, alloc_length);
+
+ atapi_command_ready(ide_board, len);
+ return;
+
+ case GPCMD_MODE_SELECT_6:
+ case GPCMD_MODE_SELECT_10:
+ if (ide->packetstatus == ATAPI_STATUS_PACKET_RECEIVED)
+ {
+ ide->atastat = READY_STAT;
+ ide->secount=3;
+// pclog("Recieve data packet!\n");
+ ide_irq_raise(ide);
+ ide->packetstatus=0xFF;
+ ide->pos=0;
+ // pclog("Length - %02X%02X\n",idebufferb[0],idebufferb[1]);
+// pclog("Page %02X length %02X\n",idebufferb[8],idebufferb[9]);
+ }
+ else
+ {
+ if (idebufferb[0] == GPCMD_MODE_SELECT_6)
+ {
+ len=idebufferb[4];
+ prefix_len = 6;
+ }
+ else
+ {
+ len=(idebufferb[7]<<8)|idebufferb[8];
+ prefix_len = 10;
+ }
+ page_current = idebufferb[2];
+ if (page_flags[page_current] & PAGE_CHANGEABLE)
+ page_flags[GPMODE_CDROM_AUDIO_PAGE] |= PAGE_CHANGED;
+ ide->packetstatus = ATAPI_STATUS_PACKET_REQ;
+ ide->cylinder=len;
+ ide->secount=0;
+ ide->pos=0;
+ idecallback[ide_board]=60*IDE_TIME;
+ ide->packlen=len;
+/* pclog("Waiting for ARM to send packet %i\n",len);
+ pclog("Packet data :\n");
+ for (c=0;c<12;c++)
+ pclog("%02X ",idebufferb[c]);
+ pclog("\n");*/
+ }
+ return;
+
+ case GPCMD_GET_EVENT_STATUS_NOTIFICATION: /*0x4a*/
+ temp_command = idebufferb[0];
+ alloc_length = (idebufferb[7]<<16)|(idebufferb[8]<<8)|idebufferb[9];
+
+ {
+ struct __attribute__((__packed__))
+ {
+ uint8_t opcode;
+ uint8_t polled;
+ uint8_t reserved2[2];
+ uint8_t class;
+ uint8_t reserved3[2];
+ uint16_t len;
+ uint8_t control;
+ } *gesn_cdb;
+
+ struct __attribute__((__packed__))
+ {
+ uint16_t len;
+ uint8_t notification_class;
+ uint8_t supported_events;
+ } *gesn_event_header;
+ unsigned int used_len;
+
+ gesn_cdb = (void *)idebufferb;
+ gesn_event_header = (void *)idebufferb;
+
+ /* It is fine by the MMC spec to not support async mode operations */
+ if (!(gesn_cdb->polled & 0x01))
+ { /* asynchronous mode */
+ /* Only pollign is supported, asynchronous mode is not. */
+ ide->error = (SENSE_ILLEGAL_REQUEST << 4) | ABRT_ERR;
+ idecallback[ide_board]=50*IDE_TIME;
+ atapi_cmd_error(ide, atapi_sense.sensekey, atapi_sense.asc);
+ ide->atastat = 0x53;
+ ide->packetstatus=0x80;
+ atapi_sense.sensekey = SENSE_ILLEGAL_REQUEST;
+ atapi_sense.asc = ASC_INV_FIELD_IN_CMD_PACKET;
+ atapi_sense.ascq = 0;
+ return;
+ }
+
+ /* polling mode operation */
+
+ /*
+ * These are the supported events.
+ *
+ * We currently only support requests of the 'media' type.
+ * Notification class requests and supported event classes are bitmasks,
+ * but they are built from the same values as the "notification class"
+ * field.
+ */
+ gesn_event_header->supported_events = 1 << GESN_MEDIA;
+
+ /*
+ * We use |= below to set the class field; other bits in this byte
+ * are reserved now but this is useful to do if we have to use the
+ * reserved fields later.
+ */
+ gesn_event_header->notification_class = 0;
+
+ /*
+ * Responses to requests are to be based on request priority. The
+ * notification_class_request_type enum above specifies the
+ * priority: upper elements are higher prio than lower ones.
+ */
+ if (gesn_cdb->class & (1 << GESN_MEDIA))
+ {
+ gesn_event_header->notification_class |= GESN_MEDIA;
+ used_len = atapi_event_status(ide, idebufferb);
+ }
+ else
+ {
+ gesn_event_header->notification_class = 0x80; /* No event available */
+ used_len = sizeof(*gesn_event_header);
+ }
+ len = used_len;
+ gesn_event_header->len = used_len - sizeof(*gesn_event_header);
+ }
+
+ atapi_command_send_init(ide, temp_command, len, alloc_length);
+
+ atapi_command_ready(ide_board, len);
+ break;
+
+ case GPCMD_READ_DISC_INFORMATION:
+ idebufferb[1] = 32;
+ idebufferb[2] = 0xe; /* last session complete, disc finalized */
+ idebufferb[3] = 1; /* first track on disc */
+ idebufferb[4] = 1; /* # of sessions */
+ idebufferb[5] = 1; /* first track of last session */
+ idebufferb[6] = 1; /* last track of last session */
+ idebufferb[7] = 0x20; /* unrestricted use */
+ idebufferb[8] = 0x00; /* CD-ROM */
+
+ len=34;
+ ide->packetstatus = ATAPI_STATUS_DATA;
+ ide->cylinder=len;
+ ide->secount=2;
+ ide->pos=0;
+ idecallback[ide_board]=60*IDE_TIME;
+ ide->packlen=len;
+ break;
+
+ case GPCMD_PLAY_AUDIO_10:
+ case GPCMD_PLAY_AUDIO_12:
+ case GPCMD_PLAY_AUDIO_MSF:
+ /*This is apparently deprecated in the ATAPI spec, and apparently
+ has been since 1995 (!). Hence I'm having to guess most of it*/
+ if (idebufferb[0] == GPCMD_PLAY_AUDIO_10)
+ {
+ pos=(idebufferb[2]<<24)|(idebufferb[3]<<16)|(idebufferb[4]<<8)|idebufferb[5];
+ len=(idebufferb[7]<<8)|idebufferb[8];
+ }
+ else if (idebufferb[0] == GPCMD_PLAY_AUDIO_MSF)
+ {
+ pos=(idebufferb[3]<<16)|(idebufferb[4]<<8)|idebufferb[5];
+ len=(idebufferb[6]<<16)|(idebufferb[7]<<8)|idebufferb[8];
+ }
+ else
+ {
+ pos=(idebufferb[3]<<16)|(idebufferb[4]<<8)|idebufferb[5];
+ len=(idebufferb[7]<<16)|(idebufferb[8]<<8)|idebufferb[9];
+ }
+
+
+ if ((cdrom_drive < 1) || (cdrom_drive == CDROM_ISO) || (cd_status <= CD_STATUS_DATA_ONLY) ||
+ !atapi->is_track_audio(pos, (idebufferb[0] == GPCMD_PLAY_AUDIO_MSF) ? 1 : 0))
+ {
+ ide->atastat = READY_STAT | ERR_STAT; /*CHECK CONDITION*/
+ ide->error = (SENSE_ILLEGAL_REQUEST << 4) | ABRT_ERR;
+ atapi_sense.sensekey = SENSE_ILLEGAL_REQUEST;
+ atapi_sense.asc = ASC_ILLEGAL_MODE_FOR_THIS_TRACK;
+ atapi_sense.ascq = 0;
+ ide->packetstatus = ATAPI_STATUS_ERROR;
+ idecallback[ide_board]=50*IDE_TIME;
+ atapi_cmd_error(ide, atapi_sense.sensekey, atapi_sense.asc);
+ break;
+ }
+
+ atapi->playaudio(pos, len, (idebufferb[0] == GPCMD_PLAY_AUDIO_MSF) ? 1 : 0);
+ ide->packetstatus = ATAPI_STATUS_COMPLETE;
+ idecallback[ide_board]=50*IDE_TIME;
+ break;
+
+ case GPCMD_READ_SUBCHANNEL:
+ temp=idebufferb[2]&0x40;
+ if (idebufferb[3]!=1)
+ {
+// pclog("Read subchannel check condition %02X\n",idebufferb[3]);
+ ide->atastat = READY_STAT | ERR_STAT; /*CHECK CONDITION*/
+ ide->error = (SENSE_ILLEGAL_REQUEST << 4) | ABRT_ERR;
+ if (atapi_sense.sensekey == SENSE_UNIT_ATTENTION)
+ ide->error |= MCR_ERR;
+ // ide->discchanged=1; /* Fixes some bugs with NT 3.1. */
+ atapi_sense.asc = ASC_ILLEGAL_OPCODE;
+ ide->packetstatus = ATAPI_STATUS_ERROR;
+ idecallback[ide_board]=50*IDE_TIME;
+ break;
+/* pclog("Bad read subchannel!\n");
+ pclog("Packet data :\n");
+ for (c=0;c<12;c++)
+ pclog("%02X\n",idebufferb[c]);
+ dumpregs();
+ exit(-1);*/
+ }
+ pos=0;
+ idebufferb[pos++]=0;
+ idebufferb[pos++]=0; /*Audio status*/
+ idebufferb[pos++]=0; idebufferb[pos++]=0; /*Subchannel length*/
+ idebufferb[pos++]=1; /*Format code*/
+ idebufferb[1]=atapi->getcurrentsubchannel(&idebufferb[5],msf);
+// pclog("Read subchannel complete - audio status %02X\n",idebufferb[1]);
+ len=11+5;
+ if (!temp) len=4;
+ ide->packetstatus = ATAPI_STATUS_DATA;
+ ide->cylinder=len;
+ ide->secount=2;
+ ide->pos=0;
+ idecallback[ide_board]=1000*IDE_TIME;
+ ide->packlen=len;
+ break;
+
+ case GPCMD_START_STOP_UNIT:
+ if (idebufferb[4]!=2 && idebufferb[4]!=3 && idebufferb[4])
+ {
+ ide->atastat = READY_STAT | ERR_STAT; /*CHECK CONDITION*/
+ ide->error = (SENSE_ILLEGAL_REQUEST << 4) | ABRT_ERR;
+ if (atapi_sense.sensekey == SENSE_UNIT_ATTENTION)
+ ide->error |= MCR_ERR;
+ atapi_sense.asc = ASC_ILLEGAL_OPCODE;
+ ide->packetstatus = ATAPI_STATUS_ERROR;
+ idecallback[ide_board]=50*IDE_TIME;
+ break;
+/* pclog("Bad start/stop unit command\n");
+ pclog("Packet data :\n");
+ for (c=0;c<12;c++)
+ pclog("%02X\n",idebufferb[c]);
+ exit(-1);*/
+ }
+ if (!idebufferb[4]) atapi->stop();
+ else if (idebufferb[4]==2) atapi->eject();
+ else atapi->load();
+ ide->packetstatus = ATAPI_STATUS_COMPLETE;
+ idecallback[ide_board]=50*IDE_TIME;
+ break;
+
+ case GPCMD_INQUIRY:
+ page_code = idebufferb[2];
+ max_len = idebufferb[4];
+ alloc_length = max_len;
+ temp_command = idebufferb[0];
+
+ if (idebufferb[1] & 1)
+ {
+ preamble_len = 4;
+ size_idx = 3;
+
+ idebufferb[idx++] = 05;
+ idebufferb[idx++] = page_code;
+ idebufferb[idx++] = 0;
+
+ idx++;
+
+ switch (page_code)
+ {
+ case 0x00:
+ idebufferb[idx++] = 0x00;
+ idebufferb[idx++] = 0x83;
+ break;
+ case 0x83:
+ if (idx + 24 > max_len)
+ {
+ atapi_cmd_error(ide, SENSE_ILLEGAL_REQUEST, ASC_DATA_PHASE_ERROR);
+ atapi_sense.sensekey = SENSE_ILLEGAL_REQUEST;
+ atapi_sense.asc = ASC_DATA_PHASE_ERROR;
+ return;
+ }
+ idebufferb[idx++] = 0x02;
+ idebufferb[idx++] = 0x00;
+ idebufferb[idx++] = 0x00;
+ idebufferb[idx++] = 20;
+ ide_padstr8(idebufferb + idx, 20, "53R141"); /* Serial */
+ idx += 20;
+
+ if (idx + 72 > max_len)
+ {
+ goto atapi_out;
+ }
+ idebufferb[idx++] = 0x02;
+ idebufferb[idx++] = 0x01;
+ idebufferb[idx++] = 0x00;
+ idebufferb[idx++] = 68;
+ ide_padstr8(idebufferb + idx, 8, "PCem"); /* Vendor */
+ idx += 8;
+ ide_padstr8(idebufferb + idx, 40, "PCemCD v1.0"); /* Product */
+ idx += 40;
+ ide_padstr8(idebufferb + idx, 20, "53R141"); /* Product */
+ idx += 20;
+
+ break;
+ default:
+ atapi_cmd_error(ide, SENSE_ILLEGAL_REQUEST, ASC_INV_FIELD_IN_CMD_PACKET);
+ atapi_sense.sensekey = SENSE_ILLEGAL_REQUEST;
+ atapi_sense.asc = ASC_INV_FIELD_IN_CMD_PACKET;
+ return;
+ }
+ }
+ else
+ {
+ preamble_len = 5;
+ size_idx = 4;
+
+ idebufferb[0] = 5; /*CD-ROM*/
+ idebufferb[1] = 0x80; /*Removable*/
+ idebufferb[2] = 0;
+ idebufferb[3] = 0x21;
+ idebufferb[4] = 31;
+ idebufferb[5] = 0;
+ idebufferb[6] = 0;
+ idebufferb[7] = 0;
+#ifdef RPCEMU_IDE
+ ide_padstr8(idebufferb + 8, 8, "RPCemu"); /* Vendor */
+ ide_padstr8(idebufferb + 16, 16, "RPCemuCD"); /* Product */
+#else
+ ide_padstr8(idebufferb + 8, 8, "PCem"); /* Vendor */
+ ide_padstr8(idebufferb + 16, 16, "PCemCD"); /* Product */
+#endif
+ ide_padstr8(idebufferb + 32, 4, "1.0"); /* Revision */
+
+ idx = 36;
+ }
+
+atapi_out:
+ idebufferb[size_idx] = idx - preamble_len;
+ len=idx;
+
+ atapi_command_send_init(ide, temp_command, len, alloc_length);
+
+ atapi_command_ready(ide_board, len);
+ break;
+
+ case GPCMD_PREVENT_REMOVAL:
+ ide->packetstatus = ATAPI_STATUS_COMPLETE;
+ idecallback[ide_board]=50*IDE_TIME;
+ break;
+
+ case GPCMD_PAUSE_RESUME:
+ if (idebufferb[8]&1) atapi->resume();
+ else atapi->pause();
+ ide->packetstatus = ATAPI_STATUS_COMPLETE;
+ idecallback[ide_board]=50*IDE_TIME;
+ break;
+
+ case GPCMD_SEEK:
+ pos=(idebufferb[3]<<16)|(idebufferb[4]<<8)|idebufferb[5];
+ atapi->seek(pos);
+ ide->packetstatus = ATAPI_STATUS_COMPLETE;
+ idecallback[ide_board]=50*IDE_TIME;
+ break;
+
+ case GPCMD_READ_CDROM_CAPACITY:
+ atapi_command_send_init(ide, 0, 8, 8);
+ size = atapi->size();
+ idebufferb[0] = (size >> 24) & 0xff;
+ idebufferb[1] = (size >> 16) & 0xff;
+ idebufferb[2] = (size >> 8) & 0xff;
+ idebufferb[3] = size & 0xff;
+ idebufferb[4] = (2048 >> 24) & 0xff;
+ idebufferb[5] = (2048 >> 16) & 0xff;
+ idebufferb[6] = (2048 >> 8) & 0xff;
+ idebufferb[7] = 2048 & 0xff;
+ len=8;
+ atapi_command_ready(ide_board, len);
+ break;
+
+ case GPCMD_SEND_DVD_STRUCTURE:
+ default:
+ ide->atastat = READY_STAT | ERR_STAT; /*CHECK CONDITION*/
+ ide->error = (SENSE_ILLEGAL_REQUEST << 4) | ABRT_ERR;
+ if (atapi_sense.sensekey == SENSE_UNIT_ATTENTION)
+ ide->error |= MCR_ERR;
+ atapi_sense.sensekey = SENSE_ILLEGAL_REQUEST;
+ atapi_sense.asc = ASC_ILLEGAL_OPCODE;
+ ide->packetstatus = ATAPI_STATUS_ERROR;
+ idecallback[ide_board]=50*IDE_TIME;
+ break;
+
+ case GPCMD_STOP_PLAY_SCAN:
+ atapi->stop();
+ ide->packetstatus = ATAPI_STATUS_COMPLETE;
+ idecallback[ide_board]=50*IDE_TIME;
+ break;
+/* default:
+ pclog("Bad ATAPI command %02X\n",idebufferb[0]);
+ pclog("Packet data :\n");
+ for (c=0;c<12;c++)
+ pclog("%02X\n",idebufferb[c]);
+ exit(-1);*/
+ }
+}
+
+static void callnonreadcd(IDE *ide) /* Callabck for non-Read CD commands */
+{
+ ide_irq_lower(ide);
+ if (ide->pos >= ide->packlen)
+ {
+ // pclog("Command finished, setting callback\n");
+ ide->packetstatus = ATAPI_STATUS_COMPLETE;
+ idecallback[ide->board]=20*IDE_TIME;
+ }
+ else
+ {
+ // pclog("Command not finished, keep sending data\n");
+ ide->atastat = BUSY_STAT;
+ ide->packetstatus = ATAPI_STATUS_REQ_SENSE;
+ ide->cylinder=2;
+ ide->secount=2;
+ idecallback[ide->board]=60*IDE_TIME;
+ }
+}
+
+static void callreadcd(IDE *ide)
+{
+ ide_irq_lower(ide);
+ if (ide->cdlen<=0)
+ {
+// pclog("All done - callback set\n");
+ ide->packetstatus = ATAPI_STATUS_COMPLETE;
+ idecallback[ide->board]=20*IDE_TIME;
+ ide->atastat = BUSY_STAT;
+ return;
+ }
+// pclog("Continue readcd! %i blocks left\n",ide->cdlen);
+ ide->atastat = BUSY_STAT;
+
+ if (readcdmode)
+ atapi->readsector_raw((uint8_t *) ide->buffer, ide->cdpos);
+ else
+ atapi->readsector((uint8_t *) ide->buffer, ide->cdpos);
+#ifndef RPCEMU_IDE
+ readflash=1;
+#endif
+ ide->cdpos++;
+ ide->cdlen--;
+ ide->packetstatus = ATAPI_STATUS_READCD;
+ ide->cylinder=readcdmode ? 2352 : 2048;
+ ide->secount=2;
+ ide->pos=0;
+ idecallback[ide->board]=60*IDE_TIME;
+ ide->packlen=readcdmode ? 2352 : 2048;
+}
+
void ide_write_pri(uint16_t addr, uint8_t val, void *priv)
@@ -1260,69 +2778,19 @@ void ide_sec_disable()
io_removehandler(0x0376, 0x0001, ide_read_sec, NULL, NULL, ide_write_sec, NULL, NULL , NULL);
}
-static void *ide_init()
+void ide_init()
{
ide_pri_enable();
ide_sec_enable();
+ ide_bus_master_read_sector = ide_bus_master_write_sector = NULL;
- timer_add(&ide_timer[0], ide_callback_pri, NULL, 0);
- timer_add(&ide_timer[1], ide_callback_sec, NULL, 0);
-
- return (void *)-1;
+ timer_add(ide_callback_pri, &idecallback[0], &idecallback[0], NULL);
+ timer_add(ide_callback_sec, &idecallback[1], &idecallback[1], NULL);
}
-static void ide_close(void *p)
+void ide_set_bus_master(int (*read_sector)(int channel, uint8_t *data), int (*write_sector)(int channel, uint8_t *data), void (*set_irq)(int channel))
{
- int c;
-
- for (c = 0; c < 4; c++)
- {
- ide_drives[c].type = IDE_NONE;
- hdd_close(&ide_drives[c].hdd_file);
- }
-}
-
-void ide_set_bus_master(int (*read_data)(int channel, uint8_t *data, int size, void *p), int (*write_data)(int channel, uint8_t *data, int size, void *p), void (*set_irq)(int channel, void *p), void *p)
-{
- ide_bus_master_read_data = read_data;
- ide_bus_master_write_data = write_data;
+ ide_bus_master_read_sector = read_sector;
+ ide_bus_master_write_sector = write_sector;
ide_bus_master_set_irq = set_irq;
- ide_bus_master_p = p;
}
-
-void ide_reset_devices()
-{
- if (ide_drives[0].type != IDE_NONE || ide_drives[1].type != IDE_NONE)
- {
- timer_set_delay_u64(&ide_timer[0], 500*IDE_TIME);
- ide_drives[0].reset = ide_drives[1].reset = 1;
- ide_drives[0].atastat = ide_drives[1].atastat = BUSY_STAT;
- if (ide_drives[0].type != IDE_NONE)
- cur_ide[0] = 0;
- else
- cur_ide[0] = 1;
- }
- if (ide_drives[2].type != IDE_NONE || ide_drives[3].type != IDE_NONE)
- {
- timer_set_delay_u64(&ide_timer[1], 500*IDE_TIME);
- ide_drives[2].reset = ide_drives[3].reset = 1;
- ide_drives[2].atastat = ide_drives[3].atastat = BUSY_STAT;
- if (ide_drives[2].type != IDE_NONE)
- cur_ide[1] = 2;
- else
- cur_ide[1] = 3;
- }
-}
-
-device_t ide_device =
-{
- "Standard IDE",
- DEVICE_AT,
- ide_init,
- ide_close,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL
-};
diff --git a/src/ide.h b/src/ide.h
index 2ce681a..ae1ab63 100644
--- a/src/ide.h
+++ b/src/ide.h
@@ -1,9 +1,6 @@
#ifndef __IDE__
#define __IDE__
-#include "device.h"
-#include "timer.h"
-
struct IDE;
extern void writeide(int ide_board, uint16_t addr, uint8_t val);
@@ -12,54 +9,53 @@ extern uint8_t readide(int ide_board, uint16_t addr);
extern uint16_t readidew(int ide_board);
extern void callbackide(int ide_board);
extern void resetide(void);
+extern void ide_init();
extern void ide_pri_enable();
extern void ide_sec_enable();
extern void ide_pri_disable();
extern void ide_sec_disable();
-extern void ide_set_bus_master(int (*read_data)(int channel, uint8_t *data, int size, void *p), int (*write_data)(int channel, uint8_t *data, int size, void *p), void (*set_irq)(int channel, void *p), void *p);
-void ide_irq_raise(struct IDE *ide);
-void ide_reset_devices();
+extern void ide_set_bus_master(int (*read_sector)(int channel, uint8_t *data), int (*write_sector)(int channel, uint8_t *data), void (*set_irq)(int channel));
-extern int (*ide_bus_master_read_data)(int channel, uint8_t *data, int size, void *p);
-extern int (*ide_bus_master_write_data)(int channel, uint8_t *data, int size, void *p);
-extern void (*ide_bus_master_set_irq)(int channel, void *p);
-extern void *ide_bus_master_p;
+/*ATAPI stuff*/
+typedef struct ATAPI
+{
+ int (*ready)(void);
+ int (*medium_changed)(void);
+ int (*readtoc)(uint8_t *b, uint8_t starttrack, int msf, int maxlen, int single);
+ int (*readtoc_session)(uint8_t *b, int msf, int maxlen);
+ int (*readtoc_raw)(uint8_t *b, int maxlen);
+ uint8_t (*getcurrentsubchannel)(uint8_t *b, int msf);
+ int (*readsector)(uint8_t *b, int sector);
+ void (*readsector_raw)(uint8_t *b, int sector);
+ void (*playaudio)(uint32_t pos, uint32_t len, int ismsf);
+ void (*seek)(uint32_t pos);
+ void (*load)(void);
+ void (*eject)(void);
+ void (*pause)(void);
+ void (*resume)(void);
+ uint32_t (*size)(void);
+ int (*status)(void);
+ int (*is_track_audio)(uint32_t pos, int ismsf);
+ void (*stop)(void);
+ void (*exit)(void);
+} ATAPI;
-#include "ide_atapi.h"
+extern ATAPI *atapi;
+
+void atapi_discchanged();
+void atapi_insert_cdrom();
extern int ideboard;
-extern pc_timer_t ide_timer[2];
+extern int idecallback[2];
-extern char ide_fn[7][512];
+extern char ide_fn[4][512];
-extern int cdrom_channel, zip_channel;
+extern int cdrom_channel;
uint32_t atapi_get_cd_channel(int channel);
uint32_t atapi_get_cd_volume(int channel);
-#define CDROM_IMAGE 200
+#define CDROM_ISO 200
-extern device_t ide_device;
-
-/* Bits of 'atastat' */
-#define ERR_STAT 0x01
-#define DRQ_STAT 0x08 /* Data request */
-#define DSC_STAT 0x10
-#define SERVICE_STAT 0x10
-#define READY_STAT 0x40
-#define BUSY_STAT 0x80
-
-/* Bits of 'error' */
-#define ABRT_ERR 0x04 /* Command aborted */
-#define MCR_ERR 0x08 /* Media change request */
-
-#define FEATURE_SET_TRANSFER_MODE 0x03
-#define FEATURE_ENABLE_IRQ_OVERLAPPED 0x5d
-#define FEATURE_ENABLE_IRQ_SERVICE 0x5e
-#define FEATURE_DISABLE_REVERT 0x66
-#define FEATURE_ENABLE_REVERT 0xcc
-#define FEATURE_DISABLE_IRQ_OVERLAPPED 0xdd
-#define FEATURE_DISABLE_IRQ_SERVICE 0xde
-
#endif //__IDE__
diff --git a/src/ide_atapi.c b/src/ide_atapi.c
deleted file mode 100644
index 45586e7..0000000
--- a/src/ide_atapi.c
+++ /dev/null
@@ -1,578 +0,0 @@
-#include "ibm.h"
-#include "ide.h"
-#include "ide_atapi.h"
-#include "scsi.h"
-#include "timer.h"
-
-#define IDE_TIME (100 * TIMER_USEC)
-
-#define ATAPI_STATE_IDLE 0
-#define ATAPI_STATE_COMMAND 1
-#define ATAPI_STATE_GOT_COMMAND 2
-#define ATAPI_STATE_NEXT_PHASE 3
-#define ATAPI_STATE_READ_STATUS 4
-#define ATAPI_STATE_READ_MESSAGE 5
-#define ATAPI_STATE_END_PHASE 6
-#define ATAPI_STATE_READ_DATA 7
-#define ATAPI_STATE_READ_DATA_WAIT 8
-#define ATAPI_STATE_WRITE_DATA 9
-#define ATAPI_STATE_WRITE_DATA_WAIT 10
-#define ATAPI_STATE_RETRY_READ_DMA 11
-#define ATAPI_STATE_RETRY_WRITE_DMA 12
-
-#define FEATURES_DMA 0x01
-#define FEATURES_OVERLAP 0x02
-
-ATAPI *atapi;
-
-void atapi_data_write(atapi_device_t *atapi_dev, uint16_t val)
-{
- switch (atapi_dev->state)
- {
- case ATAPI_STATE_COMMAND:
- atapi_dev->command[atapi_dev->command_pos++] = val & 0xff;
- atapi_dev->command[atapi_dev->command_pos++] = val >> 8;
- if (atapi_dev->command_pos >= 12)
- {
- atapi_dev->state = ATAPI_STATE_GOT_COMMAND;
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 6 * IDE_TIME);
- *atapi_dev->atastat = BUSY_STAT | (*atapi_dev->atastat & ERR_STAT);
- }
- break;
-
- case ATAPI_STATE_WRITE_DATA_WAIT:
- atapi_dev->data[atapi_dev->data_write_pos++] = val & 0xff;
- atapi_dev->data[atapi_dev->data_write_pos++] = val >> 8;
-// pclog("Write ATAPI data %i %i %i\n", atapi_dev->data_write_pos, atapi_dev->data_read_pos, idecallback[atapi_dev->board]);
- if (atapi_dev->data_write_pos >= atapi_dev->data_read_pos)
- {
- atapi_dev->bus_state = 0;
- atapi_dev->state = ATAPI_STATE_WRITE_DATA;
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 6 * IDE_TIME);
- *atapi_dev->atastat = BUSY_STAT | (*atapi_dev->atastat & ERR_STAT);
- }
- break;
- }
-}
-
-uint16_t atapi_data_read(atapi_device_t *atapi_dev)
-{
- uint16_t temp = 0xffff;
-
- switch (atapi_dev->state)
- {
- case ATAPI_STATE_READ_DATA_WAIT:
- if (atapi_dev->data_read_pos >= atapi_dev->data_write_pos)
- {
-// pclog("ATAPI_STATE_READ_DATA_WAIT - out of data!\n");
- break;
- }
-
- temp = atapi_dev->data[atapi_dev->data_read_pos++];
- if (atapi_dev->data_read_pos < atapi_dev->data_write_pos)
- temp |= (atapi_dev->data[atapi_dev->data_read_pos++] << 8);
-// pclog("Read data %04x\n", temp);
- if (atapi_dev->data_read_pos >= atapi_dev->data_write_pos)
- {
- atapi_dev->state = ATAPI_STATE_NEXT_PHASE;
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 6*IDE_TIME);
- *atapi_dev->atastat = BUSY_STAT | (*atapi_dev->atastat & ERR_STAT);
- }
- break;
- }
-
- return temp;
-}
-
-static int wait_for_bus(scsi_bus_t *bus, int state, int req_needed)
-{
- int c;
-
- for (c = 0; c < 20; c++)
- {
- int bus_state = scsi_bus_read(bus);
-
- if ((bus_state & (BUS_IO | BUS_CD | BUS_MSG)) == state && (bus_state & BUS_BSY))
- {
- if (!req_needed || (bus_state & BUS_REQ))
- return 1;
- }
- }
-
- return 0;
-}
-
-void atapi_command_start(atapi_device_t *atapi, uint8_t features)
-{
- scsi_bus_t *bus = &atapi->bus;
-
- atapi->use_dma = features & 1;
-
- scsi_bus_update(bus, BUS_SEL | BUS_SETDATA(1 << 0));
- if (!(scsi_bus_read(bus) & BUS_BSY))
- fatal("STATE_SCSI_SELECT failed to select target\n");
-
- scsi_bus_update(bus, 0);
- if (!(scsi_bus_read(bus) & BUS_BSY))
- fatal("STATE_SCSI_SELECT failed to select target 2\n");
-
- /*Device should now be selected*/
- if (!wait_for_bus(bus, BUS_CD, 1))
- fatal("Device failed to request command\n");
-
- atapi->state = ATAPI_STATE_COMMAND;
- atapi->command_pos = 0;
-}
-
-uint8_t atapi_read_iir(atapi_device_t *atapi_dev)
-{
- uint8_t val = 0;
- int bus_status = atapi_dev->bus_state;//scsi_bus_read(&atapi_dev->bus);
-
- if (bus_status & BUS_CD)
- val |= 1;
- if (bus_status & BUS_IO)
- val |= 2;
-
-// pclog("Read IIR %02X %02x\n", val, bus_status);
-
- return val;
-}
-
-uint8_t atapi_read_drq(atapi_device_t *atapi_dev)
-{
- return atapi_dev->bus_state & BUS_REQ;
-}
-
-void atapi_set_transfer_granularity(atapi_device_t *atapi_dev, int size)
-{
- if (atapi_dev->max_transfer_len > size)
- atapi_dev->max_transfer_len -= (atapi_dev->max_transfer_len % size);
-}
-
-void atapi_process_packet(atapi_device_t *atapi_dev)
-{
-// pclog("atapi_process_packet: state=%i\n", atapi_dev->state);
- switch (atapi_dev->state)
- {
- case ATAPI_STATE_COMMAND:
- *atapi_dev->atastat = READY_STAT | (*atapi_dev->atastat & ERR_STAT);
- atapi_dev->max_transfer_len = (*atapi_dev->cylinder) & ~1;
- if (!atapi_dev->max_transfer_len)
- atapi_dev->max_transfer_len = 0xfffe;
- atapi_dev->bus_state = BUS_CD | BUS_REQ;
- break;
-
- case ATAPI_STATE_GOT_COMMAND:
- {
- int pos = 0;
- int bus_state;
- int c;
-
- for (c = 0; c < 20; c++)
- {
- bus_state = scsi_bus_read(&atapi_dev->bus);
-
- if (!(bus_state & BUS_BSY))
- fatal("SEND_COMMAND - dropped BSY\n");
- if ((bus_state & (BUS_IO | BUS_CD | BUS_MSG)) != BUS_CD)
- fatal("SEND_COMMAND - bus phase incorrect\n");
- if (bus_state & BUS_REQ)
- break;
- }
- if (c == 20)
- fatal("SEND_COMMAND timed out\n");
-
- while (1)
- {
- int bus_out;
-
- for (c = 0; c < 20; c++)
- {
- int bus_state = scsi_bus_read(&atapi_dev->bus);
-
- if (!(bus_state & BUS_BSY))
- fatal("SEND_COMMAND - dropped BSY\n");
- if ((bus_state & (BUS_IO | BUS_CD | BUS_MSG)) != BUS_CD)
- break;
- if (bus_state & BUS_REQ)
- break;
- }
- if (c == 20)
- {
-// pclog("SEND_COMMAND timed out %x\n", scsi_bus_read(&atapi_dev->bus));
- atapi_dev->state = ATAPI_STATE_NEXT_PHASE;
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 6 * IDE_TIME);
- break;
- }
-
- bus_state = scsi_bus_read(&atapi_dev->bus);
-
- if ((bus_state & (BUS_IO | BUS_CD | BUS_MSG | BUS_REQ)) != (BUS_CD | BUS_REQ))
- {
-// pclog("SEND_COMMAND - bus state changed %x\n", bus_state);
- atapi_dev->state = ATAPI_STATE_NEXT_PHASE;
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 6 * IDE_TIME);
- break;
- }
-
- if (pos >= atapi_dev->command_pos)
- bus_out = BUS_SETDATA(0); /*Pad out with zeroes*/
- else
- bus_out = BUS_SETDATA(atapi_dev->command[pos++]);
- scsi_bus_update(&atapi_dev->bus, bus_out | BUS_ACK);
- scsi_bus_update(&atapi_dev->bus, bus_out & ~BUS_ACK);
-
- if (!(bus_state & BUS_BSY))
- fatal("SEND_COMMAND - dropped BSY\n");
-
-// if (pos >= atapi_dev->command_pos)
-// fatal("Out of data!\n");
- }
- }
- break;
-
- case ATAPI_STATE_NEXT_PHASE:
- {
- int c;
-
- for (c = 0; c < 20; c++)
- {
- int bus_state = scsi_bus_read(&atapi_dev->bus);
-
-// if (!c)
-// pclog("NEXT_PHASE - %x\n", bus_state);
- if (!(bus_state & BUS_BSY))
- fatal("NEXT_PHASE - dropped BSY waiting\n");
-
- if (bus_state & BUS_REQ)
- {
- scsi_device_t *scsi_dev = atapi_dev->bus.devices[0];
- void *scsi_data = atapi_dev->bus.device_data[0];
-
- switch (bus_state & (BUS_IO | BUS_CD | BUS_MSG))
- {
- case 0:
- atapi_dev->data_read_pos = scsi_dev->get_bytes_required(scsi_data);
-
- atapi_dev->data_write_pos = 0;
-
- if (atapi_dev->use_dma)
- {
- if (ide_bus_master_write_data)
- {
- if (ide_bus_master_write_data(atapi_dev->board, atapi_dev->data, atapi_dev->data_read_pos, ide_bus_master_p))
- {
- atapi_dev->state = ATAPI_STATE_RETRY_WRITE_DMA;
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 1*IDE_TIME);
- }
- else
- {
- atapi_dev->data_write_pos = atapi_dev->data_read_pos;
- atapi_dev->bus_state = 0;
- atapi_dev->state = ATAPI_STATE_WRITE_DATA;
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 6 * IDE_TIME);
- }
- }
- else
- {
- atapi_dev->state = ATAPI_STATE_RETRY_WRITE_DMA;
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 1*IDE_TIME);
- }
- }
- else
- {
- if (atapi_dev->data_read_pos > atapi_dev->max_transfer_len)
- atapi_dev->data_read_pos = atapi_dev->max_transfer_len;
-
- atapi_dev->state = ATAPI_STATE_WRITE_DATA_WAIT;
-
- *atapi_dev->cylinder = atapi_dev->data_read_pos;
-
-// pclog("WRITE_DATA: bytes=%i\n", *atapi_dev->cylinder);
- *atapi_dev->atastat = READY_STAT | DRQ_STAT | (*atapi_dev->atastat & ERR_STAT);
- atapi_dev->bus_state = BUS_REQ;
- ide_irq_raise(atapi_dev->ide);
- }
- break;
-
- case BUS_IO:
- atapi_dev->state = ATAPI_STATE_READ_DATA;
- atapi_dev->data_read_pos = atapi_dev->data_write_pos = 0;
- break;
-
- case (BUS_IO | BUS_CD):
- atapi_dev->state = ATAPI_STATE_READ_STATUS;
- break;
-
- case (BUS_CD | BUS_IO | BUS_MSG):
- atapi_dev->state = ATAPI_STATE_READ_MESSAGE;
- break;
-
- default:
- fatal("NEXT_PHASE - bus state changed %x\n", bus_state);
- }
- break;
- }
- }
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 6 * IDE_TIME);
- }
- break;
-
- case ATAPI_STATE_READ_STATUS:
- {
- int c;
-
- for (c = 0; c < 20; c++)
- {
- int bus_state = scsi_bus_read(&atapi_dev->bus);
-
- if (!(bus_state & BUS_BSY))
- fatal("READ_STATUS - dropped BSY waiting\n");
-
- if ((bus_state & (BUS_IO | BUS_CD | BUS_MSG)) != (BUS_CD | BUS_IO))
- fatal("READ_STATUS - changed phase\n");
-
- if (bus_state & BUS_REQ)
- {
-// uint8_t status = BUS_GETDATA(bus_state);
- int bus_out = 0;
-
-// pclog("Read status %02x\n", status);
-
- scsi_bus_update(&atapi_dev->bus, bus_out | BUS_ACK);
- scsi_bus_update(&atapi_dev->bus, bus_out & ~BUS_ACK);
-
- atapi_dev->state = ATAPI_STATE_NEXT_PHASE;
- break;
- }
- }
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 6 * IDE_TIME);
- }
- break;
-
- case ATAPI_STATE_READ_MESSAGE:
- {
- int c;
-
- for (c = 0; c < 20; c++)
- {
- int bus_state = scsi_bus_read(&atapi_dev->bus);
-
- if (!(bus_state & BUS_BSY))
- fatal("READ_MESSAGE - dropped BSY waiting\n");
-
- if ((bus_state & (BUS_IO | BUS_CD | BUS_MSG)) != (BUS_CD | BUS_IO | BUS_MSG))
- {
-// pclog("READ_MESSAGE - changed phase\n");
- atapi_dev->state = ATAPI_STATE_NEXT_PHASE;
- break;
- }
-
- if (bus_state & BUS_REQ)
- {
- uint8_t msg = BUS_GETDATA(bus_state);
- int bus_out = 0;
-
-// pclog("Read message %02x\n", msg);
- scsi_bus_update(&atapi_dev->bus, bus_out | BUS_ACK);
- scsi_bus_update(&atapi_dev->bus, bus_out & ~BUS_ACK);
-
- switch (msg)
- {
- case MSG_COMMAND_COMPLETE:
- atapi_dev->state = ATAPI_STATE_END_PHASE;
- break;
-
- default:
- fatal("READ_MESSAGE - unknown message %02x\n", msg);
- }
- break;
- }
- }
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 6 * IDE_TIME);
- }
- break;
-
- case ATAPI_STATE_READ_DATA:
- {
- while (atapi_dev->data_write_pos < atapi_dev->max_transfer_len)
- {
- int c;
-
- for (c = 0; c < 20; c++)
- {
- int bus_state = scsi_bus_read(&atapi_dev->bus);
-
- if (!(bus_state & BUS_BSY))
- fatal("READ_DATA - dropped BSY waiting\n");
-
- if ((bus_state & (BUS_IO | BUS_CD | BUS_MSG)) != BUS_IO)
- {
-// pclog("READ_DATA - changed phase\n");
- break;
- }
-
- if (bus_state & BUS_REQ)
- {
- uint8_t data = BUS_GETDATA(bus_state);
- int bus_out = 0;
-
- atapi_dev->data[atapi_dev->data_write_pos++] = data;
-
-// pclog("Read data %02x %i\n", data, atapi_dev->data_write_pos);
- scsi_bus_update(&atapi_dev->bus, bus_out | BUS_ACK);
- scsi_bus_update(&atapi_dev->bus, bus_out & ~BUS_ACK);
- break;
- }
- }
- if ((scsi_bus_read(&atapi_dev->bus) & (BUS_IO | BUS_CD | BUS_MSG)) != BUS_IO)
- break;
- }
- if (atapi_dev->use_dma)
- {
- if (ide_bus_master_read_data)
- {
- if (ide_bus_master_read_data(atapi_dev->board, atapi_dev->data, atapi_dev->data_write_pos, ide_bus_master_p))
- {
- atapi_dev->state = ATAPI_STATE_RETRY_READ_DMA;
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 1*IDE_TIME);
- }
- else
- {
- atapi_dev->state = ATAPI_STATE_NEXT_PHASE;
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 1*IDE_TIME);
- }
- }
- else
- {
- atapi_dev->state = ATAPI_STATE_RETRY_READ_DMA;
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 1*IDE_TIME);
- }
- }
- else
- {
- atapi_dev->state = ATAPI_STATE_READ_DATA_WAIT;
- *atapi_dev->atastat = READY_STAT | DRQ_STAT | (*atapi_dev->atastat & ERR_STAT);
- *atapi_dev->cylinder = atapi_dev->data_write_pos;
-// pclog("READ_DATA: bytes=%i\n", *atapi_dev->cylinder);
- atapi_dev->bus_state = BUS_IO | BUS_REQ;
- ide_irq_raise(atapi_dev->ide);
- }
- }
- break;
-
- case ATAPI_STATE_WRITE_DATA:
- {
- atapi_dev->data_read_pos = 0;
-// pclog("ATAPI_STATE_WRITE_DATA - %i\n", atapi_dev->data_write_pos);
- while (atapi_dev->data_read_pos < atapi_dev->data_write_pos)
- {
- int bus_state = scsi_bus_read(&atapi_dev->bus);
-
- if (!(bus_state & BUS_BSY))
- fatal("WRITE_DATA - dropped BSY waiting\n");
-
- if ((bus_state & (BUS_IO | BUS_CD | BUS_MSG)) != 0)
- {
-// pclog("WRITE_DATA - changed phase\n");
- atapi_dev->state = ATAPI_STATE_NEXT_PHASE;
- break;
- }
-
- if (bus_state & BUS_REQ)
- {
- uint8_t data = atapi_dev->data[atapi_dev->data_read_pos++];
- int bus_out;
-
-// pclog("Write data %02x %i\n", data, atapi_dev->data_read_pos-1);
- bus_out = BUS_SETDATA(data);
- scsi_bus_update(&atapi_dev->bus, bus_out | BUS_ACK);
- scsi_bus_update(&atapi_dev->bus, bus_out & ~BUS_ACK);
- }
- }
-
- atapi_dev->state = ATAPI_STATE_NEXT_PHASE;
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 1 * IDE_TIME);
- }
- break;
-
- case ATAPI_STATE_END_PHASE:
- {
- int c;
- /*Wait for SCSI command to move to next phase*/
- for (c = 0; c < 20; c++)
- {
- int bus_state = scsi_bus_read(&atapi_dev->bus);
-
- if (!(bus_state & BUS_BSY))
- {
-// pclog("END_PHASE - dropped BSY waiting\n");
- atapi_dev->state = ATAPI_STATE_IDLE;
- break;
- }
-
- if (bus_state & BUS_REQ)
- fatal("END_PHASE - unexpected REQ\n");
- }
- if (atapi_dev->state == ATAPI_STATE_IDLE)
- {
- scsi_device_t *scsi_dev = atapi_dev->bus.devices[0];
- void *scsi_data = atapi_dev->bus.device_data[0];
-
- *atapi_dev->atastat = READY_STAT;
- atapi_dev->bus_state = BUS_IO | BUS_CD;
- if (scsi_dev->get_status(scsi_data) != STATUS_GOOD)
- {
- *atapi_dev->error = (scsi_dev->get_sense_key(scsi_data) << 4) | ABRT_ERR;
- if (scsi_dev->get_sense_key(scsi_data) == KEY_UNIT_ATTENTION)
- *atapi_dev->error |= MCR_ERR;
- *atapi_dev->atastat |= ERR_STAT;
- }
- ide_irq_raise(atapi_dev->ide);
- }
- else
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 6 * IDE_TIME);
- }
- break;
-
- case ATAPI_STATE_RETRY_READ_DMA:
- {
- if (ide_bus_master_read_data(atapi_dev->board, atapi_dev->data, atapi_dev->data_write_pos, ide_bus_master_p))
- {
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 1*IDE_TIME);
- }
- else
- {
- atapi_dev->state = ATAPI_STATE_NEXT_PHASE;
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 6*IDE_TIME);
- }
- }
- break;
-
- case ATAPI_STATE_RETRY_WRITE_DMA:
- {
- if (ide_bus_master_write_data(atapi_dev->board, atapi_dev->data, atapi_dev->data_read_pos, ide_bus_master_p))
- {
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 1*IDE_TIME);
- }
- else
- {
- atapi_dev->bus_state = 0;
- atapi_dev->state = ATAPI_STATE_WRITE_DATA;
- timer_set_delay_u64(&ide_timer[atapi_dev->board], 6 * IDE_TIME);
- }
- }
- break;
- }
-}
-
-void atapi_reset(atapi_device_t *atapi_dev)
-{
- pclog("atapi_reset\n");
- atapi_dev->state = ATAPI_STATE_IDLE;
- atapi_dev->command_pos = 0;
- atapi_dev->data_read_pos = 0;
- atapi_dev->data_write_pos = 0;
- scsi_bus_reset(&atapi_dev->bus);
-}
diff --git a/src/ide_atapi.h b/src/ide_atapi.h
deleted file mode 100644
index ab2174c..0000000
--- a/src/ide_atapi.h
+++ /dev/null
@@ -1,69 +0,0 @@
-#ifndef __IDE_ATAPI__
-#define __IDE_ATAPI__
-
-#include "scsi.h"
-
-/*ATAPI stuff*/
-typedef struct ATAPI
-{
- int (*ready)(void);
- int (*medium_changed)(void);
- int (*readtoc)(uint8_t *b, uint8_t starttrack, int msf, int maxlen, int single);
- int (*readtoc_session)(uint8_t *b, int msf, int maxlen);
- int (*readtoc_raw)(uint8_t *b, int maxlen);
- uint8_t (*getcurrentsubchannel)(uint8_t *b, int msf);
- int (*readsector)(uint8_t *b, int sector, int count);
- void (*readsector_raw)(uint8_t *b, int sector);
- void (*playaudio)(uint32_t pos, uint32_t len, int ismsf);
- void (*seek)(uint32_t pos);
- void (*load)(void);
- void (*eject)(void);
- void (*pause)(void);
- void (*resume)(void);
- uint32_t (*size)(void);
- int (*status)(void);
- int (*is_track_audio)(uint32_t pos, int ismsf);
- void (*stop)(void);
- void (*exit)(void);
-} ATAPI;
-
-extern ATAPI *atapi;
-
-void atapi_discchanged();
-
-typedef struct atapi_device_t
-{
- scsi_bus_t bus;
-
- uint8_t command[12];
- int command_pos;
-
- int state;
-
- int max_transfer_len;
-
- uint8_t data[65536];
- int data_read_pos, data_write_pos;
-
- int bus_state;
-
- struct IDE *ide;
-
- int board;
- uint8_t *atastat;
- uint8_t *error;
- int *cylinder;
-
- int use_dma;
-} atapi_device_t;
-
-void atapi_data_write(atapi_device_t *atapi_dev, uint16_t val);
-uint16_t atapi_data_read(atapi_device_t *atapi_dev);
-void atapi_command_start(atapi_device_t *atapi, uint8_t features);
-uint8_t atapi_read_iir(atapi_device_t *atapi_dev);
-uint8_t atapi_read_drq(atapi_device_t *atapi_dev);
-void atapi_process_packet(atapi_device_t *atapi_dev);
-void atapi_set_transfer_granularity(atapi_device_t *atapi_dev, int size);
-void atapi_reset(atapi_device_t *atapi_dev);
-
-#endif
diff --git a/src/ide_sff8038i.c b/src/ide_sff8038i.c
deleted file mode 100644
index 79eda27..0000000
--- a/src/ide_sff8038i.c
+++ /dev/null
@@ -1,208 +0,0 @@
-/*Emulation of SFF-8038i IDE bus mastering interface.
- Used by PIIX and VT82C586B IDE controllers*/
-#include "ibm.h"
-#include "ide.h"
-#include "ide_sff8038i.h"
-#include "mem.h"
-
-static void sff_bus_master_next_addr(sff_busmaster_t *busmaster, int channel)
-{
- busmaster[channel].addr = (*(uint32_t *)(&ram[busmaster[channel].ptr_cur])) & ~1;
- busmaster[channel].count = (*(uint32_t *)(&ram[busmaster[channel].ptr_cur + 4])) & 0xfffe;
- if (!busmaster[channel].count)
- busmaster[channel].count = 0x10000;
- busmaster[channel].eot = (*(uint32_t *)(&ram[busmaster[channel].ptr_cur + 4])) >> 31;
- busmaster[channel].ptr_cur += 8;
-// pclog("New DMA settings on channel %i - Addr %08X Count %04X EOT %i\n", channel, piix_busmaster[channel].addr, piix_busmaster[channel].count, piix_busmaster[channel].eot);
-}
-
-void sff_bus_master_write(uint16_t port, uint8_t val, void *p)
-{
- sff_busmaster_t *busmaster = (sff_busmaster_t *)p;
- int channel = (port & 8) ? 1 : 0;
-// pclog("PIIX Bus Master write %04X %02X %04x:%08x\n", port, val, CS, pc);
- switch (port & 7)
- {
- case 0:
- if ((val & 1) && !(busmaster[channel].command & 1)) /*Start*/
- {
- busmaster[channel].ptr_cur = busmaster[channel].ptr;
- sff_bus_master_next_addr(busmaster, channel);
- busmaster[channel].status |= 1;
- }
- if (!(val & 1) && (busmaster[channel].command & 1)) /*Stop*/
- busmaster[channel].status &= ~1;
-
- busmaster[channel].command = val;
- break;
- case 2:
- busmaster[channel].status = (val & 0x60) | ((busmaster[channel].status & ~val) & 6) | (busmaster[channel].status & 1);
- break;
- case 4:
- busmaster[channel].ptr = (busmaster[channel].ptr & 0xffffff00) | val;
- break;
- case 5:
- busmaster[channel].ptr = (busmaster[channel].ptr & 0xffff00ff) | (val << 8);
- break;
- case 6:
- busmaster[channel].ptr = (busmaster[channel].ptr & 0xff00ffff) | (val << 16);
- break;
- case 7:
- busmaster[channel].ptr = (busmaster[channel].ptr & 0x00ffffff) | (val << 24);
- break;
- }
-}
-
-uint8_t sff_bus_master_read(uint16_t port, void *p)
-{
- sff_busmaster_t *busmaster = (sff_busmaster_t *)p;
- int channel = (port & 8) ? 1 : 0;
-// pclog("PIIX Bus Master read %04X %04x:%08x\n", port, CS, pc);
- switch (port & 7)
- {
- case 0:
- return busmaster[channel].command;
- case 2:
- return busmaster[channel].status;
- case 4:
- return busmaster[channel].ptr;
- case 5:
- return busmaster[channel].ptr >> 8;
- case 6:
- return busmaster[channel].ptr >> 16;
- case 7:
- return busmaster[channel].ptr >> 24;
- }
- return 0xff;
-}
-
-static int sff_bus_master_data_read(int channel, uint8_t *data, int size, void *p)
-{
- sff_busmaster_t *busmaster = (sff_busmaster_t *)p;
- int transferred = 0;
-
- if (!(busmaster[channel].status & 1))
- return 1; /*DMA disabled*/
-
- while (transferred < size)
- {
- if (busmaster[channel].count < (size - transferred) && busmaster[channel].eot)
- fatal("DMA on channel %i - Read count less than size! Addr %08X Count %04X EOT %i size %i\n", channel, busmaster[channel].addr, busmaster[channel].count, busmaster[channel].eot, size);
-
- mem_invalidate_range(busmaster[channel].addr, busmaster[channel].addr+(size-1));
-
- if (busmaster[channel].count < (size - transferred))
- {
-// pclog("Transferring smaller - %i bytes\n", piix_busmaster[channel].count);
- if (busmaster[channel].addr < (mem_size * 1024))
- {
- int count = busmaster[channel].count;
- if ((busmaster[channel].addr + count) > (mem_size * 1024))
- count = (mem_size * 1024) - busmaster[channel].addr;
- memcpy(&ram[busmaster[channel].addr], data + transferred, count);
- }
- transferred += busmaster[channel].count;
- busmaster[channel].addr += busmaster[channel].count;
- busmaster[channel].count = 0;
- }
- else
- {
-// pclog("Transferring larger - %i bytes\n", size - transferred);
- if (busmaster[channel].addr < (mem_size * 1024))
- {
- int count = size - transferred;
- if ((busmaster[channel].addr + count) > (mem_size * 1024))
- count = (mem_size * 1024) - busmaster[channel].addr;
- memcpy(&ram[busmaster[channel].addr], data + transferred, count);
- }
- busmaster[channel].addr += (size - transferred);
- busmaster[channel].count -= (size - transferred);
- transferred += (size - transferred);
- }
-
-// pclog("DMA on channel %i - Addr %08X Count %04X EOT %i\n", channel, piix_busmaster[channel].addr, piix_busmaster[channel].count, piix_busmaster[channel].eot);
-
- if (!busmaster[channel].count)
- {
-// pclog("DMA on channel %i - block over\n", channel);
- if (busmaster[channel].eot) /*End of transfer?*/
- {
-// pclog("DMA on channel %i - transfer over\n", channel);
- busmaster[channel].status &= ~1;
- }
- else
- sff_bus_master_next_addr(busmaster, channel);
- }
- }
- return 0;
-}
-static int sff_bus_master_data_write(int channel, uint8_t *data, int size, void *p)
-{
- sff_busmaster_t *busmaster = (sff_busmaster_t *)p;
- int transferred = 0;
-
- if (!(busmaster[channel].status & 1))
- return 1; /*DMA disabled*/
-
- while (transferred < size)
- {
- if (busmaster[channel].count < (size - transferred) && busmaster[channel].eot)
- fatal("DMA on channel %i - Write count less than size! Addr %08X Count %04X EOT %i size %i\n", channel, busmaster[channel].addr, busmaster[channel].count, busmaster[channel].eot, size);
-
- if (busmaster[channel].count < (size - transferred))
- {
-// pclog("Transferring smaller - %i bytes\n", piix_busmaster[channel].count);
- if (busmaster[channel].addr < (mem_size * 1024))
- {
- int count = busmaster[channel].count;
- if ((busmaster[channel].addr + count) > (mem_size * 1024))
- count = (mem_size * 1024) - busmaster[channel].addr;
- memcpy(data + transferred, &ram[busmaster[channel].addr], count);
- }
- transferred += busmaster[channel].count;
- busmaster[channel].addr += busmaster[channel].count;
- busmaster[channel].count = 0;
- }
- else
- {
-// pclog("Transferring larger - %i bytes\n", size - transferred);
- if (busmaster[channel].addr < (mem_size * 1024))
- {
- int count = size - transferred;
- if ((busmaster[channel].addr + count) > (mem_size * 1024))
- count = (mem_size * 1024) - busmaster[channel].addr;
- memcpy(data + transferred, &ram[busmaster[channel].addr], count);
- }
- busmaster[channel].addr += (size - transferred);
- busmaster[channel].count -= (size - transferred);
- transferred += (size - transferred);
- }
-
-// pclog("DMA on channel %i - Addr %08X Count %04X EOT %i\n", channel, piix_busmaster[channel].addr, piix_busmaster[channel].count, piix_busmaster[channel].eot);
-
- if (!busmaster[channel].count)
- {
-// pclog("DMA on channel %i - block over\n", channel);
- if (busmaster[channel].eot) /*End of transfer?*/
- {
-// pclog("DMA on channel %i - transfer over\n", channel);
- busmaster[channel].status &= ~1;
- }
- else
- sff_bus_master_next_addr(busmaster, channel);
- }
- }
- return 0;
-}
-
-static void sff_bus_master_set_irq(int channel, void *p)
-{
- sff_busmaster_t *busmaster = (sff_busmaster_t *)p;
-
- busmaster[channel].status |= 4;
-}
-
-void sff_bus_master_init(sff_busmaster_t *busmaster)
-{
- ide_set_bus_master(sff_bus_master_data_read, sff_bus_master_data_write, sff_bus_master_set_irq, busmaster);
-}
diff --git a/src/ide_sff8038i.h b/src/ide_sff8038i.h
deleted file mode 100644
index 9ade5ad..0000000
--- a/src/ide_sff8038i.h
+++ /dev/null
@@ -1,13 +0,0 @@
-typedef struct sff_busmaster_t
-{
- uint8_t command;
- uint8_t status;
- uint32_t ptr, ptr_cur;
- int count;
- uint32_t addr;
- int eot;
-} sff_busmaster_t;
-
-uint8_t sff_bus_master_read(uint16_t port, void *p);
-void sff_bus_master_write(uint16_t port, uint8_t val, void *p);
-void sff_bus_master_init(sff_busmaster_t *busmaster);
diff --git a/src/intel.c b/src/intel.c
index 3d66644..67d06f4 100644
--- a/src/intel.c
+++ b/src/intel.c
@@ -2,15 +2,11 @@
#include "cpu.h"
#include "io.h"
#include "mem.h"
-#include "model.h"
#include "pit.h"
#include "timer.h"
-#include "x86.h"
#include "intel.h"
-static uint8_t batman_port_92;
-
uint8_t batman_brdconfig(uint16_t port, void *p)
{
// pclog("batman_brdconfig read port=%04x\n", port);
@@ -20,36 +16,15 @@ uint8_t batman_brdconfig(uint16_t port, void *p)
return 0xff;
case 0x75:
return 0xdf;
- case 0x92:
- return batman_port_92;
}
return 0;
}
-void batman_brdconfig_write(uint16_t port, uint8_t val, void *p)
-{
- switch (port)
- {
- case 0x92:
- if ((mem_a20_alt ^ val) & 2)
- {
- mem_a20_alt = val & 2;
- mem_a20_recalc();
- }
- if ((~batman_port_92 & val) & 1)
- {
- softresetx86();
- cpu_set_edx();
- }
- batman_port_92 = val;
- }
-}
-
static uint16_t batman_timer_latch;
-static pc_timer_t batman_timer;
-
+static int batman_timer = 0;
static void batman_timer_over(void *p)
{
+ batman_timer = 0;
}
static void batman_timer_write(uint16_t addr, uint8_t val, void *p)
@@ -58,16 +33,21 @@ static void batman_timer_write(uint16_t addr, uint8_t val, void *p)
batman_timer_latch = (batman_timer_latch & 0xff) | (val << 8);
else
batman_timer_latch = (batman_timer_latch & 0xff00) | val;
- timer_set_delay_u64(&batman_timer, batman_timer_latch * TIMER_USEC);
+ batman_timer = batman_timer_latch * TIMER_USEC;
}
static uint8_t batman_timer_read(uint16_t addr, void *p)
{
uint16_t batman_timer_latch;
- cycles -= (int)(PITCONST >> 32);
+ cycles -= (int)PITCONST;
- batman_timer_latch = timer_get_remaining_us(&batman_timer);
+ timer_clock();
+
+ if (batman_timer < 0)
+ return 0;
+
+ batman_timer_latch = batman_timer / TIMER_USEC;
if (addr & 1)
return batman_timer_latch >> 8;
@@ -80,54 +60,17 @@ void intel_batman_init()
io_sethandler(0x0075, 0x0001, batman_brdconfig, NULL, NULL, NULL, NULL, NULL, NULL);
io_sethandler(0x0078, 0x0002, batman_timer_read, NULL, NULL, batman_timer_write, NULL, NULL, NULL);
- io_sethandler(0x0092, 0x0001, batman_brdconfig, NULL, NULL, batman_brdconfig_write, NULL, NULL, NULL);
- batman_port_92 = 0;
- timer_add(&batman_timer, batman_timer_over, NULL, 0);
+ timer_add(batman_timer_over, &batman_timer, &batman_timer, NULL);
}
uint8_t endeavor_brdconfig(uint16_t port, void *p)
{
- uint8_t temp;
- CPU *cpu_s = &models[model].cpu[cpu_manufacturer].cpus[cpu];
// pclog("endeavor_brdconfig read port=%04x\n", port);
switch (port)
{
case 0x79:
- // Bit # | Description | Bit = 1 | Bit = 0
- // 0 | Internal CPU Clock Freq. (Switch 6) | 3/2x | 2x (Manual has these swapped in one place?)
- // 1 | Soft Off capable power supply | No | Yes
- // 2 | On-board Audio present | Yes | No
- // 3 | External CPU clock (Switch 7) | |
- // 4 | External CPU clock (Switch 8) | |
- // 5 | Setup Disable (Switch 5) | Enable access | Disable access
- // 6 | Clear CMOS (Switch 4) | Keep values | Clear values
- // 7 | Password Clear (Switch 3) | Keep password | Clear password
-
- // Bus Speed | Switch 7 | Switch 8
- // 50 MHz | Off | Off
- // 60 Mhz | On | Off
- // 66 MHz | Off | On
-
- // Multiplier for each supported processor-
- // -The 3/2 setting is used for 75 MHz, 90 MHz, and 100 MHz processors
- // -The 2 times setting is used for 120 MHz processors.
-
- if (cpu_s->rspeed == 75000000 && cpu_s->pci_speed == 25000000)
- temp = 0x01;
- else if (cpu_s->rspeed == 90000000 && cpu_s->pci_speed == 30000000)
- temp = 0x01 | 0x08;
- else if (cpu_s->rspeed == 100000000 && cpu_s->pci_speed == 25000000)
- temp = 0x00;
- else if (cpu_s->rspeed == 100000000 && cpu_s->pci_speed == 33333333)
- temp = 0x01 | 0x10;
- else if (cpu_s->rspeed == 120000000 && cpu_s->pci_speed == 30000000)
- temp = 0x08;
- else if (cpu_s->rspeed == 133333333 && cpu_s->pci_speed == 33333333)
- temp = 0x10;
- else
- temp = 0x10; // TODO: how are the overdrive processors configured?
- return 0xe0 | temp;
+ return 0xff;
}
return 0;
}
@@ -136,54 +79,3 @@ void intel_endeavor_init()
{
io_sethandler(0x0079, 0x0001, endeavor_brdconfig, NULL, NULL, NULL, NULL, NULL, NULL);
}
-
-static uint8_t zappa_brdconfig(uint16_t port, void *p)
-{
- uint8_t temp;
- CPU *cpu_s = &models[model].cpu[cpu_manufacturer].cpus[cpu];
-// pclog("zappa_brdconfig read port=%04x\n", port);
- switch (port)
- {
- case 0x79:
- // Bit # | Description | Bit = 1 | Bit = 0
- // 0 | Internal CPU Clock Freq. (Switch 6) | 3/2x | 2x (Manual has these swapped in one place?)
- // 1 | No Connect | |
- // 2 | No Connect | |
- // 3 | External CPU clock (Switch 7) | |
- // 4 | External CPU clock (Switch 8) | |
- // 5 | Setup Disable (Switch 5) | Enable access | Disable access
- // 6 | Clear CMOS (Switch 4) | Keep values | Clear values
- // 7 | Password Clear (Switch 3) | Keep password | Clear password
-
- // Bus Speed | Switch 7 | Switch 8
- // 50 MHz | Off | Off
- // 60 Mhz | On | Off
- // 66 MHz | Off | On
-
- // Multiplier for each supported processor-
- // -The 3/2 setting is used for 75 MHz, 90 MHz, and 100 MHz processors
- // -The 2 times setting is used for 120 MHz processors.
-
- if (cpu_s->rspeed == 75000000 && cpu_s->pci_speed == 25000000)
- temp = 0x01;
- else if (cpu_s->rspeed == 90000000 && cpu_s->pci_speed == 30000000)
- temp = 0x01 | 0x08;
- else if (cpu_s->rspeed == 100000000 && cpu_s->pci_speed == 25000000)
- temp = 0x00;
- else if (cpu_s->rspeed == 100000000 && cpu_s->pci_speed == 33333333)
- temp = 0x01 | 0x10;
- else if (cpu_s->rspeed == 120000000 && cpu_s->pci_speed == 30000000)
- temp = 0x08;
- else if (cpu_s->rspeed == 133333333 && cpu_s->pci_speed == 33333333)
- temp = 0x10;
- else
- temp = 0x10; // TODO: how are the overdrive processors configured?
- return 0xe0 | temp;
- }
- return 0;
-}
-
-void intel_zappa_init()
-{
- io_sethandler(0x0079, 0x0001, zappa_brdconfig, NULL, NULL, NULL, NULL, NULL, NULL);
-}
diff --git a/src/intel.h b/src/intel.h
index 4e14ddc..eccd668 100644
--- a/src/intel.h
+++ b/src/intel.h
@@ -1,3 +1,2 @@
void intel_batman_init();
void intel_endeavor_init();
-void intel_zappa_init();
diff --git a/src/intel_flash.c b/src/intel_flash.c
index 91ea964..304e873 100644
--- a/src/intel_flash.c
+++ b/src/intel_flash.c
@@ -3,7 +3,6 @@
#include "device.h"
#include "mem.h"
-#define FLASH_2MBIT 4
#define FLASH_IS_BXB 2
#define FLASH_INVERT 1
@@ -11,7 +10,6 @@
#define BLOCK_DATA1 1
#define BLOCK_DATA2 2
#define BLOCK_BOOT 3
-#define BLOCK_MAIN2 4 /*2Mbit devices only*/
enum
{
@@ -28,13 +26,11 @@ enum
typedef struct flash_t
{
uint8_t command, status;
- uint16_t flash_id;
- uint8_t type;
+ uint8_t flash_id;
int invert_high_pin;
- mem_mapping_t mapping[8], mapping_h[10];
- uint32_t block_start[5], block_end[5], block_len[5];
- uint8_t array[256*1024];
- uint32_t addr_mask;
+ mem_mapping_t mapping[8], mapping_h[8];
+ uint32_t block_start[4], block_end[4], block_len[4];
+ uint8_t array[131072];
} flash_t;
static char flash_path[1024];
@@ -43,9 +39,13 @@ static uint8_t flash_read(uint32_t addr, void *p)
{
flash_t *flash = (flash_t *)p;
if (flash->invert_high_pin)
+ {
+ // pclog("flash_read : addr=%08x/%08x val=%02x command=%02x %04x:%08x\n", addr, addr ^ 0x10000, flash->array[(addr ^ 0x10000) & 0x1ffff], flash->command, CS, cpu_state.pc);
addr ^= 0x10000;
+ if (addr & 0xfff00000) return flash->array[addr & 0x1ffff];
+ }
// pclog("flash_read : addr=%08x command=%02x %04x:%08x\n", addr, flash->command, CS, cpu_state.pc);
- addr &= flash->addr_mask;
+ addr &= 0x1ffff;
switch (flash->command)
{
case CMD_READ_ARRAY:
@@ -65,26 +65,15 @@ static uint8_t flash_read(uint32_t addr, void *p)
static uint16_t flash_readw(uint32_t addr, void *p)
{
flash_t *flash = (flash_t *)p;
- addr &= flash->addr_mask;
+ addr &= 0x1ffff;
if (flash->invert_high_pin) addr ^= 0x10000;
- switch (flash->command)
- {
- case CMD_READ_ARRAY:
- default:
- return *(uint16_t *)&(flash->array[addr]);
-
- case CMD_IID:
- return 0x89 | (flash->flash_id << 8);
-
- case CMD_READ_STATUS:
- return flash->status;
- }
+ return *(uint16_t *)&(flash->array[addr]);
}
static uint32_t flash_readl(uint32_t addr, void *p)
{
flash_t *flash = (flash_t *)p;
- addr &= flash->addr_mask;
+ addr &= 0x1ffff;
if (flash->invert_high_pin) addr ^= 0x10000;
return *(uint32_t *)&(flash->array[addr]);
}
@@ -93,11 +82,14 @@ static void flash_write(uint32_t addr, uint8_t val, void *p)
{
flash_t *flash = (flash_t *)p;
int i;
-// pclog("flash_write : addr=%08x val=%02x command=%02x %04x:%08x\n", addr, val, flash->command, CS, cpu_state.pc);
+ // pclog("flash_write : addr=%08x val=%02x command=%02x %04x:%08x\n", addr, val, flash->command, CS, cpu_state.pc);
if (flash->invert_high_pin)
+ {
addr ^= 0x10000;
- addr &= flash->addr_mask;
+ if (addr & 0xfff00000) return;
+ }
+ addr &= 0x1ffff;
switch (flash->command)
{
@@ -119,7 +111,7 @@ static void flash_write(uint32_t addr, uint8_t val, void *p)
case CMD_PROGRAM_SETUP:
// pclog("flash_write: program %05x %02x\n", addr, val);
- if ((addr & 0x3e000) != (flash->block_start[3] & 0x3e000))
+ if ((addr & 0x1e000) != (flash->block_start[3] & 0x1e000))
flash->array[addr] = val;
flash->command = CMD_READ_STATUS;
flash->status = 0x80;
@@ -142,23 +134,9 @@ static void intel_flash_add_mappings(flash_t *flash)
for (i = 0; i <= 7; i++)
{
- mem_mapping_add(&(flash->mapping[i]), 0xe0000 + (i << 14), 0x04000,
- flash_read, flash_readw, flash_readl,
- flash_write, mem_write_nullw, mem_write_nulll,
- flash->array + (((i << 14) + 0x20000) & flash->addr_mask), MEM_MAPPING_EXTERNAL, (void *)flash);
- mem_mapping_add(&(flash->mapping_h[i]), 0xfffe0000 + (i << 14), 0x04000,
- flash_read, flash_readw, flash_readl,
- flash_write, mem_write_nullw, mem_write_nulll,
- flash->array + (((i << 14) + 0x20000) & flash->addr_mask), 0, (void *)flash);
+ mem_mapping_add(&(flash->mapping[i]), 0xe0000 + (i << 14), 0x04000, flash_read, flash_readw, flash_readl, flash_write, mem_write_nullw, mem_write_nulll, flash->array + ((i << 14) & 0x1ffff), MEM_MAPPING_EXTERNAL, (void *)flash);
+ mem_mapping_add(&(flash->mapping_h[i]), 0xfffe0000 + (i << 14), 0x04000, flash_read, flash_readw, flash_readl, flash_write, mem_write_nullw, mem_write_nulll, flash->array + ((i << 14) & 0x1ffff), 0, (void *)flash);
}
-
- if (flash->type & FLASH_2MBIT)
- {
- mem_mapping_add(&flash->mapping_h[8], 0xfffc0000, 0x20000,
- flash_read, flash_readw, flash_readl,
- flash_write, mem_write_nullw, mem_write_nulll,
- flash->array, 0, (void *)flash);
- }
}
/* This is for boards which invert the high pin - the flash->array pointers need to pointer invertedly in order for INTERNAL writes to go to the right part of the array. */
@@ -168,156 +146,66 @@ static void intel_flash_add_mappings_inverted(flash_t *flash)
for (i = 0; i <= 7; i++)
{
- mem_mapping_add(&(flash->mapping[i]), 0xe0000 + (i << 14), 0x04000,
- flash_read, flash_readw, flash_readl,
- flash_write, mem_write_nullw, mem_write_nulll,
- flash->array + ((((i << 14) ^ 0x10000) + 0x20000) & flash->addr_mask), MEM_MAPPING_EXTERNAL, (void *)flash);
- mem_mapping_add(&(flash->mapping_h[i]), 0xfffe0000 + (i << 14), 0x04000,
- flash_read, flash_readw, flash_readl,
- flash_write, mem_write_nullw, mem_write_nulll,
- flash->array + ((((i << 14) ^ 0x10000) + 0x20000) & flash->addr_mask), 0, (void *)flash);
+ mem_mapping_add(&(flash->mapping[i]), 0xe0000 + (i << 14), 0x04000, flash_read, flash_readw, flash_readl, flash_write, mem_write_nullw, mem_write_nulll, flash->array + (((i << 14) ^ 0x10000) & 0x1ffff), MEM_MAPPING_EXTERNAL, (void *)flash);
+ mem_mapping_add(&(flash->mapping_h[i]), 0xfffe0000 + (i << 14), 0x04000, flash_read, flash_readw, flash_readl, flash_write, mem_write_nullw, mem_write_nulll, flash->array + (((i << 14) ^ 0x10000) & 0x1ffff), 0, (void *)flash);
}
-
- if (flash->type & FLASH_2MBIT)
- {
- mem_mapping_add(&flash->mapping_h[8], 0xfffc0000, 0x10000,
- flash_read, flash_readw, flash_readl,
- flash_write, mem_write_nullw, mem_write_nulll,
- flash->array + 0x10000, 0, (void *)flash);
- mem_mapping_add(&flash->mapping_h[9], 0xfffd0000, 0x10000,
- flash_read, flash_readw, flash_readl,
- flash_write, mem_write_nullw, mem_write_nulll,
- flash->array, 0, (void *)flash);
- }
}
-void *intel_flash_init(uint8_t type, uint8_t flash_id)
+void *intel_flash_init(uint8_t type)
{
FILE *f;
flash_t *flash = malloc(sizeof(flash_t));
memset(flash, 0, sizeof(flash_t));
char fpath[1024];
int i;
-
- flash->type = type;
switch(romset)
{
case ROM_REVENGE:
- strcpy(flash_path, "revenge/");
- break;
- case ROM_PB520R:
- strcpy(flash_path, "pb520r/");
+ strcpy(flash_path, "roms/revenge/");
break;
case ROM_ENDEAVOR:
- strcpy(flash_path, "endeavor/");
- break;
- case ROM_PB570:
- strcpy(flash_path, "pb570/");
- break;
- case ROM_ZAPPA:
- strcpy(flash_path, "zappa/");
- break;
- case ROM_P55VA:
- strcpy(flash_path, "p55va/");
- break;
- case ROM_P55TVP4:
- strcpy(flash_path, "p55tvp4/");
+ strcpy(flash_path, "roms/endeavor/");
break;
case ROM_430VX:
- strcpy(flash_path, "430vx/");
+ strcpy(flash_path, "roms/430vx/");
break;
- case ROM_P55T2P4:
- strcpy(flash_path, "p55t2p4/");
- break;
- case ROM_ITAUTEC_INFOWAYM:
- strcpy(flash_path, "infowaym/");
- break;
- case ROM_VS440FX:
- strcpy(flash_path, "vs440fx/");
- break;
- case ROM_GA686BX:
- strcpy(flash_path, "ga686bx/");
- break;
-
default:
fatal("intel_flash_init on unsupported ROM set %i\n", romset);
}
// pclog("Flash init: Path is: %s\n", flash_path);
- flash->flash_id = flash_id;
-
- flash->addr_mask = (type & FLASH_2MBIT) ? 0x3ffff : 0x1ffff;
-
-// flash->flash_id = (type & FLASH_IS_BXB) ? 0x95 : 0x94;
+ flash->flash_id = (type & FLASH_IS_BXB) ? 0x95 : 0x94;
flash->invert_high_pin = (type & FLASH_INVERT);
- if (type & FLASH_2MBIT)
- {
- flash->block_len[BLOCK_MAIN] = 0x20000;
- flash->block_len[BLOCK_MAIN2] = 0x18000;
- flash->block_len[BLOCK_DATA1] = 0x02000;
- flash->block_len[BLOCK_DATA2] = 0x02000;
- flash->block_len[BLOCK_BOOT] = 0x04000;
+ /* The block lengths are the same both flash types. */
+ flash->block_len[BLOCK_MAIN] = 0x1c000;
+ flash->block_len[BLOCK_DATA1] = 0x01000;
+ flash->block_len[BLOCK_DATA2] = 0x01000;
+ flash->block_len[BLOCK_BOOT] = 0x02000;
- if (type & FLASH_IS_BXB) /* 28F001BX-B */
- {
- flash->block_start[BLOCK_MAIN] = 0x20000; /* MAIN BLOCK */
- flash->block_end[BLOCK_MAIN] = 0x3ffff;
- flash->block_start[BLOCK_MAIN2] = 0x08000; /* MAIN BLOCK */
- flash->block_end[BLOCK_MAIN2] = 0x1ffff;
- flash->block_start[BLOCK_DATA1] = 0x04000; /* DATA AREA 1 BLOCK */
- flash->block_end[BLOCK_DATA1] = 0x05fff;
- flash->block_start[BLOCK_DATA2] = 0x06000; /* DATA AREA 2 BLOCK */
- flash->block_end[BLOCK_DATA2] = 0x07fff;
- flash->block_start[BLOCK_BOOT] = 0x00000; /* BOOT BLOCK */
- flash->block_end[BLOCK_BOOT] = 0x03fff;
- }
- else /* 28F001BX-T */
- {
- flash->block_start[BLOCK_MAIN] = 0x00000; /* MAIN BLOCK */
- flash->block_end[BLOCK_MAIN] = 0x1ffff;
- flash->block_start[BLOCK_MAIN2] = 0x20000; /* MAIN BLOCK */
- flash->block_end[BLOCK_MAIN2] = 0x37fff;
- flash->block_start[BLOCK_DATA1] = 0x38000; /* DATA AREA 1 BLOCK */
- flash->block_end[BLOCK_DATA1] = 0x39fff;
- flash->block_start[BLOCK_DATA2] = 0x3a000; /* DATA AREA 2 BLOCK */
- flash->block_end[BLOCK_DATA2] = 0x3bfff;
- flash->block_start[BLOCK_BOOT] = 0x3c000; /* BOOT BLOCK */
- flash->block_end[BLOCK_BOOT] = 0x3ffff;
- }
- }
- else
- {
- /* The block lengths are the same both flash types. */
- flash->block_len[BLOCK_MAIN] = 0x1c000;
- flash->block_len[BLOCK_DATA1] = 0x01000;
- flash->block_len[BLOCK_DATA2] = 0x01000;
- flash->block_len[BLOCK_BOOT] = 0x02000;
-
- if (type & FLASH_IS_BXB) /* 28F001BX-B */
- {
- flash->block_start[BLOCK_MAIN] = 0x04000; /* MAIN BLOCK */
- flash->block_end[BLOCK_MAIN] = 0x1ffff;
- flash->block_start[BLOCK_DATA1] = 0x03000; /* DATA AREA 1 BLOCK */
- flash->block_end[BLOCK_DATA1] = 0x03fff;
- flash->block_start[BLOCK_DATA2] = 0x04000; /* DATA AREA 2 BLOCK */
- flash->block_end[BLOCK_DATA2] = 0x04fff;
- flash->block_start[BLOCK_BOOT] = 0x00000; /* BOOT BLOCK */
- flash->block_end[BLOCK_BOOT] = 0x01fff;
- }
- else /* 28F001BX-T */
- {
- flash->block_start[BLOCK_MAIN] = 0x00000; /* MAIN BLOCK */
- flash->block_end[BLOCK_MAIN] = 0x1bfff;
- flash->block_start[BLOCK_DATA1] = 0x1c000; /* DATA AREA 1 BLOCK */
- flash->block_end[BLOCK_DATA1] = 0x1cfff;
- flash->block_start[BLOCK_DATA2] = 0x1d000; /* DATA AREA 2 BLOCK */
- flash->block_end[BLOCK_DATA2] = 0x1dfff;
- flash->block_start[BLOCK_BOOT] = 0x1e000; /* BOOT BLOCK */
- flash->block_end[BLOCK_BOOT] = 0x1ffff;
- }
- }
+ if (type & FLASH_IS_BXB) /* 28F001BX-B */
+ {
+ flash->block_start[BLOCK_MAIN] = 0x04000; /* MAIN BLOCK */
+ flash->block_end[BLOCK_MAIN] = 0x1ffff;
+ flash->block_start[BLOCK_DATA1] = 0x03000; /* DATA AREA 1 BLOCK */
+ flash->block_end[BLOCK_DATA1] = 0x03fff;
+ flash->block_start[BLOCK_DATA2] = 0x04000; /* DATA AREA 2 BLOCK */
+ flash->block_end[BLOCK_DATA2] = 0x04fff;
+ flash->block_start[BLOCK_BOOT] = 0x00000; /* BOOT BLOCK */
+ flash->block_end[BLOCK_BOOT] = 0x01fff;
+ }
+ else /* 28F001BX-T */
+ {
+ flash->block_start[BLOCK_MAIN] = 0x00000; /* MAIN BLOCK */
+ flash->block_end[BLOCK_MAIN] = 0x1bfff;
+ flash->block_start[BLOCK_DATA1] = 0x1c000; /* DATA AREA 1 BLOCK */
+ flash->block_end[BLOCK_DATA1] = 0x1cfff;
+ flash->block_start[BLOCK_DATA2] = 0x1d000; /* DATA AREA 2 BLOCK */
+ flash->block_end[BLOCK_DATA2] = 0x1dfff;
+ flash->block_start[BLOCK_BOOT] = 0x1e000; /* BOOT BLOCK */
+ flash->block_end[BLOCK_BOOT] = 0x1ffff;
+ }
for (i = 0; i < 8; i++)
{
@@ -329,17 +217,10 @@ void *intel_flash_init(uint8_t type, uint8_t flash_id)
{
memcpy(flash->array, rom + 65536, 65536);
memcpy(flash->array + 65536, rom, 65536);
- if (type & FLASH_2MBIT)
- {
- memcpy(flash->array + 0x20000, rom + 0x30000, 65536);
- memcpy(flash->array + 0x30000, rom + 0x20000, 65536);
- }
}
else
{
memcpy(flash->array, rom, 131072);
- if (type & FLASH_2MBIT)
- memcpy(flash->array + 0x20000, rom + 0x20000, 131072);
}
if (flash->invert_high_pin)
@@ -360,9 +241,7 @@ void *intel_flash_init(uint8_t type, uint8_t flash_id)
if (f)
{
fread(&(flash->array[flash->block_start[BLOCK_MAIN]]), flash->block_len[BLOCK_MAIN], 1, f);
- if (type & FLASH_2MBIT)
- fread(&(flash->array[flash->block_start[BLOCK_MAIN2]]), flash->block_len[BLOCK_MAIN2], 1, f);
- fread(&(flash->array[flash->block_start[BLOCK_DATA1]]), flash->block_len[BLOCK_DATA1], 1, f);
+ fread(&(flash->array[flash->block_start[BLOCK_DATA1]]), flash->block_len[BLOCK_DATA1], 1, f);
fread(&(flash->array[flash->block_start[BLOCK_DATA2]]), flash->block_len[BLOCK_DATA2], 1, f);
fclose(f);
}
@@ -373,29 +252,19 @@ void *intel_flash_init(uint8_t type, uint8_t flash_id)
/* For AMI BIOS'es - Intel 28F001BXT with high address pin inverted. */
void *intel_flash_bxt_ami_init()
{
- return intel_flash_init(FLASH_INVERT, 0x94);
+ return intel_flash_init(FLASH_INVERT);
}
/* For Award BIOS'es - Intel 28F001BXT with high address pin not inverted. */
void *intel_flash_bxt_init()
{
- return intel_flash_init(0, 0x94);
+ return intel_flash_init(0);
}
/* For Acer BIOS'es - Intel 28F001BXB. */
void *intel_flash_bxb_init()
{
- return intel_flash_init(FLASH_IS_BXB, 0x95);
-}
-
-static void *intel_flash_28fb200bxt_init(void)
-{
- return intel_flash_init(FLASH_INVERT | FLASH_2MBIT, 0x74);
-}
-
-static void *intel_flash_28f002bc_init(void)
-{
- return intel_flash_init(FLASH_INVERT | FLASH_2MBIT, 0x7c);
+ return intel_flash_init(FLASH_IS_BXB);
}
void intel_flash_close(void *p)
@@ -409,8 +278,6 @@ void intel_flash_close(void *p)
strcat(fpath, "flash.bin");
f = romfopen(fpath, "wb");
fwrite(&(flash->array[flash->block_start[BLOCK_MAIN]]), flash->block_len[BLOCK_MAIN], 1, f);
- if (flash->type & FLASH_2MBIT)
- fwrite(&(flash->array[flash->block_start[BLOCK_MAIN2]]), flash->block_len[BLOCK_MAIN2], 1, f);
fwrite(&(flash->array[flash->block_start[BLOCK_DATA1]]), flash->block_len[BLOCK_DATA1], 1, f);
fwrite(&(flash->array[flash->block_start[BLOCK_DATA2]]), flash->block_len[BLOCK_DATA2], 1, f);
fclose(f);
@@ -456,29 +323,3 @@ device_t intel_flash_bxb_device =
NULL,
NULL
};
-
-device_t intel_flash_28fb200bxt_device =
-{
- "Intel 28FB200BX-T Flash BIOS",
- 0,
- intel_flash_28fb200bxt_init,
- intel_flash_close,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL
-};
-
-device_t intel_flash_28f002bc_device =
-{
- "Intel 28F002BC Flash BIOS",
- 0,
- intel_flash_28f002bc_init,
- intel_flash_close,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL
-};
diff --git a/src/intel_flash.h b/src/intel_flash.h
index 2ea4db5..2b4cb14 100644
--- a/src/intel_flash.h
+++ b/src/intel_flash.h
@@ -1,5 +1,3 @@
extern device_t intel_flash_bxt_ami_device;
extern device_t intel_flash_bxt_device;
extern device_t intel_flash_bxb_device;
-extern device_t intel_flash_28fb200bxt_device;
-extern device_t intel_flash_28f002bc_device;
diff --git a/src/io.c b/src/io.c
index ea94c67..318575c 100644
--- a/src/io.c
+++ b/src/io.c
@@ -1,5 +1,4 @@
#include "ibm.h"
-#include "amstrad.h"
#include "ide.h"
#include "io.h"
#include "video.h"
@@ -87,28 +86,36 @@ void io_removehandler(uint16_t base, int size,
int c;
for (c = 0; c < size; c++)
{
- if (port_priv[base + c][0] == priv &&
- port_inb[base + c][0] == inb && port_inw[base + c][0] == inw && port_inl[base + c][0] == inl &&
- port_outb[base + c][0] == outb && port_outw[base + c][0] == outw && port_outl[base + c][0] == outl)
+ if (port_priv[base + c][0] == priv)
{
- port_inb[ base + c][0] = NULL;
- port_inw[ base + c][0] = NULL;
- port_inl[ base + c][0] = NULL;
- port_outb[ base + c][0] = NULL;
- port_outw[ base + c][0] = NULL;
- port_outl[ base + c][0] = NULL;
+ if (port_inb[ base + c][0] == inb)
+ port_inb[ base + c][0] = NULL;
+ if (port_inw[ base + c][0] == inw)
+ port_inw[ base + c][0] = NULL;
+ if (port_inl[ base + c][0] == inl)
+ port_inl[ base + c][0] = NULL;
+ if (port_outb[ base + c][0] == outb)
+ port_outb[ base + c][0] = NULL;
+ if (port_outw[ base + c][0] == outw)
+ port_outw[ base + c][0] = NULL;
+ if (port_outl[ base + c][0] == outl)
+ port_outl[ base + c][0] = NULL;
port_priv[base + c][0] = NULL;
}
- if (port_priv[base + c][1] == priv &&
- port_inb[base + c][1] == inb && port_inw[base + c][1] == inw && port_inl[base + c][1] == inl &&
- port_outb[base + c][1] == outb && port_outw[base + c][1] == outw && port_outl[base + c][1] == outl)
+ if (port_priv[base + c][1] == priv)
{
- port_inb[ base + c][1] = NULL;
- port_inw[ base + c][1] = NULL;
- port_inl[ base + c][1] = NULL;
- port_outb[base + c][1] = NULL;
- port_outw[base + c][1] = NULL;
- port_outl[base + c][1] = NULL;
+ if (port_inb[ base + c][1] == inb)
+ port_inb[ base + c][1] = NULL;
+ if (port_inw[ base + c][1] == inw)
+ port_inw[ base + c][1] = NULL;
+ if (port_inl[ base + c][1] == inl)
+ port_inl[ base + c][1] = NULL;
+ if (port_outb[ base + c][1] == outb)
+ port_outb[ base + c][1] = NULL;
+ if (port_outw[ base + c][1] == outw)
+ port_outw[ base + c][1] = NULL;
+ if (port_outl[ base + c][1] == outl)
+ port_outl[ base + c][1] = NULL;
port_priv[base + c][1] = NULL;
}
}
@@ -128,13 +135,6 @@ uint8_t inb(uint16_t port)
if (port_inb[port][1])
temp &= port_inb[port][1](port, port_priv[port][1]);
- if (port & 0x80)
- amstrad_latch = AMSTRAD_NOLATCH;
- else if (port & 0x4000)
- amstrad_latch = AMSTRAD_SW10;
- else
- amstrad_latch = AMSTRAD_SW9;
-
/* if (!port_inb[port][0] && !port_inb[port][1])
pclog("Bad INB %04X %04X:%04X\n", port, CS, pc);*/
diff --git a/src/joystick_sw_pad.c b/src/joystick_sw_pad.c
index 9bc64dc..c0d0e8b 100644
--- a/src/joystick_sw_pad.c
+++ b/src/joystick_sw_pad.c
@@ -4,7 +4,7 @@
- Currently alternates between Mode A and Mode B (is there any way of
actually controlling which is used?)
- Windows 9x drivers require Mode B when more than 1 pad connected
- - Packet preceeded by high data (currently 40us), and followed by low
+ - Packet preceeded by high data (currently 50us), and followed by low
data (currently 160us) - timings are probably wrong, but good enough
for everything I've tried
- Analogue inputs are only used to time ID packet request. If A0 timing
@@ -30,13 +30,13 @@
typedef struct
{
- pc_timer_t poll_timer;
+ int poll_time;
int poll_left;
int poll_clock;
uint64_t poll_data;
int poll_mode;
- pc_timer_t trigger_timer;
+ int trigger_time;
int data_mode;
} sw_data;
@@ -44,22 +44,33 @@ static void sw_timer_over(void *p)
{
sw_data *sw = (sw_data *)p;
- sw->poll_clock = !sw->poll_clock;
+ while (sw->poll_time <= 0 && sw->poll_left)
+ {
+ sw->poll_clock = !sw->poll_clock;
- if (sw->poll_clock)
- {
- sw->poll_data >>= (sw->poll_mode ? 3 : 1);
- sw->poll_left--;
- }
+ if (sw->poll_clock)
+ {
+ sw->poll_data >>= (sw->poll_mode ? 3 : 1);
+ sw->poll_left--;
+ }
- if (sw->poll_left == 1 && !sw->poll_clock)
- timer_advance_u64(&sw->poll_timer, TIMER_USEC * 160);
- else if (sw->poll_left)
- timer_set_delay_u64(&sw->poll_timer, TIMER_USEC * 5);
+ if (sw->poll_left == 1 && !sw->poll_clock)
+ sw->poll_time += TIMER_USEC * 160;
+ else if (sw->poll_left)
+ sw->poll_time += TIMER_USEC * 5;
+ else
+ sw->poll_time = 0;
+ }
+
+ if (!sw->poll_left)
+ sw->poll_time = 0;
}
static void sw_trigger_timer_over(void *p)
{
+ sw_data *sw = (sw_data *)p;
+
+ sw->trigger_time = 0;
}
static int sw_parity(uint16_t data)
@@ -80,8 +91,8 @@ static void *sw_init()
sw_data *sw = (sw_data *)malloc(sizeof(sw_data));
memset(sw, 0, sizeof(sw_data));
- timer_add(&sw->poll_timer, sw_timer_over, sw, 0);
- timer_add(&sw->trigger_timer, sw_trigger_timer_over, sw, 0);
+ timer_add(sw_timer_over, &sw->poll_time, &sw->poll_time, sw);
+ timer_add(sw_trigger_timer_over, &sw->trigger_time, &sw->trigger_time, sw);
return sw;
}
@@ -101,7 +112,7 @@ static uint8_t sw_read(void *p)
if (!JOYSTICK_PRESENT(0))
return 0xff;
- if (timer_is_enabled(&sw->poll_timer))
+ if (sw->poll_time)
{
if (sw->poll_clock)
temp |= 0x10;
@@ -124,15 +135,17 @@ static uint8_t sw_read(void *p)
static void sw_write(void *p)
{
sw_data *sw = (sw_data *)p;
- int time_since_last = timer_get_remaining_us(&sw->trigger_timer);
+ int time_since_last = sw->trigger_time / TIMER_USEC;
if (!JOYSTICK_PRESENT(0))
return;
+ timer_process();
+
if (!sw->poll_left)
{
sw->poll_clock = 1;
- timer_set_delay_u64(&sw->poll_timer, TIMER_USEC * 40);
+ sw->poll_time = TIMER_USEC * 50;
if (time_since_last > 9900 && time_since_last < 9940)
{
@@ -200,8 +213,10 @@ static void sw_write(void *p)
}
}
}
-
- timer_disable(&sw->trigger_timer);
+
+ sw->trigger_time = 0;
+
+ timer_update_outstanding();
}
static int sw_read_axis(void *p, int axis)
@@ -216,7 +231,7 @@ static void sw_a0_over(void *p)
{
sw_data *sw = (sw_data *)p;
- timer_set_delay_u64(&sw->trigger_timer, TIMER_USEC * 10000);
+ sw->trigger_time = TIMER_USEC * 10000;
}
joystick_if_t joystick_sw_pad =
diff --git a/src/keyboard.c b/src/keyboard.c
index f41d59f..2d3135f 100644
--- a/src/keyboard.c
+++ b/src/keyboard.c
@@ -6,413 +6,243 @@ int keybsendcallback = 0;
typedef struct
{
- uint8_t scancodes_make[8];
- uint8_t scancodes_break[8];
+ int scancodes_make[8];
+ int scancodes_break[8];
} scancode;
/*272 = 256 + 16 fake interim scancodes for disambiguation purposes.*/
static scancode scancode_set1[272] =
{
- { {0}, {0} }, { {0x01, 0}, {0x81, 0} }, { {0x02, 0}, {0x82, 0} }, { {0x03, 0}, {0x83, 0} },
- { {0x04, 0}, {0x84, 0} }, { {0x05, 0}, {0x85, 0} }, { {0x06, 0}, {0x86, 0} }, { {0x07, 0}, {0x87, 0} },
- { {0x08, 0}, {0x88, 0} }, { {0x09, 0}, {0x89, 0} }, { {0x0a, 0}, {0x8a, 0} }, { {0x0b, 0}, {0x8b, 0} },
- { {0x0c, 0}, {0x8c, 0} }, { {0x0d, 0}, {0x8d, 0} }, { {0x0e, 0}, {0x8e, 0} }, { {0x0f, 0}, {0x8f, 0} },
- { {0x10, 0}, {0x90, 0} }, { {0x11, 0}, {0x91, 0} }, { {0x12, 0}, {0x92, 0} }, { {0x13, 0}, {0x93, 0} },
- { {0x14, 0}, {0x94, 0} }, { {0x15, 0}, {0x95, 0} }, { {0x16, 0}, {0x96, 0} }, { {0x17, 0}, {0x97, 0} },
- { {0x18, 0}, {0x98, 0} }, { {0x19, 0}, {0x99, 0} }, { {0x1a, 0}, {0x9a, 0} }, { {0x1b, 0}, {0x9b, 0} },
- { {0x1c, 0}, {0x9c, 0} }, { {0x1d, 0}, {0x9d, 0} }, { {0x1e, 0}, {0x9e, 0} }, { {0x1f, 0}, {0x9f, 0} },
- { {0x20, 0}, {0xa0, 0} }, { {0x21, 0}, {0xa1, 0} }, { {0x22, 0}, {0xa2, 0} }, { {0x23, 0}, {0xa3, 0} },
- { {0x24, 0}, {0xa4, 0} }, { {0x25, 0}, {0xa5, 0} }, { {0x26, 0}, {0xa6, 0} }, { {0x27, 0}, {0xa7, 0} },
- { {0x28, 0}, {0xa8, 0} }, { {0x29, 0}, {0xa9, 0} }, { {0x2a, 0}, {0xaa, 0} }, { {0x2b, 0}, {0xab, 0} },
- { {0x2c, 0}, {0xac, 0} }, { {0x2d, 0}, {0xad, 0} }, { {0x2e, 0}, {0xae, 0} }, { {0x2f, 0}, {0xaf, 0} },
- { {0x30, 0}, {0xb0, 0} }, { {0x31, 0}, {0xb1, 0} }, { {0x32, 0}, {0xb2, 0} }, { {0x33, 0}, {0xb3, 0} },
- { {0x34, 0}, {0xb4, 0} }, { {0x35, 0}, {0xb5, 0} }, { {0x36, 0}, {0xb6, 0} }, { {0x37, 0}, {0xb7, 0} },
- { {0x38, 0}, {0xb8, 0} }, { {0x39, 0}, {0xb9, 0} }, { {0x3a, 0}, {0xba, 0} }, { {0x3b, 0}, {0xbb, 0} },
- { {0x3c, 0}, {0xbc, 0} }, { {0x3d, 0}, {0xbd, 0} }, { {0x3e, 0}, {0xbe, 0} }, { {0x3f, 0}, {0xbf, 0} },
- { {0x40, 0}, {0xc0, 0} }, { {0x41, 0}, {0xc1, 0} }, { {0x42, 0}, {0xc2, 0} }, { {0x43, 0}, {0xc3, 0} },
- { {0x44, 0}, {0xc4, 0} }, { {0x45, 0}, {0xc5, 0} }, { {0x46, 0}, {0xc6, 0} }, { {0x47, 0}, {0xc7, 0} },
- { {0x48, 0}, {0xc8, 0} }, { {0x49, 0}, {0xc9, 0} }, { {0x4a, 0}, {0xca, 0} }, { {0x4b, 0}, {0xcb, 0} },
- { {0x4c, 0}, {0xcc, 0} }, { {0x4d, 0}, {0xcd, 0} }, { {0x4e, 0}, {0xce, 0} }, { {0x4f, 0}, {0xcf, 0} },
- { {0x50, 0}, {0xd0, 0} }, { {0x51, 0}, {0xd1, 0} }, { {0x52, 0}, {0xd2, 0} }, { {0x53, 0}, {0xd3, 0} },
- { {0x54, 0}, {0xd4, 0} }, { {0x55, 0}, {0xd5, 0} }, { {0x56, 0}, {0xd6, 0} }, { {0x57, 0}, {0xd7, 0} },
- { {0x58, 0}, {0xd8, 0} }, { {0x59, 0}, {0xd9, 0} }, { {0x5a, 0}, {0xda, 0} }, { {0x5b, 0}, {0xdb, 0} },
- { {0x5c, 0}, {0xdc, 0} }, { {0x5d, 0}, {0xdd, 0} }, { {0x5e, 0}, {0xde, 0} }, { {0x5f, 0}, {0xdf, 0} },
- { {0x60, 0}, {0xe0, 0} }, { {0x61, 0}, {0xe1, 0} }, { {0x62, 0}, {0xe2, 0} }, { {0x63, 0}, {0xe3, 0} },
- { {0x64, 0}, {0xe4, 0} }, { {0x65, 0}, {0xe5, 0} }, { {0x66, 0}, {0xe6, 0} }, { {0x67, 0}, {0xe7, 0} },
- { {0x68, 0}, {0xe8, 0} }, { {0x69, 0}, {0xe9, 0} }, { {0x6a, 0}, {0xea, 0} }, { {0x6b, 0}, {0xeb, 0} },
- { {0x6c, 0}, {0xec, 0} }, { {0x6d, 0}, {0xed, 0} }, { {0x6e, 0}, {0xee, 0} }, { {0x6f, 0}, {0xef, 0} },
- { {0x70, 0}, {0xf0, 0} }, { {0x71, 0}, {0xf1, 0} }, { {0x72, 0}, {0xf2, 0} }, { {0x73, 0}, {0xf3, 0} },
- { {0x74, 0}, {0xf4, 0} }, { {0x75, 0}, {0xf5, 0} }, { {0x76, 0}, {0xf6, 0} }, { {0x77, 0}, {0xf7, 0} },
- { {0x78, 0}, {0xf8, 0} }, { {0x79, 0}, {0xf9, 0} }, { {0x7a, 0}, {0xfa, 0} }, { {0x7b, 0}, {0xfb, 0} },
- { {0x7c, 0}, {0xfc, 0} }, { {0x7d, 0}, {0xfd, 0} }, { {0x7e, 0}, {0xfe, 0} }, { {0x7f, 0}, {0xff, 0} },
+ { {-1}, {-1} }, { {0x01, -1}, {0x81, -1} }, { {0x02, -1}, {0x82, -1} }, { {0x03, -1}, {0x83, -1} },
+ { {0x04, -1}, {0x84, -1} }, { {0x05, -1}, {0x85, -1} }, { {0x06, -1}, {0x86, -1} }, { {0x07, -1}, {0x87, -1} },
+ { {0x08, -1}, {0x88, -1} }, { {0x09, -1}, {0x89, -1} }, { {0x0a, -1}, {0x8a, -1} }, { {0x0b, -1}, {0x8b, -1} },
+ { {0x0c, -1}, {0x8c, -1} }, { {0x0d, -1}, {0x8d, -1} }, { {0x0e, -1}, {0x8e, -1} }, { {0x0f, -1}, {0x8f, -1} },
+ { {0x10, -1}, {0x90, -1} }, { {0x11, -1}, {0x91, -1} }, { {0x12, -1}, {0x92, -1} }, { {0x13, -1}, {0x93, -1} },
+ { {0x14, -1}, {0x94, -1} }, { {0x15, -1}, {0x95, -1} }, { {0x16, -1}, {0x96, -1} }, { {0x17, -1}, {0x97, -1} },
+ { {0x18, -1}, {0x98, -1} }, { {0x19, -1}, {0x99, -1} }, { {0x1a, -1}, {0x9a, -1} }, { {0x1b, -1}, {0x9b, -1} },
+ { {0x1c, -1}, {0x9c, -1} }, { {0x1d, -1}, {0x9d, -1} }, { {0x1e, -1}, {0x9e, -1} }, { {0x1f, -1}, {0x9f, -1} },
+ { {0x20, -1}, {0xa0, -1} }, { {0x21, -1}, {0xa1, -1} }, { {0x22, -1}, {0xa2, -1} }, { {0x23, -1}, {0xa3, -1} },
+ { {0x24, -1}, {0xa4, -1} }, { {0x25, -1}, {0xa5, -1} }, { {0x26, -1}, {0xa6, -1} }, { {0x27, -1}, {0xa7, -1} },
+ { {0x28, -1}, {0xa8, -1} }, { {0x29, -1}, {0xa9, -1} }, { {0x2a, -1}, {0xaa, -1} }, { {0x2b, -1}, {0xab, -1} },
+ { {0x2c, -1}, {0xac, -1} }, { {0x2d, -1}, {0xad, -1} }, { {0x2e, -1}, {0xae, -1} }, { {0x2f, -1}, {0xaf, -1} },
+ { {0x30, -1}, {0xb0, -1} }, { {0x31, -1}, {0xb1, -1} }, { {0x32, -1}, {0xb2, -1} }, { {0x33, -1}, {0xb3, -1} },
+ { {0x34, -1}, {0xb4, -1} }, { {0x35, -1}, {0xb5, -1} }, { {0x36, -1}, {0xb6, -1} }, { {0x37, -1}, {0xb7, -1} },
+ { {0x38, -1}, {0xb8, -1} }, { {0x39, -1}, {0xb9, -1} }, { {0x3a, -1}, {0xba, -1} }, { {0x3b, -1}, {0xbb, -1} },
+ { {0x3c, -1}, {0xbc, -1} }, { {0x3d, -1}, {0xbd, -1} }, { {0x3e, -1}, {0xbe, -1} }, { {0x3f, -1}, {0xbf, -1} },
+ { {0x40, -1}, {0xc0, -1} }, { {0x41, -1}, {0xc1, -1} }, { {0x42, -1}, {0xc2, -1} }, { {0x43, -1}, {0xc3, -1} },
+ { {0x44, -1}, {0xc4, -1} }, { {0x45, -1}, {0xc5, -1} }, { {0x46, -1}, {0xc6, -1} }, { {0x47, -1}, {0xc7, -1} },
+ { {0x48, -1}, {0xc8, -1} }, { {0x49, -1}, {0xc9, -1} }, { {0x4a, -1}, {0xca, -1} }, { {0x4b, -1}, {0xcb, -1} },
+ { {0x4c, -1}, {0xcc, -1} }, { {0x4d, -1}, {0xcd, -1} }, { {0x4e, -1}, {0xce, -1} }, { {0x4f, -1}, {0xcf, -1} },
+ { {0x50, -1}, {0xd0, -1} }, { {0x51, -1}, {0xd1, -1} }, { {0x52, -1}, {0xd2, -1} }, { {0x53, -1}, {0xd3, -1} },
+ { {0x54, -1}, {0xd4, -1} }, { {0x55, -1}, {0xd5, -1} }, { {0x56, -1}, {0xd6, -1} }, { {0x57, -1}, {0xd7, -1} },
+ { {0x58, -1}, {0xd8, -1} }, { {0x59, -1}, {0xd9, -1} }, { {0x5a, -1}, {0xda, -1} }, { {0x5b, -1}, {0xdb, -1} },
+ { {0x5c, -1}, {0xdc, -1} }, { {0x5d, -1}, {0xdd, -1} }, { {0x5e, -1}, {0xde, -1} }, { {0x5f, -1}, {0xdf, -1} },
+ { {0x60, -1}, {0xe0, -1} }, { {0x61, -1}, {0xe1, -1} }, { {0x62, -1}, {0xe2, -1} }, { {0x63, -1}, {0xe3, -1} },
+ { {0x64, -1}, {0xe4, -1} }, { {0x65, -1}, {0xe5, -1} }, { {0x66, -1}, {0xe6, -1} }, { {0x67, -1}, {0xe7, -1} },
+ { {0x68, -1}, {0xe8, -1} }, { {0x69, -1}, {0xe9, -1} }, { {0x6a, -1}, {0xea, -1} }, { {0x6b, -1}, {0xeb, -1} },
+ { {0x6c, -1}, {0xec, -1} }, { {0x6d, -1}, {0xed, -1} }, { {0x6e, -1}, {0xee, -1} }, { {0x6f, -1}, {0xef, -1} },
+ { {0x70, -1}, {0xf0, -1} }, { {0x71, -1}, {0xf1, -1} }, { {0x72, -1}, {0xf2, -1} }, { {0x73, -1}, {0xf3, -1} },
+ { {0x74, -1}, {0xf4, -1} }, { {0x75, -1}, {0xf5, -1} }, { {0x76, -1}, {0xf6, -1} }, { {0x77, -1}, {0xf7, -1} },
+ { {0x78, -1}, {0xf8, -1} }, { {0x79, -1}, {0xf9, -1} }, { {0x7a, -1}, {0xfa, -1} }, { {0x7b, -1}, {0xfb, -1} },
+ { {0x7c, -1}, {0xfc, -1} }, { {0x7d, -1}, {0xfd, -1} }, { {0x7e, -1}, {0xfe, -1} }, { {0x7f, -1}, {0xff, -1} },
- { {0x80, 0}, {0} }, { {0x81, 0}, {0} }, { {0x82, 0}, {0} }, { {0xe0, 0x03, 0}, {0xe0, 0x83, 0} }, /*80*/
- { {0xe0, 0x04, 0}, {0xe0, 0x84, 0} }, { {0x85, 0}, {0} }, { {0x86, 0}, {0} }, { {0x87, 0}, {0} }, /*84*/
- { {0xe0, 0x08, 0}, {0xe0, 0x88, 0} }, { {0xe0, 0x09, 0}, {0xe0, 0x89, 0} }, { {0xe0, 0x0a, 0}, {0xe0, 0x8a, 0} }, { {0xe0, 0x0b, 0}, {0xe0, 0x8b, 0} }, /*88*/
- { {0xe0, 0x0c, 0}, {0xe0, 0x8c, 0} }, { {0}, {0} }, { {0xe0, 0x0e, 0}, {0xe0, 0x8e, 0} }, { {0xe0, 0x0f, 0}, {0xe0, 0x8f, 0} }, /*8c*/
- { {0xe0, 0x10, 0}, {0xe0, 0x90, 0} }, { {0xe0, 0x11, 0}, {0xe0, 0x91, 0} }, { {0xe0, 0x12, 0}, {0xe0, 0x92, 0} }, { {0xe0, 0x13, 0}, {0xe0, 0x93, 0} }, /*90*/
- { {0xe0, 0x14, 0}, {0xe0, 0x94, 0} }, { {0xe0, 0x15, 0}, {0xe0, 0x95, 0} }, { {0xe0, 0x16, 0}, {0xe0, 0x96, 0} }, { {0xe0, 0x17, 0}, {0xe0, 0x97, 0} }, /*94*/
- { {0xe0, 0x18, 0}, {0xe0, 0x98, 0} }, { {0xe0, 0x19, 0}, {0xe0, 0x99, 0} }, { {0xe0, 0x1a, 0}, {0xe0, 0x9a, 0} }, { {0xe0, 0x1b, 0}, {0xe0, 0x9b, 0} }, /*98*/
- { {0xe0, 0x1c, 0}, {0xe0, 0x9c, 0} }, { {0xe0, 0x1d, 0}, {0xe0, 0x9d, 0} }, { {0xe0, 0x1e, 0}, {0xe0, 0x9e, 0} }, { {0xe0, 0x1f, 0}, {0xe0, 0x9f, 0} }, /*9c*/
- { {0xe0, 0x20, 0}, {0xe0, 0xa0, 0} }, { {0xe0, 0x21, 0}, {0xe0, 0xa1, 0} }, { {0xe0, 0x22, 0}, {0xe0, 0xa2, 0} }, { {0xe0, 0x23, 0}, {0xe0, 0xa3, 0} }, /*a0*/
- { {0xe0, 0x24, 0}, {0xe0, 0xa4, 0} }, { {0xe0, 0x25, 0}, {0xe0, 0xa5, 0} }, { {0xe0, 0x26, 0}, {0xe0, 0xa6, 0} }, { {0}, {0} }, /*a4*/
- { {0}, {0} }, { {0}, {0} }, { {0xe0, 0x2a, 0}, {0xe0, 0xaa, 0} }, { {0}, {0} }, /*a8*/
- { {0xe0, 0x2c, 0}, {0xe0, 0xac, 0} }, { {0xe0, 0x2d, 0}, {0xe0, 0xad, 0} }, { {0xe0, 0x2e, 0}, {0xe0, 0xae, 0} }, { {0xe0, 0x2f, 0}, {0xe0, 0xaf, 0} }, /*ac*/
- { {0xe0, 0x30, 0}, {0xe0, 0xb0, 0} }, { {0xe0, 0x31, 0}, {0xe0, 0xb1, 0} }, { {0xe0, 0x32, 0}, {0xe0, 0xb2, 0} }, { {0}, {0} }, /*b0*/
- { {0xe0, 0x34, 0}, {0xe0, 0xb4, 0} }, { {0xe0, 0x35, 0}, {0xe0, 0xb5, 0} }, { {0xe0, 0x36, 0}, {0xe0, 0xb6, 0} }, { {0xe0, 0x37, 0}, {0xe0, 0xb7, 0} }, /*b4*/
- { {0xe0, 0x38, 0}, {0xe0, 0xb8, 0} }, { {0}, {0} }, { {0xe0, 0x3a, 0}, {0xe0, 0xba, 0} }, { {0xe0, 0x3b, 0}, {0xe0, 0xbb, 0} }, /*b8*/
- { {0xe0, 0x3c, 0}, {0xe0, 0xbc, 0} }, { {0xe0, 0x3d, 0}, {0xe0, 0xbd, 0} }, { {0xe0, 0x3e, 0}, {0xe0, 0xbe, 0} }, { {0xe0, 0x3f, 0}, {0xe0, 0xbf, 0} }, /*bc*/
- { {0xe0, 0x40, 0}, {0xe0, 0xc0, 0} }, { {0xe0, 0x41, 0}, {0xe0, 0xc1, 0} }, { {0xe0, 0x42, 0}, {0xe0, 0xc2, 0} }, { {0xe0, 0x43, 0}, {0xe0, 0xc3, 0} }, /*c0*/
- { {0xe0, 0x44, 0}, {0xe0, 0xc4, 0} }, { {0}, {0} }, { {0xe0, 0x46, 0}, {0xe0, 0xc6, 0} }, { {0xe0, 0x47, 0}, {0xe0, 0xc7, 0} }, /*c4*/
- { {0xe0, 0x48, 0}, {0xe0, 0xc8, 0} }, { {0xe0, 0x49, 0}, {0xe0, 0xc9, 0} }, { {0}, {0} }, { {0xe0, 0x4b, 0}, {0xe0, 0xcb, 0} }, /*c8*/
- { {0xe0, 0x4c, 0}, {0xe0, 0xcc, 0} }, { {0xe0, 0x4d, 0}, {0xe0, 0xcd, 0} }, { {0xe0, 0x4e, 0}, {0xe0, 0xce, 0} }, { {0xe0, 0x4f, 0}, {0xe0, 0xcf, 0} }, /*cc*/
- { {0xe0, 0x50, 0}, {0xe0, 0xd0, 0} }, { {0xe0, 0x51, 0}, {0xe0, 0xd1, 0} }, { {0xe0, 0x52, 0}, {0xe0, 0xd2, 0} }, { {0xe0, 0x53, 0}, {0xe0, 0xd3, 0} }, /*d0*/
- { {0xd4, 0}, {0} }, { {0xe0, 0x55, 0}, {0xe0, 0xd5, 0} }, { {0}, {0} }, { {0xe0, 0x57, 0}, {0xe0, 0xd7, 0} }, /*d4*/
- { {0xe0, 0x58, 0}, {0xe0, 0xd8, 0} }, { {0xe0, 0x59, 0}, {0xe0, 0xd9, 0} }, { {0xe0, 0x5a, 0}, {0xe0, 0xaa, 0} }, { {0xe0, 0x5b, 0}, {0xe0, 0xdb, 0} }, /*d8*/
- { {0xe0, 0x5c, 0}, {0xe0, 0xdc, 0} }, { {0xe0, 0x5d, 0}, {0xe0, 0xdd, 0} }, { {0xe0, 0x5e, 0}, {0xe0, 0xee, 0} }, { {0xe0, 0x5f, 0}, {0xe0, 0xdf, 0} }, /*dc*/
- { {0}, {0} }, { {0xe0, 0x61, 0}, {0xe0, 0xe1, 0} }, { {0xe0, 0x62, 0}, {0xe0, 0xe2, 0} }, { {0xe0, 0x63, 0}, {0xe0, 0xe3, 0} }, /*e0*/
- { {0xe0, 0x64, 0}, {0xe0, 0xe4, 0} }, { {0xe0, 0x65, 0}, {0xe0, 0xe5, 0} }, { {0xe0, 0x66, 0}, {0xe0, 0xe6, 0} }, { {0xe0, 0x67, 0}, {0xe0, 0xe7, 0} }, /*e4*/
- { {0xe0, 0x68, 0}, {0xe0, 0xe8, 0} }, { {0xe0, 0x69, 0}, {0xe0, 0xe9, 0} }, { {0xe0, 0x6a, 0}, {0xe0, 0xea, 0} }, { {0xe0, 0x6b, 0}, {0xe0, 0xeb, 0} }, /*e8*/
- { {0xe0, 0x6c, 0}, {0xe0, 0xec, 0} }, { {0xe0, 0x6d, 0}, {0xe0, 0xed, 0} }, { {0xe0, 0x6e, 0}, {0xe0, 0xee, 0} }, { {0}, {0} }, /*ec*/
- { {0xe0, 0x70, 0}, {0xe0, 0xf0, 0} }, { {0xf1, 0}, {0} }, { {0xf2, 0}, {0} }, { {0xe0, 0x73, 0}, {0xe0, 0xf3, 0} }, /*f0*/
- { {0xe0, 0x74, 0}, {0xe0, 0xf4, 0} }, { {0xe0, 0x75, 0}, {0xe0, 0xf5, 0} }, { {0}, {0} }, { {0xe0, 0x77, 0}, {0xe0, 0xf7, 0} }, /*f4*/
- { {0xe0, 0x78, 0}, {0xe0, 0xf8, 0} }, { {0xe0, 0x79, 0}, {0xe0, 0xf9, 0} }, { {0xe0, 0x7a, 0}, {0xe0, 0xfa, 0} }, { {0xe0, 0x7b, 0}, {0xe0, 0xfb, 0} }, /*f8*/
- { {0xe0, 0x7c, 0}, {0xe0, 0xfc, 0} }, { {0xe0, 0x7d, 0}, {0xe0, 0xfd, 0} }, { {0xe0, 0x7e, 0}, {0xe0, 0xfe, 0} }, { {0xe1, 0x1d, 0x45, 0xe1, 0x9d, 0xc5, 0}, {0} }, /*fc*/
- { {0}, {0} }, { {0xe0, 0x01, 0}, {0xe0, 0x81, 0} }, { {0xe0, 0x02, 0}, {0xe0, 0x82, 0} }, { {0}, {0} }, /*100*/
- { {0}, {0} }, { {0xe0, 0x05, 0}, {0xe0, 0x85, 0} }, { {0xe0, 0x06, 0}, {0xe0, 0x86, 0} }, { {0xe0, 0x07, 0}, {0xe0, 0x87, 0} }, /*104*/
- { {0xe0, 0x71, 0}, {0xe0, 0xf1, 0} }, { {0xe0, 0x72, 0}, {0xe0, 0xf2, 0} }, { {0xe0, 0x7f, 0}, {0xe0, 0xff, 0} }, { {0xe0, 0xe1, 0}, {0} }, /*108*/
- { {0xe0, 0xee, 0}, {0} }, { {0xe0, 0xf1, 0}, {0} }, { {0xe0, 0xfe, 0}, {0} }, { {0xe0, 0xff, 0}, {0} } /*10c*/
-};
-
-/*272 = 256 + 16 fake interim scancodes for disambiguation purposes.*/
-static scancode scancode_set2[272] =
-{
- { {0}, {0} }, { {0x76, 0}, {0xf0, 0x76, 0} }, { {0x16, 0}, {0xf0, 0x16, 0} }, { {0x1e, 0}, {0xf0, 0x1e, 0} },
- { {0x26, 0}, {0xf0, 0x26, 0} }, { {0x25, 0}, {0xf0, 0x25, 0} }, { {0x2e, 0}, {0xf0, 0x2e, 0} }, { {0x36, 0}, {0xf0, 0x36, 0} },
- { {0x3d, 0}, {0xf0, 0x3d, 0} }, { {0x3e, 0}, {0xf0, 0x3e, 0} }, { {0x46, 0}, {0xf0, 0x46, 0} }, { {0x45, 0}, {0xf0, 0x45, 0} },
- { {0x4e, 0}, {0xf0, 0x4e, 0} }, { {0x55, 0}, {0xf0, 0x55, 0} }, { {0x66, 0}, {0xf0, 0x66, 0} }, { {0x0d, 0}, {0xf0, 0x0d, 0} },
- { {0x15, 0}, {0xf0, 0x15, 0} }, { {0x1d, 0}, {0xf0, 0x1d, 0} }, { {0x24, 0}, {0xf0, 0x24, 0} }, { {0x2d, 0}, {0xf0, 0x2d, 0} },
- { {0x2c, 0}, {0xf0, 0x2c, 0} }, { {0x35, 0}, {0xf0, 0x35, 0} }, { {0x3c, 0}, {0xf0, 0x3c, 0} }, { {0x43, 0}, {0xf0, 0x43, 0} },
- { {0x44, 0}, {0xf0, 0x44, 0} }, { {0x4d, 0}, {0xf0, 0x4d, 0} }, { {0x54, 0}, {0xf0, 0x54, 0} }, { {0x5b, 0}, {0xf0, 0x5b, 0} },
- { {0x5a, 0}, {0xf0, 0x5a, 0} }, { {0x14, 0}, {0xf0, 0x14, 0} }, { {0x1c, 0}, {0xf0, 0x1c, 0} }, { {0x1b, 0}, {0xf0, 0x1b, 0} },
- { {0x23, 0}, {0xf0, 0x23, 0} }, { {0x2b, 0}, {0xf0, 0x2b, 0} }, { {0x34, 0}, {0xf0, 0x34, 0} }, { {0x33, 0}, {0xf0, 0x33, 0} },
- { {0x3b, 0}, {0xf0, 0x3b, 0} }, { {0x42, 0}, {0xf0, 0x42, 0} }, { {0x4b, 0}, {0xf0, 0x4b, 0} }, { {0x4c, 0}, {0xf0, 0x4c, 0} },
- { {0x52, 0}, {0xf0, 0x52, 0} }, { {0x0e, 0}, {0xf0, 0x0e, 0} }, { {0x12, 0}, {0xf0, 0x12, 0} }, { {0x5d, 0}, {0xf0, 0x5d, 0} },
- { {0x1a, 0}, {0xf0, 0x1a, 0} }, { {0x22, 0}, {0xf0, 0x22, 0} }, { {0x21, 0}, {0xf0, 0x21, 0} }, { {0x2a, 0}, {0xf0, 0x2a, 0} },
- { {0x32, 0}, {0xf0, 0x32, 0} }, { {0x31, 0}, {0xf0, 0x31, 0} }, { {0x3a, 0}, {0xf0, 0x3a, 0} }, { {0x41, 0}, {0xf0, 0x41, 0} },
- { {0x49, 0}, {0xf0, 0x49, 0} }, { {0x4a, 0}, {0xf0, 0x4a, 0} }, { {0x59, 0}, {0xf0, 0x59, 0} }, { {0x7c, 0}, {0xf0, 0x7c, 0} },
- { {0x11, 0}, {0xf0, 0x11, 0} }, { {0x29, 0}, {0xf0, 0x29, 0} }, { {0x58, 0}, {0xf0, 0x58, 0} }, { {0x05, 0}, {0xf0, 0x05, 0} },
- { {0x06, 0}, {0xf0, 0x06, 0} }, { {0x04, 0}, {0xf0, 0x04, 0} }, { {0x0c, 0}, {0xf0, 0x0c, 0} }, { {0x03, 0}, {0xf0, 0x03, 0} },
- { {0x0b, 0}, {0xf0, 0x0b, 0} }, { {0x83, 0}, {0xf0, 0x83, 0} }, { {0x0a, 0}, {0xf0, 0x0a, 0} }, { {0x01, 0}, {0xf0, 0x01, 0} },
- { {0x09, 0}, {0xf0, 0x09, 0} }, { {0x77, 0}, {0xf0, 0x77, 0} }, { {0x7e, 0}, {0xf0, 0x7e, 0} }, { {0x6c, 0}, {0xf0, 0x6c, 0} },
- { {0x75, 0}, {0xf0, 0x75, 0} }, { {0x7d, 0}, {0xf0, 0x7d, 0} }, { {0x7b, 0}, {0xf0, 0x7b, 0} }, { {0x6b, 0}, {0xf0, 0x6b, 0} },
- { {0x73, 0}, {0xf0, 0x73, 0} }, { {0x74, 0}, {0xf0, 0x74, 0} }, { {0x79, 0}, {0xf0, 0x79, 0} }, { {0x69, 0}, {0xf0, 0x69, 0} },
- { {0x72, 0}, {0xf0, 0x72, 0} }, { {0x7a, 0}, {0xf0, 0x7a, 0} }, { {0x70, 0}, {0xf0, 0x70, 0} }, { {0x71, 0}, {0xf0, 0x71, 0} },
- { {0x84, 0}, {0xf0, 0x84, 0} }, { {0, 0}, {0, 0} }, { {0x61, 0}, {0xf0, 0x61, 0} }, { {0x78, 0}, {0xf0, 0x78, 0} },
- { {0x07, 0}, {0xf0, 0x07, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
-
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0xe0, 0x5a, 0}, {0xe0, 0xf0, 0x5a, 0} }, { {0xe0, 0x14, 0}, {0xe0, 0xf0, 0x14, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0xe0, 0x4a, 0}, {0xe0, 0xf0, 0x4a, 0} }, { {0, 0}, {0, 0} }, { {0xe0, 0x7c, 0}, {0xe0, 0xf0, 0x7c, 0} },
- { {0xe0, 0x11, 0}, {0xe0, 0xf0, 0x11, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0xe0, 0x6c, 0}, {0xe0, 0xf0, 0x6c, 0} },
- { {0xe0, 0x75, 0}, {0xe0, 0xf0, 0x75, 0} }, { {0xe0, 0x7d, 0}, {0xe0, 0xf0, 0x7d, 0} }, { {0, 0}, {0, 0} }, { {0xe0, 0x6b, 0}, {0xe0, 0xf0, 0x6b, 0} },
- { {0, 0}, {0, 0} }, { {0xe0, 0x74, 0}, {0xe0, 0xf0, 0x74, 0} }, { {0, 0}, {0, 0} }, { {0xe0, 0x69, 0}, {0xe0, 0xf0, 0x69, 0} },
- { {0xe0, 0x72, 0}, {0xe0, 0xf0, 0x72, 0} }, { {0xe0, 0x7a, 0}, {0xe0, 0xf0, 0x7a, 0} }, { {0xe0, 0x70, 0}, {0xe0, 0xf0, 0x70, 0} }, { {0xe0, 0x71, 0}, {0xe0, 0xf0, 0x71, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0xe0, 0x1f, 0}, {0xe0, 0xf0, 0x1f, 0} },
- { {0xe0, 0x27, 0}, {0xe0, 0xf0, 0x27, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
-
- { {0}, {0} }, { {0xe0, 0x01, 0}, {0xe0, 0xf0, 0x01, 0} }, { {0xe0, 0x02, 0}, {0xe0, 0xf0, 0x02, 0} }, { {0}, {0} }, /*100*/
- { {0}, {0} }, { {0xe0, 0x05, 0}, {0xe0, 0xf0, 0x15, 0} }, { {0xe0, 0x06, 0}, {0xe0, 0xf0, 0x06, 0} }, { {0xe0, 0x07, 0}, {0xe0, 0xf0, 0x07, 0} }, /*104*/
- { {0xe0, 0x71, 0}, {0xe0, 0xf0, 0x71, 0} }, { {0xe0, 0x72, 0}, {0xe0, 0xf0, 0x72, 0} }, { {0xe0, 0x7f, 0}, {0xe0, 0xf0, 0x7f, 0} }, { {0xe0, 0xe1, 0}, {0} }, /*108*/
- { {0xe0, 0xee, 0}, {0} }, { {0xe0, 0xf1, 0}, {0} }, { {0xe0, 0xfe, 0}, {0} }, { {0xe0, 0xff, 0}, {0} } /*10c*/
-};
-
-/*272 = 256 + 16 fake interim scancodes for disambiguation purposes.*/
-static scancode scancode_set3[272] =
-{
- { {0}, {0} }, { {0x76, 0}, {0xf0, 0x76, 0} }, { {0x16, 0}, {0xf0, 0x16, 0} }, { {0x1e, 0}, {0xf0, 0x1e, 0} },
- { {0x26, 0}, {0xf0, 0x26, 0} }, { {0x25, 0}, {0xf0, 0x25, 0} }, { {0x2e, 0}, {0xf0, 0x2e, 0} }, { {0x36, 0}, {0xf0, 0x36, 0} },
- { {0x3d, 0}, {0xf0, 0x3d, 0} }, { {0x3e, 0}, {0xf0, 0x3e, 0} }, { {0x46, 0}, {0xf0, 0x46, 0} }, { {0x45, 0}, {0xf0, 0x45, 0} },
- { {0x4e, 0}, {0xf0, 0x4e, 0} }, { {0x55, 0}, {0xf0, 0x55, 0} }, { {0x66, 0}, {0xf0, 0x66, 0} }, { {0x0d, 0}, {0xf0, 0x0d, 0} },
- { {0x15, 0}, {0xf0, 0x15, 0} }, { {0x1d, 0}, {0xf0, 0x1d, 0} }, { {0x24, 0}, {0xf0, 0x24, 0} }, { {0x2d, 0}, {0xf0, 0x2d, 0} },
- { {0x2c, 0}, {0xf0, 0x2c, 0} }, { {0x35, 0}, {0xf0, 0x35, 0} }, { {0x3c, 0}, {0xf0, 0x3c, 0} }, { {0x43, 0}, {0xf0, 0x43, 0} },
- { {0x44, 0}, {0xf0, 0x44, 0} }, { {0x4d, 0}, {0xf0, 0x4d, 0} }, { {0x54, 0}, {0xf0, 0x54, 0} }, { {0x5b, 0}, {0xf0, 0x5b, 0} },
- { {0x5a, 0}, {0xf0, 0x5a, 0} }, { {0x19, 0}, {0xf0, 0x19, 0} }, { {0x1c, 0}, {0xf0, 0x1c, 0} }, { {0x1b, 0}, {0xf0, 0x1b, 0} },
- { {0x23, 0}, {0xf0, 0x23, 0} }, { {0x2b, 0}, {0xf0, 0x2b, 0} }, { {0x34, 0}, {0xf0, 0x34, 0} }, { {0x33, 0}, {0xf0, 0x33, 0} },
- { {0x3b, 0}, {0xf0, 0x3b, 0} }, { {0x42, 0}, {0xf0, 0x42, 0} }, { {0x4b, 0}, {0xf0, 0x4b, 0} }, { {0x4c, 0}, {0xf0, 0x4c, 0} },
- { {0x52, 0}, {0xf0, 0x52, 0} }, { {0x0e, 0}, {0xf0, 0x0e, 0} }, { {0x12, 0}, {0xf0, 0x12, 0} }, { {0x5c, 0}, {0xf0, 0x5c, 0} },
- { {0x1a, 0}, {0xf0, 0x1a, 0} }, { {0x22, 0}, {0xf0, 0x22, 0} }, { {0x21, 0}, {0xf0, 0x21, 0} }, { {0x2a, 0}, {0xf0, 0x2a, 0} },
- { {0x32, 0}, {0xf0, 0x32, 0} }, { {0x31, 0}, {0xf0, 0x31, 0} }, { {0x3a, 0}, {0xf0, 0x3a, 0} }, { {0x41, 0}, {0xf0, 0x41, 0} },
- { {0x49, 0}, {0xf0, 0x49, 0} }, { {0x4a, 0}, {0xf0, 0x4a, 0} }, { {0x59, 0}, {0xf0, 0x59, 0} }, { {0x7c, 0}, {0xf0, 0x7c, 0} },
- { {0x11, 0}, {0xf0, 0x11, 0} }, { {0x29, 0}, {0xf0, 0x29, 0} }, { {0x14, 0}, {0xf0, 0x14, 0} }, { {0x05, 0}, {0xf0, 0x05, 0} },
- { {0x06, 0}, {0xf0, 0x06, 0} }, { {0x04, 0}, {0xf0, 0x04, 0} }, { {0x0c, 0}, {0xf0, 0x0c, 0} }, { {0x03, 0}, {0xf0, 0x03, 0} },
- { {0x0b, 0}, {0xf0, 0x0b, 0} }, { {0x83, 0}, {0xf0, 0x83, 0} }, { {0x0a, 0}, {0xf0, 0x0a, 0} }, { {0x01, 0}, {0xf0, 0x01, 0} },
- { {0x09, 0}, {0xf0, 0x09, 0} }, { {0x77, 0}, {0xf0, 0x77, 0} }, { {0x7e, 0}, {0xf0, 0x7e, 0} }, { {0x6c, 0}, {0xf0, 0x6c, 0} },
- { {0x75, 0}, {0xf0, 0x75, 0} }, { {0x7d, 0}, {0xf0, 0x7d, 0} }, { {0x7b, 0}, {0xf0, 0x7b, 0} }, { {0x6b, 0}, {0xf0, 0x6b, 0} },
- { {0x73, 0}, {0xf0, 0x73, 0} }, { {0x74, 0}, {0xf0, 0x74, 0} }, { {0x79, 0}, {0xf0, 0x79, 0} }, { {0x69, 0}, {0xf0, 0x69, 0} },
- { {0x72, 0}, {0xf0, 0x72, 0} }, { {0x7a, 0}, {0xf0, 0x7a, 0} }, { {0x70, 0}, {0xf0, 0x70, 0} }, { {0x71, 0}, {0xf0, 0x71, 0} },
- { {0x84, 0}, {0xf0, 0x84, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0x78, 0}, {0xf0, 0x78, 0} },
- { {0x07, 0}, {0xf0, 0x07, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
-
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0x79, 0}, {0xf0, 0x79, 0} }, { {0x58, 0}, {0xf0, 0x58, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0x77, 0}, {0xf0, 0x77, 0} }, { {0, 0}, {0, 0} }, { {0x57, 0}, {0xf0, 0x57, 0} },
- { {0x39, 0}, {0xf0, 0x39, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0x6e, 0}, {0xf0, 0x6e, 0} },
- { {0x63, 0}, {0xf0, 0x63, 0} }, { {0x6f, 0}, {0xf0, 0x6f, 0} }, { {0, 0}, {0, 0} }, { {0x61, 0}, {0xf0, 0x61, 0} },
- { {0, 0}, {0, 0} }, { {0x6a, 0}, {0xf0, 0x6a, 0} }, { {0, 0}, {0, 0} }, { {0x65, 0}, {0xf0, 0x65, 0} },
- { {0x60, 0}, {0xf0, 0x60, 0} }, { {0x6d, 0}, {0xf0, 0x6d, 0} }, { {0x67, 0}, {0xf0, 0x67, 0} }, { {0x64, 0}, {0xf0, 0x64, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0x8b, 0}, {0xf0, 0x8b, 0} },
- { {0x8c, 0}, {0xf0, 0x8c, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
-
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
- { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} }, { {0, 0}, {0, 0} },
+ { {0x80, -1}, {-1} }, { {0x81, -1}, {-1} }, { {0x82, -1}, {-1} }, { {0xe0, 0x03, -1}, {0xe0, 0x83, -1} }, /*80*/
+ { {0xe0, 0x04, -1}, {0xe0, 0x84, -1} }, { {0x85, -1}, {-1} }, { {0x86, -1}, {-1} }, { {0x87, -1}, {-1} }, /*84*/
+ { {0xe0, 0x08, -1}, {0xe0, 0x88, -1} }, { {0xe0, 0x09, -1}, {0xe0, 0x89, -1} }, { {0xe0, 0x0a, -1}, {0xe0, 0x8a, -1} }, { {0xe0, 0x0b, -1}, {0xe0, 0x8b, -1} }, /*88*/
+ { {0xe0, 0x0c, -1}, {0xe0, 0x8c, -1} }, { {-1}, {-1} }, { {0xe0, 0x0e, -1}, {0xe0, 0x8e, -1} }, { {0xe0, 0x0f, -1}, {0xe0, 0x8f, -1} }, /*8c*/
+ { {0xe0, 0x10, -1}, {0xe0, 0x90, -1} }, { {0xe0, 0x11, -1}, {0xe0, 0x91, -1} }, { {0xe0, 0x12, -1}, {0xe0, 0x92, -1} }, { {0xe0, 0x13, -1}, {0xe0, 0x93, -1} }, /*90*/
+ { {0xe0, 0x14, -1}, {0xe0, 0x94, -1} }, { {0xe0, 0x15, -1}, {0xe0, 0x95, -1} }, { {0xe0, 0x16, -1}, {0xe0, 0x96, -1} }, { {0xe0, 0x17, -1}, {0xe0, 0x97, -1} }, /*94*/
+ { {0xe0, 0x18, -1}, {0xe0, 0x98, -1} }, { {0xe0, 0x19, -1}, {0xe0, 0x99, -1} }, { {0xe0, 0x1a, -1}, {0xe0, 0x9a, -1} }, { {0xe0, 0x1b, -1}, {0xe0, 0x9b, -1} }, /*98*/
+ { {0xe0, 0x1c, -1}, {0xe0, 0x9c, -1} }, { {0xe0, 0x1d, -1}, {0xe0, 0x9d, -1} }, { {0xe0, 0x1e, -1}, {0xe0, 0x9e, -1} }, { {0xe0, 0x1f, -1}, {0xe0, 0x9f, -1} }, /*9c*/
+ { {0xe0, 0x20, -1}, {0xe0, 0xa0, -1} }, { {0xe0, 0x21, -1}, {0xe0, 0xa1, -1} }, { {0xe0, 0x22, -1}, {0xe0, 0xa2, -1} }, { {0xe0, 0x23, -1}, {0xe0, 0xa3, -1} }, /*a0*/
+ { {0xe0, 0x24, -1}, {0xe0, 0xa4, -1} }, { {0xe0, 0x25, -1}, {0xe0, 0xa5, -1} }, { {0xe0, 0x26, -1}, {0xe0, 0xa6, -1} }, { {-1}, {-1} }, /*a4*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {0xe0, 0x2a, -1}, {0xe0, 0xaa, -1} }, { {-1}, {-1} }, /*a8*/
+ { {0xe0, 0x2c, -1}, {0xe0, 0xac, -1} }, { {0xe0, 0x2d, -1}, {0xe0, 0xad, -1} }, { {0xe0, 0x2e, -1}, {0xe0, 0xae, -1} }, { {0xe0, 0x2f, -1}, {0xe0, 0xaf, -1} }, /*ac*/
+ { {0xe0, 0x30, -1}, {0xe0, 0xb0, -1} }, { {0xe0, 0x31, -1}, {0xe0, 0xb1, -1} }, { {0xe0, 0x32, -1}, {0xe0, 0xb2, -1} }, { {-1}, {-1} }, /*b0*/
+ { {0xe0, 0x34, -1}, {0xe0, 0xb4, -1} }, { {0xe0, 0x35, -1}, {0xe0, 0xb5, -1} }, { {0xe0, 0x36, -1}, {0xe0, 0xb6, -1} }, { {0xe0, 0x37, -1}, {0xe0, 0xb7, -1} }, /*b4*/
+ { {0xe0, 0x38, -1}, {0xe0, 0xb8, -1} }, { {-1}, {-1} }, { {0xe0, 0x3a, -1}, {0xe0, 0xba, -1} }, { {0xe0, 0x3b, -1}, {0xe0, 0xbb, -1} }, /*b8*/
+ { {0xe0, 0x3c, -1}, {0xe0, 0xbc, -1} }, { {0xe0, 0x3d, -1}, {0xe0, 0xbd, -1} }, { {0xe0, 0x3e, -1}, {0xe0, 0xbe, -1} }, { {0xe0, 0x3f, -1}, {0xe0, 0xbf, -1} }, /*bc*/
+ { {0xe0, 0x40, -1}, {0xe0, 0xc0, -1} }, { {0xe0, 0x41, -1}, {0xe0, 0xc1, -1} }, { {0xe0, 0x42, -1}, {0xe0, 0xc2, -1} }, { {0xe0, 0x43, -1}, {0xe0, 0xc3, -1} }, /*c0*/
+ { {0xe0, 0x44, -1}, {0xe0, 0xc4, -1} }, { {-1}, {-1} }, { {0xe0, 0x46, -1}, {0xe0, 0xc6, -1} }, { {0xe0, 0x47, -1}, {0xe0, 0xc7, -1} }, /*c4*/
+ { {0xe0, 0x48, -1}, {0xe0, 0xc8, -1} }, { {0xe0, 0x49, -1}, {0xe0, 0xc9, -1} }, { {-1}, {-1} }, { {0xe0, 0x4b, -1}, {0xe0, 0xcb, -1} }, /*c8*/
+ { {0xe0, 0x4c, -1}, {0xe0, 0xcc, -1} }, { {0xe0, 0x4d, -1}, {0xe0, 0xcd, -1} }, { {0xe0, 0x4e, -1}, {0xe0, 0xce, -1} }, { {0xe0, 0x4f, -1}, {0xe0, 0xcf, -1} }, /*cc*/
+ { {0xe0, 0x50, -1}, {0xe0, 0xd0, -1} }, { {0xe0, 0x51, -1}, {0xe0, 0xd1, -1} }, { {0xe0, 0x52, -1}, {0xe0, 0xd2, -1} }, { {0xe0, 0x53, -1}, {0xe0, 0xd3, -1} }, /*d0*/
+ { {0xd4, -1}, {-1} }, { {0xe0, 0x55, -1}, {0xe0, 0xd5, -1} }, { {-1}, {-1} }, { {0xe0, 0x57, -1}, {0xe0, 0xd7, -1} }, /*d4*/
+ { {0xe0, 0x58, -1}, {0xe0, 0xd8, -1} }, { {0xe0, 0x59, -1}, {0xe0, 0xd9, -1} }, { {0xe0, 0x5a, -1}, {0xe0, 0xaa, -1} }, { {0xe0, 0x5b, -1}, {0xe0, 0xdb, -1} }, /*d8*/
+ { {0xe0, 0x5c, -1}, {0xe0, 0xdc, -1} }, { {0xe0, 0x5d, -1}, {0xe0, 0xdd, -1} }, { {0xe0, 0x5e, -1}, {0xe0, 0xee, -1} }, { {0xe0, 0x5f, -1}, {0xe0, 0xdf, -1} }, /*dc*/
+ { {-1}, {-1} }, { {0xe0, 0x61, -1}, {0xe0, 0xe1, -1} }, { {0xe0, 0x62, -1}, {0xe0, 0xe2, -1} }, { {0xe0, 0x63, -1}, {0xe0, 0xe3, -1} }, /*e0*/
+ { {0xe0, 0x64, -1}, {0xe0, 0xe4, -1} }, { {0xe0, 0x65, -1}, {0xe0, 0xe5, -1} }, { {0xe0, 0x66, -1}, {0xe0, 0xe6, -1} }, { {0xe0, 0x67, -1}, {0xe0, 0xe7, -1} }, /*e4*/
+ { {0xe0, 0x68, -1}, {0xe0, 0xe8, -1} }, { {0xe0, 0x69, -1}, {0xe0, 0xe9, -1} }, { {0xe0, 0x6a, -1}, {0xe0, 0xea, -1} }, { {0xe0, 0x6b, -1}, {0xe0, 0xeb, -1} }, /*e8*/
+ { {0xe0, 0x6c, -1}, {0xe0, 0xec, -1} }, { {0xe0, 0x6d, -1}, {0xe0, 0xed, -1} }, { {0xe0, 0x6e, -1}, {0xe0, 0xee, -1} }, { {-1}, {-1} }, /*ec*/
+ { {0xe0, 0x70, -1}, {0xe0, 0xf0, -1} }, { {0xf1, -1}, {-1} }, { {0xf2, -1}, {-1} }, { {0xe0, 0x73, -1}, {0xe0, 0xf3, -1} }, /*f0*/
+ { {0xe0, 0x74, -1}, {0xe0, 0xf4, -1} }, { {0xe0, 0x75, -1}, {0xe0, 0xf5, -1} }, { {-1}, {-1} }, { {0xe0, 0x77, -1}, {0xe0, 0xf7, -1} }, /*f4*/
+ { {0xe0, 0x78, -1}, {0xe0, 0xf8, -1} }, { {0xe0, 0x79, -1}, {0xe0, 0xf9, -1} }, { {0xe0, 0x7a, -1}, {0xe0, 0xfa, -1} }, { {0xe0, 0x7b, -1}, {0xe0, 0xfb, -1} }, /*f8*/
+ { {0xe0, 0x7c, -1}, {0xe0, 0xfc, -1} }, { {0xe0, 0x7d, -1}, {0xe0, 0xfd, -1} }, { {0xe0, 0x7e, -1}, {0xe0, 0xfe, -1} }, { {0xe1, 0x1d, 0x45, 0xe1, 0x9d, 0xc5, -1}, {-1} }, /*fc*/
+ { {-1}, {-1} }, { {0xe0, 0x01, -1}, {0xe0, 0x81, -1} }, { {0xe0, 0x02, -1}, {0xe0, 0x82, -1} }, { {-1}, {-1} }, /*100*/
+ { {-1}, {-1} }, { {0xe0, 0x05, -1}, {0xe0, 0x85, -1} }, { {0xe0, 0x06, -1}, {0xe0, 0x86, -1} }, { {0xe0, 0x07, -1}, {0xe0, 0x87, -1} }, /*104*/
+ { {0xe0, 0x71, -1}, {0xe0, 0xf1, -1} }, { {0xe0, 0x72, -1}, {0xe0, 0xf2, -1} }, { {0xe0, 0x7f, -1}, {0xe0, 0xff, -1} }, { {0xe0, 0xe1, -1}, {-1} }, /*108*/
+ { {0xe0, 0xee, -1}, {-1} }, { {0xe0, 0xf1, -1}, {-1} }, { {0xe0, 0xfe, -1}, {-1} }, { {0xe0, 0xff, -1}, {-1} } /*10c*/
};
/*XT keyboard has no escape scancodes, and no scancodes beyond 53*/
static scancode scancode_xt[272] =
{
- { {0}, {0} }, { {0x01, 0}, {0x81, 0} }, { {0x02, 0}, {0x82, 0} }, { {0x03, 0}, {0x83, 0} },
- { {0x04, 0}, {0x84, 0} }, { {0x05, 0}, {0x85, 0} }, { {0x06, 0}, {0x86, 0} }, { {0x07, 0}, {0x87, 0} },
- { {0x08, 0}, {0x88, 0} }, { {0x09, 0}, {0x89, 0} }, { {0x0a, 0}, {0x8a, 0} }, { {0x0b, 0}, {0x8b, 0} },
- { {0x0c, 0}, {0x8c, 0} }, { {0x0d, 0}, {0x8d, 0} }, { {0x0e, 0}, {0x8e, 0} }, { {0x0f, 0}, {0x8f, 0} },
- { {0x10, 0}, {0x90, 0} }, { {0x11, 0}, {0x91, 0} }, { {0x12, 0}, {0x92, 0} }, { {0x13, 0}, {0x93, 0} },
- { {0x14, 0}, {0x94, 0} }, { {0x15, 0}, {0x95, 0} }, { {0x16, 0}, {0x96, 0} }, { {0x17, 0}, {0x97, 0} },
- { {0x18, 0}, {0x98, 0} }, { {0x19, 0}, {0x99, 0} }, { {0x1a, 0}, {0x9a, 0} }, { {0x1b, 0}, {0x9b, 0} },
- { {0x1c, 0}, {0x9c, 0} }, { {0x1d, 0}, {0x9d, 0} }, { {0x1e, 0}, {0x9e, 0} }, { {0x1f, 0}, {0x9f, 0} },
- { {0x20, 0}, {0xa0, 0} }, { {0x21, 0}, {0xa1, 0} }, { {0x22, 0}, {0xa2, 0} }, { {0x23, 0}, {0xa3, 0} },
- { {0x24, 0}, {0xa4, 0} }, { {0x25, 0}, {0xa5, 0} }, { {0x26, 0}, {0xa6, 0} }, { {0x27, 0}, {0xa7, 0} },
- { {0x28, 0}, {0xa8, 0} }, { {0x29, 0}, {0xa9, 0} }, { {0x2a, 0}, {0xaa, 0} }, { {0x2b, 0}, {0xab, 0} },
- { {0x2c, 0}, {0xac, 0} }, { {0x2d, 0}, {0xad, 0} }, { {0x2e, 0}, {0xae, 0} }, { {0x2f, 0}, {0xaf, 0} },
- { {0x30, 0}, {0xb0, 0} }, { {0x31, 0}, {0xb1, 0} }, { {0x32, 0}, {0xb2, 0} }, { {0x33, 0}, {0xb3, 0} },
- { {0x34, 0}, {0xb4, 0} }, { {0x35, 0}, {0xb5, 0} }, { {0x36, 0}, {0xb6, 0} }, { {0x37, 0}, {0xb7, 0} },
- { {0x38, 0}, {0xb8, 0} }, { {0x39, 0}, {0xb9, 0} }, { {0x3a, 0}, {0xba, 0} }, { {0x3b, 0}, {0xbb, 0} },
- { {0x3c, 0}, {0xbc, 0} }, { {0x3d, 0}, {0xbd, 0} }, { {0x3e, 0}, {0xbe, 0} }, { {0x3f, 0}, {0xbf, 0} },
- { {0x40, 0}, {0xc0, 0} }, { {0x41, 0}, {0xc1, 0} }, { {0x42, 0}, {0xc2, 0} }, { {0x43, 0}, {0xc3, 0} },
- { {0x44, 0}, {0xc4, 0} }, { {0x45, 0}, {0xc5, 0} }, { {0x46, 0}, {0xc6, 0} }, { {0x47, 0}, {0xc7, 0} },
- { {0x48, 0}, {0xc8, 0} }, { {0x49, 0}, {0xc9, 0} }, { {0x4a, 0}, {0xca, 0} }, { {0x4b, 0}, {0xcb, 0} },
- { {0x4c, 0}, {0xcc, 0} }, { {0x4d, 0}, {0xcd, 0} }, { {0x4e, 0}, {0xce, 0} }, { {0x4f, 0}, {0xcf, 0} },
- { {0x50, 0}, {0xd0, 0} }, { {0x51, 0}, {0xd1, 0} }, { {0x52, 0}, {0xd2, 0} }, { {0x53, 0}, {0xd3, 0} },
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*54*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*58*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*5c*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*60*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*64*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*68*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*6c*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*70*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*74*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*78*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*7c*/
+ { {-1}, {-1} }, { {0x01, -1}, {0x81, -1} }, { {0x02, -1}, {0x82, -1} }, { {0x03, -1}, {0x83, -1} },
+ { {0x04, -1}, {0x84, -1} }, { {0x05, -1}, {0x85, -1} }, { {0x06, -1}, {0x86, -1} }, { {0x07, -1}, {0x87, -1} },
+ { {0x08, -1}, {0x88, -1} }, { {0x09, -1}, {0x89, -1} }, { {0x0a, -1}, {0x8a, -1} }, { {0x0b, -1}, {0x8b, -1} },
+ { {0x0c, -1}, {0x8c, -1} }, { {0x0d, -1}, {0x8d, -1} }, { {0x0e, -1}, {0x8e, -1} }, { {0x0f, -1}, {0x8f, -1} },
+ { {0x10, -1}, {0x90, -1} }, { {0x11, -1}, {0x91, -1} }, { {0x12, -1}, {0x92, -1} }, { {0x13, -1}, {0x93, -1} },
+ { {0x14, -1}, {0x94, -1} }, { {0x15, -1}, {0x95, -1} }, { {0x16, -1}, {0x96, -1} }, { {0x17, -1}, {0x97, -1} },
+ { {0x18, -1}, {0x98, -1} }, { {0x19, -1}, {0x99, -1} }, { {0x1a, -1}, {0x9a, -1} }, { {0x1b, -1}, {0x9b, -1} },
+ { {0x1c, -1}, {0x9c, -1} }, { {0x1d, -1}, {0x9d, -1} }, { {0x1e, -1}, {0x9e, -1} }, { {0x1f, -1}, {0x9f, -1} },
+ { {0x20, -1}, {0xa0, -1} }, { {0x21, -1}, {0xa1, -1} }, { {0x22, -1}, {0xa2, -1} }, { {0x23, -1}, {0xa3, -1} },
+ { {0x24, -1}, {0xa4, -1} }, { {0x25, -1}, {0xa5, -1} }, { {0x26, -1}, {0xa6, -1} }, { {0x27, -1}, {0xa7, -1} },
+ { {0x28, -1}, {0xa8, -1} }, { {0x29, -1}, {0xa9, -1} }, { {0x2a, -1}, {0xaa, -1} }, { {0x2b, -1}, {0xab, -1} },
+ { {0x2c, -1}, {0xac, -1} }, { {0x2d, -1}, {0xad, -1} }, { {0x2e, -1}, {0xae, -1} }, { {0x2f, -1}, {0xaf, -1} },
+ { {0x30, -1}, {0xb0, -1} }, { {0x31, -1}, {0xb1, -1} }, { {0x32, -1}, {0xb2, -1} }, { {0x33, -1}, {0xb3, -1} },
+ { {0x34, -1}, {0xb4, -1} }, { {0x35, -1}, {0xb5, -1} }, { {0x36, -1}, {0xb6, -1} }, { {0x37, -1}, {0xb7, -1} },
+ { {0x38, -1}, {0xb8, -1} }, { {0x39, -1}, {0xb9, -1} }, { {0x3a, -1}, {0xba, -1} }, { {0x3b, -1}, {0xbb, -1} },
+ { {0x3c, -1}, {0xbc, -1} }, { {0x3d, -1}, {0xbd, -1} }, { {0x3e, -1}, {0xbe, -1} }, { {0x3f, -1}, {0xbf, -1} },
+ { {0x40, -1}, {0xc0, -1} }, { {0x41, -1}, {0xc1, -1} }, { {0x42, -1}, {0xc2, -1} }, { {0x43, -1}, {0xc3, -1} },
+ { {0x44, -1}, {0xc4, -1} }, { {0x45, -1}, {0xc5, -1} }, { {0x46, -1}, {0xc6, -1} }, { {0x47, -1}, {0xc7, -1} },
+ { {0x48, -1}, {0xc8, -1} }, { {0x49, -1}, {0xc9, -1} }, { {0x4a, -1}, {0xca, -1} }, { {0x4b, -1}, {0xcb, -1} },
+ { {0x4c, -1}, {0xcc, -1} }, { {0x4d, -1}, {0xcd, -1} }, { {0x4e, -1}, {0xce, -1} }, { {0x4f, -1}, {0xcf, -1} },
+ { {0x50, -1}, {0xd0, -1} }, { {0x51, -1}, {0xd1, -1} }, { {0x52, -1}, {0xd2, -1} }, { {0x53, -1}, {0xd3, -1} },
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*54*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*58*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*5c*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*60*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*64*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*68*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*6c*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*70*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*74*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*78*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*7c*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*80*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*84*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*88*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*8c*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*90*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*94*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*98*/
- { {0x1c, 0}, {0x9c, 0} }, { {0x1d, 0}, {0x9d, 0} }, { {0}, {0} }, { {0}, {0} }, /*9c*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*a0*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*a4*/
- { {0}, {0} }, { {0}, {0} }, { {0x2a, 0}, {0xaa, 0} }, { {0}, {0} }, /*a8*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*ac*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*b0*/
- { {0}, {0} }, { {0x35, 0}, {0xb5, 0} }, { {0x36, 0}, {0xb6, 0} }, { {0x37, 0}, {0xb7, 0} }, /*b4*/
- { {0x38, 0}, {0xb8, 0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*b8*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*bc*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*c0*/
- { {0}, {0} }, { {0}, {0} }, { {0x46, 0}, {0xc6, 0} }, { {0x47, 0}, {0xc7, 0} }, /*c4*/
- { {0x48, 0}, {0xc8, 0} }, { {0x49, 0}, {0xc9, 0} }, { {0}, {0} }, { {0x4b, 0}, {0xcb, 0} }, /*c8*/
- { {0}, {0} }, { {0x4d, 0}, {0xcd, 0} }, { {0}, {0} }, { {0x4f, 0}, {0xcf, 0} }, /*cc*/
- { {0x50, 0}, {0xd0, 0} }, { {0x51, 0}, {0xd1, 0} }, { {0x52, 0}, {0xd2, 0} }, { {0x53, 0}, {0xd3, 0} }, /*d0*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*d4*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*d8*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*dc*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*e0*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*e4*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*e8*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*ec*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*f0*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*f4*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*f8*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*fc*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*100*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*104*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*108*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*10c*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*80*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*84*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*88*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*8c*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*90*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*94*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*98*/
+ { {0x1c, -1}, {0x9c, -1} }, { {0x1d, -1}, {0x9d, -1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*9c*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*a0*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*a4*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {0x2a, -1}, {0xaa, -1} }, { {-1}, {-1} }, /*a8*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*ac*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*b0*/
+ { {-1}, {-1} }, { {0x35, -1}, {0xb5, -1} }, { {0x36, -1}, {0xb6, -1} }, { {0x37, -1}, {0xb7, -1} }, /*b4*/
+ { {0x38, -1}, {0xb8, -1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*b8*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*bc*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*c0*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {0x46, -1}, {0xc6, -1} }, { {0x47, -1}, {0xc7, -1} }, /*c4*/
+ { {0x48, -1}, {0xc8, -1} }, { {0x49, -1}, {0xc9, -1} }, { {-1}, {-1} }, { {0x4b, -1}, {0xcb, -1} }, /*c8*/
+ { {-1}, {-1} }, { {0x4d, -1}, {0xcd, -1} }, { {-1}, {-1} }, { {0x4f, -1}, {0xcf, -1} }, /*cc*/
+ { {0x50, -1}, {0xd0, -1} }, { {0x51, -1}, {0xd1, -1} }, { {0x52, -1}, {0xd2, -1} }, { {0x53, -1}, {0xd3, -1} }, /*d0*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*d4*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*d8*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*dc*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*e0*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*e4*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*e8*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*ec*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*f0*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*f4*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*f8*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*fc*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*100*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*104*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*108*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*10c*/
};
/*Tandy keyboard has slightly different scancodes to XT*/
static scancode scancode_tandy[272] =
{
- { {0}, {0} }, { {0x01, 0}, {0x81, 0} }, { {0x02, 0}, {0x82, 0} }, { {0x03, 0}, {0x83, 0} },
- { {0x04, 0}, {0x84, 0} }, { {0x05, 0}, {0x85, 0} }, { {0x06, 0}, {0x86, 0} }, { {0x07, 0}, {0x87, 0} },
- { {0x08, 0}, {0x88, 0} }, { {0x09, 0}, {0x89, 0} }, { {0x0a, 0}, {0x8a, 0} }, { {0x0b, 0}, {0x8b, 0} },
- { {0x0c, 0}, {0x8c, 0} }, { {0x0d, 0}, {0x8d, 0} }, { {0x0e, 0}, {0x8e, 0} }, { {0x0f, 0}, {0x8f, 0} },
- { {0x10, 0}, {0x90, 0} }, { {0x11, 0}, {0x91, 0} }, { {0x12, 0}, {0x92, 0} }, { {0x13, 0}, {0x93, 0} },
- { {0x14, 0}, {0x94, 0} }, { {0x15, 0}, {0x95, 0} }, { {0x16, 0}, {0x96, 0} }, { {0x17, 0}, {0x97, 0} },
- { {0x18, 0}, {0x98, 0} }, { {0x19, 0}, {0x99, 0} }, { {0x1a, 0}, {0x9a, 0} }, { {0x1b, 0}, {0x9b, 0} },
- { {0x1c, 0}, {0x9c, 0} }, { {0x1d, 0}, {0x9d, 0} }, { {0x1e, 0}, {0x9e, 0} }, { {0x1f, 0}, {0x9f, 0} },
- { {0x20, 0}, {0xa0, 0} }, { {0x21, 0}, {0xa1, 0} }, { {0x22, 0}, {0xa2, 0} }, { {0x23, 0}, {0xa3, 0} },
- { {0x24, 0}, {0xa4, 0} }, { {0x25, 0}, {0xa5, 0} }, { {0x26, 0}, {0xa6, 0} }, { {0x27, 0}, {0xa7, 0} },
- { {0x28, 0}, {0xa8, 0} }, { {0x29, 0}, {0xa9, 0} }, { {0x2a, 0}, {0xaa, 0} }, { {0x47, 0}, {0xc7, 0} },
- { {0x2c, 0}, {0xac, 0} }, { {0x2d, 0}, {0xad, 0} }, { {0x2e, 0}, {0xae, 0} }, { {0x2f, 0}, {0xaf, 0} },
- { {0x30, 0}, {0xb0, 0} }, { {0x31, 0}, {0xb1, 0} }, { {0x32, 0}, {0xb2, 0} }, { {0x33, 0}, {0xb3, 0} },
- { {0x34, 0}, {0xb4, 0} }, { {0x35, 0}, {0xb5, 0} }, { {0x36, 0}, {0xb6, 0} }, { {0x37, 0}, {0xb7, 0} },
- { {0x38, 0}, {0xb8, 0} }, { {0x39, 0}, {0xb9, 0} }, { {0x3a, 0}, {0xba, 0} }, { {0x3b, 0}, {0xbb, 0} },
- { {0x3c, 0}, {0xbc, 0} }, { {0x3d, 0}, {0xbd, 0} }, { {0x3e, 0}, {0xbe, 0} }, { {0x3f, 0}, {0xbf, 0} },
- { {0x40, 0}, {0xc0, 0} }, { {0x41, 0}, {0xc1, 0} }, { {0x42, 0}, {0xc2, 0} }, { {0x43, 0}, {0xc3, 0} },
- { {0x44, 0}, {0xc4, 0} }, { {0x45, 0}, {0xc5, 0} }, { {0x46, 0}, {0xc6, 0} }, { {0x47, 0}, {0xc7, 0} },
- { {0x48, 0}, {0xc8, 0} }, { {0x49, 0}, {0xc9, 0} }, { {0x4a, 0}, {0xca, 0} }, { {0x4b, 0}, {0xcb, 0} },
- { {0x4c, 0}, {0xcc, 0} }, { {0x4d, 0}, {0xcd, 0} }, { {0x4e, 0}, {0xce, 0} }, { {0x4f, 0}, {0xcf, 0} },
- { {0x50, 0}, {0xd0, 0} }, { {0x51, 0}, {0xd1, 0} }, { {0x52, 0}, {0xd2, 0} }, { {0x56, 0}, {0xd6, 0} },
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*54*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*58*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*5c*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*60*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*64*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*68*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*6c*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*70*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*74*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*78*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*7c*/
+ { {-1}, {-1} }, { {0x01, -1}, {0x81, -1} }, { {0x02, -1}, {0x82, -1} }, { {0x03, -1}, {0x83, -1} },
+ { {0x04, -1}, {0x84, -1} }, { {0x05, -1}, {0x85, -1} }, { {0x06, -1}, {0x86, -1} }, { {0x07, -1}, {0x87, -1} },
+ { {0x08, -1}, {0x88, -1} }, { {0x09, -1}, {0x89, -1} }, { {0x0a, -1}, {0x8a, -1} }, { {0x0b, -1}, {0x8b, -1} },
+ { {0x0c, -1}, {0x8c, -1} }, { {0x0d, -1}, {0x8d, -1} }, { {0x0e, -1}, {0x8e, -1} }, { {0x0f, -1}, {0x8f, -1} },
+ { {0x10, -1}, {0x90, -1} }, { {0x11, -1}, {0x91, -1} }, { {0x12, -1}, {0x92, -1} }, { {0x13, -1}, {0x93, -1} },
+ { {0x14, -1}, {0x94, -1} }, { {0x15, -1}, {0x95, -1} }, { {0x16, -1}, {0x96, -1} }, { {0x17, -1}, {0x97, -1} },
+ { {0x18, -1}, {0x98, -1} }, { {0x19, -1}, {0x99, -1} }, { {0x1a, -1}, {0x9a, -1} }, { {0x1b, -1}, {0x9b, -1} },
+ { {0x1c, -1}, {0x9c, -1} }, { {0x1d, -1}, {0x9d, -1} }, { {0x1e, -1}, {0x9e, -1} }, { {0x1f, -1}, {0x9f, -1} },
+ { {0x20, -1}, {0xa0, -1} }, { {0x21, -1}, {0xa1, -1} }, { {0x22, -1}, {0xa2, -1} }, { {0x23, -1}, {0xa3, -1} },
+ { {0x24, -1}, {0xa4, -1} }, { {0x25, -1}, {0xa5, -1} }, { {0x26, -1}, {0xa6, -1} }, { {0x27, -1}, {0xa7, -1} },
+ { {0x28, -1}, {0xa8, -1} }, { {0x29, -1}, {0xa9, -1} }, { {0x2a, -1}, {0xaa, -1} }, { {0x47, -1}, {0xc7, -1} },
+ { {0x2c, -1}, {0xac, -1} }, { {0x2d, -1}, {0xad, -1} }, { {0x2e, -1}, {0xae, -1} }, { {0x2f, -1}, {0xaf, -1} },
+ { {0x30, -1}, {0xb0, -1} }, { {0x31, -1}, {0xb1, -1} }, { {0x32, -1}, {0xb2, -1} }, { {0x33, -1}, {0xb3, -1} },
+ { {0x34, -1}, {0xb4, -1} }, { {0x35, -1}, {0xb5, -1} }, { {0x36, -1}, {0xb6, -1} }, { {0x37, -1}, {0xb7, -1} },
+ { {0x38, -1}, {0xb8, -1} }, { {0x39, -1}, {0xb9, -1} }, { {0x3a, -1}, {0xba, -1} }, { {0x3b, -1}, {0xbb, -1} },
+ { {0x3c, -1}, {0xbc, -1} }, { {0x3d, -1}, {0xbd, -1} }, { {0x3e, -1}, {0xbe, -1} }, { {0x3f, -1}, {0xbf, -1} },
+ { {0x40, -1}, {0xc0, -1} }, { {0x41, -1}, {0xc1, -1} }, { {0x42, -1}, {0xc2, -1} }, { {0x43, -1}, {0xc3, -1} },
+ { {0x44, -1}, {0xc4, -1} }, { {0x45, -1}, {0xc5, -1} }, { {0x46, -1}, {0xc6, -1} }, { {0x47, -1}, {0xc7, -1} },
+ { {0x48, -1}, {0xc8, -1} }, { {0x49, -1}, {0xc9, -1} }, { {0x4a, -1}, {0xca, -1} }, { {0x4b, -1}, {0xcb, -1} },
+ { {0x4c, -1}, {0xcc, -1} }, { {0x4d, -1}, {0xcd, -1} }, { {0x4e, -1}, {0xce, -1} }, { {0x4f, -1}, {0xcf, -1} },
+ { {0x50, -1}, {0xd0, -1} }, { {0x51, -1}, {0xd1, -1} }, { {0x52, -1}, {0xd2, -1} }, { {0x56, -1}, {0xd6, -1} },
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*54*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*58*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*5c*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*60*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*64*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*68*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*6c*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*70*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*74*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*78*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*7c*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*80*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*84*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*88*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*8c*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*90*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*94*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*98*/
- { {0x57, 0}, {0xd7, 0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*9c*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*a0*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*a4*/
- { {0}, {0} }, { {0}, {0} }, { {0x2a, 0}, {0xaa, 0} }, { {0}, {0} }, /*a8*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*ac*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*b0*/
- { {0}, {0} }, { {0x35, 0}, {0xb5, 0} }, { {0x36, 0}, {0xb6, 0} }, { {0x37, 0}, {0xb7, 0} }, /*b4*/
- { {0x38, 0}, {0xb8, 0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*b8*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*bc*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*c0*/
- { {0}, {0} }, { {0}, {0} }, { {0x46, 0}, {0xc6, 0} }, { {0x47, 0}, {0xc7, 0} }, /*c4*/
- { {0x29, 0}, {0xa9, 0} }, { {0x49, 0}, {0xc9, 0} }, { {0}, {0} }, { {0x2b, 0}, {0xab, 0} }, /*c8*/
- { {0}, {0} }, { {0x4e, 0}, {0xce, 0} }, { {0}, {0} }, { {0x4f, 0}, {0xcf, 0} }, /*cc*/
- { {0x4a, 0}, {0xca, 0} }, { {0x51, 0}, {0xd1, 0} }, { {0x52, 0}, {0xd2, 0} }, { {0x53, 0}, {0xd3, 0} }, /*d0*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*d4*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*d8*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*dc*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*e0*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*e4*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*e8*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*ec*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*f0*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*f4*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*f8*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*fc*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*100*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*104*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*108*/
- { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, { {0}, {0} }, /*10c*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*80*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*84*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*88*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*8c*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*90*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*94*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*98*/
+ { {0x57, -1}, {0xd7, -1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*9c*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*a0*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*a4*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {0x2a, -1}, {0xaa, -1} }, { {-1}, {-1} }, /*a8*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*ac*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*b0*/
+ { {-1}, {-1} }, { {0x35, -1}, {0xb5, -1} }, { {0x36, -1}, {0xb6, -1} }, { {0x37, -1}, {0xb7, -1} }, /*b4*/
+ { {0x38, -1}, {0xb8, -1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*b8*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*bc*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*c0*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {0x46, -1}, {0xc6, -1} }, { {0x47, -1}, {0xc7, -1} }, /*c4*/
+ { {0x29, -1}, {0xa9, -1} }, { {0x49, -1}, {0xc9, -1} }, { {-1}, {-1} }, { {0x2b, -1}, {0xab, -1} }, /*c8*/
+ { {-1}, {-1} }, { {0x4e, -1}, {0xce, -1} }, { {-1}, {-1} }, { {0x4f, -1}, {0xcf, -1} }, /*cc*/
+ { {0x4a, -1}, {0xca, -1} }, { {0x51, -1}, {0xd1, -1} }, { {0x52, -1}, {0xd2, -1} }, { {0x53, -1}, {0xd3, -1} }, /*d0*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*d4*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*d8*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*dc*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*e0*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*e4*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*e8*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*ec*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*f0*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*f4*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*f8*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*fc*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*100*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*104*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*108*/
+ { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*10c*/
};
-static uint8_t oldkey[272];
-static uint8_t keydelay[272];
+static int oldkey[272];
+static int keydelay[272];
void (*keyboard_send)(uint8_t val);
void (*keyboard_poll)();
int keyboard_scan = 1;
-static scancode *at_scancodes;
-
-void keyboard_set_scancode_set(int set)
-{
- switch (set)
- {
- case SCANCODE_SET_1:
- at_scancodes = scancode_set1;
- break;
- case SCANCODE_SET_2:
- at_scancodes = scancode_set2;
- break;
- case SCANCODE_SET_3:
- at_scancodes = scancode_set3;
- break;
- default:
- pclog("Invalid scancode set: %i\n", set);
- }
-}
-
void keyboard_process()
{
int c;
int d;
- scancode *scancodes = (AT || romset == ROM_XI8088) ? at_scancodes : scancode_xt;
+ scancode *scancodes = (AT) ? scancode_set1 : scancode_xt;
if (!keyboard_scan) return;
if (TANDY) scancodes = scancode_tandy;
@@ -429,20 +259,20 @@ void keyboard_process()
if (pcem_key[c] != oldkey[c])
{
oldkey[c] = pcem_key[c];
- if ( pcem_key[c] && scancodes[c].scancodes_make[0] == 0)
+ if ( pcem_key[c] && scancodes[c].scancodes_make[0] == -1)
continue;
- if (!pcem_key[c] && scancodes[c].scancodes_break[0] == 0)
+ if (!pcem_key[c] && scancodes[c].scancodes_break[0] == -1)
continue;
// pclog("Key %02X start\n", c);
d = 0;
if (pcem_key[c])
{
- while (scancodes[c].scancodes_make[d] != 0)
+ while (scancodes[c].scancodes_make[d] != -1)
keyboard_send(scancodes[c].scancodes_make[d++]);
}
else
{
- while (scancodes[c].scancodes_break[d] != 0)
+ while (scancodes[c].scancodes_break[d] != -1)
keyboard_send(scancodes[c].scancodes_break[d++]);
}
}
@@ -453,32 +283,13 @@ void keyboard_process()
if (keydelay[c] >= 30)
{
keydelay[c] -= 10;
- if (scancodes[c].scancodes_make[0] == 0)
+ if (scancode_set1[c].scancodes_make[0] == -1)
continue;
d = 0;
- while (scancodes[c].scancodes_make[d] != 0)
- keyboard_send(scancodes[c].scancodes_make[d++]);
+ while (scancode_set1[c].scancodes_make[d] != -1)
+ keyboard_send(scancode_set1[c].scancodes_make[d++]);
}
}
}
-
-void keyboard_send_scancode(int code, int is_break)
-{
- scancode *scancodes = (AT || romset == ROM_XI8088) ? at_scancodes : scancode_xt;
- int d = 0;
-
- if (!keyboard_scan) return;
-
- if (!is_break)
- {
- while (scancodes[code].scancodes_make[d] != 0)
- keyboard_send(scancodes[code].scancodes_make[d++]);
- }
- else
- {
- while (scancodes[code].scancodes_break[d] != 0)
- keyboard_send(scancodes[code].scancodes_break[d++]);
- }
-}
diff --git a/src/keyboard.h b/src/keyboard.h
index c4a63e0..5d5283c 100644
--- a/src/keyboard.h
+++ b/src/keyboard.h
@@ -3,14 +3,4 @@ extern void (*keyboard_poll)();
void keyboard_process();
extern int keyboard_scan;
-extern uint8_t pcem_key[272];
-
-enum
-{
- SCANCODE_SET_1,
- SCANCODE_SET_2,
- SCANCODE_SET_3
-};
-
-void keyboard_set_scancode_set(int set);
-void keyboard_send_scancode(int code, int is_break);
+extern int pcem_key[272];
diff --git a/src/keyboard_amstrad.c b/src/keyboard_amstrad.c
index 31b0eb4..e7647f4 100644
--- a/src/keyboard_amstrad.c
+++ b/src/keyboard_amstrad.c
@@ -26,8 +26,6 @@ struct
uint8_t key_waiting;
uint8_t pa;
uint8_t pb;
-
- pc_timer_t send_delay_timer;
} keyboard_amstrad;
static uint8_t key_queue[16];
@@ -37,7 +35,7 @@ static uint8_t amstrad_systemstat_1, amstrad_systemstat_2;
void keyboard_amstrad_poll()
{
- timer_advance_u64(&keyboard_amstrad.send_delay_timer, (1000 * TIMER_USEC));
+ keybsenddelay += (1000 * TIMER_USEC);
if (keyboard_amstrad.wantirq)
{
keyboard_amstrad.wantirq = 0;
@@ -79,6 +77,7 @@ void keyboard_amstrad_write(uint16_t port, uint8_t val, void *priv)
ppi.pb = val;
timer_process();
+ timer_update_outstanding();
speaker_update();
speaker_gated = val & 1;
@@ -175,5 +174,5 @@ void keyboard_amstrad_init()
keyboard_send = keyboard_amstrad_adddata;
keyboard_poll = keyboard_amstrad_poll;
- timer_add(&keyboard_amstrad.send_delay_timer, keyboard_amstrad_poll, NULL, 1);
+ timer_add(keyboard_amstrad_poll, &keybsenddelay, TIMER_ALWAYS_ENABLED, NULL);
}
diff --git a/src/keyboard_at.c b/src/keyboard_at.c
index 312326a..c4a3c72 100644
--- a/src/keyboard_at.c
+++ b/src/keyboard_at.c
@@ -5,11 +5,8 @@
#include "pit.h"
#include "sound.h"
#include "sound_speaker.h"
-#include "t3100e.h"
#include "timer.h"
-#include "video.h"
#include "x86.h"
-#include "xi8088.h"
#include "keyboard.h"
#include "keyboard_at.h"
@@ -26,8 +23,6 @@
#define PS2_REFRESH_TIME (16 * TIMER_USEC)
-#define RESET_DELAY_TIME (100 * 10) /*600ms*/
-
struct
{
int initialised;
@@ -37,11 +32,7 @@ struct
uint8_t status;
uint8_t mem[0x20];
uint8_t out;
- int out_new, out_delayed;
-
- int scancode_set;
- int translate;
- int next_is_release;
+ int out_new;
uint8_t input_port;
uint8_t output_port;
@@ -54,79 +45,45 @@ struct
void (*mouse_write)(uint8_t val, void *p);
void *mouse_p;
- pc_timer_t refresh_timer;
+ int refresh_time;
int refresh;
int is_ps2;
-
- pc_timer_t send_delay_timer;
-
- int reset_delay;
} keyboard_at;
-/*Translation table taken from https://www.win.tue.nl/~aeb/linux/kbd/scancodes-10.html#ss10.3*/
-static uint8_t at_translation[256] =
-{
- 0xff, 0x43, 0x41, 0x3f, 0x3d, 0x3b, 0x3c, 0x58, 0x64, 0x44, 0x42, 0x40, 0x3e, 0x0f, 0x29, 0x59,
- 0x65, 0x38, 0x2a, 0x70, 0x1d, 0x10, 0x02, 0x5a, 0x66, 0x71, 0x2c, 0x1f, 0x1e, 0x11, 0x03, 0x5b,
- 0x67, 0x2e, 0x2d, 0x20, 0x12, 0x05, 0x04, 0x5c, 0x68, 0x39, 0x2f, 0x21, 0x14, 0x13, 0x06, 0x5d,
- 0x69, 0x31, 0x30, 0x23, 0x22, 0x15, 0x07, 0x5e, 0x6a, 0x72, 0x32, 0x24, 0x16, 0x08, 0x09, 0x5f,
- 0x6b, 0x33, 0x25, 0x17, 0x18, 0x0b, 0x0a, 0x60, 0x6c, 0x34, 0x35, 0x26, 0x27, 0x19, 0x0c, 0x61,
- 0x6d, 0x73, 0x28, 0x74, 0x1a, 0x0d, 0x62, 0x6e, 0x3a, 0x36, 0x1c, 0x1b, 0x75, 0x2b, 0x63, 0x76,
- 0x55, 0x56, 0x77, 0x78, 0x79, 0x7a, 0x0e, 0x7b, 0x7c, 0x4f, 0x7d, 0x4b, 0x47, 0x7e, 0x7f, 0x6f,
- 0x52, 0x53, 0x50, 0x4c, 0x4d, 0x48, 0x01, 0x45, 0x57, 0x4e, 0x51, 0x4a, 0x37, 0x49, 0x46, 0x54,
- 0x80, 0x81, 0x82, 0x41, 0x54, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
- 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
- 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
- 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
- 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
- 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf,
- 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
- 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff
-};
static uint8_t key_ctrl_queue[16];
static int key_ctrl_queue_start = 0, key_ctrl_queue_end = 0;
static uint8_t key_queue[16];
static int key_queue_start = 0, key_queue_end = 0;
-uint8_t mouse_queue[16];
+static uint8_t mouse_queue[16];
int mouse_queue_start = 0, mouse_queue_end = 0;
-void keyboard_at_adddata_keyboard(uint8_t val);
-
void keyboard_at_poll()
{
- timer_advance_u64(&keyboard_at.send_delay_timer, (100 * TIMER_USEC));
+ keybsenddelay += (1000 * TIMER_USEC);
if (keyboard_at.out_new != -1 && !keyboard_at.last_irq)
{
keyboard_at.wantirq = 0;
if (keyboard_at.out_new & 0x100)
{
- if (mouse_scan)
- {
-// pclog("keyboard_at : take IRQ12\n");
- if (keyboard_at.mem[0] & 0x02)
- picint(0x1000);
- keyboard_at.out = keyboard_at.out_new & 0xff;
- keyboard_at.out_new = -1;
- keyboard_at.status |= STAT_OFULL;
- keyboard_at.status &= ~STAT_IFULL;
- keyboard_at.status |= STAT_MFULL;
- keyboard_at.last_irq = 0x1000;
- }
- else
- {
-// pclog("keyboard_at: suppressing IRQ12\n");
- keyboard_at.out_new = -1;
- }
+ if (keyboard_at.mem[0] & 0x02)
+ picint(0x1000);
+ keyboard_at.out = keyboard_at.out_new & 0xff;
+ keyboard_at.out_new = -1;
+ keyboard_at.status |= STAT_OFULL;
+ keyboard_at.status &= ~STAT_IFULL;
+ keyboard_at.status |= STAT_MFULL;
+// pclog("keyboard_at : take IRQ12\n");
+ keyboard_at.last_irq = 0x1000;
}
else
{
if (keyboard_at.mem[0] & 0x01)
picint(2);
- keyboard_at.out = keyboard_at.out_new & 0xff;
+ keyboard_at.out = keyboard_at.out_new;
keyboard_at.out_new = -1;
keyboard_at.status |= STAT_OFULL;
keyboard_at.status &= ~STAT_IFULL;
@@ -139,102 +96,48 @@ void keyboard_at_poll()
if (keyboard_at.out_new == -1 && !(keyboard_at.status & STAT_OFULL) &&
key_ctrl_queue_start != key_ctrl_queue_end)
{
- keyboard_at.out_new = key_ctrl_queue[key_ctrl_queue_start] | 0x200;
+ keyboard_at.out_new = key_ctrl_queue[key_ctrl_queue_start];
key_ctrl_queue_start = (key_ctrl_queue_start + 1) & 0xf;
}
- else if (!(keyboard_at.status & STAT_OFULL) && keyboard_at.out_new == -1 &&
- keyboard_at.out_delayed != -1)
- {
- keyboard_at.out_new = keyboard_at.out_delayed;
- keyboard_at.out_delayed = -1;
- }
- else if (!(keyboard_at.status & STAT_OFULL) && keyboard_at.out_new == -1 &&
- !(keyboard_at.mem[0] & 0x10) && keyboard_at.out_delayed != -1)
- {
- keyboard_at.out_new = keyboard_at.out_delayed;
- keyboard_at.out_delayed = -1;
- }
else if (!(keyboard_at.status & STAT_OFULL) && keyboard_at.out_new == -1 && /*!(keyboard_at.mem[0] & 0x20) &&*/
mouse_queue_start != mouse_queue_end)
{
keyboard_at.out_new = mouse_queue[mouse_queue_start] | 0x100;
mouse_queue_start = (mouse_queue_start + 1) & 0xf;
- }
+ }
else if (!(keyboard_at.status & STAT_OFULL) && keyboard_at.out_new == -1 &&
!(keyboard_at.mem[0] & 0x10) && key_queue_start != key_queue_end)
{
keyboard_at.out_new = key_queue[key_queue_start];
key_queue_start = (key_queue_start + 1) & 0xf;
- }
-
- if (keyboard_at.reset_delay)
- {
- keyboard_at.reset_delay--;
- if (!keyboard_at.reset_delay)
- keyboard_at_adddata_keyboard(0xaa);
- }
+ }
}
void keyboard_at_adddata(uint8_t val)
{
- key_ctrl_queue[key_ctrl_queue_end] = val;
- key_ctrl_queue_end = (key_ctrl_queue_end + 1) & 0xf;
-
- if (!(keyboard_at.out_new & 0x300))
- {
- keyboard_at.out_delayed = keyboard_at.out_new;
- keyboard_at.out_new = -1;
+// if (keyboard_at.status & STAT_OFULL)
+// {
+ key_ctrl_queue[key_ctrl_queue_end] = val;
+ key_ctrl_queue_end = (key_ctrl_queue_end + 1) & 0xf;
+// pclog("keyboard_at : %02X added to queue\n", val);
+/* return;
}
+ keyboard_at.out = val;
+ keyboard_at.status |= STAT_OFULL;
+ keyboard_at.status &= ~STAT_IFULL;
+ if (keyboard_at.mem[0] & 0x01)
+ keyboard_at.wantirq = 1;
+ pclog("keyboard_at : output %02X (IRQ %i)\n", val, keyboard_at.wantirq);*/
}
void keyboard_at_adddata_keyboard(uint8_t val)
{
- if (keyboard_at.reset_delay)
- return;
/* if (val == 0x1c)
{
key_1c++;
if (key_1c == 4)
output = 3;
}*/
-
- /* Test for T3100E 'Fn' key (Right Alt / Right Ctrl) */
- if (romset == ROM_T3100E && (pcem_key[0xb8] || pcem_key[0x9d]))
- {
- switch (val)
- {
- case 0x4f: t3100e_notify_set(0x01); break; /* End */
- case 0x50: t3100e_notify_set(0x02); break; /* Down */
- case 0x51: t3100e_notify_set(0x03); break; /* PgDn */
- case 0x52: t3100e_notify_set(0x04); break; /* Ins */
- case 0x53: t3100e_notify_set(0x05); break; /* Del */
- case 0x54: t3100e_notify_set(0x06); break; /* SysRQ */
- case 0x45: t3100e_notify_set(0x07); break; /* NumLock */
- case 0x46: t3100e_notify_set(0x08); break; /* ScrLock */
- case 0x47: t3100e_notify_set(0x09); break; /* Home */
- case 0x48: t3100e_notify_set(0x0A); break; /* Up */
- case 0x49: t3100e_notify_set(0x0B); break; /* PgUp */
- case 0x4A: t3100e_notify_set(0x0C); break; /* Keypad -*/
- case 0x4B: t3100e_notify_set(0x0D); break; /* Left */
- case 0x4C: t3100e_notify_set(0x0E); break; /* KP 5 */
- case 0x4D: t3100e_notify_set(0x0F); break; /* Right */
- }
- }
- if (keyboard_at.translate)
- {
- if (val == 0xf0)
- {
- keyboard_at.next_is_release = 1;
- return;
- }
- else
- {
- val = at_translation[val];
- if (keyboard_at.next_is_release)
- val |= 0x80;
- keyboard_at.next_is_release = 0;
- }
- }
key_queue[key_queue_end] = val;
key_queue_end = (key_queue_end + 1) & 0xf;
// pclog("keyboard_at : %02X added to key queue\n", val);
@@ -252,8 +155,6 @@ void keyboard_at_adddata_mouse(uint8_t val)
void keyboard_at_write(uint16_t port, uint8_t val, void *priv)
{
// pclog("keyboard_at : write %04X %02X %i %02X\n", port, val, keyboard_at.key_wantdata, ram[8]);
- if (romset == ROM_XI8088 && port == 0x63)
- port = 0x61;
/* if (ram[8] == 0xc3)
{
output = 3;
@@ -283,15 +184,9 @@ void keyboard_at_write(uint16_t port, uint8_t val, void *priv)
if (!(val & 1) && keyboard_at.wantirq)
keyboard_at.wantirq = 0;
mouse_scan = !(val & 0x20);
- keyboard_at.translate = val & 0x40;
}
break;
- case 0xb6: /* T3100e - set colour/mono switch */
- if (romset == ROM_T3100E)
- t3100e_mono_set(val);
- break;
-
case 0xcb: /*AMI - set keyboard mode*/
break;
@@ -310,22 +205,13 @@ void keyboard_at_write(uint16_t port, uint8_t val, void *priv)
keyboard_at.output_port = val;
break;
- case 0xd2: /*Write to keyboard output buffer*/
- keyboard_at_adddata(val);
- break;
-
case 0xd3: /*Write to mouse output buffer*/
keyboard_at_adddata_mouse(val);
break;
case 0xd4: /*Write to mouse*/
if (keyboard_at.mouse_write)
- {
keyboard_at.mouse_write(val, keyboard_at.mouse_p);
- /*Implicitly enable mouse*/
- mouse_scan = 1;
- keyboard_at.mem[0] &= ~0x20;
- }
break;
default:
@@ -346,45 +232,6 @@ void keyboard_at_write(uint16_t port, uint8_t val, void *priv)
case 0xed: /*Set/reset LEDs*/
keyboard_at_adddata_keyboard(0xfa);
break;
-
- case 0xf0: /*Set scancode set*/
- switch (val)
- {
- case 0: /*Read current set*/
- keyboard_at_adddata_keyboard(0xfa);
- switch (keyboard_at.scancode_set)
- {
- case SCANCODE_SET_1:
- keyboard_at_adddata_keyboard(0x01);
- break;
- case SCANCODE_SET_2:
- keyboard_at_adddata_keyboard(0x02);
- break;
- case SCANCODE_SET_3:
- keyboard_at_adddata_keyboard(0x03);
- break;
- }
- break;
- case 1:
- keyboard_at.scancode_set = SCANCODE_SET_1;
- keyboard_set_scancode_set(SCANCODE_SET_1);
- keyboard_at_adddata_keyboard(0xfa);
- break;
- case 2:
- keyboard_at.scancode_set = SCANCODE_SET_2;
- keyboard_set_scancode_set(SCANCODE_SET_2);
- keyboard_at_adddata_keyboard(0xfa);
- break;
- case 3:
- keyboard_at.scancode_set = SCANCODE_SET_3;
- keyboard_set_scancode_set(SCANCODE_SET_3);
- keyboard_at_adddata_keyboard(0xfa);
- break;
- default:
- keyboard_at_adddata_keyboard(0xfe);
- break;
- }
- break;
case 0xf3: /*Set typematic rate/delay*/
keyboard_at_adddata_keyboard(0xfa);
@@ -410,19 +257,10 @@ void keyboard_at_write(uint16_t port, uint8_t val, void *priv)
keyboard_at_adddata_keyboard(0xfa);
break;
- case 0xee: /*Diagnostic echo*/
- keyboard_at_adddata_keyboard(0xee);
- break;
-
- case 0xf0: /*Set scancode set*/
- keyboard_at.key_wantdata = 1;
- keyboard_at_adddata_keyboard(0xfa);
- break;
-
case 0xf2: /*Read ID*/
keyboard_at_adddata_keyboard(0xfa);
keyboard_at_adddata_keyboard(0xab);
- keyboard_at_adddata_keyboard(0x83);
+ keyboard_at_adddata_keyboard(0x41);
break;
case 0xf3: /*Set typematic rate/delay*/
@@ -442,7 +280,7 @@ void keyboard_at_write(uint16_t port, uint8_t val, void *priv)
case 0xff: /*Reset*/
key_queue_start = key_queue_end = 0; /*Clear key queue*/
keyboard_at_adddata_keyboard(0xfa);
- keyboard_at.reset_delay = RESET_DELAY_TIME;
+ keyboard_at_adddata_keyboard(0xaa);
break;
default:
@@ -458,20 +296,15 @@ void keyboard_at_write(uint16_t port, uint8_t val, void *priv)
case 0x61:
ppi.pb = val;
+ timer_process();
+ timer_update_outstanding();
+
speaker_update();
speaker_gated = val & 1;
speaker_enable = val & 2;
if (speaker_enable)
was_speaker_enable = 1;
pit_set_gate(&pit, 2, val & 1);
-
- if (romset == ROM_XI8088)
- {
- if (val & 0x04)
- xi8088_turbo_set(1);
- else
- xi8088_turbo_set(0);
- }
break;
case 0x64:
@@ -507,12 +340,10 @@ void keyboard_at_write(uint16_t port, uint8_t val, void *priv)
case 0xa7: /*Disable mouse port*/
mouse_scan = 0;
- keyboard_at.mem[0] |= 0x20;
break;
case 0xa8: /*Enable mouse port*/
mouse_scan = 1;
- keyboard_at.mem[0] &= ~0x20;
break;
case 0xa9: /*Test mouse port*/
@@ -526,9 +357,6 @@ void keyboard_at_write(uint16_t port, uint8_t val, void *priv)
key_ctrl_queue_start = key_ctrl_queue_end = 0;
keyboard_at.status &= ~STAT_OFULL;
}
- /* T3100e and Samsung SPC-6000A expects STAT_IFULL to be set immediately
- * after sending 0xAA */
- if(romset == ROM_T3100E || romset == ROM_SPC6000A) keyboard_at.status |= STAT_IFULL;
keyboard_at.status |= STAT_SYSFLAG;
keyboard_at.mem[0] |= 0x04;
keyboard_at_adddata(0x55);
@@ -554,82 +382,9 @@ void keyboard_at_write(uint16_t port, uint8_t val, void *priv)
case 0xae: /*Enable keyboard*/
keyboard_at.mem[0] &= ~0x10;
break;
-
- case 0xb0: /* T3100e: Turbo on */
- if (romset == ROM_T3100E)
- t3100e_turbo_set(1);
- break;
-
- case 0xb1: /* T3100e: Turbo off */
- if (romset == ROM_T3100E)
- t3100e_turbo_set(0);
- break;
-
- case 0xb2: /* T3100e: Select external display */
- if (romset == ROM_T3100E)
- t3100e_display_set(0x00);
- break;
-
- case 0xb3: /* T3100e: Select internal display */
- if (romset == ROM_T3100E)
- t3100e_display_set(0x01);
- break;
-
- case 0xb4: /* T3100e: Get configuration / status */
- if (romset == ROM_T3100E)
- keyboard_at_adddata(t3100e_config_get());
- break;
-
- case 0xb5: /* T3100e: Get colour / mono byte */
- if (romset == ROM_T3100E)
- keyboard_at_adddata(t3100e_mono_get());
- break;
-
- case 0xb6: /* T3100e: Set colour / mono byte */
- if (romset == ROM_T3100E)
- keyboard_at.want60 = 1;
- break;
-
- case 0xba:
- if (romset == ROM_ENDEAVOR || romset == ROM_ZAPPA || romset == ROM_ITAUTEC_INFOWAYM)
- keyboard_at_adddata(0);
- break;
-
- /* T3100e commands not implemented:
- * 0xB7: Emulate PS/2 keyboard
- * 0xB8: Emulate AT keyboard */
-
- case 0xbb: /* T3100e: Read 'Fn' key.
- Return it for right Ctrl and right
- Alt; on the real T3100e, these keystrokes
- could only be generated using 'Fn'. */
- if (romset == ROM_T3100E)
- {
- if (pcem_key[0xb8] || /* Right Alt */
- pcem_key[0x9d]) /* Right Ctrl */
- {
- keyboard_at_adddata(0x04);
- }
- else keyboard_at_adddata(0x00);
- }
- break;
-
- case 0xbc: /* T3100e: Reset Fn+Key notification */
- if (romset == ROM_T3100E)
- t3100e_notify_set(0x00);
- break;
case 0xc0: /*Read input port*/
- /* The T3100e returns all bits set except bit 6 which
- * is set by t3100e_mono_set() */
- if (romset == ROM_T3100E)
- keyboard_at.input_port = (t3100e_mono_get() & 1) ? 0xFF : 0xBF;
-
- if (romset == ROM_ENDEAVOR || romset == ROM_ZAPPA || romset == ROM_ITAUTEC_INFOWAYM)
- keyboard_at_adddata(keyboard_at.input_port | 4 | 0x40);
- else
- keyboard_at_adddata(keyboard_at.input_port | 4);
-
+ keyboard_at_adddata(keyboard_at.input_port | 4);
keyboard_at.input_port = ((keyboard_at.input_port + 1) & 3) | (keyboard_at.input_port & 0xfc);
break;
@@ -637,10 +392,7 @@ void keyboard_at_write(uint16_t port, uint8_t val, void *priv)
break;
case 0xca: /*AMI - read keyboard mode*/
- if (romset == ROM_GA686BX) /*TODO*/
- keyboard_at_adddata(0x01); /*PS2 mode*/
- else
- keyboard_at_adddata(0x00); /*ISA mode*/
+ keyboard_at_adddata(0x00); /*ISA mode*/
break;
case 0xcb: /*AMI - set keyboard mode*/
@@ -659,10 +411,6 @@ void keyboard_at_write(uint16_t port, uint8_t val, void *priv)
keyboard_at.want60 = 1;
break;
- case 0xd2: /*Write keyboard output buffer*/
- keyboard_at.want60 = 1;
- break;
-
case 0xd3: /*Write mouse output buffer*/
keyboard_at.want60 = 1;
break;
@@ -674,21 +422,11 @@ void keyboard_at_write(uint16_t port, uint8_t val, void *priv)
case 0xe0: /*Read test inputs*/
keyboard_at_adddata(0x00);
break;
-
- // AWARD BIOS: called after turbo ON/OFF in the
- // Hyundai Super-286TR and probably other AWARD 286
- // bioses. Related to the Turbo LEDs. Exact function
- // can't be confirmed because the system in question
- // has no such leds.
- //case 0xe8: /* Turbo ON, always followed by 0xba */
- //case 0xe9: /* Turbo OFF */
- //break;
case 0xef: /*??? - sent by AMI486*/
break;
- case 0xf0: case 0xf2: case 0xf4: case 0xf6:
- case 0xf8: case 0xfa: case 0xfc: case 0xfe: /*Pulse output port - pin 0 selected - x86 reset*/
+ case 0xfe: /*Pulse output port - pin 0 selected - x86 reset*/
softresetx86(); /*Pulse reset!*/
cpu_set_edx();
break;
@@ -707,12 +445,7 @@ void keyboard_at_write(uint16_t port, uint8_t val, void *priv)
uint8_t keyboard_at_read(uint16_t port, void *priv)
{
uint8_t temp = 0xff;
-
- if (romset != ROM_IBMAT && romset != ROM_IBMXT286)
- cycles -= ISA_CYCLES(8);
// if (port != 0x61) pclog("keyboard_at : read %04X ", port);
- if (romset == ROM_XI8088 && port == 0x63)
- port = 0x61;
switch (port)
{
case 0x60:
@@ -733,13 +466,6 @@ uint8_t keyboard_at_read(uint16_t port, void *priv)
else
temp &= ~0x10;
}
- if (romset == ROM_XI8088)
- {
- if (xi8088_turbo_get())
- temp |= 0x04;
- else
- temp &= ~0x04;
- }
break;
case 0x64:
@@ -760,12 +486,8 @@ void keyboard_at_reset()
keyboard_at.mem[0] = 0x11;
keyboard_at.wantirq = 0;
keyboard_at.output_port = 0xcf;
- if (romset == ROM_XI8088)
- keyboard_at.input_port = (video_is_mda()) ? 0xb0 : 0xf0;
- else
- keyboard_at.input_port = (video_is_mda()) ? 0xf0 : 0xb0;
+ keyboard_at.input_port = (MDA) ? 0xf0 : 0xb0;
keyboard_at.out_new = -1;
- keyboard_at.out_delayed = -1;
keyboard_at.last_irq = 0;
keyboard_at.key_wantdata = 0;
@@ -776,13 +498,12 @@ void keyboard_at_reset()
static void at_refresh(void *p)
{
keyboard_at.refresh = !keyboard_at.refresh;
- timer_advance_u64(&keyboard_at.refresh_timer, PS2_REFRESH_TIME);
+ keyboard_at.refresh_time += PS2_REFRESH_TIME;
}
void keyboard_at_init()
{
//return;
- memset(&keyboard_at, 0, sizeof(keyboard_at));
io_sethandler(0x0060, 0x0005, keyboard_at_read, NULL, NULL, keyboard_at_write, NULL, NULL, NULL);
keyboard_at_reset();
keyboard_send = keyboard_at_adddata_keyboard;
@@ -790,10 +511,8 @@ void keyboard_at_init()
keyboard_at.mouse_write = NULL;
keyboard_at.mouse_p = NULL;
keyboard_at.is_ps2 = 0;
- keyboard_set_scancode_set(SCANCODE_SET_2);
- keyboard_at.scancode_set = SCANCODE_SET_2;
- timer_add(&keyboard_at.send_delay_timer, keyboard_at_poll, NULL, 1);
+ timer_add(keyboard_at_poll, &keybsenddelay, TIMER_ALWAYS_ENABLED, NULL);
}
void keyboard_at_set_mouse(void (*mouse_write)(uint8_t val, void *p), void *p)
@@ -804,6 +523,6 @@ void keyboard_at_set_mouse(void (*mouse_write)(uint8_t val, void *p), void *p)
void keyboard_at_init_ps2()
{
- timer_add(&keyboard_at.refresh_timer, at_refresh, NULL, 1);
+ timer_add(at_refresh, &keyboard_at.refresh_time, TIMER_ALWAYS_ENABLED, NULL);
keyboard_at.is_ps2 = 1;
}
diff --git a/src/keyboard_at.h b/src/keyboard_at.h
index 5dc00fa..6271e75 100644
--- a/src/keyboard_at.h
+++ b/src/keyboard_at.h
@@ -5,6 +5,5 @@ void keyboard_at_poll();
void keyboard_at_set_mouse(void (*mouse_write)(uint8_t val, void *p), void *p);
void keyboard_at_adddata_mouse(uint8_t val);
-extern uint8_t mouse_queue[16];
extern int mouse_queue_start, mouse_queue_end;
extern int mouse_scan;
diff --git a/src/keyboard_olim24.c b/src/keyboard_olim24.c
index a34d830..e86241d 100644
--- a/src/keyboard_olim24.c
+++ b/src/keyboard_olim24.c
@@ -34,8 +34,6 @@ struct
uint8_t params[16];
int mouse_mode;
-
- pc_timer_t send_delay_timer;
} keyboard_olim24;
static uint8_t key_queue[16];
@@ -45,7 +43,7 @@ static uint8_t mouse_scancodes[7];
void keyboard_olim24_poll()
{
- timer_advance_u64(&keyboard_olim24.send_delay_timer, (1000 * TIMER_USEC));
+ keybsenddelay += (1000 * TIMER_USEC);
//pclog("poll %i\n", keyboard_olim24.wantirq);
if (keyboard_olim24.wantirq)
{
@@ -149,6 +147,7 @@ void keyboard_olim24_write(uint16_t port, uint8_t val, void *priv)
ppi.pb = val;
timer_process();
+ timer_update_outstanding();
speaker_update();
speaker_gated = val & 1;
@@ -346,5 +345,5 @@ void keyboard_olim24_init()
keyboard_send = keyboard_olim24_adddata;
keyboard_poll = keyboard_olim24_poll;
- timer_add(&keyboard_olim24.send_delay_timer, keyboard_olim24_poll, NULL, 1);
+ timer_add(keyboard_olim24_poll, &keybsenddelay, TIMER_ALWAYS_ENABLED, NULL);
}
diff --git a/src/keyboard_pcjr.c b/src/keyboard_pcjr.c
index 6519897..13f443b 100644
--- a/src/keyboard_pcjr.c
+++ b/src/keyboard_pcjr.c
@@ -1,7 +1,5 @@
#include "ibm.h"
#include "device.h"
-#include "cassette.h"
-#include "fdd.h"
#include "io.h"
#include "mem.h"
#include "nmi.h"
@@ -34,8 +32,6 @@ struct
uint8_t pa;
uint8_t pb;
-
- pc_timer_t send_delay_timer;
} keyboard_pcjr;
static uint8_t key_queue[16];
@@ -43,7 +39,8 @@ static int key_queue_start = 0, key_queue_end = 0;
void keyboard_pcjr_poll()
{
- timer_advance_u64(&keyboard_pcjr.send_delay_timer, (220 * TIMER_USEC));
+ keybsenddelay += (220 * TIMER_USEC);
+
if (key_queue_start != key_queue_end && !keyboard_pcjr.serial_pos && !keyboard_pcjr.latched)
{
@@ -130,8 +127,7 @@ void keyboard_pcjr_write(uint16_t port, uint8_t val, void *priv)
keyboard_pcjr.pb = val;
timer_process();
-
- cassette_set_motor((val & 8) ? 0 : 1);
+ timer_update_outstanding();
speaker_update();
speaker_gated = val & 1;
@@ -175,12 +171,7 @@ uint8_t keyboard_pcjr_read(uint16_t port, void *priv)
case 0x62:
temp = (keyboard_pcjr.latched ? 1 : 0);
temp |= 0x02; /*Modem card not installed*/
- if (fdd_get_type(0) == 0)
- temp |= 0x04; /*Disc card not installed*/
- if (!(keyboard_pcjr.pb & 8))
- temp |= (cassette_input()) ? 0x10 : 0;
- else
- temp |= (ppispeakon ? 0x10 : 0);
+ temp |= (ppispeakon ? 0x10 : 0);
temp |= (ppispeakon ? 0x20 : 0);
temp |= (keyboard_pcjr.data ? 0x40: 0);
// temp |= 0x04;
@@ -214,5 +205,5 @@ void keyboard_pcjr_init()
keyboard_send = keyboard_pcjr_adddata;
keyboard_poll = keyboard_pcjr_poll;
- timer_add(&keyboard_pcjr.send_delay_timer, keyboard_pcjr_poll, NULL, 1);
+ timer_add(keyboard_pcjr_poll, &keybsenddelay, TIMER_ALWAYS_ENABLED, NULL);
}
diff --git a/src/keyboard_xt.c b/src/keyboard_xt.c
index 7f5c794..d7e69bd 100644
--- a/src/keyboard_xt.c
+++ b/src/keyboard_xt.c
@@ -1,7 +1,5 @@
#include "ibm.h"
#include "device.h"
-#include "cassette.h"
-#include "fdd.h"
#include "io.h"
#include "mem.h"
#include "pic.h"
@@ -10,8 +8,6 @@
#include "sound_speaker.h"
#include "tandy_eeprom.h"
#include "timer.h"
-#include "t1000.h"
-#include "video.h"
#include "keyboard.h"
#include "keyboard_xt.h"
@@ -33,12 +29,7 @@ struct
uint8_t pa;
uint8_t pb;
- int shift_full;
-
int tandy;
- int pb2_turbo;
-
- pc_timer_t send_delay_timer;
} keyboard_xt;
static uint8_t key_queue[16];
@@ -46,18 +37,15 @@ static int key_queue_start = 0, key_queue_end = 0;
void keyboard_xt_poll()
{
- timer_advance_u64(&keyboard_xt.send_delay_timer, (1000 * TIMER_USEC));
- if (!(keyboard_xt.pb & 0x40) && romset != ROM_TANDY)
- return;
+ keybsenddelay += (1000 * TIMER_USEC);
if (keyboard_xt.wantirq)
{
keyboard_xt.wantirq = 0;
keyboard_xt.pa = keyboard_xt.key_waiting;
- keyboard_xt.shift_full = 1;
picint(2);
pclog("keyboard_xt : take IRQ\n");
}
- if (key_queue_start != key_queue_end && !keyboard_xt.shift_full)
+ if (key_queue_start != key_queue_end && !keyboard_xt.pa)
{
keyboard_xt.key_waiting = key_queue[key_queue_start];
pclog("Reading %02X from the key queue at %i\n", keyboard_xt.key_waiting, key_queue_start);
@@ -68,36 +56,6 @@ void keyboard_xt_poll()
void keyboard_xt_adddata(uint8_t val)
{
- /* Test for T1000 'Fn' key (Right Alt / Right Ctrl) */
- if (romset == ROM_T1000 || romset == ROM_T1200)
- {
- if (pcem_key[0xb8] || pcem_key[0x9D]) /* 'Fn' pressed */
- {
- t1000_syskey(0x00, 0x04, 0x00); /* Set 'Fn' indicator */
- switch (val)
- {
- case 0x45: /* Num Lock => toggle numpad */
- t1000_syskey(0x00, 0x00, 0x10); break;
- case 0x47: /* Home => internal display */
- t1000_syskey(0x40, 0x00, 0x00); break;
- case 0x49: /* PgDn => turbo on */
- t1000_syskey(0x80, 0x00, 0x00); break;
- case 0x4D: /* Right => toggle LCD font */
- t1000_syskey(0x00, 0x00, 0x20); break;
- case 0x4F: /* End => external display */
- t1000_syskey(0x00, 0x40, 0x00); break;
- case 0x51: /* PgDn => turbo off */
- t1000_syskey(0x00, 0x80, 0x00); break;
- case 0x54: /* SysRQ => toggle window */
- t1000_syskey(0x00, 0x00, 0x08); break;
- }
- }
- else
- {
- t1000_syskey(0x04, 0x00, 0x00); /* Reset 'Fn' indicator */
- }
- }
-
key_queue[key_queue_end] = val;
pclog("keyboard_xt : %02X added to key queue at %i\n", val, key_queue_end);
key_queue_end = (key_queue_end + 1) & 0xf;
@@ -118,20 +76,13 @@ void keyboard_xt_write(uint16_t port, uint8_t val, void *priv)
if (!(keyboard_xt.pb & 0x40) && (val & 0x40)) /*Reset keyboard*/
{
pclog("keyboard_xt : reset keyboard\n");
- key_queue_start = key_queue_end = 0;
- keyboard_xt.wantirq = 0;
- keyboard_xt.shift_full = 0;
keyboard_xt_adddata(0xaa);
}
keyboard_xt.pb = val;
ppi.pb = val;
timer_process();
-
- if (romset == ROM_IBMPC)
- cassette_set_motor((val & 8) ? 0 : 1);
- else if (keyboard_xt.pb2_turbo)
- cpu_set_turbo((val & 4) ? 0 : 1);
+ timer_update_outstanding();
speaker_update();
speaker_gated = val & 1;
@@ -143,7 +94,6 @@ void keyboard_xt_write(uint16_t port, uint8_t val, void *priv)
if (val & 0x80)
{
keyboard_xt.pa = 0;
- keyboard_xt.shift_full = 0;
picintc(2);
}
break;
@@ -157,24 +107,28 @@ uint8_t keyboard_xt_read(uint16_t port, void *priv)
switch (port)
{
case 0x60:
- if ((romset == ROM_IBMPC || romset == ROM_LEDGE_MODELM) && (keyboard_xt.pb & 0x80))
+ if ((romset == ROM_IBMPC) && (keyboard_xt.pb & 0x80))
{
- if (video_is_ega_vga())
+ if (VGA || gfxcard == GFX_EGA)
temp = 0x4D;
- else if (video_is_mda())
+ else if (MDA)
temp = 0x7D;
else
temp = 0x6D;
- if (hasfpu)
- temp |= 0x02;
- }
- else if ((romset == ROM_ATARIPC3) && (keyboard_xt.pb & 0x80))
- {
- temp = 0x7f;
}
else
{
temp = keyboard_xt.pa;
+ if (key_queue_start == key_queue_end)
+ {
+ keyboard_xt.wantirq = 0;
+ }
+ else
+ {
+ keyboard_xt.key_waiting = key_queue[key_queue_start];
+ key_queue_start = (key_queue_start + 1) & 0xf;
+ keyboard_xt.wantirq = 1;
+ }
}
break;
@@ -189,34 +143,20 @@ uint8_t keyboard_xt_read(uint16_t port, void *priv)
temp = ((mem_size-64) / 32) & 0xf;
else
temp = ((mem_size-64) / 32) >> 4;
-
- temp |= (cassette_input()) ? 0x10 : 0;
- }
- else if (romset == ROM_LEDGE_MODELM)
- {
- /*High bit of memory size is read from port 0xa0*/
- temp = ((mem_size-64) / 32) & 0xf;
- }
- else if (romset == ROM_ATARIPC3)
- {
- if (keyboard_xt.pb & 0x04)
- temp = 0xf;
- else
- temp = 4;
}
else
{
if (keyboard_xt.pb & 0x08)
{
- if (video_is_ega_vga())
+ if (VGA || gfxcard == GFX_EGA)
temp = 4;
- else if (video_is_mda())
+ else if (MDA)
temp = 7;
else
temp = 6;
}
else
- temp = hasfpu ? 0xf : 0xd;
+ temp = 0xD;
}
temp |= (ppispeakon ? 0x20 : 0);
if (keyboard_xt.tandy)
@@ -232,16 +172,6 @@ uint8_t keyboard_xt_read(uint16_t port, void *priv)
return temp;
}
-static uint8_t ledge_modelm_read(uint16_t port, void *p)
-{
- uint8_t temp = 0;
-
- if (((mem_size-64) / 32) >> 4)
- temp |= 0x40;
-
- return temp;
-}
-
void keyboard_xt_reset()
{
keyboard_xt.wantirq = 0;
@@ -253,15 +183,12 @@ void keyboard_xt_init()
{
//return;
io_sethandler(0x0060, 0x0004, keyboard_xt_read, NULL, NULL, keyboard_xt_write, NULL, NULL, NULL);
- if (romset == ROM_LEDGE_MODELM)
- io_sethandler(0x00a0, 0x0001, ledge_modelm_read, NULL, NULL, NULL, NULL, NULL, NULL);
keyboard_xt_reset();
keyboard_send = keyboard_xt_adddata;
keyboard_poll = keyboard_xt_poll;
keyboard_xt.tandy = 0;
- keyboard_xt.pb2_turbo = (romset == ROM_GENXT || romset == ROM_DTKXT || romset == ROM_AMIXT || romset == ROM_PXXT) ? 1 : 0;
- timer_add(&keyboard_xt.send_delay_timer, keyboard_xt_poll, NULL, 1);
+ timer_add(keyboard_xt_poll, &keybsenddelay, TIMER_ALWAYS_ENABLED, NULL);
}
void keyboard_tandy_init()
@@ -273,5 +200,5 @@ void keyboard_tandy_init()
keyboard_poll = keyboard_xt_poll;
keyboard_xt.tandy = (romset != ROM_TANDY) ? 1 : 0;
- timer_add(&keyboard_xt.send_delay_timer, keyboard_xt_poll, NULL, 1);
+ timer_add(keyboard_xt_poll, &keybsenddelay, TIMER_ALWAYS_ENABLED, NULL);
}
diff --git a/src/laserxt.c b/src/laserxt.c
deleted file mode 100644
index 5d15034..0000000
--- a/src/laserxt.c
+++ /dev/null
@@ -1,129 +0,0 @@
-/*This is the chipset used in the LaserXT series model*/
-#include "ibm.h"
-#include "cpu.h"
-#include "io.h"
-#include "mem.h"
-
-static int laserxt_emspage[4];
-static int laserxt_emscontrol[4];
-static mem_mapping_t laserxt_ems_mapping[4];
-static int laserxt_ems_baseaddr_index = 0;
-static uint8_t laserxt_turbo = 0x80;
-
-static uint32_t get_laserxt_ems_addr(uint32_t addr)
-{
- if (laserxt_emspage[(addr >> 14) & 3] & 0x80)
- {
- addr = (romset == ROM_LTXT ? 0x70000 + (((mem_size + 64) & 255) << 10) : 0x30000 + (((mem_size + 320) & 511) << 10)) + ((laserxt_emspage[(addr >> 14) & 3] & 0x0F) << 14) + ((laserxt_emspage[(addr >> 14) & 3] & 0x40) << 12) + (addr & 0x3FFF);
- }
-
- return addr;
-}
-
-static void laserxt_write(uint16_t port, uint8_t val, void *priv)
-{
- int i;
- uint32_t paddr, vaddr;
-
- switch (port)
- {
- case 0x01F0:
- laserxt_turbo = val;
- cpu_set_turbo((val & 0x80) >> 7);
- //pclog("Turbo %s at %04X:%04X\n", (val & 0x80) ? "Enabled" : "Disabled", CS, cpu_state.oldpc);
- break;
- case 0x0208: case 0x4208: case 0x8208: case 0xC208:
- laserxt_emspage[port >> 14] = val;
- paddr = 0xC0000 + (port & 0xC000) + (((laserxt_ems_baseaddr_index + (4 - (port >> 14))) & 0x0C) << 14);
-
- if (val & 0x80)
- {
- mem_mapping_enable(&laserxt_ems_mapping[port >> 14]);
- vaddr = get_laserxt_ems_addr(paddr);
- mem_mapping_set_exec(&laserxt_ems_mapping[port >> 14], ram + vaddr);
- }
- else
- {
- mem_mapping_disable(&laserxt_ems_mapping[port >> 14]);
- }
-
- flushmmucache();
- break;
-
- case 0x0209: case 0x4209: case 0x8209: case 0xC209:
- laserxt_emscontrol[port >> 14] = val;
- laserxt_ems_baseaddr_index = 0;
-
- for (i = 0; i < 4; i++)
- laserxt_ems_baseaddr_index |= (laserxt_emscontrol[i] & 0x80) >> (7 - i);
-
- mem_mapping_set_addr(&laserxt_ems_mapping[0], 0xC0000 + (((laserxt_ems_baseaddr_index + 4) & 0x0C) << 14), 0x4000);
- mem_mapping_set_addr(&laserxt_ems_mapping[1], 0xC4000 + (((laserxt_ems_baseaddr_index + 3) & 0x0C) << 14), 0x4000);
- mem_mapping_set_addr(&laserxt_ems_mapping[2], 0xC8000 + (((laserxt_ems_baseaddr_index + 2) & 0x0C) << 14), 0x4000);
- mem_mapping_set_addr(&laserxt_ems_mapping[3], 0xCC000 + (((laserxt_ems_baseaddr_index + 1) & 0x0C) << 14), 0x4000);
-
- flushmmucache();
- break;
- }
-}
-
-static uint8_t laserxt_read(uint16_t port, void *priv)
-{
- switch (port)
- {
- case 0x01F0:
- return laserxt_turbo;
-
- case 0x0208: case 0x4208: case 0x8208: case 0xC208:
- return laserxt_emspage[port >> 14];
-
- case 0x0209: case 0x4209: case 0x8209: case 0xC209:
- return laserxt_emscontrol[port >> 14];
- }
- return 0xff;
-}
-
-static void mem_write_laserxtems(uint32_t addr, uint8_t val, void *priv)
-{
- addr = get_laserxt_ems_addr(addr);
- if (addr < (mem_size << 10))
- ram[addr] = val;
-}
-
-static uint8_t mem_read_laserxtems(uint32_t addr, void *priv)
-{
- uint8_t val = 0xFF;
-
- addr = get_laserxt_ems_addr(addr);
- if (addr < (mem_size << 10))
- val = ram[addr];
-
- return val;
-}
-
-void laserxt_init()
-{
- int i;
-
- io_sethandler(0x01F0, 0x0001, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL);
- laserxt_turbo = 0x80;
- cpu_set_turbo(1);
-
- if (mem_size > 640)
- {
- io_sethandler(0x0208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL);
- io_sethandler(0x4208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL);
- io_sethandler(0x8208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL);
- io_sethandler(0xc208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL);
- mem_mapping_set_addr(&ram_low_mapping, 0, romset == ROM_LTXT ? 0x70000 + (((mem_size + 64) & 255) << 10) : 0x30000 + (((mem_size + 320) & 511) << 10));
- }
-
- for (i = 0; i < 4; i++)
- {
- laserxt_emspage[i] = 0x7F;
- laserxt_emscontrol[i] = (i == 3) ? 0x00 : 0x80;
- mem_mapping_add(&laserxt_ems_mapping[i], 0xE0000 + (i << 14), 0x4000, mem_read_laserxtems, NULL, NULL, mem_write_laserxtems, NULL, NULL, ram + 0xA0000 + (i << 14), 0, NULL);
- mem_mapping_disable(&laserxt_ems_mapping[i]);
- }
- mem_set_mem_state(0x0a0000, 0x60000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
-}
diff --git a/src/laserxt.h b/src/laserxt.h
deleted file mode 100644
index abf7df1..0000000
--- a/src/laserxt.h
+++ /dev/null
@@ -1 +0,0 @@
-void laserxt_init();
diff --git a/src/lpt.c b/src/lpt.c
index 0f7cf42..5550a98 100644
--- a/src/lpt.c
+++ b/src/lpt.c
@@ -1,65 +1,8 @@
#include "ibm.h"
+#include "dac.h"
#include "io.h"
#include "lpt.h"
-#include "lpt_dac.h"
-#include "lpt_dss.h"
-
-char lpt1_device_name[16];
-
-static struct
-{
- char name[64];
- char internal_name[16];
- lpt_device_t *device;
-} lpt_devices[] =
-{
- {"None", "none", NULL},
- {"Disney Sound Source", "dss", &dss_device},
- {"LPT DAC / Covox Speech Thing", "lpt_dac", &lpt_dac_device},
- {"Stereo LPT DAC", "lpt_dac_stereo", &lpt_dac_stereo_device},
- {"", "", NULL}
-};
-
-char *lpt_device_get_name(int id)
-{
- if (strlen(lpt_devices[id].name) == 0)
- return NULL;
- return lpt_devices[id].name;
-}
-char *lpt_device_get_internal_name(int id)
-{
- if (strlen(lpt_devices[id].internal_name) == 0)
- return NULL;
- return lpt_devices[id].internal_name;
-}
-
-static lpt_device_t *lpt1_device;
-static void *lpt1_device_p;
-
-void lpt1_device_init()
-{
- int c = 0;
-
- while (strcmp(lpt_devices[c].internal_name, lpt1_device_name) && strlen(lpt_devices[c].internal_name) != 0)
- c++;
-
- if (strlen(lpt_devices[c].internal_name) == 0)
- lpt1_device = NULL;
- else
- {
- lpt1_device = lpt_devices[c].device;
- if (lpt1_device)
- lpt1_device_p = lpt1_device->init();
- }
-}
-
-void lpt1_device_close()
-{
- if (lpt1_device)
- lpt1_device->close(lpt1_device_p);
- lpt1_device = NULL;
-}
static uint8_t lpt1_dat, lpt2_dat;
static uint8_t lpt1_ctrl, lpt2_ctrl;
@@ -69,13 +12,11 @@ void lpt1_write(uint16_t port, uint8_t val, void *priv)
switch (port & 3)
{
case 0:
- if (lpt1_device)
- lpt1_device->write_data(val, lpt1_device_p);
+ writedac(0,val);
lpt1_dat = val;
break;
case 2:
- if (lpt1_device)
- lpt1_device->write_ctrl(val, lpt1_device_p);
+ writedacctrl(0,val);
lpt1_ctrl = val;
break;
}
@@ -87,9 +28,7 @@ uint8_t lpt1_read(uint16_t port, void *priv)
case 0:
return lpt1_dat;
case 1:
- if (lpt1_device)
- return lpt1_device->read_status(lpt1_device_p);
- return 0;
+ return readdacfifo();
case 2:
return lpt1_ctrl;
}
@@ -101,9 +40,11 @@ void lpt2_write(uint16_t port, uint8_t val, void *priv)
switch (port & 3)
{
case 0:
+ writedac(0,val);
lpt2_dat = val;
break;
case 2:
+ writedacctrl(0,val);
lpt2_ctrl = val;
break;
}
@@ -115,7 +56,7 @@ uint8_t lpt2_read(uint16_t port, void *priv)
case 0:
return lpt2_dat;
case 1:
- return 0;
+ return readdacfifo();
case 2:
return lpt2_ctrl;
}
@@ -124,14 +65,13 @@ uint8_t lpt2_read(uint16_t port, void *priv)
void lpt_init()
{
- io_sethandler(0x0378, 0x0003, lpt1_read, NULL, NULL, lpt1_write, NULL, NULL, NULL);
- io_sethandler(0x0278, 0x0003, lpt2_read, NULL, NULL, lpt2_write, NULL, NULL, NULL);
+ io_sethandler(0x0278, 0x0003, lpt1_read, NULL, NULL, lpt1_write, NULL, NULL, NULL);
+ io_sethandler(0x0378, 0x0003, lpt2_read, NULL, NULL, lpt2_write, NULL, NULL, NULL);
}
void lpt1_init(uint16_t port)
{
- if (port)
- io_sethandler(port, 0x0003, lpt1_read, NULL, NULL, lpt1_write, NULL, NULL, NULL);
+ io_sethandler(port, 0x0003, lpt1_read, NULL, NULL, lpt1_write, NULL, NULL, NULL);
}
void lpt1_remove()
{
@@ -141,8 +81,7 @@ void lpt1_remove()
}
void lpt2_init(uint16_t port)
{
- if (port)
- io_sethandler(port, 0x0003, lpt2_read, NULL, NULL, lpt2_write, NULL, NULL, NULL);
+ io_sethandler(port, 0x0003, lpt2_read, NULL, NULL, lpt2_write, NULL, NULL, NULL);
}
void lpt2_remove()
{
diff --git a/src/lpt.h b/src/lpt.h
index 117524a..0ff2e7b 100644
--- a/src/lpt.h
+++ b/src/lpt.h
@@ -4,24 +4,3 @@ extern void lpt1_remove();
extern void lpt2_init(uint16_t port);
extern void lpt2_remove();
extern void lpt2_remove_ams();
-
-void lpt1_write(uint16_t port, uint8_t val, void *priv);
-uint8_t lpt1_read(uint16_t port, void *priv);
-
-void lpt1_device_init();
-void lpt1_device_close();
-
-char *lpt_device_get_name(int id);
-char *lpt_device_get_internal_name(int id);
-
-extern char lpt1_device_name[16];
-
-typedef struct
-{
- char name[80];
- void *(*init)();
- void (*close)(void *p);
- void (*write_data)(uint8_t val, void *p);
- void (*write_ctrl)(uint8_t val, void *p);
- uint8_t (*read_status)(void *p);
-} lpt_device_t;
diff --git a/src/lpt_dac.c b/src/lpt_dac.c
deleted file mode 100644
index 7a6fe82..0000000
--- a/src/lpt_dac.c
+++ /dev/null
@@ -1,115 +0,0 @@
-#include
-#include "ibm.h"
-#include "filters.h"
-#include "lpt.h"
-#include "lpt_dac.h"
-#include "sound.h"
-
-typedef struct lpt_dac_t
-{
- uint8_t dac_val_l, dac_val_r;
-
- int is_stereo;
- int channel;
-
- int16_t buffer[2][MAXSOUNDBUFLEN];
- int pos;
-} lpt_dac_t;
-
-static void dac_update(lpt_dac_t *lpt_dac)
-{
- for (; lpt_dac->pos < sound_pos_global; lpt_dac->pos++)
- {
- lpt_dac->buffer[0][lpt_dac->pos] = (int8_t)(lpt_dac->dac_val_l ^ 0x80) * 0x40;
- lpt_dac->buffer[1][lpt_dac->pos] = (int8_t)(lpt_dac->dac_val_r ^ 0x80) * 0x40;
- }
-}
-
-
-static void dac_write_data(uint8_t val, void *p)
-{
- lpt_dac_t *lpt_dac = (lpt_dac_t *)p;
-
- if (lpt_dac->is_stereo)
- {
- if (lpt_dac->channel)
- lpt_dac->dac_val_r = val;
- else
- lpt_dac->dac_val_l = val;
- }
- else
- lpt_dac->dac_val_l = lpt_dac->dac_val_r = val;
- dac_update(lpt_dac);
-}
-
-static void dac_write_ctrl(uint8_t val, void *p)
-{
- lpt_dac_t *lpt_dac = (lpt_dac_t *)p;
-
- if (lpt_dac->is_stereo)
- lpt_dac->channel = val & 0x01;
-}
-
-static uint8_t dac_read_status(void *p)
-{
- return 0;
-}
-
-
-static void dac_get_buffer(int32_t *buffer, int len, void *p)
-{
- lpt_dac_t *lpt_dac = (lpt_dac_t *)p;
- int c;
-
- dac_update(lpt_dac);
-
- for (c = 0; c < len; c++)
- {
- buffer[c*2] += dac_iir(0, lpt_dac->buffer[0][c]);
- buffer[c*2 + 1] += dac_iir(1, lpt_dac->buffer[1][c]);
- }
- lpt_dac->pos = 0;
-}
-
-static void *dac_init()
-{
- lpt_dac_t *lpt_dac = malloc(sizeof(lpt_dac_t));
- memset(lpt_dac, 0, sizeof(lpt_dac_t));
-
- sound_add_handler(dac_get_buffer, lpt_dac);
-
- return lpt_dac;
-}
-static void *dac_stereo_init()
-{
- lpt_dac_t *lpt_dac = dac_init();
-
- lpt_dac->is_stereo = 1;
-
- return lpt_dac;
-}
-static void dac_close(void *p)
-{
- lpt_dac_t *lpt_dac = (lpt_dac_t *)p;
-
- free(lpt_dac);
-}
-
-lpt_device_t lpt_dac_device =
-{
- "LPT DAC / Covox Speech Thing",
- dac_init,
- dac_close,
- dac_write_data,
- dac_write_ctrl,
- dac_read_status
-};
-lpt_device_t lpt_dac_stereo_device =
-{
- "Stereo LPT DAC",
- dac_stereo_init,
- dac_close,
- dac_write_data,
- dac_write_ctrl,
- dac_read_status
-};
diff --git a/src/lpt_dac.h b/src/lpt_dac.h
deleted file mode 100644
index b5f9815..0000000
--- a/src/lpt_dac.h
+++ /dev/null
@@ -1,2 +0,0 @@
-extern lpt_device_t lpt_dac_device;
-extern lpt_device_t lpt_dac_stereo_device;
diff --git a/src/lpt_dss.c b/src/lpt_dss.c
deleted file mode 100644
index 767658a..0000000
--- a/src/lpt_dss.c
+++ /dev/null
@@ -1,111 +0,0 @@
-#include
-#include "ibm.h"
-#include "filters.h"
-#include "lpt.h"
-#include "lpt_dac.h"
-#include "sound.h"
-
-typedef struct dss_t
-{
- uint8_t fifo[16];
- int read_idx, write_idx;
-
- uint8_t dac_val;
-
- pc_timer_t timer;
-
- int16_t buffer[MAXSOUNDBUFLEN];
- int pos;
-} dss_t;
-
-static void dss_update(dss_t *dss)
-{
- for (; dss->pos < sound_pos_global; dss->pos++)
- dss->buffer[dss->pos] = (int8_t)(dss->dac_val ^ 0x80) * 0x40;
-}
-
-
-static void dss_write_data(uint8_t val, void *p)
-{
- dss_t *dss = (dss_t *)p;
-
- if ((dss->write_idx - dss->read_idx) < 16)
- {
- dss->fifo[dss->write_idx & 15] = val;
- dss->write_idx++;
- }
-}
-
-static void dss_write_ctrl(uint8_t val, void *p)
-{
-}
-
-static uint8_t dss_read_status(void *p)
-{
- dss_t *dss = (dss_t *)p;
-
- if ((dss->write_idx - dss->read_idx) >= 16)
- return 0x40;
- return 0;
-}
-
-
-static void dss_get_buffer(int32_t *buffer, int len, void *p)
-{
- dss_t *dss = (dss_t *)p;
- int c;
-
- dss_update(dss);
-
- for (c = 0; c < len*2; c += 2)
- {
- int16_t val = (int16_t)dss_iir((float)dss->buffer[c >> 1]);
-
- buffer[c] += val;
- buffer[c+1] += val;
- }
-
- dss->pos = 0;
-}
-
-static void dss_callback(void *p)
-{
- dss_t *dss = (dss_t *)p;
-
- dss_update(dss);
-
- if ((dss->write_idx - dss->read_idx) > 0)
- {
- dss->dac_val = dss->fifo[dss->read_idx & 15];
- dss->read_idx++;
- }
-
- timer_advance_u64(&dss->timer, (TIMER_USEC * (1000000.0 / 7000.0)));
-}
-
-static void *dss_init()
-{
- dss_t *dss = malloc(sizeof(dss_t));
- memset(dss, 0, sizeof(dss_t));
-
- sound_add_handler(dss_get_buffer, dss);
- timer_add(&dss->timer, dss_callback, dss, 1);
-
- return dss;
-}
-static void dss_close(void *p)
-{
- dss_t *dss = (dss_t *)p;
-
- free(dss);
-}
-
-lpt_device_t dss_device =
-{
- "Disney Sound Source",
- dss_init,
- dss_close,
- dss_write_data,
- dss_write_ctrl,
- dss_read_status
-};
diff --git a/src/lpt_dss.h b/src/lpt_dss.h
deleted file mode 100644
index 6f85c1a..0000000
--- a/src/lpt_dss.h
+++ /dev/null
@@ -1 +0,0 @@
-extern lpt_device_t dss_device;
diff --git a/src/mca.c b/src/mca.c
index 11f8268..ebd8ccb 100644
--- a/src/mca.c
+++ b/src/mca.c
@@ -6,7 +6,6 @@
void (*mca_card_write[8])(int addr, uint8_t val, void *priv);
uint8_t (*mca_card_read[8])(int addr, void *priv);
-void (*mca_card_reset[8])(void *priv);
void *mca_priv[8];
static int mca_index;
static int mca_nr_cards;
@@ -15,13 +14,10 @@ void mca_init(int nr_cards)
{
int c;
- MCA = 1;
-
for (c = 0; c < 8; c++)
{
mca_card_read[c] = NULL;
mca_card_write[c] = NULL;
- mca_card_reset[c] = NULL;
mca_priv[c] = NULL;
}
@@ -51,18 +47,7 @@ void mca_write(uint16_t port, uint8_t val)
mca_card_write[mca_index](port, val, mca_priv[mca_index]);
}
-void mca_reset(void)
-{
- int c;
-
- for (c = 0; c < 8; c++)
- {
- if (mca_card_reset[c])
- mca_card_reset[c](mca_priv[c]);
- }
-}
-
-void mca_add(uint8_t (*read)(int addr, void *priv), void (*write)(int addr, uint8_t val, void *priv), void (*reset)(void *priv), void *priv)
+void mca_add(uint8_t (*read)(int addr, void *priv), void (*write)(int addr, uint8_t val, void *priv), void *priv)
{
int c;
@@ -72,7 +57,6 @@ void mca_add(uint8_t (*read)(int addr, void *priv), void (*write)(int addr, uint
{
mca_card_read[c] = read;
mca_card_write[c] = write;
- mca_card_reset[c] = reset;
mca_priv[c] = priv;
return;
}
diff --git a/src/mca.h b/src/mca.h
index a298d24..cf9361f 100644
--- a/src/mca.h
+++ b/src/mca.h
@@ -1,6 +1,5 @@
void mca_init(int nr_cards);
-void mca_add(uint8_t (*read)(int addr, void *priv), void (*write)(int addr, uint8_t val, void *priv), void (*reset)(void *priv), void *priv);
+void mca_add(uint8_t (*read)(int addr, void *priv), void (*write)(int addr, uint8_t val, void *priv), void *priv);
void mca_set_index(int index);
uint8_t mca_read(uint16_t port);
void mca_write(uint16_t port, uint8_t val);
-void mca_reset(void);
diff --git a/src/mcr.c b/src/mcr.c
index 6c7d746..83d7530 100644
--- a/src/mcr.c
+++ b/src/mcr.c
@@ -2,7 +2,6 @@
This chip was used as part of many 386 chipsets
It controls memory addressing and shadowing*/
#include "ibm.h"
-#include "x86.h"
int nextreg6;
uint8_t mcr22;
@@ -11,6 +10,7 @@ void resetmcr()
{
mcrlock=0;
mcrfirst=1;
+ shadowbios=0;
}
void writemcr(uint16_t addr, uint8_t val)
@@ -29,7 +29,7 @@ void writemcr(uint16_t addr, uint8_t val)
// exit(-1);
break;
case 0x23:
-// if (nextreg6) shadowbios=!val;
+ if (nextreg6) shadowbios=!val;
break;
}
mcr22=val;
diff --git a/src/mem.c b/src/mem.c
index 15dc5ee..ecfc949 100644
--- a/src/mem.c
+++ b/src/mem.c
@@ -17,25 +17,36 @@
#include "rom.h"
#include "x86_ops.h"
#include "codegen.h"
-#include "xi8088.h"
page_t *pages;
page_t **page_lookup;
-static mem_mapping_t *read_mapping[0x40000];
-static mem_mapping_t *write_mapping[0x40000];
-static uint8_t *_mem_exec[0x40000];
-static uint8_t _mem_state[0x40000];
+static uint8_t (*_mem_read_b[0x40000])(uint32_t addr, void *priv);
+static uint16_t (*_mem_read_w[0x40000])(uint32_t addr, void *priv);
+static uint32_t (*_mem_read_l[0x40000])(uint32_t addr, void *priv);
+static void (*_mem_write_b[0x40000])(uint32_t addr, uint8_t val, void *priv);
+static void (*_mem_write_w[0x40000])(uint32_t addr, uint16_t val, void *priv);
+static void (*_mem_write_l[0x40000])(uint32_t addr, uint32_t val, void *priv);
+static uint8_t *_mem_exec[0x40000];
+static void *_mem_priv_r[0x40000];
+static void *_mem_priv_w[0x40000];
+static mem_mapping_t *_mem_mapping_r[0x40000];
+static mem_mapping_t *_mem_mapping_w[0x40000];
+static int _mem_state[0x40000];
static mem_mapping_t base_mapping;
mem_mapping_t ram_low_mapping;
mem_mapping_t ram_high_mapping;
-mem_mapping_t ram_mid_mapping;
-mem_mapping_t ram_remapped_mapping;
+static mem_mapping_t ram_mid_mapping;
+static mem_mapping_t ram_remapped_mapping;
mem_mapping_t bios_mapping[8];
-mem_mapping_t bios_high_mapping[9];
+mem_mapping_t bios_high_mapping[8];
static mem_mapping_t romext_mapping;
+int shadowbios,shadowbios_write;
+
+unsigned char isram[0x10000];
+
static uint8_t ff_array[0x1000];
int mem_size;
@@ -46,23 +57,592 @@ int cachesize=256;
uint8_t *ram, *rom = NULL;
uint8_t romext[32768];
-uint64_t *byte_dirty_mask;
-uint64_t *byte_code_present_mask;
-
-uint32_t mem_logical_addr;
-
-void (*smram_enable)(void);
-void (*smram_disable)(void);
-
-int mmuflush=0;
-int mmu_perm=4;
-
-int mem_addr_is_ram(uint32_t addr)
+static void mem_load_atide115_bios()
{
- mem_mapping_t *mapping = read_mapping[addr >> 14];
-
- return (mapping == &ram_low_mapping) || (mapping == &ram_high_mapping) || (mapping == &ram_mid_mapping) || (mapping == &ram_remapped_mapping);
+ FILE *f;
+ f=romfopen("roms/ide_at_1_1_5.bin","rb");
+
+// is486=0;
+ if (f)
+ {
+ fread(romext,16384,1,f);
+ fclose(f);
+ }
}
+
+int loadbios()
+{
+ FILE *f=NULL,*ff=NULL;
+ int c;
+
+ loadfont("roms/mda.rom", 0);
+ loadfont("roms/wy700.rom", 3);
+ loadfont("roms/8x12.bin", 4);
+
+ biosmask = 0xffff;
+
+ if (!rom)
+ rom = malloc(0x20000);
+ memset(romext,0x63,0x4000);
+ memset(rom, 0xff, 0x20000);
+
+ pclog("Starting with romset %i\n", romset);
+
+ switch (romset)
+ {
+ case ROM_PC1512:
+ f=romfopen("roms/pc1512/40043.v1","rb");
+ ff=romfopen("roms/pc1512/40044.v1","rb");
+ if (!f || !ff) break;
+ for (c=0xC000;c<0x10000;c+=2)
+ {
+ rom[c]=getc(f);
+ rom[c+1]=getc(ff);
+ }
+ fclose(ff);
+ fclose(f);
+ loadfont("roms/pc1512/40078.ic127", 2);
+ return 1;
+ case ROM_PC1640:
+ f=romfopen("roms/pc1640/40044.v3","rb");
+ ff=romfopen("roms/pc1640/40043.v3","rb");
+ if (!f || !ff) break;
+ for (c=0xC000;c<0x10000;c+=2)
+ {
+ rom[c]=getc(f);
+ rom[c+1]=getc(ff);
+ }
+ fclose(ff);
+ fclose(f);
+ f=romfopen("roms/pc1640/40100","rb");
+ if (!f) break;
+ fclose(f);
+ return 1;
+ case ROM_PC200:
+ f=romfopen("roms/pc200/pc20v2.1","rb");
+ ff=romfopen("roms/pc200/pc20v2.0","rb");
+ if (!f || !ff) break;
+ for (c=0xC000;c<0x10000;c+=2)
+ {
+ rom[c]=getc(f);
+ rom[c+1]=getc(ff);
+ }
+ fclose(ff);
+ fclose(f);
+ loadfont("roms/pc200/40109.bin", 1);
+ return 1;
+ case ROM_TANDY:
+ f=romfopen("roms/tandy/tandy1t1.020","rb");
+ if (!f) break;
+ fread(rom,65536,1,f);
+ fclose(f);
+ return 1;
+ case ROM_TANDY1000HX:
+ f = romfopen("roms/tandy1000hx/v020000.u12", "rb");
+ if (!f) break;
+ fread(rom, 0x20000, 1, f);
+ fclose(f);
+ biosmask = 0x1ffff;
+ return 1;
+ case ROM_TANDY1000SL2:
+ f = romfopen("roms/tandy1000sl2/8079047.hu1" ,"rb");
+ ff = romfopen("roms/tandy1000sl2/8079048.hu2","rb");
+ if (!f || !ff) break;
+ fseek(f, 0x30000/2, SEEK_SET);
+ fseek(ff, 0x30000/2, SEEK_SET);
+ for (c = 0x0000; c < 0x10000; c += 2)
+ {
+ rom[c] = getc(f);
+ rom[c + 1] = getc(ff);
+ }
+ fclose(ff);
+ fclose(f);
+ return 1;
+/* case ROM_IBMPCJR:
+ f=fopen("pcjr/bios.rom","rb");
+ fread(rom+0xE000,8192,1,f);
+ fclose(f);
+ f=fopen("pcjr/basic.rom","rb");
+ fread(rom+0x6000,32768,1,f);
+ fclose(f);
+ break;*/
+ case ROM_IBMXT:
+ f=romfopen("roms/ibmxt/xt.rom","rb");
+ if (!f)
+ {
+ f = romfopen("roms/ibmxt/5000027.u19", "rb");
+ ff = romfopen("roms/ibmxt/1501512.u18","rb");
+ if (!f || !ff) break;
+ fread(rom, 0x8000, 1, f);
+ fread(rom + 0x8000, 0x8000, 1, ff);
+ fclose(ff);
+ fclose(f);
+ return 1;
+ }
+ else
+ {
+ fread(rom,65536,1,f);
+ fclose(f);
+ return 1;
+ }
+ break;
+
+ case ROM_IBMPCJR:
+ f = romfopen("roms/ibmpcjr/bios.rom","rb");
+ if (!f) break;
+ fread(rom, 0x10000, 1, f);
+ fclose(f);
+ return 1;
+
+ case ROM_GENXT:
+ f=romfopen("roms/genxt/pcxt.rom","rb");
+ if (!f) break;
+ fread(rom+0xE000,8192,1,f);
+ fclose(f);
+ return 1;
+ case ROM_DTKXT:
+ f=romfopen("roms/dtk/dtk_erso_2.42_2764.bin","rb");
+ if (!f) break;
+ fread(rom+0xE000,8192,1,f);
+ fclose(f);
+ return 1;
+ case ROM_OLIM24:
+ f = romfopen("roms/olivetti_m24/olivetti_m24_version_1.43_low.bin" ,"rb");
+ ff = romfopen("roms/olivetti_m24/olivetti_m24_version_1.43_high.bin","rb");
+ if (!f || !ff) break;
+ for (c = 0x0000; c < 0x4000; c += 2)
+ {
+ rom[c + 0xc000] = getc(f);
+ rom[c + 0xc001] = getc(ff);
+ }
+ fclose(ff);
+ fclose(f);
+ return 1;
+
+ case ROM_PC2086:
+ f = romfopen("roms/pc2086/40179.ic129" ,"rb");
+ ff = romfopen("roms/pc2086/40180.ic132","rb");
+ if (!f || !ff) break;
+ pclog("Loading BIOS\n");
+ for (c = 0x0000; c < 0x4000; c += 2)
+ {
+ rom[c + 0x0000] = getc(f);
+ rom[c + 0x0001] = getc(ff);
+ }
+ pclog("%02X %02X %02X\n", rom[0xfff0], rom[0xfff1], rom[0xfff2]);
+ fclose(ff);
+ fclose(f);
+ f = romfopen("roms/pc2086/40186.ic171", "rb");
+ if (!f) break;
+ fclose(f);
+ biosmask = 0x3fff;
+ return 1;
+
+ case ROM_PC3086:
+ f = romfopen("roms/pc3086/fc00.bin" ,"rb");
+ if (!f) break;
+ fread(rom, 0x4000, 1, f);
+ fclose(f);
+ f = romfopen("roms/pc3086/c000.bin", "rb");
+ if (!f) break;
+ fclose(f);
+ biosmask = 0x3fff;
+ return 1;
+
+ case ROM_IBMAT:
+/* f=romfopen("roms/amic206.bin","rb");
+ if (!f) break;
+ fread(rom,65536,1,f);
+ fclose(f);
+ return 1;*/
+ case ROM_IBMAT386:
+ f = romfopen("roms/ibmat/62x0820.u27", "rb");
+ ff =romfopen("roms/ibmat/62x0821.u47", "rb");
+ if (!f || !ff) break;
+ for (c=0x0000;c<0x10000;c+=2)
+ {
+ rom[c]=getc(f);
+ rom[c+1]=getc(ff);
+ }
+ fclose(ff);
+ fclose(f);
+ return 1;
+ case ROM_CMDPC30:
+ f = romfopen("roms/cmdpc30/commodore pc 30 iii even.bin", "rb");
+ ff = romfopen("roms/cmdpc30/commodore pc 30 iii odd.bin", "rb");
+ if (!f || !ff) break;
+ for (c = 0x0000; c < 0x8000; c += 2)
+ {
+ rom[c] = getc(f);
+ rom[c + 1] = getc(ff);
+ }
+ fclose(ff);
+ fclose(f);
+ biosmask = 0x7fff;
+ return 1;
+ case ROM_DELL200:
+ f=romfopen("roms/dells200/dell0.bin","rb");
+ ff=romfopen("roms/dells200/dell1.bin","rb");
+ if (!f || !ff) break;
+ for (c=0x0000;c<0x10000;c+=2)
+ {
+ rom[c]=getc(f);
+ rom[c+1]=getc(ff);
+ }
+ fclose(ff);
+ fclose(f);
+ return 1;
+/* case ROM_IBMAT386:
+ f=romfopen("roms/at386/at386.bin","rb");
+ if (!f) break;
+ fread(rom,65536,1,f);
+ fclose(f);
+ return 1;*/
+ case ROM_AMI386SX:
+// f=romfopen("roms/at386/at386.bin","rb");
+ f=romfopen("roms/ami386/ami386.bin","rb");
+ if (!f) break;
+ fread(rom,65536,1,f);
+ fclose(f);
+ return 1;
+
+ case ROM_AMI386DX_OPTI495: /*This uses the OPTi 82C495 chipset*/
+ f=romfopen("roms/ami386dx/opt495sx.ami","rb");
+ if (!f) break;
+ fread(rom,65536,1,f);
+ fclose(f);
+ return 1;
+ case ROM_MR386DX_OPTI495: /*This uses the OPTi 82C495 chipset*/
+ f=romfopen("roms/mr386dx/opt495sx.mr","rb");
+ if (!f) break;
+ fread(rom,65536,1,f);
+ fclose(f);
+ return 1;
+
+ case ROM_ACER386:
+ f=romfopen("roms/acer386/acer386.bin","rb");
+ if (!f) break;
+ fread(rom,65536,1,f);
+ fclose(f);
+ rom[0xB0]=0xB0-0x51;
+ rom[0x40d4]=0x51; /*PUSH CX*/
+ f=romfopen("roms/acer386/oti067.bin","rb");
+ if (!f) break;
+ fclose(f);
+ return 1;
+
+ case ROM_AMI286:
+ f=romfopen("roms/ami286/amic206.bin","rb");
+ if (!f) break;
+ fread(rom,65536,1,f);
+ fclose(f);
+// memset(romext,0x63,0x8000);
+ return 1;
+
+ case ROM_AWARD286:
+ f=romfopen("roms/award286/award.bin","rb");
+ if (!f) break;
+ fread(rom,65536,1,f);
+ fclose(f);
+ return 1;
+
+ case ROM_EUROPC:
+// return 0;
+ f=romfopen("roms/europc/50145","rb");
+ if (!f) break;
+ fread(rom+0x8000,32768,1,f);
+ fclose(f);
+// memset(romext,0x63,0x8000);
+ return 1;
+
+ case ROM_IBMPC:
+ f=romfopen("roms/ibmpc/pc102782.bin","rb");
+ if (!f) break;
+// f=fopen("pc081682.bin","rb");
+ fread(rom+0xE000,8192,1,f);
+ fclose(f);
+ f=romfopen("roms/ibmpc/basicc11.f6","rb");
+ if (!f) return 1; /*I don't really care if BASIC is there or not*/
+ fread(rom+0x6000,8192,1,f);
+ fclose(f);
+ f=romfopen("roms/ibmpc/basicc11.f8","rb");
+ if (!f) break; /*But if some of it is there, then all of it must be*/
+ fread(rom+0x8000,8192,1,f);
+ fclose(f);
+ f=romfopen("roms/ibmpc/basicc11.fa","rb");
+ if (!f) break;
+ fread(rom+0xA000,8192,1,f);
+ fclose(f);
+ f=romfopen("roms/ibmpc/basicc11.fc","rb");
+ if (!f) break;
+ fread(rom+0xC000,8192,1,f);
+ fclose(f);
+ return 1;
+
+ case ROM_MEGAPC:
+ f = romfopen("roms/megapc/41651-bios lo.u18", "rb");
+ ff = romfopen("roms/megapc/211253-bios hi.u19", "rb");
+ if (!f || !ff) break;
+ fseek(f, 0x8000, SEEK_SET);
+ fseek(ff, 0x8000, SEEK_SET);
+ for (c = 0x0000; c < 0x10000; c+=2)
+ {
+ rom[c]=getc(f);
+ rom[c+1]=getc(ff);
+ }
+ fclose(ff);
+ fclose(f);
+ return 1;
+
+ case ROM_AMI486:
+ f=romfopen("roms/ami486/ami486.bin","rb");
+ if (!f) break;
+ fread(rom,65536,1,f);
+ fclose(f);
+ //is486=1;
+ return 1;
+
+ case ROM_WIN486:
+// f=romfopen("roms/win486/win486.bin","rb");
+ f=romfopen("roms/win486/ali1429g.amw","rb");
+ if (!f) break;
+ fread(rom,65536,1,f);
+ fclose(f);
+ //is486=1;
+ return 1;
+
+ case ROM_PCI486:
+ f=romfopen("roms/hot-433/hot-433.ami","rb");
+ if (!f) break;
+ fread(rom, 0x20000, 1, f);
+ fclose(f);
+ biosmask = 0x1ffff;
+ //is486=1;
+ return 1;
+
+ case ROM_SIS496:
+ f = romfopen("roms/sis496/sis496-1.awa", "rb");
+ if (!f) break;
+ fread(rom, 0x20000, 1, f);
+ fclose(f);
+ biosmask = 0x1ffff;
+ pclog("Load SIS496 %x %x\n", rom[0x1fff0], rom[0xfff0]);
+ return 1;
+
+ case ROM_430VX:
+// f = romfopen("roms/430vx/ga586atv.bin", "rb");
+// f = fopen("roms/430vx/vx29.bin", "rb");
+ f = romfopen("roms/430vx/55xwuq0e.bin", "rb");
+// f=romfopen("roms/430vx/430vx","rb");
+ if (!f) break;
+ fread(rom, 0x20000, 1, f);
+ fclose(f);
+ biosmask = 0x1ffff;
+ //is486=1;
+ return 1;
+
+ case ROM_REVENGE:
+ f = romfopen("roms/revenge/1009af2_.bio", "rb");
+ if (!f) break;
+ fseek(f, 0x80, SEEK_SET);
+ fread(rom + 0x10000, 0x10000, 1, f);
+ fclose(f);
+ f = romfopen("roms/revenge/1009af2_.bi1", "rb");
+ if (!f) break;
+ fseek(f, 0x80, SEEK_SET);
+ fread(rom, 0xc000, 1, f);
+ fclose(f);
+ biosmask = 0x1ffff;
+ //is486=1;
+ return 1;
+ case ROM_ENDEAVOR:
+ f = romfopen("roms/endeavor/1006cb0_.bio", "rb");
+ if (!f) break;
+ fseek(f, 0x80, SEEK_SET);
+ fread(rom + 0x10000, 0x10000, 1, f);
+ fclose(f);
+ f = romfopen("roms/endeavor/1006cb0_.bi1", "rb");
+ if (!f) break;
+ fseek(f, 0x80, SEEK_SET);
+ fread(rom, 0xd000, 1, f);
+ fclose(f);
+ biosmask = 0x1ffff;
+ //is486=1;
+ return 1;
+
+ case ROM_IBMPS1_2011:
+#if 0
+ f=romfopen("roms/ibmps1es/ibm_1057757_24-05-90.bin","rb");
+ ff=romfopen("roms/ibmps1es/ibm_1057757_29-15-90.bin","rb");
+ fseek(f, 0x10000, SEEK_SET);
+ fseek(ff, 0x10000, SEEK_SET);
+ if (!f || !ff) break;
+ for (c = 0x0000; c < 0x20000; c += 2)
+ {
+ rom[c] = getc(f);
+ rom[c+1] = getc(ff);
+ }
+ fclose(ff);
+ fclose(f);
+#endif
+//#if 0
+ f = romfopen("roms/ibmps1es/f80000.bin", "rb");
+ if (!f) break;
+ fseek(f, 0x60000, SEEK_SET);
+ fread(rom, 0x20000, 1, f);
+ fclose(f);
+//#endif
+ biosmask = 0x1ffff;
+ mem_load_atide115_bios();
+ return 1;
+
+ case ROM_IBMPS1_2121:
+ f = romfopen("roms/ibmps1_2121/fc0000.bin", "rb");
+ if (!f) break;
+ fseek(f, 0x20000, SEEK_SET);
+ fread(rom, 0x20000, 1, f);
+ fclose(f);
+ biosmask = 0x1ffff;
+ return 1;
+
+ case ROM_DESKPRO_386:
+ f=romfopen("roms/deskpro386/109592-005.u11.bin","rb");
+ ff=romfopen("roms/deskpro386/109591-005.u13.bin","rb");
+ if (!f || !ff) break;
+ for (c = 0x0000; c < 0x8000; c += 2)
+ {
+ rom[c] = getc(f);
+ rom[c+1] = getc(ff);
+ }
+ fclose(ff);
+ fclose(f);
+ biosmask = 0x7fff;
+ return 1;
+
+ case ROM_AMIXT:
+ f = romfopen("roms/amixt/ami_8088_bios_31jan89.bin", "rb");
+ if (!f) break;
+ fread(rom + 0xE000, 8192, 1, f);
+ fclose(f);
+ return 1;
+
+ case ROM_LTXT:
+ f = romfopen("roms/ltxt/27c64.bin", "rb");
+ if (!f) break;
+ fread(rom + 0xE000, 8192, 1, f);
+ fclose(f);
+ return 1;
+
+ case ROM_LXT3:
+ f = romfopen("roms/lxt3/27c64d.bin", "rb");
+ if (!f) break;
+ fread(rom + 0xE000, 8192, 1, f);
+ fclose(f);
+ return 1;
+
+ case ROM_PX386: /*Phoenix 80386 BIOS*/
+ f=romfopen("roms/px386/3iip001l.bin","rb");
+ ff=romfopen("roms/px386/3iip001h.bin","rb");
+ if (!f || !ff) break;
+ for (c = 0x0000; c < 0x10000; c += 2)
+ {
+ rom[c] = getc(f);
+ rom[c+1] = getc(ff);
+ }
+ fclose(ff);
+ fclose(f);
+ return 1;
+
+ case ROM_DTK386: /*Uses NEAT chipset*/
+ f = romfopen("roms/dtk386/3cto001.bin", "rb");
+ if (!f) break;
+ fread(rom, 65536, 1, f);
+ fclose(f);
+ return 1;
+
+ case ROM_PXXT:
+ f = romfopen("roms/pxxt/000p001.bin", "rb");
+ if (!f) break;
+ fread(rom + 0xE000, 8192, 1, f);
+ fclose(f);
+ return 1;
+
+ case ROM_JUKOPC:
+ f = romfopen("roms/jukopc/000o001.bin", "rb");
+ if (!f) break;
+ fread(rom + 0xE000, 8192, 1, f);
+ fclose(f);
+ return 1;
+
+ case ROM_IBMPS2_M30_286:
+ f = romfopen("roms/ibmps2_m30_286/33f5381a.bin", "rb");
+ if (!f) break;
+ fread(rom, 0x20000, 1, f);
+ fclose(f);
+ biosmask = 0x1ffff;
+ return 1;
+
+ case ROM_IBMPS2_M50:
+ f=romfopen("roms/i8550021/90x7423.zm14","rb");
+ ff=romfopen("roms/i8550021/90x7426.zm16","rb");
+ if (!f || !ff) break;
+ for (c = 0x0000; c < 0x10000; c += 2)
+ {
+ rom[c] = getc(f);
+ rom[c+1] = getc(ff);
+ }
+ fclose(ff);
+ fclose(f);
+ f=romfopen("roms/i8550021/90x7420.zm13","rb");
+ ff=romfopen("roms/i8550021/90x7429.zm18","rb");
+ if (!f || !ff) break;
+ for (c = 0x10000; c < 0x20000; c += 2)
+ {
+ rom[c] = getc(f);
+ rom[c+1] = getc(ff);
+ }
+ fclose(ff);
+ fclose(f);
+ biosmask = 0x1ffff;
+ return 1;
+
+ case ROM_IBMPS2_M55SX:
+ f=romfopen("roms/i8555081/33f8146.zm41","rb");
+ ff=romfopen("roms/i8555081/33f8145.zm40","rb");
+ if (!f || !ff) break;
+ for (c = 0x0000; c < 0x20000; c += 2)
+ {
+ rom[c] = getc(f);
+ rom[c+1] = getc(ff);
+ }
+ fclose(ff);
+ fclose(f);
+ biosmask = 0x1ffff;
+ return 1;
+
+ case ROM_IBMPS2_M80:
+ f=romfopen("roms/i8580111/15f6637.bin","rb");
+ ff=romfopen("roms/i8580111/15f6639.bin","rb");
+ if (!f || !ff) break;
+ for (c = 0x0000; c < 0x20000; c += 2)
+ {
+ rom[c] = getc(f);
+ rom[c+1] = getc(ff);
+ }
+ fclose(ff);
+ fclose(f);
+ biosmask = 0x1ffff;
+ return 1;
+ }
+ printf("Failed to load ROM!\n");
+ if (f) fclose(f);
+ if (ff) fclose(ff);
+ return 0;
+}
+
+
+
+//int abrt=0;
void resetreadlookup()
{
@@ -80,6 +660,9 @@ void resetreadlookup()
}
+int mmuflush=0;
+int mmu_perm=4;
+
void flushmmucache()
{
int c;
@@ -211,18 +794,14 @@ void mem_flush_write_page(uint32_t addr, uint32_t virt)
}
}
+extern int output;
+
#define mmutranslate_read(addr) mmutranslatereal(addr,0)
#define mmutranslate_write(addr) mmutranslatereal(addr,1)
-static inline uint32_t mmu_readl(uint32_t addr)
-{
- return *(uint32_t *)&_mem_exec[addr >> 14][addr & 0x3fff];
-}
+int pctrans=0;
-static inline void mmu_writel(uint32_t addr, uint32_t val)
-{
- *(uint32_t *)&_mem_exec[addr >> 14][addr & 0x3fff] = val;
-}
+extern uint32_t testr[9];
uint32_t mmutranslatereal(uint32_t addr, int rw)
{
@@ -239,7 +818,7 @@ uint32_t mmutranslatereal(uint32_t addr, int rw)
if (addr==0x77f62000) { dumpregs(); exit(-1); }
if (addr==0x77f9a000) { dumpregs(); exit(-1); }*/
addr2 = ((cr3 & ~0xfff) + ((addr >> 20) & 0xffc));
- temp = temp2 = mmu_readl(addr2);
+ temp=temp2=((uint32_t *)ram)[addr2>>2];
// if (output == 3) pclog("Do translate %08X %i %08X\n", addr, rw, temp);
if (!(temp&1))// || (CPL==3 && !(temp&4) && !cpl_override) || (rw && !(temp&2) && (CPL==3 || cr0&WP_FLAG)))
{
@@ -258,38 +837,13 @@ uint32_t mmutranslatereal(uint32_t addr, int rw)
}*/
return -1;
}
-
- if ((temp & 0x80) && (cr4 & CR4_PSE))
- {
- /*4MB page*/
- if ((CPL == 3 && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && ((CPL == 3 && !cpl_override) || cr0 & WP_FLAG)))
- {
-// if (!nopageerrors) pclog("Page not present! %08X %08X %02X %02X %i %08X %04X:%08X %04X:%08X %i %i %i\n",addr,temp,opcode,opcode2,frame,rmdat32, CS,pc,SS,ESP,ins,CPL,rw);
-
- cr2 = addr;
- temp &= 1;
- if (CPL == 3)
- temp |= 4;
- if (rw)
- temp |= 2;
- cpu_state.abrt = ABRT_PF;
- abrt_error = temp;
-
- return -1;
- }
-
- mmu_perm = temp & 4;
- ((uint32_t *)ram)[addr2>>2] |= 0x20;
-
- return (temp & ~0x3fffff) + (addr & 0x3fffff);
- }
-
- temp = mmu_readl((temp & ~0xfff) + ((addr >> 10) & 0xffc));
+ temp=((uint32_t *)ram)[((temp&~0xFFF)+((addr>>10)&0xFFC))>>2];
temp3=temp&temp2;
// if (output == 3) pclog("Do translate %08X %08X\n", temp, temp3);
- if (!(temp&1) || (CPL==3 && !(temp3&4) && !cpl_override) || (rw && !(temp3&2) && ((CPL == 3 && !cpl_override) || cr0&WP_FLAG)))
+ if (!(temp&1) || (CPL==3 && !(temp3&4) && !cpl_override) || (rw && !(temp3&2) && (CPL==3 || cr0&WP_FLAG)))
{
// if (!nopageerrors) pclog("Page not present! %08X %08X %02X %02X %i %08X %04X:%08X %04X:%08X %i %i %i\n",addr,temp,opcode,opcode2,frame,rmdat32, CS,pc,SS,ESP,ins,CPL,rw);
+
// dumpregs();
// exit(-1);
// if (addr == 0x815F6E90) output = 3;
@@ -310,8 +864,8 @@ uint32_t mmutranslatereal(uint32_t addr, int rw)
return -1;
}
mmu_perm=temp&4;
- mmu_writel(addr2, temp2 | 0x20);
- mmu_writel((temp2 & ~0xfff) + ((addr >> 10) & 0xffc), temp | (rw ? 0x60 : 0x20));
+ ((uint32_t *)ram)[addr2>>2]|=0x20;
+ ((uint32_t *)ram)[((temp2&~0xFFF)+((addr>>10)&0xFFC))>>2]|=(rw?0x60:0x20);
// /*if (output) */pclog("Translate %08X %08X %08X %08X:%08X %08X\n",addr,(temp&~0xFFF)+(addr&0xFFF),temp,cs,pc,EDI);
return (temp&~0xFFF)+(addr&0xFFF);
@@ -326,21 +880,12 @@ uint32_t mmutranslate_noabrt(uint32_t addr, int rw)
return -1;
addr2 = ((cr3 & ~0xfff) + ((addr >> 20) & 0xffc));
- temp = temp2 = mmu_readl(addr2);
+ temp=temp2=((uint32_t *)ram)[addr2>>2];
if (!(temp&1))
return -1;
- if ((temp & 0x80) && (cr4 & CR4_PSE))
- {
- /*4MB page*/
- if ((CPL == 3 && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && (CPL == 3 || cr0 & WP_FLAG)))
- return -1;
-
- return (temp & ~0x3fffff) + (addr & 0x3fffff);
- }
-
- temp = mmu_readl((temp & ~0xfff) + ((addr >> 10) & 0xffc));
+ temp=((uint32_t *)ram)[((temp&~0xFFF)+((addr>>10)&0xFFC))>>2];
temp3=temp&temp2;
if (!(temp&1) || (CPL==3 && !(temp3&4) && !cpl_override) || (rw && !(temp3&2) && (CPL==3 || cr0&WP_FLAG)))
@@ -426,36 +971,41 @@ void addwritelookup(uint32_t virt, uint32_t phys)
cycles -= 9;
}
+#undef printf
uint8_t *getpccache(uint32_t a)
{
uint32_t a2=a;
if (cr0>>31)
{
+ pctrans=1;
a = mmutranslate_read(a);
+ pctrans=0;
if (a==0xFFFFFFFF) return ram;
}
a&=rammask;
+ if (isram[a>>16])
+ {
+ if ((a >> 16) != 0xF || shadowbios)
+ addreadlookup(a2, a);
+ return &ram[(uintptr_t)(a & 0xFFFFF000) - (uintptr_t)(a2 & ~0xFFF)];
+ }
+
if (_mem_exec[a >> 14])
{
- if (read_mapping[a >> 14]->flags & MEM_MAPPING_ROM)
- cpu_prefetch_cycles = cpu_rom_prefetch_cycles;
- else
- cpu_prefetch_cycles = cpu_mem_prefetch_cycles;
-
return &_mem_exec[a >> 14][(uintptr_t)(a & 0x3000) - (uintptr_t)(a2 & ~0xFFF)];
}
pclog("Bad getpccache %08X\n", a);
return &ff_array[0-(uintptr_t)(a2 & ~0xFFF)];
}
+#define printf pclog
+uint32_t mem_logical_addr;
uint8_t readmembl(uint32_t addr)
{
- mem_mapping_t *map;
-
mem_logical_addr = addr;
if (cr0 >> 31)
{
@@ -464,17 +1014,13 @@ uint8_t readmembl(uint32_t addr)
}
addr &= rammask;
- map = read_mapping[addr >> 14];
- if (map && map->read_b)
- return map->read_b(addr, map->p);
+ if (_mem_read_b[addr >> 14]) return _mem_read_b[addr >> 14](addr, _mem_priv_r[addr >> 14]);
// pclog("Bad readmembl %08X %04X:%08X\n", addr, CS, pc);
return 0xFF;
}
void writemembl(uint32_t addr, uint8_t val)
{
- mem_mapping_t *map;
-
mem_logical_addr = addr;
if (page_lookup[addr>>12])
@@ -489,399 +1035,377 @@ void writemembl(uint32_t addr, uint8_t val)
}
addr &= rammask;
- map = write_mapping[addr >> 14];
- if (map && map->write_b)
- return map->write_b(addr, val, map->p);
+ if (_mem_write_b[addr >> 14]) _mem_write_b[addr >> 14](addr, val, _mem_priv_w[addr >> 14]);
// else pclog("Bad writemembl %08X %02X %04X:%08X\n", addr, val, CS, pc);
}
-uint16_t readmemwl(uint32_t addr)
+uint8_t readmemb386l(uint32_t seg, uint32_t addr)
{
- mem_mapping_t *map;
-
- mem_logical_addr = addr;
-
- if (addr & 1)
+ if (seg==-1)
{
- if (!cpu_cyrix_alignment || (addr & 7) == 7)
- cycles -= timing_misaligned;
- if ((addr & 0xFFF) > 0xFFE)
- {
- if (cr0 >> 31)
- {
- if (mmutranslate_read(addr) == 0xffffffff) return 0xffff;
- if (mmutranslate_read(addr+1) == 0xffffffff) return 0xffff;
- }
- return readmembl(addr)|(readmembl(addr+1)<<8);
- }
- else if (readlookup2[addr >> 12] != -1)
- return *(uint16_t *)(readlookup2[addr >> 12] + addr);
+ x86gpf("NULL segment", 0);
+ printf("NULL segment! rb %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr);
+ return -1;
}
- if (cr0>>31)
+ mem_logical_addr = addr = addr + seg;
+/* if (readlookup2[mem_logical_addr >> 12] != 0xFFFFFFFF)
+ {
+ return ram[readlookup2[mem_logical_addr >> 12] + (mem_logical_addr & 0xFFF)];
+ }*/
+
+ if (cr0 >> 31)
{
addr = mmutranslate_read(addr);
- if (addr==0xFFFFFFFF) return 0xFFFF;
+ if (addr == 0xFFFFFFFF) return 0xFF;
}
addr &= rammask;
- map = read_mapping[addr >> 14];
- if (map)
- {
- if (map->read_w)
- return map->read_w(addr, map->p);
+ if (_mem_read_b[addr >> 14]) return _mem_read_b[addr >> 14](addr, _mem_priv_r[addr >> 14]);
+// pclog("Bad readmemb386l %08X %04X:%08X\n", addr, CS, pc);
+ return 0xFF;
+}
- if (map->read_b)
- return map->read_b(addr, map->p) | (map->read_b(addr + 1, map->p) << 8);
+void writememb386l(uint32_t seg, uint32_t addr, uint8_t val)
+{
+ if (seg==-1)
+ {
+ x86gpf("NULL segment", 0);
+ printf("NULL segment! wb %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr);
+ return;
+ }
+
+ mem_logical_addr = addr = addr + seg;
+ if (page_lookup[addr>>12])
+ {
+ page_lookup[addr>>12]->write_b(addr, val, page_lookup[addr>>12]);
+ return;
+ }
+ if (cr0 >> 31)
+ {
+ addr = mmutranslate_write(addr);
+ if (addr == 0xFFFFFFFF) return;
}
-// pclog("Bad readmemwl %08X\n", addr);
+ addr &= rammask;
+
+/* if (addr >= 0xa0000 && addr < 0xc0000)
+ pclog("writemembl %08X %02X\n", addr, val);*/
+
+ if (_mem_write_b[addr >> 14]) _mem_write_b[addr >> 14](addr, val, _mem_priv_w[addr >> 14]);
+// else pclog("Bad writememb386l %08X %02X %04X:%08X\n", addr, val, CS, pc);
+}
+
+uint16_t readmemwl(uint32_t seg, uint32_t addr)
+{
+ uint32_t addr2 = mem_logical_addr = seg + addr;
+ if ((addr2&0xFFF)>0xFFE)
+ {
+ if (cr0>>31)
+ {
+ if (mmutranslate_read(addr2) == 0xffffffff) return 0xffff;
+ if (mmutranslate_read(addr2+1) == 0xffffffff) return 0xffff;
+ }
+ if (is386) return readmemb386l(seg,addr)|(readmemb386l(seg,addr+1)<<8);
+ else return readmembl(seg+addr)|(readmembl(seg+addr+1)<<8);
+ }
+ if (seg==-1)
+ {
+ x86gpf("NULL segment", 0);
+ printf("NULL segment! rw %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr);
+ return -1;
+ }
+ if (cr0>>31)
+ {
+ addr2 = mmutranslate_read(addr2);
+ if (addr2==0xFFFFFFFF) return 0xFFFF;
+ }
+
+ addr2 &= rammask;
+
+ if (_mem_read_w[addr2 >> 14]) return _mem_read_w[addr2 >> 14](addr2, _mem_priv_r[addr2 >> 14]);
+
+ if (_mem_read_b[addr2 >> 14])
+ {
+ if (AT) return _mem_read_b[addr2 >> 14](addr2, _mem_priv_r[addr2 >> 14]) | (_mem_read_b[(addr2 + 1) >> 14](addr2 + 1, _mem_priv_r[addr2 >> 14]) << 8);
+ else return _mem_read_b[addr2 >> 14](addr2, _mem_priv_r[addr2 >> 14]) | (_mem_read_b[(seg + ((addr + 1) & 0xffff)) >> 14](seg + ((addr + 1) & 0xffff), _mem_priv_r[addr2 >> 14]) << 8);
+ }
+// pclog("Bad readmemwl %08X\n", addr2);
return 0xffff;
}
-void writememwl(uint32_t addr, uint16_t val)
+void writememwl(uint32_t seg, uint32_t addr, uint16_t val)
{
- mem_mapping_t *map;
-
- mem_logical_addr = addr;
-
- if (addr & 1)
+ uint32_t addr2 = mem_logical_addr = seg + addr;
+ if ((addr2&0xFFF)>0xFFE)
{
- if (!cpu_cyrix_alignment || (addr & 7) == 7)
- cycles -= timing_misaligned;
- if ((addr & 0xFFF) > 0xFFE)
+ if (cr0>>31)
{
- if (cr0 >> 31)
- {
- if (mmutranslate_write(addr) == 0xffffffff) return;
- if (mmutranslate_write(addr+1) == 0xffffffff) return;
- }
- writemembl(addr,val);
- writemembl(addr+1,val>>8);
- return;
+ if (mmutranslate_write(addr2) == 0xffffffff) return;
+ if (mmutranslate_write(addr2+1) == 0xffffffff) return;
}
- else if (writelookup2[addr >> 12] != -1)
+ if (is386)
{
- *(uint16_t *)(writelookup2[addr >> 12] + addr) = val;
- return;
+ writememb386l(seg,addr,val);
+ writememb386l(seg,addr+1,val>>8);
}
+ else
+ {
+ writemembl(seg+addr,val);
+ writemembl(seg+addr+1,val>>8);
+ }
+ return;
}
- if (page_lookup[addr>>12])
+ if (seg==-1)
{
- page_lookup[addr>>12]->write_w(addr, val, page_lookup[addr>>12]);
+ x86gpf("NULL segment", 0);
+ printf("NULL segment! ww %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr);
+ return;
+ }
+ if (page_lookup[addr2>>12])
+ {
+ page_lookup[addr2>>12]->write_w(addr2, val, page_lookup[addr2>>12]);
return;
}
if (cr0>>31)
{
- addr = mmutranslate_write(addr);
- if (addr==0xFFFFFFFF) return;
+ addr2 = mmutranslate_write(addr2);
+ if (addr2==0xFFFFFFFF) return;
}
- addr &= rammask;
+ addr2 &= rammask;
- map = write_mapping[addr >> 14];
- if (map)
+/* if (addr2 >= 0xa0000 && addr2 < 0xc0000)
+ pclog("writememwl %08X %02X\n", addr2, val);*/
+
+ if (_mem_write_w[addr2 >> 14])
{
- if (map->write_w)
- map->write_w(addr, val, map->p);
- else if (map->write_b)
- {
- map->write_b(addr, val, map->p);
- map->write_b(addr + 1, val >> 8, map->p);
- }
+ _mem_write_w[addr2 >> 14](addr2, val, _mem_priv_w[addr2 >> 14]);
+ return;
}
-// pclog("Bad writememwl %08X %04X\n", addr, val);
+ if (_mem_write_b[addr2 >> 14])
+ {
+ _mem_write_b[addr2 >> 14](addr2, val, _mem_priv_w[addr2 >> 14]);
+ _mem_write_b[(addr2 + 1) >> 14](addr2 + 1, val >> 8, _mem_priv_w[addr2 >> 14]);
+ return;
+ }
+// pclog("Bad writememwl %08X %04X\n", addr2, val);
}
-uint32_t readmemll(uint32_t addr)
+uint32_t readmemll(uint32_t seg, uint32_t addr)
{
- mem_mapping_t *map;
-
- mem_logical_addr = addr;
-
- if (addr & 3)
+ uint32_t addr2 = mem_logical_addr = seg + addr;
+ if ((addr2&0xFFF)>0xFFC)
{
- if (!cpu_cyrix_alignment || (addr & 7) > 4)
- cycles -= timing_misaligned;
- if ((addr&0xFFF)>0xFFC)
+ if (cr0>>31)
{
- if (cr0>>31)
- {
- if (mmutranslate_read(addr) == 0xffffffff) return 0xffffffff;
- if (mmutranslate_read(addr+3) == 0xffffffff) return 0xffffffff;
- }
- return readmemwl(addr)|(readmemwl(addr+2)<<16);
+ if (mmutranslate_read(addr2) == 0xffffffff) return 0xffffffff;
+ if (mmutranslate_read(addr2+3) == 0xffffffff) return 0xffffffff;
}
- else if (readlookup2[addr >> 12] != -1)
- return *(uint32_t *)(readlookup2[addr >> 12] + addr);
+ return readmemwl(seg,addr)|(readmemwl(seg,addr+2)<<16);
}
+ if (seg==-1)
+ {
+ x86gpf("NULL segment", 0);
+ printf("NULL segment! rl %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr);
+ return -1;
+ }
+
if (cr0>>31)
{
- addr = mmutranslate_read(addr);
- if (addr==0xFFFFFFFF) return 0xFFFFFFFF;
+ addr2 = mmutranslate_read(addr2);
+ if (addr2==0xFFFFFFFF) return 0xFFFFFFFF;
}
- addr&=rammask;
+ addr2&=rammask;
- map = read_mapping[addr >> 14];
- if (map)
- {
- if (map->read_l)
- return map->read_l(addr, map->p);
+ if (_mem_read_l[addr2 >> 14]) return _mem_read_l[addr2 >> 14](addr2, _mem_priv_r[addr2 >> 14]);
- if (map->read_w)
- return map->read_w(addr, map->p) | (map->read_w(addr + 2, map->p) << 16);
+ if (_mem_read_w[addr2 >> 14]) return _mem_read_w[addr2 >> 14](addr2, _mem_priv_r[addr2 >> 14]) | (_mem_read_w[addr2 >> 14](addr2 + 2, _mem_priv_r[addr2 >> 14]) << 16);
+
+ if (_mem_read_b[addr2 >> 14]) return _mem_read_b[addr2 >> 14](addr2, _mem_priv_r[addr2 >> 14]) | (_mem_read_b[addr2 >> 14](addr2 + 1, _mem_priv_r[addr2 >> 14]) << 8) | (_mem_read_b[addr2 >> 14](addr2 + 2, _mem_priv_r[addr2 >> 14]) << 16) | (_mem_read_b[addr2 >> 14](addr2 + 3, _mem_priv_r[addr2 >> 14]) << 24);
- if (map->read_b)
- return map->read_b(addr, map->p) | (map->read_b(addr + 1, map->p) << 8) |
- (map->read_b(addr + 2, map->p) << 16) | (map->read_b(addr + 3, map->p) << 24);
- }
-
-// pclog("Bad readmemll %08X\n", addr);
+// pclog("Bad readmemll %08X\n", addr2);
return 0xffffffff;
}
-void writememll(uint32_t addr, uint32_t val)
+void writememll(uint32_t seg, uint32_t addr, uint32_t val)
{
- mem_mapping_t *map;
+ uint32_t addr2 = mem_logical_addr = seg + addr;
- mem_logical_addr = addr;
-
- if (addr & 3)
+ if ((addr2&0xFFF)>0xFFC)
{
- if (!cpu_cyrix_alignment || (addr & 7) > 4)
- cycles -= timing_misaligned;
- if ((addr & 0xFFF) > 0xFFC)
+ if (cr0>>31)
{
- if (cr0>>31)
- {
- if (mmutranslate_write(addr) == 0xffffffff) return;
- if (mmutranslate_write(addr+3) == 0xffffffff) return;
- }
- writememwl(addr,val);
- writememwl(addr+2,val>>16);
- return;
- }
- else if (writelookup2[addr >> 12] != -1)
- {
- *(uint32_t *)(writelookup2[addr >> 12] + addr) = val;
- return;
+ if (mmutranslate_write(addr2) == 0xffffffff) return;
+ if (mmutranslate_write(addr2+3) == 0xffffffff) return;
}
+ writememwl(seg,addr,val);
+ writememwl(seg,addr+2,val>>16);
+ return;
}
- if (page_lookup[addr>>12])
+ if (seg==-1)
{
- page_lookup[addr>>12]->write_l(addr, val, page_lookup[addr>>12]);
+ x86gpf("NULL segment", 0);
+ printf("NULL segment! wl %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr);
+ return;
+ }
+ if (page_lookup[addr2>>12])
+ {
+ page_lookup[addr2>>12]->write_l(addr2, val, page_lookup[addr2>>12]);
return;
}
if (cr0>>31)
{
- addr = mmutranslate_write(addr);
- if (addr==0xFFFFFFFF) return;
+ addr2 = mmutranslate_write(addr2);
+ if (addr2==0xFFFFFFFF) return;
}
- addr&=rammask;
+ addr2&=rammask;
- map = write_mapping[addr >> 14];
- if (map)
+/* if (addr >= 0xa0000 && addr < 0xc0000)
+ pclog("writememll %08X %08X\n", addr, val);*/
+
+ if (_mem_write_l[addr2 >> 14])
{
- if (map->write_l)
- map->write_l(addr, val, map->p);
- else if (map->write_w)
- {
- map->write_w(addr, val, map->p);
- map->write_w(addr + 2, val >> 16, map->p);
- }
- else if (map->write_b)
- {
- map->write_b(addr, val, map->p);
- map->write_b(addr + 1, val >> 8, map->p);
- map->write_b(addr + 2, val >> 16, map->p);
- map->write_b(addr + 3, val >> 24, map->p);
- }
+ _mem_write_l[addr2 >> 14](addr2, val, _mem_priv_w[addr2 >> 14]);
+ return;
}
-// pclog("Bad writememll %08X %08X\n", addr, val);
+ if (_mem_write_w[addr2 >> 14])
+ {
+ _mem_write_w[addr2 >> 14](addr2, val, _mem_priv_w[addr2 >> 14]);
+ _mem_write_w[addr2 >> 14](addr2 + 2, val >> 16, _mem_priv_w[addr2 >> 14]);
+ return;
+ }
+ if (_mem_write_b[addr2 >> 14])
+ {
+ _mem_write_b[addr2 >> 14](addr2, val, _mem_priv_w[addr2 >> 14]);
+ _mem_write_b[addr2 >> 14](addr2 + 1, val >> 8, _mem_priv_w[addr2 >> 14]);
+ _mem_write_b[addr2 >> 14](addr2 + 2, val >> 16, _mem_priv_w[addr2 >> 14]);
+ _mem_write_b[addr2 >> 14](addr2 + 3, val >> 24, _mem_priv_w[addr2 >> 14]);
+ return;
+ }
+// pclog("Bad writememll %08X %08X\n", addr2, val);
}
-uint64_t readmemql(uint32_t addr)
+uint64_t readmemql(uint32_t seg, uint32_t addr)
{
- mem_mapping_t *map;
-
- mem_logical_addr = addr;
-
- if (addr & 7)
+ uint32_t addr2 = mem_logical_addr = seg + addr;
+ if ((addr2&0xFFF)>0xFF8)
{
- cycles -= timing_misaligned;
- if ((addr & 0xFFF) > 0xFF8)
+ if (cr0>>31)
{
- if (cr0>>31)
- {
- if (mmutranslate_read(addr) == 0xffffffff) return 0xffffffff;
- if (mmutranslate_read(addr+7) == 0xffffffff) return 0xffffffff;
- }
- return readmemll(addr)|((uint64_t)readmemll(addr+4)<<32);
+ if (mmutranslate_read(addr2) == 0xffffffff) return 0xffffffff;
+ if (mmutranslate_read(addr2+7) == 0xffffffff) return 0xffffffff;
}
- else if (readlookup2[addr >> 12] != -1)
- return *(uint64_t *)(readlookup2[addr >> 12] + addr);
+ return readmemll(seg,addr)|((uint64_t)readmemll(seg,addr+4)<<32);
+ }
+
+ if (seg==-1)
+ {
+ x86gpf("NULL segment", 0);
+ printf("NULL segment! rl %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr);
+ return -1;
}
if (cr0>>31)
{
- addr = mmutranslate_read(addr);
- if (addr==0xFFFFFFFF) return 0xFFFFFFFF;
+ addr2 = mmutranslate_read(addr2);
+ if (addr2==0xFFFFFFFF) return 0xFFFFFFFF;
}
- addr&=rammask;
+ addr2&=rammask;
- map = read_mapping[addr >> 14];
- if (map && map->read_l)
- return map->read_l(addr, map->p) | ((uint64_t)map->read_l(addr + 4, map->p) << 32);
+ if (_mem_read_l[addr2 >> 14])
+ return _mem_read_l[addr2 >> 14](addr2, _mem_priv_r[addr2 >> 14]) |
+ ((uint64_t)_mem_read_l[addr2 >> 14](addr2 + 4, _mem_priv_r[addr2 >> 14]) << 32);
- return readmemll(addr) | ((uint64_t)readmemll(addr+4)<<32);
+ return readmemll(seg,addr) | ((uint64_t)readmemll(seg,addr+4)<<32);
}
-void writememql(uint32_t addr, uint64_t val)
+void writememql(uint32_t seg, uint32_t addr, uint64_t val)
{
- mem_mapping_t *map;
+ uint32_t addr2 = mem_logical_addr = seg + addr;
- mem_logical_addr = addr;
-
- if (addr & 7)
+ if ((addr2 & 0xFFF) > 0xFF8)
{
- cycles -= timing_misaligned;
- if ((addr & 0xFFF) > 0xFF8)
+ if (cr0>>31)
{
- if (cr0>>31)
- {
- if (mmutranslate_write(addr) == 0xffffffff) return;
- if (mmutranslate_write(addr+7) == 0xffffffff) return;
- }
- writememll(addr, val);
- writememll(addr+4, val >> 32);
- return;
- }
- else if (writelookup2[addr >> 12] != -1)
- {
- *(uint64_t *)(writelookup2[addr >> 12] + addr) = val;
- return;
+ if (mmutranslate_write(addr2) == 0xffffffff) return;
+ if (mmutranslate_write(addr2+7) == 0xffffffff) return;
}
+ writememll(seg, addr, val);
+ writememll(seg, addr+4, val >> 32);
+ return;
}
- if (page_lookup[addr>>12])
+ if (seg==-1)
{
- page_lookup[addr>>12]->write_l(addr, val, page_lookup[addr>>12]);
- page_lookup[addr>>12]->write_l(addr + 4, val >> 32, page_lookup[addr>>12]);
+ x86gpf("NULL segment", 0);
+ printf("NULL segment! wl %04X(%08X):%08X %02X %08X\n",CS,cs,cpu_state.pc,opcode,addr);
+ return;
+ }
+ if (page_lookup[addr2>>12])
+ {
+ page_lookup[addr2>>12]->write_l(addr2, val, page_lookup[addr2>>12]);
+ page_lookup[addr2>>12]->write_l(addr2 + 4, val >> 32, page_lookup[addr2>>12]);
return;
}
if (cr0>>31)
{
- addr = mmutranslate_write(addr);
- if (addr==0xFFFFFFFF) return;
+ addr2 = mmutranslate_write(addr2);
+ if (addr2==0xFFFFFFFF) return;
}
- addr&=rammask;
+ addr2&=rammask;
- map = write_mapping[addr >> 14];
- if (map)
+ if (_mem_write_l[addr2 >> 14])
{
- if (map->write_l)
- {
- map->write_l(addr, val, map->p);
- map->write_l(addr + 4, val >> 32, map->p);
- }
- else if (map->write_w)
- {
- map->write_w(addr, val, map->p);
- map->write_w(addr + 2, val >> 16, map->p);
- map->write_w(addr + 4, val >> 32, map->p);
- map->write_w(addr + 6, val >> 48, map->p);
- }
- else if (map->write_b)
- {
- map->write_b(addr, val, map->p);
- map->write_b(addr + 1, val >> 8, map->p);
- map->write_b(addr + 2, val >> 16, map->p);
- map->write_b(addr + 3, val >> 24, map->p);
- map->write_b(addr + 4, val >> 32, map->p);
- map->write_b(addr + 5, val >> 40, map->p);
- map->write_b(addr + 6, val >> 48, map->p);
- map->write_b(addr + 7, val >> 56, map->p);
- }
+ _mem_write_l[addr2 >> 14](addr2, val, _mem_priv_w[addr2 >> 14]);
+ _mem_write_l[addr2 >> 14](addr2+4, val >> 32, _mem_priv_w[addr2 >> 14]);
+ return;
}
-// pclog("Bad writememql %08X %08X\n", addr, val);
+ if (_mem_write_w[addr2 >> 14])
+ {
+ _mem_write_w[addr2 >> 14](addr2, val, _mem_priv_w[addr2 >> 14]);
+ _mem_write_w[addr2 >> 14](addr2 + 2, val >> 16, _mem_priv_w[addr2 >> 14]);
+ _mem_write_w[addr2 >> 14](addr2 + 4, val >> 32, _mem_priv_w[addr2 >> 14]);
+ _mem_write_w[addr2 >> 14](addr2 + 6, val >> 48, _mem_priv_w[addr2 >> 14]);
+ return;
+ }
+ if (_mem_write_b[addr2 >> 14])
+ {
+ _mem_write_b[addr2 >> 14](addr2, val, _mem_priv_w[addr2 >> 14]);
+ _mem_write_b[addr2 >> 14](addr2 + 1, val >> 8, _mem_priv_w[addr2 >> 14]);
+ _mem_write_b[addr2 >> 14](addr2 + 2, val >> 16, _mem_priv_w[addr2 >> 14]);
+ _mem_write_b[addr2 >> 14](addr2 + 3, val >> 24, _mem_priv_w[addr2 >> 14]);
+ _mem_write_b[addr2 >> 14](addr2 + 4, val >> 32, _mem_priv_w[addr2 >> 14]);
+ _mem_write_b[addr2 >> 14](addr2 + 5, val >> 40, _mem_priv_w[addr2 >> 14]);
+ _mem_write_b[addr2 >> 14](addr2 + 6, val >> 48, _mem_priv_w[addr2 >> 14]);
+ _mem_write_b[addr2 >> 14](addr2 + 7, val >> 56, _mem_priv_w[addr2 >> 14]);
+ return;
+ }
+// pclog("Bad writememql %08X %08X\n", addr2, val);
}
uint8_t mem_readb_phys(uint32_t addr)
{
- mem_mapping_t *map = read_mapping[addr >> 14];
-
mem_logical_addr = 0xffffffff;
- if (map && map->read_b)
- return map->read_b(addr, map->p);
+ if (_mem_read_b[addr >> 14])
+ return _mem_read_b[addr >> 14](addr, _mem_priv_r[addr >> 14]);
return 0xff;
}
-uint16_t mem_readw_phys(uint32_t addr)
-{
- mem_mapping_t *map = read_mapping[addr >> 14];
-
- mem_logical_addr = 0xffffffff;
-
- if (map && map->read_w)
- return map->read_w(addr, map->p);
-
- return mem_readb_phys(addr) | (mem_readb_phys(addr + 1) << 8);
-}
-uint32_t mem_readl_phys(uint32_t addr)
-{
- mem_mapping_t *map = read_mapping[addr >> 14];
-
- mem_logical_addr = 0xffffffff;
-
- if (map && map->read_l)
- return map->read_l(addr, map->p);
-
- return mem_readw_phys(addr) | (mem_readw_phys(addr + 2) << 16);
-}
void mem_writeb_phys(uint32_t addr, uint8_t val)
{
- mem_mapping_t *map = write_mapping[addr >> 14];
-
mem_logical_addr = 0xffffffff;
-
- if (map && map->write_b)
- map->write_b(addr, val, map->p);
-}
-void mem_writew_phys(uint32_t addr, uint16_t val)
-{
- mem_mapping_t *map = write_mapping[addr >> 14];
- mem_logical_addr = 0xffffffff;
-
- if (map && map->write_w && !(addr & 1))
- map->write_w(addr, val, map->p);
- else
- {
- mem_writeb_phys(addr, val);
- mem_writeb_phys(addr+1, val >> 8);
- }
-}
-void mem_writel_phys(uint32_t addr, uint32_t val)
-{
- mem_mapping_t *map = write_mapping[addr >> 14];
-
- mem_logical_addr = 0xffffffff;
-
- if (map && map->write_l && !(addr & 3))
- map->write_l(addr, val, map->p);
- else
- {
- mem_writew_phys(addr, val);
- mem_writew_phys(addr+2, val >> 16);
- }
+ if (_mem_write_b[addr >> 14])
+ _mem_write_b[addr >> 14](addr, val, _mem_priv_w[addr >> 14]);
}
uint8_t mem_read_ram(uint32_t addr, void *priv)
@@ -903,59 +1427,14 @@ uint32_t mem_read_raml(uint32_t addr, void *priv)
return *(uint32_t *)&ram[addr];
}
-uint32_t purgable_page_list_head = 0;
-int purgeable_page_count = 0;
-
-static inline int page_index(page_t *p)
-{
- return ((uintptr_t)p - (uintptr_t)pages) / sizeof(page_t);
-}
-void page_add_to_evict_list(page_t *p)
-{
-// pclog("page_add_to_evict_list: %08x %i\n", page_index(p), purgeable_page_count);
- pages[purgable_page_list_head].evict_prev = page_index(p);
- p->evict_next = purgable_page_list_head;
- p->evict_prev = 0;
- purgable_page_list_head = pages[purgable_page_list_head].evict_prev;
- purgeable_page_count++;
-}
-void page_remove_from_evict_list(page_t *p)
-{
-// pclog("page_remove_from_evict_list: %08x %i\n", page_index(p), purgeable_page_count);
- if (!page_in_evict_list(p))
- fatal("page_remove_from_evict_list: not in evict list!\n");
- if (p->evict_prev)
- pages[p->evict_prev].evict_next = p->evict_next;
- else
- purgable_page_list_head = p->evict_next;
- if (p->evict_next)
- pages[p->evict_next].evict_prev = p->evict_prev;
- p->evict_prev = EVICT_NOT_IN_LIST;
- purgeable_page_count--;
-}
-
void mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p)
{
if (val != p->mem[addr & 0xfff] || codegen_in_recompile)
{
uint64_t mask = (uint64_t)1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK);
- int byte_offset = (addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK;
- uint64_t byte_mask = (uint64_t)1 << (addr & PAGE_BYTE_MASK_MASK);
-
-// pclog("mem_write_ramb_page: %08x %02x %08x %llx %llx\n", addr, val, cs+cpu_state.pc, p->dirty_mask, mask);
- p->mem[addr & 0xfff] = val;
+// pclog("mem_write_ramb_page: %08x %02x %08x %llx %llx\n", addr, val, cs+pc, p->dirty_mask, mask);
p->dirty_mask |= mask;
- if ((p->code_present_mask & mask) && !page_in_evict_list(p))
- {
-// pclog("ramb add %08x %016llx %016llx\n", addr, p->code_present_mask[index], mask);
- page_add_to_evict_list(p);
- }
- p->byte_dirty_mask[byte_offset] |= byte_mask;
- if ((p->byte_code_present_mask[byte_offset] & byte_mask) && !page_in_evict_list(p))
- {
-// pclog(" ramb add %08x %016llx %016llx\n", addr, p->byte_code_present_mask[byte_offset], byte_mask);
- page_add_to_evict_list(p);
- }
+ p->mem[addr & 0xfff] = val;
}
}
void mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p)
@@ -963,38 +1442,11 @@ void mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p)
if (val != *(uint16_t *)&p->mem[addr & 0xfff] || codegen_in_recompile)
{
uint64_t mask = (uint64_t)1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK);
- int byte_offset = (addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK;
- uint64_t byte_mask = (uint64_t)1 << (addr & PAGE_BYTE_MASK_MASK);
-
- if ((addr & 0xf) == 0xf)
+ if ((addr & 0x3f) == 0x3f)
mask |= (mask << 1);
-// pclog("mem_write_ramw_page: %08x %04x %08x %016llx %016llx %016llx %08x %08x %p\n", addr, val, cs+cpu_state.pc, p->dirty_mask[index], p->code_present_mask[index], mask, p->evict_prev, p->evict_next, p);
- *(uint16_t *)&p->mem[addr & 0xfff] = val;
+// pclog("mem_write_ramw_page: %08x %04x %08x\n", addr, val, cs+pc);
p->dirty_mask |= mask;
- if ((p->code_present_mask & mask) && !page_in_evict_list(p))
- {
-// pclog("ramw add %08x %016llx %016llx\n", addr, p->code_present_mask[index], mask);
- page_add_to_evict_list(p);
- }
- if ((addr & PAGE_BYTE_MASK_MASK) == PAGE_BYTE_MASK_MASK)
- {
- p->byte_dirty_mask[byte_offset+1] |= 1;
- if ((p->byte_code_present_mask[byte_offset+1] & 1) && !page_in_evict_list(p))
- {
-// pclog("ramw add %08x %016llx %016llx\n", addr, p->code_present_mask[index], mask);
- page_add_to_evict_list(p);
- }
- }
- else
- byte_mask |= (byte_mask << 1);
-
- p->byte_dirty_mask[byte_offset] |= byte_mask;
-
- if ((p->byte_code_present_mask[byte_offset] & byte_mask) && !page_in_evict_list(p))
- {
-// pclog("ramw add %08x %016llx %016llx\n", addr, p->code_present_mask[index], mask);
- page_add_to_evict_list(p);
- }
+ *(uint16_t *)&p->mem[addr & 0xfff] = val;
}
}
void mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p)
@@ -1002,31 +1454,11 @@ void mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p)
if (val != *(uint32_t *)&p->mem[addr & 0xfff] || codegen_in_recompile)
{
uint64_t mask = (uint64_t)1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK);
- int byte_offset = (addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK;
- uint64_t byte_mask = (uint64_t)0xf << (addr & PAGE_BYTE_MASK_MASK);
-
- if ((addr & 0xf) >= 0xd)
+ if ((addr & 0x3f) >= 0x3d)
mask |= (mask << 1);
-// pclog("mem_write_raml_page: %08x %08x %08x %016llx %016llx %016llx\n", addr, val, cs+cpu_state.pc, p->dirty_mask[index], p->code_present_mask[index], mask);
- *(uint32_t *)&p->mem[addr & 0xfff] = val;
+// pclog("mem_write_raml_page: %08x %08x %08x\n", addr, val, cs+pc);
p->dirty_mask |= mask;
- p->byte_dirty_mask[byte_offset] |= byte_mask;
- if (!page_in_evict_list(p) && ((p->code_present_mask & mask) || (p->byte_code_present_mask[byte_offset] & byte_mask)))
- {
-// pclog("raml add %08x %016llx %016llx\n", addr, p->code_present_mask[index], mask);
- page_add_to_evict_list(p);
- }
- if ((addr & PAGE_BYTE_MASK_MASK) > (PAGE_BYTE_MASK_MASK-3))
- {
- uint32_t byte_mask_2 = 0xf >> (4 - (addr & 3));
-
- p->byte_dirty_mask[byte_offset+1] |= byte_mask_2;
- if ((p->byte_code_present_mask[byte_offset+1] & byte_mask_2) && !page_in_evict_list(p))
- {
-// pclog("raml add %08x %016llx %016llx\n", addr, p->code_present_mask[index], mask);
- page_add_to_evict_list(p);
- }
- }
+ *(uint32_t *)&p->mem[addr & 0xfff] = val;
}
}
@@ -1046,52 +1478,14 @@ void mem_write_raml(uint32_t addr, uint32_t val, void *priv)
mem_write_raml_page(addr, val, &pages[addr >> 12]);
}
-
-static uint32_t remap_start_addr;
-
-uint8_t mem_read_remapped(uint32_t addr, void *priv)
-{
- addr = 0xA0000 + (addr - remap_start_addr);
- addreadlookup(mem_logical_addr, addr);
- return ram[addr];
-}
-uint16_t mem_read_remappedw(uint32_t addr, void *priv)
-{
- addr = 0xA0000 + (addr - remap_start_addr);
- addreadlookup(mem_logical_addr, addr);
- return *(uint16_t *)&ram[addr];
-}
-uint32_t mem_read_remappedl(uint32_t addr, void *priv)
-{
- addr = 0xA0000 + (addr - remap_start_addr);
- addreadlookup(mem_logical_addr, addr);
- return *(uint32_t *)&ram[addr];
-}
-
-void mem_write_remapped(uint32_t addr, uint8_t val, void *priv)
-{
- uint32_t oldaddr = addr;
- addr = 0xA0000 + (addr - remap_start_addr);
- addwritelookup(mem_logical_addr, addr);
- mem_write_ramb_page(addr, val, &pages[oldaddr >> 12]);
-}
-void mem_write_remappedw(uint32_t addr, uint16_t val, void *priv)
-{
- uint32_t oldaddr = addr;
- addr = 0xA0000 + (addr - remap_start_addr);
- addwritelookup(mem_logical_addr, addr);
- mem_write_ramw_page(addr, val, &pages[oldaddr >> 12]);
-}
-void mem_write_remappedl(uint32_t addr, uint32_t val, void *priv)
-{
- uint32_t oldaddr = addr;
- addr = 0xA0000 + (addr - remap_start_addr);
- addwritelookup(mem_logical_addr, addr);
- mem_write_raml_page(addr, val, &pages[oldaddr >> 12]);
-}
-
uint8_t mem_read_bios(uint32_t addr, void *priv)
{
+ if (AMIBIOS && (addr&0xFFFFF)==0xF8281) /*This is read constantly during AMIBIOS POST, but is never written to. It's clearly a status register of some kind, but for what?*/
+ {
+// pclog("Read magic addr %04X(%06X):%04X\n",CS,cs,pc);
+// if (pc==0x547D) output=3;
+ return 0x40;
+ }
// pclog("Read BIOS %08X %02X %04X:%04X\n", addr, rom[addr & biosmask], CS, pc);
return rom[addr & biosmask];
}
@@ -1137,15 +1531,8 @@ void mem_invalidate_range(uint32_t start_addr, uint32_t end_addr)
for (; start_addr <= end_addr; start_addr += (1 << PAGE_MASK_SHIFT))
{
uint64_t mask = (uint64_t)1 << ((start_addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK);
- page_t *p = &pages[start_addr >> 12];
-
-//pclog("mem_invalidate: %08x\n", start_addr);
- p->dirty_mask |= mask;
- if ((p->code_present_mask & mask) && !page_in_evict_list(p))
- {
-// pclog("invalidate add %08x %016llx %016llx\n", start_addr, p->code_present_mask[index], mask);
- page_add_to_evict_list(p);
- }
+
+ pages[start_addr >> 12].dirty_mask |= mask;
}
}
@@ -1194,9 +1581,16 @@ static void mem_mapping_recalc(uint64_t base, uint64_t size)
/*Clear out old mappings*/
for (c = base; c < base + size; c += 0x4000)
{
- read_mapping[c >> 14] = NULL;
- write_mapping[c >> 14] = NULL;
- _mem_exec[c >> 14] = NULL;
+ _mem_read_b[c >> 14] = NULL;
+ _mem_read_w[c >> 14] = NULL;
+ _mem_read_l[c >> 14] = NULL;
+ _mem_priv_r[c >> 14] = NULL;
+ _mem_mapping_r[c >> 14] = NULL;
+ _mem_write_b[c >> 14] = NULL;
+ _mem_write_w[c >> 14] = NULL;
+ _mem_write_l[c >> 14] = NULL;
+ _mem_priv_w[c >> 14] = NULL;
+ _mem_mapping_w[c >> 14] = NULL;
}
/*Walk mapping list*/
@@ -1215,16 +1609,24 @@ static void mem_mapping_recalc(uint64_t base, uint64_t size)
if ((mapping->read_b || mapping->read_w || mapping->read_l) &&
mem_mapping_read_allowed(mapping->flags, _mem_state[c >> 14]))
{
- read_mapping[c >> 14] = mapping;
+ _mem_read_b[c >> 14] = mapping->read_b;
+ _mem_read_w[c >> 14] = mapping->read_w;
+ _mem_read_l[c >> 14] = mapping->read_l;
if (mapping->exec)
_mem_exec[c >> 14] = mapping->exec + (c - mapping->base);
else
_mem_exec[c >> 14] = NULL;
+ _mem_priv_r[c >> 14] = mapping->p;
+ _mem_mapping_r[c >> 14] = mapping;
}
if ((mapping->write_b || mapping->write_w || mapping->write_l) &&
mem_mapping_write_allowed(mapping->flags, _mem_state[c >> 14]))
{
- write_mapping[c >> 14] = mapping;
+ _mem_write_b[c >> 14] = mapping->write_b;
+ _mem_write_w[c >> 14] = mapping->write_w;
+ _mem_write_l[c >> 14] = mapping->write_l;
+ _mem_priv_w[c >> 14] = mapping->p;
+ _mem_mapping_w[c >> 14] = mapping;
}
}
}
@@ -1344,104 +1746,144 @@ void mem_set_mem_state(uint32_t base, uint32_t size, int state)
void mem_add_bios()
{
- if (AT || (romset == ROM_XI8088 && xi8088_bios_128kb()))
+ if (AT)
{
- mem_mapping_add(&bios_mapping[0], 0xe0000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x20000 & biosmask), MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM, 0);
- mem_mapping_add(&bios_mapping[1], 0xe4000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x24000 & biosmask), MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM, 0);
- mem_mapping_add(&bios_mapping[2], 0xe8000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x28000 & biosmask), MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM, 0);
- mem_mapping_add(&bios_mapping[3], 0xec000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x2c000 & biosmask), MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM, 0);
+ mem_mapping_add(&bios_mapping[0], 0xe0000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom, MEM_MAPPING_EXTERNAL, 0);
+ mem_mapping_add(&bios_mapping[1], 0xe4000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x4000 & biosmask), MEM_MAPPING_EXTERNAL, 0);
+ mem_mapping_add(&bios_mapping[2], 0xe8000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x8000 & biosmask), MEM_MAPPING_EXTERNAL, 0);
+ mem_mapping_add(&bios_mapping[3], 0xec000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0xc000 & biosmask), MEM_MAPPING_EXTERNAL, 0);
}
- mem_mapping_add(&bios_mapping[4], 0xf0000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x30000 & biosmask), MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM, 0);
- mem_mapping_add(&bios_mapping[5], 0xf4000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x34000 & biosmask), MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM, 0);
- mem_mapping_add(&bios_mapping[6], 0xf8000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x38000 & biosmask), MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM, 0);
- mem_mapping_add(&bios_mapping[7], 0xfc000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x3c000 & biosmask), MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM, 0);
+ mem_mapping_add(&bios_mapping[4], 0xf0000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x10000 & biosmask), MEM_MAPPING_EXTERNAL, 0);
+ mem_mapping_add(&bios_mapping[5], 0xf4000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x14000 & biosmask), MEM_MAPPING_EXTERNAL, 0);
+ mem_mapping_add(&bios_mapping[6], 0xf8000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x18000 & biosmask), MEM_MAPPING_EXTERNAL, 0);
+ mem_mapping_add(&bios_mapping[7], 0xfc000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x1c000 & biosmask), MEM_MAPPING_EXTERNAL, 0);
- mem_mapping_add(&bios_high_mapping[0], (AT && cpu_16bitbus) ? 0xfe0000 : 0xfffe0000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x20000 & biosmask), MEM_MAPPING_ROM, 0);
- mem_mapping_add(&bios_high_mapping[1], (AT && cpu_16bitbus) ? 0xfe4000 : 0xfffe4000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x24000 & biosmask), MEM_MAPPING_ROM, 0);
- mem_mapping_add(&bios_high_mapping[2], (AT && cpu_16bitbus) ? 0xfe8000 : 0xfffe8000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x28000 & biosmask), MEM_MAPPING_ROM, 0);
- mem_mapping_add(&bios_high_mapping[3], (AT && cpu_16bitbus) ? 0xfec000 : 0xfffec000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x2c000 & biosmask), MEM_MAPPING_ROM, 0);
- mem_mapping_add(&bios_high_mapping[4], (AT && cpu_16bitbus) ? 0xff0000 : 0xffff0000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x30000 & biosmask), MEM_MAPPING_ROM, 0);
- mem_mapping_add(&bios_high_mapping[5], (AT && cpu_16bitbus) ? 0xff4000 : 0xffff4000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x34000 & biosmask), MEM_MAPPING_ROM, 0);
- mem_mapping_add(&bios_high_mapping[6], (AT && cpu_16bitbus) ? 0xff8000 : 0xffff8000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x38000 & biosmask), MEM_MAPPING_ROM, 0);
- mem_mapping_add(&bios_high_mapping[7], (AT && cpu_16bitbus) ? 0xffc000 : 0xffffc000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x3c000 & biosmask), MEM_MAPPING_ROM, 0);
- if (biosmask == 0x3ffff)
- mem_mapping_add(&bios_high_mapping[8], (AT && cpu_16bitbus) ? 0xfc0000 : 0xfffc0000, 0x20000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom, MEM_MAPPING_ROM, 0);
+ mem_mapping_add(&bios_high_mapping[0], 0xfffe0000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom, 0, 0);
+ mem_mapping_add(&bios_high_mapping[1], 0xfffe4000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x4000 & biosmask), 0, 0);
+ mem_mapping_add(&bios_high_mapping[2], 0xfffe8000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x8000 & biosmask), 0, 0);
+ mem_mapping_add(&bios_high_mapping[3], 0xfffec000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0xc000 & biosmask), 0, 0);
+ mem_mapping_add(&bios_high_mapping[4], 0xffff0000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x10000 & biosmask), 0, 0);
+ mem_mapping_add(&bios_high_mapping[5], 0xffff4000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x14000 & biosmask), 0, 0);
+ mem_mapping_add(&bios_high_mapping[6], 0xffff8000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x18000 & biosmask), 0, 0);
+ mem_mapping_add(&bios_high_mapping[7], 0xffffc000, 0x04000, mem_read_bios, mem_read_biosw, mem_read_biosl, mem_write_null, mem_write_nullw, mem_write_nulll, rom + (0x1c000 & biosmask), 0, 0);
}
int mem_a20_key = 0, mem_a20_alt = 0;
-static int mem_a20_state = 2;
+static int mem_a20_state = 1;
-static void mem_remap_top(int max_size)
+void mem_init()
{
int c;
-
- if (mem_size > 640)
- {
- uint32_t start = (mem_size >= 1024) ? mem_size : 1024;
- int size = mem_size - 640;
- if (size > max_size)
- size = max_size;
-
- remap_start_addr = start * 1024;
-
- for (c = ((start * 1024) >> 12); c < (((start + size) * 1024) >> 12); c++)
- {
- int offset = c - ((start * 1024) >> 12);
- pages[c].mem = &ram[0xA0000 + (offset << 12)];
- pages[c].write_b = mem_write_ramb_page;
- pages[c].write_w = mem_write_ramw_page;
- pages[c].write_l = mem_write_raml_page;
- pages[c].evict_prev = EVICT_NOT_IN_LIST;
- pages[c].byte_dirty_mask = &byte_dirty_mask[offset * 64];
- pages[c].byte_code_present_mask = &byte_code_present_mask[offset * 64];
- }
- mem_set_mem_state(start * 1024, size * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- mem_mapping_add(&ram_remapped_mapping, start * 1024, size * 1024, mem_read_remapped, mem_read_remappedw, mem_read_remappedl, mem_write_remapped, mem_write_remappedw, mem_write_remappedl, ram + 0xA0000, MEM_MAPPING_INTERNAL, NULL);
+ ram = malloc((mem_size + 384) * 1024);
+// rom = malloc(0x20000);
+ readlookup2 = malloc(1024 * 1024 * sizeof(uintptr_t));
+ writelookup2 = malloc(1024 * 1024 * sizeof(uintptr_t));
+ biosmask = 0xffff;
+ pages = malloc((((mem_size + 384) * 1024) >> 12) * sizeof(page_t));
+ page_lookup = malloc((1 << 20) * sizeof(page_t *));
+
+ memset(ram, 0, (mem_size + 384) * 1024);
+ memset(pages, 0, (((mem_size + 384) * 1024) >> 12) * sizeof(page_t));
+
+ memset(page_lookup, 0, (1 << 20) * sizeof(page_t *));
+
+ for (c = 0; c < ((mem_size * 1024) >> 12); c++)
+ {
+ pages[c].mem = &ram[c << 12];
+ pages[c].write_b = mem_write_ramb_page;
+ pages[c].write_w = mem_write_ramw_page;
+ pages[c].write_l = mem_write_raml_page;
}
+
+ memset(isram, 0, sizeof(isram));
+ for (c = 0; c < (mem_size / 256); c++)
+ {
+ isram[c] = 1;
+ if (c >= 0xa && c <= 0xf)
+ isram[c] = 0;
+ }
+
+ memset(_mem_read_b, 0, sizeof(_mem_read_b));
+ memset(_mem_read_w, 0, sizeof(_mem_read_w));
+ memset(_mem_read_l, 0, sizeof(_mem_read_l));
+ memset(_mem_write_b, 0, sizeof(_mem_write_b));
+ memset(_mem_write_w, 0, sizeof(_mem_write_w));
+ memset(_mem_write_l, 0, sizeof(_mem_write_l));
+ memset(_mem_exec, 0, sizeof(_mem_exec));
+
+ memset(ff_array, 0xff, sizeof(ff_array));
+
+ memset(&base_mapping, 0, sizeof(base_mapping));
+
+ memset(_mem_state, 0, sizeof(_mem_state));
+
+ mem_set_mem_state(0x000000, (mem_size > 640) ? 0xa0000 : mem_size * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
+ mem_set_mem_state(0x0c0000, 0x40000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
+ mem_set_mem_state(0x100000, (mem_size - 1024) * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
+
+ mem_mapping_add(&ram_low_mapping, 0x00000, (mem_size > 640) ? 0xa0000 : mem_size * 1024, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram, MEM_MAPPING_INTERNAL, NULL);
+ if (mem_size > 1024)
+ mem_mapping_add(&ram_high_mapping, 0x100000, ((mem_size - 1024) * 1024), mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + 0x100000, MEM_MAPPING_INTERNAL, NULL);
+ if (mem_size > 768)
+ mem_mapping_add(&ram_mid_mapping, 0xc0000, 0x40000, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + 0xc0000, MEM_MAPPING_INTERNAL, NULL);
+
+ mem_mapping_add(&romext_mapping, 0xc8000, 0x08000, mem_read_romext, mem_read_romextw, mem_read_romextl, NULL, NULL, NULL, romext, 0, NULL);
+// pclog("Mem resize %i %i\n",mem_size,c);
}
void mem_remap_top_256k()
{
- mem_remap_top(256);
+ int c;
+
+ for (c = ((mem_size * 1024) >> 12); c < (((mem_size + 256) * 1024) >> 12); c++)
+ {
+ pages[c].mem = &ram[c << 12];
+ pages[c].write_b = mem_write_ramb_page;
+ pages[c].write_w = mem_write_ramw_page;
+ pages[c].write_l = mem_write_raml_page;
+ }
+
+ for (c = (mem_size / 256); c < ((mem_size + 256) / 256); c++)
+ {
+ isram[c] = 1;
+ if (c >= 0xa && c <= 0xd)
+ isram[c] = 0;
+ }
+
+ mem_set_mem_state(mem_size * 1024, 256 * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
+ mem_mapping_add(&ram_remapped_mapping, mem_size * 1024, 256 * 1024, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + (mem_size * 1024), MEM_MAPPING_INTERNAL, NULL);
}
void mem_remap_top_384k()
{
- mem_remap_top(384);
+ int c;
+
+ for (c = ((mem_size * 1024) >> 12); c < (((mem_size + 384) * 1024) >> 12); c++)
+ {
+ pages[c].mem = &ram[c << 12];
+ pages[c].write_b = mem_write_ramb_page;
+ pages[c].write_w = mem_write_ramw_page;
+ pages[c].write_l = mem_write_raml_page;
+ }
+
+ for (c = (mem_size / 256); c < ((mem_size + 384) / 256); c++)
+ {
+ isram[c] = 1;
+ if (c >= 0xa && c <= 0xf)
+ isram[c] = 0;
+ }
+
+ mem_set_mem_state(mem_size * 1024, 384 * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
+ mem_mapping_add(&ram_remapped_mapping, mem_size * 1024, 384 * 1024, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + (mem_size * 1024), MEM_MAPPING_INTERNAL, NULL);
}
-void mem_set_704kb()
-{
- mem_set_mem_state(0x000000, (mem_size > 704) ? 0xb0000 : mem_size * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- mem_mapping_set_addr(&ram_low_mapping, 0x00000, (mem_size > 704) ? 0xb0000 : mem_size * 1024);
-}
-
-void mem_init()
-{
- readlookup2 = malloc(1024 * 1024 * sizeof(uintptr_t));
- writelookup2 = malloc(1024 * 1024 * sizeof(uintptr_t));
- page_lookup = malloc((1 << 20) * sizeof(page_t *));
-
- memset(ff_array, 0xff, sizeof(ff_array));
-
- smram_enable = NULL;
- smram_disable = NULL;
-}
-
-void mem_alloc()
+void mem_resize()
{
int c;
free(ram);
- ram = malloc(mem_size * 1024);
- memset(ram, 0, mem_size * 1024);
-
- free(byte_dirty_mask);
- byte_dirty_mask = malloc((mem_size * 1024) / 8);
- memset(byte_dirty_mask, 0, (mem_size * 1024) / 8);
- free(byte_code_present_mask);
- byte_code_present_mask = malloc((mem_size * 1024) / 8);
- memset(byte_code_present_mask, 0, (mem_size * 1024) / 8);
+ ram = malloc((mem_size + 384) * 1024);
+ memset(ram, 0, (mem_size + 384) * 1024);
free(pages);
pages = malloc((((mem_size + 384) * 1024) >> 12) * sizeof(page_t));
@@ -1452,15 +1894,22 @@ void mem_alloc()
pages[c].write_b = mem_write_ramb_page;
pages[c].write_w = mem_write_ramw_page;
pages[c].write_l = mem_write_raml_page;
- pages[c].evict_prev = EVICT_NOT_IN_LIST;
- pages[c].byte_dirty_mask = &byte_dirty_mask[c * 64];
- pages[c].byte_code_present_mask = &byte_code_present_mask[c * 64];
+ }
+
+ memset(isram, 0, sizeof(isram));
+ for (c = 0; c < (mem_size / 256); c++)
+ {
+ isram[c] = 1;
+ if (c >= 0xa && c <= 0xf)
+ isram[c] = 0;
}
- memset(page_lookup, 0, (1 << 20) * sizeof(page_t *));
-
- memset(read_mapping, 0, sizeof(read_mapping));
- memset(write_mapping, 0, sizeof(write_mapping));
+ memset(_mem_read_b, 0, sizeof(_mem_read_b));
+ memset(_mem_read_w, 0, sizeof(_mem_read_w));
+ memset(_mem_read_l, 0, sizeof(_mem_read_l));
+ memset(_mem_write_b, 0, sizeof(_mem_write_b));
+ memset(_mem_write_w, 0, sizeof(_mem_write_w));
+ memset(_mem_write_l, 0, sizeof(_mem_write_l));
memset(_mem_exec, 0, sizeof(_mem_exec));
memset(&base_mapping, 0, sizeof(base_mapping));
@@ -1468,50 +1917,20 @@ void mem_alloc()
memset(_mem_state, 0, sizeof(_mem_state));
mem_set_mem_state(0x000000, (mem_size > 640) ? 0xa0000 : mem_size * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- if (romset == ROM_XI8088)
- {
- // Xi 8088 UMBs are selected by DIP Switches
- mem_set_mem_state(0x0a0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- mem_set_mem_state(0x0c0000, 0x08000, model_get_config_int("umb_c0000h_c7fff") ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL));
- mem_set_mem_state(0x0c8000, 0x08000, model_get_config_int("umb_c8000h_cffff") ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL));
- mem_set_mem_state(0x0d0000, 0x08000, model_get_config_int("umb_d0000h_d7fff") ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL));
- mem_set_mem_state(0x0d8000, 0x08000, model_get_config_int("umb_d8000h_dffff") ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL));
- mem_set_mem_state(0x0e0000, 0x08000, model_get_config_int("umb_e0000h_e7fff") ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL));
- mem_set_mem_state(0x0e8000, 0x08000, model_get_config_int("umb_e8000h_effff") ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL));
- mem_set_mem_state(0x0f0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- }
- else
- {
- mem_set_mem_state(0x0a0000, 0x60000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- }
+ mem_set_mem_state(0x0c0000, 0x40000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
+ mem_set_mem_state(0x100000, (mem_size - 1024) * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
mem_mapping_add(&ram_low_mapping, 0x00000, (mem_size > 640) ? 0xa0000 : mem_size * 1024, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram, MEM_MAPPING_INTERNAL, NULL);
if (mem_size > 1024)
- {
- if (cpu_16bitbus && mem_size > 16256)
- {
- mem_set_mem_state(0x100000, (16256 - 1024) * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- mem_mapping_add(&ram_high_mapping, 0x100000, ((16256 - 1024) * 1024), mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + 0x100000, MEM_MAPPING_INTERNAL, NULL);
- }
- else
- {
- mem_set_mem_state(0x100000, (mem_size - 1024) * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- mem_mapping_add(&ram_high_mapping, 0x100000, ((mem_size - 1024) * 1024), mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + 0x100000, MEM_MAPPING_INTERNAL, NULL);
- }
- }
- if (mem_size > 768) // 640k - 768k is graphics RAM
- mem_mapping_add(&ram_mid_mapping, 0xa0000, 0x60000, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + 0xa0000, MEM_MAPPING_INTERNAL, NULL);
+ mem_mapping_add(&ram_high_mapping, 0x100000, (mem_size - 1024) * 1024, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + 0x100000, MEM_MAPPING_INTERNAL, NULL);
+ if (mem_size > 768)
+ mem_mapping_add(&ram_mid_mapping, 0xc0000, 0x40000, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + 0xc0000, MEM_MAPPING_INTERNAL, NULL);
- if (romset == ROM_IBMPS1_2011)
- mem_mapping_add(&romext_mapping, 0xc8000, 0x08000, mem_read_romext, mem_read_romextw, mem_read_romextl, NULL, NULL, NULL, romext, 0, NULL);
+ mem_mapping_add(&romext_mapping, 0xc8000, 0x08000, mem_read_romext, mem_read_romextw, mem_read_romextl, NULL, NULL, NULL, romext, 0, NULL);
// pclog("Mem resize %i %i\n",mem_size,c);
mem_a20_key = 2;
- mem_a20_alt = 0;
mem_a20_recalc();
-
- purgable_page_list_head = 0;
- purgeable_page_count = 0;
}
void mem_reset_page_blocks()
@@ -1523,8 +1942,8 @@ void mem_reset_page_blocks()
pages[c].write_b = mem_write_ramb_page;
pages[c].write_w = mem_write_ramw_page;
pages[c].write_l = mem_write_raml_page;
- pages[c].block = BLOCK_INVALID;
- pages[c].block_2 = BLOCK_INVALID;
+ pages[c].block = NULL;
+ pages[c].block_2 = NULL;
}
}
@@ -1534,12 +1953,12 @@ void mem_a20_recalc()
// pclog("A20 recalc %i %i\n", state, mem_a20_state);
if (state && !mem_a20_state)
{
- rammask = (AT && cpu_16bitbus) ? 0xffffff : 0xffffffff;
+ rammask = 0xffffffff;
flushmmucache();
}
else if (!state && mem_a20_state)
{
- rammask = (AT && cpu_16bitbus) ? 0xefffff : 0xffefffff;
+ rammask = 0xffefffff;
flushmmucache();
}
// pclog("rammask now %08X\n", rammask);
diff --git a/src/mem.h b/src/mem.h
index bd733e7..370be13 100644
--- a/src/mem.h
+++ b/src/mem.h
@@ -1,8 +1,6 @@
#ifndef _MEM_H_
#define _MEM_H_
-#include "x86.h"
-
typedef struct mem_mapping_t
{
struct mem_mapping_t *prev, *next;
@@ -30,13 +28,12 @@ typedef struct mem_mapping_t
#define MEM_MAPPING_EXTERNAL 1
/*Only present on internal bus (RAM)*/
#define MEM_MAPPING_INTERNAL 2
-/*Executing from ROM may involve additional wait states*/
-#define MEM_MAPPING_ROM 4
extern uint8_t *ram,*rom;
extern uint8_t romext[32768];
extern int readlnum,writelnum;
extern int memspeed[11];
+extern int nopageerrors;
extern uint32_t biosmask;
void mem_mapping_add(mem_mapping_t *mapping,
@@ -82,11 +79,7 @@ extern int mem_a20_key;
void mem_a20_recalc();
uint8_t mem_readb_phys(uint32_t addr);
-uint16_t mem_readw_phys(uint32_t addr);
-uint32_t mem_readl_phys(uint32_t addr);
void mem_writeb_phys(uint32_t addr, uint8_t val);
-void mem_writew_phys(uint32_t addr, uint16_t val);
-void mem_writel_phys(uint32_t addr, uint32_t val);
uint8_t mem_read_ram(uint32_t addr, void *priv);
uint16_t mem_read_ramw(uint32_t addr, void *priv);
@@ -107,19 +100,10 @@ void mem_write_nulll(uint32_t addr, uint32_t val, void *p);
FILE *romfopen(char *fn, char *mode);
mem_mapping_t bios_mapping[8];
-mem_mapping_t bios_high_mapping[9];
+mem_mapping_t bios_high_mapping[8];
extern mem_mapping_t ram_high_mapping;
-extern mem_mapping_t ram_remapped_mapping;
-extern uint64_t *byte_dirty_mask;
-extern uint64_t *byte_code_present_mask;
-
-#define PAGE_BYTE_MASK_SHIFT 6
-#define PAGE_BYTE_MASK_OFFSET_MASK 63
-#define PAGE_BYTE_MASK_MASK 63
-
-#define EVICT_NOT_IN_LIST ((uint32_t)-1)
typedef struct page_t
{
void (*write_b)(uint32_t addr, uint8_t val, struct page_t *p);
@@ -128,33 +112,18 @@ typedef struct page_t
uint8_t *mem;
- uint16_t block, block_2;
+ struct codeblock_t *block, *block_2;
/*Head of codeblock tree associated with this page*/
- uint16_t head;
+ struct codeblock_t *head;
uint64_t code_present_mask, dirty_mask;
-
- uint32_t evict_prev, evict_next;
-
- uint64_t *byte_dirty_mask;
- uint64_t *byte_code_present_mask;
} page_t;
extern page_t *pages;
extern page_t **page_lookup;
-extern uint32_t purgable_page_list_head;
-static inline int page_in_evict_list(page_t *p)
-{
- return (p->evict_prev != EVICT_NOT_IN_LIST);
-}
-void page_remove_from_evict_list(page_t *p);
-void page_add_to_evict_list(page_t *p);
-
-int mem_addr_is_ram(uint32_t addr);
-
uint32_t mmutranslate_noabrt(uint32_t addr, int rw);
extern uint32_t get_phys_virt,get_phys_phys;
static inline uint32_t get_phys(uint32_t addr)
@@ -170,34 +139,17 @@ static inline uint32_t get_phys(uint32_t addr)
return addr & rammask;
}
- if (readlookup2[addr >> 12] != -1)
- get_phys_phys = ((uintptr_t)readlookup2[addr >> 12] + (addr & ~0xfff)) - (uintptr_t)ram;
- else
- {
- get_phys_phys = (mmutranslatereal(addr, 0) & rammask) & ~0xfff;
- if (!cpu_state.abrt && mem_addr_is_ram(get_phys_phys))
- addreadlookup(get_phys_virt, get_phys_phys);
- }
-
+ get_phys_phys = (mmutranslatereal(addr, 0) & rammask) & ~0xfff;
return get_phys_phys | (addr & 0xfff);
// return mmutranslatereal(addr, 0) & rammask;
}
static inline uint32_t get_phys_noabrt(uint32_t addr)
{
- uint32_t phys_addr;
-
if (!(cr0 >> 31))
return addr & rammask;
- if (readlookup2[addr >> 12] != -1)
- return ((uintptr_t)readlookup2[addr >> 12] + addr) - (uintptr_t)ram;
-
- phys_addr = mmutranslate_noabrt(addr, 0) & rammask;
- if (phys_addr != 0xffffffff && mem_addr_is_ram(phys_addr))
- addreadlookup(addr, phys_addr);
-
- return phys_addr;
+ return mmutranslate_noabrt(addr, 0) & rammask;
}
void mem_invalidate_range(uint32_t start_addr, uint32_t end_addr);
@@ -211,7 +163,6 @@ void mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p);
void mem_reset_page_blocks();
extern mem_mapping_t ram_low_mapping;
-extern mem_mapping_t ram_mid_mapping;
void mem_remap_top_256k();
void mem_remap_top_384k();
@@ -221,9 +172,7 @@ void mem_flush_write_page(uint32_t addr, uint32_t virt);
void mem_add_bios();
void mem_init();
-void mem_alloc();
-
-void mem_set_704kb();
+void mem_resize();
void flushmmucache();
void flushmmucache_nopc();
@@ -235,8 +184,5 @@ void mmu_invalidate(uint32_t addr);
int loadbios();
-extern int purgeable_page_count;
-
-extern void (*smram_enable)(void);
-extern void (*smram_disable)(void);
+extern unsigned char isram[0x10000];
#endif
diff --git a/src/mem_bios.c b/src/mem_bios.c
deleted file mode 100644
index 2b6b174..0000000
--- a/src/mem_bios.c
+++ /dev/null
@@ -1,1192 +0,0 @@
-#include
-#include "ibm.h"
-#include "mem.h"
-#include "mem_bios.h"
-#include "rom.h"
-#include "video.h"
-#include "xi8088.h"
-
-static void romfread(uint8_t *buf, size_t size, size_t count, FILE *fp)
-{
- int result = fread(buf,size,count,fp);
- if (result < count)
- {
- pclog("ROM read failed: Expected %d, read %d\n", count, result);
- }
-}
-
-static int mem_load_basic(char *path)
-{
- char s[256];
- FILE *f;
-
- sprintf(s, "%s/ibm-basic-1.10.rom", path);
- f = romfopen(s, "rb");
- if (!f)
- {
- sprintf(s, "%s/basicc11.f6", path);
- f = romfopen(s, "rb");
- if (!f) return 1; /*I don't really care if BASIC is there or not*/
- romfread(rom + 0x6000, 8192, 1, f);
- fclose(f);
- sprintf(s, "%s/basicc11.f8", path);
- f = romfopen(s, "rb");
- if (!f) return 0; /*But if some of it is there, then all of it must be*/
- romfread(rom + 0x8000, 8192, 1, f);
- fclose(f);
- sprintf(s, "%s/basicc11.fa", path);
- f = romfopen(s, "rb");
- if (!f) return 0;
- romfread(rom + 0xA000, 8192, 1, f);
- fclose(f);
- sprintf(s, "%s/basicc11.fc", path);
- f = romfopen(s, "rb");
- if (!f) return 0;
- romfread(rom + 0xC000, 8192, 1, f);
- fclose(f);
- }
- else
- {
- romfread(rom + 0x6000, 32768, 1, f);
- fclose(f);
- }
-
- return 1;
-}
-
-int loadbios()
-{
- FILE *f=NULL,*ff=NULL;
- int c;
-
- loadfont("mda.rom", FONT_MDA);
- loadfont("wy700.rom", FONT_WY700);
- loadfont("8x12.bin", FONT_MDSI);
- loadfont("im1024font.bin", FONT_IM1024);
-
- biosmask = 0xffff;
-
- if (!rom)
- rom = malloc(0x40000);
- memset(romext,0x63,0x4000);
- memset(rom, 0xff, 0x20000);
-
- pclog("Starting with romset %i\n", romset);
-
- switch (romset)
- {
- case ROM_PC1512:
- f=romfopen("pc1512/40043.v1","rb");
- ff=romfopen("pc1512/40044.v1","rb");
- if (!f || !ff) break;
- for (c=0xC000;c<0x10000;c+=2)
- {
- rom[c]=getc(f);
- rom[c+1]=getc(ff);
- }
- fclose(ff);
- fclose(f);
- loadfont("pc1512/40078.ic127", FONT_CGA);
- return 1;
- case ROM_PC1640:
- f=romfopen("pc1640/40044.v3","rb");
- ff=romfopen("pc1640/40043.v3","rb");
- if (!f || !ff) break;
- for (c=0xC000;c<0x10000;c+=2)
- {
- rom[c]=getc(f);
- rom[c+1]=getc(ff);
- }
- fclose(ff);
- fclose(f);
- f=romfopen("pc1640/40100","rb");
- if (!f) break;
- fclose(f);
- return 1;
- case ROM_PC200:
- f=romfopen("pc200/pc20v2.1","rb");
- ff=romfopen("pc200/pc20v2.0","rb");
- if (!f || !ff) break;
- for (c=0xC000;c<0x10000;c+=2)
- {
- rom[c]=getc(f);
- rom[c+1]=getc(ff);
- }
- fclose(ff);
- fclose(f);
- loadfont("pc200/40109.bin", FONT_PC200);
- return 1;
- case ROM_PPC512:
- f=romfopen("ppc512/40107.v2","rb");
- ff=romfopen("ppc512/40108.v2","rb");
- if (!f || !ff) break;
- for (c=0xC000;c<0x10000;c+=2)
- {
- rom[c]=getc(f);
- rom[c+1]=getc(ff);
- }
- fclose(ff);
- fclose(f);
- loadfont("ppc512/40109.bin", FONT_PC200);
- return 1;
- case ROM_TANDY:
- f=romfopen("tandy/tandy1t1.020","rb");
- if (!f) break;
- romfread(rom,65536,1,f);
- fclose(f);
- return 1;
- case ROM_TANDY1000HX:
- f = romfopen("tandy1000hx/v020000.u12", "rb");
- if (!f) break;
- romfread(rom, 0x20000, 1, f);
- fclose(f);
- biosmask = 0x1ffff;
- return 1;
- case ROM_TANDY1000SL2:
- f = romfopen("tandy1000sl2/8079047.hu1" ,"rb");
- ff = romfopen("tandy1000sl2/8079048.hu2","rb");
- if (!f || !ff) break;
- fseek(f, 0x30000/2, SEEK_SET);
- fseek(ff, 0x30000/2, SEEK_SET);
- for (c = 0x0000; c < 0x10000; c += 2)
- {
- rom[c] = getc(f);
- rom[c + 1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- return 1;
-/* case ROM_IBMPCJR:
- f=fopen("pcjr/bios.rom","rb");
- romfread(rom+0xE000,8192,1,f);
- fclose(f);
- f=fopen("pcjr/basic.rom","rb");
- romfread(rom+0x6000,32768,1,f);
- fclose(f);
- break;*/
- case ROM_IBMXT:
- f=romfopen("ibmxt/xt.rom","rb");
- if (!f)
- {
- f = romfopen("ibmxt/5000027.u19", "rb");
- ff = romfopen("ibmxt/1501512.u18","rb");
- if (!f || !ff) break;
- romfread(rom, 0x8000, 1, f);
- romfread(rom + 0x8000, 0x8000, 1, ff);
- fclose(ff);
- fclose(f);
- return 1;
- }
- else
- {
- romfread(rom,65536,1,f);
- fclose(f);
- return 1;
- }
- break;
-
- case ROM_IBMPCJR:
- f = romfopen("ibmpcjr/bios.rom","rb");
- if (!f) break;
- romfread(rom, 0x10000, 1, f);
- fclose(f);
- return 1;
-
- case ROM_GENXT:
- f=romfopen("genxt/pcxt.rom","rb");
- if (!f) break;
- romfread(rom+0xE000,8192,1,f);
- fclose(f);
- if (!mem_load_basic("genxt"))
- break;
- return 1;
- case ROM_DTKXT:
- f=romfopen("dtk/dtk_erso_2.42_2764.bin","rb");
- if (!f) break;
- romfread(rom+0xE000,8192,1,f);
- fclose(f);
- return 1;
- case ROM_OLIM24:
- f = romfopen("olivetti_m24/olivetti_m24_version_1.43_low.bin" ,"rb");
- ff = romfopen("olivetti_m24/olivetti_m24_version_1.43_high.bin","rb");
- if (!f || !ff) break;
- for (c = 0x0000; c < 0x4000; c += 2)
- {
- rom[c + 0xc000] = getc(f);
- rom[c + 0xc001] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- return 1;
-
- case ROM_PC2086:
- f = romfopen("pc2086/40179.ic129" ,"rb");
- ff = romfopen("pc2086/40180.ic132","rb");
- if (!f || !ff) break;
- pclog("Loading BIOS\n");
- for (c = 0x0000; c < 0x4000; c += 2)
- {
- rom[c + 0x0000] = getc(f);
- rom[c + 0x0001] = getc(ff);
- }
- pclog("%02X %02X %02X\n", rom[0xfff0], rom[0xfff1], rom[0xfff2]);
- fclose(ff);
- fclose(f);
- f = romfopen("pc2086/40186.ic171", "rb");
- if (!f) break;
- fclose(f);
- biosmask = 0x3fff;
- return 1;
-
- case ROM_PC3086:
- f = romfopen("pc3086/fc00.bin" ,"rb");
- if (!f) break;
- romfread(rom, 0x4000, 1, f);
- fclose(f);
- f = romfopen("pc3086/c000.bin", "rb");
- if (!f) break;
- fclose(f);
- biosmask = 0x3fff;
- return 1;
-
- case ROM_PC5086:
- f = romfopen("pc5086/sys_rom.bin" ,"rb");
- if (!f) break;
- romfread(rom, 65536, 1, f);
- fclose(f);
- return 1;
-
-
- case ROM_IBMAT:
-/* f=romfopen("amic206.bin","rb");
- if (!f) break;
- romfread(rom,65536,1,f);
- fclose(f);
- return 1;*/
- case ROM_IBMAT386:
- f = romfopen("ibmat/62x0820.u27", "rb");
- ff =romfopen("ibmat/62x0821.u47", "rb");
- if (!f || !ff) break;
- for (c=0x0000;c<0x10000;c+=2)
- {
- rom[c]=getc(f);
- rom[c+1]=getc(ff);
- }
- fclose(ff);
- fclose(f);
- return 1;
- case ROM_CMDPC30:
- f = romfopen("cmdpc30/commodore pc 30 iii even.bin", "rb");
- ff = romfopen("cmdpc30/commodore pc 30 iii odd.bin", "rb");
- if (!f || !ff) break;
- for (c = 0x0000; c < 0x8000; c += 2)
- {
- rom[c] = getc(f);
- rom[c + 1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- biosmask = 0x7fff;
- return 1;
- case ROM_DELL200:
- f=romfopen("dells200/dell0.bin","rb");
- ff=romfopen("dells200/dell1.bin","rb");
- if (!f || !ff) break;
- for (c=0x0000;c<0x10000;c+=2)
- {
- rom[c]=getc(f);
- rom[c+1]=getc(ff);
- }
- fclose(ff);
- fclose(f);
- return 1;
-/* case ROM_IBMAT386:
- f=romfopen("at386/at386.bin","rb");
- if (!f) break;
- romfread(rom,65536,1,f);
- fclose(f);
- return 1;*/
- case ROM_AMA932J:
-// f=romfopen("at386/at386.bin","rb");
- f=romfopen("ama932j/ami.bin","rb");
- if (!f) break;
- romfread(rom,65536,1,f);
- fclose(f);
- f=romfopen("ama932j/oti067.bin","rb");
- if (!f) break;
- fclose(f);
- return 1;
-
- case ROM_AMI386SX:
-// f=romfopen("at386/at386.bin","rb");
- f=romfopen("ami386/ami386.bin","rb");
- if (!f) break;
- romfread(rom,65536,1,f);
- fclose(f);
- return 1;
-
- case ROM_AMI386DX_OPTI495: /*This uses the OPTi 82C495 chipset*/
- f=romfopen("ami386dx/opt495sx.ami","rb");
- if (!f) break;
- romfread(rom,65536,1,f);
- fclose(f);
- return 1;
- case ROM_MR386DX_OPTI495: /*This uses the OPTi 82C495 chipset*/
- f=romfopen("mr386dx/opt495sx.mr","rb");
- if (!f) break;
- romfread(rom,65536,1,f);
- fclose(f);
- return 1;
-
- case ROM_ACER386:
- f=romfopen("acer386/acer386.bin","rb");
- if (!f) break;
- romfread(rom,65536,1,f);
- fclose(f);
- rom[0xB0]=0xB0-0x51;
- rom[0x40d4]=0x51; /*PUSH CX*/
- f=romfopen("acer386/oti067.bin","rb");
- if (!f) break;
- fclose(f);
- return 1;
-
- case ROM_KMXC02:
- f=romfopen("kmxc02/3ctm005.bin","rb");
- if (!f) break;
- romfread(rom,65536,1,f);
- fclose(f);
- return 1;
-
- case ROM_AMI286:
- f=romfopen("ami286/amic206.bin","rb");
- if (!f) break;
- romfread(rom,65536,1,f);
- fclose(f);
-// memset(romext,0x63,0x8000);
- return 1;
-
- case ROM_TG286M:
- f=romfopen("tg286m/ami.bin","rb");
- if (!f) break;
- romfread(rom,65536,1,f);
- fclose(f);
-// memset(romext,0x63,0x8000);
- return 1;
-
- case ROM_AWARD286:
- f=romfopen("award286/award.bin","rb");
- if (!f) break;
- romfread(rom,65536,1,f);
- fclose(f);
- return 1;
-
- case ROM_GDC212M:
- f=romfopen("gdc212m/gdc212m_72h.bin","rb");
- if (!f) break;
- romfread(rom,65536,1,f);
- fclose(f);
- return 1;
-
- case ROM_HYUNDAI_SUPER286TR:
- f=romfopen("super286tr/award.bin","rb");
- if (!f) break;
- romfread(rom,65536,1,f);
- fclose(f);
- return 1;
-
- case ROM_GW286CT:
- f=romfopen("gw286ct/2ctc001.bin","rb");
- if (!f) break;
- romfread(rom,65536,1,f);
- fclose(f);
- return 1;
-
- case ROM_SPC4200P:
- f=romfopen("spc4200p/u8.01","rb");
- if (!f) break;
- romfread(rom,65536,1,f);
- fclose(f);
- return 1;
-
- case ROM_SPC4216P:
- f=romfopen("spc4216p/phoenix.bin","rb");
- if (!f)
- {
- f = romfopen("spc4216p/7101.u8", "rb");
- ff = romfopen("spc4216p/ac64.u10","rb");
- if (!f || !ff) break;
- for (c = 0x0000; c < 0x10000; c += 2)
- {
- rom[c] = getc(f);
- rom[c + 1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- return 1;
- }
- else
- {
- romfread(rom,65536,1,f);
-
- fclose(f);
- return 1;
- }
- break;
-
- case ROM_SPC4620P:
- f=romfopen("spc4620p/svb6120a_font.rom","rb");
- if (!f) break;
- fclose(f);
- f = romfopen("spc4620p/31005h.u8", "rb");
- ff = romfopen("spc4620p/31005h.u10","rb");
- if (f && ff)
- {
- fseek(f, 0x8000, SEEK_SET);
- fseek(ff, 0x8000, SEEK_SET);
- for (c = 0x0000; c < 0x10000; c += 2)
- {
- rom[c] = getc(f);
- rom[c + 1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- return 1;
- }
- break;
-
- case ROM_SPC6000A:
- f = romfopen("spc6000a/3c80.u27", "rb");
- ff = romfopen("spc6000a/9f80.u26","rb");
- if (f && ff)
- {
- for (c = 0x8000; c < 0x10000; c += 2)
- {
- rom[c] = getc(f);
- rom[c + 1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- return 1;
- }
- break;
-
- case ROM_SPC6033P:
- f=romfopen("spc6033p/svb6120a_font.rom","rb");
- if (!f) break;
- fclose(f);
- f=romfopen("spc6033p/phoenix.bin","rb");
- if (f)
- {
- fseek(f, 0x10000, SEEK_SET);
- romfread(rom,65536,1,f);
-
- fclose(f);
- return 1;
- }
- break;
-
- case ROM_EUROPC:
-// return 0;
- f=romfopen("europc/50145","rb");
- if (!f) break;
- romfread(rom+0x8000,32768,1,f);
- fclose(f);
-// memset(romext,0x63,0x8000);
- return 1;
-
- case ROM_IBMPC:
- f=romfopen("ibmpc/pc102782.bin","rb");
- if (!f) break;
-// f=fopen("pc081682.bin","rb");
- romfread(rom+0xE000,8192,1,f);
- fclose(f);
- if (!mem_load_basic("ibmpc"))
- break;
- return 1;
-
- case ROM_MEGAPC:
- f = romfopen("megapc/41651-bios lo.u18", "rb");
- ff = romfopen("megapc/211253-bios hi.u19", "rb");
- if (!f || !ff) break;
- fseek(f, 0x8000, SEEK_SET);
- fseek(ff, 0x8000, SEEK_SET);
- for (c = 0x0000; c < 0x10000; c+=2)
- {
- rom[c]=getc(f);
- rom[c+1]=getc(ff);
- }
- fclose(ff);
- fclose(f);
- return 1;
-
- case ROM_AMI486:
- f=romfopen("ami486/ami486.bin","rb");
- if (!f) break;
- romfread(rom,65536,1,f);
- fclose(f);
- //is486=1;
- return 1;
-
- case ROM_WIN486:
-// f=romfopen("win486/win486.bin","rb");
- f=romfopen("win486/ali1429g.amw","rb");
- if (!f) break;
- romfread(rom,65536,1,f);
- fclose(f);
- //is486=1;
- return 1;
-
- case ROM_PCI486:
- f=romfopen("hot-433/hot-433.ami","rb");
- if (!f) break;
- romfread(rom, 0x20000, 1, f);
- fclose(f);
- biosmask = 0x1ffff;
- //is486=1;
- return 1;
-
- case ROM_SIS496:
- f = romfopen("sis496/sis496-1.awa", "rb");
- if (!f) break;
- romfread(rom, 0x20000, 1, f);
- fclose(f);
- biosmask = 0x1ffff;
- pclog("Load SIS496 %x %x\n", rom[0x1fff0], rom[0xfff0]);
- return 1;
-
- case ROM_P55VA:
- f = romfopen("p55va/va021297.bin", "rb");
- if (!f) break;
- romfread(rom, 0x20000, 1, f);
- fclose(f);
- biosmask = 0x1ffff;
- return 1;
-
- case ROM_P55TVP4:
- f = romfopen("p55tvp4/tv5i0204.awd", "rb");
- if (!f) break;
- romfread(rom, 0x20000, 1, f);
- fclose(f);
- biosmask = 0x1ffff;
- return 1;
-
- case ROM_430VX:
-// f = romfopen("430vx/ga586atv.bin", "rb");
-// f = fopen("430vx/vx29.bin", "rb");
- f = romfopen("430vx/55xwuq0e.bin", "rb");
-// f=romfopen("430vx/430vx","rb");
- if (!f) break;
- romfread(rom, 0x20000, 1, f);
- fclose(f);
- biosmask = 0x1ffff;
- //is486=1;
- return 1;
-
- case ROM_P55T2P4:
- f = romfopen("p55t2p4/0207_j2.bin", "rb");
- if (!f) break;
- romfread(rom, 0x20000, 1, f);
- fclose(f);
- biosmask = 0x1ffff;
- return 1;
-
- case ROM_REVENGE:
- f = romfopen("revenge/1009af2_.bio", "rb");
- if (!f) break;
- fseek(f, 0x80, SEEK_SET);
- romfread(rom + 0x10000, 0x10000, 1, f);
- fclose(f);
- f = romfopen("revenge/1009af2_.bi1", "rb");
- if (!f) break;
- fseek(f, 0x80, SEEK_SET);
- romfread(rom, 0xc000, 1, f);
- fclose(f);
- biosmask = 0x1ffff;
- //is486=1;
- return 1;
- case ROM_ENDEAVOR:
- f = romfopen("endeavor/1006cb0_.bio", "rb");
- if (!f) break;
- fseek(f, 0x80, SEEK_SET);
- romfread(rom + 0x10000, 0x10000, 1, f);
- fclose(f);
- f = romfopen("endeavor/1006cb0_.bi1", "rb");
- if (!f) break;
- fseek(f, 0x80, SEEK_SET);
- romfread(rom, 0xd000, 1, f);
- fclose(f);
- biosmask = 0x1ffff;
- //is486=1;
- return 1;
-
- case ROM_IBMPS1_2011:
-#if 0
- f=romfopen("ibmps1es/ibm_1057757_24-05-90.bin","rb");
- ff=romfopen("ibmps1es/ibm_1057757_29-15-90.bin","rb");
- fseek(f, 0x10000, SEEK_SET);
- fseek(ff, 0x10000, SEEK_SET);
- if (!f || !ff) break;
- for (c = 0x0000; c < 0x20000; c += 2)
- {
- rom[c] = getc(f);
- rom[c+1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
-#endif
-//#if 0
- f = romfopen("ibmps1es/f80000.bin", "rb");
- if (!f) break;
- fseek(f, 0x60000, SEEK_SET);
- romfread(rom, 0x20000, 1, f);
- fclose(f);
-//#endif
- biosmask = 0x1ffff;
- return 1;
-
- case ROM_IBMPS1_2121:
- f = romfopen("ibmps1_2121/fc0000.bin", "rb");
- if (!f) break;
- fseek(f, 0x20000, SEEK_SET);
- romfread(rom, 0x20000, 1, f);
- fclose(f);
- biosmask = 0x1ffff;
- return 1;
-
- case ROM_DESKPRO_386:
- f=romfopen("deskpro386/109592-005.u11.bin","rb");
- ff=romfopen("deskpro386/109591-005.u13.bin","rb");
- if (!f || !ff) break;
- for (c = 0x0000; c < 0x8000; c += 2)
- {
- rom[c] = getc(f);
- rom[c+1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- biosmask = 0x7fff;
- return 1;
-
- case ROM_AMIXT:
- f = romfopen("amixt/ami_8088_bios_31jan89.bin", "rb");
- if (!f) break;
- romfread(rom + 0xE000, 8192, 1, f);
- fclose(f);
- return 1;
-
- case ROM_LTXT:
- f = romfopen("ltxt/27c64.bin", "rb");
- if (!f) break;
- romfread(rom + 0xE000, 8192, 1, f);
- fclose(f);
- if (!mem_load_basic("ltxt"))
- break;
- return 1;
-
- case ROM_LXT3:
- f = romfopen("lxt3/27c64d.bin", "rb");
- if (!f) break;
- romfread(rom + 0xE000, 8192, 1, f);
- fclose(f);
- if (!mem_load_basic("lxt3"))
- break;
- return 1;
-
- case ROM_PX386: /*Phoenix 80386 BIOS*/
- f=romfopen("px386/3iip001l.bin","rb");
- ff=romfopen("px386/3iip001h.bin","rb");
- if (!f || !ff) break;
- for (c = 0x0000; c < 0x10000; c += 2)
- {
- rom[c] = getc(f);
- rom[c+1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- return 1;
-
- case ROM_DTK386: /*Uses NEAT chipset*/
- f = romfopen("dtk386/3cto001.bin", "rb");
- if (!f) break;
- romfread(rom, 65536, 1, f);
- fclose(f);
- return 1;
-
- case ROM_PXXT:
- f = romfopen("pxxt/000p001.bin", "rb");
- if (!f) break;
- romfread(rom + 0xE000, 8192, 1, f);
- fclose(f);
- return 1;
-
- case ROM_JUKOPC:
- f = romfopen("jukopc/000o001.bin", "rb");
- if (!f) break;
- romfread(rom + 0xE000, 8192, 1, f);
- fclose(f);
- return 1;
-
- case ROM_IBMPS2_M30_286:
- f = romfopen("ibmps2_m30_286/33f5381a.bin", "rb");
- if (!f) break;
- romfread(rom, 0x20000, 1, f);
- fclose(f);
- biosmask = 0x1ffff;
- return 1;
-
- case ROM_IBMPS2_M50:
- f=romfopen("i8550021/90x7423.zm14","rb");
- ff=romfopen("i8550021/90x7426.zm16","rb");
- if (!f || !ff) break;
- for (c = 0x0000; c < 0x10000; c += 2)
- {
- rom[c] = getc(f);
- rom[c+1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- f=romfopen("i8550021/90x7420.zm13","rb");
- ff=romfopen("i8550021/90x7429.zm18","rb");
- if (!f || !ff) break;
- for (c = 0x10000; c < 0x20000; c += 2)
- {
- rom[c] = getc(f);
- rom[c+1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- biosmask = 0x1ffff;
- return 1;
-
- case ROM_IBMPS2_M55SX:
- f=romfopen("i8555081/33f8146.zm41","rb");
- ff=romfopen("i8555081/33f8145.zm40","rb");
- if (!f || !ff) break;
- for (c = 0x0000; c < 0x20000; c += 2)
- {
- rom[c] = getc(f);
- rom[c+1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- biosmask = 0x1ffff;
- return 1;
-
- case ROM_IBMPS2_M80:
- f=romfopen("i8580111/15f6637.bin","rb");
- ff=romfopen("i8580111/15f6639.bin","rb");
- if (!f || !ff) break;
- for (c = 0x0000; c < 0x20000; c += 2)
- {
- rom[c] = getc(f);
- rom[c+1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- biosmask = 0x1ffff;
- return 1;
-
- case ROM_ATARIPC3:
- f=romfopen("ataripc3/AWARD_ATARI_PC_BIOS_3.08.BIN","rb");
- if (!f) break;
- romfread(rom+0x8000,32768,1,f);
- fclose(f);
- return 1;
-
- case ROM_IBMXT286:
- f = romfopen("ibmxt286/BIOS_5162_21APR86_U34_78X7460_27256.BIN", "rb");
- ff =romfopen("ibmxt286/BIOS_5162_21APR86_U35_78X7461_27256.BIN", "rb");
- if (!f || !ff) break;
- for (c=0x0000;c<0x10000;c+=2)
- {
- rom[c]=getc(f);
- rom[c+1]=getc(ff);
- }
- fclose(ff);
- fclose(f);
- return 1;
-
- case ROM_EPSON_PCAX:
- f = romfopen("epson_pcax/EVAX", "rb");
- ff = romfopen("epson_pcax/ODAX", "rb");
- if (!f || !ff) break;
- for (c = 0x0000; c < 0x8000; c += 2)
- {
- rom[c] = getc(f);
- rom[c + 1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- biosmask = 0x7fff;
- return 1;
-
- case ROM_EPSON_PCAX2E:
- f = romfopen("epson_pcax2e/EVAXE", "rb");
- ff = romfopen("epson_pcax2e/ODAXE", "rb");
- if (!f || !ff) break;
- for (c = 0x0000; c < 0x10000; c += 2)
- {
- rom[c] = getc(f);
- rom[c+1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- return 1;
-
- case ROM_EPSON_PCAX3:
- f = romfopen("epson_pcax3/EVAX3", "rb");
- ff = romfopen("epson_pcax3/ODAX3", "rb");
- if (!f || !ff) break;
- for (c = 0x0000; c < 0x10000;c += 2)
- {
- rom[c] = getc(f);
- rom[c+1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- return 1;
-
- case ROM_T3100E:
- loadfont("t3100e/t3100e_font.bin", FONT_T3100E);
- f=romfopen("t3100e/t3100e.rom","rb");
- if (!f) break;
- romfread(rom,65536,1,f);
- fclose(f);
- return 1;
-
- case ROM_T1000:
- loadfont("t1000/t1000font.rom", FONT_CGA);
- f=romfopen("t1000/t1000.rom","rb");
- if (!f) break;
- romfread(rom, 0x8000,1,f);
- memcpy(rom + 0x8000, rom, 0x8000);
- biosmask = 0x7fff;
- fclose(f);
- return 1;
-
- case ROM_T1200:
- loadfont("t1200/t1000font.rom", FONT_CGA);
- f=romfopen("t1200/t1200_019e.ic15.bin","rb");
- if (!f) break;
- romfread(rom, 0x8000,1,f);
- memcpy(rom + 0x8000, rom, 0x8000);
- biosmask = 0x7fff;
- fclose(f);
- return 1;
-
- case ROM_PB_L300SX:
- f = romfopen("pb_l300sx/pb_l300sx.bin", "rb");
- if (!f) break;
- romfread(rom, 65536, 1, f);
- fclose(f);
- return 1;
-
- case ROM_NCR_PC4I:
- f=romfopen("ncr_pc4i/NCR_PC4i_BIOSROM_1985.BIN" ,"rb");
- if (!f) break;
- romfread(rom, 0x4000, 1, f);
- fclose(f);
- biosmask = 0x3fff;
- return 1;
-
- case ROM_TO16_PC:
- f=romfopen("to16_pc/TO16_103.bin","rb");
- if (!f) break;
- romfread(rom+0x8000,32768,1,f);
- fclose(f);
- return 1;
-
- case ROM_COMPAQ_PII:
- f = romfopen("compaq_pii/109740-001.rom", "rb");
- ff = romfopen("compaq_pii/109739-001.rom", "rb");
- if (!f || !ff) break;
- for (c = 0x0000; c < 0x8000; c += 2)
- {
- rom[c] = getc(f);
- rom[c + 1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- biosmask = 0x7fff;
- return 1;
-
- case ROM_ELX_PC425X:
- /*PC-425X uses a single ROM chip containing both main and video BIOSes.
- First 32kb is video BIOS, next 32kb is blank, last 64kb is main BIOS.
- Alternatively, seperate BIOS + video BIOS dumps are supported.*/
- f = romfopen("elx_pc425x/elx_pc425x.bin", "rb");
- if (!f)
- {
- if (!rom_present("elx_pc425x/elx_pc425x_vbios.bin"))
- break;
- f = romfopen("elx_pc425x/elx_pc425x_bios.bin", "rb");
- if (!f)
- break;
- }
- else
- fseek(f, 0x10000, SEEK_SET);
- romfread(rom, 65536, 1, f);
- fclose(f);
- return 1;
-
- case ROM_PB570:
- if (!rom_present("pb570/gd5430.bin"))
- break;
- f = romfopen("pb570/1007by0r.bio", "rb");
- if (!f) break;
- fseek(f, 0x80, SEEK_SET);
- romfread(rom + 0x10000, 0x10000, 1, f);
- fclose(f);
- f = romfopen("pb570/1007by0r.bi1", "rb");
- if (!f) break;
- fseek(f, 0x80, SEEK_SET);
- romfread(rom, 0xc000, 1, f);
- romfread(rom+0xc000, 0x1000, 1, f);
- fclose(f);
- biosmask = 0x1ffff;
- return 1;
-
- case ROM_ZAPPA:
- f = romfopen("zappa/1006bs0_.bio", "rb");
- if (!f) break;
- fseek(f, 0x80, SEEK_SET);
- romfread(rom + 0x10000, 0x10000, 1, f);
- fclose(f);
- f = romfopen("zappa/1006bs0_.bi1", "rb");
- if (!f) break;
- fseek(f, 0x80, SEEK_SET);
- romfread(rom, 0xd000, 1, f);
- fclose(f);
- biosmask = 0x1ffff;
- return 1;
-
- // keep separate from generic Zappa because there is a BIOS logo
- // in flash.bin
- case ROM_ITAUTEC_INFOWAYM:
-// if (!rom_present("infowaym/gd5434.bin"))
-// break;
- f = romfopen("infowaym/1006bs0_.bio", "rb");
- if (!f) break;
- fseek(f, 0x80, SEEK_SET);
- romfread(rom + 0x10000, 0x10000, 1, f);
- fclose(f);
- f = romfopen("infowaym/1006bs0_.bi1", "rb");
- if (!f) break;
- fseek(f, 0x80, SEEK_SET);
- romfread(rom, 0xd000, 1, f);
- fclose(f);
- biosmask = 0x1ffff;
- return 1;
-
- case ROM_PB520R:
- if (!rom_present("pb520r/gd5434.bin"))
- break;
- f = romfopen("pb520r/1009bc0r.bio", "rb");
- if (!f) break;
- fseek(f, 0x80, SEEK_SET);
- romfread(rom + 0x10000, 0x10000, 1, f);
- fclose(f);
- f = romfopen("pb520r/1009bc0r.bi1", "rb");
- if (!f) break;
- fseek(f, 0x80, SEEK_SET);
- romfread(rom, 0xc000, 1, f);
- romfread(rom+0xc000, 0x1000, 1, f);
- fclose(f);
- biosmask = 0x1ffff;
- return 1;
-
- case ROM_COMPAQ_PIP:
- f=romfopen("compaq_pip/Compaq Portable Plus 100666-001 Rev C.bin","rb");
- if (!f) break;
- romfread(rom + 0xE000, 8192, 1, f);
- fclose(f);
- return 1;
-
- case ROM_XI8088:
- f = romfopen("xi8088/bios-xi8088.bin", "rb"); /* use the bios without xt-ide because it's configurable in pcem */
- if (!f) break;
- if (xi8088_bios_128kb())
- {
- /* high bit is flipped in xi8088 */
- romfread(rom + 0x10000, 0x10000, 1, f);
- romfread(rom, 0x10000, 1, f);
- biosmask = 0x1ffff;
- }
- else
- {
- /* smaller bios, more UMBs */
- romfread(rom, 0x10000, 1, f);
- }
- fclose(f);
- return 1;
-
- case ROM_IBMPS2_M70_TYPE3:
- f = romfopen("ibmps2_m70_type3/70-a_even.bin","rb");
- ff = romfopen("ibmps2_m70_type3/70-a_odd.bin","rb");
- if (!f || !ff)
- break;
- for (c = 0x0000; c < 0x20000; c += 2)
- {
- rom[c] = getc(f);
- rom[c+1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- biosmask = 0x1ffff;
- return 1;
-
- case ROM_IBMPS2_M70_TYPE4:
- f = romfopen("ibmps2_m70_type4/70-b_even.bin","rb");
- ff = romfopen("ibmps2_m70_type4/70-b_odd.bin","rb");
- if (!f || !ff)
- break;
- for (c = 0x0000; c < 0x20000; c += 2)
- {
- rom[c] = getc(f);
- rom[c+1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- biosmask = 0x1ffff;
- return 1;
-
- case ROM_TULIP_TC7:
- f = romfopen("tulip_tc7/tc7be.bin", "rb");
- ff = romfopen("tulip_tc7/tc7bo.bin", "rb");
- if (!f || !ff) break;
- for (c = 0x0000; c < 0x8000; c += 2)
- {
- rom[c] = getc(f);
- rom[c + 1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- biosmask = 0x7fff;
- return 1;
-
- case ROM_ZD_SUPERS: /* [8088] Zenith Data Systems SupersPort */
- f=romfopen("zdsupers/z184m v3.1d.10d","rb");
- if (!f) break;
- romfread(rom, 32768, 1, f);
- fclose(f);
- biosmask = 0x7fff;
- return 1;
-
- case ROM_PB410A:
- f = romfopen("pb410a/PB410A.080337.4ABF.U25.bin","rb");
- if (!f) break;
- romfread(rom, 0x20000, 1, f);
- fclose(f);
- biosmask = 0x1ffff;
- return 1;
-
- case ROM_BULL_MICRAL_45:
- f = romfopen("bull_micral_45/even.fil", "rb");
- ff = romfopen("bull_micral_45/odd.fil", "rb");
- if (!f || !ff) break;
- for (c = 0x0000; c < 0x10000; c += 2)
- {
- rom[c] = getc(f);
- rom[c+1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- return 1;
-
- case ROM_FIC_VA503P:
- f = romfopen("fic_va503p/je4333.bin","rb");
- if (!f) break;
- romfread(rom, 0x20000, 1, f);
- fclose(f);
- biosmask = 0x1ffff;
- return 1;
-
- case ROM_CBM_SL386SX25:
- f = romfopen("cbm_sl386sx25/f000.rom", "rb");
- if (!f) break;
- romfread(rom, 0x10000, 1, f);
- fclose(f);
- return 1;
-
- case ROM_IBMPS1_2133_451:
- f = romfopen("ibmps1_2133/PS1_2133_52G2974_ROM.bin", "rb");
- if (!f) break;
- romfread(rom, 0x20000, 1, f);
- fclose(f);
- biosmask = 0x1ffff;
- return 1;
-
- case ROM_ECS_386_32:
- f = romfopen("ecs386_32/386_32_even.bin", "rb");
- ff = romfopen("ecs386_32/386_32_odd.bin", "rb");
- if (!f || !ff) break;
- for (c = 0x0000; c < 0x10000; c += 2)
- {
- rom[c] = getc(f);
- rom[c+1] = getc(ff);
- }
- fclose(ff);
- fclose(f);
- return 1;
-
- case ROM_LEDGE_MODELM:
- f = romfopen("leadingedge_modelm/Leading Edge - Model M - BIOS ROM - Version 4.71.bin","rb");
- if (!f) break;
- romfread(rom, 0x4000, 1, f);
- fclose(f);
- biosmask = 0x3fff;
- return 1;
-
- case ROM_DESKPRO:
- f = romfopen("deskpro/Compaq - BIOS - Revision J - 106265-002.bin","rb");
- if (!f) break;
- romfread(rom, 0x2000, 1, f);
- fclose(f);
- biosmask = 0x1fff;
- return 1;
-
- case ROM_VS440FX:
- f = romfopen("vs440fx/1018CS1_.BIO", "rb");
- if (!f) break;
- fseek(f, 0x80, SEEK_SET);
- romfread(rom + 0x10000, 0x10000, 1, f);
- fclose(f);
- f = romfopen("vs440fx/1018CS1_.BI1", "rb");
- if (!f) break;
- fseek(f, 0x80, SEEK_SET);
- romfread(rom + 0x00000, 0x10000, 1, f);
- fclose(f);
- f = romfopen("vs440fx/1018CS1_.BI2", "rb");
- if (!f) break;
- fseek(f, 0x80, SEEK_SET);
- romfread(rom + 0x30000, 0x10000, 1, f);
- fclose(f);
- f = romfopen("vs440fx/1018CS1_.BI3", "rb");
- if (!f) break;
- fseek(f, 0x80, SEEK_SET);
- romfread(rom + 0x20000, 0x0a000, 1, f);
- fclose(f);
-
- f = romfopen("vs440fx/1018CS1_.RCV", "rb");
- if (!f) break;
- fseek(f, 0x80, SEEK_SET);
- romfread(rom + 0x2c000, 0x04000, 1, f);
- fclose(f);
-
- biosmask = 0x3ffff;
- return 1;
-
- case ROM_GA686BX:
- f = romfopen("ga686bx/6BX.F2a", "rb");
- if (!f) break;
- romfread(rom, 0x40000, 1, f);
- fclose(f);
-
- biosmask = 0x3ffff;
- return 1;
- }
- printf("Failed to load ROM!\n");
- if (f) fclose(f);
- if (ff) fclose(ff);
- return 0;
-}
diff --git a/src/mem_bios.h b/src/mem_bios.h
deleted file mode 100644
index e3fc1f8..0000000
--- a/src/mem_bios.h
+++ /dev/null
@@ -1 +0,0 @@
-int loadbios();
diff --git a/src/mfm_at.c b/src/mfm_at.c
index 9293f18..f2099a1 100644
--- a/src/mfm_at.c
+++ b/src/mfm_at.c
@@ -11,7 +11,6 @@
#include "ibm.h"
#include "device.h"
-#include "hdd_file.h"
#include "io.h"
#include "pic.h"
#include "timer.h"
@@ -21,14 +20,6 @@
#define IDE_TIME (TIMER_USEC*10)//(5 * 100 * (1 << TIMER_SHIFT))
-/*Rough estimate - MFM drives spin at 3600 RPM, with 17 sectors per track,
- meaning (3600/60)*17 = 1020 sectors per second, or 980us per sector.
-
- This is required for OS/2 on slow 286 systems, as the hard drive formatter
- will crash with 'internal processing error' if write sector interrupts are too
- close in time*/
-#define SECTOR_TIME (TIMER_USEC * 980)
-
#define STAT_ERR 0x01
#define STAT_INDEX 0x02
#define STAT_CORRECTED_DATA 0x04
@@ -54,14 +45,16 @@
#define CMD_DIAGNOSE 0x90
#define CMD_SET_PARAMETERS 0x91
-extern char ide_fn[7][512];
+extern char ide_fn[4][512];
typedef struct mfm_drive_t
{
+ int spt, hpc;
+ int tracks;
int cfg_spt;
int cfg_hpc;
int current_cylinder;
- hdd_file_t hdd_file;
+ FILE *hdfile;
} mfm_drive_t;
typedef struct mfm_t
@@ -78,7 +71,7 @@ typedef struct mfm_t
uint16_t buffer[256];
int irqstat;
- pc_timer_t callback_timer;
+ int callback;
mfm_drive_t drives[2];
} mfm_t;
@@ -130,12 +123,12 @@ static int mfm_get_sector(mfm_t *mfm, off64_t *addr)
pclog("mfm_get_sector: past end of configured sectors\n");
return 1;
}
- if (mfm->head > drive->hdd_file.hpc)
+ if (mfm->head > drive->hpc)
{
pclog("mfm_get_sector: past end of heads\n");
return 1;
}
- if (mfm->sector >= drive->hdd_file.spt+1)
+ if (mfm->sector >= drive->spt+1)
{
pclog("mfm_get_sector: past end of sectors\n");
return 1;
@@ -163,12 +156,52 @@ static void mfm_next_sector(mfm_t *mfm)
{
mfm->head = 0;
mfm->cylinder++;
- if (drive->current_cylinder < drive->hdd_file.tracks)
+ if (drive->current_cylinder < drive->tracks)
drive->current_cylinder++;
}
}
}
+static void loadhd(mfm_t *mfm, int d, const char *fn)
+{
+ mfm_drive_t *drive = &mfm->drives[d];
+
+ if (drive->hdfile == NULL)
+ {
+ /* Try to open existing hard disk image */
+ drive->hdfile = fopen64(fn, "rb+");
+ if (drive->hdfile == NULL)
+ {
+ /* Failed to open existing hard disk image */
+ if (errno == ENOENT)
+ {
+ /* Failed because it does not exist,
+ so try to create new file */
+ drive->hdfile = fopen64(fn, "wb+");
+ if (drive->hdfile == NULL)
+ {
+ pclog("Cannot create file '%s': %s",
+ fn, strerror(errno));
+ return;
+ }
+ }
+ else
+ {
+ /* Failed for another reason */
+ pclog("Cannot open file '%s': %s",
+ fn, strerror(errno));
+ return;
+ }
+ }
+ }
+
+ drive->spt = hdc[d].spt;
+ drive->hpc = hdc[d].hpc;
+ drive->tracks = hdc[d].tracks;
+}
+
+
+
void mfm_write(uint16_t port, uint8_t val, void *p)
{
mfm_t *mfm = (mfm_t *)p;
@@ -203,14 +236,14 @@ void mfm_write(uint16_t port, uint8_t val, void *p)
case 0x1F6: /* Drive/Head */
mfm->head = val & 0xF;
mfm->drive_sel = (val & 0x10) ? 1 : 0;
- if (mfm->drives[mfm->drive_sel].hdd_file.f == NULL)
+ if (mfm->drives[mfm->drive_sel].hdfile == NULL)
mfm->status = 0;
else
mfm->status = STAT_READY | STAT_DSC;
return;
case 0x1F7: /* Command register */
- if (mfm->drives[mfm->drive_sel].hdd_file.f == NULL)
+ if (mfm->drives[mfm->drive_sel].hdfile == NULL)
fatal("Command on non-present drive\n");
mfm_irq_lower(mfm);
@@ -223,14 +256,18 @@ void mfm_write(uint16_t port, uint8_t val, void *p)
// pclog("Restore\n");
mfm->command &= ~0x0f; /*Mask off step rate*/
mfm->status = STAT_BUSY;
- timer_set_delay_u64(&mfm->callback_timer, 200*IDE_TIME);
+ timer_process();
+ mfm->callback = 200*IDE_TIME;
+ timer_update_outstanding();
break;
case CMD_SEEK:
// pclog("Seek to cylinder %i\n", mfm->cylinder);
mfm->command &= ~0x0f; /*Mask off step rate*/
mfm->status = STAT_BUSY;
- timer_set_delay_u64(&mfm->callback_timer, 200*IDE_TIME);
+ timer_process();
+ mfm->callback = 200*IDE_TIME;
+ timer_update_outstanding();
break;
default:
@@ -243,7 +280,9 @@ void mfm_write(uint16_t port, uint8_t val, void *p)
if (val & 2)
fatal("Read with ECC\n");
mfm->status = STAT_BUSY;
- timer_set_delay_u64(&mfm->callback_timer, 200*IDE_TIME);
+ timer_process();
+ mfm->callback = 200*IDE_TIME;
+ timer_update_outstanding();
break;
case CMD_WRITE: case CMD_WRITE+1:
@@ -260,7 +299,9 @@ void mfm_write(uint16_t port, uint8_t val, void *p)
// pclog("Read verify %i sectors from sector %i cylinder %i head %i\n",mfm->secount,mfm->sector,mfm->cylinder,mfm->head);
mfm->command &= ~1;
mfm->status = STAT_BUSY;
- timer_set_delay_u64(&mfm->callback_timer, 200 * IDE_TIME);
+ timer_process();
+ mfm->callback = 200 * IDE_TIME;
+ timer_update_outstanding();
break;
case CMD_FORMAT:
@@ -271,18 +312,24 @@ void mfm_write(uint16_t port, uint8_t val, void *p)
case CMD_SET_PARAMETERS: /* Initialize Drive Parameters */
mfm->status = STAT_BUSY;
- timer_set_delay_u64(&mfm->callback_timer, 30*IDE_TIME);
+ timer_process();
+ mfm->callback = 30*IDE_TIME;
+ timer_update_outstanding();
break;
case CMD_DIAGNOSE: /* Execute Drive Diagnostics */
mfm->status = STAT_BUSY;
- timer_set_delay_u64(&mfm->callback_timer, 200*IDE_TIME);
+ timer_process();
+ mfm->callback = 200*IDE_TIME;
+ timer_update_outstanding();
break;
default:
pclog("Bad MFM command %02X\n", val);
mfm->status = STAT_BUSY;
- timer_set_delay_u64(&mfm->callback_timer, 200*IDE_TIME);
+ timer_process();
+ mfm->callback = 200*IDE_TIME;
+ timer_update_outstanding();
break;
}
}
@@ -291,7 +338,9 @@ void mfm_write(uint16_t port, uint8_t val, void *p)
case 0x3F6: /* Device control */
if ((mfm->fdisk & 4) && !(val & 4))
{
- timer_set_delay_u64(&mfm->callback_timer, 500*IDE_TIME);
+ timer_process();
+ mfm->callback = 500*IDE_TIME;
+ timer_update_outstanding();
mfm->reset = 1;
mfm->status = STAT_BUSY;
// pclog("MFM Reset\n");
@@ -299,7 +348,9 @@ void mfm_write(uint16_t port, uint8_t val, void *p)
if (val & 4)
{
/*Drive held in reset*/
- timer_disable(&mfm->callback_timer);
+ timer_process();
+ mfm->callback = 0;
+ timer_update_outstanding();
mfm->status = STAT_BUSY;
}
mfm->fdisk = val;
@@ -321,7 +372,9 @@ void mfm_writew(uint16_t port, uint16_t val, void *p)
{
mfm->pos = 0;
mfm->status = STAT_BUSY;
- timer_set_delay_u64(&mfm->callback_timer, SECTOR_TIME);
+ timer_process();
+ mfm->callback = 6*IDE_TIME;
+ timer_update_outstanding();
}
}
@@ -389,8 +442,10 @@ uint16_t mfm_readw(uint16_t port, void *p)
if (mfm->secount)
{
mfm_next_sector(mfm);
- mfm->status = STAT_BUSY | STAT_READY | STAT_DSC;
- timer_set_delay_u64(&mfm->callback_timer, SECTOR_TIME);
+ mfm->status = STAT_BUSY;
+ timer_process();
+ mfm->callback = 6*IDE_TIME;
+ timer_update_outstanding();
}
}
}
@@ -403,10 +458,10 @@ static void do_seek(mfm_t *mfm)
{
mfm_drive_t *drive = &mfm->drives[mfm->drive_sel];
- if (mfm->cylinder < drive->hdd_file.tracks)
+ if (mfm->cylinder < drive->tracks)
drive->current_cylinder = mfm->cylinder;
else
- drive->current_cylinder = drive->hdd_file.tracks-1;
+ drive->current_cylinder = drive->tracks-1;
}
void mfm_callback(void *p)
@@ -414,9 +469,10 @@ void mfm_callback(void *p)
mfm_t *mfm = (mfm_t *)p;
mfm_drive_t *drive = &mfm->drives[mfm->drive_sel];
off64_t addr;
+ int c;
// pclog("mfm_callback: command=%02x reset=%i\n", mfm->command, mfm->reset);
-
+ mfm->callback = 0;
if (mfm->reset)
{
mfm->status = STAT_READY | STAT_DSC;
@@ -454,13 +510,14 @@ void mfm_callback(void *p)
}
// pclog("Read %i %i %i %08X\n",ide.cylinder,ide.head,ide.sector,addr);
- hdd_read_sectors(&drive->hdd_file, addr, 1, mfm->buffer);
+ fseeko64(drive->hdfile, addr * 512, SEEK_SET);
+ fread(mfm->buffer, 512, 1, drive->hdfile);
mfm->pos = 0;
mfm->status = STAT_DRQ | STAT_READY | STAT_DSC;
// pclog("Read sector callback %i %i %i offset %08X %i left %i %02X\n",ide.sector,ide.cylinder,ide.head,addr,ide.secount,ide.spt,ide.atastat[ide.board]);
// if (addr) output=3;
mfm_irq_raise(mfm);
- readflash_set(READFLASH_HDC, mfm->drive_sel);
+ readflash = 1;
break;
case CMD_WRITE:
@@ -472,7 +529,8 @@ void mfm_callback(void *p)
mfm_irq_raise(mfm);
break;
}
- hdd_write_sectors(&drive->hdd_file, addr, 1, mfm->buffer);
+ fseeko64(drive->hdfile, addr * 512, SEEK_SET);
+ fwrite(mfm->buffer, 512, 1, drive->hdfile);
mfm_irq_raise(mfm);
mfm->secount = (mfm->secount - 1) & 0xff;
if (mfm->secount)
@@ -483,7 +541,7 @@ void mfm_callback(void *p)
}
else
mfm->status = STAT_READY | STAT_DSC;
- readflash_set(READFLASH_HDC, mfm->drive_sel);
+ readflash = 1;
break;
case CMD_VERIFY:
@@ -492,7 +550,7 @@ void mfm_callback(void *p)
mfm->status = STAT_READY | STAT_DSC;
// pclog("Read verify callback %i %i %i offset %08X %i left\n",ide.sector,ide.cylinder,ide.head,addr,ide.secount);
mfm_irq_raise(mfm);
- readflash_set(READFLASH_HDC, mfm->drive_sel);
+ readflash=1;
break;
case CMD_FORMAT:
@@ -504,10 +562,15 @@ void mfm_callback(void *p)
mfm_irq_raise(mfm);
break;
}
- hdd_format_sectors(&drive->hdd_file, addr, mfm->secount);
+ fseeko64(drive->hdfile, addr * 512, SEEK_SET);
+ memset(mfm->buffer, 0, 512);
+ for (c = 0; c < mfm->secount; c++)
+ {
+ fwrite(mfm->buffer, 512, 1, drive->hdfile);
+ }
mfm->status = STAT_READY | STAT_DSC;
mfm_irq_raise(mfm);
- readflash_set(READFLASH_HDC, mfm->drive_sel);
+ readflash = 1;
break;
case CMD_DIAGNOSE:
@@ -538,8 +601,8 @@ void *mfm_init()
mfm_t *mfm = malloc(sizeof(mfm_t));
memset(mfm, 0, sizeof(mfm_t));
- hdd_load(&mfm->drives[0].hdd_file, 0, ide_fn[0]);
- hdd_load(&mfm->drives[1].hdd_file, 1, ide_fn[1]);
+ loadhd(mfm, 0, ide_fn[0]);
+ loadhd(mfm, 1, ide_fn[1]);
mfm->status = STAT_READY | STAT_DSC;
mfm->error = 1; /*No errors*/
@@ -548,7 +611,7 @@ void *mfm_init()
io_sethandler(0x01f1, 0x0007, mfm_read, NULL, NULL, mfm_write, NULL, NULL, mfm);
io_sethandler(0x03f6, 0x0001, NULL, NULL, NULL, mfm_write, NULL, NULL, mfm);
- timer_add(&mfm->callback_timer, mfm_callback, mfm, 0);
+ timer_add(mfm_callback, &mfm->callback, &mfm->callback, mfm);
return mfm;
}
@@ -556,9 +619,15 @@ void *mfm_init()
void mfm_close(void *p)
{
mfm_t *mfm = (mfm_t *)p;
-
- hdd_close(&mfm->drives[0].hdd_file);
- hdd_close(&mfm->drives[1].hdd_file);
+ int d;
+
+ for (d = 0; d < 2; d++)
+ {
+ mfm_drive_t *drive = &mfm->drives[d];
+
+ if (drive->hdfile != NULL)
+ fclose(drive->hdfile);
+ }
free(mfm);
}
diff --git a/src/mfm_xebec.c b/src/mfm_xebec.c
index 51cec9e..7a65a31 100644
--- a/src/mfm_xebec.c
+++ b/src/mfm_xebec.c
@@ -12,7 +12,6 @@
#include "device.h"
#include "dma.h"
-#include "hdd_file.h"
#include "io.h"
#include "mem.h"
#include "pic.h"
@@ -23,7 +22,7 @@
#define XEBEC_TIME (2000 * TIMER_USEC)
-extern char ide_fn[7][512];
+extern char ide_fn[4][512];
enum
{
@@ -40,18 +39,20 @@ enum
typedef struct mfm_drive_t
{
+ int spt, hpc;
+ int tracks;
int cfg_spt;
int cfg_hpc;
int cfg_cyl;
int current_cylinder;
- hdd_file_t hdd_file;
+ FILE *hdfile;
} mfm_drive_t;
typedef struct xebec_t
{
rom_t bios_rom;
- pc_timer_t callback_timer;
+ int callback;
int state;
@@ -143,7 +144,7 @@ static uint8_t xebec_read(uint16_t port, void *p)
// pclog("Read all data\n");
xebec->status = STAT_BSY;
xebec->state = STATE_SENT_DATA;
- timer_set_delay_u64(&xebec->callback_timer, XEBEC_TIME);
+ xebec->callback = XEBEC_TIME;
}
break;
@@ -190,7 +191,7 @@ static void xebec_write(uint16_t port, uint8_t val, void *p)
{
xebec->status = STAT_BSY;
xebec->state = STATE_START_COMMAND;
- timer_set_delay_u64(&xebec->callback_timer, XEBEC_TIME);
+ xebec->callback = XEBEC_TIME;
// pclog("Command %02x\n", xebec->command[0]);
}
break;
@@ -207,7 +208,7 @@ static void xebec_write(uint16_t port, uint8_t val, void *p)
// pclog("Got data\n");
xebec->status = STAT_BSY;
xebec->state = STATE_RECEIVED_DATA;
- timer_set_delay_u64(&xebec->callback_timer, XEBEC_TIME);
+ xebec->callback = XEBEC_TIME;
}
break;
@@ -270,7 +271,7 @@ static int xebec_get_sector(xebec_t *xebec, off64_t *addr)
xebec->error = ERR_ILLEGAL_SECTOR_ADDRESS;
return 1;
}
- if (xebec->head > drive->hdd_file.hpc)
+ if (xebec->head > drive->hpc)
{
pclog("mfm_get_sector: past end of heads\n");
xebec->error = ERR_ILLEGAL_SECTOR_ADDRESS;
@@ -314,21 +315,23 @@ static void xebec_callback(void *p)
xebec_t *xebec = (xebec_t *)p;
mfm_drive_t *drive;
+ xebec->callback = 0;
+
xebec->drive_sel = (xebec->command[1] & 0x20) ? 1 : 0;
xebec->completion_byte = xebec->drive_sel & 0x20;
drive = &xebec->drives[xebec->drive_sel];
-
+
switch (xebec->command[0])
{
case CMD_TEST_DRIVE_READY:
- if (!drive->hdd_file.f)
+ if (!drive->hdfile)
xebec_error(xebec, ERR_NOT_READY);
xebec_complete(xebec);
break;
case CMD_RECALIBRATE:
- if (!drive->hdd_file.f)
+ if (!drive->hdfile)
xebec_error(xebec, ERR_NOT_READY);
else
{
@@ -388,7 +391,7 @@ static void xebec_callback(void *p)
xebec_complete(xebec);
- readflash_set(READFLASH_HDC, xebec->drive_sel);
+ readflash = 1;
break;
default:
@@ -399,6 +402,7 @@ static void xebec_callback(void *p)
case CMD_FORMAT_TRACK:
{
off64_t addr;
+ int c;
xebec->cylinder = xebec->command[3] | ((xebec->command[2] & 0xc0) << 2);
drive->current_cylinder = (xebec->cylinder >= drive->cfg_cyl) ? drive->cfg_cyl-1 : xebec->cylinder;
@@ -413,8 +417,10 @@ static void xebec_callback(void *p)
return;
}
- hdd_format_sectors(&drive->hdd_file, addr, 17);
-
+ fseeko64(drive->hdfile, addr * 512, SEEK_SET);
+ for (c = 0; c < 17; c++)
+ fwrite(xebec->sector_buf, 512, 1, drive->hdfile);
+
xebec_complete(xebec);
}
break;
@@ -442,11 +448,12 @@ static void xebec_callback(void *p)
}
// pclog("xebec Read %i,%i,%i\n", xebec->cylinder, xebec->head, xebec->sector);
- hdd_read_sectors(&drive->hdd_file, addr, 1, xebec->sector_buf);
- readflash_set(READFLASH_HDC, xebec->drive_sel);
+ fseeko64(drive->hdfile, addr * 512, SEEK_SET);
+ fread(xebec->sector_buf, 512, 1, drive->hdfile);
+ readflash = 1;
}
if (xebec->irq_dma_mask & DMA_ENA)
- timer_set_delay_u64(&xebec->callback_timer, XEBEC_TIME);
+ xebec->callback = XEBEC_TIME;
else
{
xebec->status = STAT_BSY | STAT_IO | STAT_REQ;
@@ -466,12 +473,12 @@ static void xebec_callback(void *p)
{
pclog("CMD_READ_SECTORS out of data!\n");
xebec->status = STAT_BSY | STAT_CD | STAT_IO | STAT_REQ;
- timer_set_delay_u64(&xebec->callback_timer, XEBEC_TIME);
+ xebec->callback = XEBEC_TIME;
return;
}
}
xebec->state = STATE_SENT_DATA;
- timer_set_delay_u64(&xebec->callback_timer, XEBEC_TIME);
+ xebec->callback = XEBEC_TIME;
}
else
fatal("Read sectors no DMA! - shouldn't get here\n");
@@ -496,14 +503,15 @@ static void xebec_callback(void *p)
}
// pclog("xebec Read %i,%i,%i\n", xebec->cylinder, xebec->head, xebec->sector);
-
- hdd_read_sectors(&drive->hdd_file, addr, 1, xebec->sector_buf);
- readflash_set(READFLASH_HDC, xebec->drive_sel);
+
+ fseeko64(drive->hdfile, addr * 512, SEEK_SET);
+ fread(xebec->sector_buf, 512, 1, drive->hdfile);
+ readflash = 1;
xebec->state = STATE_SEND_DATA;
if (xebec->irq_dma_mask & DMA_ENA)
- timer_set_delay_u64(&xebec->callback_timer, XEBEC_TIME);
+ xebec->callback = XEBEC_TIME;
else
{
xebec->status = STAT_BSY | STAT_IO | STAT_REQ;
@@ -533,7 +541,7 @@ static void xebec_callback(void *p)
xebec->data_pos = 0;
xebec->data_len = 512;
if (xebec->irq_dma_mask & DMA_ENA)
- timer_set_delay_u64(&xebec->callback_timer, XEBEC_TIME);
+ xebec->callback = XEBEC_TIME;
else
xebec->status = STAT_BSY | STAT_REQ;
break;
@@ -550,7 +558,7 @@ static void xebec_callback(void *p)
{
pclog("CMD_WRITE_SECTORS out of data!\n");
xebec->status = STAT_BSY | STAT_CD | STAT_IO | STAT_REQ;
- timer_set_delay_u64(&xebec->callback_timer, XEBEC_TIME);
+ xebec->callback = XEBEC_TIME;
return;
}
@@ -558,7 +566,7 @@ static void xebec_callback(void *p)
}
xebec->state = STATE_RECEIVED_DATA;
- timer_set_delay_u64(&xebec->callback_timer, XEBEC_TIME);
+ xebec->callback = XEBEC_TIME;
}
else
fatal("Write sectors no DMA! - should never get here\n");
@@ -579,11 +587,12 @@ static void xebec_callback(void *p)
}
// pclog("xebec Write %i,%i,%i %i\n", xebec->cylinder, xebec->head, xebec->sector, xebec->drive_sel);
-
- hdd_write_sectors(&drive->hdd_file, addr, 1, xebec->sector_buf);
+
+ fseeko64(drive->hdfile, addr * 512, SEEK_SET);
+ fwrite(xebec->sector_buf, 512, 1, drive->hdfile);
}
- readflash_set(READFLASH_HDC, xebec->drive_sel);
+ readflash = 1;
xebec_next_sector(xebec);
xebec->data_pos = 0;
@@ -593,7 +602,7 @@ static void xebec_callback(void *p)
{
xebec->state = STATE_RECEIVE_DATA;
if (xebec->irq_dma_mask & DMA_ENA)
- timer_set_delay_u64(&xebec->callback_timer, XEBEC_TIME);
+ xebec->callback = XEBEC_TIME;
else
xebec->status = STAT_BSY | STAT_REQ;
}
@@ -607,7 +616,7 @@ static void xebec_callback(void *p)
break;
case CMD_SEEK:
- if (!drive->hdd_file.f)
+ if (!drive->hdfile)
xebec_error(xebec, ERR_NOT_READY);
else
{
@@ -651,7 +660,7 @@ static void xebec_callback(void *p)
xebec->data_pos = 0;
xebec->data_len = 512;
if (xebec->irq_dma_mask & DMA_ENA)
- timer_set_delay_u64(&xebec->callback_timer, XEBEC_TIME);
+ xebec->callback = XEBEC_TIME;
else
xebec->status = STAT_BSY | STAT_REQ;
break;
@@ -669,7 +678,7 @@ static void xebec_callback(void *p)
{
pclog("CMD_WRITE_SECTOR_BUFFER out of data!\n");
xebec->status = STAT_BSY | STAT_CD | STAT_IO | STAT_REQ;
- timer_set_delay_u64(&xebec->callback_timer, XEBEC_TIME);
+ xebec->callback = XEBEC_TIME;
return;
}
@@ -677,7 +686,7 @@ static void xebec_callback(void *p)
}
xebec->state = STATE_RECEIVED_DATA;
- timer_set_delay_u64(&xebec->callback_timer, XEBEC_TIME);
+ xebec->callback = XEBEC_TIME;
}
else
fatal("CMD_WRITE_SECTOR_BUFFER - should never get here!\n");
@@ -714,10 +723,10 @@ static void xebec_callback(void *p)
xebec->data_len = 4;
xebec->status = STAT_BSY | STAT_IO | STAT_REQ;
memset(xebec->data, 0, 4);
- xebec->data[0] = drive->hdd_file.tracks & 0xff;
- xebec->data[1] = 17 | ((drive->hdd_file.tracks >> 2) & 0xc0);
- xebec->data[2] = drive->hdd_file.hpc-1;
- pclog("Get drive params %02x %02x %02x %i\n", xebec->data[0], xebec->data[1], xebec->data[2], drive->hdd_file.tracks);
+ xebec->data[0] = drive->tracks & 0xff;
+ xebec->data[1] = 17 | ((drive->tracks >> 2) & 0xc0);
+ xebec->data[2] = drive->hpc-1;
+ pclog("Get drive params %02x %02x %02x %i\n", xebec->data[0], xebec->data[1], xebec->data[2], drive->tracks);
break;
case STATE_SENT_DATA:
@@ -738,9 +747,9 @@ static void xebec_callback(void *p)
xebec->data_len = 16;
xebec->status = STAT_BSY | STAT_IO | STAT_REQ;
memset(xebec->data, 0, 16);
- xebec->data[0x4] = drive->hdd_file.tracks & 0xff;
- xebec->data[0x5] = (drive->hdd_file.tracks >> 8) & 0xff;
- xebec->data[0xa] = drive->hdd_file.hpc;
+ xebec->data[0x4] = drive->tracks & 0xff;
+ xebec->data[0x5] = (drive->tracks >> 8) & 0xff;
+ xebec->data[0xa] = drive->hpc;
break;
case STATE_SENT_DATA:
@@ -774,6 +783,44 @@ static void xebec_callback(void *p)
}
}
+static void loadhd(xebec_t *xebec, int d, const char *fn)
+{
+ mfm_drive_t *drive = &xebec->drives[d];
+
+ if (drive->hdfile == NULL)
+ {
+ /* Try to open existing hard disk image */
+ drive->hdfile = fopen64(fn, "rb+");
+ if (drive->hdfile == NULL)
+ {
+ /* Failed to open existing hard disk image */
+ if (errno == ENOENT)
+ {
+ /* Failed because it does not exist,
+ so try to create new file */
+ drive->hdfile = fopen64(fn, "wb+");
+ if (drive->hdfile == NULL)
+ {
+ pclog("Cannot create file '%s': %s",
+ fn, strerror(errno));
+ return;
+ }
+ }
+ else
+ {
+ /* Failed for another reason */
+ pclog("Cannot open file '%s': %s",
+ fn, strerror(errno));
+ return;
+ }
+ }
+ }
+
+ drive->spt = hdc[d].spt;
+ drive->hpc = hdc[d].hpc;
+ drive->tracks = hdc[d].tracks;
+}
+
static struct
{
int tracks, hpc;
@@ -795,14 +842,14 @@ static void xebec_set_switches(xebec_t *xebec)
{
mfm_drive_t *drive = &xebec->drives[d];
- if (!drive->hdd_file.f)
+ if (!drive->hdfile)
continue;
for (c = 0; c < 4; c++)
{
- if (drive->hdd_file.spt == 17 &&
- drive->hdd_file.hpc == xebec_hd_types[c].hpc &&
- drive->hdd_file.tracks == xebec_hd_types[c].tracks)
+ if (drive->spt == 17 &&
+ drive->hpc == xebec_hd_types[c].hpc &&
+ drive->tracks == xebec_hd_types[c].tracks)
{
xebec->switches |= (c << (d ? 0 : 2));
break;
@@ -819,15 +866,15 @@ static void *xebec_init()
xebec_t *xebec = malloc(sizeof(xebec_t));
memset(xebec, 0, sizeof(xebec_t));
- hdd_load(&xebec->drives[0].hdd_file, 0, ide_fn[0]);
- hdd_load(&xebec->drives[1].hdd_file, 1, ide_fn[1]);
+ loadhd(xebec, 0, ide_fn[0]);
+ loadhd(xebec, 1, ide_fn[1]);
xebec_set_switches(xebec);
- rom_init(&xebec->bios_rom, "ibm_xebec_62x0822_1985.bin", 0xc8000, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL);
+ rom_init(&xebec->bios_rom, "roms/ibm_xebec_62x0822_1985.bin", 0xc8000, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL);
io_sethandler(0x0320, 0x0004, xebec_read, NULL, NULL, xebec_write, NULL, NULL, xebec);
- timer_add(&xebec->callback_timer, xebec_callback, xebec, 0);
+ timer_add(xebec_callback, &xebec->callback, &xebec->callback, xebec);
return xebec;
}
@@ -835,16 +882,22 @@ static void *xebec_init()
static void xebec_close(void *p)
{
xebec_t *xebec = (xebec_t *)p;
-
- hdd_close(&xebec->drives[0].hdd_file);
- hdd_close(&xebec->drives[1].hdd_file);
+ int d;
+ for (d = 0; d < 2; d++)
+ {
+ mfm_drive_t *drive = &xebec->drives[d];
+
+ if (drive->hdfile != NULL)
+ fclose(drive->hdfile);
+ }
+
free(xebec);
}
static int xebec_available()
{
- return rom_present("ibm_xebec_62x0822_1985.bin");
+ return rom_present("roms/ibm_xebec_62x0822_1985.bin");
}
device_t mfm_xebec_device =
@@ -865,26 +918,26 @@ static void *dtc_5150x_init()
xebec_t *xebec = malloc(sizeof(xebec_t));
memset(xebec, 0, sizeof(xebec_t));
- hdd_load(&xebec->drives[0].hdd_file, 0, ide_fn[0]);
- hdd_load(&xebec->drives[1].hdd_file, 1, ide_fn[1]);
+ loadhd(xebec, 0, ide_fn[0]);
+ loadhd(xebec, 1, ide_fn[1]);
xebec->switches = 0xff;
- xebec->drives[0].cfg_cyl = xebec->drives[0].hdd_file.tracks;
- xebec->drives[0].cfg_hpc = xebec->drives[0].hdd_file.hpc;
- xebec->drives[1].cfg_cyl = xebec->drives[1].hdd_file.tracks;
- xebec->drives[1].cfg_hpc = xebec->drives[1].hdd_file.hpc;
+ xebec->drives[0].cfg_cyl = xebec->drives[0].tracks;
+ xebec->drives[0].cfg_hpc = xebec->drives[0].hpc;
+ xebec->drives[1].cfg_cyl = xebec->drives[1].tracks;
+ xebec->drives[1].cfg_hpc = xebec->drives[1].hpc;
- rom_init(&xebec->bios_rom, "dtc_cxd21a.bin", 0xc8000, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL);
+ rom_init(&xebec->bios_rom, "roms/dtc_cxd21a.bin", 0xc8000, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL);
io_sethandler(0x0320, 0x0004, xebec_read, NULL, NULL, xebec_write, NULL, NULL, xebec);
- timer_add(&xebec->callback_timer, xebec_callback, xebec, 0);
+ timer_add(xebec_callback, &xebec->callback, &xebec->callback, xebec);
return xebec;
}
static int dtc_5150x_available()
{
- return rom_present("dtc_cxd21a.bin");
+ return rom_present("roms/dtc_cxd21a.bin");
}
device_t dtc_5150x_device =
diff --git a/src/midi_alsa.c b/src/midi_alsa.c
deleted file mode 100644
index 5b8a2cc..0000000
--- a/src/midi_alsa.c
+++ /dev/null
@@ -1,187 +0,0 @@
-#include
-#include "ibm.h"
-#include "config.h"
-#include "plat-midi.h"
-
-#define MAX_MIDI_DEVICES 128
-
-static struct
-{
- int card;
- int device;
- int sub;
- char name[50];
-} midi_devices[MAX_MIDI_DEVICES];
-
-static int midi_device_count = 0;
-
-static int midi_queried = 0;
-
-static snd_rawmidi_t *midiout = NULL;
-
-static void midi_query()
-{
- int status;
- int card = -1;
-
- midi_queried = 1;
-
- if ((status = snd_card_next(&card)) < 0)
- return;
-
- if (card < 0)
- return; /*No cards*/
-
- while (card >= 0)
- {
- char *shortname;
-
- if ((status = snd_card_get_name(card, &shortname)) >= 0)
- {
- snd_ctl_t *ctl;
- char name[32];
-
- sprintf(name, "hw:%i", card);
-
- if ((status = snd_ctl_open(&ctl, name, 0)) >= 0)
- {
- int device = -1;
-
- do
- {
- status = snd_ctl_rawmidi_next_device(ctl, &device);
- if (status >= 0 && device != -1)
- {
- snd_rawmidi_info_t *info;
- int sub_nr, sub;
-
- snd_rawmidi_info_alloca(&info);
- snd_rawmidi_info_set_device(info, device);
- snd_rawmidi_info_set_stream(info, SND_RAWMIDI_STREAM_OUTPUT);
- snd_ctl_rawmidi_info(ctl, info);
- sub_nr = snd_rawmidi_info_get_subdevices_count(info);
- pclog("sub_nr=%i\n",sub_nr);
-
- for (sub = 0; sub < sub_nr; sub++)
- {
- snd_rawmidi_info_set_subdevice(info, sub);
-
- if (snd_ctl_rawmidi_info(ctl, info) == 0)
- {
- pclog("%s: MIDI device=%i:%i:%i\n", shortname, card, device,sub);
-
- midi_devices[midi_device_count].card = card;
- midi_devices[midi_device_count].device = device;
- midi_devices[midi_device_count].sub = sub;
- snprintf(midi_devices[midi_device_count].name, 50, "%s (%i:%i:%i)", shortname, card, device, sub);
- midi_device_count++;
- if (midi_device_count >= MAX_MIDI_DEVICES)
- return;
- }
- }
- }
- } while (device >= 0);
- }
- }
-
- if (snd_card_next(&card) < 0)
- break;
- }
-}
-
-void midi_init()
-{
- char portname[32];
- int midi_id;
-
- if (!midi_queried)
- midi_query();
-
- midi_id = config_get_int(CFG_MACHINE, NULL, "midi", 0);
-
- sprintf(portname, "hw:%i,%i,%i", midi_devices[midi_id].card,
- midi_devices[midi_id].device,
- midi_devices[midi_id].sub);
- pclog("Opening MIDI port %s\n", portname);
-
- if (snd_rawmidi_open(NULL, &midiout, portname, SND_RAWMIDI_SYNC) < 0)
- {
- pclog("Failed to open MIDI\n");
- return;
- }
-}
-
-void midi_close()
-{
- if (midiout != NULL)
- {
- snd_rawmidi_close(midiout);
- midiout = NULL;
- }
-}
-
-static int midi_pos, midi_len;
-static uint8_t midi_command[4];
-static int midi_lengths[8] = {3, 3, 3, 3, 2, 2, 3, 1};
-static int midi_insysex;
-static uint8_t midi_sysex_data[65536];
-
-void midi_write(uint8_t val)
-{
- //pclog("Write MIDI %02x\n", val);
-
- if ((val & 0x80) && !(val == 0xf7 && midi_insysex))
- {
- midi_pos = 0;
- midi_len = midi_lengths[(val >> 4) & 7];
- midi_command[0] = midi_command[1] = midi_command[2] = midi_command[3] = 0;
- if (val == 0xf0)
- midi_insysex = 1;
- }
-
- if (midi_insysex)
- {
- midi_sysex_data[midi_pos++] = val;
-
- if (val == 0xf7 || midi_pos >= 65536)
- {
-/* pclog("MIDI send sysex %i: ", midi_pos);
- for (int i = 0; i < midi_pos; i++)
- pclog("%02x ", midi_sysex_data[i]);
- pclog("\n");*/
- snd_rawmidi_write(midiout, midi_sysex_data, midi_pos);
-// pclog("Sent sysex\n");
- midi_insysex = 0;
- }
- return;
- }
-
- if (midi_len)
- {
- if (midi_pos < 3)
- {
- midi_command[midi_pos] = val;
-
- midi_pos++;
-
- if (midi_pos == midi_len)
- {
-// pclog("MIDI send %i: %02x %02x %02x %02x\n", midi_len, midi_command[0], midi_command[1], midi_command[2], midi_command[3]);
- snd_rawmidi_write(midiout, midi_command, midi_len);
- }
- }
- }
-}
-
-int midi_get_num_devs()
-{
- if (!midi_queried)
- midi_query();
-
- return midi_device_count;
-}
-
-void midi_get_dev_name(int num, char *s)
-{
- strcpy(s, midi_devices[num].name);
-}
diff --git a/src/minivhd/CREDITS.md b/src/minivhd/CREDITS.md
deleted file mode 100644
index c494d4e..0000000
--- a/src/minivhd/CREDITS.md
+++ /dev/null
@@ -1,12 +0,0 @@
-# Credits
-MiniVHD Copyright (c) 2019 Sherman Perry
-
-MiniVHD was made possible with the help of the following projects
-
-### libxml2
-**Project Home:** http://www.xmlsoft.org/
-**License:** MIT (see src/libxml2_encoding.c for details)
-
-### cwalk
-**Project Home:** https://likle.github.io/cwalk/
-**Licence:** MIT (https://github.com/likle/cwalk/blob/master/LICENSE.md)
diff --git a/src/minivhd/LICENSE b/src/minivhd/LICENSE
deleted file mode 100644
index b5392e6..0000000
--- a/src/minivhd/LICENSE
+++ /dev/null
@@ -1,21 +0,0 @@
-MIT License
-
-Copyright (c) 2019-2020 Sherman Perry
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is
-furnished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in all
-copies or substantial portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
-AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
-SOFTWARE.
\ No newline at end of file
diff --git a/src/minivhd/cwalk.c b/src/minivhd/cwalk.c
deleted file mode 100644
index f0c4842..0000000
--- a/src/minivhd/cwalk.c
+++ /dev/null
@@ -1,1424 +0,0 @@
-#ifndef _FILE_OFFSET_BITS
-#define _FILE_OFFSET_BITS 64
-#endif
-#include
-#include
-#include
-#include
-#include
-#include "cwalk.h"
-/**
- * We try to default to a different path style depending on the operating
- * system. So this should detect whether we should use windows or unix paths.
- */
-#if defined(WIN32) || defined(_WIN32) || \
- defined(__WIN32) && !defined(__CYGWIN__)
-static enum cwk_path_style path_style = CWK_STYLE_WINDOWS;
-#else
-static enum cwk_path_style path_style = CWK_STYLE_UNIX;
-#endif
-
-/**
- * This is a list of separators used in different styles. Windows can read
- * multiple separators, but it generally outputs just a backslash. The output
- * will always use the first character for the output.
- */
-static const char *separators[] = {[CWK_STYLE_WINDOWS] = "\\/",
- [CWK_STYLE_UNIX] = "/"};
-
-/**
- * A joined path represents multiple path strings which are concatenated, but
- * not (necessarily) stored in contiguous memory. The joined path allows to
- * iterate over the segments as if it was one piece of path.
- */
-struct cwk_segment_joined
-{
- struct cwk_segment segment;
- const char **paths;
- size_t path_index;
-};
-
-static size_t cwk_path_output_sized(char *buffer, size_t buffer_size,
- size_t position, const char *str, size_t length)
-{
- size_t amount_written;
-
- // First we determine the amount which we can write to the buffer. There are
- // three cases. In the first case we have enough to store the whole string in
- // it. In the second one we can only store a part of it, and in the third we
- // have no space left.
- if (buffer_size > position + length) {
- amount_written = length;
- } else if (buffer_size > position) {
- amount_written = buffer_size - position;
- } else {
- amount_written = 0;
- }
-
- // If we actually want to write out something we will do that here. We will
- // always append a '\0', this way we are guaranteed to have a valid string at
- // all times.
- if (amount_written > 0) {
- memmove(&buffer[position], str, amount_written);
- }
-
- // Return the theoretical length which would have been written when everything
- // would have fit in the buffer.
- return length;
-}
-
-static size_t cwk_path_output_current(char *buffer, size_t buffer_size,
- size_t position)
-{
- // We output a "current" directory, which is a single character. This
- // character is currently not style dependant.
- return cwk_path_output_sized(buffer, buffer_size, position, ".", 1);
-}
-
-static size_t cwk_path_output_back(char *buffer, size_t buffer_size,
- size_t position)
-{
- // We output a "back" directory, which ahs two characters. This
- // character is currently not style dependant.
- return cwk_path_output_sized(buffer, buffer_size, position, "..", 2);
-}
-
-static size_t cwk_path_output_separator(char *buffer, size_t buffer_size,
- size_t position)
-{
- // We output a separator, which is a single character.
- return cwk_path_output_sized(buffer, buffer_size, position,
- separators[path_style], 1);
-}
-
-static size_t cwk_path_output_dot(char *buffer, size_t buffer_size,
- size_t position)
-{
- // We output a dot, which is a single character. This is used for extensions.
- return cwk_path_output_sized(buffer, buffer_size, position, ".", 1);
-}
-
-static size_t cwk_path_output(char *buffer, size_t buffer_size, size_t position,
- const char *str)
-{
- size_t length;
-
- // This just does a sized output internally, but first measuring the
- // null-terminated string.
- length = strlen(str);
- return cwk_path_output_sized(buffer, buffer_size, position, str, length);
-}
-
-static void cwk_path_terminate_output(char *buffer, size_t buffer_size,
- size_t pos)
-{
- if (buffer_size > 0) {
- if (pos >= buffer_size) {
- buffer[buffer_size - 1] = '\0';
- } else {
- buffer[pos] = '\0';
- }
- }
-}
-
-static bool cwk_path_is_string_equal(const char *first, const char *second,
- size_t n)
-{
- // If the path style is UNIX, we will compare case sensitively. This can be
- // done easily using strncmp.
- if (path_style == CWK_STYLE_UNIX) {
- return strncmp(first, second, n) == 0;
- }
-
- // However, if this is windows we will have to compare case insensitively.
- // Since there is no standard method to do that we will have to do it on our
- // own.
- while (*first && *second && n > 0) {
- // We can consider the string to be not equal if the two lowercase
- // characters are not equal.
- if (tolower(*first++) != tolower(*second++)) {
- return false;
- }
-
- --n;
- }
-
- // We can consider the string to be equal if we either reached n == 0 or both
- // cursors point to a null character.
- return n == 0 || (*first == '\0' && *second == '\0');
-}
-
-static const char *cwk_path_find_next_stop(const char *c)
-{
- // We just move forward until we find a '\0' or a separator, which will be our
- // next "stop".
- while (*c != '\0' && !cwk_path_is_separator(c)) {
- ++c;
- }
-
- // Return the pointer of the next stop.
- return c;
-}
-
-static const char *cwk_path_find_previous_stop(const char *begin, const char *c)
-{
- // We just move back until we find a separator or reach the beginning of the
- // path, which will be our previous "stop".
- while (c > begin && !cwk_path_is_separator(c)) {
- --c;
- }
-
- // Return the pointer to the previous stop. We have to return the first
- // character after the separator, not on the separator itself.
- if (cwk_path_is_separator(c)) {
- return c + 1;
- } else {
- return c;
- }
-}
-
-static bool cwk_path_get_first_segment_without_root(const char *path,
- const char *segments, struct cwk_segment *segment)
-{
- // Let's remember the path. We will move the path pointer afterwards, that's
- // why this has to be done first.
- segment->path = path;
- segment->segments = segments;
-
- // Now let's check whether this is an empty string. An empty string has no
- // segment it could use.
- if (*segments == '\0') {
- return false;
- }
-
- // If the string starts with separators, we will jump over those. If there is
- // only a slash and a '\0' after it, we can't determine the first segment
- // since there is none.
- while (cwk_path_is_separator(segments)) {
- ++segments;
- if (*segments == '\0') {
- return false;
- }
- }
-
- // So this is the beginning of our segment.
- segment->begin = segments;
-
- // Now let's determine the end of the segment, which we do by moving the path
- // pointer further until we find a separator.
- segments = cwk_path_find_next_stop(segments);
-
- // And finally, calculate the size of the segment by subtracting the position
- // from the end.
- segment->size = segments - segment->begin;
- segment->end = segments;
-
- // Tell the caller that we found a segment.
- return true;
-}
-
-static bool cwk_path_get_last_segment_without_root(const char *path,
- struct cwk_segment *segment)
-{
- // Now this is fairly similar to the normal algorithm, however, it will assume
- // that there is no root in the path. So we grab the first segment at this
- // position, assuming there is no root.
- if (!cwk_path_get_first_segment_without_root(path, path, segment)) {
- return false;
- }
-
- // Now we find our last segment. The segment struct of the caller
- // will contain the last segment, since the function we call here will not
- // change the segment struct when it reaches the end.
- while (cwk_path_get_next_segment(segment)) {
- // We just loop until there is no other segment left.
- }
-
- return true;
-}
-
-static bool cwk_path_get_first_segment_joined(const char **paths,
- struct cwk_segment_joined *sj)
-{
- bool result;
-
- // Prepare the first segment. We position the joined segment on the first path
- // and assign the path array to the struct.
- sj->path_index = 0;
- sj->paths = paths;
-
- // We loop through all paths until we find one which has a segment. The result
- // is stored in a variable, so we can let the caller know whether we found one
- // or not.
- result = false;
- while (paths[sj->path_index] != NULL &&
- (result = cwk_path_get_first_segment(paths[sj->path_index],
- &sj->segment)) == false) {
- ++sj->path_index;
- }
-
- return result;
-}
-
-static bool cwk_path_get_next_segment_joined(struct cwk_segment_joined *sj)
-{
- bool result;
-
- if (sj->paths[sj->path_index] == NULL) {
- // We reached already the end of all paths, so there is no other segment
- // left.
- return false;
- } else if (cwk_path_get_next_segment(&sj->segment)) {
- // There was another segment on the current path, so we are good to
- // continue.
- return true;
- }
-
- // We try to move to the next path which has a segment available. We must at
- // least move one further since the current path reached the end.
- result = false;
-
- do {
- ++sj->path_index;
-
- // And we obviously have to stop this loop if there are no more paths left.
- if (sj->paths[sj->path_index] == NULL) {
- break;
- }
-
- // Grab the first segment of the next path and determine whether this path
- // has anything useful in it. There is one more thing we have to consider
- // here - for the first time we do this we want to skip the root, but
- // afterwards we will consider that to be part of the segments.
- result = cwk_path_get_first_segment_without_root(sj->paths[sj->path_index],
- sj->paths[sj->path_index], &sj->segment);
-
- } while (!result);
-
- // Finally, report the result back to the caller.
- return result;
-}
-
-static bool cwk_path_get_previous_segment_joined(struct cwk_segment_joined *sj)
-{
- bool result;
-
- if (*sj->paths == NULL) {
- // It's possible that there is no initialized segment available in the
- // struct since there are no paths. In that case we can return false, since
- // there is no previous segment.
- return false;
- } else if (cwk_path_get_previous_segment(&sj->segment)) {
- // Now we try to get the previous segment from the current path. If we can
- // do that successfully, we can let the caller know that we found one.
- return true;
- }
-
- result = false;
-
- do {
- // We are done once we reached index 0. In that case there are no more
- // segments left.
- if (sj->path_index == 0) {
- break;
- }
-
- // There is another path which we have to inspect. So we decrease the path
- // index.
- --sj->path_index;
-
- // If this is the first path we will have to consider that this path might
- // include a root, otherwise we just treat is as a segment.
- if (sj->path_index == 0) {
- result = cwk_path_get_last_segment(sj->paths[sj->path_index],
- &sj->segment);
- } else {
- result = cwk_path_get_last_segment_without_root(sj->paths[sj->path_index],
- &sj->segment);
- }
-
- } while (!result);
-
- return result;
-}
-
-static bool cwk_path_segment_back_will_be_removed(struct cwk_segment_joined *sj)
-{
- enum cwk_segment_type type;
- int counter;
-
- // We are handling back segments here. We must verify how many back segments
- // and how many normal segments come before this one to decide whether we keep
- // or remove it.
-
- // The counter determines how many normal segments are our current segment,
- // which will popped off before us. If the counter goes above zero it means
- // that our segment will be popped as well.
- counter = 0;
-
- // We loop over all previous segments until we either reach the beginning,
- // which means our segment will not be dropped or the counter goes above zero.
- while (cwk_path_get_previous_segment_joined(sj)) {
-
- // Now grab the type. The type determines whether we will increase or
- // decrease the counter. We don't handle a CWK_CURRENT frame here since it
- // has no influence.
- type = cwk_path_get_segment_type(&sj->segment);
- if (type == CWK_NORMAL) {
- // This is a normal segment. The normal segment will increase the counter
- // since it neutralizes one back segment. If we go above zero we can
- // return immediately.
- ++counter;
- if (counter > 0) {
- return true;
- }
- } else if (type == CWK_BACK) {
- // A CWK_BACK segment will reduce the counter by one. We can not remove a
- // back segment as long we are not above zero since we don't have the
- // opposite normal segment which we would remove.
- --counter;
- }
- }
-
- // We never got a count larger than zero, so we will keep this segment alive.
- return false;
-}
-
-static bool cwk_path_segment_normal_will_be_removed(
- struct cwk_segment_joined *sj)
-{
- enum cwk_segment_type type;
- int counter;
-
- // The counter determines how many segments are above our current segment,
- // which will popped off before us. If the counter goes below zero it means
- // that our segment will be popped as well.
- counter = 0;
-
- // We loop over all following segments until we either reach the end, which
- // means our segment will not be dropped or the counter goes below zero.
- while (cwk_path_get_next_segment_joined(sj)) {
-
- // First, grab the type. The type determines whether we will increase or
- // decrease the counter. We don't handle a CWK_CURRENT frame here since it
- // has no influence.
- type = cwk_path_get_segment_type(&sj->segment);
- if (type == CWK_NORMAL) {
- // This is a normal segment. The normal segment will increase the counter
- // since it will be removed by a "../" before us.
- ++counter;
- } else if (type == CWK_BACK) {
- // A CWK_BACK segment will reduce the counter by one. If we are below zero
- // we can return immediately.
- --counter;
- if (counter < 0) {
- return true;
- }
- }
- }
-
- // We never got a negative count, so we will keep this segment alive.
- return false;
-}
-
-static bool
-cwk_path_segment_will_be_removed(const struct cwk_segment_joined *sj,
- bool absolute)
-{
- enum cwk_segment_type type;
- struct cwk_segment_joined sjc;
-
- // We copy the joined path so we don't need to modify it.
- sjc = *sj;
-
- // First we check whether this is a CWK_CURRENT or CWK_BACK segment, since
- // those will always be dropped.
- type = cwk_path_get_segment_type(&sj->segment);
- if (type == CWK_CURRENT) {
- return true;
- } else if (type == CWK_BACK && absolute) {
- return true;
- } else if (type == CWK_BACK) {
- return cwk_path_segment_back_will_be_removed(&sjc);
- } else {
- return cwk_path_segment_normal_will_be_removed(&sjc);
- }
-}
-
-static bool
-cwk_path_segment_joined_skip_invisible(struct cwk_segment_joined *sj,
- bool absolute)
-{
- while (cwk_path_segment_will_be_removed(sj, absolute)) {
- if (!cwk_path_get_next_segment_joined(sj)) {
- return false;
- }
- }
-
- return true;
-}
-
-static void cwk_path_get_root_windows(const char *path, size_t *length)
-{
- const char *c;
- bool is_device_path;
-
- // A device path is a path which starts with "\\." or "\\?". A device path can
- // be a UNC path as well, in which case it will take up one more segment.
- is_device_path = false;
-
- // We can not determine the root if this is an empty string. So we set the
- // root to NULL and the length to zero and cancel the whole thing.
- c = path;
- *length = 0;
- if (!*c) {
- return;
- }
-
- // Now we have to verify whether this is a windows network path (UNC), which
- // we will consider our root.
- if (cwk_path_is_separator(c)) {
- ++c;
-
- // Check whether the path starts with a single back slash, which means this
- // is not a network path - just a normal path starting with a backslash.
- if (!cwk_path_is_separator(c)) {
- // Okay, this is not a network path but we still use the backslash as a
- // root.
- ++(*length);
- return;
- }
-
- // Yes, this is a network or device path. Skip the previous separator. Now
- // we need to determine whether this is a device path. We might advance one
- // character here if the server name starts with a '?' or a '.', but that's
- // fine since we will search for a separator afterwards anyway.
- ++c;
- is_device_path = (*c == '?' || *c == '.') && cwk_path_is_separator(++c);
- if (is_device_path) {
- // That's a device path, and the root must be either "\\.\" or "\\?\"
- // which is 4 characters long. (at least that's how Windows
- // GetFullPathName behaves.)
- *length = 4;
- return;
- }
-
- // We will grab anything up to the next stop. The next top might be a '\0'
- // or another separator. That will be the server name.
- c = cwk_path_find_next_stop(c);
-
- // If this is a separator and not the end of a string we wil have to include
- // it. However, if this is a '\0' we must not skip it.
- while (cwk_path_is_separator(c)) {
- ++c;
- }
-
- // We are now skipping the shared folder name, which will end after the
- // next stop.
- c = cwk_path_find_next_stop(c);
-
- // Then there might be a separator at the end. We will include that as well,
- // it will mark the path as absolute.
- if (cwk_path_is_separator(c)) {
- ++c;
- }
-
- // Finally, calculate the size of the root.
- *length = c - path;
- return;
- }
-
- // Move to the next and check whether this is a colon.
- if (*++c == ':') {
- *length = 2;
-
- // Now check whether this is a backslash (or slash). If it is not, we could
- // assume that the next character is a '\0' if it is a valid path. However,
- // we will not assume that - since ':' is not valid in a path it must be a
- // mistake by the caller than. We will try to understand it anyway.
- if (cwk_path_is_separator(++c)) {
- *length = 3;
- }
- }
-}
-
-static void cwk_path_get_root_unix(const char *path, size_t *length)
-{
- // The slash of the unix path represents the root. There is no root if there
- // is no slash.
- if (cwk_path_is_separator(path)) {
- *length = 1;
- } else {
- *length = 0;
- }
-}
-
-static bool cwk_path_is_root_absolute(const char *path, size_t length)
-{
- // This is definitely not absolute if there is no root.
- if (length == 0) {
- return false;
- }
-
- // If there is a separator at the end of the root, we can safely consider this
- // to be an absolute path.
- return cwk_path_is_separator(&path[length - 1]);
-}
-
-static size_t cwk_path_join_and_normalize_multiple(const char **paths,
- char *buffer, size_t buffer_size)
-{
- size_t pos;
- bool absolute, has_segment_output;
- struct cwk_segment_joined sj;
-
- // We initialize the position after the root, which should get us started.
- cwk_path_get_root(paths[0], &pos);
-
- // Determine whether the path is absolute or not. We need that to determine
- // later on whether we can remove superfluous "../" or not.
- absolute = cwk_path_is_root_absolute(paths[0], pos);
-
- // First copy the root to the output. We will not modify the root.
- cwk_path_output_sized(buffer, buffer_size, 0, paths[0], pos);
-
- // So we just grab the first segment. If there is no segment we will always
- // output a "/", since we currently only support absolute paths here.
- if (!cwk_path_get_first_segment_joined(paths, &sj)) {
- goto done;
- }
-
- // Let's assume that we don't have any segment output for now. We will toggle
- // this flag once there is some output.
- has_segment_output = false;
-
- do {
- // Check whether we have to drop this segment because of resolving a
- // relative path or because it is a CWK_CURRENT segment.
- if (cwk_path_segment_will_be_removed(&sj, absolute)) {
- continue;
- }
-
- // Remember that we have segment output, so we can handle the trailing slash
- // later on. This is necessary since we might have segments but they are all
- // removed.
- has_segment_output = true;
-
- // Write out the segment but keep in mind that we need to follow the
- // buffer size limitations. That's why we use the path output functions
- // here.
- pos += cwk_path_output_sized(buffer, buffer_size, pos, sj.segment.begin,
- sj.segment.size);
- pos += cwk_path_output_separator(buffer, buffer_size, pos);
- } while (cwk_path_get_next_segment_joined(&sj));
-
- // Remove the trailing slash, but only if we have segment output. We don't
- // want to remove anything from the root.
- if (has_segment_output) {
- --pos;
- } else if (pos == 0) {
- // This may happen if the path is absolute and all segments have been
- // removed. We can not have an empty output - and empty output means we stay
- // in the current directory. So we will output a ".".
- assert(absolute == false);
- pos += cwk_path_output_current(buffer, buffer_size, pos);
- }
-
- // We must append a '\0' in any case, unless the buffer size is zero. If the
- // buffer size is zero, which means we can not.
-done:
- cwk_path_terminate_output(buffer, buffer_size, pos);
-
- // And finally let our caller know about the total size of the normalized
- // path.
- return pos;
-}
-
-size_t cwk_path_get_absolute(const char *base, const char *path, char *buffer,
- size_t buffer_size)
-{
- size_t i;
- const char *paths[4];
-
- // The basename should be an absolute path if the caller is using the API
- // correctly. However, he might not and in that case we will append a fake
- // root at the beginning.
- if (cwk_path_is_absolute(base)) {
- i = 0;
- } else {
- paths[0] = "/";
- i = 1;
- }
-
- if (cwk_path_is_absolute(path)) {
- // If the submitted path is not relative the base path becomes irrelevant.
- // We will only normalize the submitted path instead.
- paths[i++] = path;
- paths[i] = NULL;
- } else {
- // Otherwise we append the relative path to the base path and normalize it.
- // The result will be a new absolute path.
- paths[i++] = base;
- paths[i++] = path;
- paths[i] = NULL;
- }
-
- // Finally join everything together and normalize it.
- return cwk_path_join_and_normalize_multiple(paths, buffer, buffer_size);
-}
-
-static void cwk_path_skip_segments_until_diverge(struct cwk_segment_joined *bsj,
- struct cwk_segment_joined *osj, bool absolute, bool *base_available,
- bool *other_available)
-{
- // Now looping over all segments until they start to diverge. A path may
- // diverge if two segments are not equal or if one path reaches the end.
- do {
-
- // Check whether there is anything available after we skip everything which
- // is invisible. We do that for both paths, since we want to let the caller
- // know which path has some trailing segments after they diverge.
- *base_available = cwk_path_segment_joined_skip_invisible(bsj, absolute);
- *other_available = cwk_path_segment_joined_skip_invisible(osj, absolute);
-
- // We are done if one or both of those paths reached the end. They either
- // diverge or both reached the end - but in both cases we can not continue
- // here.
- if (!*base_available || !*other_available) {
- break;
- }
-
- // Compare the content of both segments. We are done if they are not equal,
- // since they diverge.
- if (!cwk_path_is_string_equal(bsj->segment.begin, osj->segment.begin,
- bsj->segment.size)) {
- break;
- }
-
- // We keep going until one of those segments reached the end. The next
- // segment might be invisible, but we will check for that in the beginning
- // of the loop once again.
- *base_available = cwk_path_get_next_segment_joined(bsj);
- *other_available = cwk_path_get_next_segment_joined(osj);
- } while (*base_available && *other_available);
-}
-
-size_t cwk_path_get_relative(const char *base_directory, const char *path,
- char *buffer, size_t buffer_size)
-{
- size_t pos, base_root_length, path_root_length;
- bool absolute, base_available, other_available, has_output;
- const char *base_paths[2], *other_paths[2];
- struct cwk_segment_joined bsj, osj;
-
- pos = 0;
-
- // First we compare the roots of those two paths. If the roots are not equal
- // we can't continue, since there is no way to get a relative path from
- // different roots.
- cwk_path_get_root(base_directory, &base_root_length);
- cwk_path_get_root(path, &path_root_length);
- if (!cwk_path_is_string_equal(base_directory, path, base_root_length)) {
- return pos;
- }
-
- // Verify whether this is an absolute path. We need to know that since we can
- // remove all back-segments if it is.
- absolute = cwk_path_is_root_absolute(base_directory, base_root_length);
-
- // Initialize our joined segments. This will allow us to use the internal
- // functions to skip until diverge and invisible. We only have one path in
- // them though.
- base_paths[0] = base_directory;
- base_paths[1] = NULL;
- other_paths[0] = path;
- other_paths[1] = NULL;
- cwk_path_get_first_segment_joined(base_paths, &bsj);
- cwk_path_get_first_segment_joined(other_paths, &osj);
-
- // Okay, now we skip until the segments diverge. We don't have anything to do
- // with the segments which are equal.
- cwk_path_skip_segments_until_diverge(&bsj, &osj, absolute, &base_available,
- &other_available);
-
- // Assume there is no output until we have got some. We will need this
- // information later on to remove trailing slashes or alternatively output a
- // current-segment.
- has_output = false;
-
- // So if we still have some segments left in the base path we will now output
- // a back segment for all of them.
- if (base_available) {
- do {
- // Skip any invisible segment. We don't care about those and we don't need
- // to navigate back because of them.
- if (!cwk_path_segment_joined_skip_invisible(&bsj, absolute)) {
- break;
- }
-
- // Toggle the flag if we have output. We need to remember that, since we
- // want to remove the trailing slash.
- has_output = true;
-
- // Output the back segment and a separator. No need to worry about the
- // superfluous segment since it will be removed later on.
- pos += cwk_path_output_back(buffer, buffer_size, pos);
- pos += cwk_path_output_separator(buffer, buffer_size, pos);
- } while (cwk_path_get_next_segment_joined(&bsj));
- }
-
- // And if we have some segments available of the target path we will output
- // all of those.
- if (other_available) {
- do {
- // Again, skip any invisible segments since we don't need to navigate into
- // them.
- if (!cwk_path_segment_joined_skip_invisible(&osj, absolute)) {
- break;
- }
-
- // Toggle the flag if we have output. We need to remember that, since we
- // want to remove the trailing slash.
- has_output = true;
-
- // Output the current segment and a separator. No need to worry about the
- // superfluous segment since it will be removed later on.
- pos += cwk_path_output_sized(buffer, buffer_size, pos, osj.segment.begin,
- osj.segment.size);
- pos += cwk_path_output_separator(buffer, buffer_size, pos);
- } while (cwk_path_get_next_segment_joined(&osj));
- }
-
- // If we have some output by now we will have to remove the trailing slash. We
- // simply do that by moving back one character. The terminate output function
- // will then place the '\0' on this position. Otherwise, if there is no
- // output, we will have to output a "current directory", since the target path
- // points to the base path.
- if (has_output) {
- --pos;
- } else {
- pos += cwk_path_output_current(buffer, buffer_size, pos);
- }
-
- // Finally, we can terminate the output - which means we place a '\0' at the
- // current position or at the end of the buffer.
- cwk_path_terminate_output(buffer, buffer_size, pos);
-
- return pos;
-}
-
-size_t cwk_path_join(const char *path_a, const char *path_b, char *buffer,
- size_t buffer_size)
-{
- const char *paths[3];
-
- // This is simple. We will just create an array with the two paths which we
- // wish to join.
- paths[0] = path_a;
- paths[1] = path_b;
- paths[2] = NULL;
-
- // And then call the join and normalize function which will do the hard work
- // for us.
- return cwk_path_join_and_normalize_multiple(paths, buffer, buffer_size);
-}
-
-size_t cwk_path_join_multiple(const char **paths, char *buffer,
- size_t buffer_size)
-{
- // We can just call the internal join and normalize function for this one,
- // since it will handle everything.
- return cwk_path_join_and_normalize_multiple(paths, buffer, buffer_size);
-}
-
-void cwk_path_get_root(const char *path, size_t *length)
-{
- // We use a different implementation here based on the configuration of the
- // library.
- if (path_style == CWK_STYLE_WINDOWS) {
- cwk_path_get_root_windows(path, length);
- } else {
- cwk_path_get_root_unix(path, length);
- }
-}
-
-size_t cwk_path_change_root(const char *path, const char *new_root,
- char *buffer, size_t buffer_size)
-{
- const char *tail;
- size_t root_length, path_length, tail_length, new_root_length, new_path_size;
-
- // First we need to determine the actual size of the root which we will
- // change.
- cwk_path_get_root(path, &root_length);
-
- // Now we determine the sizes of the new root and the path. We need that to
- // determine the size of the part after the root (the tail).
- new_root_length = strlen(new_root);
- path_length = strlen(path);
-
- // Okay, now we calculate the position of the tail and the length of it.
- tail = path + root_length;
- tail_length = path_length - root_length;
-
- // We first output the tail and then the new root, that's because the source
- // path and the buffer may be overlapping. This way the root will not
- // overwrite the tail.
- cwk_path_output_sized(buffer, buffer_size, new_root_length, tail,
- tail_length);
- cwk_path_output_sized(buffer, buffer_size, 0, new_root, new_root_length);
-
- // Finally we calculate the size o the new path and terminate the output with
- // a '\0'.
- new_path_size = tail_length + new_root_length;
- cwk_path_terminate_output(buffer, buffer_size, new_path_size);
-
- return new_path_size;
-}
-
-bool cwk_path_is_absolute(const char *path)
-{
- size_t length;
-
- // We grab the root of the path. This root does not include the first
- // separator of a path.
- cwk_path_get_root(path, &length);
-
- // Now we can determine whether the root is absolute or not.
- return cwk_path_is_root_absolute(path, length);
-}
-
-bool cwk_path_is_relative(const char *path)
-{
- // The path is relative if it is not absolute.
- return !cwk_path_is_absolute(path);
-}
-
-void cwk_path_get_basename(const char *path, const char **basename,
- size_t *length)
-{
- struct cwk_segment segment;
-
- // We get the last segment of the path. The last segment will contain the
- // basename if there is any. If there are no segments we will set the basename
- // to NULL and the length to 0.
- if (!cwk_path_get_last_segment(path, &segment)) {
- *basename = NULL;
- *length = 0;
- return;
- }
-
- // Now we can just output the segment contents, since that's our basename.
- // There might be trailing separators after the basename, but the size does
- // not include those.
- *basename = segment.begin;
- *length = segment.size;
-}
-
-size_t cwk_path_change_basename(const char *path, const char *new_basename,
- char *buffer, size_t buffer_size)
-{
- struct cwk_segment segment;
- size_t pos, root_size, new_basename_size;
-
- // First we try to get the last segment. We may only have a root without any
- // segments, in which case we will create one.
- if (!cwk_path_get_last_segment(path, &segment)) {
-
- // So there is no segment in this path. First we grab the root and output
- // that. We are not going to modify the root in any way.
- cwk_path_get_root(path, &root_size);
- pos = cwk_path_output_sized(buffer, buffer_size, 0, path, root_size);
-
- // We have to trim the separators from the beginning of the new basename.
- // This is quite easy to do.
- while (cwk_path_is_separator(new_basename)) {
- ++new_basename;
- }
-
- // Now we measure the length of the new basename, this is a two step
- // process. First we find the '\0' character at the end of the string.
- new_basename_size = 0;
- while (new_basename[new_basename_size]) {
- ++new_basename_size;
- }
-
- // And then we trim the separators at the end of the basename until we reach
- // the first valid character.
- while (new_basename_size > 0 &&
- cwk_path_is_separator(&new_basename[new_basename_size - 1])) {
- --new_basename_size;
- }
-
- // Now we will output the new basename after the root.
- pos += cwk_path_output_sized(buffer, buffer_size, pos, new_basename,
- new_basename_size);
-
- // And finally terminate the output and return the total size of the path.
- cwk_path_terminate_output(buffer, buffer_size, pos);
- return pos;
- }
-
- // If there is a last segment we can just forward this call, which is fairly
- // easy.
- return cwk_path_change_segment(&segment, new_basename, buffer, buffer_size);
-}
-
-void cwk_path_get_dirname(const char *path, size_t *length)
-{
- struct cwk_segment segment;
-
- // We get the last segment of the path. The last segment will contain the
- // basename if there is any. If there are no segments we will set the length
- // to 0.
- if (!cwk_path_get_last_segment(path, &segment)) {
- *length = 0;
- return;
- }
-
- // We can now return the length from the beginning of the string up to the
- // beginning of the last segment.
- *length = segment.begin - path;
-}
-
-bool cwk_path_get_extension(const char *path, const char **extension,
- size_t *length)
-{
- struct cwk_segment segment;
- const char *c;
-
- // We get the last segment of the path. The last segment will contain the
- // extension if there is any.
- if (!cwk_path_get_last_segment(path, &segment)) {
- return false;
- }
-
- // Now we search for a dot within the segment. If there is a dot, we consider
- // the rest of the segment the extension. We do this from the end towards the
- // beginning, since we want to find the last dot.
- for (c = segment.end; c >= segment.begin; --c) {
- if (*c == '.') {
- // Okay, we found an extension. We can stop looking now.
- *extension = c;
- *length = segment.end - c;
- return true;
- }
- }
-
- // We couldn't find any extension.
- return false;
-}
-
-bool cwk_path_has_extension(const char *path)
-{
- const char *extension;
- size_t length;
-
- // We just wrap the get_extension call which will then do the work for us.
- return cwk_path_get_extension(path, &extension, &length);
-}
-
-size_t cwk_path_change_extension(const char *path, const char *new_extension,
- char *buffer, size_t buffer_size)
-{
- struct cwk_segment segment;
- const char *c, *old_extension;
- size_t pos, root_size, trail_size, new_extension_size;
-
- // First we try to get the last segment. We may only have a root without any
- // segments, in which case we will create one.
- if (!cwk_path_get_last_segment(path, &segment)) {
-
- // So there is no segment in this path. First we grab the root and output
- // that. We are not going to modify the root in any way. If there is no
- // root, this will end up with a root size 0, and nothing will be written.
- cwk_path_get_root(path, &root_size);
- pos = cwk_path_output_sized(buffer, buffer_size, 0, path, root_size);
-
- // Add a dot if the submitted value doesn't have any.
- if (*new_extension != '.') {
- pos += cwk_path_output_dot(buffer, buffer_size, pos);
- }
-
- // And finally terminate the output and return the total size of the path.
- pos += cwk_path_output(buffer, buffer_size, pos, new_extension);
- cwk_path_terminate_output(buffer, buffer_size, pos);
- return pos;
- }
-
- // Now we seek the old extension in the last segment, which we will replace
- // with the new one. If there is no old extension, it will point to the end of
- // the segment.
- old_extension = segment.end;
- for (c = segment.begin; c < segment.end; ++c) {
- if (*c == '.') {
- old_extension = c;
- }
- }
-
- pos = cwk_path_output_sized(buffer, buffer_size, 0, segment.path,
- old_extension - segment.path);
-
- // If the new extension starts with a dot, we will skip that dot. We always
- // output exactly one dot before the extension. If the extension contains
- // multiple dots, we will output those as part of the extension.
- if (*new_extension == '.') {
- ++new_extension;
- }
-
- // We calculate the size of the new extension, including the dot, in order to
- // output the trail - which is any part of the path coming after the
- // extension. We must output this first, since the buffer may overlap with the
- // submitted path - and it would be overridden by longer extensions.
- new_extension_size = strlen(new_extension) + 1;
- trail_size = cwk_path_output(buffer, buffer_size, pos + new_extension_size,
- segment.end);
-
- // Finally we output the dot and the new extension. The new extension itself
- // doesn't contain the dot anymore, so we must output that first.
- pos += cwk_path_output_dot(buffer, buffer_size, pos);
- pos += cwk_path_output(buffer, buffer_size, pos, new_extension);
-
- // Now we terminate the output with a null-terminating character, but before
- // we do that we must add the size of the trail to the position which we
- // output before.
- pos += trail_size;
- cwk_path_terminate_output(buffer, buffer_size, pos);
-
- // And the position is our output size now.
- return pos;
-}
-
-size_t cwk_path_normalize(const char *path, char *buffer, size_t buffer_size)
-{
- const char *paths[2];
-
- // Now we initialize the paths which we will normalize. Since this function
- // only supports submitting a single path, we will only add that one.
- paths[0] = path;
- paths[1] = NULL;
-
- return cwk_path_join_and_normalize_multiple(paths, buffer, buffer_size);
-}
-
-size_t cwk_path_get_intersection(const char *path_base, const char *path_other)
-{
- bool absolute;
- size_t base_root_length, other_root_length;
- const char *end;
- const char *paths_base[2], *paths_other[2];
- struct cwk_segment_joined base, other;
-
- // We first compare the two roots. We just return zero if they are not equal.
- // This will also happen to return zero if the paths are mixed relative and
- // absolute.
- cwk_path_get_root(path_base, &base_root_length);
- cwk_path_get_root(path_other, &other_root_length);
- if (!cwk_path_is_string_equal(path_base, path_other, base_root_length)) {
- return 0;
- }
-
- // Configure our paths. We just have a single path in here for now.
- paths_base[0] = path_base;
- paths_base[1] = NULL;
- paths_other[0] = path_other;
- paths_other[1] = NULL;
-
- // So we get the first segment of both paths. If one of those paths don't have
- // any segment, we will return 0.
- if (!cwk_path_get_first_segment_joined(paths_base, &base) ||
- !cwk_path_get_first_segment_joined(paths_other, &other)) {
- return base_root_length;
- }
-
- // We now determine whether the path is absolute or not. This is required
- // because if will ignore removed segments, and this behaves differently if
- // the path is absolute. However, we only need to check the base path because
- // we are guaranteed that both paths are either relative or absolute.
- absolute = cwk_path_is_root_absolute(path_base, base_root_length);
-
- // We must keep track of the end of the previous segment. Initially, this is
- // set to the beginning of the path. This means that 0 is returned if the
- // first segment is not equal.
- end = path_base + base_root_length;
-
- // Now we loop over both segments until one of them reaches the end or their
- // contents are not equal.
- do {
- // We skip all segments which will be removed in each path, since we want to
- // know about the true path.
- if (!cwk_path_segment_joined_skip_invisible(&base, absolute) ||
- !cwk_path_segment_joined_skip_invisible(&other, absolute)) {
- break;
- }
-
- if (!cwk_path_is_string_equal(base.segment.begin, other.segment.begin,
- base.segment.size)) {
- // So the content of those two segments are not equal. We will return the
- // size up to the beginning.
- return end - path_base;
- }
-
- // Remember the end of the previous segment before we go to the next one.
- end = base.segment.end;
- } while (cwk_path_get_next_segment_joined(&base) &&
- cwk_path_get_next_segment_joined(&other));
-
- // Now we calculate the length up to the last point where our paths pointed to
- // the same place.
- return end - path_base;
-}
-
-bool cwk_path_get_first_segment(const char *path, struct cwk_segment *segment)
-{
- size_t length;
- const char *segments;
-
- // We skip the root since that's not part of the first segment. The root is
- // treated as a separate entity.
- cwk_path_get_root(path, &length);
- segments = path + length;
-
- // Now, after we skipped the root we can continue and find the actual segment
- // content.
- return cwk_path_get_first_segment_without_root(path, segments, segment);
-}
-
-bool cwk_path_get_last_segment(const char *path, struct cwk_segment *segment)
-{
- // We first grab the first segment. This might be our last segment as well,
- // but we don't know yet. There is no last segment if there is no first
- // segment, so we return false in that case.
- if (!cwk_path_get_first_segment(path, segment)) {
- return false;
- }
-
- // Now we find our last segment. The segment struct of the caller
- // will contain the last segment, since the function we call here will not
- // change the segment struct when it reaches the end.
- while (cwk_path_get_next_segment(segment)) {
- // We just loop until there is no other segment left.
- }
-
- return true;
-}
-
-bool cwk_path_get_next_segment(struct cwk_segment *segment)
-{
- const char *c;
-
- // First we jump to the end of the previous segment. The first character must
- // be either a '\0' or a separator.
- c = segment->begin + segment->size;
- if (*c == '\0') {
- return false;
- }
-
- // Now we skip all separator until we reach something else. We are not yet
- // guaranteed to have a segment, since the string could just end afterwards.
- assert(cwk_path_is_separator(c));
- do {
- ++c;
- } while (cwk_path_is_separator(c));
-
- // If the string ends here, we can safely assume that there is no other
- // segment after this one.
- if (*c == '\0') {
- return false;
- }
-
- // Now we are safe to assume there is a segment. We store the beginning of
- // this segment in the segment struct of the caller.
- segment->begin = c;
-
- // And now determine the size of this segment, and store it in the struct of
- // the caller as well.
- c = cwk_path_find_next_stop(c);
- segment->end = c;
- segment->size = c - segment->begin;
-
- // Tell the caller that we found a segment.
- return true;
-}
-
-bool cwk_path_get_previous_segment(struct cwk_segment *segment)
-{
- const char *c;
-
- // The current position might point to the first character of the path, which
- // means there are no previous segments available.
- c = segment->begin;
- if (c <= segment->segments) {
- return false;
- }
-
- // We move towards the beginning of the path until we either reached the
- // beginning or the character is no separator anymore.
- do {
- --c;
- if (c <= segment->segments) {
- // So we reached the beginning here and there is no segment. So we return
- // false and don't change the segment structure submitted by the caller.
- return false;
- }
- } while (cwk_path_is_separator(c));
-
- // We are guaranteed now that there is another segment, since we moved before
- // the previous separator and did not reach the segment path beginning.
- segment->end = c + 1;
- segment->begin = cwk_path_find_previous_stop(segment->segments, c);
- segment->size = segment->end - segment->begin;
-
- return true;
-}
-
-enum cwk_segment_type cwk_path_get_segment_type(
- const struct cwk_segment *segment)
-{
- // We just make a string comparison with the segment contents and return the
- // appropriate type.
- if (strncmp(segment->begin, ".", segment->size) == 0) {
- return CWK_CURRENT;
- } else if (strncmp(segment->begin, "..", segment->size) == 0) {
- return CWK_BACK;
- }
-
- return CWK_NORMAL;
-}
-
-bool cwk_path_is_separator(const char *str)
-{
- const char *c;
-
- // We loop over all characters in the read symbols.
- c = separators[path_style];
- while (*c) {
- if (*c == *str) {
- return true;
- }
-
- ++c;
- }
-
- return false;
-}
-
-size_t cwk_path_change_segment(struct cwk_segment *segment, const char *value,
- char *buffer, size_t buffer_size)
-{
- size_t pos, value_size, tail_size;
-
- // First we have to output the head, which is the whole string up to the
- // beginning of the segment. This part of the path will just stay the same.
- pos = cwk_path_output_sized(buffer, buffer_size, 0, segment->path,
- segment->begin - segment->path);
-
- // In order to trip the submitted value, we will skip any separator at the
- // beginning of it and behave as if it was never there.
- while (cwk_path_is_separator(value)) {
- ++value;
- }
-
- // Now we determine the length of the value. In order to do that we first
- // locate the '\0'.
- value_size = 0;
- while (value[value_size]) {
- ++value_size;
- }
-
- // Since we trim separators at the beginning and in the end of the value we
- // have to subtract from the size until there are either no more characters
- // left or the last character is no separator.
- while (value_size > 0 && cwk_path_is_separator(&value[value_size - 1])) {
- --value_size;
- }
-
- // We also have to determine the tail size, which is the part of the string
- // following the current segment. This part will not change.
- tail_size = strlen(segment->end);
-
- // Now we output the tail. We have to do that, because if the buffer and the
- // source are overlapping we would override the tail if the value is
- // increasing in length.
- cwk_path_output_sized(buffer, buffer_size, pos + value_size, segment->end,
- tail_size);
-
- // Finally we can output the value in the middle of the head and the tail,
- // where we have enough space to fit the whole trimmed value.
- pos += cwk_path_output_sized(buffer, buffer_size, pos, value, value_size);
-
- // Now we add the tail size to the current position and terminate the output -
- // basically, ensure that there is a '\0' at the end of the buffer.
- pos += tail_size;
- cwk_path_terminate_output(buffer, buffer_size, pos);
-
- // And now tell the caller how long the whole path would be.
- return pos;
-}
-
-enum cwk_path_style cwk_path_guess_style(const char *path)
-{
- const char *c;
- size_t root_length;
- struct cwk_segment segment;
-
- // First we determine the root. Only windows roots can be longer than a single
- // slash, so if we can determine that it starts with something like "C:", we
- // know that this is a windows path.
- cwk_path_get_root_windows(path, &root_length);
- if (root_length > 1) {
- return CWK_STYLE_WINDOWS;
- }
-
- // Next we check for slashes. Windows uses backslashes, while unix uses
- // forward slashes. Windows actually supports both, but our best guess is to
- // assume windows with backslashes and unix with forward slashes.
- for (c = path; *c; ++c) {
- if (*c == *separators[CWK_STYLE_UNIX]) {
- return CWK_STYLE_UNIX;
- } else if (*c == *separators[CWK_STYLE_WINDOWS]) {
- return CWK_STYLE_WINDOWS;
- }
- }
-
- // This path does not have any slashes. We grab the last segment (which
- // actually must be the first one), and determine whether the segment starts
- // with a dot. A dot is a hidden folder or file in the UNIX world, in that
- // case we assume the path to have UNIX style.
- if (!cwk_path_get_last_segment(path, &segment)) {
- // We couldn't find any segments, so we default to a UNIX path style since
- // there is no way to make any assumptions.
- return CWK_STYLE_UNIX;
- }
-
- if (*segment.begin == '.') {
- return CWK_STYLE_UNIX;
- }
-
- // And finally we check whether the last segment contains a dot. If it
- // contains a dot, that might be an extension. Windows is more likely to have
- // file names with extensions, so our guess would be windows.
- for (c = segment.begin; *c; ++c) {
- if (*c == '.') {
- return CWK_STYLE_WINDOWS;
- }
- }
-
- // All our checks failed, so we will return a default value which is currently
- // UNIX.
- return CWK_STYLE_UNIX;
-}
-
-void cwk_path_set_style(enum cwk_path_style style)
-{
- // We can just set the global path style variable and then the behaviour for
- // all functions will change accordingly.
- assert(style == CWK_STYLE_UNIX || style == CWK_STYLE_WINDOWS);
- path_style = style;
-}
-
-enum cwk_path_style cwk_path_get_style(void)
-{
- // Simply return the path style which we store in a global variable.
- return path_style;
-}
diff --git a/src/minivhd/cwalk.h b/src/minivhd/cwalk.h
deleted file mode 100644
index baa5d43..0000000
--- a/src/minivhd/cwalk.h
+++ /dev/null
@@ -1,457 +0,0 @@
-#pragma once
-
-#ifndef CWK_LIBRARY_H
-#define CWK_LIBRARY_H
-
-#include
-#include
-
-/**
- * A segment represents a single component of a path. For instance, on linux a
- * path might look like this "/var/log/", which consists of two segments "var"
- * and "log".
- */
-struct cwk_segment
-{
- const char *path;
- const char *segments;
- const char *begin;
- const char *end;
- size_t size;
-};
-
-/**
- * The segment type can be used to identify whether a segment is a special
- * segment or not.
- *
- * CWK_NORMAL - normal folder or file segment
- * CWK_CURRENT - "./" current folder segment
- * CWK_BACK - "../" relative back navigation segment
- */
-enum cwk_segment_type
-{
- CWK_NORMAL,
- CWK_CURRENT,
- CWK_BACK
-};
-
-/**
- * @brief Determines the style which is used for the path parsing and
- * generation.
- */
-enum cwk_path_style
-{
- CWK_STYLE_WINDOWS,
- CWK_STYLE_UNIX
-};
-
-/**
- * @brief Generates an absolute path based on a base.
- *
- * This function generates an absolute path based on a base path and another
- * path. It is guaranteed to return an absolute path. If the second submitted
- * path is absolute, it will override the base path. The result will be written
- * to a buffer, which might be truncated if the buffer is not large enough to
- * hold the full path. However, the truncated result will always be
- * null-terminated. The returned value is the amount of characters which the
- * resulting path would take if it was not truncated (excluding the
- * null-terminating character).
- *
- * @param base The base path on which the relative path will be applied.
- * @param path The relative path which will be applied on the base path.
- * @param buffer The buffer where the result will be written to.
- * @param buffer_size The size of the result buffer.
- * @return Returns the total amount of characters of the new absolute path.
- */
-size_t cwk_path_get_absolute(const char *base, const char *path, char *buffer,
- size_t buffer_size);
-
-/**
- * @brief Generates a relative path based on a base.
- *
- * This function generates a relative path based on a base path and another
- * path. It determines how to get to the submitted path, starting from the base
- * directory. The result will be written to a buffer, which might be truncated
- * if the buffer is not large enough to hold the full path. However, the
- * truncated result will always be null-terminated. The returned value is the
- * amount of characters which the resulting path would take if it was not
- * truncated (excluding the null-terminating character).
- *
- * @param base_directory The base path from which the relative path will start.
- * @param path The target path where the relative path will point to.
- * @param buffer The buffer where the result will be written to.
- * @param buffer_size The size of the result buffer.
- * @return Returns the total amount of characters of the full path.
- */
-size_t cwk_path_get_relative(const char *base_directory, const char *path,
- char *buffer, size_t buffer_size);
-
-/**
- * @brief Joins two paths together.
- *
- * This function generates a new path by combining the two submitted paths. It
- * will remove double separators, and unlike cwk_path_get_absolute it permits
- * the use of two relative paths to combine. The result will be written to a
- * buffer, which might be truncated if the buffer is not large enough to hold
- * the full path. However, the truncated result will always be null-terminated.
- * The returned value is the amount of characters which the resulting path would
- * take if it was not truncated (excluding the null-terminating character).
- *
- * @param path_a The first path which comes first.
- * @param path_b The second path which comes after the first.
- * @param buffer The buffer where the result will be written to.
- * @param buffer_size The size of the result buffer.
- * @return Returns the total amount of characters of the full, combined path.
- */
-size_t cwk_path_join(const char *path_a, const char *path_b, char *buffer,
- size_t buffer_size);
-
-/**
- * @brief Joins multiple paths together.
- *
- * This function generates a new path by joining multiple paths together. It
- * will remove double separators, and unlike cwk_path_get_absolute it permits
- * the use of multiple relative paths to combine. The last path of the submitted
- * string array must be set to NULL. The result will be written to a buffer,
- * which might be truncated if the buffer is not large enough to hold the full
- * path. However, the truncated result will always be null-terminated. The
- * returned value is the amount of characters which the resulting path would
- * take if it was not truncated (excluding the null-terminating character).
- *
- * @param paths An array of paths which will be joined.
- * @param buffer The buffer where the result will be written to.
- * @param buffer_size The size of the result buffer.
- * @return Returns the total amount of characters of the full, combined path.
- */
-size_t cwk_path_join_multiple(const char **paths, char *buffer,
- size_t buffer_size);
-
-/**
- * @brief Determines the root of a path.
- *
- * This function determines the root of a path by finding it's length. The root
- * always starts at the submitted path. If the path has no root, the length will
- * be set to zero.
- *
- * @param path The path which will be inspected.
- * @param length The output of the root length.
- */
-void cwk_path_get_root(const char *path, size_t *length);
-
-/**
- * @brief Changes the root of a path.
- *
- * This function changes the root of a path. It does not normalize the result.
- * The result will be written to a buffer, which might be truncated if the
- * buffer is not large enough to hold the full path. However, the truncated
- * result will always be null-terminated. The returned value is the amount of
- * characters which the resulting path would take if it was not truncated
- * (excluding the null-terminating character).
- *
- * @param path The original path which will get a new root.
- * @param new_root The new root which will be placed in the path.
- * @param buffer The output buffer where the result is written to.
- * @param buffer_size The size of the output buffer where the result is written
- * to.
- * @return Returns the total amount of characters of the new path.
- */
-size_t cwk_path_change_root(const char *path, const char *new_root,
- char *buffer, size_t buffer_size);
-
-/**
- * @brief Determine whether the path is absolute or not.
- *
- * This function checks whether the path is an absolute path or not. A path is
- * considered to be absolute if the root ends with a separator.
- *
- * @param path The path which will be checked.
- * @return Returns true if the path is absolute or false otherwise.
- */
-bool cwk_path_is_absolute(const char *path);
-
-/**
- * @brief Determine whether the path is relative or not.
- *
- * This function checks whether the path is a relative path or not. A path is
- * considered to be relative if the root does not end with a separator.
- *
- * @param path The path which will be checked.
- * @return Returns true if the path is relative or false otherwise.
- */
-bool cwk_path_is_relative(const char *path);
-
-/**
- * @brief Gets the basename of a file path.
- *
- * This function gets the basename of a file path. A pointer to the beginning of
- * the basename will be returned through the basename parameter. This pointer
- * will be positioned on the first letter after the separator. The length of the
- * file path will be returned through the length parameter. The length will be
- * set to zero and the basename to NULL if there is no basename available.
- *
- * @param path The path which will be inspected.
- * @param basename The output of the basename pointer.
- * @param length The output of the length of the basename.
- */
-void cwk_path_get_basename(const char *path, const char **basename,
- size_t *length);
-
-/**
- * @brief Changes the basename of a file path.
- *
- * This function changes the basename of a file path. This function will not
- * write out more than the specified buffer can contain. However, the generated
- * string is always null-terminated - even if not the whole path is written out.
- * The function returns the total number of characters the complete buffer would
- * have, even if it was not written out completely. The path may be the same
- * memory address as the buffer.
- *
- * @param path The original path which will be used for the modified path.
- * @param new_basename The new basename which will replace the old one.
- * @param buffer The buffer where the changed path will be written to.
- * @param buffer_size The size of the result buffer where the changed path is
- * written to.
- * @return Returns the size which the complete new path would have if it was not
- * truncated.
- */
-size_t cwk_path_change_basename(const char *path, const char *new_basename,
- char *buffer, size_t buffer_size);
-
-/**
- * @brief Gets the dirname of a file path.
- *
- * This function determines the dirname of a file path and returns the length up
- * to which character is considered to be part of it. If no dirname is found,
- * the length will be set to zero. The beginning of the dirname is always equal
- * to the submitted path pointer.
- *
- * @param path The path which will be inspected.
- * @param length The length of the dirname.
- */
-void cwk_path_get_dirname(const char *path, size_t *length);
-
-/**
- * @brief Gets the extension of a file path.
- *
- * This function extracts the extension portion of a file path. A pointer to
- * the beginning of the extension will be returned through the extension
- * parameter if an extension is found and true is returned. This pointer will be
- * positioned on the dot. The length of the extension name will be returned
- * through the length parameter. If no extension is found both parameters won't
- * be touched and false will be returned.
- *
- * @param path The path which will be inspected.
- * @param extension The output of the extension pointer.
- * @param length The output of the length of the extension.
- * @return Returns true if an extension is found or false otherwise.
- */
-bool cwk_path_get_extension(const char *path, const char **extension,
- size_t *length);
-
-/**
- * @brief Determines whether the file path has an extension.
- *
- * This function determines whether the submitted file path has an extension.
- * This will evaluate to true if the last segment of the path contains a dot.
- *
- * @param path The path which will be inspected.
- * @return Returns true if the path has an extension or false otherwise.
- */
-bool cwk_path_has_extension(const char *path);
-
-/**
- * @brief Changes the extension of a file path.
- *
- * This function changes the extension of a file name. The function will append
- * an extension if the basename does not have an extension, or use the extension
- * as a basename if the path does not have a basename. This function will not
- * write out more than the specified buffer can contain. However, the generated
- * string is always null-terminated - even if not the whole path is written out.
- * The function returns the total number of characters the complete buffer would
- * have, even if it was not written out completely. The path may be the same
- * memory address as the buffer.
- *
- * @param path The path which will be used to make the change.
- * @param new_extension The extension which will be placed within the new path.
- * @param buffer The output buffer where the result will be written to.
- * @param buffer_size The size of the output buffer where the result will be
- * written to.
- * @return Returns the total size which the output would have if it was not
- * truncated.
- */
-size_t cwk_path_change_extension(const char *path, const char *new_extension,
- char *buffer, size_t buffer_size);
-
-/**
- * @brief Creates a normalized version of the path.
- *
- * This function creates a normalized version of the path within the specified
- * buffer. This function will not write out more than the specified buffer can
- * contain. However, the generated string is always null-terminated - even if
- * not the whole path is written out. The function returns the total number of
- * characters the complete buffer would have, even if it was not written out
- * completely. The path may be the same memory address as the buffer.
- *
- * The following will be true for the normalized path:
- * 1) "../" will be resolved.
- * 2) "./" will be removed.
- * 3) double separators will be fixed with a single separator.
- * 4) separator suffixes will be removed.
- *
- * @param path The path which will be normalized.
- * @param buffer The buffer where the new path is written to.
- * @param buffer_size The size of the buffer.
- * @return The size which the complete normalized path has if it was not
- * truncated.
- */
-size_t cwk_path_normalize(const char *path, char *buffer, size_t buffer_size);
-
-/**
- * @brief Finds common portions in two paths.
- *
- * This function finds common portions in two paths and returns the number
- * characters from the beginning of the base path which are equal to the other
- * path.
- *
- * @param path_base The base path which will be compared with the other path.
- * @param path_other The other path which will compared with the base path.
- * @return Returns the number of characters which are common in the base path.
- */
-size_t cwk_path_get_intersection(const char *path_base, const char *path_other);
-
-/**
- * @brief Gets the first segment of a path.
- *
- * This function finds the first segment of a path. The position of the segment
- * is set to the first character after the separator, and the length counts all
- * characters until the next separator (excluding the separator).
- *
- * @param path The path which will be inspected.
- * @param segment The segment which will be extracted.
- * @return Returns true if there is a segment or false if there is none.
- */
-bool cwk_path_get_first_segment(const char *path, struct cwk_segment *segment);
-
-/**
- * @brief Gets the last segment of the path.
- *
- * This function gets the last segment of a path. This function may return false
- * if the path doesn't contain any segments, in which case the submitted segment
- * parameter is not modified. The position of the segment is set to the first
- * character after the separator, and the length counts all characters until the
- * end of the path (excluding the separator).
- *
- * @param path The path which will be inspected.
- * @param segment The segment which will be extracted.
- * @return Returns true if there is a segment or false if there is none.
- */
-bool cwk_path_get_last_segment(const char *path, struct cwk_segment *segment);
-
-/**
- * @brief Advances to the next segment.
- *
- * This function advances the current segment to the next segment. If there are
- * no more segments left, the submitted segment structure will stay unchanged
- * and false is returned.
- *
- * @param segment The current segment which will be advanced to the next one.
- * @return Returns true if another segment was found or false otherwise.
- */
-bool cwk_path_get_next_segment(struct cwk_segment *segment);
-
-/**
- * @brief Moves to the previous segment.
- *
- * This function moves the current segment to the previous segment. If the
- * current segment is the first one, the submitted segment structure will stay
- * unchanged and false is returned.
- *
- * @param segment The current segment which will be moved to the previous one.
- * @return Returns true if there is a segment before this one or false
- * otherwise.
- */
-bool cwk_path_get_previous_segment(struct cwk_segment *segment);
-
-/**
- * @brief Gets the type of the submitted path segment.
- *
- * This function inspects the contents of the segment and determines the type of
- * it. Currently, there are three types CWK_NORMAL, CWK_CURRENT and CWK_BACK. A
- * CWK_NORMAL segment is a normal folder or file entry. A CWK_CURRENT is a "./"
- * and a CWK_BACK a "../" segment.
- *
- * @param segment The segment which will be inspected.
- * @return Returns the type of the segment.
- */
-enum cwk_segment_type cwk_path_get_segment_type(
- const struct cwk_segment *segment);
-
-/**
- * @brief Changes the content of a segment.
- *
- * This function overrides the content of a segment to the submitted value and
- * outputs the whole new path to the submitted buffer. The result might require
- * less or more space than before if the new value length differs from the
- * original length. The output is truncated if the new path is larger than the
- * submitted buffer size, but it is always null-terminated. The source of the
- * segment and the submitted buffer may be the same.
- *
- * @param segment The segment which will be modifier.
- * @param value The new content of the segment.
- * @param buffer The buffer where the modified path will be written to.
- * @param buffer_size The size of the output buffer.
- * @return Returns the total size which would have been written if the output
- * was not truncated.
- */
-size_t cwk_path_change_segment(struct cwk_segment *segment, const char *value,
- char *buffer, size_t buffer_size);
-
-/**
- * @brief Checks whether the submitted pointer points to a separator.
- *
- * This function simply checks whether the submitted pointer points to a
- * separator, which has to be null-terminated (but not necessarily after the
- * separator). The function will return true if it is a separator, or false
- * otherwise.
- *
- * @param symbol A pointer to a string.
- * @return Returns true if it is a separator, or false otherwise.
- */
-bool cwk_path_is_separator(const char *str);
-
-/**
- * @brief Guesses the path style.
- *
- * This function guesses the path style based on a submitted path-string. The
- * guessing will look at the root and the type of slashes contained in the path
- * and return the style which is more likely used in the path.
- *
- * @param path The path which will be inspected.
- * @return Returns the style which is most likely used for the path.
- */
-enum cwk_path_style cwk_path_guess_style(const char *path);
-
-/**
- * @brief Configures which path style is used.
- *
- * This function configures which path style is used. The following styles are
- * currently supported.
- *
- * CWK_STYLE_WINDOWS: Use backslashes as a separator and volume for the root.
- * CWK_STYLE_UNIX: Use slashes as a separator and a slash for the root.
- *
- * @param style The style which will be used from now on.
- */
-void cwk_path_set_style(enum cwk_path_style style);
-
-/**
- * @brief Gets the path style configuration.
- *
- * This function gets the style configuration which is currently used for the
- * paths. This configuration determines how paths are parsed and generated.
- *
- * @return Returns the current path style configuration.
- */
-enum cwk_path_style cwk_path_get_style(void);
-
-#endif
diff --git a/src/minivhd/libxml2_encoding.c b/src/minivhd/libxml2_encoding.c
deleted file mode 100644
index 1c9575b..0000000
--- a/src/minivhd/libxml2_encoding.c
+++ /dev/null
@@ -1,447 +0,0 @@
-/*
- * encoding.c : implements the encoding conversion functions needed for XML
- *
- * Related specs:
- * rfc2044 (UTF-8 and UTF-16) F. Yergeau Alis Technologies
- * rfc2781 UTF-16, an encoding of ISO 10646, P. Hoffman, F. Yergeau
- * [ISO-10646] UTF-8 and UTF-16 in Annexes
- * [ISO-8859-1] ISO Latin-1 characters codes.
- * [UNICODE] The Unicode Consortium, "The Unicode Standard --
- * Worldwide Character Encoding -- Version 1.0", Addison-
- * Wesley, Volume 1, 1991, Volume 2, 1992. UTF-8 is
- * described in Unicode Technical Report #4.
- * [US-ASCII] Coded Character Set--7-bit American Standard Code for
- * Information Interchange, ANSI X3.4-1986.
- *
- * See Copyright for the status of this software.
- *
- * daniel@veillard.com
- *
- * Original code for IsoLatin1 and UTF-16 by "Martin J. Duerst"
- *
- * Adapted and abridged for MiniVHD by Sherman Perry
- */
-#include
-
-static int xmlLittleEndian = 1;
-
-/* Note: extracted from original 'void xmlInitCharEncodingHandlers(void)' function */
-void xmlEncodingInit(void)
-{
- unsigned short int tst = 0x1234;
- unsigned char *ptr = (unsigned char *) &tst;
-
- if (*ptr == 0x12) xmlLittleEndian = 0;
- else if (*ptr == 0x34) xmlLittleEndian = 1;
-}
-
-/**
- * UTF16LEToUTF8:
- * @out: a pointer to an array of bytes to store the result
- * @outlen: the length of @out
- * @inb: a pointer to an array of UTF-16LE passwd as a byte array
- * @inlenb: the length of @in in UTF-16LE chars
- *
- * Take a block of UTF-16LE ushorts in and try to convert it to an UTF-8
- * block of chars out. This function assumes the endian property
- * is the same between the native type of this machine and the
- * inputed one.
- *
- * Returns the number of bytes written, or -1 if lack of space, or -2
- * if the transcoding fails (if *in is not a valid utf16 string)
- * The value of *inlen after return is the number of octets consumed
- * if the return value is positive, else unpredictable.
- */
-int UTF16LEToUTF8(unsigned char* out, int *outlen,
- const unsigned char* inb, int *inlenb)
-{
- unsigned char* outstart = out;
- const unsigned char* processed = inb;
- unsigned char* outend = out + *outlen;
- unsigned short* in = (unsigned short*) inb;
- unsigned short* inend;
- unsigned int c, d, inlen;
- unsigned char *tmp;
- int bits;
-
- if ((*inlenb % 2) == 1)
- (*inlenb)--;
- inlen = *inlenb / 2;
- inend = in + inlen;
- while ((in < inend) && (out - outstart + 5 < *outlen)) {
- if (xmlLittleEndian) {
- c= *in++;
- } else {
- tmp = (unsigned char *) in;
- c = *tmp++;
- c = c | (((unsigned int)*tmp) << 8);
- in++;
- }
- if ((c & 0xFC00) == 0xD800) { /* surrogates */
- if (in >= inend) { /* (in > inend) shouldn't happens */
- break;
- }
- if (xmlLittleEndian) {
- d = *in++;
- } else {
- tmp = (unsigned char *) in;
- d = *tmp++;
- d = d | (((unsigned int)*tmp) << 8);
- in++;
- }
- if ((d & 0xFC00) == 0xDC00) {
- c &= 0x03FF;
- c <<= 10;
- c |= d & 0x03FF;
- c += 0x10000;
- }
- else {
- *outlen = out - outstart;
- *inlenb = processed - inb;
- return(-2);
- }
- }
-
- /* assertion: c is a single UTF-4 value */
- if (out >= outend)
- break;
- if (c < 0x80) { *out++= c; bits= -6; }
- else if (c < 0x800) { *out++= ((c >> 6) & 0x1F) | 0xC0; bits= 0; }
- else if (c < 0x10000) { *out++= ((c >> 12) & 0x0F) | 0xE0; bits= 6; }
- else { *out++= ((c >> 18) & 0x07) | 0xF0; bits= 12; }
-
- for ( ; bits >= 0; bits-= 6) {
- if (out >= outend)
- break;
- *out++= ((c >> bits) & 0x3F) | 0x80;
- }
- processed = (const unsigned char*) in;
- }
- *outlen = out - outstart;
- *inlenb = processed - inb;
- return(*outlen);
-}
-
-/**
- * UTF8ToUTF16LE:
- * @outb: a pointer to an array of bytes to store the result
- * @outlen: the length of @outb
- * @in: a pointer to an array of UTF-8 chars
- * @inlen: the length of @in
- *
- * Take a block of UTF-8 chars in and try to convert it to an UTF-16LE
- * block of chars out.
- *
- * Returns the number of bytes written, or -1 if lack of space, or -2
- * if the transcoding failed.
- */
-int UTF8ToUTF16LE(unsigned char* outb, int *outlen,
- const unsigned char* in, int *inlen)
-{
- unsigned short* out = (unsigned short*) outb;
- const unsigned char* processed = in;
- const unsigned char *const instart = in;
- unsigned short* outstart= out;
- unsigned short* outend;
- const unsigned char* inend;
- unsigned int c, d;
- int trailing;
- unsigned char *tmp;
- unsigned short tmp1, tmp2;
-
- /* UTF16LE encoding has no BOM */
- if ((out == NULL) || (outlen == NULL) || (inlen == NULL)) return(-1);
- if (in == NULL) {
- *outlen = 0;
- *inlen = 0;
- return(0);
- }
- inend= in + *inlen;
- outend = out + (*outlen / 2);
- while (in < inend) {
- d= *in++;
- if (d < 0x80) { c= d; trailing= 0; }
- else if (d < 0xC0) {
- /* trailing byte in leading position */
- *outlen = (out - outstart) * 2;
- *inlen = processed - instart;
- return(-2);
- } else if (d < 0xE0) { c= d & 0x1F; trailing= 1; }
- else if (d < 0xF0) { c= d & 0x0F; trailing= 2; }
- else if (d < 0xF8) { c= d & 0x07; trailing= 3; }
- else {
- /* no chance for this in UTF-16 */
- *outlen = (out - outstart) * 2;
- *inlen = processed - instart;
- return(-2);
- }
-
- if (inend - in < trailing) {
- break;
- }
-
- for ( ; trailing; trailing--) {
- if ((in >= inend) || (((d= *in++) & 0xC0) != 0x80))
- break;
- c <<= 6;
- c |= d & 0x3F;
- }
-
- /* assertion: c is a single UTF-4 value */
- if (c < 0x10000) {
- if (out >= outend)
- break;
- if (xmlLittleEndian) {
- *out++ = c;
- } else {
- tmp = (unsigned char *) out;
- *tmp = c ;
- *(tmp + 1) = c >> 8 ;
- out++;
- }
- }
- else if (c < 0x110000) {
- if (out+1 >= outend)
- break;
- c -= 0x10000;
- if (xmlLittleEndian) {
- *out++ = 0xD800 | (c >> 10);
- *out++ = 0xDC00 | (c & 0x03FF);
- } else {
- tmp1 = 0xD800 | (c >> 10);
- tmp = (unsigned char *) out;
- *tmp = (unsigned char) tmp1;
- *(tmp + 1) = tmp1 >> 8;
- out++;
-
- tmp2 = 0xDC00 | (c & 0x03FF);
- tmp = (unsigned char *) out;
- *tmp = (unsigned char) tmp2;
- *(tmp + 1) = tmp2 >> 8;
- out++;
- }
- }
- else
- break;
- processed = in;
- }
- *outlen = (out - outstart) * 2;
- *inlen = processed - instart;
- return(*outlen);
-}
-
-/**
- * UTF16BEToUTF8:
- * @out: a pointer to an array of bytes to store the result
- * @outlen: the length of @out
- * @inb: a pointer to an array of UTF-16 passed as a byte array
- * @inlenb: the length of @in in UTF-16 chars
- *
- * Take a block of UTF-16 ushorts in and try to convert it to an UTF-8
- * block of chars out. This function assumes the endian property
- * is the same between the native type of this machine and the
- * inputed one.
- *
- * Returns the number of bytes written, or -1 if lack of space, or -2
- * if the transcoding fails (if *in is not a valid utf16 string)
- * The value of *inlen after return is the number of octets consumed
- * if the return value is positive, else unpredictable.
- */
-int UTF16BEToUTF8(unsigned char* out, int *outlen,
- const unsigned char* inb, int *inlenb)
-{
- unsigned char* outstart = out;
- const unsigned char* processed = inb;
- unsigned char* outend = out + *outlen;
- unsigned short* in = (unsigned short*) inb;
- unsigned short* inend;
- unsigned int c, d, inlen;
- unsigned char *tmp;
- int bits;
-
- if ((*inlenb % 2) == 1)
- (*inlenb)--;
- inlen = *inlenb / 2;
- inend= in + inlen;
- while (in < inend) {
- if (xmlLittleEndian) {
- tmp = (unsigned char *) in;
- c = *tmp++;
- c = c << 8;
- c = c | (unsigned int) *tmp;
- in++;
- } else {
- c= *in++;
- }
- if ((c & 0xFC00) == 0xD800) { /* surrogates */
- if (in >= inend) { /* (in > inend) shouldn't happens */
- *outlen = out - outstart;
- *inlenb = processed - inb;
- return(-2);
- }
- if (xmlLittleEndian) {
- tmp = (unsigned char *) in;
- d = *tmp++;
- d = d << 8;
- d = d | (unsigned int) *tmp;
- in++;
- } else {
- d= *in++;
- }
- if ((d & 0xFC00) == 0xDC00) {
- c &= 0x03FF;
- c <<= 10;
- c |= d & 0x03FF;
- c += 0x10000;
- }
- else {
- *outlen = out - outstart;
- *inlenb = processed - inb;
- return(-2);
- }
- }
-
- /* assertion: c is a single UTF-4 value */
- if (out >= outend)
- break;
- if (c < 0x80) { *out++= c; bits= -6; }
- else if (c < 0x800) { *out++= ((c >> 6) & 0x1F) | 0xC0; bits= 0; }
- else if (c < 0x10000) { *out++= ((c >> 12) & 0x0F) | 0xE0; bits= 6; }
- else { *out++= ((c >> 18) & 0x07) | 0xF0; bits= 12; }
-
- for ( ; bits >= 0; bits-= 6) {
- if (out >= outend)
- break;
- *out++= ((c >> bits) & 0x3F) | 0x80;
- }
- processed = (const unsigned char*) in;
- }
- *outlen = out - outstart;
- *inlenb = processed - inb;
- return(*outlen);
-}
-
-/**
- * UTF8ToUTF16BE:
- * @outb: a pointer to an array of bytes to store the result
- * @outlen: the length of @outb
- * @in: a pointer to an array of UTF-8 chars
- * @inlen: the length of @in
- *
- * Take a block of UTF-8 chars in and try to convert it to an UTF-16BE
- * block of chars out.
- *
- * Returns the number of byte written, or -1 by lack of space, or -2
- * if the transcoding failed.
- */
-int UTF8ToUTF16BE(unsigned char* outb, int *outlen,
- const unsigned char* in, int *inlen)
-{
- unsigned short* out = (unsigned short*) outb;
- const unsigned char* processed = in;
- const unsigned char *const instart = in;
- unsigned short* outstart= out;
- unsigned short* outend;
- const unsigned char* inend;
- unsigned int c, d;
- int trailing;
- unsigned char *tmp;
- unsigned short tmp1, tmp2;
-
- /* UTF-16BE has no BOM */
- if ((outb == NULL) || (outlen == NULL) || (inlen == NULL)) return(-1);
- if (in == NULL) {
- *outlen = 0;
- *inlen = 0;
- return(0);
- }
- inend= in + *inlen;
- outend = out + (*outlen / 2);
- while (in < inend) {
- d= *in++;
- if (d < 0x80) { c= d; trailing= 0; }
- else if (d < 0xC0) {
- /* trailing byte in leading position */
- *outlen = out - outstart;
- *inlen = processed - instart;
- return(-2);
- } else if (d < 0xE0) { c= d & 0x1F; trailing= 1; }
- else if (d < 0xF0) { c= d & 0x0F; trailing= 2; }
- else if (d < 0xF8) { c= d & 0x07; trailing= 3; }
- else {
- /* no chance for this in UTF-16 */
- *outlen = out - outstart;
- *inlen = processed - instart;
- return(-2);
- }
-
- if (inend - in < trailing) {
- break;
- }
-
- for ( ; trailing; trailing--) {
- if ((in >= inend) || (((d= *in++) & 0xC0) != 0x80)) break;
- c <<= 6;
- c |= d & 0x3F;
- }
-
- /* assertion: c is a single UTF-4 value */
- if (c < 0x10000) {
- if (out >= outend) break;
- if (xmlLittleEndian) {
- tmp = (unsigned char *) out;
- *tmp = c >> 8;
- *(tmp + 1) = c;
- out++;
- } else {
- *out++ = c;
- }
- }
- else if (c < 0x110000) {
- if (out+1 >= outend) break;
- c -= 0x10000;
- if (xmlLittleEndian) {
- tmp1 = 0xD800 | (c >> 10);
- tmp = (unsigned char *) out;
- *tmp = tmp1 >> 8;
- *(tmp + 1) = (unsigned char) tmp1;
- out++;
-
- tmp2 = 0xDC00 | (c & 0x03FF);
- tmp = (unsigned char *) out;
- *tmp = tmp2 >> 8;
- *(tmp + 1) = (unsigned char) tmp2;
- out++;
- } else {
- *out++ = 0xD800 | (c >> 10);
- *out++ = 0xDC00 | (c & 0x03FF);
- }
- }
- else
- break;
- processed = in;
- }
- *outlen = (out - outstart) * 2;
- *inlen = processed - instart;
- return(*outlen);
-}
-
-/* This file is licenced under the MIT licence as follows:
-
-Permission is hereby granted, free of charge, to any person obtaining a copy
-of this software and associated documentation files (the "Software"), to deal
-in the Software without restriction, including without limitation the rights
-to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-copies of the Software, and to permit persons to whom the Software is fur-
-nished to do so, subject to the following conditions:
-
-The above copyright notice and this permission notice shall be included in
-all copies or substantial portions of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FIT-
-NESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
-AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
-THE SOFTWARE. */
diff --git a/src/minivhd/libxml2_encoding.h b/src/minivhd/libxml2_encoding.h
deleted file mode 100644
index d86770b..0000000
--- a/src/minivhd/libxml2_encoding.h
+++ /dev/null
@@ -1,12 +0,0 @@
-#ifndef LIBXML2_ENCODING_H
-#define LIBXML2_ENCODING_H
-
-#include
-typedef uint16_t mvhd_utf16;
-
-void xmlEncodingInit(void);
-int UTF16LEToUTF8(unsigned char* out, int *outlen, const unsigned char* inb, int *inlenb);
-int UTF8ToUTF16LE(unsigned char* outb, int *outlen, const unsigned char* in, int *inlen);
-int UTF16BEToUTF8(unsigned char* out, int *outlen, const unsigned char* inb, int *inlenb);
-int UTF8ToUTF16BE(unsigned char* outb, int *outlen, const unsigned char* in, int *inlen);
-#endif
diff --git a/src/minivhd/minivhd.h b/src/minivhd/minivhd.h
deleted file mode 100644
index aafd559..0000000
--- a/src/minivhd/minivhd.h
+++ /dev/null
@@ -1,309 +0,0 @@
-#ifndef MINIVHD_H
-#define MINIVHD_H
-
-#include
-#include
-#include
-
-extern int mvhd_errno;
-
-typedef enum MVHDError {
- MVHD_ERR_MEM = -128,
- MVHD_ERR_FILE,
- MVHD_ERR_NOT_VHD,
- MVHD_ERR_TYPE,
- MVHD_ERR_FOOTER_CHECKSUM,
- MVHD_ERR_SPARSE_CHECKSUM,
- MVHD_ERR_UTF_TRANSCODING_FAILED,
- MVHD_ERR_UTF_SIZE,
- MVHD_ERR_PATH_REL,
- MVHD_ERR_PATH_LEN,
- MVHD_ERR_PAR_NOT_FOUND,
- MVHD_ERR_INVALID_PAR_UUID,
- MVHD_ERR_INVALID_GEOM,
- MVHD_ERR_INVALID_SIZE,
- MVHD_ERR_INVALID_BLOCK_SIZE,
- MVHD_ERR_INVALID_PARAMS,
- MVHD_ERR_CONV_SIZE,
- MVHD_ERR_TIMESTAMP
-} MVHDError;
-
-typedef enum MVHDType {
- MVHD_TYPE_FIXED = 2,
- MVHD_TYPE_DYNAMIC = 3,
- MVHD_TYPE_DIFF = 4
-} MVHDType;
-
-typedef enum MVHDBlockSize {
- MVHD_BLOCK_DEFAULT = 0, /**< 2 MB blocks */
- MVHD_BLOCK_SMALL = 1024, /**< 512 KB blocks */
- MVHD_BLOCK_LARGE = 4096 /**< 2 MB blocks */
-} MVHDBlockSize;
-
-typedef struct MVHDGeom {
- uint16_t cyl;
- uint8_t heads;
- uint8_t spt;
-} MVHDGeom;
-
-typedef void (*mvhd_progress_callback)(uint32_t current_sector, uint32_t total_sectors);
-
-typedef struct MVHDCreationOptions {
- int type; /** MVHD_TYPE_FIXED, MVHD_TYPE_DYNAMIC, or MVHD_TYPE_DIFF */
- char* path; /** Absolute path of the new VHD file */
- char* parent_path; /** For MVHD_TYPE_DIFF, this is the absolute path of the VHD's parent. For non-diff VHDs, this should be NULL. */
- uint64_t size_in_bytes; /** Total size of the VHD's virtual disk in bytes. Must be a multiple of 512. If 0, the size is auto-calculated from the geometry field. Ignored for MVHD_TYPE_DIFF. */
- MVHDGeom geometry; /** The geometry of the VHD. If set to 0, the geometry is auto-calculated from the size_in_bytes field. */
- uint32_t block_size_in_sectors; /** MVHD_BLOCK_LARGE or MVHD_BLOCK_SMALL, or 0 for the default value. The number of sectors per block. */
- mvhd_progress_callback progress_callback; /** Optional; if not NULL, gets called to indicate progress on the creation operation. Only applies to MVHD_TYPE_FIXED. */
-} MVHDCreationOptions;
-
-typedef struct MVHDMeta MVHDMeta;
-
-/**
- * \brief Output a string from a MiniVHD error number
- *
- * \param [in] err is the error number to return string from
- *
- * \return Error string
- */
-const char* mvhd_strerr(MVHDError err);
-
-/**
- * \brief A simple test to see if a given file is a VHD
- *
- * \param [in] f file to test
- *
- * \retval true if f is a VHD
- * \retval false if f is not a VHD
- */
-bool mvhd_file_is_vhd(FILE* f);
-
-/**
- * \brief Open a VHD image for reading and/or writing
- *
- * The returned pointer contains all required values and structures (and files) to
- * read and write to a VHD file.
- *
- * Remember to call mvhd_close() when you are finished.
- *
- * \param [in] Absolute path to VHD file. Relative path will cause issues when opening
- * a differencing VHD file
- * \param [in] readonly set this to true to open the VHD in a read only manner
- * \param [out] err will be set if the VHD fails to open. Value could be one of
- * MVHD_ERR_MEM, MVHD_ERR_FILE, MVHD_ERR_NOT_VHD, MVHD_ERR_FOOTER_CHECKSUM, MVHD_ERR_SPARSE_CHECKSUM,
- * MVHD_ERR_TYPE, MVHD_ERR_TIMESTAMP
- * If MVHD_ERR_FILE is set, mvhd_errno will be set to the appropriate system errno value
- *
- * \return MVHDMeta pointer. If NULL, check err. err may also be set to MVHD_ERR_TIMESTAMP if
- * opening a differencing VHD.
- */
-MVHDMeta* mvhd_open(const char* path, bool readonly, int* err);
-
-/**
- * \brief Update the parent modified timestamp in the VHD file
- *
- * Differencing VHD's use a parent last modified timestamp to try and detect if the
- * parent has been modified after the child has been created. However, this is rather
- * fragile and can be broken by moving/copying the parent. Also, MS DiskPart does not
- * set this timestamp in the child :(
- *
- * Be careful when using this function that you don't update the timestamp after the
- * parent actually has been modified.
- *
- * \param [in] vhdm Differencing VHD to update.
- * \param [out] err will be set if the timestamp could not be updated
- *
- * \return non-zero on error, 0 on success
- */
-int mvhd_diff_update_par_timestamp(MVHDMeta* vhdm, int* err);
-
-/**
- * \brief Create a fixed VHD image
- *
- * \param [in] path is the absolute path to the image to create
- * \param [in] geom is the HDD geometry of the image to create. Determines final image size
- * \param [out] err indicates what error occurred, if any
- * \param [out] progress_callback optional; if not NULL, gets called to indicate progress on the creation operation
- *
- * \retval NULL if an error occurrs. Check value of *err for actual error. Otherwise returns pointer to a MVHDMeta struct
- */
-MVHDMeta* mvhd_create_fixed(const char* path, MVHDGeom geom, int* err, mvhd_progress_callback progress_callback);
-
-/**
- * \brief Create sparse (dynamic) VHD image.
- *
- * \param [in] path is the absolute path to the VHD file to create
- * \param [in] geom is the HDD geometry of the image to create. Determines final image size
- * \param [out] err indicates what error occurred, if any
- *
- * \return NULL if an error occurrs. Check value of *err for actual error. Otherwise returns pointer to a MVHDMeta struct
- */
-MVHDMeta* mvhd_create_sparse(const char* path, MVHDGeom geom, int* err);
-
-/**
- * \brief Create differencing VHD imagee.
- *
- * \param [in] path is the absolute path to the VHD file to create
- * \param [in] par_path is the absolute path to a parent image. If NULL, a sparse image is created, otherwise create a differencing image
- * \param [out] err indicates what error occurred, if any
- *
- * \return NULL if an error occurrs. Check value of *err for actual error. Otherwise returns pointer to a MVHDMeta struct
- */
-MVHDMeta* mvhd_create_diff(const char* path, const char* par_path, int* err);
-
-/**
- * \brief Create a VHD using the provided options
- *
- * Use mvhd_create_ex if you want more control over the VHD's options. For quick creation, you can use mvhd_create_fixed, mvhd_create_sparse, or mvhd_create_diff.
- *
- * \param [in] options the VHD creation options.
- * \param [out] err indicates what error occurred, if any
- *
- * \retval NULL if an error occurrs. Check value of *err for actual error. Otherwise returns pointer to a MVHDMeta struct
- */
-MVHDMeta* mvhd_create_ex(MVHDCreationOptions options, int* err);
-
-/**
- * \brief Safely close a VHD image
- *
- * \param [in] vhdm MiniVHD data structure to close
- */
-void mvhd_close(MVHDMeta* vhdm);
-
-/**
- * \brief Calculate hard disk geometry from a provided size
- *
- * The VHD format uses Cylinder, Heads, Sectors per Track (CHS) when accessing the disk.
- * The size of the disk can be determined from C * H * S * sector_size.
- *
- * Note, maximum geometry size (in bytes) is 65535 * 16 * 255 * 512, which is 127GB.
- * However, the maximum VHD size is 2040GB. For VHDs larger than 127GB, the geometry size will be
- * smaller than the actual VHD size.
- *
- * This function determines the appropriate CHS geometry from a provided size in bytes.
- * The calculations used are those provided in "Appendix: CHS Calculation" from the document
- * "Virtual Hard Disk Image Format Specification" provided by Microsoft.
- *
- * \param [in] size the desired VHD image size, in bytes
- *
- * \return MVHDGeom the calculated geometry. This can be used in the appropriate create functions.
- */
-MVHDGeom mvhd_calculate_geometry(uint64_t size);
-
-/**
- * \brief Get the CHS geometry from the image
- *
- * \param [in] vhdm MiniVHD data structure
- *
- * \return The CHS geometry as stored in the image
- */
-MVHDGeom mvhd_get_geometry(MVHDMeta* vhdm);
-
-/**
- * \brief Get the 'current_size' value from the image
- *
- * Note that the size returned may not match the size calculated from the
- * CHS geometry. It is up to the caller to decide how best to handle this.
- *
- * \param [in] vhdm MiniVHD data structure
- *
- * \return The 'current_size' value in bytes, as stored in the image.
- * Note, this may not match the CHS geometry.
- */
-uint64_t mvhd_get_current_size(MVHDMeta* vhdm);
-
-/**
- * \brief Calculate CHS geometry size in bytes
- *
- * \param [in] geom the CHS geometry to calculate
- *
- * \return the size in bytes
- */
-uint64_t mvhd_calc_size_bytes(MVHDGeom *geom);
-
-/**
- * \brief Calculate CHS geometry size in sectors
- *
- * \param [in] geom the CHS geometry to calculate
- *
- * \return the size in sectors
- */
-uint32_t mvhd_calc_size_sectors(MVHDGeom *geom);
-
-/**
- * \brief Convert a raw disk image to a fixed VHD image
- *
- * \param [in] utf8_raw_path is the path of the raw image to convert
- * \param [in] utf8_vhd_path is the path of the VHD to create
- * \param [out] err indicates what error occurred, if any
- *
- * \return NULL if an error occurrs. Check value of *err for actual error. Otherwise returns pointer to a MVHDMeta struct
- */
-MVHDMeta* mvhd_convert_to_vhd_fixed(const char* utf8_raw_path, const char* utf8_vhd_path, int* err);
-
-/**
- * \brief Convert a raw disk image to a sparse VHD image
- *
- * \param [in] utf8_raw_path is the path of the raw image to convert
- * \param [in] utf8_vhd_path is the path of the VHD to create
- * \param [out] err indicates what error occurred, if any
- *
- * \return NULL if an error occurrs. Check value of *err for actual error. Otherwise returns pointer to a MVHDMeta struct
- */
-MVHDMeta* mvhd_convert_to_vhd_sparse(const char* utf8_raw_path, const char* utf8_vhd_path, int* err);
-
-/**
- * \brief Convert a VHD image to a raw disk image
- *
- * \param [in] utf8_vhd_path is the path of the VHD to convert
- * \param [in] utf8_raw_path is the path of the raw image to create
- * \param [out] err indicates what error occurred, if any
- *
- * \return NULL if an error occurrs. Check value of *err for actual error. Otherwise returns the raw disk image FILE pointer
- */
-FILE* mvhd_convert_to_raw(const char* utf8_vhd_path, const char* utf8_raw_path, int *err);
-
-/**
- * \brief Read sectors from VHD file
- *
- * Read num_sectors, beginning at offset from the VHD file into a buffer
- *
- * \param [in] vhdm MiniVHD data structure
- * \param [in] offset the sector offset from which to start reading from
- * \param [in] num_sectors the number of sectors to read
- * \param [out] out_buff the buffer to write sector data to
- *
- * \return the number of sectors that were not read, or zero
- */
-int mvhd_read_sectors(MVHDMeta* vhdm, uint32_t offset, int num_sectors, void* out_buff);
-
-/**
- * \brief Write sectors to VHD file
- *
- * Write num_sectors, beginning at offset from a buffer VHD file into the VHD file
- *
- * \param [in] vhdm MiniVHD data structure
- * \param [in] offset the sector offset from which to start writing to
- * \param [in] num_sectors the number of sectors to write
- * \param [in] in_buffer the buffer to write sector data to
- *
- * \return the number of sectors that were not written, or zero
- */
-int mvhd_write_sectors(MVHDMeta* vhdm, uint32_t offset, int num_sectors, void* in_buff);
-
-/**
- * \brief Write zeroed sectors to VHD file
- *
- * Write num_sectors, beginning at offset, of zero data into the VHD file.
- * We reuse the existing write functions, with a preallocated zero buffer as
- * our source buffer.
- *
- * \param [in] vhdm MiniVHD data structure
- * \param [in] offset the sector offset from which to start writing to
- * \param [in] num_sectors the number of sectors to write
- *
- * \return the number of sectors that were not written, or zero
- */
-int mvhd_format_sectors(MVHDMeta* vhdm, uint32_t offset, int num_sectors);
-#endif
diff --git a/src/minivhd/minivhd_convert.c b/src/minivhd/minivhd_convert.c
deleted file mode 100644
index 1b4f4f0..0000000
--- a/src/minivhd/minivhd_convert.c
+++ /dev/null
@@ -1,108 +0,0 @@
-#ifndef _FILE_OFFSET_BITS
-#define _FILE_OFFSET_BITS 64
-#endif
-#include
-#include
-#include
-#include
-#include
-#include "minivhd_create.h"
-#include "minivhd_internal.h"
-#include "minivhd_util.h"
-#include "minivhd.h"
-
-static FILE* mvhd_open_existing_raw_img(const char* utf8_raw_path, MVHDGeom* geom, int* err);
-
-static FILE* mvhd_open_existing_raw_img(const char* utf8_raw_path, MVHDGeom* geom, int* err) {
- FILE *raw_img = mvhd_fopen(utf8_raw_path, "rb", err);
- if (raw_img == NULL) {
- *err = MVHD_ERR_FILE;
- return NULL;
- }
- if (geom == NULL) {
- *err = MVHD_ERR_INVALID_GEOM;
- return NULL;
- }
- mvhd_fseeko64(raw_img, 0, SEEK_END);
- uint64_t size_bytes = (uint64_t)mvhd_ftello64(raw_img);
- MVHDGeom new_geom = mvhd_calculate_geometry(size_bytes);
- if (mvhd_calc_size_bytes(&new_geom) != size_bytes) {
- *err = MVHD_ERR_CONV_SIZE;
- return NULL;
- }
- geom->cyl = new_geom.cyl;
- geom->heads = new_geom.heads;
- geom->spt = new_geom.spt;
- mvhd_fseeko64(raw_img, 0, SEEK_SET);
- return raw_img;
-}
-
-MVHDMeta* mvhd_convert_to_vhd_fixed(const char* utf8_raw_path, const char* utf8_vhd_path, int* err) {
- MVHDGeom geom;
- FILE *raw_img = mvhd_open_existing_raw_img(utf8_raw_path, &geom, err);
- if (raw_img == NULL) {
- return NULL;
- }
- uint64_t size_in_bytes = mvhd_calc_size_bytes(&geom);
- MVHDMeta *vhdm = mvhd_create_fixed_raw(utf8_vhd_path, raw_img, size_in_bytes, &geom, err, NULL);
- if (vhdm == NULL) {
- return NULL;
- }
- return vhdm;
-}
-MVHDMeta* mvhd_convert_to_vhd_sparse(const char* utf8_raw_path, const char* utf8_vhd_path, int* err) {
- MVHDGeom geom;
- MVHDMeta *vhdm = NULL;
- FILE *raw_img = mvhd_open_existing_raw_img(utf8_raw_path, &geom, err);
- if (raw_img == NULL) {
- return NULL;
- }
- vhdm = mvhd_create_sparse(utf8_vhd_path, geom, err);
- if (vhdm == NULL) {
- goto end;
- }
- uint8_t buff[4096] = {0}; // 8 sectors
- uint8_t empty_buff[4096] = {0};
- int total_sectors = mvhd_calc_size_sectors(&geom);
- int copy_sect = 0, i;
- for (i = 0; i < total_sectors; i += 8) {
- copy_sect = 8;
- if ((i + 8) >= total_sectors) {
- copy_sect = total_sectors - i;
- memset(buff, 0, sizeof buff);
- }
- fread(buff, MVHD_SECTOR_SIZE, copy_sect, raw_img);
- /* Only write data if there's data to write, to take advantage of the sparse VHD format */
- if (memcmp(buff, empty_buff, sizeof buff) != 0) {
- mvhd_write_sectors(vhdm, i, copy_sect, buff);
- }
- }
-end:
- fclose(raw_img);
- return vhdm;
-}
-FILE* mvhd_convert_to_raw(const char* utf8_vhd_path, const char* utf8_raw_path, int *err) {
- FILE *raw_img = mvhd_fopen(utf8_raw_path, "wb", err);
- if (raw_img == NULL) {
- return NULL;
- }
- MVHDMeta *vhdm = mvhd_open(utf8_vhd_path, true, err);
- if (vhdm == NULL) {
- fclose(raw_img);
- return NULL;
- }
- uint8_t buff[4096] = {0}; // 8 sectors
- int total_sectors = mvhd_calc_size_sectors((MVHDGeom*)&vhdm->footer.geom);
- int copy_sect = 0, i;
- for (i = 0; i < total_sectors; i += 8) {
- copy_sect = 8;
- if ((i + 8) >= total_sectors) {
- copy_sect = total_sectors - i;
- }
- mvhd_read_sectors(vhdm, i, copy_sect, buff);
- fwrite(buff, MVHD_SECTOR_SIZE, copy_sect, raw_img);
- }
- mvhd_close(vhdm);
- mvhd_fseeko64(raw_img, 0, SEEK_SET);
- return raw_img;
-}
diff --git a/src/minivhd/minivhd_create.c b/src/minivhd/minivhd_create.c
deleted file mode 100644
index 9bb63c1..0000000
--- a/src/minivhd/minivhd_create.c
+++ /dev/null
@@ -1,488 +0,0 @@
-#ifndef _FILE_OFFSET_BITS
-#define _FILE_OFFSET_BITS 64
-#endif
-#include
-#include
-#include
-#include
-#include
-#include "cwalk.h"
-#include "libxml2_encoding.h"
-#include "minivhd_internal.h"
-#include "minivhd_util.h"
-#include "minivhd_struct_rw.h"
-#include "minivhd_io.h"
-#include "minivhd_create.h"
-#include "minivhd.h"
-
-static void mvhd_gen_footer(MVHDFooter* footer, uint64_t size_in_bytes, MVHDGeom* geom, MVHDType type, uint64_t sparse_header_off);
-static void mvhd_gen_sparse_header(MVHDSparseHeader* header, uint32_t num_blks, uint64_t bat_offset, uint32_t block_size_in_sectors);
-static int mvhd_gen_par_loc(MVHDSparseHeader* header,
- const char* child_path,
- const char* par_path,
- uint64_t start_offset,
- mvhd_utf16* w2ku_path_buff,
- mvhd_utf16* w2ru_path_buff,
- MVHDError* err);
-static MVHDMeta* mvhd_create_sparse_diff(const char* path, const char* par_path, uint64_t size_in_bytes, MVHDGeom* geom, uint32_t block_size_in_sectors, int* err);
-
-/**
- * \brief Populate a VHD footer
- *
- * \param [in] footer to populate
- * \param [in] size_in_bytes is the total size of the virtual hard disk in bytes
- * \param [in] geom to use
- * \param [in] type of HVD that is being created
- * \param [in] sparse_header_off, an absolute file offset to the sparse header. Not used for fixed VHD images
- */
-static void mvhd_gen_footer(MVHDFooter* footer, uint64_t size_in_bytes, MVHDGeom* geom, MVHDType type, uint64_t sparse_header_off) {
- memcpy(footer->cookie, "conectix", sizeof footer->cookie);
- footer->features = 0x00000002;
- footer->fi_fmt_vers = 0x00010000;
- footer->data_offset = (type == MVHD_TYPE_DIFF || type == MVHD_TYPE_DYNAMIC) ? sparse_header_off : 0xffffffffffffffff;
- footer->timestamp = vhd_calc_timestamp();
- memcpy(footer->cr_app, "mvhd", sizeof footer->cr_app);
- footer->cr_vers = 0x000e0000;
- memcpy(footer->cr_host_os, "Wi2k", sizeof footer->cr_host_os);
- footer->orig_sz = footer->curr_sz = size_in_bytes;
- footer->geom.cyl = geom->cyl;
- footer->geom.heads = geom->heads;
- footer->geom.spt = geom->spt;
- footer->disk_type = type;
- mvhd_generate_uuid(footer->uuid);
- footer->checksum = mvhd_gen_footer_checksum(footer);
-}
-
-/**
- * \brief Populate a VHD sparse header
- *
- * \param [in] header for sparse and differencing images
- * \param [in] num_blks is the number of data blocks that the image contains
- * \param [in] bat_offset is the absolute file offset for start of the Block Allocation Table
- * \param [in] block_size_in_sectors is the block size in sectors.
- */
-static void mvhd_gen_sparse_header(MVHDSparseHeader* header, uint32_t num_blks, uint64_t bat_offset, uint32_t block_size_in_sectors) {
- memcpy(header->cookie, "cxsparse", sizeof header->cookie);
- header->data_offset = 0xffffffffffffffff;
- header->bat_offset = bat_offset;
- header->head_vers = 0x00010000;
- header->max_bat_ent = num_blks;
- header->block_sz = block_size_in_sectors * (uint32_t)MVHD_SECTOR_SIZE;
- header->checksum = mvhd_gen_sparse_checksum(header);
-}
-
-/**
- * \brief Generate parent locators for differencing VHD images
- *
- * \param [in] header the sparse header to populate with parent locator entries
- * \param [in] child_path is the full path to the VHD being created
- * \param [in] par_path is the full path to the parent image
- * \param [in] start_offset is the absolute file offset from where to start storing the entries themselves. Must be sector aligned.
- * \param [out] w2ku_path_buff is a buffer containing the full path to the parent, encoded as UTF16-LE
- * \param [out] w2ru_path_buff is a buffer containing the relative path to the parent, encoded as UTF16-LE
- * \param [out] err indicates what error occurred, if any
- *
- * \retval 0 if success
- * \retval < 0 if an error occurrs. Check value of *err for actual error
- */
-static int mvhd_gen_par_loc(MVHDSparseHeader* header,
- const char* child_path,
- const char* par_path,
- uint64_t start_offset,
- mvhd_utf16* w2ku_path_buff,
- mvhd_utf16* w2ru_path_buff,
- MVHDError* err) {
- /* Get our paths to store in the differencing VHD. We want both the absolute path to the parent,
- as well as the relative path from the child VHD */
- int rv = 0;
- char* par_filename;
- size_t par_fn_len;
- char rel_path[MVHD_MAX_PATH_BYTES] = {0};
- char child_dir[MVHD_MAX_PATH_BYTES] = {0};
- size_t child_dir_len;
- if (strlen(child_path) < sizeof child_dir) {
- strcpy(child_dir, child_path);
- } else {
- *err = MVHD_ERR_PATH_LEN;
- rv = -1;
- goto end;
- }
- cwk_path_get_basename(par_path, (const char**)&par_filename, &par_fn_len);
- cwk_path_get_dirname(child_dir, &child_dir_len);
- child_dir[child_dir_len] = '\0';
- size_t rel_len = cwk_path_get_relative(child_dir, par_path, rel_path, sizeof rel_path);
- if (rel_len > sizeof rel_path) {
- *err = MVHD_ERR_PATH_LEN;
- rv = -1;
- goto end;
- }
- /* We have our paths, now store the parent filename directly in the sparse header. */
- int outlen = sizeof header->par_utf16_name;
- int utf_ret;
- utf_ret = UTF8ToUTF16BE((unsigned char*)header->par_utf16_name, &outlen, (const unsigned char*)par_filename, (int*)&par_fn_len);
- if (utf_ret < 0) {
- mvhd_set_encoding_err(utf_ret, (int*)err);
- rv = -1;
- goto end;
- }
-
- /* And encode the paths to UTF16-LE */
- size_t par_path_len = strlen(par_path);
- outlen = sizeof *w2ku_path_buff * MVHD_MAX_PATH_CHARS;
- utf_ret = UTF8ToUTF16LE((unsigned char*)w2ku_path_buff, &outlen, (const unsigned char*)par_path, (int*)&par_path_len);
- if (utf_ret < 0) {
- mvhd_set_encoding_err(utf_ret, (int*)err);
- rv = -1;
- goto end;
- }
- int w2ku_len = utf_ret;
- outlen = sizeof *w2ru_path_buff * MVHD_MAX_PATH_CHARS;
- utf_ret = UTF8ToUTF16LE((unsigned char*)w2ru_path_buff, &outlen, (const unsigned char*)rel_path, (int*)&rel_len);
- if (utf_ret < 0) {
- mvhd_set_encoding_err(utf_ret, (int*)err);
- rv = -1;
- goto end;
- }
- int w2ru_len = utf_ret;
- /**
- * Finally populate the parent locaters in the sparse header.
- * This is the information needed to find the paths saved elsewhere
- * in the VHD image
- */
-
- /* Note about the plat_data_space field: The VHD spec says this field stores the number of sectors needed to store the locator path.
- * However, Hyper-V and VPC store the number of bytes, not the number of sectors, and will refuse to open VHDs which have the
- * number of sectors in this field.
- * See https://stackoverflow.com/questions/40760181/mistake-in-virtual-hard-disk-image-format-specification
- */
- header->par_loc_entry[0].plat_code = MVHD_DIF_LOC_W2KU;
- header->par_loc_entry[0].plat_data_len = (uint32_t)w2ku_len;
- header->par_loc_entry[0].plat_data_offset = (uint64_t)start_offset;
- header->par_loc_entry[0].plat_data_space = ((header->par_loc_entry[0].plat_data_len / MVHD_SECTOR_SIZE) + 1) * MVHD_SECTOR_SIZE;
- header->par_loc_entry[1].plat_code = MVHD_DIF_LOC_W2RU;
- header->par_loc_entry[1].plat_data_len = (uint32_t)w2ru_len;
- header->par_loc_entry[1].plat_data_offset = (uint64_t)start_offset + ((uint64_t)header->par_loc_entry[0].plat_data_space);
- header->par_loc_entry[1].plat_data_space = ((header->par_loc_entry[1].plat_data_len / MVHD_SECTOR_SIZE) + 1) * MVHD_SECTOR_SIZE;
- goto end;
-
-end:
- return rv;
-}
-
-MVHDMeta* mvhd_create_fixed(const char* path, MVHDGeom geom, int* err, mvhd_progress_callback progress_callback) {
- uint64_t size_in_bytes = mvhd_calc_size_bytes(&geom);
- return mvhd_create_fixed_raw(path, NULL, size_in_bytes, &geom, err, progress_callback);
-}
-
-/**
- * \brief internal function that implements public mvhd_create_fixed() functionality
- *
- * Contains one more parameter than the public function, to allow using an existing
- * raw disk image as the data source for the new fixed VHD.
- *
- * \param [in] raw_image file handle to a raw disk image to populate VHD
- */
-MVHDMeta* mvhd_create_fixed_raw(const char* path, FILE* raw_img, uint64_t size_in_bytes, MVHDGeom* geom, int* err, mvhd_progress_callback progress_callback) {
- uint8_t img_data[MVHD_SECTOR_SIZE] = {0};
- uint8_t footer_buff[MVHD_FOOTER_SIZE] = {0};
- MVHDMeta* vhdm = calloc(1, sizeof *vhdm);
- if (vhdm == NULL) {
- *err = MVHD_ERR_MEM;
- goto end;
- }
- if (geom == NULL || (geom->cyl == 0 || geom->heads == 0 || geom->spt == 0)) {
- *err = MVHD_ERR_INVALID_GEOM;
- goto cleanup_vhdm;
- }
- FILE* f = mvhd_fopen(path, "wb+", err);
- if (f == NULL) {
- goto cleanup_vhdm;
- }
- mvhd_fseeko64(f, 0, SEEK_SET);
- uint32_t size_sectors = (uint32_t)(size_in_bytes / MVHD_SECTOR_SIZE);
- uint32_t s;
- if (progress_callback)
- progress_callback(0, size_sectors);
- if (raw_img != NULL) {
- mvhd_fseeko64(raw_img, 0, SEEK_END);
- uint64_t raw_size = (uint64_t)mvhd_ftello64(raw_img);
- MVHDGeom raw_geom = mvhd_calculate_geometry(raw_size);
- if (mvhd_calc_size_bytes(&raw_geom) != raw_size) {
- *err = MVHD_ERR_CONV_SIZE;
- goto cleanup_vhdm;
- }
- mvhd_gen_footer(&vhdm->footer, raw_size, geom, MVHD_TYPE_FIXED, 0);
- mvhd_fseeko64(raw_img, 0, SEEK_SET);
- for (s = 0; s < size_sectors; s++) {
- fread(img_data, sizeof img_data, 1, raw_img);
- fwrite(img_data, sizeof img_data, 1, f);
- if (progress_callback)
- progress_callback(s + 1, size_sectors);
- }
- } else {
- mvhd_gen_footer(&vhdm->footer, size_in_bytes, geom, MVHD_TYPE_FIXED, 0);
- for (s = 0; s < size_sectors; s++) {
- fwrite(img_data, sizeof img_data, 1, f);
- if (progress_callback)
- progress_callback(s + 1, size_sectors);
- }
- }
- mvhd_footer_to_buffer(&vhdm->footer, footer_buff);
- fwrite(footer_buff, sizeof footer_buff, 1, f);
- fclose(f);
- f = NULL;
- free(vhdm);
- vhdm = mvhd_open(path, false, err);
- goto end;
-
-cleanup_vhdm:
- free(vhdm);
- vhdm = NULL;
-end:
- return vhdm;
-}
-
-/**
- * \brief Create sparse or differencing VHD image.
- *
- * \param [in] path is the absolute path to the VHD file to create
- * \param [in] par_path is the absolute path to a parent image. If NULL, a sparse image is created, otherwise create a differencing image
- * \param [in] size_in_bytes is the total size in bytes of the virtual hard disk image
- * \param [in] geom is the HDD geometry of the image to create. Determines final image size
- * \param [in] block_size_in_sectors is the block size in sectors
- * \param [out] err indicates what error occurred, if any
- *
- * \return NULL if an error occurrs. Check value of *err for actual error. Otherwise returns pointer to a MVHDMeta struct
- */
-static MVHDMeta* mvhd_create_sparse_diff(const char* path, const char* par_path, uint64_t size_in_bytes, MVHDGeom* geom, uint32_t block_size_in_sectors, int* err) {
- uint8_t footer_buff[MVHD_FOOTER_SIZE] = {0};
- uint8_t sparse_buff[MVHD_SPARSE_SIZE] = {0};
- uint8_t bat_sect[MVHD_SECTOR_SIZE];
- MVHDGeom par_geom = {0};
- memset(bat_sect, 0xffffffff, sizeof bat_sect);
- MVHDMeta* vhdm = NULL;
- MVHDMeta* par_vhdm = NULL;
- mvhd_utf16* w2ku_path_buff = NULL;
- mvhd_utf16* w2ru_path_buff = NULL;
- uint32_t par_mod_timestamp = 0;
- if (par_path != NULL) {
- par_mod_timestamp = mvhd_file_mod_timestamp(par_path, err);
- if (*err != 0) {
- goto end;
- }
- par_vhdm = mvhd_open(par_path, true, err);
- if (par_vhdm == NULL) {
- goto end;
- }
- }
- vhdm = calloc(1, sizeof *vhdm);
- if (vhdm == NULL) {
- *err = MVHD_ERR_MEM;
- goto cleanup_par_vhdm;
- }
- if (par_vhdm != NULL) {
- /* We use the geometry from the parent VHD, not what was passed in */
- par_geom.cyl = par_vhdm->footer.geom.cyl;
- par_geom.heads = par_vhdm->footer.geom.heads;
- par_geom.spt = par_vhdm->footer.geom.spt;
- geom = &par_geom;
- size_in_bytes = par_vhdm->footer.curr_sz;
- } else if (geom == NULL || (geom->cyl == 0 || geom->heads == 0 || geom->spt == 0)) {
- *err = MVHD_ERR_INVALID_GEOM;
- goto cleanup_vhdm;
- }
-
- FILE* f = mvhd_fopen(path, "wb+", err);
- if (f == NULL) {
- goto cleanup_vhdm;
- }
- mvhd_fseeko64(f, 0, SEEK_SET);
- /* Note, the sparse header follows the footer copy at the beginning of the file */
- if (par_path == NULL) {
- mvhd_gen_footer(&vhdm->footer, size_in_bytes, geom, MVHD_TYPE_DYNAMIC, MVHD_FOOTER_SIZE);
- } else {
- mvhd_gen_footer(&vhdm->footer, size_in_bytes, geom, MVHD_TYPE_DIFF, MVHD_FOOTER_SIZE);
- }
- mvhd_footer_to_buffer(&vhdm->footer, footer_buff);
- /* As mentioned, start with a copy of the footer */
- fwrite(footer_buff, sizeof footer_buff, 1, f);
- /**
- * Calculate the number of (2MB or 512KB) data blocks required to store the entire
- * contents of the disk image, followed by the number of sectors the
- * BAT occupies in the image. Note, the BAT is sector aligned, and is padded
- * to the next sector boundary
- * */
- uint32_t size_in_sectors = (uint32_t)(size_in_bytes / MVHD_SECTOR_SIZE);
- uint32_t num_blks = size_in_sectors / block_size_in_sectors;
- if (size_in_sectors % block_size_in_sectors != 0) {
- num_blks += 1;
- }
- uint32_t num_bat_sect = num_blks / MVHD_BAT_ENT_PER_SECT;
- if (num_blks % MVHD_BAT_ENT_PER_SECT != 0) {
- num_bat_sect += 1;
- }
- /* Storing the BAT directly following the footer and header */
- uint64_t bat_offset = MVHD_FOOTER_SIZE + MVHD_SPARSE_SIZE;
- uint64_t par_loc_offset = 0;
-
- /**
- * If creating a differencing VHD, populate the sparse header with additional
- * data about the parent image, and where to find it, and it's last modified timestamp
- * */
- if (par_vhdm != NULL) {
- /**
- * Create output buffers to encode paths into.
- * The paths are not stored directly in the sparse header, hence the need to
- * store them in buffers to be written to the VHD image later
- */
- w2ku_path_buff = calloc(MVHD_MAX_PATH_CHARS, sizeof * w2ku_path_buff);
- if (w2ku_path_buff == NULL) {
- *err = MVHD_ERR_MEM;
- goto end;
- }
- w2ru_path_buff = calloc(MVHD_MAX_PATH_CHARS, sizeof * w2ru_path_buff);
- if (w2ru_path_buff == NULL) {
- *err = MVHD_ERR_MEM;
- goto end;
- }
- memcpy(vhdm->sparse.par_uuid, par_vhdm->footer.uuid, sizeof vhdm->sparse.par_uuid);
- par_loc_offset = bat_offset + ((uint64_t)num_bat_sect * MVHD_SECTOR_SIZE) + (5 * MVHD_SECTOR_SIZE);
- if (mvhd_gen_par_loc(&vhdm->sparse, path, par_path, par_loc_offset, w2ku_path_buff, w2ru_path_buff, (MVHDError*)err) < 0) {
- goto cleanup_vhdm;
- }
- vhdm->sparse.par_timestamp = par_mod_timestamp;
- }
- mvhd_gen_sparse_header(&vhdm->sparse, num_blks, bat_offset, block_size_in_sectors);
- mvhd_header_to_buffer(&vhdm->sparse, sparse_buff);
- fwrite(sparse_buff, sizeof sparse_buff, 1, f);
- /* The BAT sectors need to be filled with 0xffffffff */
- uint32_t i;
- for (i = 0; i < num_bat_sect; i++) {
- fwrite(bat_sect, sizeof bat_sect, 1, f);
- }
- mvhd_write_empty_sectors(f, 5);
- /**
- * If creating a differencing VHD, the paths to the parent image need to be written
- * tp the file. Both absolute and relative paths are written
- * */
- if (par_vhdm != NULL) {
- uint64_t curr_pos = (uint64_t)mvhd_ftello64(f);
- /* Double check my sums... */
- assert(curr_pos == par_loc_offset);
- /* Fill the space required for location data with zero */
- uint8_t empty_sect[MVHD_SECTOR_SIZE] = {0};
- int i;
- uint32_t j;
- for (i = 0; i < 2; i++) {
- for (j = 0; j < (vhdm->sparse.par_loc_entry[i].plat_data_space / MVHD_SECTOR_SIZE); j++) {
- fwrite(empty_sect, sizeof empty_sect, 1, f);
- }
- }
- /* Now write the location entries */
- mvhd_fseeko64(f, vhdm->sparse.par_loc_entry[0].plat_data_offset, SEEK_SET);
- fwrite(w2ku_path_buff, vhdm->sparse.par_loc_entry[0].plat_data_len, 1, f);
- mvhd_fseeko64(f, vhdm->sparse.par_loc_entry[1].plat_data_offset, SEEK_SET);
- fwrite(w2ru_path_buff, vhdm->sparse.par_loc_entry[1].plat_data_len, 1, f);
- /* and reset the file position to continue */
- mvhd_fseeko64(f, vhdm->sparse.par_loc_entry[1].plat_data_offset + vhdm->sparse.par_loc_entry[1].plat_data_space, SEEK_SET);
- mvhd_write_empty_sectors(f, 5);
- }
- /* And finish with the footer */
- fwrite(footer_buff, sizeof footer_buff, 1, f);
- fclose(f);
- f = NULL;
- free(vhdm);
- vhdm = mvhd_open(path, false, err);
- goto end;
-
-cleanup_vhdm:
- free(vhdm);
- vhdm = NULL;
-cleanup_par_vhdm:
- if (par_vhdm != NULL) {
- mvhd_close(par_vhdm);
- }
-end:
- free(w2ku_path_buff);
- free(w2ru_path_buff);
- return vhdm;
-}
-
-MVHDMeta* mvhd_create_sparse(const char* path, MVHDGeom geom, int* err) {
- uint64_t size_in_bytes = mvhd_calc_size_bytes(&geom);
- return mvhd_create_sparse_diff(path, NULL, size_in_bytes, &geom, MVHD_BLOCK_LARGE, err);
-}
-
-MVHDMeta* mvhd_create_diff(const char* path, const char* par_path, int* err) {
- return mvhd_create_sparse_diff(path, par_path, 0, NULL, MVHD_BLOCK_LARGE, err);
-}
-
-MVHDMeta* mvhd_create_ex(MVHDCreationOptions options, int* err) {
- uint32_t geom_sector_size;
- switch (options.type)
- {
- case MVHD_TYPE_FIXED:
- case MVHD_TYPE_DYNAMIC:
- geom_sector_size = mvhd_calc_size_sectors(&(options.geometry));
- if ((options.size_in_bytes > 0 && (options.size_in_bytes % MVHD_SECTOR_SIZE) > 0)
- || (options.size_in_bytes > MVHD_MAX_SIZE_IN_BYTES)
- || (options.size_in_bytes == 0 && geom_sector_size == 0))
- {
- *err = MVHD_ERR_INVALID_SIZE;
- return NULL;
- }
-
- if (options.size_in_bytes > 0 && ((uint64_t)geom_sector_size * MVHD_SECTOR_SIZE) > options.size_in_bytes)
- {
- *err = MVHD_ERR_INVALID_GEOM;
- return NULL;
- }
-
- if (options.size_in_bytes == 0)
- options.size_in_bytes = (uint64_t)geom_sector_size * MVHD_SECTOR_SIZE;
-
- if (geom_sector_size == 0)
- options.geometry = mvhd_calculate_geometry(options.size_in_bytes);
- break;
- case MVHD_TYPE_DIFF:
- if (options.parent_path == NULL)
- {
- *err = MVHD_ERR_FILE;
- return NULL;
- }
- break;
- default:
- *err = MVHD_ERR_TYPE;
- return NULL;
- }
-
- if (options.path == NULL)
- {
- *err = MVHD_ERR_FILE;
- return NULL;
- }
-
- if (options.type != MVHD_TYPE_FIXED)
- {
- if (options.block_size_in_sectors == MVHD_BLOCK_DEFAULT)
- options.block_size_in_sectors = MVHD_BLOCK_LARGE;
-
- if (options.block_size_in_sectors != MVHD_BLOCK_LARGE && options.block_size_in_sectors != MVHD_BLOCK_SMALL)
- {
- *err = MVHD_ERR_INVALID_BLOCK_SIZE;
- return NULL;
- }
- }
-
- switch (options.type)
- {
- case MVHD_TYPE_FIXED:
- return mvhd_create_fixed_raw(options.path, NULL, options.size_in_bytes, &(options.geometry), err, options.progress_callback);
- case MVHD_TYPE_DYNAMIC:
- return mvhd_create_sparse_diff(options.path, NULL, options.size_in_bytes, &(options.geometry), options.block_size_in_sectors, err);
- case MVHD_TYPE_DIFF:
- return mvhd_create_sparse_diff(options.path, options.parent_path, 0, NULL, options.block_size_in_sectors, err);
- }
-
- return NULL; /* Make the compiler happy */
-}
diff --git a/src/minivhd/minivhd_create.h b/src/minivhd/minivhd_create.h
deleted file mode 100644
index 203834a..0000000
--- a/src/minivhd/minivhd_create.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#ifndef MINIVHD_CREATE_H
-#define MINIVHD_CREATE_H
-#include
-#include "minivhd.h"
-
-MVHDMeta* mvhd_create_fixed_raw(const char* path, FILE* raw_img, uint64_t size_in_bytes, MVHDGeom* geom, int* err, mvhd_progress_callback progress_callback);
-
-#endif
diff --git a/src/minivhd/minivhd_internal.h b/src/minivhd/minivhd_internal.h
deleted file mode 100644
index f42ca58..0000000
--- a/src/minivhd/minivhd_internal.h
+++ /dev/null
@@ -1,96 +0,0 @@
-#ifndef MINIVHD_INTERNAL_H
-#define MINIVHD_INTERNAL_H
-#include
-#include
-#include
-#include "minivhd.h" /* Pull in the MVHDMeta typedef */
-
-#define MVHD_FOOTER_SIZE 512
-#define MVHD_SPARSE_SIZE 1024
-
-#define MVHD_SECTOR_SIZE 512
-#define MVHD_BAT_ENT_PER_SECT 128
-
-#define MVHD_MAX_SIZE_IN_BYTES 0x1fe00000000
-
-#define MVHD_SPARSE_BLK 0xffffffff
-/* For simplicity, we don't handle paths longer than this
- * Note, this is the max path in characters, as that is what
- * Windows uses
- */
-#define MVHD_MAX_PATH_CHARS 260
-#define MVHD_MAX_PATH_BYTES 1040
-
-#define MVHD_DIF_LOC_W2RU 0x57327275
-#define MVHD_DIF_LOC_W2KU 0x57326B75
-
-typedef struct MVHDSectorBitmap {
- uint8_t* curr_bitmap;
- int sector_count;
- int curr_block;
-} MVHDSectorBitmap;
-
-typedef struct MVHDFooter {
- uint8_t cookie[8];
- uint32_t features;
- uint32_t fi_fmt_vers;
- uint64_t data_offset;
- uint32_t timestamp;
- uint8_t cr_app[4];
- uint32_t cr_vers;
- uint8_t cr_host_os[4];
- uint64_t orig_sz;
- uint64_t curr_sz;
- struct {
- uint16_t cyl;
- uint8_t heads;
- uint8_t spt;
- } geom;
- uint32_t disk_type;
- uint32_t checksum;
- uint8_t uuid[16];
- uint8_t saved_st;
- uint8_t reserved[427];
-} MVHDFooter;
-
-typedef struct MVHDSparseHeader {
- uint8_t cookie[8];
- uint64_t data_offset;
- uint64_t bat_offset;
- uint32_t head_vers;
- uint32_t max_bat_ent;
- uint32_t block_sz;
- uint32_t checksum;
- uint8_t par_uuid[16];
- uint32_t par_timestamp;
- uint32_t reserved_1;
- uint8_t par_utf16_name[512];
- struct {
- uint32_t plat_code;
- uint32_t plat_data_space;
- uint32_t plat_data_len;
- uint32_t reserved;
- uint64_t plat_data_offset;
- } par_loc_entry[8];
- uint8_t reserved_2[256];
-} MVHDSparseHeader;
-
-struct MVHDMeta {
- FILE* f;
- bool readonly;
- char filename[MVHD_MAX_PATH_BYTES];
- struct MVHDMeta* parent;
- MVHDFooter footer;
- MVHDSparseHeader sparse;
- uint32_t* block_offset;
- int sect_per_block;
- MVHDSectorBitmap bitmap;
- int (*read_sectors)(MVHDMeta*, uint32_t, int, void*);
- int (*write_sectors)(MVHDMeta*, uint32_t, int, void*);
- struct {
- uint8_t* zero_data;
- int sector_count;
- } format_buffer;
-};
-
-#endif
diff --git a/src/minivhd/minivhd_io.c b/src/minivhd/minivhd_io.c
deleted file mode 100644
index c21f68d..0000000
--- a/src/minivhd/minivhd_io.c
+++ /dev/null
@@ -1,281 +0,0 @@
-/**
- * \file
- * \brief Sector reading and writing implementations
- */
-
-#ifndef _FILE_OFFSET_BITS
-#define _FILE_OFFSET_BITS 64
-#endif
-#include
-#include
-#include "minivhd_internal.h"
-#include "minivhd_util.h"
-
-/* The following bit array macros adapted from
- http://www.mathcs.emory.edu/~cheung/Courses/255/Syllabus/1-C-intro/bit-array.html */
-
-#define VHD_SETBIT(A,k) ( A[(k/8)] |= (0x80 >> (k%8)) )
-#define VHD_CLEARBIT(A,k) ( A[(k/8)] &= ~(0x80 >> (k%8)) )
-#define VHD_TESTBIT(A,k) ( A[(k/8)] & (0x80 >> (k%8)) )
-
-static inline void mvhd_check_sectors(uint32_t offset, int num_sectors, uint32_t total_sectors, int* transfer_sect, int* trunc_sect);
-static void mvhd_read_sect_bitmap(MVHDMeta* vhdm, int blk);
-static void mvhd_write_bat_entry(MVHDMeta* vhdm, int blk);
-static void mvhd_create_block(MVHDMeta* vhdm, int blk);
-static void mvhd_write_curr_sect_bitmap(MVHDMeta* vhdm);
-
-/**
- * \brief Check that we will not be overflowing buffers
- *
- * \param [in] offset The offset from which we are beginning from
- * \param [in] num_sectors The number of sectors which we desire to read/write
- * \param [in] total_sectors The total number of sectors available
- * \param [out] transfer_sect The number of sectors to actually write.
- * This may be lower than num_sectors if offset + num_sectors >= total_sectors
- * \param [out] trunc_sectors The number of sectors truncated if transfer_sectors < num_sectors
- */
-static inline void mvhd_check_sectors(uint32_t offset, int num_sectors, uint32_t total_sectors, int* transfer_sect, int* trunc_sect) {
- *transfer_sect = num_sectors;
- *trunc_sect = 0;
- if ((total_sectors - offset) < (uint32_t)*transfer_sect) {
- *transfer_sect = total_sectors - offset;
- *trunc_sect = num_sectors - *transfer_sect;
- }
-}
-
-void mvhd_write_empty_sectors(FILE* f, int sector_count) {
- uint8_t zero_bytes[MVHD_SECTOR_SIZE] = {0};
- int i;
- for (i = 0; i < sector_count; i++) {
- fwrite(zero_bytes, sizeof zero_bytes, 1, f);
- }
-}
-
-/**
- * \brief Read the sector bitmap for a block.
- *
- * If the block is sparse, the sector bitmap in memory will be
- * zeroed. Otherwise, the sector bitmap is read from the VHD file.
- *
- * \param [in] vhdm MiniVHD data structure
- * \param [in] blk The block for which to read the sector bitmap from
- */
-static void mvhd_read_sect_bitmap(MVHDMeta* vhdm, int blk) {
- if (vhdm->block_offset[blk] != MVHD_SPARSE_BLK) {
- mvhd_fseeko64(vhdm->f, (uint64_t)vhdm->block_offset[blk] * MVHD_SECTOR_SIZE, SEEK_SET);
- fread(vhdm->bitmap.curr_bitmap, vhdm->bitmap.sector_count * MVHD_SECTOR_SIZE, 1, vhdm->f);
- } else {
- memset(vhdm->bitmap.curr_bitmap, 0, vhdm->bitmap.sector_count * MVHD_SECTOR_SIZE);
- }
- vhdm->bitmap.curr_block = blk;
-}
-
-/**
- * \brief Write the current sector bitmap in memory to file
- *
- * \param [in] vhdm MiniVHD data structure
- */
-static void mvhd_write_curr_sect_bitmap(MVHDMeta* vhdm) {
- if (vhdm->bitmap.curr_block >= 0) {
- int64_t abs_offset = (int64_t)vhdm->block_offset[vhdm->bitmap.curr_block] * MVHD_SECTOR_SIZE;
- mvhd_fseeko64(vhdm->f, abs_offset, SEEK_SET);
- fwrite(vhdm->bitmap.curr_bitmap, MVHD_SECTOR_SIZE, vhdm->bitmap.sector_count, vhdm->f);
- }
-}
-
-/**
- * \brief Write block offset from memory into file
- *
- * \param [in] vhdm MiniVHD data structure
- * \param [in] blk The block for which to write the offset for
- */
-static void mvhd_write_bat_entry(MVHDMeta* vhdm, int blk) {
- uint64_t table_offset = vhdm->sparse.bat_offset + ((uint64_t)blk * sizeof *vhdm->block_offset);
- uint32_t offset = mvhd_to_be32(vhdm->block_offset[blk]);
- mvhd_fseeko64(vhdm->f, table_offset, SEEK_SET);
- fwrite(&offset, sizeof offset, 1, vhdm->f);
-}
-
-/**
- * \brief Create an empty block in a sparse or differencing VHD image
- *
- * VHD images store data in blocks, which are typically 4096 sectors in size
- * (~2MB). These blocks may be stored on disk in any order. Blocks are created
- * on demand when required.
- *
- * This function creates new, empty blocks, by replacing the footer at the end of the file
- * and then re-inserting the footer at the new file end. The BAT table entry for the
- * new block is updated with the new offset.
- *
- * \param [in] vhdm MiniVHD data structure
- * \param [in] blk The block number to create
- */
-static void mvhd_create_block(MVHDMeta* vhdm, int blk) {
- uint8_t footer[MVHD_FOOTER_SIZE];
- /* Seek to where the footer SHOULD be */
- mvhd_fseeko64(vhdm->f, -MVHD_FOOTER_SIZE, SEEK_END);
- fread(footer, sizeof footer, 1, vhdm->f);
- mvhd_fseeko64(vhdm->f, -MVHD_FOOTER_SIZE, SEEK_END);
- if (!mvhd_is_conectix_str(footer)) {
- /* Oh dear. We use the header instead, since something has gone wrong at the footer */
- mvhd_fseeko64(vhdm->f, 0, SEEK_SET);
- fread(footer, sizeof footer, 1, vhdm->f);
- mvhd_fseeko64(vhdm->f, 0, SEEK_END);
- }
- int64_t abs_offset = mvhd_ftello64(vhdm->f);
- if (abs_offset % MVHD_SECTOR_SIZE != 0) {
- /* Yikes! We're supposed to be on a sector boundary. Add some padding */
- int64_t padding_amount = (int64_t)MVHD_SECTOR_SIZE - (abs_offset % MVHD_SECTOR_SIZE);
- uint8_t zero_byte = 0;
- int i;
- for (i = 0; i < padding_amount; i++) {
- fwrite(&zero_byte, sizeof zero_byte, 1, vhdm->f);
- }
- abs_offset += padding_amount;
- }
- uint32_t sect_offset = (uint32_t)(abs_offset / MVHD_SECTOR_SIZE);
- int blk_size_sectors = vhdm->sparse.block_sz / MVHD_SECTOR_SIZE;
- mvhd_write_empty_sectors(vhdm->f, vhdm->bitmap.sector_count + blk_size_sectors);
- /* Add a bit of padding. That's what Windows appears to do, although it's not strictly necessary... */
- mvhd_write_empty_sectors(vhdm->f, 5);
- /* And we finish with the footer */
- fwrite(footer, sizeof footer, 1, vhdm->f);
- /* We no longer have a sparse block. Update that BAT! */
- vhdm->block_offset[blk] = sect_offset;
- mvhd_write_bat_entry(vhdm, blk);
-}
-
-int mvhd_fixed_read(MVHDMeta* vhdm, uint32_t offset, int num_sectors, void* out_buff) {
- int64_t addr;
- int transfer_sectors, truncated_sectors;
- uint32_t total_sectors = (uint32_t)(vhdm->footer.curr_sz / MVHD_SECTOR_SIZE);
- mvhd_check_sectors(offset, num_sectors, total_sectors, &transfer_sectors, &truncated_sectors);
- addr = (int64_t)offset * MVHD_SECTOR_SIZE;
- mvhd_fseeko64(vhdm->f, addr, SEEK_SET);
- fread(out_buff, transfer_sectors*MVHD_SECTOR_SIZE, 1, vhdm->f);
- return truncated_sectors;
-}
-
-int mvhd_sparse_read(MVHDMeta* vhdm, uint32_t offset, int num_sectors, void* out_buff) {
- int transfer_sectors, truncated_sectors;
- uint32_t total_sectors = (uint32_t)(vhdm->footer.curr_sz / MVHD_SECTOR_SIZE);
- mvhd_check_sectors(offset, num_sectors, total_sectors, &transfer_sectors, &truncated_sectors);
- uint8_t* buff = (uint8_t*)out_buff;
- int64_t addr;
- uint32_t s, ls;
- int blk, prev_blk, sib;
- ls = offset + transfer_sectors;
- prev_blk = -1;
- for (s = offset; s < ls; s++) {
- blk = s / vhdm->sect_per_block;
- sib = s % vhdm->sect_per_block;
- if (blk != prev_blk) {
- prev_blk = blk;
- if (vhdm->bitmap.curr_block != blk) {
- mvhd_read_sect_bitmap(vhdm, blk);
- mvhd_fseeko64(vhdm->f, (uint64_t)sib * MVHD_SECTOR_SIZE, SEEK_CUR);
- } else {
- addr = ((int64_t)vhdm->block_offset[blk] + vhdm->bitmap.sector_count + sib) * MVHD_SECTOR_SIZE;
- mvhd_fseeko64(vhdm->f, addr, SEEK_SET);
- }
- }
- if (VHD_TESTBIT(vhdm->bitmap.curr_bitmap, sib)) {
- fread(buff, MVHD_SECTOR_SIZE, 1, vhdm->f);
- } else {
- memset(buff, 0, MVHD_SECTOR_SIZE);
- mvhd_fseeko64(vhdm->f, MVHD_SECTOR_SIZE, SEEK_CUR);
- }
- buff += MVHD_SECTOR_SIZE;
- }
- return truncated_sectors;
-}
-
-int mvhd_diff_read(MVHDMeta* vhdm, uint32_t offset, int num_sectors, void* out_buff) {
- int transfer_sectors, truncated_sectors;
- uint32_t total_sectors = (uint32_t)(vhdm->footer.curr_sz / MVHD_SECTOR_SIZE);
- mvhd_check_sectors(offset, num_sectors, total_sectors, &transfer_sectors, &truncated_sectors);
- uint8_t* buff = (uint8_t*)out_buff;
- MVHDMeta* curr_vhdm = vhdm;
- uint32_t s, ls;
- int blk, sib;
- ls = offset + transfer_sectors;
- for (s = offset; s < ls; s++) {
- while (curr_vhdm->footer.disk_type == MVHD_TYPE_DIFF) {
- blk = s / curr_vhdm->sect_per_block;
- sib = s % curr_vhdm->sect_per_block;
- if (curr_vhdm->bitmap.curr_block != blk) {
- mvhd_read_sect_bitmap(curr_vhdm, blk);
- }
- if (!VHD_TESTBIT(curr_vhdm->bitmap.curr_bitmap, sib)) {
- curr_vhdm = curr_vhdm->parent;
- } else { break; }
- }
- /* We handle actual sector reading using the fixed or sparse functions,
- as a differencing VHD is also a sparse VHD */
- if (curr_vhdm->footer.disk_type == MVHD_TYPE_DIFF || curr_vhdm->footer.disk_type == MVHD_TYPE_DYNAMIC) {
- mvhd_sparse_read(curr_vhdm, s, 1, buff);
- } else {
- mvhd_fixed_read(curr_vhdm, s, 1, buff);
- }
- curr_vhdm = vhdm;
- buff += MVHD_SECTOR_SIZE;
- }
- return truncated_sectors;
-}
-
-int mvhd_fixed_write(MVHDMeta* vhdm, uint32_t offset, int num_sectors, void* in_buff) {
- int64_t addr;
- int transfer_sectors, truncated_sectors;
- uint32_t total_sectors = (uint32_t)(vhdm->footer.curr_sz / MVHD_SECTOR_SIZE);
- mvhd_check_sectors(offset, num_sectors, total_sectors, &transfer_sectors, &truncated_sectors);
- addr = (int64_t)offset * MVHD_SECTOR_SIZE;
- mvhd_fseeko64(vhdm->f, addr, SEEK_SET);
- fwrite(in_buff, transfer_sectors*MVHD_SECTOR_SIZE, 1, vhdm->f);
- return truncated_sectors;
-}
-
-int mvhd_sparse_diff_write(MVHDMeta* vhdm, uint32_t offset, int num_sectors, void* in_buff) {
- int transfer_sectors, truncated_sectors;
- uint32_t total_sectors = (uint32_t)(vhdm->footer.curr_sz / MVHD_SECTOR_SIZE);
- mvhd_check_sectors(offset, num_sectors, total_sectors, &transfer_sectors, &truncated_sectors);
- uint8_t* buff = (uint8_t*)in_buff;
- int64_t addr;
- uint32_t s, ls;
- int blk, prev_blk, sib;
- ls = offset + transfer_sectors;
- prev_blk = -1;
- for (s = offset; s < ls; s++) {
- blk = s / vhdm->sect_per_block;
- sib = s % vhdm->sect_per_block;
- if (vhdm->bitmap.curr_block != blk && prev_blk >= 0) {
- /* Write the sector bitmap for the previous block, before we replace it. */
- mvhd_write_curr_sect_bitmap(vhdm);
- }
- if (vhdm->block_offset[blk] == MVHD_SPARSE_BLK) {
- /* "read" the sector bitmap first, before creating a new block, as the bitmap will be
- zero either way */
- mvhd_read_sect_bitmap(vhdm, blk);
- mvhd_create_block(vhdm, blk);
- }
- if (blk != prev_blk) {
- if (vhdm->bitmap.curr_block != blk) {
- mvhd_read_sect_bitmap(vhdm, blk);
- mvhd_fseeko64(vhdm->f, (uint64_t)sib * MVHD_SECTOR_SIZE, SEEK_CUR);
- } else {
- addr = ((int64_t)vhdm->block_offset[blk] + vhdm->bitmap.sector_count + sib) * MVHD_SECTOR_SIZE;
- mvhd_fseeko64(vhdm->f, addr, SEEK_SET);
- }
- prev_blk = blk;
- }
- fwrite(buff, MVHD_SECTOR_SIZE, 1, vhdm->f);
- VHD_SETBIT(vhdm->bitmap.curr_bitmap, sib);
- buff += MVHD_SECTOR_SIZE;
- }
- /* And write the sector bitmap for the last block we visited to disk */
- mvhd_write_curr_sect_bitmap(vhdm);
- return truncated_sectors;
-}
-
-int mvhd_noop_write(MVHDMeta* vhdm, uint32_t offset, int num_sectors, void* in_buff) {
- return 0;
-}
diff --git a/src/minivhd/minivhd_io.h b/src/minivhd/minivhd_io.h
deleted file mode 100644
index 0f4017a..0000000
--- a/src/minivhd/minivhd_io.h
+++ /dev/null
@@ -1,132 +0,0 @@
-#ifndef MINIVHD_IO_H
-#define MINIVHD_IO_H
-#include "minivhd.h"
-
-/**
- * \brief Write zero filled sectors to file.
- *
- * Note, the caller should set the file position before calling this
- * function for correct operation.
- *
- * \param [in] f File to write sectors to
- * \param [in] sector_count The number of sectors to write
- */
-void mvhd_write_empty_sectors(FILE* f, int sector_count);
-
-/**
- * \brief Read a fixed VHD image
- *
- * Fixed VHD images are essentially raw image files with a footer tacked on
- * the end. They are therefore straightforward to write
- *
- * \param [in] vhdm MiniVHD data structure
- * \param [in] offset Sector offset to read from
- * \param [in] num_sectors The desired number of sectors to read
- * \param [out] out_buff An output buffer to store read sectors. Must be
- * large enough to hold num_sectors worth of sectors.
- *
- * \retval 0 num_sectors were read from file
- * \retval >0 < num_sectors were read from file
- */
-int mvhd_fixed_read(MVHDMeta* vhdm, uint32_t offset, int num_sectors, void* out_buff);
-
-/**
- * \brief Read a sparse VHD image
- *
- * Sparse, or dynamic images are VHD images that grow as data is written to them.
- *
- * This function implements the logic to read sectors from the file, taking into
- * account the fact that blocks may be stored on disk in any order, and that the
- * read could cross block boundaries.
- *
- * \param [in] vhdm MiniVHD data structure
- * \param [in] offset Sector offset to read from
- * \param [in] num_sectors The desired number of sectors to read
- * \param [out] out_buff An output buffer to store read sectors. Must be
- * large enough to hold num_sectors worth of sectors.
- *
- * \retval 0 num_sectors were read from file
- * \retval >0 < num_sectors were read from file
- */
-int mvhd_sparse_read(MVHDMeta* vhdm, uint32_t offset, int num_sectors, void* out_buff);
-
-/**
- * \brief Read a differencing VHD image
- *
- * Differencing images are a variant of a sparse image. They contain the grow-on-demand
- * properties of sparse images, but also reference a parent image. Data is read from the
- * child image only if it is newer than the data stored in the parent image.
- *
- * This function implements the logic to read sectors from the child, or a parent image.
- * Differencing images may have a differencing image as a parent, creating a chain of images.
- * There is no theoretical chain length limit, although I do not consider long chains to be
- * advisable. Verifying the parent-child relationship is not very robust.
- *
- * \param [in] vhdm MiniVHD data structure
- * \param [in] offset Sector offset to read from
- * \param [in] num_sectors The desired number of sectors to read
- * \param [out] out_buff An output buffer to store read sectors. Must be
- * large enough to hold num_sectors worth of sectors.
- *
- * \retval 0 num_sectors were read from file
- * \retval >0 < num_sectors were read from file
- */
-int mvhd_diff_read(MVHDMeta* vhdm, uint32_t offset, int num_sectors, void* out_buff);
-
-/**
- * \brief Write to a fixed VHD image
- *
- * Fixed VHD images are essentially raw image files with a footer tacked on
- * the end. They are therefore straightforward to write
- *
- * \param [in] vhdm MiniVHD data structure
- * \param [in] offset Sector offset to write to
- * \param [in] num_sectors The desired number of sectors to write
- * \param [in] in_buff A source buffer to write sectors from. Must be
- * large enough to hold num_sectors worth of sectors.
- *
- * \retval 0 num_sectors were written to file
- * \retval >0 < num_sectors were written to file
- */
-int mvhd_fixed_write(MVHDMeta* vhdm, uint32_t offset, int num_sectors, void* in_buff);
-
-/**
- * \brief Write to a sparse or differencing VHD image
- *
- * Sparse, or dynamic images are VHD images that grow as data is written to them.
- *
- * Differencing images are a variant of a sparse image. They contain the grow-on-demand
- * properties of sparse images, but also reference a parent image. Data is always written
- * to the child image. This makes writing to differencing images essentially identical to
- * writing to sparse images, hence they use the same function.
- *
- * This function implements the logic to write sectors to the file, taking into
- * account the fact that blocks may be stored on disk in any order, and that the
- * write operation could cross block boundaries.
- *
- * \param [in] vhdm MiniVHD data structure
- * \param [in] offset Sector offset to write to
- * \param [in] num_sectors The desired number of sectors to write
- * \param [in] in_buff A source buffer to write sectors from. Must be
- * large enough to hold num_sectors worth of sectors.
- *
- * \retval 0 num_sectors were written to file
- * \retval >0 < num_sectors were written to file
- */
-int mvhd_sparse_diff_write(MVHDMeta* vhdm, uint32_t offset, int num_sectors, void* in_buff);
-
-/**
- * \brief A no-op function to "write" to read-only VHD images
- *
- * \param [in] vhdm MiniVHD data structure
- * \param [in] offset Sector offset to write to
- * \param [in] num_sectors The desired number of sectors to write
- * \param [in] in_buff A source buffer to write sectors from. Must be
- * large enough to hold num_sectors worth of sectors.
- *
- * \retval 0 num_sectors were written to file
- * \retval >0 < num_sectors were written to file
- */
-int mvhd_noop_write(MVHDMeta* vhdm, uint32_t offset, int num_sectors, void* in_buff);
-
-#endif
diff --git a/src/minivhd/minivhd_manage.c b/src/minivhd/minivhd_manage.c
deleted file mode 100644
index d852a94..0000000
--- a/src/minivhd/minivhd_manage.c
+++ /dev/null
@@ -1,538 +0,0 @@
-/**
- * \file
- * \brief VHD management functions (open, close, read write etc)
- */
-#ifndef _FILE_OFFSET_BITS
-#define _FILE_OFFSET_BITS 64
-#endif
-#include
-#include
-#include
-#include
-#include
-#include "cwalk.h"
-#include "libxml2_encoding.h"
-#include "minivhd_internal.h"
-#include "minivhd_io.h"
-#include "minivhd_util.h"
-#include "minivhd_struct_rw.h"
-#include "minivhd.h"
-
-int mvhd_errno = 0;
-static char tmp_open_path[MVHD_MAX_PATH_BYTES] = {0};
-struct MVHDPaths {
- char dir_path[MVHD_MAX_PATH_BYTES];
- char file_name[MVHD_MAX_PATH_BYTES];
- char w2ku_path[MVHD_MAX_PATH_BYTES];
- char w2ru_path[MVHD_MAX_PATH_BYTES];
- char joined_path[MVHD_MAX_PATH_BYTES];
- uint16_t tmp_src_path[MVHD_MAX_PATH_CHARS];
-};
-
-static void mvhd_read_footer(MVHDMeta* vhdm);
-static void mvhd_read_sparse_header(MVHDMeta* vhdm);
-static bool mvhd_footer_checksum_valid(MVHDMeta* vhdm);
-static bool mvhd_sparse_checksum_valid(MVHDMeta* vhdm);
-static int mvhd_read_bat(MVHDMeta *vhdm, MVHDError* err);
-static void mvhd_calc_sparse_values(MVHDMeta* vhdm);
-static int mvhd_init_sector_bitmap(MVHDMeta* vhdm, MVHDError* err);
-
-/**
- * \brief Populate data stuctures with content from a VHD footer
- *
- * \param [in] vhdm MiniVHD data structure
- */
-static void mvhd_read_footer(MVHDMeta* vhdm) {
- uint8_t buffer[MVHD_FOOTER_SIZE];
- mvhd_fseeko64(vhdm->f, -MVHD_FOOTER_SIZE, SEEK_END);
- fread(buffer, sizeof buffer, 1, vhdm->f);
- mvhd_buffer_to_footer(&vhdm->footer, buffer);
-}
-
-/**
- * \brief Populate data stuctures with content from a VHD sparse header
- *
- * \param [in] vhdm MiniVHD data structure
- */
-static void mvhd_read_sparse_header(MVHDMeta* vhdm) {
- uint8_t buffer[MVHD_SPARSE_SIZE];
- mvhd_fseeko64(vhdm->f, vhdm->footer.data_offset, SEEK_SET);
- fread(buffer, sizeof buffer, 1, vhdm->f);
- mvhd_buffer_to_header(&vhdm->sparse, buffer);
-}
-
-/**
- * \brief Validate VHD footer checksum
- *
- * This works by generating a checksum from the footer, and comparing it against the stored checksum.
- *
- * \param [in] vhdm MiniVHD data structure
- */
-static bool mvhd_footer_checksum_valid(MVHDMeta* vhdm) {
- return vhdm->footer.checksum == mvhd_gen_footer_checksum(&vhdm->footer);
-}
-
-/**
- * \brief Validate VHD sparse header checksum
- *
- * This works by generating a checksum from the sparse header, and comparing it against the stored checksum.
- *
- * \param [in] vhdm MiniVHD data structure
- */
-static bool mvhd_sparse_checksum_valid(MVHDMeta* vhdm) {
- return vhdm->sparse.checksum == mvhd_gen_sparse_checksum(&vhdm->sparse);
-}
-
-/**
- * \brief Read BAT into MiniVHD data structure
- *
- * The Block Allocation Table (BAT) is the structure in a sparse and differencing VHD which stores
- * the 4-byte sector offsets for each data block. This function allocates enough memory to contain
- * the entire BAT, and then reads the contents of the BAT into the buffer.
- *
- * \param [in] vhdm MiniVHD data structure
- * \param [out] err this is populated with MVHD_ERR_MEM if the calloc fails
- *
- * \retval -1 if an error occurrs. Check value of err in this case
- * \retval 0 if the function call succeeds
- */
-static int mvhd_read_bat(MVHDMeta *vhdm, MVHDError* err) {
- vhdm->block_offset = calloc(vhdm->sparse.max_bat_ent, sizeof *vhdm->block_offset);
- if (vhdm->block_offset == NULL) {
- *err = MVHD_ERR_MEM;
- return -1;
- }
- mvhd_fseeko64(vhdm->f, vhdm->sparse.bat_offset, SEEK_SET);
- uint32_t i;
- for (i = 0; i < vhdm->sparse.max_bat_ent; i++) {
- fread(&vhdm->block_offset[i], sizeof *vhdm->block_offset, 1, vhdm->f);
- vhdm->block_offset[i] = mvhd_from_be32(vhdm->block_offset[i]);
- }
- return 0;
-}
-
-/**
- * \brief Perform a one-time calculation of some sparse VHD values
- *
- * \param [in] vhdm MiniVHD data structure
- */
-static void mvhd_calc_sparse_values(MVHDMeta* vhdm) {
- vhdm->sect_per_block = vhdm->sparse.block_sz / MVHD_SECTOR_SIZE;
- int bm_bytes = vhdm->sect_per_block / 8;
- vhdm->bitmap.sector_count = bm_bytes / MVHD_SECTOR_SIZE;
- if (bm_bytes % MVHD_SECTOR_SIZE > 0) {
- vhdm->bitmap.sector_count++;
- }
-}
-
-/**
- * \brief Allocate memory for a sector bitmap.
- *
- * Each data block is preceded by a sector bitmap. Each bit indicates whether the corresponding sector
- * is considered 'clean' or 'dirty' (for sparse VHD images), or whether to read from the parent or current
- * image (for differencing images).
- *
- * \param [in] vhdm MiniVHD data structure
- * \param [out] err this is populated with MVHD_ERR_MEM if the calloc fails
- *
- * \retval -1 if an error occurrs. Check value of err in this case
- * \retval 0 if the function call succeeds
- */
-static int mvhd_init_sector_bitmap(MVHDMeta* vhdm, MVHDError* err) {
- vhdm->bitmap.curr_bitmap = calloc(vhdm->bitmap.sector_count, MVHD_SECTOR_SIZE);
- if (vhdm->bitmap.curr_bitmap == NULL) {
- *err = MVHD_ERR_MEM;
- return -1;
- }
- vhdm->bitmap.curr_block = -1;
- return 0;
-}
-
-/**
- * \brief Check if the path for a given platform code exists
- *
- * From the available paths, both relative and absolute, construct a full path
- * and attempt to open a file at that path.
- *
- * Note, this function makes no attempt to verify that the path is the correct
- * VHD image, or even a VHD image at all.
- *
- * \param [in] paths a struct containing all available paths to work with
- * \param [in] the platform code to try and obtain a path for. Setting this to zero
- * will try using the directory of the child image
- *
- * \retval true if a file is found
- * \retval false if a file is not found
- */
-static bool mvhd_parent_path_exists(struct MVHDPaths* paths, uint32_t plat_code) {
- memset(paths->joined_path, 0, sizeof paths->joined_path);
- FILE* f;
- int cwk_ret, ferr;
- enum cwk_path_style style = cwk_path_guess_style((const char*)paths->dir_path);
- cwk_path_set_style(style);
- cwk_ret = 1;
- if (plat_code == MVHD_DIF_LOC_W2RU && *paths->w2ru_path) {
- cwk_ret = cwk_path_join((const char*)paths->dir_path, (const char*)paths->w2ru_path, paths->joined_path, sizeof paths->joined_path);
- } else if (plat_code == MVHD_DIF_LOC_W2KU && *paths->w2ku_path) {
- memcpy(paths->joined_path, paths->w2ku_path, (sizeof paths->joined_path) - 1);
- cwk_ret = 0;
- } else if (plat_code == 0) {
- cwk_ret = cwk_path_join((const char*)paths->dir_path, (const char*)paths->file_name, paths->joined_path, sizeof paths->joined_path);
- }
- if (cwk_ret > MVHD_MAX_PATH_BYTES) {
- return false;
- }
- f = mvhd_fopen((const char*)paths->joined_path, "rb", &ferr);
- if (f != NULL) {
- /* We found a file at the requested path! */
- memcpy(tmp_open_path, paths->joined_path, (sizeof paths->joined_path) - 1);
- tmp_open_path[sizeof tmp_open_path - 1] = '\0';
- fclose(f);
- return true;
- } else {
- return false;
- }
-}
-
-/**
- * \brief attempt to obtain a file path to a file that may be a valid VHD image
- *
- * Differential VHD images store both a UTF-16BE file name (or path), and up to
- * eight "parent locator" entries. Using this information, this function tries to
- * find a parent image.
- *
- * This function does not verify if the path returned is a valid parent image.
- *
- * \param [in] vhdm current MiniVHD data structure
- * \param [out] err any errors that may occurr. Check this if NULL is returned
- *
- * \return a pointer to the global string `tmp_open_path`, or NULL if a path could
- * not be found, or some error occurred
- */
-static char* mvhd_get_diff_parent_path(MVHDMeta* vhdm, int* err) {
- int utf_outlen, utf_inlen, utf_ret;
- char* par_fp = NULL;
- /* We can't resolve relative paths if we don't have an absolute
- path to work with */
- if (!cwk_path_is_absolute((const char*)vhdm->filename)) {
- *err = MVHD_ERR_PATH_REL;
- goto end;
- }
- struct MVHDPaths* paths = calloc(1, sizeof *paths);
- if (paths == NULL) {
- *err = MVHD_ERR_MEM;
- goto end;
- }
- size_t dirlen;
- cwk_path_get_dirname((const char*)vhdm->filename, &dirlen);
- if (dirlen >= sizeof paths->dir_path) {
- *err = MVHD_ERR_PATH_LEN;
- goto paths_cleanup;
- }
- memcpy(paths->dir_path, vhdm->filename, dirlen);
- /* Get the filename field from the sparse header. */
- utf_outlen = (int)sizeof paths->file_name;
- utf_inlen = (int)sizeof vhdm->sparse.par_utf16_name;
- utf_ret = UTF16BEToUTF8((unsigned char*)paths->file_name, &utf_outlen, (const unsigned char*)vhdm->sparse.par_utf16_name, &utf_inlen);
- if (utf_ret < 0) {
- mvhd_set_encoding_err(utf_ret, err);
- goto paths_cleanup;
- }
- /* Now read the parent locator entries, both relative and absolute, if they exist */
- unsigned char* loc_path;
- int i;
- for (i = 0; i < 8; i++) {
- utf_outlen = MVHD_MAX_PATH_BYTES - 1;
- if (vhdm->sparse.par_loc_entry[i].plat_code == MVHD_DIF_LOC_W2RU) {
- loc_path = (unsigned char*)paths->w2ru_path;
- } else if (vhdm->sparse.par_loc_entry[i].plat_code == MVHD_DIF_LOC_W2KU) {
- loc_path = (unsigned char*)paths->w2ku_path;
- } else {
- continue;
- }
- utf_inlen = vhdm->sparse.par_loc_entry[i].plat_data_len;
- if (utf_inlen > MVHD_MAX_PATH_BYTES) {
- *err = MVHD_ERR_PATH_LEN;
- goto paths_cleanup;
- }
- mvhd_fseeko64(vhdm->f, vhdm->sparse.par_loc_entry[i].plat_data_offset, SEEK_SET);
- fread(paths->tmp_src_path, sizeof (uint8_t), utf_inlen, vhdm->f);
- /* Note, the W2*u parent locators are UTF-16LE, unlike the filename field previously obtained,
- which is UTF-16BE */
- utf_ret = UTF16LEToUTF8(loc_path, &utf_outlen, (const unsigned char*)paths->tmp_src_path, &utf_inlen);
- if (utf_ret < 0) {
- mvhd_set_encoding_err(utf_ret, err);
- goto paths_cleanup;
- }
- }
- /* We have paths in UTF-8. We should have enough info to try and find the parent VHD */
- /* Does the relative path exist? */
- if (mvhd_parent_path_exists(paths, MVHD_DIF_LOC_W2RU)) {
- par_fp = tmp_open_path;
- goto paths_cleanup;
- }
- /* What about trying the child directory? */
- if (mvhd_parent_path_exists(paths, 0)) {
- par_fp = tmp_open_path;
- goto paths_cleanup;
- }
- /* Well, all else fails, try the stored absolute path, if it exists */
- if (mvhd_parent_path_exists(paths, MVHD_DIF_LOC_W2KU)) {
- par_fp = tmp_open_path;
- goto paths_cleanup;
- }
- /* If we reach this point, we could not find a path with a valid file */
- par_fp = NULL;
- *err = MVHD_ERR_PAR_NOT_FOUND;
-
-paths_cleanup:
- free(paths);
- paths = NULL;
-end:
- return par_fp;
-}
-
-/**
- * \brief Attach the read/write function pointers to read/write functions
- *
- * Depending on the VHD type, different sector reading and writing functions are used.
- * The functions are called via function pointers stored in the vhdm struct.
- *
- * \param [in] vhdm MiniVHD data structure
- */
-static void mvhd_assign_io_funcs(MVHDMeta* vhdm) {
- switch (vhdm->footer.disk_type) {
- case MVHD_TYPE_FIXED:
- vhdm->read_sectors = mvhd_fixed_read;
- vhdm->write_sectors = mvhd_fixed_write;
- break;
- case MVHD_TYPE_DYNAMIC:
- vhdm->read_sectors = mvhd_sparse_read;
- vhdm->write_sectors = mvhd_sparse_diff_write;
- break;
- case MVHD_TYPE_DIFF:
- vhdm->read_sectors = mvhd_diff_read;
- vhdm->write_sectors = mvhd_sparse_diff_write;
- break;
- }
- if (vhdm->readonly) {
- vhdm->write_sectors = mvhd_noop_write;
- }
-}
-
-bool mvhd_file_is_vhd(FILE* f) {
- if (f) {
- uint8_t con_str[8];
- mvhd_fseeko64(f, -MVHD_FOOTER_SIZE, SEEK_END);
- fread(con_str, sizeof con_str, 1, f);
- return mvhd_is_conectix_str(con_str);
- } else {
- return false;
- }
-}
-
-MVHDGeom mvhd_calculate_geometry(uint64_t size) {
- MVHDGeom chs;
- uint32_t ts = (uint32_t)(size / MVHD_SECTOR_SIZE);
- uint32_t spt, heads, cyl, cth;
- if (ts > 65535 * 16 * 255) {
- ts = 65535 * 16 * 255;
- }
- if (ts >= 65535 * 16 * 63) {
- spt = 255;
- heads = 16;
- cth = ts / spt;
- } else {
- spt = 17;
- cth = ts / spt;
- heads = (cth + 1023) / 1024;
- if (heads < 4) {
- heads = 4;
- }
- if (cth >= (heads * 1024) || heads > 16) {
- spt = 31;
- heads = 16;
- cth = ts / spt;
- }
- if (cth >= (heads * 1024)) {
- spt = 63;
- heads = 16;
- cth = ts / spt;
- }
- }
- cyl = cth / heads;
- chs.heads = heads;
- chs.spt = spt;
- chs.cyl = cyl;
- return chs;
-}
-
-MVHDMeta* mvhd_open(const char* path, bool readonly, int* err) {
- MVHDError open_err;
- MVHDMeta *vhdm = calloc(sizeof *vhdm, 1);
- if (vhdm == NULL) {
- *err = MVHD_ERR_MEM;
- goto end;
- }
- if (strlen(path) >= sizeof vhdm->filename) {
- *err = MVHD_ERR_PATH_LEN;
- goto cleanup_vhdm;
- }
- //This is safe, as we've just checked for potential overflow above
- strcpy(vhdm->filename, path);
- vhdm->f = readonly ? mvhd_fopen((const char*)vhdm->filename, "rb", err) : mvhd_fopen((const char*)vhdm->filename, "rb+", err);
- if (vhdm->f == NULL) {
- /* note, mvhd_fopen sets err for us */
- goto cleanup_vhdm;
- }
- vhdm->readonly = readonly;
- if (!mvhd_file_is_vhd(vhdm->f)) {
- *err = MVHD_ERR_NOT_VHD;
- goto cleanup_file;
- }
- mvhd_read_footer(vhdm);
- if (!mvhd_footer_checksum_valid(vhdm)) {
- *err = MVHD_ERR_FOOTER_CHECKSUM;
- goto cleanup_file;
- }
- if (vhdm->footer.disk_type == MVHD_TYPE_DIFF || vhdm->footer.disk_type == MVHD_TYPE_DYNAMIC) {
- mvhd_read_sparse_header(vhdm);
- if (!mvhd_sparse_checksum_valid(vhdm)) {
- *err = MVHD_ERR_SPARSE_CHECKSUM;
- goto cleanup_file;
- }
- if (mvhd_read_bat(vhdm, &open_err) == -1) {
- *err = open_err;
- goto cleanup_file;
- }
- mvhd_calc_sparse_values(vhdm);
- if (mvhd_init_sector_bitmap(vhdm, &open_err) == -1) {
- *err = open_err;
- goto cleanup_bat;
- }
-
- } else if (vhdm->footer.disk_type != MVHD_TYPE_FIXED) {
- *err = MVHD_ERR_TYPE;
- goto cleanup_bitmap;
- }
- mvhd_assign_io_funcs(vhdm);
- vhdm->format_buffer.zero_data = calloc(64, MVHD_SECTOR_SIZE);
- if (vhdm->format_buffer.zero_data == NULL) {
- *err = MVHD_ERR_MEM;
- goto cleanup_bitmap;
- }
- vhdm->format_buffer.sector_count = 64;
- if (vhdm->footer.disk_type == MVHD_TYPE_DIFF) {
- char* par_path = mvhd_get_diff_parent_path(vhdm, err);
- if (par_path == NULL) {
- goto cleanup_format_buff;
- }
- uint32_t par_mod_ts = mvhd_file_mod_timestamp(par_path, err);
- if (*err != 0) {
- goto cleanup_format_buff;
- }
- if (vhdm->sparse.par_timestamp != par_mod_ts) {
- /* The last-modified timestamp is to fragile to make this a fatal error.
- Instead, we inform the caller of the potential problem. */
- *err = MVHD_ERR_TIMESTAMP;
- }
- vhdm->parent = mvhd_open(par_path, true, err);
- if (vhdm->parent == NULL) {
- goto cleanup_format_buff;
- }
- if (memcmp(vhdm->sparse.par_uuid, vhdm->parent->footer.uuid, sizeof vhdm->sparse.par_uuid) != 0) {
- *err = MVHD_ERR_INVALID_PAR_UUID;
- goto cleanup_format_buff;
- }
- }
- /* If we've reached this point, we are good to go, so skip the cleanup steps */
- goto end;
-cleanup_format_buff:
- free(vhdm->format_buffer.zero_data);
- vhdm->format_buffer.zero_data = NULL;
-cleanup_bitmap:
- free(vhdm->bitmap.curr_bitmap);
- vhdm->bitmap.curr_bitmap = NULL;
-cleanup_bat:
- free(vhdm->block_offset);
- vhdm->block_offset = NULL;
-cleanup_file:
- fclose(vhdm->f);
- vhdm->f = NULL;
-cleanup_vhdm:
- free(vhdm);
- vhdm = NULL;
-end:
- return vhdm;
-}
-
-void mvhd_close(MVHDMeta* vhdm) {
- if (vhdm != NULL) {
- if (vhdm->parent != NULL) {
- mvhd_close(vhdm->parent);
- }
- fclose(vhdm->f);
- if (vhdm->block_offset != NULL) {
- free(vhdm->block_offset);
- vhdm->block_offset = NULL;
- }
- if (vhdm->bitmap.curr_bitmap != NULL) {
- free(vhdm->bitmap.curr_bitmap);
- vhdm->bitmap.curr_bitmap = NULL;
- }
- if (vhdm->format_buffer.zero_data != NULL) {
- free(vhdm->format_buffer.zero_data);
- vhdm->format_buffer.zero_data = NULL;
- }
- free(vhdm);
- vhdm = NULL;
- }
-}
-
-int mvhd_diff_update_par_timestamp(MVHDMeta* vhdm, int* err) {
- uint8_t sparse_buff[1024];
- if (vhdm == NULL || err == NULL) {
- *err = MVHD_ERR_INVALID_PARAMS;
- return -1;
- }
- if (vhdm->footer.disk_type != MVHD_TYPE_DIFF) {
- *err = MVHD_ERR_TYPE;
- return -1;
- }
- char* par_path = mvhd_get_diff_parent_path(vhdm, err);
- if (par_path == NULL) {
- return -1;
- }
- uint32_t par_mod_ts = mvhd_file_mod_timestamp(par_path, err);
- if (*err != 0) {
- return -1;
- }
- /* Update the timestamp and sparse header checksum */
- vhdm->sparse.par_timestamp = par_mod_ts;
- vhdm->sparse.checksum = mvhd_gen_sparse_checksum(&vhdm->sparse);
- /* Generate and write the updated sparse header */
- mvhd_header_to_buffer(&vhdm->sparse, sparse_buff);
- mvhd_fseeko64(vhdm->f, (int64_t)vhdm->footer.data_offset, SEEK_SET);
- fwrite(sparse_buff, sizeof sparse_buff, 1, vhdm->f);
- return 0;
-}
-
-int mvhd_read_sectors(MVHDMeta* vhdm, uint32_t offset, int num_sectors, void* out_buff) {
- return vhdm->read_sectors(vhdm, offset, num_sectors, out_buff);
-}
-
-int mvhd_write_sectors(MVHDMeta* vhdm, uint32_t offset, int num_sectors, void* in_buff) {
- return vhdm->write_sectors(vhdm, offset, num_sectors, in_buff);
-}
-
-int mvhd_format_sectors(MVHDMeta* vhdm, uint32_t offset, int num_sectors) {
- int num_full = num_sectors / vhdm->format_buffer.sector_count;
- int remain = num_sectors % vhdm->format_buffer.sector_count;
- int i;
- for (i = 0; i < num_full; i++) {
- vhdm->write_sectors(vhdm, offset, vhdm->format_buffer.sector_count, vhdm->format_buffer.zero_data);
- offset += vhdm->format_buffer.sector_count;
- }
- vhdm->write_sectors(vhdm, offset, remain, vhdm->format_buffer.zero_data);
- return 0;
-}
diff --git a/src/minivhd/minivhd_struct_rw.c b/src/minivhd/minivhd_struct_rw.c
deleted file mode 100644
index 77f26a4..0000000
--- a/src/minivhd/minivhd_struct_rw.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/**
- * \file
- * \brief Header and footer serialize/deserialize functions
- */
-#ifndef _FILE_OFFSET_BITS
-#define _FILE_OFFSET_BITS 64
-#endif
-#include
-#include
-#include
-#include
-#include
-#include "minivhd_util.h"
-#include "minivhd_internal.h"
-
-/* Read data from footer into the struct members, swapping endian where necessary
- Note: order matters here! We must read each field in the order the struct is in.
- Doing this may be less elegant than performing a memcpy to a packed struct, but
- it avoids potential data alignment issues, and the endian swapping allows us to
- use the fields directly. */
-
-static void mvhd_next_buffer_to_struct(void* struct_memb, size_t memb_size, bool req_endian, uint8_t** buffer);
-static void mvhd_next_struct_to_buffer(void* struct_memb, size_t memb_size, bool req_endian, uint8_t** buffer);
-
-/**
- * \brief Get the next field from a buffer and store it in a struct member, converting endian if necessary
- *
- * \param [out] struct_memb struct member to save the field to
- * \param [in] memb_size the size of struct_memb, in bytes
- * \param [in] req_endian is the field a value that requires endian conversion (eg: uint16, uint32)
- * \param [in] buffer the buffer from which fields are read from. Will be advanced at the end of the function call
- */
-static void mvhd_next_buffer_to_struct(void* struct_memb, size_t memb_size, bool req_endian, uint8_t** buffer) {
- memcpy(struct_memb, *buffer, memb_size);
- if (req_endian) {
- switch (memb_size) {
- case 2:
- *(uint16_t*)(struct_memb) = mvhd_from_be16(*(uint16_t*)(struct_memb));
- break;
- case 4:
- *(uint32_t*)(struct_memb) = mvhd_from_be32(*(uint32_t*)(struct_memb));
- break;
- case 8:
- *(uint64_t*)(struct_memb) = mvhd_from_be64(*(uint64_t*)(struct_memb));
- break;
- }
- }
- *buffer += memb_size;
-}
-
-/**
- * \brief Save a struct member into a buffer, converting endian if necessary
- *
- * \param [in] struct_memb struct member read from
- * \param [in] memb_size the size of struct_memb, in bytes
- * \param [in] req_endian is the field a value that requires endian conversion (eg: uint16, uint32)
- * \param [out] buffer the buffer from which struct member is saved to. Will be advanced at the end of the function call
- */
-static void mvhd_next_struct_to_buffer(void* struct_memb, size_t memb_size, bool req_endian, uint8_t** buffer) {
- uint8_t *buf_ptr = *buffer;
- memcpy(buf_ptr, struct_memb, memb_size);
- if (req_endian) {
- switch (memb_size) {
- case 2:
- *((uint16_t*)buf_ptr) = mvhd_to_be16(*(uint16_t*)(struct_memb));
- break;
- case 4:
- *((uint32_t*)buf_ptr) = mvhd_to_be32(*(uint32_t*)(struct_memb));
- break;
- case 8:
- *((uint64_t*)buf_ptr) = mvhd_to_be64(*(uint64_t*)(struct_memb));
- break;
- }
- }
- buf_ptr += memb_size;
- *buffer = buf_ptr;
-}
-
-void mvhd_buffer_to_footer(MVHDFooter* footer, uint8_t* buffer) {
- uint8_t* buff_ptr = buffer;
- mvhd_next_buffer_to_struct(&footer->cookie, sizeof footer->cookie, false, &buff_ptr);
- mvhd_next_buffer_to_struct(&footer->features, sizeof footer->features, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&footer->fi_fmt_vers, sizeof footer->fi_fmt_vers, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&footer->data_offset, sizeof footer->data_offset, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&footer->timestamp, sizeof footer->timestamp, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&footer->cr_app, sizeof footer->cr_app, false, &buff_ptr);
- mvhd_next_buffer_to_struct(&footer->cr_vers, sizeof footer->cr_vers, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&footer->cr_host_os, sizeof footer->cr_host_os, false, &buff_ptr);
- mvhd_next_buffer_to_struct(&footer->orig_sz, sizeof footer->orig_sz, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&footer->curr_sz, sizeof footer->curr_sz, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&footer->geom.cyl, sizeof footer->geom.cyl, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&footer->geom.heads, sizeof footer->geom.heads, false, &buff_ptr);
- mvhd_next_buffer_to_struct(&footer->geom.spt, sizeof footer->geom.spt, false, &buff_ptr);
- mvhd_next_buffer_to_struct(&footer->disk_type, sizeof footer->disk_type, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&footer->checksum, sizeof footer->checksum, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&footer->uuid, sizeof footer->uuid, false, &buff_ptr);
- mvhd_next_buffer_to_struct(&footer->saved_st, sizeof footer->saved_st, false, &buff_ptr);
- mvhd_next_buffer_to_struct(&footer->reserved, sizeof footer->reserved, false, &buff_ptr);
-}
-
-void mvhd_footer_to_buffer(MVHDFooter* footer, uint8_t* buffer) {
- uint8_t* buff_ptr = buffer;
- mvhd_next_struct_to_buffer(&footer->cookie, sizeof footer->cookie, false, &buff_ptr);
- mvhd_next_struct_to_buffer(&footer->features, sizeof footer->features, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&footer->fi_fmt_vers, sizeof footer->fi_fmt_vers, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&footer->data_offset, sizeof footer->data_offset, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&footer->timestamp, sizeof footer->timestamp, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&footer->cr_app, sizeof footer->cr_app, false, &buff_ptr);
- mvhd_next_struct_to_buffer(&footer->cr_vers, sizeof footer->cr_vers, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&footer->cr_host_os, sizeof footer->cr_host_os, false, &buff_ptr);
- mvhd_next_struct_to_buffer(&footer->orig_sz, sizeof footer->orig_sz, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&footer->curr_sz, sizeof footer->curr_sz, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&footer->geom.cyl, sizeof footer->geom.cyl, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&footer->geom.heads, sizeof footer->geom.heads, false, &buff_ptr);
- mvhd_next_struct_to_buffer(&footer->geom.spt, sizeof footer->geom.spt, false, &buff_ptr);
- mvhd_next_struct_to_buffer(&footer->disk_type, sizeof footer->disk_type, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&footer->checksum, sizeof footer->checksum, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&footer->uuid, sizeof footer->uuid, false, &buff_ptr);
- mvhd_next_struct_to_buffer(&footer->saved_st, sizeof footer->saved_st, false, &buff_ptr);
- mvhd_next_struct_to_buffer(&footer->reserved, sizeof footer->reserved, false, &buff_ptr);
-}
-
-void mvhd_buffer_to_header(MVHDSparseHeader* header, uint8_t* buffer) {
- uint8_t* buff_ptr = buffer;
- mvhd_next_buffer_to_struct(&header->cookie, sizeof header->cookie, false, &buff_ptr);
- mvhd_next_buffer_to_struct(&header->data_offset, sizeof header->data_offset, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&header->bat_offset, sizeof header->bat_offset, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&header->head_vers, sizeof header->head_vers, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&header->max_bat_ent, sizeof header->max_bat_ent, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&header->block_sz, sizeof header->block_sz, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&header->checksum, sizeof header->checksum, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&header->par_uuid, sizeof header->par_uuid, false, &buff_ptr);
- mvhd_next_buffer_to_struct(&header->par_timestamp, sizeof header->par_timestamp, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&header->reserved_1, sizeof header->reserved_1, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&header->par_utf16_name, sizeof header->par_utf16_name, false, &buff_ptr);
- int i;
- for (i = 0; i < 8; i++) {
- mvhd_next_buffer_to_struct(&header->par_loc_entry[i].plat_code, sizeof header->par_loc_entry[i].plat_code, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&header->par_loc_entry[i].plat_data_space, sizeof header->par_loc_entry[i].plat_data_space, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&header->par_loc_entry[i].plat_data_len, sizeof header->par_loc_entry[i].plat_data_len, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&header->par_loc_entry[i].reserved, sizeof header->par_loc_entry[i].reserved, true, &buff_ptr);
- mvhd_next_buffer_to_struct(&header->par_loc_entry[i].plat_data_offset, sizeof header->par_loc_entry[i].plat_data_offset, true, &buff_ptr);
- }
- mvhd_next_buffer_to_struct(&header->reserved_2, sizeof header->reserved_2, false, &buff_ptr);
-}
-
-void mvhd_header_to_buffer(MVHDSparseHeader* header, uint8_t* buffer) {
- uint8_t* buff_ptr = buffer;
- mvhd_next_struct_to_buffer(&header->cookie, sizeof header->cookie, false, &buff_ptr);
- mvhd_next_struct_to_buffer(&header->data_offset, sizeof header->data_offset, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&header->bat_offset, sizeof header->bat_offset, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&header->head_vers, sizeof header->head_vers, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&header->max_bat_ent, sizeof header->max_bat_ent, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&header->block_sz, sizeof header->block_sz, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&header->checksum, sizeof header->checksum, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&header->par_uuid, sizeof header->par_uuid, false, &buff_ptr);
- mvhd_next_struct_to_buffer(&header->par_timestamp, sizeof header->par_timestamp, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&header->reserved_1, sizeof header->reserved_1, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&header->par_utf16_name, sizeof header->par_utf16_name, false, &buff_ptr);
- int i;
- for (i = 0; i < 8; i++) {
- mvhd_next_struct_to_buffer(&header->par_loc_entry[i].plat_code, sizeof header->par_loc_entry[i].plat_code, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&header->par_loc_entry[i].plat_data_space, sizeof header->par_loc_entry[i].plat_data_space, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&header->par_loc_entry[i].plat_data_len, sizeof header->par_loc_entry[i].plat_data_len, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&header->par_loc_entry[i].reserved, sizeof header->par_loc_entry[i].reserved, true, &buff_ptr);
- mvhd_next_struct_to_buffer(&header->par_loc_entry[i].plat_data_offset, sizeof header->par_loc_entry[i].plat_data_offset, true, &buff_ptr);
- }
- mvhd_next_struct_to_buffer(&header->reserved_2, sizeof header->reserved_2, false, &buff_ptr);
-}
diff --git a/src/minivhd/minivhd_struct_rw.h b/src/minivhd/minivhd_struct_rw.h
deleted file mode 100644
index a587177..0000000
--- a/src/minivhd/minivhd_struct_rw.h
+++ /dev/null
@@ -1,38 +0,0 @@
-#ifndef MINIVHD_STRUCT_RW_H
-#define MINIVHD_STRUCT_RW_H
-
-#include "minivhd_internal.h"
-
-/**
- * \brief Save the contents of a VHD footer from a buffer to a struct
- *
- * \param [out] footer save contents of buffer into footer
- * \param [in] buffer VHD footer in raw bytes
- */
-void mvhd_buffer_to_footer(MVHDFooter* footer, uint8_t* buffer);
-
-/**
- * \brief Save the contents of a VHD sparse header from a buffer to a struct
- *
- * \param [out] header save contents of buffer into header
- * \param [in] buffer VHD header in raw bytes
- */
-void mvhd_buffer_to_header(MVHDSparseHeader* header, uint8_t* buffer);
-
-/**
- * \brief Save the contents of a VHD footer struct to a buffer
- *
- * \param [in] footer save contents of struct into buffer
- * \param [out] buffer VHD footer in raw bytes
- */
-void mvhd_footer_to_buffer(MVHDFooter* footer, uint8_t* buffer);
-
-/**
- * \brief Save the contents of a VHD sparse header struct to a buffer
- *
- * \param [in] header save contents of struct into buffer
- * \param [out] buffer VHD sparse header in raw bytes
- */
-void mvhd_header_to_buffer(MVHDSparseHeader* header, uint8_t* buffer);
-
-#endif
diff --git a/src/minivhd/minivhd_util.c b/src/minivhd/minivhd_util.c
deleted file mode 100644
index b04e022..0000000
--- a/src/minivhd/minivhd_util.c
+++ /dev/null
@@ -1,339 +0,0 @@
-/**
- * \file
- * \brief Utility functions
- */
-#ifndef _FILE_OFFSET_BITS
-#define _FILE_OFFSET_BITS 64
-#endif
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include "libxml2_encoding.h"
-#include "minivhd_internal.h"
-#include "minivhd_util.h"
-#include "minivhd.h"
-
-const char MVHD_CONECTIX_COOKIE[] = "conectix";
-const char MVHD_CREATOR[] = "pcem";
-const char MVHD_CREATOR_HOST_OS[] = "Wi2k";
-const char MVHD_CXSPARSE_COOKIE[] = "cxsparse";
-
-uint16_t mvhd_from_be16(uint16_t val) {
- uint8_t *tmp = (uint8_t*)&val;
- uint16_t ret = 0;
- ret |= (uint16_t)tmp[0] << 8;
- ret |= (uint16_t)tmp[1] << 0;
- return ret;
-}
-uint32_t mvhd_from_be32(uint32_t val) {
- uint8_t *tmp = (uint8_t*)&val;
- uint32_t ret = 0;
- ret = (uint32_t)tmp[0] << 24;
- ret |= (uint32_t)tmp[1] << 16;
- ret |= (uint32_t)tmp[2] << 8;
- ret |= (uint32_t)tmp[3] << 0;
- return ret;
-}
-uint64_t mvhd_from_be64(uint64_t val) {
- uint8_t *tmp = (uint8_t*)&val;
- uint64_t ret = 0;
- ret = (uint64_t)tmp[0] << 56;
- ret |= (uint64_t)tmp[1] << 48;
- ret |= (uint64_t)tmp[2] << 40;
- ret |= (uint64_t)tmp[3] << 32;
- ret |= (uint64_t)tmp[4] << 24;
- ret |= (uint64_t)tmp[5] << 16;
- ret |= (uint64_t)tmp[6] << 8;
- ret |= (uint64_t)tmp[7] << 0;
- return ret;
-}
-uint16_t mvhd_to_be16(uint16_t val) {
- uint16_t ret = 0;
- uint8_t *tmp = (uint8_t*)&ret;
- tmp[0] = (val & 0xff00) >> 8;
- tmp[1] = (val & 0x00ff) >> 0;
- return ret;
-}
-uint32_t mvhd_to_be32(uint32_t val) {
- uint32_t ret = 0;
- uint8_t *tmp = (uint8_t*)&ret;
- tmp[0] = (val & 0xff000000) >> 24;
- tmp[1] = (val & 0x00ff0000) >> 16;
- tmp[2] = (val & 0x0000ff00) >> 8;
- tmp[3] = (val & 0x000000ff) >> 0;
- return ret;
-}
-uint64_t mvhd_to_be64(uint64_t val) {
- uint64_t ret = 0;
- uint8_t *tmp = (uint8_t*)&ret;
- tmp[0] = (uint8_t)((val & 0xff00000000000000) >> 56);
- tmp[1] = (uint8_t)((val & 0x00ff000000000000) >> 48);
- tmp[2] = (uint8_t)((val & 0x0000ff0000000000) >> 40);
- tmp[3] = (uint8_t)((val & 0x000000ff00000000) >> 32);
- tmp[4] = (uint8_t)((val & 0x00000000ff000000) >> 24);
- tmp[5] = (uint8_t)((val & 0x0000000000ff0000) >> 16);
- tmp[6] = (uint8_t)((val & 0x000000000000ff00) >> 8);
- tmp[7] = (uint8_t)((val & 0x00000000000000ff) >> 0);
- return ret;
-}
-
-bool mvhd_is_conectix_str(const void* buffer) {
- if (strncmp(buffer, MVHD_CONECTIX_COOKIE, strlen(MVHD_CONECTIX_COOKIE)) == 0) {
- return true;
- } else {
- return false;
- }
-}
-
-void mvhd_generate_uuid(uint8_t* uuid)
-{
- /* We aren't doing crypto here, so using system time as seed should be good enough */
- srand((unsigned int)time(0));
- int n;
- for (n = 0; n < 16; n++) {
- uuid[n] = rand();
- }
- uuid[6] &= 0x0F;
- uuid[6] |= 0x40; /* Type 4 */
- uuid[8] &= 0x3F;
- uuid[8] |= 0x80; /* Variant 1 */
-}
-
-uint32_t vhd_calc_timestamp(void)
-{
- time_t start_time;
- time_t curr_time;
- double vhd_time;
- start_time = MVHD_START_TS; /* 1 Jan 2000 00:00 */
- curr_time = time(NULL);
- vhd_time = difftime(curr_time, start_time);
- return (uint32_t)vhd_time;
-}
-
-uint32_t mvhd_epoch_to_vhd_ts(time_t ts) {
- time_t start_time = MVHD_START_TS;
- if (ts < start_time) {
- return start_time;
- }
- double vhd_time = difftime(ts, start_time);
- return (uint32_t)vhd_time;
-}
-
-time_t vhd_get_created_time(MVHDMeta *vhdm)
-{
- time_t vhd_time = (time_t)vhdm->footer.timestamp;
- time_t vhd_time_unix = MVHD_START_TS + vhd_time;
- return vhd_time_unix;
-}
-
-FILE* mvhd_fopen(const char* path, const char* mode, int* err) {
- FILE* f = NULL;
-#ifdef _WIN32
- size_t path_len = strlen(path);
- size_t mode_len = strlen(mode);
- mvhd_utf16 new_path[260] = {0};
- int new_path_len = (sizeof new_path) - 2;
- mvhd_utf16 mode_str[5] = {0};
- int new_mode_len = (sizeof mode_str) - 2;
- int path_res = UTF8ToUTF16LE((unsigned char*)new_path, &new_path_len, (const unsigned char*)path, (int*)&path_len);
- int mode_res = UTF8ToUTF16LE((unsigned char*)mode_str, &new_mode_len, (const unsigned char*)mode, (int*)&mode_len);
- if (path_res > 0 && mode_res > 0) {
- f = _wfopen(new_path, mode_str);
- if (f == NULL) {
- mvhd_errno = errno;
- *err = MVHD_ERR_FILE;
- }
- } else {
- if (path_res == -1 || mode_res == -1) {
- *err = MVHD_ERR_UTF_SIZE;
- } else if (path_res == -2 || mode_res == -2) {
- *err = MVHD_ERR_UTF_TRANSCODING_FAILED;
- }
- }
-#else
- f = fopen(path, mode);
- if (f == NULL) {
- mvhd_errno = errno;
- *err = MVHD_ERR_FILE;
- }
-#endif
- return f;
-}
-
-void mvhd_set_encoding_err(int encoding_retval, int* err) {
- if (encoding_retval == -1) {
- *err = MVHD_ERR_UTF_SIZE;
- } else if (encoding_retval == -2) {
- *err = MVHD_ERR_UTF_TRANSCODING_FAILED;
- }
-}
-
-uint64_t mvhd_calc_size_bytes(MVHDGeom *geom) {
- uint64_t img_size = (uint64_t)geom->cyl * (uint64_t)geom->heads * (uint64_t)geom->spt * (uint64_t)MVHD_SECTOR_SIZE;
- return img_size;
-}
-
-uint32_t mvhd_calc_size_sectors(MVHDGeom *geom) {
- uint32_t sector_size = (uint32_t)geom->cyl * (uint32_t)geom->heads * (uint32_t)geom->spt;
- return sector_size;
-}
-
-MVHDGeom mvhd_get_geometry(MVHDMeta* vhdm) {
- MVHDGeom geometry = { .cyl = vhdm->footer.geom.cyl, .heads = vhdm->footer.geom.heads, .spt = vhdm->footer.geom.spt };
- return geometry;
-}
-
-uint64_t mvhd_get_current_size(MVHDMeta* vhdm) {
- return vhdm->footer.curr_sz;
-}
-
-uint32_t mvhd_gen_footer_checksum(MVHDFooter* footer) {
- uint32_t new_chk = 0;
- uint32_t orig_chk = footer->checksum;
- footer->checksum = 0;
- uint8_t* footer_bytes = (uint8_t*)footer;
- size_t i;
- for (i = 0; i < sizeof *footer; i++) {
- new_chk += footer_bytes[i];
- }
- footer->checksum = orig_chk;
- return ~new_chk;
-}
-
-uint32_t mvhd_gen_sparse_checksum(MVHDSparseHeader* header) {
- uint32_t new_chk = 0;
- uint32_t orig_chk = header->checksum;
- header->checksum = 0;
- uint8_t* sparse_bytes = (uint8_t*)header;
- size_t i;
- for (i = 0; i < sizeof *header; i++) {
- new_chk += sparse_bytes[i];
- }
- header->checksum = orig_chk;
- return ~new_chk;
-}
-
-const char* mvhd_strerr(MVHDError err) {
- switch (err) {
- case MVHD_ERR_MEM:
- return "memory allocation error";
- case MVHD_ERR_FILE:
- return "file error";
- case MVHD_ERR_NOT_VHD:
- return "file is not a VHD image";
- case MVHD_ERR_TYPE:
- return "unsupported VHD image type";
- case MVHD_ERR_FOOTER_CHECKSUM:
- return "invalid VHD footer checksum";
- case MVHD_ERR_SPARSE_CHECKSUM:
- return "invalid VHD sparse header checksum";
- case MVHD_ERR_UTF_TRANSCODING_FAILED:
- return "error converting path encoding";
- case MVHD_ERR_UTF_SIZE:
- return "buffer size mismatch when converting path encoding";
- case MVHD_ERR_PATH_REL:
- return "relative path detected where absolute path expected";
- case MVHD_ERR_PATH_LEN:
- return "path length exceeds MVHD_MAX_PATH";
- case MVHD_ERR_PAR_NOT_FOUND:
- return "parent VHD image not found";
- case MVHD_ERR_INVALID_PAR_UUID:
- return "UUID mismatch between child and parent VHD";
- case MVHD_ERR_INVALID_GEOM:
- return "invalid geometry detected";
- case MVHD_ERR_INVALID_SIZE:
- return "invalid size";
- case MVHD_ERR_INVALID_BLOCK_SIZE:
- return "invalid block size";
- case MVHD_ERR_INVALID_PARAMS:
- return "invalid parameters passed to function";
- case MVHD_ERR_CONV_SIZE:
- return "error converting image. Size mismatch detechted";
- default:
- return "unknown error";
- }
-}
-
-int64_t mvhd_ftello64(FILE* stream)
-{
-#ifdef _MSC_VER
- return _ftelli64(stream);
-#elif defined(__MINGW32__)
- return ftello64(stream);
-#else /* This should work with linux (with _FILE_OFFSET_BITS), and hopefully OS X and BSD */
- return ftello(stream);
-#endif
-}
-
-int mvhd_fseeko64(FILE* stream, int64_t offset, int origin)
-{
-#ifdef _MSC_VER
- return _fseeki64(stream, offset, origin);
-#elif defined(__MINGW32__)
- return fseeko64(stream, offset, origin);
-#else /* This should work with linux (with _FILE_OFFSET_BITS), and hopefully OS X and BSD */
- return fseeko(stream, offset, origin);
-#endif
-}
-
-uint32_t mvhd_crc32_for_byte(uint32_t r) {
- int j;
- for (j = 0; j < 8; ++j)
- r = (r & 1 ? 0 : (uint32_t)0xEDB88320L) ^ r >> 1;
- return r ^ (uint32_t)0xFF000000L;
-}
-
-uint32_t mvhd_crc32(const void* data, size_t n_bytes) {
- static uint32_t table[0x100];
- size_t i;
- if (!*table)
- for (i = 0; i < 0x100; ++i)
- table[i] = mvhd_crc32_for_byte(i);
-
- uint32_t crc = 0;
- for (i = 0; i < n_bytes; ++i)
- crc = table[(uint8_t)crc ^ ((uint8_t*)data)[i]] ^ crc >> 8;
-
- return crc;
-}
-
-uint32_t mvhd_file_mod_timestamp(const char* path, int *err) {
- *err = 0;
-#ifdef _WIN32
- struct _stat file_stat;
- size_t path_len = strlen(path);
- mvhd_utf16 new_path[260] = {0};
- int new_path_len = (sizeof new_path) - 2;
- int path_res = UTF8ToUTF16LE((unsigned char*)new_path, &new_path_len, (const unsigned char*)path, (int*)&path_len);
- if (path_res > 0) {
- int stat_res = _wstat(new_path, &file_stat);
- if (stat_res != 0) {
- mvhd_errno = errno;
- *err = MVHD_ERR_FILE;
- return 0;
- }
- return mvhd_epoch_to_vhd_ts(file_stat.st_mtime);
- } else {
- if (path_res == -1) {
- *err = MVHD_ERR_UTF_SIZE;
- } else if (path_res == -2) {
- *err = MVHD_ERR_UTF_TRANSCODING_FAILED;
- }
- return 0;
- }
-#else
- struct stat file_stat;
- int stat_res = stat(path, &file_stat);
- if (stat_res != 0) {
- mvhd_errno = errno;
- *err = MVHD_ERR_FILE;
- return 0;
- }
- return mvhd_epoch_to_vhd_ts(file_stat.st_mtime);
-#endif
-}
diff --git a/src/minivhd/minivhd_util.h b/src/minivhd/minivhd_util.h
deleted file mode 100644
index 8a18b55..0000000
--- a/src/minivhd/minivhd_util.h
+++ /dev/null
@@ -1,133 +0,0 @@
-#ifndef MINIVHD_UTIL_H
-#define MINIVHD_UTIL_H
-
-#include
-#include
-#include
-#include "minivhd_internal.h"
-#include "minivhd.h"
-#define MVHD_START_TS 946684800
-
-/**
- * Functions to deal with endian issues
- */
-uint16_t mvhd_from_be16(uint16_t val);
-uint32_t mvhd_from_be32(uint32_t val);
-uint64_t mvhd_from_be64(uint64_t val);
-uint16_t mvhd_to_be16(uint16_t val);
-uint32_t mvhd_to_be32(uint32_t val);
-uint64_t mvhd_to_be64(uint64_t val);
-
-/**
- * \brief Check if provided buffer begins with the string "conectix"
- *
- * \param [in] buffer The buffer to compare. Must be at least 8 bytes in length
- *
- * \return true if the buffer begins with "conectix"
- * \return false if the buffer does not begin with "conectix"
- */
-bool mvhd_is_conectix_str(const void* buffer);
-
-/**
- * \brief Generate a raw 16 byte UUID
- *
- * \param [out] uuid A 16 byte buffer in which the generated UUID will be stored to
- */
-void mvhd_generate_uuid(uint8_t *uuid);
-
-/**
- * \brief Calculate a VHD formatted timestamp from the current time
- */
-uint32_t vhd_calc_timestamp(void);
-
-/**
- * \brief Convert an epoch timestamp to a VHD timestamp
- *
- * \param [in] ts epoch timestamp to convert.
- *
- * \return The adjusted timestamp, or 0 if the input timestamp is
- * earlier that 1 Janurary 2000
- */
-uint32_t mvhd_epoch_to_vhd_ts(time_t ts);
-
-/**
- * \brief Return the created time from a VHD image
- *
- * \param [in] vhdm Pointer to the MiniVHD metadata structure
- *
- * \return The created time, as a Unix timestamp
- */
-time_t vhd_get_created_time(MVHDMeta *vhdm);
-
-/**
- * \brief Cross platform, unicode filepath opening
- *
- * This function accounts for the fact that fopen() handles file paths differently compared to other
- * operating systems. Windows version of fopen() will not handle multi byte encoded text like UTF-8.
- *
- * Unicode filepath support on Windows requires using the _wfopen() function, which expects UTF-16LE
- * encoded path and modestring.
- *
- * \param [in] path The filepath to open as a UTF-8 string
- * \param [in] mode The mode string to use (eg: "rb+"")
- * \param [out] err The error value, if an error occurrs
- *
- * \return a FILE pointer if successful, NULL otherwise. If NULL, check the value of err
- */
-FILE* mvhd_fopen(const char* path, const char* mode, int* err);
-
-void mvhd_set_encoding_err(int encoding_retval, int* err);
-
-/**
- * \brief Generate VHD footer checksum
- *
- * \param [in] vhdm MiniVHD data structure
- */
-uint32_t mvhd_gen_footer_checksum(MVHDFooter* footer);
-
-/**
- * \brief Generate VHD sparse header checksum
- *
- * \param [in] vhdm MiniVHD data structure
- */
-uint32_t mvhd_gen_sparse_checksum(MVHDSparseHeader* header);
-
-/**
- * \brief Get current position in file stream
- *
- * This is a portable version of the POSIX ftello64(). *
- */
-int64_t mvhd_ftello64(FILE* stream);
-
-/**
- * \brief Reposition the file stream's position
- *
- * This is a portable version of the POSIX fseeko64(). *
- */
-int mvhd_fseeko64(FILE* stream, int64_t offset, int origin);
-
-/**
- * \brief Calculate the CRC32 of a data buffer.
- *
- * This function can be used for verifying data integrity.
- *
- * \param [in] data The data buffer
- * \param [in] n_bytes The size of the data buffer in bytes
- *
- * \return The CRC32 of the data buffer
- */
-uint32_t mvhd_crc32(const void* data, size_t n_bytes);
-
-/**
- * \brief Calculate the file modification timestamp.
- *
- * This function is primarily to help protect differencing VHD's
- *
- * \param [in] path the UTF-8 file path
- * \param [out] err The error value, if an error occurrs
- *
- * \return The file modified timestamp, in VHD compatible timestamp.
- * 'err' will be set to non-zero on error
- */
-uint32_t mvhd_file_mod_timestamp(const char* path, int *err);
-#endif
diff --git a/src/model.c b/src/model.c
index 6b9f71f..e9a8460 100644
--- a/src/model.c
+++ b/src/model.c
@@ -4,33 +4,19 @@
#include "io.h"
#include "mouse.h"
-#include "82091aa.h"
-#include "acc2036.h"
-#include "acc2168.h"
-#include "acc3221.h"
#include "acer386sx.h"
#include "ali1429.h"
#include "amstrad.h"
-#include "cbm_io.h"
-#include "cmd640.h"
#include "compaq.h"
-#include "cs8230.h"
-#include "dells200.h"
#include "device.h"
-#include "cassette.h"
#include "dma.h"
-#include "f82c710_upc.h"
#include "fdc.h"
#include "fdc37c665.h"
-#include "fdc37c93x.h"
#include "gameport.h"
#include "headland.h"
#include "i430fx.h"
-#include "i430hx.h"
#include "i430lx.h"
#include "i430vx.h"
-#include "i440bx.h"
-#include "i440fx.h"
#include "ide.h"
#include "intel.h"
#include "intel_flash.h"
@@ -40,18 +26,14 @@
#include "keyboard_olim24.h"
#include "keyboard_pcjr.h"
#include "keyboard_xt.h"
-#include "laserxt.h"
#include "lpt.h"
#include "mem.h"
#include "mouse_ps2.h"
-#include "mvp3.h"
#include "neat.h"
#include "nmi.h"
#include "nvr.h"
#include "olivetti_m24.h"
#include "opti495.h"
-#include "pc87306.h"
-#include "pc87307.h"
#include "pci.h"
#include "pic.h"
#include "piix.h"
@@ -59,196 +41,102 @@
#include "ps1.h"
#include "ps2.h"
#include "ps2_mca.h"
-#include "scamp.h"
#include "scat.h"
#include "serial.h"
-#include "sio.h"
#include "sis496.h"
-#include "sl82c460.h"
#include "sound_ps1.h"
#include "sound_pssj.h"
#include "sound_sn76489.h"
-#include "superxt.h"
-#include "sst39sf010.h"
#include "tandy_eeprom.h"
#include "tandy_rom.h"
#include "um8669f.h"
+#include "um8881f.h"
#include "vid_pcjr.h"
#include "vid_tandy.h"
-#include "vid_t1000.h"
-#include "vl82c480.h"
-#include "vt82c586b.h"
-#include "w83877tf.h"
-#include "w83977tf.h"
#include "wd76c10.h"
-#include "xi8088.h"
-#include "zenith.h"
void xt_init();
void pcjr_init();
void tandy1k_init();
void tandy1ksl2_init();
void ams_init();
-void pc5086_init();
void europc_init();
void olim24_init();
void at_init();
void ibm_at_init();
-void at_cbm_init();
-void dells200_init();
+void at_ide_init();
void deskpro386_init();
-void pb_l300sx_init();
void ps1_m2011_init();
void ps1_m2121_init();
-void ps1_m2133_init(void);
void ps2_m30_286_init();
void ps2_model_50_init();
void ps2_model_55sx_init();
-void ps2_model_70_init();
void ps2_model_80_init();
void at_neat_init();
-void at_scamp_init();
void at_scat_init();
-void at_scatsx_init();
void at_acer386sx_init();
void at_wd76c10_init();
-void at_cs8230_init();
void at_ali1429_init();
void at_headland_init();
void at_opti495_init();
+void at_um8881f_init();
void at_sis496_init();
-void at_p55va_init();
-void at_p55tvp4_init();
void at_i430vx_init();
void at_batman_init();
void at_endeavor_init();
-void at_p55t2p4_init();
-void xt_laserxt_init();
-void at_t3100e_init();
-void xt_t1000_init();
-void xt_t1200_init();
-void at_sl82c460_init();
-void at_zappa_init();
-void at_pb410a_init();
-void at_pb520r_init();
-void at_pb570_init();
-void compaq_xt_init();
-void xt_xi8088_init();
-void xt_zenith_init();
-void at_mvp3_init();
-void at_vs440fx_init();
-void at_ga686bx_init();
+
int model;
-int AMSTRAD, AT, PCI, TANDY, MCA;
+int AMSTRAD, AT, PCI, TANDY;
MODEL models[] =
{
- {"[8088] AMI XT clone", ROM_AMIXT, "amixt", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE, 64, 640, 64, xt_init, NULL},
- {"[8088] Atari PC3", ROM_ATARIPC3, "ataripc3", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE, 64, 640, 64, xt_init, NULL},
- {"[8088] Compaq Portable Plus", ROM_COMPAQ_PIP, "compaq_pip", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE, 128, 640, 64, compaq_xt_init, NULL},
- {"[8088] DTK XT clone", ROM_DTKXT, "dtk", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE, 64, 640, 64, xt_init, NULL},
- {"[8088] Generic XT clone", ROM_GENXT, "genxt", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE, 32, 704, 16, xt_init, NULL},
- {"[8088] IBM PC", ROM_IBMPC, "ibmpc", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE, 64, 640, 32, xt_init, NULL},
- {"[8088] IBM PCjr", ROM_IBMPCJR, "ibmpcjr", { {"", cpus_pcjr}, {"", NULL}, {"", NULL}}, MODEL_GFX_FIXED, 128, 640, 64, pcjr_init, &pcjr_device},
- {"[8088] IBM XT", ROM_IBMXT, "ibmxt", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE, 64, 640, 64, xt_init, NULL},
- {"[8088] Juko XT clone", ROM_JUKOPC, "jukopc", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE, 64, 640, 64, xt_init, NULL},
- {"[8088] Leading Edge Model M", ROM_LEDGE_MODELM, "ledge_modelm", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE, 128, 704, 64, xt_init, NULL},
- {"[8088] NCR PC4i", ROM_NCR_PC4I, "ncr_pc4i", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE, 256, 640, 64, xt_init, NULL},
- {"[8088] Phoenix XT clone", ROM_PXXT, "pxxt", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE, 64, 640, 64, xt_init, NULL},
- {"[8088] Schneider EuroPC", ROM_EUROPC, "europc", { {"", cpus_europc}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE, 512, 640, 128, europc_init, NULL},
- {"[8088] Tandy 1000", ROM_TANDY, "tandy", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, MODEL_GFX_FIXED, 128, 640, 128, tandy1k_init, &tandy1000_device},
- {"[8088] Tandy 1000 HX", ROM_TANDY1000HX, "tandy1000hx", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, MODEL_GFX_FIXED, 256, 640, 128, tandy1k_init, &tandy1000hx_device},
- {"[8088] Thomson TO16 PC", ROM_TO16_PC, "to16_pc", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE, 512, 640, 128, xt_init, NULL},
- {"[8088] Toshiba T1000", ROM_T1000, "t1000", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, MODEL_GFX_FIXED, 512, 1280, 768, xt_t1000_init, NULL},
- {"[8088] VTech Laser Turbo XT", ROM_LTXT, "ltxt", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE, 64, 1152, 64, xt_laserxt_init, NULL},
- {"[8088] Xi8088", ROM_XI8088, "xi8088", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PS2, 64, 1024, 128, xt_xi8088_init, &xi8088_device},
- {"[8088] Zenith Data SupersPort", ROM_ZD_SUPERS, "zdsupers", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE, 128, 640, 128, xt_zenith_init, NULL},
-
- {"[8086] Amstrad PC1512", ROM_PC1512, "pc1512", { {"", cpus_pc1512}, {"", NULL}, {"", NULL}}, MODEL_GFX_FIXED|MODEL_AMSTRAD, 512, 640, 128, ams_init, &ams1512_device},
- {"[8086] Amstrad PC1640", ROM_PC1640, "pc1640", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, MODEL_GFX_DISABLE_HW|MODEL_AMSTRAD, 640, 640, 0, ams_init, &ams1512_device},
- {"[8086] Amstrad PC2086", ROM_PC2086, "pc2086", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, MODEL_GFX_DISABLE_HW|MODEL_AMSTRAD, 640, 640, 0, ams_init, &ams2086_device},
- {"[8086] Amstrad PC3086", ROM_PC3086, "pc3086", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, MODEL_GFX_DISABLE_HW|MODEL_AMSTRAD, 640, 640, 0, ams_init, &ams3086_device},
- {"[8086] Amstrad PC5086", ROM_PC5086, "pc5086", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_PS2, 640, 640, 0, pc5086_init, &f82c710_upc_device},
- {"[8086] Amstrad PPC512/640", ROM_PPC512, "ppc512", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, MODEL_GFX_DISABLE_HW|MODEL_AMSTRAD, 512, 640, 128, ams_init, &ams1512_device},
- {"[8086] Compaq Deskpro", ROM_DESKPRO, "deskpro", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE, 128, 640, 128, compaq_xt_init, NULL},
- {"[8086] Olivetti M24", ROM_OLIM24, "olivetti_m24", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, MODEL_GFX_FIXED|MODEL_OLIM24, 128, 640, 128, olim24_init, NULL},
- {"[8086] Sinclair PC200", ROM_PC200, "pc200", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, MODEL_GFX_DISABLE_HW|MODEL_AMSTRAD, 512, 640, 128, ams_init, &ams1512_device},
- {"[8086] Tandy 1000 SL/2", ROM_TANDY1000SL2, "tandy1000sl2", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, MODEL_GFX_FIXED, 512, 768, 128, tandy1ksl2_init, NULL},
- {"[8088] Toshiba T1200", ROM_T1200, "t1200", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, MODEL_GFX_FIXED, 1024, 2048,1024, xt_t1200_init, NULL},
- {"[8086] VTech Laser XT3", ROM_LXT3, "lxt3", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE, 512, 1152, 128, xt_laserxt_init, NULL},
-
- {"[286] AMI 286 clone", ROM_AMI286, "ami286", { {"", cpus_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_HAS_IDE, 512,16384, 128, at_neat_init, NULL},
- {"[286] Award 286 clone", ROM_AWARD286, "award286", { {"", cpus_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_HAS_IDE, 512,16384, 128, at_scat_init, NULL},
- {"[286] Bull Micral 45", ROM_BULL_MICRAL_45, "bull_micral_45", { {"", cpus_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_HAS_IDE, 1024, 6144, 128, ibm_at_init, NULL},
- {"[286] Commodore PC 30 III", ROM_CMDPC30, "cmdpc30", { {"", cpus_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_HAS_IDE, 640,16384, 128, at_cbm_init, NULL},
- {"[286] Compaq Portable II", ROM_COMPAQ_PII, "compaq_pii", { {"", cpus_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_HAS_IDE, 256,15872, 128, ibm_at_init, NULL},
- {"[286] DELL System 200", ROM_DELL200, "dells200", { {"", cpus_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT, 640,16384, 128, dells200_init, NULL},
- {"[286] Epson PC AX", ROM_EPSON_PCAX, "epson_pcax", { {"", cpus_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT, 256,15872, 128, at_init, NULL},
- {"[286] Epson PC AX2e", ROM_EPSON_PCAX2E, "epson_pcax2e", { {"", cpus_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PS2, 256,15872, 128, at_init, NULL},
- {"[286] Goldstar GDC-212M", ROM_GDC212M, "gdc212m", { {"", cpus_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PS2|MODEL_HAS_IDE, 512, 4096, 512, at_scat_init, NULL},
- {"[286] GW-286CT GEAR", ROM_GW286CT, "gw286ct", { {"", cpus_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT, 512,16384, 128, at_scat_init, NULL},
- {"[286] Hyundai Super-286TR", ROM_HYUNDAI_SUPER286TR, "super286tr", { {"AMD", cpus_super286tr}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_HAS_IDE, 1024, 4096, 128, at_scat_init, &f82c710_upc_device},
- {"[286] IBM AT", ROM_IBMAT, "ibmat", { {"", cpus_ibmat}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT, 256,15872, 128, ibm_at_init, NULL},
- {"[286] IBM PS/1 model 2011", ROM_IBMPS1_2011, "ibmps1es", { {"", cpus_ps1_m2011}, {"", NULL}, {"", NULL}}, MODEL_GFX_FIXED|MODEL_AT|MODEL_PS2, 512,16384, 512, ps1_m2011_init, NULL},
- {"[286] IBM PS/2 Model 30-286", ROM_IBMPS2_M30_286, "ibmps2_m30_286", { {"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_FIXED|MODEL_AT|MODEL_PS2, 1, 16, 1, ps2_m30_286_init, NULL},
- {"[286] IBM PS/2 Model 50", ROM_IBMPS2_M50, "ibmps2_m50", { {"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_DISABLE_SW|MODEL_AT|MODEL_PS2|MODEL_MCA, 1, 16, 1, ps2_model_50_init, NULL},
- {"[286] IBM XT Model 286", ROM_IBMXT286, "ibmxt286", { {"", cpus_ibmxt286}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT, 256,15872, 128, ibm_at_init, NULL},
- {"[286] Samsung SPC-4200P", ROM_SPC4200P, "spc4200p", { {"", cpus_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PS2|MODEL_HAS_IDE, 512, 2048, 128, at_scat_init, NULL},
- {"[286] Samsung SPC-4216P", ROM_SPC4216P, "spc4216p", { {"", cpus_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PS2|MODEL_HAS_IDE, 1, 5, 1, at_scat_init, NULL},
- {"[286] Samsung SPC-4620P", ROM_SPC4620P, "spc4620p", { {"", cpus_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_DISABLE_HW|MODEL_AT|MODEL_PS2|MODEL_HAS_IDE, 1, 5, 1, at_scat_init, NULL},
- {"[286] Toshiba T3100e", ROM_T3100E, "t3100e", { {"", cpus_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_FIXED|MODEL_AT|MODEL_HAS_IDE, 1024, 5120, 256, at_t3100e_init, NULL},
- {"[286] Trigem 286M", ROM_TG286M, "tg286m", { {"", cpus_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_HAS_IDE, 512, 8192, 128, at_headland_init, NULL},
- {"[286] Tulip AT Compact", ROM_TULIP_TC7, "tulip_tc7", { {"", cpus_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_HAS_IDE, 640,15872, 128, ibm_at_init, NULL},
-
- {"[386SX] Acer 386SX25/N", ROM_ACER386, "acer386", { {"Intel", cpus_acer}, {"", NULL}, {"", NULL}}, MODEL_GFX_DISABLE_SW|MODEL_AT|MODEL_PS2|MODEL_HAS_IDE, 1, 16, 1, at_acer386sx_init, NULL},
- {"[386SX] AMA-932J", ROM_AMA932J, "ama932j", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, MODEL_GFX_FIXED|MODEL_AT|MODEL_HAS_IDE, 512, 8192, 128, at_headland_init, NULL},
- {"[386SX] AMI 386SX clone", ROM_AMI386SX, "ami386", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, MODEL_GFX_NONE|MODEL_AT|MODEL_HAS_IDE, 512,16384, 128, at_headland_init, NULL},
- {"[386SX] Amstrad MegaPC", ROM_MEGAPC, "megapc", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, MODEL_GFX_DISABLE_HW|MODEL_AT|MODEL_PS2|MODEL_HAS_IDE, 1, 16, 1, at_wd76c10_init, NULL},
- {"[386SX] Commodore SL386SX-25", ROM_CBM_SL386SX25, "cbm_sl386sx25", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, MODEL_GFX_FIXED|MODEL_AT|MODEL_PS2|MODEL_HAS_IDE, 1024,16384, 512, at_scamp_init, NULL},
- {"[386SX] DTK 386SX clone", ROM_DTK386, "dtk386", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, MODEL_GFX_NONE|MODEL_AT|MODEL_HAS_IDE, 512,16384, 128, at_neat_init, NULL},
- {"[386SX] Epson PC AX3", ROM_EPSON_PCAX3, "epson_pcax3", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, MODEL_GFX_NONE|MODEL_AT, 256,15872, 128, at_init, NULL},
- {"[386SX] IBM PS/1 model 2121", ROM_IBMPS1_2121, "ibmps1_2121", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, MODEL_GFX_FIXED|MODEL_AT|MODEL_PS2|MODEL_HAS_IDE, 1, 16, 1, ps1_m2121_init, NULL},
- {"[386SX] IBM PS/2 Model 55SX", ROM_IBMPS2_M55SX, "ibmps2_m55sx", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, MODEL_GFX_DISABLE_SW|MODEL_AT|MODEL_PS2|MODEL_MCA, 1, 8, 1, ps2_model_55sx_init, NULL},
- {"[386SX] KMX-C-02", ROM_KMXC02, "kmxc02", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, MODEL_GFX_NONE|MODEL_AT, 512,16384, 512, at_scatsx_init, NULL},
- {"[386SX] Packard Bell Legend 300SX", ROM_PB_L300SX, "pb_l300sx", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PS2|MODEL_HAS_IDE, 1, 16, 1, pb_l300sx_init, NULL},
- {"[386SX] Samsung SPC-6033P", ROM_SPC6033P, "spc6033p", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, MODEL_GFX_DISABLE_HW|MODEL_AT|MODEL_PS2|MODEL_HAS_IDE, 2, 12, 2, at_scamp_init, NULL},
-
- {"[386DX] AMI 386DX clone", ROM_AMI386DX_OPTI495, "ami386dx", { {"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}}, MODEL_GFX_NONE|MODEL_AT|MODEL_HAS_IDE, 1, 256, 1, at_opti495_init, NULL},
- {"[386DX] Compaq Deskpro 386", ROM_DESKPRO_386, "deskpro386", { {"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}}, MODEL_GFX_NONE|MODEL_AT, 1, 15, 1, deskpro386_init, NULL},
- {"[386DX] ECS 386/32", ROM_ECS_386_32, "ecs_386_32", { {"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}}, MODEL_GFX_NONE|MODEL_AT, 1, 16, 1, at_cs8230_init, NULL},
- {"[386DX] IBM PS/2 Model 70 (type 3)", ROM_IBMPS2_M70_TYPE3, "ibmps2_m70_type3", { {"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}}, MODEL_GFX_DISABLE_SW|MODEL_AT|MODEL_PS2|MODEL_MCA, 2, 16, 2, ps2_model_70_init, NULL},
- {"[386DX] IBM PS/2 Model 80", ROM_IBMPS2_M80, "ibmps2_m80", { {"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}}, MODEL_GFX_DISABLE_SW|MODEL_AT|MODEL_PS2|MODEL_MCA, 1, 12, 1, ps2_model_80_init, NULL},
- {"[386DX] MR 386DX clone", ROM_MR386DX_OPTI495, "mr386dx", { {"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}}, MODEL_GFX_NONE|MODEL_AT|MODEL_HAS_IDE, 1, 256, 1, at_opti495_init, NULL},
- {"[386DX] Samsung SPC-6000A", ROM_SPC6000A, "spc6000a", { {"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}}, MODEL_GFX_NONE|MODEL_AT|MODEL_HAS_IDE, 1, 32, 1, at_cs8230_init, NULL},
-
- {"[486] AMI 486 clone", ROM_AMI486, "ami486", { {"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}}, MODEL_GFX_NONE|MODEL_AT|MODEL_HAS_IDE, 1, 256, 1, at_ali1429_init, NULL},
- {"[486] AMI WinBIOS 486", ROM_WIN486, "win486", { {"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}}, MODEL_GFX_NONE|MODEL_AT|MODEL_HAS_IDE, 1, 256, 1, at_ali1429_init, NULL},
- {"[486] Award SiS 496/497", ROM_SIS496, "sis496", { {"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PCI|MODEL_HAS_IDE, 1, 256, 1, at_sis496_init, NULL},
- {"[486] Elonex PC-425X", ROM_ELX_PC425X, "elx_pc425x", { {"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}}, MODEL_GFX_FIXED|MODEL_AT|MODEL_HAS_IDE, 1, 256, 1, at_sl82c460_init, NULL},
- {"[486] IBM PS/1 Model 2133 (EMEA 451)",ROM_IBMPS1_2133_451, "ibmps1_2133", { {"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}}, MODEL_GFX_FIXED|MODEL_AT|MODEL_PS2, 2, 64, 2, ps1_m2133_init, NULL},
- {"[486] IBM PS/2 Model 70 (type 4)", ROM_IBMPS2_M70_TYPE4, "ibmps2_m70_type4", { {"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}}, MODEL_GFX_DISABLE_SW|MODEL_AT|MODEL_PS2|MODEL_MCA, 2, 16, 2, ps2_model_70_init, NULL},
- {"[486] Packard Bell PB410A", ROM_PB410A, "pb410a", { {"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}}, MODEL_GFX_DISABLE_SW|MODEL_AT|MODEL_PS2|MODEL_HAS_IDE, 1, 64, 1, at_pb410a_init, NULL},
-
- {"[Socket 4] Intel Premiere/PCI", ROM_REVENGE, "revenge", { {"Intel", cpus_Pentium5V}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 1, 128, 1, at_batman_init, NULL},
- {"[Socket 4] Packard Bell PB520R",ROM_PB520R, "pb520r", { {"Intel", cpus_Pentium5V}, {"", NULL}, {"", NULL}}, MODEL_GFX_DISABLE_SW|MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 1, 128, 1, at_pb520r_init, NULL},
-
- {"[Socket 5] Intel Advanced/EV", ROM_ENDEAVOR, "endeavor", { {"Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 1, 128, 1, at_endeavor_init, NULL},
- {"[Socket 5] Intel Advanced/ZP", ROM_ZAPPA, "zappa", { {"Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 1, 128, 1, at_zappa_init, NULL},
- {"[Socket 5] Itautec Infoway Multimidia", ROM_ITAUTEC_INFOWAYM, "infowaym",{ {"Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 8, 128, 1, at_zappa_init, NULL},
- {"[Socket 5] Packard Bell PB570", ROM_PB570, "pb570", { {"Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"", NULL}}, MODEL_GFX_DISABLE_SW|MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 1, 128, 1, at_pb570_init, NULL},
-
- {"[Socket 7] ASUS P/I-P55TVP4", ROM_P55TVP4, "p55tvp4", { {"Intel", cpus_Pentium}, {"AMD", cpus_K6_S7}, {"IDT", cpus_WinChip}, {"Cyrix", cpus_6x86}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 8, 128, 1, at_p55tvp4_init, NULL},
- {"[Socket 7] ASUS P/I-P55T2P4", ROM_P55T2P4, "p55t2p4", { {"Intel", cpus_Pentium}, {"AMD", cpus_K6_S7}, {"IDT", cpus_WinChip}, {"Cyrix", cpus_6x86}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 8, 256, 1, at_p55t2p4_init, NULL},
- {"[Socket 7] Epox P55-VA", ROM_P55VA, "p55va", { {"Intel", cpus_Pentium}, {"AMD", cpus_K6_S7}, {"IDT", cpus_WinChip}, {"Cyrix", cpus_6x86}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 8, 128, 1, at_p55va_init, NULL},
- {"[Socket 7] Shuttle HOT-557", ROM_430VX, "430vx", { {"Intel", cpus_Pentium}, {"AMD", cpus_K6_S7}, {"IDT", cpus_WinChip}, {"Cyrix", cpus_6x86}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 8, 128, 1, at_i430vx_init, NULL},
-
- {"[Super 7] FIC VA-503+", ROM_FIC_VA503P, "fic_va503p", { {"Intel", cpus_Pentium}, {"AMD", cpus_K6_SS7}, {"IDT", cpus_WinChip_SS7}, {"Cyrix", cpus_6x86_SS7}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 1, 512, 1, at_mvp3_init, NULL},
-
- {"[Socket 8] Intel VS440FX", ROM_VS440FX, "vs440fx", { {"Intel", cpus_PentiumPro}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 8, 256, 8, at_vs440fx_init, NULL},
-
- {"[Slot 1] Gigabyte GA-686BX", ROM_GA686BX, "ga686bx", { {"Intel", cpus_Slot1_100MHz}, {"VIA", cpus_VIA_100MHz}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 8, 512, 8, at_ga686bx_init, NULL},
-
+ {"IBM PC", ROM_IBMPC, "ibmpc", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, xt_init, NULL},
+ {"IBM XT", ROM_IBMXT, "ibmxt", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, xt_init, NULL},
+ {"IBM PCjr", ROM_IBMPCJR, "ibmpcjr", { {"", cpus_pcjr}, {"", NULL}, {"", NULL}}, 1, 0, 128, 640, 64, pcjr_init, &pcjr_device},
+ {"Generic XT clone", ROM_GENXT, "genxt", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, xt_init, NULL},
+ {"AMI XT clone", ROM_AMIXT, "amixt", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, xt_init, NULL},
+ {"DTK XT clone", ROM_DTKXT, "dtk", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, xt_init, NULL},
+ {"VTech Laser Turbo XT", ROM_LTXT, "ltxt", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, xt_init, NULL},
+ {"VTech Laser XT3", ROM_LXT3, "lxt3", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, xt_init, NULL},
+ {"Phoenix XT clone", ROM_PXXT, "pxxt", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, xt_init, NULL},
+ {"Juko XT clone", ROM_JUKOPC, "jukopc", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, 0, 0, 64, 640, 64, xt_init, NULL},
+ {"Tandy 1000", ROM_TANDY, "tandy", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, 1, 0, 128, 640, 128, tandy1k_init, &tandy1000_device},
+ {"Tandy 1000 HX", ROM_TANDY1000HX, "tandy1000hx", { {"", cpus_8088}, {"", NULL}, {"", NULL}}, 1, 0, 256, 640, 128, tandy1k_init, &tandy1000hx_device},
+ {"Tandy 1000 SL/2", ROM_TANDY1000SL2, "tandy1000sl2", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, 1, 0, 512, 768, 128, tandy1ksl2_init, NULL},
+ {"Amstrad PC1512", ROM_PC1512, "pc1512", { {"", cpus_pc1512}, {"", NULL}, {"", NULL}}, 1, MODEL_AMSTRAD, 512, 640, 128, ams_init, NULL},
+ {"Sinclair PC200", ROM_PC200, "pc200", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, 1, MODEL_AMSTRAD, 512, 640, 128, ams_init, NULL},
+ {"Euro PC", ROM_EUROPC, "europc", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, 0, 0, 512, 640, 128, europc_init, NULL},
+ {"Olivetti M24", ROM_OLIM24, "olivetti_m24", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, 1, MODEL_OLIM24, 128, 640, 128, olim24_init, NULL},
+ {"Amstrad PC1640", ROM_PC1640, "pc1640", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, 1, MODEL_AMSTRAD, 640, 640, 0, ams_init, NULL},
+ {"Amstrad PC2086", ROM_PC2086, "pc2086", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, 1, MODEL_AMSTRAD, 640, 640, 0, ams_init, NULL},
+ {"Amstrad PC3086", ROM_PC3086, "pc3086", { {"", cpus_8086}, {"", NULL}, {"", NULL}}, 1, MODEL_AMSTRAD, 640, 640, 0, ams_init, NULL},
+ {"IBM AT", ROM_IBMAT, "ibmat", { {"", cpus_ibmat}, {"", NULL}, {"", NULL}}, 0, MODEL_AT, 1, 16, 1, ibm_at_init, NULL},
+ {"Commodore PC 30 III", ROM_CMDPC30, "cmdpc30", { {"", cpus_286}, {"", NULL}, {"", NULL}}, 0, MODEL_AT|MODEL_HAS_IDE, 1, 16, 1, at_ide_init, NULL},
+ {"AMI 286 clone", ROM_AMI286, "ami286", { {"", cpus_286}, {"", NULL}, {"", NULL}}, 0, MODEL_AT|MODEL_HAS_IDE, 1, 16, 1, at_neat_init, NULL},
+ {"Award 286 clone", ROM_AWARD286, "award286", { {"", cpus_286}, {"", NULL}, {"", NULL}}, 0, MODEL_AT|MODEL_HAS_IDE, 1, 16, 1, at_scat_init, NULL},
+ {"DELL System 200", ROM_DELL200, "dells200", { {"", cpus_286}, {"", NULL}, {"", NULL}}, 0, MODEL_AT, 1, 16, 1, at_init, NULL},
+ {"IBM PS/1 model 2011", ROM_IBMPS1_2011, "ibmps1es", { {"", cpus_ps1_m2011}, {"", NULL}, {"", NULL}}, 1, MODEL_AT|MODEL_PS2, 1, 16, 1, ps1_m2011_init, NULL},
+ {"IBM PS/2 Model 30-286", ROM_IBMPS2_M30_286, "ibmps2_m30_286", { {"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}}, 1, MODEL_AT|MODEL_PS2, 1, 16, 1, ps2_m30_286_init, NULL},
+ {"IBM PS/2 Model 50", ROM_IBMPS2_M50, "ibmps2_m50", { {"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}}, 1, MODEL_AT|MODEL_PS2|MODEL_MCA, 1, 16, 1, ps2_model_50_init, NULL},
+ {"IBM PS/1 model 2121", ROM_IBMPS1_2121, "ibmps1_2121", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, 1, MODEL_AT|MODEL_PS2|MODEL_HAS_IDE, 1, 16, 1, ps1_m2121_init, NULL},
+ {"Compaq Deskpro 386", ROM_DESKPRO_386, "deskpro386", { {"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}}, 0, MODEL_AT, 1, 15, 1, deskpro386_init, NULL},
+ {"IBM PS/2 Model 55SX", ROM_IBMPS2_M55SX, "ibmps2_m55sx", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, 1, MODEL_AT|MODEL_PS2|MODEL_MCA, 1, 8, 1, ps2_model_55sx_init, NULL},
+ {"Acer 386SX25/N", ROM_ACER386, "acer386", { {"Intel", cpus_acer}, {"", NULL}, {"", NULL}}, 1, MODEL_AT|MODEL_PS2|MODEL_HAS_IDE, 1, 16, 1, at_acer386sx_init, NULL},
+ {"DTK 386SX clone", ROM_DTK386, "dtk386", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, 0, MODEL_AT|MODEL_HAS_IDE, 1, 16, 1, at_neat_init, NULL},
+/* {"Phoenix 386 clone", ROM_PX386, { "Intel", cpus_i386SX, "AMD", cpus_Am386SX, "Cyrix", cpus_486SLC}, 0, MODEL_AT, 1, 16, 1, at_init, NULL},*/
+ {"Amstrad MegaPC", ROM_MEGAPC, "megapc", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, 1, MODEL_AT|MODEL_PS2|MODEL_HAS_IDE, 1, 16, 1, at_wd76c10_init, NULL},
+ {"AMI 386SX clone", ROM_AMI386SX, "ami386", { {"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}}, 0, MODEL_AT|MODEL_HAS_IDE, 1, 256, 1, at_headland_init, NULL},
+ {"IBM PS/2 Model 80", ROM_IBMPS2_M80, "ibmps2_m80", { {"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}}, 1, MODEL_AT|MODEL_PS2|MODEL_MCA, 1, 12, 1, ps2_model_80_init, NULL},
+ {"MR 386DX clone", ROM_MR386DX_OPTI495, "mr386dx", { {"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}}, 0, MODEL_AT|MODEL_HAS_IDE, 1, 256, 1, at_opti495_init, NULL},
+ {"AMI 386DX clone", ROM_AMI386DX_OPTI495, "ami386dx", { {"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}}, 0, MODEL_AT|MODEL_HAS_IDE, 1, 256, 1, at_opti495_init, NULL},
+ {"AMI 486 clone", ROM_AMI486, "ami486", { {"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}}, 0, MODEL_AT|MODEL_HAS_IDE, 1, 256, 1, at_ali1429_init, NULL},
+ {"AMI WinBIOS 486", ROM_WIN486, "win486", { {"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}}, 0, MODEL_AT|MODEL_HAS_IDE, 1, 256, 1, at_ali1429_init, NULL},
+/* {"AMI WinBIOS 486 PCI", ROM_PCI486, { "Intel", cpus_i486, "AMD", cpus_Am486, "Cyrix", cpus_Cx486}, 0, 1, 1, 256, 1, at_um8881f_init},*/
+ {"Award SiS 496/497", ROM_SIS496, "sis496", { {"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}}, 0, MODEL_AT|MODEL_PCI|MODEL_HAS_IDE, 1, 256, 1, at_sis496_init, NULL},
+ {"Intel Premiere/PCI", ROM_REVENGE, "revenge", { {"Intel", cpus_Pentium5V}, {"", NULL}, {"", NULL}}, 0, MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 1, 128, 1, at_batman_init, NULL},
+ {"Intel Advanced/EV", ROM_ENDEAVOR, "endeavor", { {"Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"Cyrix", cpus_6x86}}, 0, MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 1, 128, 1, at_endeavor_init, NULL},
+ {"Award 430VX PCI", ROM_430VX, "430vx", { {"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"Cyrix", cpus_6x86}}, 0, MODEL_AT|MODEL_PCI|MODEL_PS2|MODEL_HAS_IDE, 1, 256, 1, at_i430vx_init, NULL},
{"", -1, "", {{"", 0}, {"", 0}, {"", 0}}, 0,0,0, 0}
};
@@ -262,11 +150,6 @@ int model_getromset()
return models[model].id;
}
-int model_getromset_from_model(int model)
-{
- return models[model].id;
-}
-
int model_getmodel(int romset)
{
int c = 0;
@@ -310,20 +193,6 @@ int model_get_model_from_internal_name(char *s)
return 0;
}
-int model_has_fixed_gfx(int model)
-{
- int gfx_flags = models[model].flags & MODEL_GFX_MASK;
-
- return (gfx_flags == MODEL_GFX_FIXED);
-}
-
-int model_has_optional_gfx(int model)
-{
- int gfx_flags = models[model].flags & MODEL_GFX_MASK;
-
- return (gfx_flags == MODEL_GFX_DISABLE_HW || gfx_flags == MODEL_GFX_DISABLE_SW);
-}
-
void common_init()
{
dma_init();
@@ -331,8 +200,8 @@ void common_init()
lpt_init();
pic_init();
pit_init();
- serial1_init(0x3f8, 4, 1);
- serial2_init(0x2f8, 3, 1);
+ serial1_init(0x3f8, 4);
+ serial2_init(0x2f8, 3);
}
void xt_init()
@@ -343,16 +212,6 @@ void xt_init()
keyboard_xt_init();
nmi_init();
device_add(&gameport_device);
- if (romset == ROM_IBMPC)
- device_add(&cassette_device);
-}
-
-void compaq_xt_init()
-{
- xt_init();
- lpt1_remove();
- lpt2_remove();
- lpt1_init(0x3bc);
}
void pcjr_init()
@@ -362,11 +221,10 @@ void pcjr_init()
pic_init();
pit_init();
pit_set_out_func(&pit, 0, pit_irq0_timer_pcjr);
- serial1_init(0x2f8, 3, 1);
+ serial1_init(0x2f8, 3);
keyboard_pcjr_init();
device_add(&sn76489_device);
nmi_mask = 0x80;
- device_add(&cassette_device);
}
void tandy1k_init()
@@ -402,27 +260,14 @@ void ams_init()
AMSTRAD = 1;
common_init();
mem_add_bios();
- lpt1_remove();
amstrad_init();
keyboard_amstrad_init();
- device_add(&nvr_device);
- nmi_init();
- fdc_set_dskchg_activelow();
+ nvr_init();
+ nmi_init();
+ fdc_set_dskchg_activelow();
device_add(&gameport_device);
}
-void pc5086_init()
-{
- xt_init();
- lpt1_remove(); /* remove LPT ports, they will be enabled by 82C710 */
- lpt2_remove();
- serial1_remove(); /* remove COM ports, they will be enabled by 82C710 */
- serial2_remove();
- device_add(&nvr_device);
- fdc_set_dskchg_activelow();
- superxt_init();
-}
-
void europc_init()
{
common_init();
@@ -438,47 +283,12 @@ void olim24_init()
common_init();
mem_add_bios();
keyboard_olim24_init();
- device_add(&nvr_device);
+ nvr_init();
olivetti_m24_init();
nmi_init();
device_add(&gameport_device);
}
-void xt_laserxt_init()
-{
- xt_init();
- laserxt_init();
-}
-
-void xt_zenith_init() /* [8088] Zenith Data Systems SupersPort */
-{
- dma_init();
- fdc_add();
- lpt_init();
- lpt2_remove(); /* only one parallel port */
- pic_init();
- pit_init();
- serial1_init(0x3f8, 4, 1); /* only one serial port */
- mem_add_bios();
- device_add(&zenith_scratchpad_device);
- pit_set_out_func(&pit, 1, pit_refresh_timer_xt);
- keyboard_xt_init();
- nmi_init();
-}
-
-void xt_xi8088_init()
-{
- common_init();
- mem_add_bios();
- keyboard_at_init();
- keyboard_at_init_ps2();
- nmi_init();
- device_add(&nvr_device);
- pic2_init();
- device_add(&gameport_device);
- device_add(&sst_39sf010_device);
-}
-
void at_init()
{
AT = 1;
@@ -487,10 +297,9 @@ void at_init()
pit_set_out_func(&pit, 1, pit_refresh_timer_at);
dma16_init();
keyboard_at_init();
- device_add(&nvr_device);
+ nvr_init();
pic2_init();
device_add(&gameport_device);
- nmi_mask = 0;
}
void ibm_at_init()
@@ -499,10 +308,10 @@ void ibm_at_init()
mem_remap_top_384k();
}
-void at_cbm_init()
+void at_ide_init()
{
at_init();
- cbm_io_init();
+ ide_init();
}
void deskpro386_init()
@@ -511,12 +320,6 @@ void deskpro386_init()
compaq_init();
}
-void dells200_init()
-{
- at_init();
- dells200_chipset_init();
-}
-
void ps1_common_init()
{
AT = 1;
@@ -524,8 +327,9 @@ void ps1_common_init()
mem_add_bios();
pit_set_out_func(&pit, 1, pit_refresh_timer_at);
dma16_init();
+ ide_init();
keyboard_at_init();
- device_add(&nvr_device);
+ nvr_init();
pic2_init();
fdc_set_dskchg_activelow();
device_add(&ps1_audio_device);
@@ -537,7 +341,6 @@ void ps1_m2011_init()
{
ps1_common_init();
ps1mb_init();
- mem_remap_top_384k();
}
void ps1_m2121_init()
@@ -547,13 +350,6 @@ void ps1_m2121_init()
fdc_set_ps1();
}
-void ps1_m2133_init(void)
-{
- at_init();
- vl82c480_init();
- ps1mb_m2133_init();
-}
-
void ps2_m30_286_init()
{
AT = 1;
@@ -561,9 +357,10 @@ void ps2_m30_286_init()
mem_add_bios();
pit_set_out_func(&pit, 1, pit_refresh_timer_at);
dma16_init();
+ ide_init();
keyboard_at_init();
// mouse_ps2_init();
- device_add(&nvr_device);
+ nvr_init();
pic2_init();
ps2board_init();
fdc_set_dskchg_activelow();
@@ -576,15 +373,14 @@ static void ps2_common_init()
mem_add_bios();
dma16_init();
ps2_dma_init();
+ ide_init();
keyboard_at_init();
keyboard_at_init_ps2();
// mouse_ps2_init();
- device_add(&nvr_device);
+ nvr_init();
pic2_init();
pit_ps2_init();
-
- nmi_mask = 0x80;
}
void ps2_model_50_init()
@@ -599,12 +395,6 @@ void ps2_model_55sx_init()
ps2_mca_board_model_55sx_init();
}
-void ps2_model_70_init()
-{
- ps2_common_init();
- ps2_mca_board_model_70_type34_init(romset == ROM_IBMPS2_M70_TYPE4);
-}
-
void ps2_model_80_init()
{
ps2_common_init();
@@ -614,264 +404,106 @@ void ps2_model_80_init()
void at_neat_init()
{
at_init();
+ ide_init();
neat_init();
}
-void at_scamp_init()
-{
- at_init();
- scamp_init();
-}
-
void at_scat_init()
{
at_init();
+ ide_init();
scat_init();
}
-void at_scatsx_init()
-{
- at_init();
- scatsx_init();
-}
-
void at_acer386sx_init()
{
at_init();
+ ide_init();
acer386sx_init();
}
void at_wd76c10_init()
{
at_init();
+ ide_init();
wd76c10_init();
}
void at_headland_init()
{
at_init();
+ ide_init();
headland_init();
}
void at_opti495_init()
{
at_init();
+ ide_init();
opti495_init();
}
-void at_cs8230_init()
-{
- at_init();
- cs8230_init();
-}
-
void at_ali1429_init()
{
at_init();
+ ide_init();
ali1429_init();
}
-void pb_l300sx_init()
+void at_um8881f_init()
{
at_init();
- acc2036_init();
+ ide_init();
+ pci_init(PCI_CONFIG_TYPE_1, 0, 31);
+ um8881f_init();
}
-void at_pb410a_init()
-{
- at_init();
- acc2168_init();
- acc3221_init();
-}
-
-
void at_sis496_init()
{
at_init();
- pci_init(PCI_CONFIG_TYPE_1);
- pci_slot(0xb);
- pci_slot(0xd);
- pci_slot(0xf);
+ ide_init();
+ pci_init(PCI_CONFIG_TYPE_1, 0, 31);
device_add(&sis496_device);
}
-void at_sl82c460_init()
-{
- at_init();
- sl82c460_init();
-}
-
void at_batman_init()
{
at_init();
- pci_init(PCI_CONFIG_TYPE_2);
- pci_slot(0xc);
- pci_slot(0xe);
- pci_slot(0x6);
+ ide_init();
+ pci_init(PCI_CONFIG_TYPE_2, 0xd, 0x10);
i430lx_init();
- sio_init(2, 0xc, 0xe, 0x6, 0);
fdc37c665_init();
intel_batman_init();
device_add(&intel_flash_bxt_ami_device);
}
-void at_pb520r_init()
-{
- at_init();
- pci_init(PCI_CONFIG_TYPE_2);
- pci_slot(0xc);
- pci_slot(0xe);
- pci_slot(0x6);
- i430lx_init();
- sio_init(2, 0xc, 0xe, 0x6, 0);
- cmd640b_init(1);
- aip_82091aa_init(0x22);
- intel_batman_init();
- device_add(&intel_flash_bxt_ami_device);
-}
void at_endeavor_init()
{
at_init();
- pci_init(PCI_CONFIG_TYPE_1);
- pci_slot(0xd);
- pci_slot(0xe);
- pci_slot(0xf);
- pci_slot(0x10);
+ ide_init();
+ pci_init(PCI_CONFIG_TYPE_1, 0xd, 0x10);
i430fx_init();
- piix_init(7, 0xd, 0xe, 0xf, 0x10, i430fx_reset);
- pc87306_init(0x2e);
+ piix_init(7);
+ um8669f_init();
intel_endeavor_init();
device_add(&intel_flash_bxt_ami_device);
}
-void at_pb570_init()
-{
- at_init();
- pci_init(PCI_CONFIG_TYPE_1);
- pci_slot(0x11);
- pci_slot(0x13);
- i430fx_init();
- piix_init(7, 0x11, 0x13, 0xb, 0x8, i430fx_reset);
- pc87306_init(0x2e);
- intel_endeavor_init();
- device_add(&intel_flash_bxt_ami_device);
-}
-void at_zappa_init()
-{
- at_init();
- pci_init(PCI_CONFIG_TYPE_1);
- pci_slot(0xd);
- pci_slot(0xe);
- pci_slot(0xf);
- pci_slot(0x10);
- i430fx_init();
- piix_init(7, 0xd, 0xf, 0xe, 0x10, i430fx_reset);
- pc87306_init(0x2e);
- intel_zappa_init();
- device_add(&intel_flash_bxt_ami_device);
-}
-
-void at_p55va_init()
-{
- at_init();
- pci_init(PCI_CONFIG_TYPE_1);
- pci_slot(0x08);
- pci_slot(0x09);
- pci_slot(0x0A);
- pci_slot(0x0B);
- i430vx_init();
- piix_init(7, 0x08, 0x09, 0x0A, 0x0B, i430vx_reset);
- fdc37c932fr_init();
- device_add(&intel_flash_bxt_device);
-}
-
-void at_p55tvp4_init()
-{
- at_init();
- pci_init(PCI_CONFIG_TYPE_1);
- pci_slot(0x0C);
- pci_slot(0x0B);
- pci_slot(0x0A);
- pci_slot(0x09);
- i430vx_init();
- piix_init(7, 0x0C, 0x0B, 0x0A, 0x09, i430vx_reset);
- w83877f_init(0x3f0, 0x87);
- device_add(&intel_flash_bxt_device);
-}
void at_i430vx_init()
{
at_init();
- pci_init(PCI_CONFIG_TYPE_1);
- pci_slot(0x11);
- pci_slot(0x12);
- pci_slot(0x13);
- pci_slot(0x14);
+ ide_init();
+ pci_init(PCI_CONFIG_TYPE_1, 0, 31);
i430vx_init();
- piix_init(7, 18, 17, 20, 19, i430vx_reset);
+ piix_init(7);
um8669f_init();
device_add(&intel_flash_bxt_device);
}
-void at_p55t2p4_init()
-{
- at_init();
- pci_init(PCI_CONFIG_TYPE_1);
- pci_slot(0x0C);
- pci_slot(0x0B);
- pci_slot(0x0A);
- pci_slot(0x09);
- i430hx_init();
- piix_init(7, 0x0C, 0x0B, 0x0A, 0x09, i430hx_reset);
- w83877f_init(0x3f0, 0x87);
- device_add(&intel_flash_bxt_device);
-}
-
-void at_mvp3_init()
-{
- at_init();
- pci_init(PCI_CONFIG_TYPE_1);
- pci_slot(8);
- pci_slot(9);
- pci_slot(10);
- mvp3_init();
- vt82c586b_init(7, 8, 9, 10, 0);
- w83877tf_init(0x250, 0x89);
- device_add(&sst_39sf010_device);
-}
-
-void at_vs440fx_init()
-{
- at_init();
- pci_init(PCI_CONFIG_TYPE_1);
- pci_slot(0xb);
- pci_slot(0xf);
- pci_slot(0x11);
- pci_slot(0x13);
- i440fx_init();
- piix_init(7, 0xb, 0xf, 0x11, 0x13, i440fx_reset);
- pc87307_init(0x2e);
-// i440fx_init();
- device_add(&intel_flash_28fb200bxt_device);
-}
-
-void at_ga686bx_init()
-{
- at_init();
- pci_init(PCI_CONFIG_TYPE_1);
- pci_slot(0x8);
- pci_slot(0x9);
- pci_slot(0xa);
- pci_slot(0xb);
- i440bx_init();
- piix4_init(7, 0x8, 0x9, 0xa, 0xb, i440bx_reset);
- w83977tf_init(0x3f0, 0x87);
- device_add(&intel_flash_28f002bc_device);
-}
-
void model_init()
{
pclog("Initting as %s\n", model_getname());
- AMSTRAD = AT = PCI = TANDY = MCA = 0;
- ide_set_bus_master(NULL, NULL, NULL, NULL);
+ AMSTRAD = AT = PCI = TANDY = 0;
+ io_init();
models[model].init();
if (models[model].device)
diff --git a/src/model.h b/src/model.h
index 7b568f1..3931288 100644
--- a/src/model.h
+++ b/src/model.h
@@ -6,26 +6,17 @@
#define MODEL_MCA 0x20
#define MODEL_PCI 0x40
-/*Machine has no integrated graphics*/
-#define MODEL_GFX_NONE 0x000
-/*Machine has integrated graphics that can not be disabled*/
-#define MODEL_GFX_FIXED 0x100
-/*Machine has integrated graphics that can be disabled by jumpers or switches*/
-#define MODEL_GFX_DISABLE_HW 0x200
-/*Machine has integrated graphics that can be disabled through software*/
-#define MODEL_GFX_DISABLE_SW 0x300
-#define MODEL_GFX_MASK 0x300
-
typedef struct
{
- char name[64];
+ char name[32];
int id;
char internal_name[24];
struct
{
char name[8];
CPU *cpus;
- } cpu[5];
+ } cpu[4];
+ int fixed_gfxcard;
int flags;
int min_ram, max_ram;
int ram_granularity;
@@ -39,12 +30,9 @@ extern int model;
int model_count();
int model_getromset();
-int model_getromset_from_model(int model);
int model_getmodel(int romset);
char *model_getname();
char *model_get_internal_name();
int model_get_model_from_internal_name(char *s);
void model_init();
struct device_t *model_getdevice(int model);
-int model_has_fixed_gfx(int model);
-int model_has_optional_gfx(int model);
diff --git a/src/mouse.c b/src/mouse.c
index b808aac..3ac9b84 100644
--- a/src/mouse.c
+++ b/src/mouse.c
@@ -1,7 +1,6 @@
#include "ibm.h"
#include "mouse.h"
#include "amstrad.h"
-#include "mouse_msystems.h"
#include "mouse_ps2.h"
#include "mouse_serial.h"
#include "keyboard_olim24.h"
@@ -9,7 +8,6 @@
static mouse_t *mouse_list[] =
{
&mouse_serial_microsoft,
- &mouse_serial_msystems,
&mouse_ps2_2_button,
&mouse_intellimouse,
&mouse_amstrad,
diff --git a/src/mouse.h b/src/mouse.h
index d39f539..216ed73 100644
--- a/src/mouse.h
+++ b/src/mouse.h
@@ -1,6 +1,3 @@
-#ifndef _MOUSE_H_
-#define _MOUSE_H_
-
void mouse_emu_init();
void mouse_emu_close();
void mouse_poll(int x, int y, int z, int b);
@@ -27,5 +24,3 @@ typedef struct
} mouse_t;
extern int mouse_type;
-
-#endif
diff --git a/src/mouse_msystems.c b/src/mouse_msystems.c
deleted file mode 100644
index 9424191..0000000
--- a/src/mouse_msystems.c
+++ /dev/null
@@ -1,88 +0,0 @@
-#include
-#include "ibm.h"
-#include "mouse.h"
-#include "pic.h"
-#include "serial.h"
-#include "timer.h"
-
-typedef struct mouse_msystems_t
-{
- int mousepos, mousedelay;
- int oldb;
- SERIAL *serial;
-} mouse_msystems_t;
-
-static void mouse_msystems_poll(int x, int y, int z, int b, void *p)
-{
- mouse_msystems_t *mouse = (mouse_msystems_t *)p;
- SERIAL *serial = mouse->serial;
- uint8_t mousedat[5];
-
- if (!x && !y && b == mouse->oldb)
- return;
-
- mouse->oldb = b;
- y = -y;
- if (x > 127)
- x = 127;
- if (y > 127)
- y = 127;
- if (x < -128)
- x = -128;
- if (y < -128)
- y = -128;
-
- /*Use Mouse Systems format*/
- mousedat[0] = 0x87;
- if (b & 1)
- mousedat[0] &= ~0x04;
- if (b & 2)
- mousedat[0] &= ~0x01;
- if (b & 4)
- mousedat[0] &= ~0x02;
-
- mousedat[1] = x;
- mousedat[2] = y;
- mousedat[3] = 0;
- mousedat[4] = 0;
-
- if (!(serial->mctrl & 0x10))
- {
-// pclog("Serial data %02X %02X %02X\n", mousedat[0], mousedat[1], mousedat[2]);
- serial_write_fifo(mouse->serial, mousedat[0]);
- serial_write_fifo(mouse->serial, mousedat[1]);
- serial_write_fifo(mouse->serial, mousedat[2]);
- serial_write_fifo(mouse->serial, mousedat[3]);
- serial_write_fifo(mouse->serial, mousedat[4]);
- }
-}
-
-static void *mouse_msystems_init()
-{
- mouse_msystems_t *mouse = (mouse_msystems_t *)malloc(sizeof(mouse_msystems_t));
- memset(mouse, 0, sizeof(mouse_msystems_t));
-
- mouse->serial = &serial1;
- serial1.rcr_callback = NULL;
- serial1.rcr_callback_p = NULL;
-
- return mouse;
-}
-
-static void mouse_msystems_close(void *p)
-{
- mouse_msystems_t *mouse = (mouse_msystems_t *)p;
-
- free(mouse);
-
- serial1.rcr_callback = NULL;
-}
-
-mouse_t mouse_serial_msystems =
-{
- "Mouse Systems 3-button mouse (serial)",
- mouse_msystems_init,
- mouse_msystems_close,
- mouse_msystems_poll,
- MOUSE_TYPE_SERIAL | MOUSE_TYPE_3BUTTON
-};
diff --git a/src/mouse_msystems.h b/src/mouse_msystems.h
deleted file mode 100644
index 0f1430f..0000000
--- a/src/mouse_msystems.h
+++ /dev/null
@@ -1 +0,0 @@
-extern mouse_t mouse_serial_msystems;
diff --git a/src/mouse_ps2.c b/src/mouse_ps2.c
index 28a362b..1603cd9 100644
--- a/src/mouse_ps2.c
+++ b/src/mouse_ps2.c
@@ -4,8 +4,6 @@
#include "mouse.h"
#include "mouse_ps2.h"
#include "plat-mouse.h"
-#include "x86.h"
-#include "f82c710_upc.h"
int mouse_scan = 0;
@@ -98,27 +96,6 @@ void mouse_ps2_write(uint8_t val, void *p)
keyboard_at_adddata_mouse(mouse->sample_rate);
break;
- case 0xeb: /*Get mouse data*/
- keyboard_at_adddata_mouse(0xfa);
-
- temp = 0;
- if (mouse->x < 0)
- temp |= 0x10;
- if (mouse->y < 0)
- temp |= 0x20;
- if (mouse_buttons & 1)
- temp |= 1;
- if (mouse_buttons & 2)
- temp |= 2;
- if ((mouse_buttons & 4) && (mouse_get_type(mouse_type) & MOUSE_TYPE_3BUTTON))
- temp |= 4;
- keyboard_at_adddata_mouse(temp);
- keyboard_at_adddata_mouse(mouse->x & 0xff);
- keyboard_at_adddata_mouse(mouse->y & 0xff);
- if (mouse->intellimouse_mode)
- keyboard_at_adddata_mouse(mouse->z);
- break;
-
case 0xf2: /*Read ID*/
keyboard_at_adddata_mouse(0xfa);
if (mouse->intellimouse_mode)
@@ -146,7 +123,6 @@ void mouse_ps2_write(uint8_t val, void *p)
mouse->mode = MOUSE_STREAM;
mouse->flags = 0;
mouse->intellimouse_mode = 0;
- mouse_queue_start = mouse_queue_end = 0;
keyboard_at_adddata_mouse(0xfa);
keyboard_at_adddata_mouse(0xaa);
keyboard_at_adddata_mouse(0x00);
@@ -177,7 +153,7 @@ void mouse_ps2_poll(int x, int y, int z, int b, void *p)
{
mouse_ps2_t *mouse = (mouse_ps2_t *)p;
uint8_t packet[3] = {0x08, 0, 0};
-
+
if (!x && !y && !z && b == mouse->b)
return;
@@ -238,11 +214,8 @@ void *mouse_ps2_init()
mouse->flags = 0;
mouse->mode = MOUSE_STREAM;
- if(romset == ROM_PC5086)
- upc_set_mouse(mouse_ps2_write, mouse);
- else
- keyboard_at_set_mouse(mouse_ps2_write, mouse);
-
+ keyboard_at_set_mouse(mouse_ps2_write, mouse);
+
return mouse;
}
diff --git a/src/mouse_serial.c b/src/mouse_serial.c
index b8bd187..9964153 100644
--- a/src/mouse_serial.c
+++ b/src/mouse_serial.c
@@ -7,8 +7,7 @@
typedef struct mouse_serial_t
{
- int mousepos;
- pc_timer_t mousedelay_timer;
+ int mousepos, mousedelay;
int oldb;
SERIAL *serial;
} mouse_serial_t;
@@ -53,13 +52,14 @@ void mouse_serial_rcr(struct SERIAL *serial, void *p)
mouse_serial_t *mouse = (mouse_serial_t *)p;
mouse->mousepos = -1;
- timer_set_delay_u64(&mouse->mousedelay_timer, TIMER_USEC * 5000);
+ mouse->mousedelay = 5000 * (1 << TIMER_SHIFT);
}
void mousecallback(void *p)
{
mouse_serial_t *mouse = (mouse_serial_t *)p;
+ mouse->mousedelay = 0;
if (mouse->mousepos == -1)
{
mouse->mousepos = 0;
@@ -75,7 +75,7 @@ void *mouse_serial_init()
mouse->serial = &serial1;
serial1.rcr_callback = mouse_serial_rcr;
serial1.rcr_callback_p = mouse;
- timer_add(&mouse->mousedelay_timer, mousecallback, mouse, 0);
+ timer_add(mousecallback, &mouse->mousedelay, &mouse->mousedelay, mouse);
return mouse;
}
diff --git a/src/mvp3.c b/src/mvp3.c
deleted file mode 100644
index f2d77b1..0000000
--- a/src/mvp3.c
+++ /dev/null
@@ -1,243 +0,0 @@
-#include
-
-#include "ibm.h"
-#include "io.h"
-#include "mem.h"
-#include "pci.h"
-
-#include "mvp3.h"
-
-static struct
-{
- uint8_t host_bridge_regs[256];
- uint8_t pci_bridge_regs[256];
-} mvp3;
-
-static void mvp3_map(uint32_t addr, uint32_t size, int state)
-{
- pclog("mvp3_map: addr=%08x size=%08x state=%i\n", addr, size, state);
- switch (state & 3)
- {
- case 0:
- mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- break;
- case 1:
- mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
- break;
- case 2:
- mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL);
- break;
- case 3:
- mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- break;
- }
- flushmmucache_nopc();
-}
-
-static uint8_t mvp3_read(int func, int addr, void *priv)
-{
- switch (func)
- {
- case 0:
- return mvp3.host_bridge_regs[addr];
-
- case 1:
- return mvp3.pci_bridge_regs[addr];
-
- default:
- return 0xff;
- }
-}
-
-
-static void mvp3_host_bridge_write(int addr, uint8_t val)
-{
- /*Read-only addresses*/
- if ((addr < 4) || (addr >= 5 && addr < 7)
- || (addr >= 8 && addr < 0xd)
- || (addr >= 0xe && addr < 0x12)
- || (addr >= 0x14 && addr < 0x50)
- || (addr >= 0x79 && addr < 0x7e)
- || (addr >= 0x85 && addr < 0x88)
- || (addr >= 0x8c && addr < 0xa8)
- || (addr >= 0xad && addr < 0xfd))
- return;
-
- switch (addr)
- {
- case 0x04: /*Command*/
- mvp3.host_bridge_regs[0x04] = (mvp3.host_bridge_regs[0x04] & ~0x40) | (val & 0x40);
- break;
- case 0x07: /*Status*/
- mvp3.host_bridge_regs[0x07] &= ~(val & 0xb0);
- break;
-
- case 0x12: /*Graphics Aperture Base*/
- mvp3.host_bridge_regs[0x12] = (val & 0xf0);
- break;
- case 0x13: /*Graphics Aperture Base*/
- mvp3.host_bridge_regs[0x13] = val;
- break;
-
- case 0x61: /*Shadow RAM Control 1*/
- if ((mvp3.host_bridge_regs[0x61] ^ val) & 0x03)
- mvp3_map(0xc0000, 0x04000, val & 0x03);
- if ((mvp3.host_bridge_regs[0x61] ^ val) & 0x0c)
- mvp3_map(0xc4000, 0x04000, (val & 0x0c) >> 2);
- if ((mvp3.host_bridge_regs[0x61] ^ val) & 0x30)
- mvp3_map(0xc8000, 0x04000, (val & 0x30) >> 4);
- if ((mvp3.host_bridge_regs[0x61] ^ val) & 0xc0)
- mvp3_map(0xcc000, 0x04000, (val & 0xc0) >> 6);
- mvp3.host_bridge_regs[0x61] = val;
- return;
- case 0x62: /*Shadow RAM Control 2*/
- if ((mvp3.host_bridge_regs[0x62] ^ val) & 0x03)
- mvp3_map(0xd0000, 0x04000, val & 0x03);
- if ((mvp3.host_bridge_regs[0x62] ^ val) & 0x0c)
- mvp3_map(0xd4000, 0x04000, (val & 0x0c) >> 2);
- if ((mvp3.host_bridge_regs[0x62] ^ val) & 0x30)
- mvp3_map(0xd8000, 0x04000, (val & 0x30) >> 4);
- if ((mvp3.host_bridge_regs[0x62] ^ val) & 0xc0)
- mvp3_map(0xdc000, 0x04000, (val & 0xc0) >> 6);
- mvp3.host_bridge_regs[0x62] = val;
- return;
- case 0x63: /*Shadow RAM Control 3*/
- if ((mvp3.host_bridge_regs[0x63] ^ val) & 0x30)
- mvp3_map(0xf0000, 0x10000, (val & 0x30) >> 4);
- if ((mvp3.host_bridge_regs[0x63] ^ val) & 0xc0)
- mvp3_map(0xe0000, 0x10000, (val & 0xc0) >> 6);
- mvp3.host_bridge_regs[0x63] = val;
- if ((val & 3) == 1 || ((val & 3) == 3 && (cpu_cur_status & CPU_STATUS_SMM))) /*SMRAM enabled*/
- {
- pclog("Enable SMRAM\n");
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
- }
- else
- {
- pclog("Disable SMRAM\n");
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
- }
-// if (val == 0xb0)
-// output = 3;
- return;
-
- default:
- mvp3.host_bridge_regs[addr] = val;
- break;
- }
-}
-static void mvp3_pci_bridge_write(int addr, uint8_t val)
-{
- /*Read-only addresses*/
- if ((addr < 4) || (addr >= 5 && addr < 7)
- || (addr >= 8 && addr < 0x18)
- || (addr == 0x1b)
- || (addr >= 0x1e && addr < 0x20)
- || (addr >= 0x28 && addr < 0x3e)
- || (addr >= 0x43))
- return;
-
- switch (addr)
- {
- case 0x04: /*Command*/
- mvp3.pci_bridge_regs[0x04] = (mvp3.pci_bridge_regs[0x04] & ~0x47) | (val & 0x47);
- break;
- case 0x07: /*Status*/
- mvp3.pci_bridge_regs[0x07] &= ~(val & 0x30);
- break;
-
- case 0x20: /*Memory Base*/
- mvp3.pci_bridge_regs[0x20] = val & 0xf0;
- break;
- case 0x22: /*Memory Limit*/
- mvp3.pci_bridge_regs[0x22] = val & 0xf0;
- break;
- case 0x24: /*Prefetchable Memory Base*/
- mvp3.pci_bridge_regs[0x24] = val & 0xf0;
- break;
- case 0x26: /*Prefetchable Memory Limit*/
- mvp3.pci_bridge_regs[0x26] = val & 0xf0;
- break;
-
- default:
- mvp3.pci_bridge_regs[addr] = val;
- break;
- }
-}
-
-static void mvp3_write(int func, int addr, uint8_t val, void *priv)
-{
- switch (func)
- {
- case 0:
- mvp3_host_bridge_write(addr, val);
- break;
-
- case 1:
- mvp3_pci_bridge_write(addr, val);
- break;
- }
-}
-
-static void mvp3_smram_enable(void)
-{
- if ((mvp3.host_bridge_regs[0x63] & 3) == 3)
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
-}
-static void mvp3_smram_disable(void)
-{
- if ((mvp3.host_bridge_regs[0x63] & 3) != 1)
- mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
-}
-
-void mvp3_init()
-{
- pci_add_specific(0, mvp3_read, mvp3_write, NULL);
-
- memset(&mvp3, 0, sizeof(mvp3));
- mvp3.host_bridge_regs[0x00] = 0x06; mvp3.host_bridge_regs[0x01] = 0x11; /*VIA*/
- mvp3.host_bridge_regs[0x02] = 0x98; mvp3.host_bridge_regs[0x03] = 0x05; /*VT82C598MVP*/
- mvp3.host_bridge_regs[0x04] = 0x06; mvp3.host_bridge_regs[0x05] = 0x00;
- mvp3.host_bridge_regs[0x06] = 0x90; mvp3.host_bridge_regs[0x07] = 0x02;
- mvp3.host_bridge_regs[0x0b] = 0x06;
- mvp3.host_bridge_regs[0x10] = 0x08;
- mvp3.host_bridge_regs[0x34] = 0xa0;
-
- mvp3.host_bridge_regs[0x5a] = 0x01;
- mvp3.host_bridge_regs[0x5b] = 0x01;
- mvp3.host_bridge_regs[0x5c] = 0x01;
- mvp3.host_bridge_regs[0x5d] = 0x01;
- mvp3.host_bridge_regs[0x5e] = 0x01;
- mvp3.host_bridge_regs[0x5f] = 0x01;
-
- mvp3.host_bridge_regs[0x64] = 0xec;
- mvp3.host_bridge_regs[0x65] = 0xec;
- mvp3.host_bridge_regs[0x66] = 0xec;
- mvp3.host_bridge_regs[0x6b] = 0x01;
-
- mvp3.host_bridge_regs[0xa0] = 0x02;
- mvp3.host_bridge_regs[0xa2] = 0x10;
- mvp3.host_bridge_regs[0xa4] = 0x03;
- mvp3.host_bridge_regs[0xa5] = 0x02;
- mvp3.host_bridge_regs[0xa6] = 0x00;
- mvp3.host_bridge_regs[0xa7] = 0x07;
-
- mvp3.pci_bridge_regs[0x00] = 0x06; mvp3.pci_bridge_regs[0x01] = 0x11; /*VIA*/
- mvp3.pci_bridge_regs[0x02] = 0x98; mvp3.pci_bridge_regs[0x03] = 0x85; /*VT82C598MVP*/
- mvp3.pci_bridge_regs[0x04] = 0x07; mvp3.pci_bridge_regs[0x05] = 0x00;
- mvp3.pci_bridge_regs[0x06] = 0x20; mvp3.pci_bridge_regs[0x07] = 0x02;
- mvp3.pci_bridge_regs[0x0a] = 0x04;
- mvp3.pci_bridge_regs[0x0b] = 0x06;
- mvp3.pci_bridge_regs[0x0e] = 0x01;
-
- mvp3.pci_bridge_regs[0x1c] = 0xf0;
-
- mvp3.pci_bridge_regs[0x20] = 0xf0;
- mvp3.pci_bridge_regs[0x21] = 0xff;
-
- mvp3.pci_bridge_regs[0x24] = 0xf0;
- mvp3.pci_bridge_regs[0x25] = 0xff;
-
- smram_enable = mvp3_smram_enable;
- smram_disable = mvp3_smram_disable;
-}
diff --git a/src/mvp3.h b/src/mvp3.h
deleted file mode 100644
index 69dac83..0000000
--- a/src/mvp3.h
+++ /dev/null
@@ -1 +0,0 @@
-void mvp3_init();
diff --git a/src/ne2000.c b/src/ne2000.c
deleted file mode 100644
index 2622f2b..0000000
--- a/src/ne2000.c
+++ /dev/null
@@ -1,2103 +0,0 @@
-/////////////////////////////////////////////////////////////////////////
-// $Id: ne2k.cc,v 1.56.2.1 2004/02/02 22:37:22 cbothamy Exp $
-/////////////////////////////////////////////////////////////////////////
-//
-// Copyright (C) 2002 MandrakeSoft S.A.
-//
-// MandrakeSoft S.A.
-// 43, rue d'Aboukir
-// 75002 Paris - France
-// http://www.linux-mandrake.com/
-// http://www.mandrakesoft.com/
-//
-// This library is free software; you can redistribute it and/or
-// modify it under the terms of the GNU Lesser General Public
-// License as published by the Free Software Foundation; either
-// version 2 of the License, or (at your option) any later version.
-//
-// This library is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-// Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public
-// License along with this library; if not, write to the Free Software
-// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-
-// Peter Grehan (grehan@iprg.nokia.com) coded all of this
-// NE2000/ether stuff.
-//#include "vl.h"
-#include
-#include
-#include
-#include
-
-#include "slirp/slirp.h"
-#include "slirp/queue.h"
-#ifdef _WIN32
-#include
-#endif
-
-#include "ibm.h"
-#include "device.h"
-
-#include "nethandler.h"
-
-#include "config.h"
-#include "io.h"
-#include "ne2000.h"
-#include "pic.h"
-#include "pci.h"
-#include "timer.h"
-
-/*MAC address*/
-uint8_t maclocal[6];
-
-typedef enum
-{
- NE2000_NE2000,
- NE2000_RTL8029AS
-} ne2000_type;
-
-#define NE2000_PCI_IRQ -1
-
-#define NETBLOCKING 0 //we won't block our pcap
-
-//#define NE2000_DEBUG
-
-#ifdef _WIN32
-static HINSTANCE net_hLib = 0; /* handle to DLL */
-static char *net_lib_name = "wpcap.dll";
-pcap_t *net_pcap;
-typedef pcap_t* (__cdecl * PCAP_OPEN_LIVE)(const char *, int, int, int, char *);
-typedef int (__cdecl * PCAP_SENDPACKET)(pcap_t* handle, const u_char* msg, int len);
-typedef int (__cdecl * PCAP_SETNONBLOCK)(pcap_t *, int, char *);
-typedef const u_char*(__cdecl *PCAP_NEXT)(pcap_t *, struct pcap_pkthdr *);
-typedef const char*(__cdecl *PCAP_LIB_VERSION)(void);
-typedef void (__cdecl *PCAP_CLOSE)(pcap_t *);
-typedef int (__cdecl *PCAP_GETNONBLOCK)(pcap_t *p, char *errbuf);
-typedef int (__cdecl *PCAP_COMPILE)(pcap_t *p, struct bpf_program *fp, const char *str, int optimize, bpf_u_int32 netmask);
-typedef int (__cdecl *PCAP_SETFILTER)(pcap_t *p, struct bpf_program *fp);
-
-PCAP_LIB_VERSION _pcap_lib_version;
-PCAP_OPEN_LIVE _pcap_open_live;
-PCAP_SENDPACKET _pcap_sendpacket;
-PCAP_SETNONBLOCK _pcap_setnonblock;
-PCAP_NEXT _pcap_next;
-PCAP_CLOSE _pcap_close;
-PCAP_GETNONBLOCK _pcap_getnonblock;
-PCAP_COMPILE _pcap_compile;
-PCAP_SETFILTER _pcap_setfilter;
-#endif
-
-queueADT slirpq;
-int net_slirp_inited = 0;
-int net_is_slirp = 1; //by default we go with slirp
-int net_is_pcap = 0; //and pretend pcap is dead.
-int fizz = 0;
-void slirp_tic();
-
-#define BX_RESET_HARDWARE 0
-#define BX_RESET_SOFTWARE 1
-
-//Never completely fill the ne2k ring so that we never
-// hit the unclear completely full buffer condition.
-#define BX_NE2K_NEVER_FULL_RING (1)
-
-#define BX_NE2K_MEMSIZ (32*1024)
-#define BX_NE2K_MEMSTART (16*1024)
-#define BX_NE2K_MEMEND (BX_NE2K_MEMSTART + BX_NE2K_MEMSIZ)
-
-typedef struct ne2000_t
-{
- //
- // ne2k register state
-
- //
- // Page 0
- //
- // Command Register - 00h read/write
- struct CR_t
- {
- int stop; // STP - Software Reset command
- int start; // START - start the NIC
- int tx_packet; // TXP - initiate packet transmission
- uint8_t rdma_cmd; // RD0,RD1,RD2 - Remote DMA command
- uint8_t pgsel; // PS0,PS1 - Page select
- } CR;
- // Interrupt Status Register - 07h read/write
- struct ISR_t
- {
- int pkt_rx; // PRX - packet received with no errors
- int pkt_tx; // PTX - packet transmitted with no errors
- int rx_err; // RXE - packet received with 1 or more errors
- int tx_err; // TXE - packet tx'd " " " " "
- int overwrite; // OVW - rx buffer resources exhausted
- int cnt_oflow; // CNT - network tally counter MSB's set
- int rdma_done; // RDC - remote DMA complete
- int reset; // RST - reset status
- } ISR;
- // Interrupt Mask Register - 0fh write
- struct IMR_t
- {
- int rx_inte; // PRXE - packet rx interrupt enable
- int tx_inte; // PTXE - packet tx interrput enable
- int rxerr_inte; // RXEE - rx error interrupt enable
- int txerr_inte; // TXEE - tx error interrupt enable
- int overw_inte; // OVWE - overwrite warn int enable
- int cofl_inte; // CNTE - counter o'flow int enable
- int rdma_inte; // RDCE - remote DMA complete int enable
- int reserved; // D7 - reserved
- } IMR;
- // Data Configuration Register - 0eh write
- struct DCR_t
- {
- int wdsize; // WTS - 8/16-bit select
- int endian; // BOS - byte-order select
- int longaddr; // LAS - long-address select
- int loop; // LS - loopback select
- int auto_rx; // AR - auto-remove rx packets with remote DMA
- uint8_t fifo_size; // FT0,FT1 - fifo threshold
- } DCR;
- // Transmit Configuration Register - 0dh write
- struct TCR_t
- {
- int crc_disable; // CRC - inhibit tx CRC
- uint8_t loop_cntl; // LB0,LB1 - loopback control
- int ext_stoptx; // ATD - allow tx disable by external mcast
- int coll_prio; // OFST - backoff algorithm select
- uint8_t reserved; // D5,D6,D7 - reserved
- } TCR;
- // Transmit Status Register - 04h read
- struct TSR_t
- {
- int tx_ok; // PTX - tx complete without error
- int reserved; // D1 - reserved
- int collided; // COL - tx collided >= 1 times
- int aborted; // ABT - aborted due to excessive collisions
- int no_carrier; // CRS - carrier-sense lost
- int fifo_ur; // FU - FIFO underrun
- int cd_hbeat; // CDH - no tx cd-heartbeat from transceiver
- int ow_coll; // OWC - out-of-window collision
- } TSR;
- // Receive Configuration Register - 0ch write
- struct RCR_t
- {
- int errors_ok; // SEP - accept pkts with rx errors
- int runts_ok; // AR - accept < 64-byte runts
- int broadcast; // AB - accept eth broadcast address
- int multicast; // AM - check mcast hash array
- int promisc; // PRO - accept all packets
- int monitor; // MON - check pkts, but don't rx
- uint8_t reserved; // D6,D7 - reserved
- } RCR;
- // Receive Status Register - 0ch read
- struct RSR_t
- {
- int rx_ok; // PRX - rx complete without error
- int bad_crc; // CRC - Bad CRC detected
- int bad_falign; // FAE - frame alignment error
- int fifo_or; // FO - FIFO overrun
- int rx_missed; // MPA - missed packet error
- int rx_mbit; // PHY - unicast or mcast/bcast address match
- int rx_disabled; // DIS - set when in monitor mode
- int deferred; // DFR - collision active
- } RSR;
-
- uint16_t local_dma; // 01,02h read ; current local DMA addr
- uint8_t page_start; // 01h write ; page start register
- uint8_t page_stop; // 02h write ; page stop register
- uint8_t bound_ptr; // 03h read/write ; boundary pointer
- uint8_t tx_page_start; // 04h write ; transmit page start register
- uint8_t num_coll; // 05h read ; number-of-collisions register
- uint16_t tx_bytes; // 05,06h write ; transmit byte-count register
- uint8_t fifo; // 06h read ; FIFO
- uint16_t remote_dma; // 08,09h read ; current remote DMA addr
- uint16_t remote_start; // 08,09h write ; remote start address register
- uint16_t remote_bytes; // 0a,0bh write ; remote byte-count register
- uint8_t tallycnt_0; // 0dh read ; tally counter 0 (frame align errors)
- uint8_t tallycnt_1; // 0eh read ; tally counter 1 (CRC errors)
- uint8_t tallycnt_2; // 0fh read ; tally counter 2 (missed pkt errors)
-
- //
- // Page 1
- //
- // Command Register 00h (repeated)
- //
- uint8_t physaddr[6]; // 01-06h read/write ; MAC address
- uint8_t curr_page; // 07h read/write ; current page register
- uint8_t mchash[8]; // 08-0fh read/write ; multicast hash array
-
- //
- // Page 2 - diagnostic use only
- //
- // Command Register 00h (repeated)
- //
- // Page Start Register 01h read (repeated)
- // Page Stop Register 02h read (repeated)
- // Current Local DMA Address 01,02h write (repeated)
- // Transmit Page start address 04h read (repeated)
- // Receive Configuration Register 0ch read (repeated)
- // Transmit Configuration Register 0dh read (repeated)
- // Data Configuration Register 0eh read (repeated)
- // Interrupt Mask Register 0fh read (repeated)
- //
- uint8_t rempkt_ptr; // 03h read/write ; remote next-packet pointer
- uint8_t localpkt_ptr; // 05h read/write ; local next-packet pointer
- uint16_t address_cnt; // 06,07h read/write ; address counter
-
- //
- // Page 3 - should never be modified.
- //
-
- // Novell ASIC state
- uint8_t macaddr[32]; // ASIC ROM'd MAC address, even bytes
- uint8_t mem[BX_NE2K_MEMSIZ]; // on-chip packet memory
-
- // ne2k internal state
- uint32_t base_address;
- int base_irq;
- int tx_timer_index;
- int tx_timer_active;
-
- ne2000_type type;
-
- /*PCI stuff*/
- int is_pci;
- int card;
- uint32_t base_addr;
- uint8_t pci_command;
- uint8_t int_line;
-
- /*RTL8029AS registers*/
- uint8_t config0, config2, config3;
- uint8_t _9346cr;
-} ne2000_t;
-
-static void ne2000_tx_event(int val, void *p);
-
-void ne2000_rx_frame(void *p, const void *buf, int io_len);
-
-static void ne2000_setirq(ne2000_t *ne2000, int irq)
-{
- ne2000->base_irq = irq;
-}
-
-static void ne2000_raise_irq(ne2000_t *ne2000)
-{
- if (ne2000->is_pci)
- pci_set_irq(ne2000->card, PCI_INTA);
- else
- picint(1 << ne2000->base_irq);
-}
-
-static void ne2000_lower_irq(ne2000_t *ne2000)
-{
- if (ne2000->is_pci)
- pci_clear_irq(ne2000->card, PCI_INTA);
- else
- picintc(1 << ne2000->base_irq);
-}
-
-//
-// reset - restore state to power-up, cancelling all i/o
-//
-static void ne2000_reset(int type, void *p)
-{
- ne2000_t *ne2000 = (ne2000_t *)p;
- int i;
-
- pclog("ne2000 reset\n");
-
- // Initialise the mac address area by doubling the physical address
- ne2000->macaddr[0] = ne2000->physaddr[0];
- ne2000->macaddr[1] = ne2000->physaddr[0];
- ne2000->macaddr[2] = ne2000->physaddr[1];
- ne2000->macaddr[3] = ne2000->physaddr[1];
- ne2000->macaddr[4] = ne2000->physaddr[2];
- ne2000->macaddr[5] = ne2000->physaddr[2];
- ne2000->macaddr[6] = ne2000->physaddr[3];
- ne2000->macaddr[7] = ne2000->physaddr[3];
- ne2000->macaddr[8] = ne2000->physaddr[4];
- ne2000->macaddr[9] = ne2000->physaddr[4];
- ne2000->macaddr[10] = ne2000->physaddr[5];
- ne2000->macaddr[11] = ne2000->physaddr[5];
-
- // ne2k signature
- for (i = 12; i < 32; i++)
- ne2000->macaddr[i] = 0x57;
-
- // Zero out registers and memory
- memset(&ne2000->CR, 0, sizeof(ne2000->CR) );
- memset(&ne2000->ISR, 0, sizeof(ne2000->ISR));
- memset(&ne2000->IMR, 0, sizeof(ne2000->IMR));
- memset(&ne2000->DCR, 0, sizeof(ne2000->DCR));
- memset(&ne2000->TCR, 0, sizeof(ne2000->TCR));
- memset(&ne2000->TSR, 0, sizeof(ne2000->TSR));
- //memset( & ne2000->RCR, 0, sizeof(ne2000->RCR));
- memset(&ne2000->RSR, 0, sizeof(ne2000->RSR));
- ne2000->tx_timer_active = 0;
- ne2000->local_dma = 0;
- ne2000->page_start = 0;
- ne2000->page_stop = 0;
- ne2000->bound_ptr = 0;
- ne2000->tx_page_start = 0;
- ne2000->num_coll = 0;
- ne2000->tx_bytes = 0;
- ne2000->fifo = 0;
- ne2000->remote_dma = 0;
- ne2000->remote_start = 0;
- ne2000->remote_bytes = 0;
- ne2000->tallycnt_0 = 0;
- ne2000->tallycnt_1 = 0;
- ne2000->tallycnt_2 = 0;
-
- //memset( & ne2000->physaddr, 0, sizeof(ne2000->physaddr));
- //memset( & ne2000->mchash, 0, sizeof(ne2000->mchash));
- ne2000->curr_page = 0;
-
- ne2000->rempkt_ptr = 0;
- ne2000->localpkt_ptr = 0;
- ne2000->address_cnt = 0;
-
- memset(&ne2000->mem, 0, sizeof(ne2000->mem));
-
- // Set power-up conditions
- ne2000->CR.stop = 1;
- ne2000->CR.rdma_cmd = 4;
- ne2000->ISR.reset = 1;
- ne2000->DCR.longaddr = 1;
- ne2000_raise_irq(ne2000);
- ne2000_lower_irq(ne2000);
-
- //DEV_pic_lower_irq(ne2000->base_irq);
-}
-
-#include "bswap.h"
-
-//
-// chipmem_read/chipmem_write - access the 64K private RAM.
-// The ne2000 memory is accessed through the data port of
-// the asic (offset 0) after setting up a remote-DMA transfer.
-// Both byte and word accesses are allowed.
-// The first 16 bytes contains the MAC address at even locations,
-// and there is 16K of buffer memory starting at 16K
-//
-static inline uint8_t ne2000_chipmem_read_b(uint32_t address, ne2000_t *ne2000)
-{
- // ROM'd MAC address
- if ((address >= 0) && (address <= 31))
- return ne2000->macaddr[address];
-
- if ((address >= BX_NE2K_MEMSTART) && (address < BX_NE2K_MEMEND))
- return ne2000->mem[address - BX_NE2K_MEMSTART];
- else
- return 0xff;
-}
-
-
-static inline uint16_t ne2000_chipmem_read_w(uint32_t address, ne2000_t *ne2000)
-{
- // ROM'd MAC address
- if ((address >=0) && (address <= 31))
- return le16_to_cpu(*(uint16_t *)(ne2000->macaddr + address));
-
- if ((address >= BX_NE2K_MEMSTART) && (address < BX_NE2K_MEMEND))
- return le16_to_cpu(*(uint16_t *)(ne2000->mem + (address - BX_NE2K_MEMSTART)));
- else
- return 0xffff;
-}
-
-static inline void ne2000_chipmem_write_b(uint32_t address, uint8_t value, ne2000_t *ne2000)
-{
- if ((address >= BX_NE2K_MEMSTART) && (address < BX_NE2K_MEMEND))
- ne2000->mem[address - BX_NE2K_MEMSTART] = value & 0xff;
-}
-
-
-static inline void ne2000_chipmem_write_w(uint32_t address, uint16_t value, ne2000_t *ne2000)
-{
- if ((address >= BX_NE2K_MEMSTART) && (address < BX_NE2K_MEMEND))
- *(uint16_t *)(ne2000->mem + (address - BX_NE2K_MEMSTART)) = cpu_to_le16(value);
-}
-
-//
-// asic_read/asic_write - This is the high 16 bytes of i/o space
-// (the lower 16 bytes is for the DS8390). Only two locations
-// are used: offset 0, which is used for data transfer, and
-// offset 0xf, which is used to reset the device.
-// The data transfer port is used to as 'external' DMA to the
-// DS8390. The chip has to have the DMA registers set up, and
-// after that, insw/outsw instructions can be used to move
-// the appropriate number of bytes to/from the device.
-//
-uint16_t ne2000_dma_read(int io_len, void *p)
-{
- ne2000_t *ne2000 = (ne2000_t *)p;
-
- //
- // The 8390 bumps the address and decreases the byte count
- // by the selected word size after every access, not by
- // the amount of data requested by the host (io_len).
- //
- ne2000->remote_dma += io_len;
- if (ne2000->remote_dma == ne2000->page_stop << 8)
- ne2000->remote_dma = ne2000->page_start << 8;
-
- // keep s.remote_bytes from underflowing
- if (ne2000->remote_bytes > 1)
- ne2000->remote_bytes -= io_len;
- else
- ne2000->remote_bytes = 0;
-
- // If all bytes have been written, signal remote-DMA complete
- if (ne2000->remote_bytes == 0)
- {
- ne2000->ISR.rdma_done = 1;
- if (ne2000->IMR.rdma_inte)
- {
- ne2000_raise_irq(ne2000);
- }
- }
-
- return 0;
-}
-
-uint16_t ne2000_asic_read_w(uint16_t offset, void *p)
-{
- ne2000_t *ne2000 = (ne2000_t *)p;
- int retval;
-
- if (ne2000->DCR.wdsize & 0x01)
- {
- /* 16 bit access */
- retval = ne2000_chipmem_read_w(ne2000->remote_dma, ne2000);
- ne2000_dma_read(2, ne2000);
- }
- else
- {
- /* 8 bit access */
- retval = ne2000_chipmem_read_b(ne2000->remote_dma, ne2000);
- ne2000_dma_read(1, ne2000);
- }
-#ifdef NE2000_DEBUG
- pclog("asic read val=0x%04x\n", retval);
-#endif
- return retval;
-}
-
-void ne2000_dma_write(int io_len, void *p)
-{
- ne2000_t *ne2000 = (ne2000_t *)p;
-
- // is this right ??? asic_read uses DCR.wordsize
- ne2000->remote_dma += io_len;
- if (ne2000->remote_dma == ne2000->page_stop << 8)
- ne2000->remote_dma = ne2000->page_start << 8;
-
- ne2000->remote_bytes -= io_len;
- if (ne2000->remote_bytes > BX_NE2K_MEMSIZ)
- ne2000->remote_bytes = 0;
-
- // If all bytes have been written, signal remote-DMA complete
- if (ne2000->remote_bytes == 0)
- {
- ne2000->ISR.rdma_done = 1;
- if (ne2000->IMR.rdma_inte)
- {
- ne2000_raise_irq(ne2000);
- }
- }
-}
-
-void ne2000_asic_write_w(uint16_t offset, uint16_t value, void *p)
-{
- ne2000_t *ne2000 = (ne2000_t *)p;
-#ifdef NE2000_DEBUG
- pclog("asic write val=0x%04x\n", value);
-#endif
- if (ne2000->remote_bytes == 0)
- return;
- if (ne2000->DCR.wdsize & 0x01) {
- /* 16 bit access */
- ne2000_chipmem_write_w(ne2000->remote_dma, value, ne2000);
- ne2000_dma_write(2, ne2000);
- } else {
- /* 8 bit access */
- ne2000_chipmem_write_b(ne2000->remote_dma, value, ne2000);
- ne2000_dma_write(1, ne2000);
- }
-}
-
-uint8_t ne2000_asic_read_b(uint16_t offset, void *p)
-{
- if (offset & 1)
- return ne2000_asic_read_w(offset & ~1, p) >> 1;
- return ne2000_asic_read_w(offset, p) & 0xff;
-}
-
-void ne2000_asic_write_b(uint16_t offset, uint8_t value, void *p)
-{
- if (offset & 1)
- ne2000_asic_write_w(offset & ~1, value << 8, p);
- else
- ne2000_asic_write_w(offset, value, p);
-}
-
-uint8_t ne2000_reset_read(uint16_t offset, void *p)
-{
- ne2000_t *ne2000 = (ne2000_t *)p;
- ne2000_reset(BX_RESET_SOFTWARE, ne2000);
- return 0;
-}
-
-void ne2000_reset_write(uint16_t offset, uint8_t value, void *p)
-{
-}
-
-//
-// read_handler/read - i/o 'catcher' function called from BOCHS
-// mainline when the CPU attempts a read in the i/o space registered
-// by this ne2000 instance
-//
-uint8_t ne2000_read(uint16_t address, void *p)
-{
- ne2000_t *ne2000 = (ne2000_t *)p;
- int ret = 0;
-
-#ifdef NE2000_DEBUG
- pclog("read addr %x\n", address);
-#endif
- address &= 0xf;
-
- if (address == 0x00)
- {
- ret = (((ne2000->CR.pgsel & 0x03) << 6) |
- ((ne2000->CR.rdma_cmd & 0x07) << 3) |
- (ne2000->CR.tx_packet << 2) |
- (ne2000->CR.start << 1) |
- (ne2000->CR.stop));
-#ifdef NE2000_DEBUG
- pclog("read CR returns 0x%08x\n", ret);
-#endif
- }
- else
- {
- switch (ne2000->CR.pgsel)
- {
- case 0x00:
-#ifdef NE2000_DEBUG
- pclog("page 0 read from port %04x\n", address);
-#endif
- switch (address)
- {
- case 0x1: // CLDA0
- return ne2000->local_dma & 0xff;
-
- case 0x2: // CLDA1
- return ne2000->local_dma >> 8;
-
- case 0x3: // BNRY
- return ne2000->bound_ptr;
-
- case 0x4: // TSR
- return ((ne2000->TSR.ow_coll << 7) |
- (ne2000->TSR.cd_hbeat << 6) |
- (ne2000->TSR.fifo_ur << 5) |
- (ne2000->TSR.no_carrier << 4) |
- (ne2000->TSR.aborted << 3) |
- (ne2000->TSR.collided << 2) |
- (ne2000->TSR.tx_ok));
-
- case 0x5: // NCR
- return ne2000->num_coll;
-
- case 0x6: // FIFO
- // reading FIFO is only valid in loopback mode
-#ifdef NE2000_DEBUG
- pclog("reading FIFO not supported yet\n");
-#endif
- return ne2000->fifo;
-
- case 0x7: // ISR
- return ((ne2000->ISR.reset << 7) |
- (ne2000->ISR.rdma_done << 6) |
- (ne2000->ISR.cnt_oflow << 5) |
- (ne2000->ISR.overwrite << 4) |
- (ne2000->ISR.tx_err << 3) |
- (ne2000->ISR.rx_err << 2) |
- (ne2000->ISR.pkt_tx << 1) |
- (ne2000->ISR.pkt_rx));
-
- case 0x8: // CRDA0
- return ne2000->remote_dma & 0xff;
-
- case 0x9: // CRDA1
- return ne2000->remote_dma >> 8;
-
- case 0xa: // reserved
-#ifdef NE2000_DEBUG
- pclog("reserved read - page 0, 0xa\n");
-#endif
- return 0xff;
-
- case 0xb: // reserved
-#ifdef NE2000_DEBUG
- pclog("reserved read - page 0, 0xb\n");
-#endif
- return 0xff;
-
- case 0xc: // RSR
- return ((ne2000->RSR.deferred << 7) |
- (ne2000->RSR.rx_disabled << 6) |
- (ne2000->RSR.rx_mbit << 5) |
- (ne2000->RSR.rx_missed << 4) |
- (ne2000->RSR.fifo_or << 3) |
- (ne2000->RSR.bad_falign << 2) |
- (ne2000->RSR.bad_crc << 1) |
- (ne2000->RSR.rx_ok));
-
- case 0xd: // CNTR0
- return ne2000->tallycnt_0;
-
- case 0xe: // CNTR1
- return ne2000->tallycnt_1;
-
- case 0xf: // CNTR2
- return ne2000->tallycnt_2;
- }
-
- return 0;
-
- case 0x01:
-#ifdef NE2000_DEBUG
- pclog("page 1 read from port %04x\n", address);
-#endif
- switch (address)
- {
- case 0x1: // PAR0-5
- case 0x2:
- case 0x3:
- case 0x4:
- case 0x5:
- case 0x6:
- return ne2000->physaddr[address - 1];
-
- case 0x7: // CURR
-#ifdef NE2000_DEBUG
- pclog("returning current page: %02x\n", (ne2000->curr_page));
-#endif
- return ne2000->curr_page;
-
- case 0x8: // MAR0-7
- case 0x9:
- case 0xa:
- case 0xb:
- case 0xc:
- case 0xd:
- case 0xe:
- case 0xf:
- return ne2000->mchash[address - 8];
- }
-
- return 0;
-
- case 0x02:
-#ifdef NE2000_DEBUG
- pclog("page 2 read from port %04x\n", address);
-#endif
- switch (address)
- {
- case 0x1: // PSTART
- return (ne2000->page_start);
-
- case 0x2: // PSTOP
- return ne2000->page_stop;
-
- case 0x3: // Remote Next-packet pointer
- return ne2000->rempkt_ptr;
-
- case 0x4: // TPSR
- return ne2000->tx_page_start;
-
- case 0x5: // Local Next-packet pointer
- return ne2000->localpkt_ptr;
-
- case 0x6: // Address counter (upper)
- return ne2000->address_cnt >> 8;
-
- case 0x7: // Address counter (lower)
- return ne2000->address_cnt & 0xff;
-
- case 0x8: // Reserved
- case 0x9:
- case 0xa:
- case 0xb:
-#ifdef NE2000_DEBUG
- pclog("reserved read - page 2, 0x%02x\n", address);
-#endif
- break;
-
- case 0xc: // RCR
- return ((ne2000->RCR.monitor << 5) |
- (ne2000->RCR.promisc << 4) |
- (ne2000->RCR.multicast << 3) |
- (ne2000->RCR.broadcast << 2) |
- (ne2000->RCR.runts_ok << 1) |
- (ne2000->RCR.errors_ok));
-
- case 0xd: // TCR
- return ((ne2000->TCR.coll_prio << 4) |
- (ne2000->TCR.ext_stoptx << 3) |
- ((ne2000->TCR.loop_cntl & 0x3) << 1) |
- (ne2000->TCR.crc_disable));
-
- case 0xe: // DCR
- return (((ne2000->DCR.fifo_size & 0x3) << 5) |
- (ne2000->DCR.auto_rx << 4) |
- (ne2000->DCR.loop << 3) |
- (ne2000->DCR.longaddr << 2) |
- (ne2000->DCR.endian << 1) |
- (ne2000->DCR.wdsize));
-
- case 0xf: // IMR
- return ((ne2000->IMR.rdma_inte << 6) |
- (ne2000->IMR.cofl_inte << 5) |
- (ne2000->IMR.overw_inte << 4) |
- (ne2000->IMR.txerr_inte << 3) |
- (ne2000->IMR.rxerr_inte << 2) |
- (ne2000->IMR.tx_inte << 1) |
- (ne2000->IMR.rx_inte));
- }
- break;
-
- case 0x03:
- if (ne2000->type != NE2000_RTL8029AS)
- fatal("ne2000 unknown value of pgsel in read - %d\n", ne2000->CR.pgsel);
-#ifdef NE2000_DEBUG
- pclog("page 3 read from port %04x\n", address);
-#endif
- switch (address)
- {
- case 0x1: /*9346CR*/
- return ne2000->_9346cr;
-
- case 0x3: /*CONFIG0*/
- return 0x00; /*Cable not BNC*/
-
- case 0x5: /*CONFIG2*/
- return ne2000->config2 & 0xe0; /*No boot ROM*/
-
- case 0x6: /*CONFIG3*/
- return ne2000->config3 & 0x46;
-
- case 0xe: /*8029ASID0*/
- return 0x29;
-
- case 0xf: /*8029ASID1*/
- return 0x08;
- }
-
- pclog("reserved read - page 3, 0x%02x\n", address);
- break;
- }
- }
-
- return ret;
-}
-
-//
-// write_handler/write - i/o 'catcher' function called from BOCHS
-// mainline when the CPU attempts a write in the i/o space registered
-// by this ne2000 instance
-//
-void ne2000_write(uint16_t address, uint8_t value, void *p)
-{
- ne2000_t *ne2000 = (ne2000_t *)p;
-#ifdef NE2000_DEBUG
- pclog("write address %x, val=%x\n", address, value);
-#endif
- address &= 0xf;
-
- //
- // The high 16 bytes of i/o space are for the ne2000 asic -
- // the low 16 bytes are for the DS8390, with the current
- // page being selected by the PS0,PS1 registers in the
- // command register
- //
- if (address == 0x00)
- {
-#ifdef NE2000_DEBUG
- pclog("wrote 0x%02x to CR\n", value);
-#endif
- // Validate remote-DMA
- if ((value & 0x38) == 0x00)
- {
-#ifdef NE2000_DEBUG
- pclog("CR write - invalid rDMA value 0\n");
-#endif
- value |= 0x20; /* dma_cmd == 4 is a safe default */
- //value = 0x22; /* dma_cmd == 4 is a safe default */
- }
-
- // Check for s/w reset
- if (value & 0x01)
- {
- ne2000->ISR.reset = 1;
- ne2000->CR.stop = 1;
- }
- else
- ne2000->CR.stop = 0;
-
- ne2000->CR.rdma_cmd = (value & 0x38) >> 3;
-
- // If start command issued, the RST bit in the ISR
- // must be cleared
- if ((value & 0x02) && !ne2000->CR.start)
- ne2000->ISR.reset = 0;
-
- ne2000->CR.start = ((value & 0x02) == 0x02);
- ne2000->CR.pgsel = (value & 0xc0) >> 6;
-
- // Check for send-packet command
- if (ne2000->CR.rdma_cmd == 3)
- {
- // Set up DMA read from receive ring
- ne2000->remote_start = ne2000->remote_dma =
- ne2000->bound_ptr * 256;
- ne2000->remote_bytes = *((uint16_t*) &
- ne2000->mem[ne2000->bound_ptr * 256 + 2 - BX_NE2K_MEMSTART]);
-#ifdef NE2000_DEBUG
- pclog("Sending buffer #x%x length %d\n",
- ne2000->remote_start,
- ne2000->remote_bytes);
-#endif
- }
-
- // Check for start-tx
- if ((value & 0x04) && ne2000->TCR.loop_cntl)
- {
- // loopback mode
- if (ne2000->TCR.loop_cntl != 1)
- {
-#ifdef NE2000_DEBUG
- pclog("Loop mode %d not supported.\n", ne2000->TCR.loop_cntl);
-#endif
- }
- else
- {
- ne2000_rx_frame (ne2000, &ne2000->mem[ne2000->tx_page_start*256 -
- BX_NE2K_MEMSTART],
- ne2000->tx_bytes);
-
- // do a TX interrupt
- // Generate an interrupt if not masked and not one in progress
- if (ne2000->IMR.tx_inte && !ne2000->ISR.pkt_tx)
- {
- //LOG_MSG("tx complete interrupt");
- ne2000_raise_irq(ne2000);
- }
- ne2000->ISR.pkt_tx = 1;
- }
- }
- else if (value & 0x04)
- {
- // start-tx and no loopback
-#ifdef NE2000_DEBUG
- if (ne2000->CR.stop || !ne2000->CR.start)
- pclog("CR write - tx start, dev in reset\n");
-
- if (ne2000->tx_bytes == 0)
- pclog("CR write - tx start, tx bytes == 0\n");
-#endif
- // Send the packet to the system driver
- /* TODO: Transmit packet */
- //BX_NE2K_THIS ethdev->sendpkt(& ne2000->mem[ne2000->tx_page_start*256 - BX_NE2K_MEMSTART], ne2000->tx_bytes);
- //pcap_sendpacket(adhandle,&ne2000->mem[ne2000->tx_page_start*256 - BX_NE2K_MEMSTART], ne2000->tx_bytes);
- if (net_is_slirp)
- {
- slirp_input(&ne2000->mem[ne2000->tx_page_start*256 - BX_NE2K_MEMSTART], ne2000->tx_bytes);
-#ifdef NE2000_DEBUG
- pclog("ne2000 slirp sending packet\n");
-#endif
- }
-#ifdef _WIN32
- if(net_is_pcap && net_pcap!=NULL)
- {
- _pcap_sendpacket(net_pcap, &ne2000->mem[ne2000->tx_page_start*256 - BX_NE2K_MEMSTART], ne2000->tx_bytes);
-#ifdef NE2000_DEBUG
- pclog("ne2000 pcap sending packet\n");
-#endif
- }
-#endif
- ne2000_tx_event(value, ne2000);
- // Schedule a timer to trigger a tx-complete interrupt
- // The number of microseconds is the bit-time / 10.
- // The bit-time is the preamble+sfd (64 bits), the
- // inter-frame gap (96 bits), the CRC (4 bytes), and the
- // the number of bits in the frame (s.tx_bytes * 8).
- //
-
- /* TODO: Code transmit timer */
- /*
- bx_pc_system.activate_timer(ne2000->tx_timer_index,
- (64 + 96 + 4*8 + ne2000->tx_bytes*8)/10,
- 0); // not continuous
- */
- } // end transmit-start branch
-
- // Linux probes for an interrupt by setting up a remote-DMA read
- // of 0 bytes with remote-DMA completion interrupts enabled.
- // Detect this here
- if (ne2000->CR.rdma_cmd == 0x01 &&
- ne2000->CR.start &&
- ne2000->remote_bytes == 0)
- {
- ne2000->ISR.rdma_done = 1;
- if (ne2000->IMR.rdma_inte)
- {
- ne2000_raise_irq(ne2000);
- //DEV_pic_raise_irq(ne2000->base_irq);
- }
- }
- }
- else
- {
- switch (ne2000->CR.pgsel)
- {
- case 0x00:
-#ifdef NE2000_DEBUG
- pclog("page 0 write to port %04x\n", address);
-#endif
- // It appears to be a common practice to use outw on page0 regs...
-
- switch (address)
- {
- case 0x1: // PSTART
- ne2000->page_start = value;
- break;
-
- case 0x2: // PSTOP
- // BX_INFO(("Writing to PSTOP: %02x", value));
- ne2000->page_stop = value;
- break;
-
- case 0x3: // BNRY
- ne2000->bound_ptr = value;
- break;
-
- case 0x4: // TPSR
- ne2000->tx_page_start = value;
- break;
-
- case 0x5: // TBCR0
- // Clear out low byte and re-insert
- ne2000->tx_bytes &= 0xff00;
- ne2000->tx_bytes |= (value & 0xff);
- break;
-
- case 0x6: // TBCR1
- // Clear out high byte and re-insert
- ne2000->tx_bytes &= 0x00ff;
- ne2000->tx_bytes |= ((value & 0xff) << 8);
- break;
-
- case 0x7: // ISR
- value &= 0x7f; // clear RST bit - status-only bit
- // All other values are cleared iff the ISR bit is 1
- ne2000->ISR.pkt_rx &= ~((int)((value & 0x01) == 0x01));
- ne2000->ISR.pkt_tx &= ~((int)((value & 0x02) == 0x02));
- ne2000->ISR.rx_err &= ~((int)((value & 0x04) == 0x04));
- ne2000->ISR.tx_err &= ~((int)((value & 0x08) == 0x08));
- ne2000->ISR.overwrite &= ~((int)((value & 0x10) == 0x10));
- ne2000->ISR.cnt_oflow &= ~((int)((value & 0x20) == 0x20));
- ne2000->ISR.rdma_done &= ~((int)((value & 0x40) == 0x40));
- value = ((ne2000->ISR.rdma_done << 6) |
- (ne2000->ISR.cnt_oflow << 5) |
- (ne2000->ISR.overwrite << 4) |
- (ne2000->ISR.tx_err << 3) |
- (ne2000->ISR.rx_err << 2) |
- (ne2000->ISR.pkt_tx << 1) |
- (ne2000->ISR.pkt_rx));
- value &= ((ne2000->IMR.rdma_inte << 6) |
- (ne2000->IMR.cofl_inte << 5) |
- (ne2000->IMR.overw_inte << 4) |
- (ne2000->IMR.txerr_inte << 3) |
- (ne2000->IMR.rxerr_inte << 2) |
- (ne2000->IMR.tx_inte << 1) |
- (ne2000->IMR.rx_inte));
- if (value == 0)
- ne2000_lower_irq(ne2000);
- //DEV_pic_lower_irq(ne2000->base_irq);
- break;
-
- case 0x8: // RSAR0
- // Clear out low byte and re-insert
- ne2000->remote_start &= 0xff00;
- ne2000->remote_start |= (value & 0xff);
- ne2000->remote_dma = ne2000->remote_start;
- break;
-
- case 0x9: // RSAR1
- // Clear out high byte and re-insert
- ne2000->remote_start &= 0x00ff;
- ne2000->remote_start |= ((value & 0xff) << 8);
- ne2000->remote_dma = ne2000->remote_start;
- break;
-
- case 0xa: // RBCR0
- // Clear out low byte and re-insert
- ne2000->remote_bytes &= 0xff00;
- ne2000->remote_bytes |= (value & 0xff);
- break;
-
- case 0xb: // RBCR1
- // Clear out high byte and re-insert
- ne2000->remote_bytes &= 0x00ff;
- ne2000->remote_bytes |= ((value & 0xff) << 8);
- break;
-
- case 0xc: // RCR
- // Check if the reserved bits are set
-#ifdef NE2000_DEBUG
- if (value & 0xc0)
- pclog("RCR write, reserved bits set\n");
-#endif
- // Set all other bit-fields
- ne2000->RCR.errors_ok = ((value & 0x01) == 0x01);
- ne2000->RCR.runts_ok = ((value & 0x02) == 0x02);
- ne2000->RCR.broadcast = ((value & 0x04) == 0x04);
- ne2000->RCR.multicast = ((value & 0x08) == 0x08);
- ne2000->RCR.promisc = ((value & 0x10) == 0x10);
- ne2000->RCR.monitor = ((value & 0x20) == 0x20);
-
- // Monitor bit is a little suspicious...
-#ifdef NE2000_DEBUG
- if (value & 0x20)
- pclog("RCR write, monitor bit set!\n");
-#endif
- break;
-
- case 0xd: // TCR
- // Check reserved bits
-#ifdef NE2000_DEBUG
- if (value & 0xe0)
- pclog("TCR write, reserved bits set\n");
-#endif
- // Test loop mode (not supported)
- if (value & 0x06)
- {
- ne2000->TCR.loop_cntl = (value & 0x6) >> 1;
-#ifdef NE2000_DEBUG
- pclog("TCR write, loop mode %d not supported\n", ne2000->TCR.loop_cntl);
-#endif
- }
- else
- ne2000->TCR.loop_cntl = 0;
-
- // Inhibit-CRC not supported.
- if (value & 0x01)
- {
- //fatal("ne2000 TCR write, inhibit-CRC not supported\n");
-#ifdef NE2000_DEBUG
- pclog("ne2000 TCR write, inhibit-CRC not supported\n");
-#endif
- return;
- }
-
- // Auto-transmit disable very suspicious
- if (value & 0x08)
- {
- //fatal("ne2000 TCR write, auto transmit disable not supported\n");
-#ifdef NE2000_DEBUG
- pclog("ne2000 TCR write, auto transmit disable not supported\n");
-#endif
- }
-
- // Allow collision-offset to be set, although not used
- ne2000->TCR.coll_prio = ((value & 0x08) == 0x08);
- break;
-
- case 0xe: // DCR
- // the loopback mode is not suppported yet
-#ifdef NE2000_DEBUG
- if (!(value & 0x08))
- pclog("DCR write, loopback mode selected\n");
-
- // It is questionable to set longaddr and auto_rx, since they
- // aren't supported on the ne2000. Print a warning and continue
- if (value & 0x04)
- pclog("DCR write - LAS set ???\n");
- if (value & 0x10)
- pclog("DCR write - AR set ???\n");
-#endif
- // Set other values.
- ne2000->DCR.wdsize = ((value & 0x01) == 0x01);
- ne2000->DCR.endian = ((value & 0x02) == 0x02);
- ne2000->DCR.longaddr = ((value & 0x04) == 0x04); // illegal ?
- ne2000->DCR.loop = ((value & 0x08) == 0x08);
- ne2000->DCR.auto_rx = ((value & 0x10) == 0x10); // also illegal ?
- ne2000->DCR.fifo_size = (value & 0x50) >> 5;
- break;
-
- case 0xf: // IMR
- // Check for reserved bit
-#ifdef NE2000_DEBUG
- if (value & 0x80)
- pclog("IMR write, reserved bit set\n");
-#endif
- // Set other values
- ne2000->IMR.rx_inte = ((value & 0x01) == 0x01);
- ne2000->IMR.tx_inte = ((value & 0x02) == 0x02);
- ne2000->IMR.rxerr_inte = ((value & 0x04) == 0x04);
- ne2000->IMR.txerr_inte = ((value & 0x08) == 0x08);
- ne2000->IMR.overw_inte = ((value & 0x10) == 0x10);
- ne2000->IMR.cofl_inte = ((value & 0x20) == 0x20);
- ne2000->IMR.rdma_inte = ((value & 0x40) == 0x40);
- value = ((ne2000->ISR.rdma_done << 6) |
- (ne2000->ISR.cnt_oflow << 5) |
- (ne2000->ISR.overwrite << 4) |
- (ne2000->ISR.tx_err << 3) |
- (ne2000->ISR.rx_err << 2) |
- (ne2000->ISR.pkt_tx << 1) |
- (ne2000->ISR.pkt_rx));
- value &= ((ne2000->IMR.rdma_inte << 6) |
- (ne2000->IMR.cofl_inte << 5) |
- (ne2000->IMR.overw_inte << 4) |
- (ne2000->IMR.txerr_inte << 3) |
- (ne2000->IMR.rxerr_inte << 2) |
- (ne2000->IMR.tx_inte << 1) |
- (ne2000->IMR.rx_inte));
- if (value)
- ne2000_raise_irq(ne2000);
- else
- ne2000_lower_irq(ne2000);
- break;
- }
- break;
-
- case 0x01:
-#ifdef NE2000_DEBUG
- pclog("page 1 w offset %04x\n", address);
-#endif
- switch (address)
- {
- case 0x1: // PAR0-5
- case 0x2:
- case 0x3:
- case 0x4:
- case 0x5:
- case 0x6:
- ne2000->physaddr[address - 1] = value;
- break;
-
- case 0x7: // CURR
- ne2000->curr_page = value;
- break;
-
- case 0x8: // MAR0-7
- case 0x9:
- case 0xa:
- case 0xb:
- case 0xc:
- case 0xd:
- case 0xe:
- case 0xf:
- ne2000->mchash[address - 8] = value;
- break;
- }
- break;
-
- case 0x02:
-#ifdef NE2000_DEBUG
- if (address != 0)
- pclog("page 2 write ?\n");
-#endif
- switch (address)
- {
- case 0x1: // CLDA0
- // Clear out low byte and re-insert
- ne2000->local_dma &= 0xff00;
- ne2000->local_dma |= (value & 0xff);
- break;
-
- case 0x2: // CLDA1
- // Clear out high byte and re-insert
- ne2000->local_dma &= 0x00ff;
- ne2000->local_dma |= ((value & 0xff) << 8);
- break;
-
- case 0x3: // Remote Next-pkt pointer
- ne2000->rempkt_ptr = value;
- break;
-
- case 0x4:
- //fatal("page 2 write to reserved offset 4\n");
- //OS/2 Warp can cause this to freak out.
-#ifdef NE2000_DEBUG
- pclog("ne2000 page 2 write to reserved offset 4\n");
-#endif
- break;
-
- case 0x5: // Local Next-packet pointer
- ne2000->localpkt_ptr = value;
- break;
-
- case 0x6: // Address counter (upper)
- // Clear out high byte and re-insert
- ne2000->address_cnt &= 0x00ff;
- ne2000->address_cnt |= ((value & 0xff) << 8);
- break;
-
- case 0x7: // Address counter (lower)
- // Clear out low byte and re-insert
- ne2000->address_cnt &= 0xff00;
- ne2000->address_cnt |= (value & 0xff);
- break;
-
- case 0x8:
- case 0x9:
- case 0xa:
- case 0xb:
- case 0xc:
- case 0xd:
- case 0xe:
- case 0xf:
- //fatal("page 2 write to reserved offset %0x\n", address);
-#ifdef NE2000_DEBUG
- pclog("ne2000 page 2 write to reserved offset %0x\n", address);
-#endif
- default:
- break;
- }
- break;
-
- case 0x03:
- if (ne2000->type != NE2000_RTL8029AS)
- {
- pclog("ne2000 unknown value of pgsel in write - %d\n", ne2000->CR.pgsel);
- break;
- }
-#ifdef NE2000_DEBUG
- pclog("page 3 write to port %04x\n", address);
-#endif
- switch (address)
- {
- case 0x1: /*9346CR*/
- ne2000->_9346cr = value & 0xfe;
- break;
-
- case 0x5: /*CONFIG2*/
- ne2000->config2 = value & 0xe0;
- break;
-
- case 0x6: /*CONFIG3*/
- ne2000->config3 = value & 0x46;
- break;
-
- case 0x9: /*HLTCLK*/
- break;
-
- default:
- pclog("reserved write - page 3, 0x%02x\n", address);
- break;
- }
- break;
- }
- }
-}
-
-/*
- * mcast_index() - return the 6-bit index into the multicast
- * table. Stolen unashamedly from FreeBSD's if_ed.c
- */
-static int mcast_index(const void *dst)
-{
-#define POLYNOMIAL 0x04c11db6
- unsigned long crc = 0xffffffffL;
- int carry, i, j;
- unsigned char b;
- unsigned char *ep = (unsigned char *) dst;
-
- for (i = 6; --i >= 0;)
- {
- b = *ep++;
- for (j = 8; --j >= 0;)
- {
- carry = ((crc & 0x80000000L) ? 1 : 0) ^ (b & 0x01);
- crc <<= 1;
- b >>= 1;
- if (carry)
- crc = ((crc ^ POLYNOMIAL) | carry);
- }
- }
- return crc >> 26;
-#undef POLYNOMIAL
-}
-
-/*
- * rx_frame() - called by the platform-specific code when an
- * ethernet frame has been received. The destination address
- * is tested to see if it should be accepted, and if the
- * rx ring has enough room, it is copied into it and
- * the receive process is updated
- */
-void ne2000_rx_frame(void *p, const void *buf, int io_len)
-{
- ne2000_t *ne2000 = (ne2000_t *)p;
-
- int pages;
- int avail;
- int idx;
- int nextpage;
- uint8_t pkthdr[4];
- uint8_t *pktbuf = (uint8_t *) buf;
- uint8_t *startptr;
- static uint8_t bcast_addr[6] = {0xff,0xff,0xff,0xff,0xff,0xff};
-
-#ifdef NE2000_DEBUG
- if(io_len != 60)
- pclog("rx_frame with length %d\n", io_len);
-#endif
- //LOG_MSG("stop=%d, pagestart=%x, dcr_loop=%x, tcr_loopcntl=%x",
- // ne2000->CR.stop, ne2000->page_start,
- // ne2000->DCR.loop, ne2000->TCR.loop_cntl);
- if ((ne2000->CR.stop != 0) ||
- (ne2000->page_start == 0) /*||
- ((ne2000->DCR.loop == 0) &&
- (ne2000->TCR.loop_cntl != 0))*/)
- return;
-
- // Add the pkt header + CRC to the length, and work
- // out how many 256-byte pages the frame would occupy
- pages = (io_len + 4 + 4 + 255)/256;
-
- if (ne2000->curr_page < ne2000->bound_ptr)
- avail = ne2000->bound_ptr - ne2000->curr_page;
- else
- avail = (ne2000->page_stop - ne2000->page_start) -
- (ne2000->curr_page - ne2000->bound_ptr);
-
- // Avoid getting into a buffer overflow condition by not attempting
- // to do partial receives. The emulation to handle this condition
- // seems particularly painful.
- if ((avail < pages)
-#if BX_NE2K_NEVER_FULL_RING
- || (avail == pages)
-#endif
- )
- {
-#ifdef NE2000_DEBUG
- pclog("no space\n");
-#endif
- return;
- }
-
- if ((io_len < 40/*60*/) && !ne2000->RCR.runts_ok)
- {
-#ifdef NE2000_DEBUG
- pclog("rejected small packet, length %d\n", io_len);
-#endif
- return;
- }
- // some computers don't care...
- if (io_len < 60)
- io_len = 60;
-
- // Do address filtering if not in promiscuous mode
- if (!ne2000->RCR.promisc)
- {
- if (!memcmp(buf, bcast_addr, 6))
- {
- if (!ne2000->RCR.broadcast)
- return;
- }
- else if (pktbuf[0] & 0x01)
- {
- if (!ne2000->RCR.multicast)
- return;
- idx = mcast_index(buf);
- if (!(ne2000->mchash[idx >> 3] & (1 << (idx & 0x7))))
- return;
- }
- else if (0 != memcmp(buf, ne2000->physaddr, 6))
- return;
- }
-#ifdef NE2000_DEBUG
- else
- pclog("rx_frame promiscuous receive\n");
-
- pclog("rx_frame %d to %x:%x:%x:%x:%x:%x from %x:%x:%x:%x:%x:%x\n",
- io_len,
- pktbuf[0], pktbuf[1], pktbuf[2], pktbuf[3], pktbuf[4], pktbuf[5],
- pktbuf[6], pktbuf[7], pktbuf[8], pktbuf[9], pktbuf[10], pktbuf[11]);
-#endif
- nextpage = ne2000->curr_page + pages;
- if (nextpage >= ne2000->page_stop)
- nextpage -= ne2000->page_stop - ne2000->page_start;
-
- // Setup packet header
- pkthdr[0] = 0; // rx status - old behavior
- pkthdr[0] = 1; // Probably better to set it all the time
- // rather than set it to 0, which is clearly wrong.
- if (pktbuf[0] & 0x01)
- pkthdr[0] |= 0x20; // rx status += multicast packet
-
- pkthdr[1] = nextpage; // ptr to next packet
- pkthdr[2] = (io_len + 4) & 0xff; // length-low
- pkthdr[3] = (io_len + 4) >> 8; // length-hi
-
- // copy into buffer, update curpage, and signal interrupt if config'd
- startptr = & ne2000->mem[ne2000->curr_page * 256 -
- BX_NE2K_MEMSTART];
- if ((nextpage > ne2000->curr_page) ||
- ((ne2000->curr_page + pages) == ne2000->page_stop))
- {
- memcpy(startptr, pkthdr, 4);
- memcpy(startptr + 4, buf, io_len);
- ne2000->curr_page = nextpage;
- }
- else
- {
- int endbytes = (ne2000->page_stop - ne2000->curr_page)
- * 256;
- memcpy(startptr, pkthdr, 4);
- memcpy(startptr + 4, buf, endbytes - 4);
- startptr = & ne2000->mem[ne2000->page_start * 256 -
- BX_NE2K_MEMSTART];
- memcpy(startptr, (void *)(pktbuf + endbytes - 4),
- io_len - endbytes + 8);
- ne2000->curr_page = nextpage;
- }
-
- ne2000->RSR.rx_ok = 1;
- if (pktbuf[0] & 0x80)
- ne2000->RSR.rx_mbit = 1;
-
- ne2000->ISR.pkt_rx = 1;
-
- if (ne2000->IMR.rx_inte)
- {
- //LOG_MSG("packet rx interrupt");
- ne2000_raise_irq(ne2000);
- //DEV_pic_raise_irq(ne2000->base_irq);
- }
- //else LOG_MSG("no packet rx interrupt");
-}
-
-void ne2000_tx_timer(void *p)
-{
- ne2000_t *ne2000 = (ne2000_t *)p;
-
-#ifdef NE2000_DEBUG
- pclog("tx_timer\n");
-#endif
- ne2000->TSR.tx_ok = 1;
- // Generate an interrupt if not masked and not one in progress
- if (ne2000->IMR.tx_inte && !ne2000->ISR.pkt_tx)
- {
- //LOG_MSG("tx complete interrupt");
- ne2000_raise_irq(ne2000);
- //DEV_pic_raise_irq(ne2000->base_irq);
- }
- //else LOG_MSG("no tx complete interrupt");
- ne2000->ISR.pkt_tx = 1;
- ne2000->tx_timer_active = 0;
-}
-
-static void ne2000_tx_event(int val, void *p)
-{
- ne2000_t *ne2000 = (ne2000_t *)p;
- ne2000_tx_timer(ne2000);
-}
-
-static void ne2000_pci_add(ne2000_t *ne2000)
-{
- io_sethandler(ne2000->base_addr, 0x0010, ne2000_read, NULL, NULL, ne2000_write, NULL, NULL, ne2000);
- io_sethandler(ne2000->base_addr+0x10, 0x000f, ne2000_asic_read_b, ne2000_asic_read_w, NULL, ne2000_asic_write_b, ne2000_asic_write_w, NULL, ne2000);
- io_sethandler(ne2000->base_addr+0x1f, 0x0001, ne2000_reset_read, NULL, NULL, ne2000_reset_write, NULL, NULL, ne2000);
-}
-
-static void ne2000_pci_remove(ne2000_t *ne2000)
-{
- io_removehandler(ne2000->base_addr, 0x0010, ne2000_read, NULL, NULL, ne2000_write, NULL, NULL, ne2000);
- io_removehandler(ne2000->base_addr+0x10, 0x000f, ne2000_asic_read_b, ne2000_asic_read_w, NULL, ne2000_asic_write_b, ne2000_asic_write_w, NULL, ne2000);
- io_removehandler(ne2000->base_addr+0x1f, 0x0001, ne2000_reset_read, NULL, NULL, ne2000_reset_write, NULL, NULL, ne2000);
-}
-
-static uint8_t rtl8029_pci_read(int func, int addr, void *p)
-{
- ne2000_t *ne2000 = (ne2000_t *)p;
-
- if (func)
- return 0;
-
-// pclog("RTL8029 PCI read %08X PC=%08x\n", addr, cpu_state.pc);
-
- switch (addr)
- {
- case 0x00: return 0xec; /*Realtek*/
- case 0x01: return 0x10;
-
- case 0x02: return 0x29; /*RTL8029AS*/
- case 0x03: return 0x80;
-
- case 0x04: return ne2000->pci_command;
-
- case 0x07: return 0x02;
-
- case 0x08: return 0; /*Revision ID*/
- case 0x09: return 0; /*Programming interface*/
- case 0x0a: return 0; /*Ethernet controller*/
- case 0x0b: return 0x02; /*Network controller*/
-
- case 0x10: return 0x01 | (ne2000->base_addr & 0xe0); /*memBaseAddr*/
- case 0x11: return ne2000->base_addr >> 8;
- case 0x12: return ne2000->base_addr >> 16;
- case 0x13: return ne2000->base_addr >> 24;
-
- case 0x2c: return 0xec; /*Subsystem vendor - Realtek*/
- case 0x2d: return 0x10;
-
- case 0x2e: return 0x29; /*Subsystem ID - RTL8029AS*/
- case 0x2f: return 0x80;
-
- case 0x3c: return ne2000->int_line;
- case 0x3d: return 0x01; /*INTA*/
- }
- return 0;
-}
-
-static void rtl8029_pci_write(int func, int addr, uint8_t val, void *p)
-{
- ne2000_t *ne2000 = (ne2000_t *)p;
-
- if (func)
- return;
-
-// pclog("RTL8029 PCI write %04X %02X PC=%08x\n", addr, val, cpu_state.pc);
-
- switch (addr)
- {
- case 0x04:
- if (ne2000->pci_command & PCI_COMMAND_IO)
- ne2000_pci_remove(ne2000);
- ne2000->pci_command = val & 3;
- if (ne2000->pci_command & PCI_COMMAND_IO)
- ne2000_pci_add(ne2000);
- break;
-
- case 0x10:
- if (ne2000->pci_command & PCI_COMMAND_IO)
- ne2000_pci_remove(ne2000);
- ne2000->base_addr = (ne2000->base_addr & 0xffffff00) | (val & 0xe0);
- if (ne2000->pci_command & PCI_COMMAND_IO)
- ne2000_pci_add(ne2000);
- break;
- case 0x11:
- if (ne2000->pci_command & PCI_COMMAND_IO)
- ne2000_pci_remove(ne2000);
- ne2000->base_addr = (ne2000->base_addr & 0xffff00e0) | (val << 8);
- if (ne2000->pci_command & PCI_COMMAND_IO)
- ne2000_pci_add(ne2000);
- break;
- case 0x12:
- ne2000->base_addr = (ne2000->base_addr & 0xff00ffe0) | (val << 16);
- break;
- case 0x13:
- ne2000->base_addr = (ne2000->base_addr & 0x00ffffe0) | (val << 24);
- break;
-
- case 0x3c:
- ne2000->int_line = val;
- break;
- }
-}
-
-
-static void ne2000_poller(void *p)
-{
- ne2000_t *ne2000 = (ne2000_t *)p;
- struct queuepacket *qp;
- const unsigned char *data;
-#ifdef _WIN32
- struct pcap_pkthdr h;
-#endif
- if (net_is_slirp)
- {
- while (QueuePeek(slirpq) > 0)
- {
- qp = QueueDelete(slirpq);
- if ((ne2000->DCR.loop == 0) || (ne2000->TCR.loop_cntl != 0))
- {
- free(qp);
- return;
- }
- ne2000_rx_frame(ne2000,&qp->data,qp->len);
-#ifdef NE2000_DEBUG
- pclog("ne2000 inQ:%d got a %dbyte packet @%d\n",QueuePeek(slirpq),qp->len,qp);
-#endif
- free(qp);
- }
- fizz++;
- if(fizz > 1200)
- {
- fizz=0;
- slirp_tic();
- }
- }//end slirp
-#ifdef _WIN32
- if (net_is_pcap && net_pcap!=NULL)
- {
- data = _pcap_next(net_pcap,&h);
- if (data == 0x0)
- return;
- if ((memcmp(data+6,maclocal,6)) == 0)
- pclog("ne2000 we just saw ourselves\n");
- else
- {
- if((ne2000->DCR.loop == 0) || (ne2000->TCR.loop_cntl != 0))
- return;
-
-#ifdef NE2000_DEBUG
- pclog("ne2000 pcap received a frame %d bytes\n",h.caplen);
-#endif
- ne2000_rx_frame(ne2000,data,h.caplen);
- }
- }
-#endif
-}
-
-
-void *ne2000_common_init()
-{
- struct in_addr myaddr;
- int rc;
- unsigned int macint[6];
- char *macstring;
-
- ne2000_t *ne2000 = malloc(sizeof(ne2000_t));
- memset(ne2000, 0, sizeof(ne2000_t));
-
- macstring = config_get_string(CFG_MACHINE, NULL, "macaddr", "");
-
- if (sscanf(macstring, "%02x:%02x:%02x:%02x:%02x:%02x",
- &macint[0],&macint[1],&macint[2],&macint[3],&macint[4],&macint[5]) != 6)
- {
- maclocal[0] = 0xac;
- maclocal[1] = 0xde;
- maclocal[2] = 0x48;
- maclocal[3] = 0x88;
- maclocal[4] = 0xbb;
- maclocal[5] = 0xaa;
- pclog("ne2000: Using default MAC address (AC:DE:48:88:BB:AA)\n");
- }
- else
- {
- maclocal[0] = macint[0];
- maclocal[1] = macint[1];
- maclocal[2] = macint[2];
- maclocal[3] = macint[3];
- maclocal[4] = macint[4];
- maclocal[5] = macint[5];
- pclog("ne2000: Using MAC address from pcem.cfg: %s\n", macstring);
- }
-
- //net_type
- //0 pcap
- //1 slirp
- //
-#ifdef _WIN32
- net_is_slirp = (config_get_int(CFG_GLOBAL, NULL, "net_type", NET_SLIRP) == NET_SLIRP) ? 1 : 0;
- pclog("ne2000 pcap device %s\n",config_get_string(CFG_GLOBAL, NULL,"pcap_device","nothing"));
-
- //Check that we have a string setup, otherwise turn pcap off
- if (!strcmp("nothing",config_get_string(CFG_GLOBAL, NULL,"pcap_device","nothing")))
- net_is_pcap = 0;
- else if (net_is_slirp == 0)
- net_is_pcap = 1;
-#else
- net_is_slirp = 1;
- net_is_pcap = 0;
-#endif
-
- memcpy(ne2000->physaddr, maclocal, 6);
-
- ne2000_reset(BX_RESET_HARDWARE, ne2000);
- vlan_handler(ne2000_poller, ne2000);
-
- pclog("ne2000 init\tslirp is %d net_is_pcap is %d\n",net_is_slirp,net_is_pcap);
-
- //need a switch statment for more network types.
-
- if (net_is_slirp)
- {
- pclog("ne2000 initalizing SLiRP\n");
- net_is_pcap = 0;
- rc = slirp_init();
- pclog("ne2000 slirp_init returned: %d\n",rc);
- if (rc == 0)
- {
- pclog("ne2000 slirp initalized!\n");
- inet_aton("10.0.2.15",&myaddr);
- //YES THIS NEEDS TO PULL FROM A CONFIG FILE... but for now.
- rc=slirp_redir(0,42323,myaddr,23);
- pclog("ne2000 slirp redir returned %d on port 42323 -> 23\n",rc);
- rc=slirp_redir(0,42380,myaddr,80);
- pclog("ne2000 slirp redir returned %d on port 42380 -> 80\n",rc);
- rc=slirp_redir(0,42443,myaddr,443);
- pclog("ne2000 slirp redir returned %d on port 42443 -> 443\n",rc);
- rc=slirp_redir(0,42322,myaddr,22);
- pclog("ne2000 slirp redir returned %d on port 42322 -> 22\n",rc);
-
- //Kali
- rc=slirp_redir(1,2213,myaddr,2213);
- pclog("ne2000 slirp redir returned %d on port 2213 -> 2213\n",rc);
- rc=slirp_redir(1,2231,myaddr,2231);
- pclog("ne2000 slirp redir returned %d on port 2231 -> 2231\n",rc);
- rc=slirp_redir(1,2271,myaddr,2271);
- pclog("ne2000 slirp redir returned %d on port 2271 -> 2271\n",rc);
-
- net_slirp_inited=1;
- slirpq = QueueCreate();
- net_is_slirp=1;
- fizz=0;
- pclog("ne2000 slirpq is %x\n",&slirpq);
- }
- else
- {
- net_slirp_inited=0;
- net_is_slirp=0;
- }
- }
-#ifdef _WIN32
- if (net_is_pcap)
- { //pcap
- char errbuf[32768];
-
- pclog("ne2000 initalizing libpcap\n");
- net_is_slirp=0;
- net_hLib = LoadLibraryA(net_lib_name);
- if(net_hLib==0)
- {
- pclog("ne2000 Failed to load %s\n",net_lib_name);
- net_is_pcap=0;
- }
- _pcap_lib_version =(PCAP_LIB_VERSION)GetProcAddress(net_hLib,"pcap_lib_version");
- _pcap_open_live=(PCAP_OPEN_LIVE)GetProcAddress(net_hLib,"pcap_open_live");
- _pcap_sendpacket=(PCAP_SENDPACKET)GetProcAddress(net_hLib,"pcap_sendpacket");
- _pcap_setnonblock=(PCAP_SETNONBLOCK)GetProcAddress(net_hLib,"pcap_setnonblock");
- _pcap_next=(PCAP_NEXT)GetProcAddress(net_hLib,"pcap_next");
- _pcap_close=(PCAP_CLOSE)GetProcAddress(net_hLib,"pcap_close");
- _pcap_getnonblock=(PCAP_GETNONBLOCK)GetProcAddress(net_hLib,"pcap_getnonblock");
- _pcap_compile=(PCAP_COMPILE)GetProcAddress(net_hLib,"pcap_compile");
- _pcap_setfilter=(PCAP_SETFILTER)GetProcAddress(net_hLib,"pcap_setfilter");
-
- if (_pcap_lib_version && _pcap_open_live && _pcap_sendpacket && _pcap_setnonblock && _pcap_next && _pcap_close && _pcap_getnonblock)
- {
- pclog("ne2000 Pcap version [%s]\n",_pcap_lib_version());
-
- if ((net_pcap=_pcap_open_live(config_get_string(CFG_GLOBAL, NULL,"pcap_device","nothing"),1518,1,15,errbuf))==0)
- {
- pclog("ne2000 pcap_open_live error on %s!\n",config_get_string(CFG_GLOBAL, NULL,"pcap_device","whatever the ethernet is"));
- net_is_pcap=0; return(ne2000); //YUCK!!!
- }
- }
- else
- {
- pclog("%d %d %d %d %d %d %d\n",_pcap_lib_version, _pcap_open_live,_pcap_sendpacket,_pcap_setnonblock,_pcap_next,_pcap_close,_pcap_getnonblock);
- net_is_pcap=1;
- }
-
- //Time to check that we are in non-blocking mode.
- rc=_pcap_getnonblock(net_pcap,errbuf);
- pclog("ne2000 pcap is currently in %s mode\n",rc? "non-blocking":"blocking");
- switch(rc)
- {
- case 0:
- pclog("ne2000 Setting interface to non-blocking mode..");
- rc=_pcap_setnonblock(net_pcap,1,errbuf);
- if (rc==0)
- {
- pclog("..");
- rc=_pcap_getnonblock(net_pcap,errbuf);
- if (rc==1)
- {
- pclog("..!",rc);
- net_is_pcap=1;
- }
- else
- {
- pclog("\tunable to set pcap into non-blocking mode!\nContinuining without pcap.\n");
- net_is_pcap=0;
- }
- }
- else
- {
- pclog("There was an unexpected error of [%s]\n\nexiting.\n",errbuf);
- net_is_pcap=0;
- }
- pclog("\n");
- break;
- case 1:
- pclog("non blocking\n");
- break;
- default:
- pclog("this isn't right!!!\n");
- net_is_pcap=0;
- break;
- }
- if( net_is_pcap )
- {
- if(_pcap_compile && _pcap_setfilter)
- {
- struct bpf_program fp;
- char filter_exp[255];
-
- pclog("ne2000 Building packet filter...");
- sprintf(filter_exp,"( ((ether dst ff:ff:ff:ff:ff:ff) or (ether dst %02x:%02x:%02x:%02x:%02x:%02x)) and not (ether src %02x:%02x:%02x:%02x:%02x:%02x) )",
- maclocal[0], maclocal[1], maclocal[2], maclocal[3], maclocal[4], maclocal[5],
- maclocal[0], maclocal[1], maclocal[2], maclocal[3], maclocal[4], maclocal[5]);
-
- //I'm doing a MAC level filter so TCP/IP doesn't matter.
- if (_pcap_compile(net_pcap, &fp, filter_exp, 0, 0xffffffff) == -1)
- {
- pclog("\nne2000 Couldn't compile filter\n");
- }
- else
- {
- pclog("...");
- if (_pcap_setfilter(net_pcap, &fp) == -1)
- {
- pclog("\nError installing pcap filter.\n");
- }
- else
- {
- pclog("...!\n");
- }
- }
- pclog("ne2000 Using filter\t[%s]\n",filter_exp);
- }
- else
- {
- pclog("ne2000 Your platform lacks pcap_compile & pcap_setfilter\n");
- net_is_pcap=0;
- }
- pclog("ne2000 net_is_pcap is %d and net_pcap is %x\n",net_is_pcap,net_pcap);
- }
- } //end pcap setup
-#endif
- pclog("ne2000 is_slirp %d is_pcap %d\n",net_is_slirp,net_is_pcap);
-
- return ne2000;
-}
-
-void *ne2000_init()
-{
- ne2000_t *ne2000 = ne2000_common_init();
- uint16_t addr;
-
- ne2000->type = NE2000_NE2000;
-
- ne2000_setirq(ne2000, device_get_config_int("irq"));
-
- addr = device_get_config_int("addr");
- io_sethandler(addr, 0x0010, ne2000_read, NULL, NULL, ne2000_write, NULL, NULL, ne2000);
- io_sethandler(addr+0x10, 0x0010, ne2000_asic_read_b, ne2000_asic_read_w, NULL, ne2000_asic_write_b, ne2000_asic_write_w, NULL, ne2000);
- io_sethandler(addr+0x1f, 0x0001, ne2000_reset_read, NULL, NULL, ne2000_reset_write, NULL, NULL, ne2000);
-
- return ne2000;
-}
-
-void *rtl8029_init()
-{
- ne2000_t *ne2000 = ne2000_common_init();
-
- ne2000->is_pci = 1;
- ne2000->type = NE2000_RTL8029AS;
-
- ne2000->card = pci_add(rtl8029_pci_read, rtl8029_pci_write, ne2000);
-
- ne2000_setirq(ne2000, NE2000_PCI_IRQ);
-
- return ne2000;
-}
-
-void ne2000_close(void *p)
-{
- ne2000_t *ne2000 = (ne2000_t *)p;
- free(ne2000);
- if(net_is_slirp)
- {
- QueueDestroy(slirpq);
- slirp_exit(0);
- net_slirp_inited=0;
- pclog("ne2000 exiting slirp\n");
- }
-#ifdef _WIN32
- if(net_is_pcap && net_pcap!=NULL)
- {
- _pcap_close(net_pcap);
- FreeLibrary(net_hLib);
- pclog("ne2000 closing pcap\n");
- }
-#endif
- pclog("ne2000 close\n");
-}
-
-static device_config_t ne2000_config[] =
-{
- {
- .name = "addr",
- .description = "Address",
- .type = CONFIG_BINARY,
- .type = CONFIG_SELECTION,
- .selection =
- {
- {
- .description = "0x280",
- .value = 0x280
- },
- {
- .description = "0x300",
- .value = 0x300
- },
- {
- .description = "0x320",
- .value = 0x320
- },
- {
- .description = "0x340",
- .value = 0x340
- },
- {
- .description = "0x360",
- .value = 0x360
- },
- {
- .description = "0x380",
- .value = 0x380
- },
- {
- .description = ""
- }
- },
- .default_int = 0x300
- },
- {
- .name = "irq",
- .description = "IRQ",
- .type = CONFIG_SELECTION,
- .selection =
- {
- {
- .description = "IRQ 3",
- .value = 3
- },
- {
- .description = "IRQ 5",
- .value = 5
- },
- {
- .description = "IRQ 7",
- .value = 7
- },
- {
- .description = "IRQ 10",
- .value = 10
- },
- {
- .description = "IRQ 11",
- .value = 11
- },
- {
- .description = "IRQ 12",
- .value = 12
- },
- {
- .description = ""
- }
- },
- .default_int = 10
- },
- {
- .type = -1
- }
-};
-
-device_t ne2000_device =
-{
- "Novell NE2000",
- 0,
- ne2000_init,
- ne2000_close,
- NULL,
- NULL,
- NULL,
- NULL,
- ne2000_config
-};
-
-device_t rtl8029as_device =
-{
- "Realtek RTL8029AS",
- DEVICE_PCI,
- rtl8029_init,
- ne2000_close,
- NULL,
- NULL,
- NULL,
- NULL,
- NULL
-};
-
-
-//SLIRP stuff
-int slirp_can_output(void)
-{
- return net_slirp_inited;
-}
-
-void slirp_output (const unsigned char *pkt, int pkt_len)
-{
- struct queuepacket *p;
- p=(struct queuepacket *)malloc(sizeof(struct queuepacket));
- p->len=pkt_len;
- memcpy(p->data,pkt,pkt_len);
- QueueEnter(slirpq,p);
-#ifdef NE2000_DEBUG
- pclog("ne2000 slirp_output %d @%d\n",pkt_len,p);
-#endif
-}
-
-// Instead of calling this and crashing some times
-// or experencing jitter, this is called by the
-// 60Hz clock which seems to do the job.
-void slirp_tic()
-{
- int ret2,nfds;
- struct timeval tv;
- fd_set rfds, wfds, xfds;
- int timeout;
- nfds=-1;
-
- if(net_slirp_inited)
- {
- FD_ZERO(&rfds);
- FD_ZERO(&wfds);
- FD_ZERO(&xfds);
- timeout=slirp_select_fill(&nfds,&rfds,&wfds,&xfds); //this can crash
-
- if(timeout<0)
- timeout=500;
- tv.tv_sec=0;
- tv.tv_usec = timeout; //basilisk default 10000
-
- ret2 = select(nfds + 1, &rfds, &wfds, &xfds, &tv);
- if (ret2>=0)
- {
- slirp_select_poll(&rfds, &wfds, &xfds);
- }
- //pclog("ne2000 slirp_tic()\n");
- }//end if slirp inited
-}
diff --git a/src/ne2000.h b/src/ne2000.h
deleted file mode 100644
index e413877..0000000
--- a/src/ne2000.h
+++ /dev/null
@@ -1,2 +0,0 @@
-extern device_t ne2000_device;
-extern device_t rtl8029as_device;
diff --git a/src/nethandler.c b/src/nethandler.c
deleted file mode 100644
index f06ef46..0000000
--- a/src/nethandler.c
+++ /dev/null
@@ -1,120 +0,0 @@
-#ifdef _WIN32
-#include
-#include
-#endif
-#include
-#include
-#include
-#include
-#include "nethandler.h"
-
-#include "ibm.h"
-#include "device.h"
-
-#include "ne2000.h"
-#include "timer.h"
-
-int network_card_current = 0;
-static int network_card_last = 0;
-
-typedef struct
-{
- char name[32];
- char internal_name[24];
- device_t *device;
-} NETWORK_CARD;
-
-static NETWORK_CARD network_cards[] =
-{
- {"None", "", NULL},
- {"Novell NE2000", "ne2000", &ne2000_device},
- {"Realtek RTL8029AS", "rtl8029as", &rtl8029as_device},
- {"", "", NULL}
-};
-
-int network_card_available(int card)
-{
- if (network_cards[card].device)
- return device_available(network_cards[card].device);
-
- return 1;
-}
-
-char *network_card_getname(int card)
-{
- return network_cards[card].name;
-}
-
-device_t *network_card_getdevice(int card)
-{
- return network_cards[card].device;
-}
-
-int network_card_has_config(int card)
-{
- if (!network_cards[card].device)
- return 0;
- return network_cards[card].device->config ? 1 : 0;
-}
-
-char *network_card_get_internal_name(int card)
-{
- return network_cards[card].internal_name;
-}
-
-int network_card_get_from_internal_name(char *s)
-{
- int c = 0;
-
- while (strlen(network_cards[c].name))
- {
- if (!strcmp(network_cards[c].internal_name, s))
- return c;
- c++;
- }
-
- return 0;
-}
-
-void network_card_init()
-{
- if (network_cards[network_card_current].device)
- device_add(network_cards[network_card_current].device);
- network_card_last = network_card_current;
-}
-
-static struct
-{
- void (*poller)(void *p);
- void *priv;
-} vlan_handlers[8];
-
-static int vlan_handlers_num;
-
-static pc_timer_t vlan_poller_timer;
-
-void vlan_handler(void (*poller)(void *p), void *p)
-//void vlan_handler(int (*can_receive)(void *p), void (*receive)(void *p, const uint8_t *buf, int size), void *p)
-{
- /* vlan_handlers[vlan_handlers_num].can_receive = can_receive; */
- vlan_handlers[vlan_handlers_num].poller = poller;
- vlan_handlers[vlan_handlers_num].priv = p;
- vlan_handlers_num++;
-}
-
-void vlan_poller(void *priv)
-{
- int c;
-
- timer_advance_u64(&vlan_poller_timer, (uint64_t)((double)TIMER_USEC * (1000000.0 / 8.0 / 1500.0)));
-
- for (c = 0; c < vlan_handlers_num; c++)
- vlan_handlers[c].poller(vlan_handlers[c].priv);
-}
-
-void vlan_reset()
-{
- timer_add(&vlan_poller_timer, vlan_poller, NULL, 1);
-
- vlan_handlers_num = 0;
-}
diff --git a/src/nethandler.h b/src/nethandler.h
deleted file mode 100644
index 3dde87c..0000000
--- a/src/nethandler.h
+++ /dev/null
@@ -1,26 +0,0 @@
-#include
-
-//void vlan_handler(int (*can_receive)(void *p), void (*receive)(void *p, const uint8_t *buf, int size), void *p);
-void vlan_handler(void (*poller)(void *p), void *p);
-
-extern int network_card_current;
-
-int network_card_available(int card);
-char *network_card_getname(int card);
-struct device_t *network_card_getdevice(int card);
-int network_card_has_config(int card);
-void network_card_init();
-
-char *network_card_get_internal_name(int card);
-int network_card_get_from_internal_name(char *s);
-
-void initpcap();
-void closepcap();
-
-void vlan_reset();
-
-enum
-{
- NET_SLIRP = 0,
- NET_PCAP = 1
-};
diff --git a/src/nvr.c b/src/nvr.c
index edbd35b..419e7b9 100644
--- a/src/nvr.c
+++ b/src/nvr.c
@@ -1,19 +1,10 @@
#include
-#include
#include "ibm.h"
-#include "device.h"
#include "io.h"
#include "nvr.h"
-#include "nvr_tc8521.h"
#include "pic.h"
#include "timer.h"
#include "rtc.h"
-#include "paths.h"
-#include "config.h"
-#include "model.h"
-#include "nmi.h"
-#include "t1000.h"
-#include "x86.h"
int oldromset;
int nvrmask=63;
@@ -22,85 +13,42 @@ int nvraddr;
int nvr_dosave = 0;
-typedef struct nvr_t
-{
- pc_timer_t rtc_timer;
- pc_timer_t onesec_timer;
- pc_timer_t update_end_timer;
+static int nvr_onesec_time = 0, nvr_onesec_cnt = 0;
- int onesec_cnt;
-} nvr_t;
-
-FILE *nvrfopen(char *fn, char *mode)
-{
- char s[512];
- FILE *f;
-
- strcpy(s, nvr_path);
- put_backslash(s);
- strcat(s, config_name);
- strcat(s, ".");
- strcat(s, fn);
- pclog("NVR try opening %s\n", s);
- f = fopen(s, mode);
- if (f)
- return f;
-
- if (mode[0] == 'r')
- {
- snprintf(s, 512, "%s%s", nvr_default_path, fn);
- return fopen(s, mode);
- }
- else
- {
- pclog("Failed to open file '%s' for write\n", s);
- return NULL;
- }
-}
+static int rtctime;
void getnvrtime()
{
time_get(nvrram);
}
-static void nvr_speed_changed(void *p)
+void nvr_recalc()
{
- nvr_t *nvr = (nvr_t *)p;
-
- if (!(nvrram[RTC_REGA] & RTC_RS))
- {
- timer_disable(&nvr->rtc_timer);
- return;
- }
- else
- {
- int c = 1 << ((nvrram[RTC_REGA] & RTC_RS) - 1);
- timer_set_delay_u64(&nvr->rtc_timer, (uint64_t)(RTCCONST * c));
- }
+ int c;
+ int newrtctime;
+ c = 1 << ((nvrram[RTC_REGA] & RTC_RS) - 1);
+ newrtctime=(int)(RTCCONST * c * (1 << TIMER_SHIFT));
+ if (rtctime>newrtctime) rtctime=newrtctime;
}
-static void nvr_rtc(void *p)
+void nvr_rtc(void *p)
{
- nvr_t *nvr = (nvr_t *)p;
-
+ int c;
if (!(nvrram[RTC_REGA] & RTC_RS))
{
- timer_disable(&nvr->rtc_timer);
+ rtctime=0x7fffffff;
return;
}
- else
+ c = 1 << ((nvrram[RTC_REGA] & RTC_RS) - 1);
+ rtctime += (int)(RTCCONST * c * (1 << TIMER_SHIFT));
+// pclog("RTCtime now %f\n",rtctime);
+ nvrram[RTC_REGC] |= RTC_PF;
+ if (nvrram[RTC_REGB] & RTC_PIE)
{
- int c = 1 << ((nvrram[RTC_REGA] & RTC_RS) - 1);
- timer_advance_u64(&nvr->rtc_timer, (uint64_t)(RTCCONST * c));
-// pclog("RTCtime now %f\n",rtctime);
- nvrram[RTC_REGC] |= RTC_PF;
- if (nvrram[RTC_REGB] & RTC_PIE)
- {
- nvrram[RTC_REGC] |= RTC_IRQF;
- if (AMSTRAD) picint(2);
- else picint(0x100);
-// pclog("RTC int\n");
- }
+ nvrram[RTC_REGC] |= RTC_IRQF;
+ if (AMSTRAD) picint(2);
+ else picint(0x100);
+// pclog("RTC int\n");
}
}
@@ -113,11 +61,10 @@ int nvr_check_alarm(int nvraddr)
return (nvrram[nvraddr + 1] == nvrram[nvraddr] || (nvrram[nvraddr + 1] & ALARM_DONTCARE) == ALARM_DONTCARE);
}
+int nvr_update_end_count = 0;
-static void nvr_update_end(void *p)
+void nvr_update_end(void *p)
{
-// nvr_t *nvr = (nvr_t *)p;
-
if (!(nvrram[RTC_REGB] & RTC_SET))
{
getnvrtime();
@@ -146,33 +93,30 @@ static void nvr_update_end(void *p)
}
// pclog("RTC onesec\n");
+
+ nvr_update_end_count = 0;
}
-static void nvr_onesec(void *p)
+void nvr_onesec(void *p)
{
- nvr_t *nvr = (nvr_t *)p;
-
- nvr->onesec_cnt++;
- if (nvr->onesec_cnt >= 100)
+ nvr_onesec_cnt++;
+ if (nvr_onesec_cnt >= 100)
{
if (!(nvrram[RTC_REGB] & RTC_SET))
{
nvr_update_status = RTC_UIP;
rtc_tick();
- timer_set_delay_u64(&nvr->update_end_timer, (uint64_t)((244.0 + 1984.0) * TIMER_USEC));
+ nvr_update_end_count = (int)((244.0 + 1984.0) * TIMER_USEC);
}
- nvr->onesec_cnt = 0;
+ nvr_onesec_cnt = 0;
}
- timer_advance_u64(&nvr->onesec_timer, (uint64_t)(10000 * TIMER_USEC));
+ nvr_onesec_time += (int)(10000 * TIMER_USEC);
}
-static void writenvr(uint16_t addr, uint8_t val, void *p)
+void writenvr(uint16_t addr, uint8_t val, void *priv)
{
- nvr_t *nvr = (nvr_t *)p;
int c, old;
-
- cycles -= ISA_CYCLES(8);
// printf("Write NVR %03X %02X %02X %04X:%04X %i\n",addr,nvraddr,val,cs>>4,pc,ins);
if (addr&1)
{
@@ -191,10 +135,10 @@ static void writenvr(uint16_t addr, uint8_t val, void *p)
if (val & RTC_RS)
{
c = 1 << ((val & RTC_RS) - 1);
- timer_set_delay_u64(&nvr->rtc_timer, (uint64_t)(RTCCONST * c));
+ rtctime += (int)(RTCCONST * c * (1 << TIMER_SHIFT));
}
else
- timer_disable(&nvr->rtc_timer);
+ rtctime = 0x7fffffff;
}
else
{
@@ -220,32 +164,13 @@ static void writenvr(uint16_t addr, uint8_t val, void *p)
}
}
}
- else
- {
- nvraddr=val&nvrmask;
- /*PS/2 BIOSes will disable NMIs and expect the watchdog timer to still be able
- to fire them. I suspect the watchdog is exempt from NMI masking. Currently NMIs
- are always enabled for PS/2 machines - this would mean that other peripherals
- could fire NMIs regardless of the mask state, but as there aren't any emulated
- MCA peripherals that do this it's currently a moot point.*/
-
- /* Also don't update the NMI mask on Amstrad PCs - actually
- * ought not to do it for any XT because their NMI mask
- * register is at 0xA0. But particularly important on the
- * PC200 and PPC because their video subsystem issues NMIs */
- if (!(models[model].flags & (MODEL_MCA | MODEL_AMSTRAD)))
- {
- nmi_mask = ~val & 0x80;
- }
- }
+ else nvraddr=val&nvrmask;
}
-uint8_t readnvr(uint16_t addr, void *p)
+uint8_t readnvr(uint16_t addr, void *priv)
{
-// nvr_t *nvr = (nvr_t *)p;
uint8_t temp;
// printf("Read NVR %03X %02X %02X %04X:%04X\n",addr,nvraddr,nvrram[nvraddr],cs>>4,pc);
- cycles -= ISA_CYCLES(8);
if (addr&1)
{
if (nvraddr == RTC_REGA)
@@ -270,92 +195,43 @@ uint8_t readnvr(uint16_t addr, void *p)
void loadnvr()
{
FILE *f;
-
+ int c;
nvrmask=63;
oldromset=romset;
switch (romset)
{
- case ROM_PC1512: f = nvrfopen("pc1512.nvr", "rb"); break;
- case ROM_PC1640: f = nvrfopen("pc1640.nvr", "rb"); break;
- case ROM_PC200: f = nvrfopen("pc200.nvr", "rb"); break;
- case ROM_PC2086: f = nvrfopen("pc2086.nvr", "rb"); break;
- case ROM_PC3086: f = nvrfopen("pc3086.nvr", "rb"); break;
- case ROM_PC5086: f = nvrfopen("pc5086.nvr", "rb"); break;
- case ROM_PPC512: f = nvrfopen("ppc512.nvr", "rb"); break;
- case ROM_IBMAT: f = nvrfopen("at.nvr", "rb"); break;
- case ROM_IBMXT286: f = nvrfopen("ibmxt286.nvr", "rb"); break;
- case ROM_IBMPS1_2011: f = nvrfopen("ibmps1_2011.nvr", "rb"); /*nvrmask = 127; */break;
- case ROM_IBMPS1_2121: f = nvrfopen("ibmps1_2121.nvr", "rb"); nvrmask = 127; break;
- case ROM_IBMPS2_M30_286: f = nvrfopen("ibmps2_m30_286.nvr", "rb"); /*nvrmask = 127; */break;
- case ROM_IBMPS2_M50: f = nvrfopen("ibmps2_m50.nvr", "rb"); break;
- case ROM_IBMPS2_M55SX: f = nvrfopen("ibmps2_m55sx.nvr", "rb"); break;
- case ROM_IBMPS2_M80: f = nvrfopen("ibmps2_m80.nvr", "rb"); break;
- case ROM_CMDPC30: f = nvrfopen("cmdpc30.nvr", "rb"); nvrmask = 127; break;
- case ROM_AMI286: f = nvrfopen("ami286.nvr", "rb"); nvrmask = 127; break;
- case ROM_TG286M: f = nvrfopen("tg286m.nvr", "rb"); nvrmask = 127; break;
- case ROM_AWARD286: f = nvrfopen("award286.nvr", "rb"); nvrmask = 127; break;
- case ROM_GDC212M: f = nvrfopen("gdc212m.nvr", "rb"); nvrmask = 127; break;
- case ROM_HYUNDAI_SUPER286TR: f = nvrfopen("super286tr.nvr", "rb"); nvrmask = 127; break;
- case ROM_GW286CT: f = nvrfopen("gw286ct.nvr", "rb"); nvrmask = 127; break;
- case ROM_SPC4200P: f = nvrfopen("spc4200p.nvr", "rb"); nvrmask = 127; break;
- case ROM_SPC4216P: f = nvrfopen("spc4216p.nvr", "rb"); nvrmask = 127; break;
- case ROM_SPC4620P: f = nvrfopen("spc4620p.nvr", "rb"); nvrmask = 127; break;
- case ROM_SPC6000A: f = nvrfopen("spc6000a.nvr", "rb"); nvrmask = 127; break;
- case ROM_SPC6033P: f = nvrfopen("spc6033p.nvr", "rb"); nvrmask = 127; break;
- case ROM_DELL200: f = nvrfopen("dell200.nvr", "rb"); nvrmask = 127; break;
- case ROM_IBMAT386: f = nvrfopen("at386.nvr", "rb"); nvrmask = 127; break;
- case ROM_DESKPRO_386: f = nvrfopen("deskpro386.nvr", "rb"); break;
- case ROM_ACER386: f = nvrfopen("acer386.nvr", "rb"); nvrmask = 127; break;
- case ROM_KMXC02: f = nvrfopen("kmxc02.nvr", "rb"); nvrmask = 127; break;
- case ROM_MEGAPC: f = nvrfopen("megapc.nvr", "rb"); nvrmask = 127; break;
- case ROM_AMA932J: f = nvrfopen("ama932j.nvr", "rb"); nvrmask = 127; break;
- case ROM_AMI386SX: f = nvrfopen("ami386.nvr", "rb"); nvrmask = 127; break;
- case ROM_AMI486: f = nvrfopen("ami486.nvr", "rb"); nvrmask = 127; break;
- case ROM_WIN486: f = nvrfopen("win486.nvr", "rb"); nvrmask = 127; break;
- case ROM_PCI486: f = nvrfopen("hot-433.nvr", "rb"); nvrmask = 127; break;
- case ROM_SIS496: f = nvrfopen("sis496.nvr", "rb"); nvrmask = 127; break;
- case ROM_P55VA: f = nvrfopen("p55va.nvr", "rb"); nvrmask = 127; break;
- case ROM_P55TVP4: f = nvrfopen("p55tvp4.nvr", "rb"); nvrmask = 127; break;
- case ROM_430VX: f = nvrfopen("430vx.nvr", "rb"); nvrmask = 127; break;
- case ROM_REVENGE: f = nvrfopen("revenge.nvr", "rb"); nvrmask = 127; break;
- case ROM_ENDEAVOR: f = nvrfopen("endeavor.nvr", "rb"); nvrmask = 127; break;
- case ROM_P55T2P4: f = nvrfopen("p55t2p4.nvr", "rb"); nvrmask = 127; break;
- case ROM_PX386: f = nvrfopen("px386.nvr", "rb"); nvrmask = 127; break;
- case ROM_DTK386: f = nvrfopen("dtk386.nvr", "rb"); nvrmask = 127; break;
- case ROM_MR386DX_OPTI495: f = nvrfopen("mr386dx_opti495.nvr", "rb"); nvrmask = 127; break;
- case ROM_AMI386DX_OPTI495: f = nvrfopen("ami386dx_opti495.nvr", "rb"); nvrmask = 127; break;
- case ROM_EPSON_PCAX: f = nvrfopen("epson_pcax.nvr", "rb"); nvrmask = 127; break;
- case ROM_EPSON_PCAX2E: f = nvrfopen("epson_pcax2e.nvr", "rb"); nvrmask = 127; break;
- case ROM_PB_L300SX: f = nvrfopen("pb_l300sx.nvr", "rb"); nvrmask = 127; break;
- case ROM_EPSON_PCAX3: f = nvrfopen("epson_pcax3.nvr", "rb"); nvrmask = 127; break;
- case ROM_COMPAQ_PII: f = nvrfopen("compaq_pii.nvr", "rb"); break;
- case ROM_T3100E: f = nvrfopen("t3100e.nvr", "rb"); break;
- case ROM_T1000: tc8521_loadnvr();
- t1000_configsys_loadnvr();
- t1000_emsboard_loadnvr();
- return;
- case ROM_T1200: tc8521_loadnvr();
- t1200_state_loadnvr();
- t1000_emsboard_loadnvr();
- return;
- case ROM_ELX_PC425X: f = nvrfopen("elx_pc425.nvr", "rb"); nvrmask = 127; break;
- case ROM_PB570: f = nvrfopen("pb570.nvr", "rb"); nvrmask = 127; break;
- case ROM_ZAPPA: f = nvrfopen("zappa.nvr", "rb"); nvrmask = 127; break;
- case ROM_ITAUTEC_INFOWAYM: f = nvrfopen("infowaym.nvr", "rb"); nvrmask = 127; break;
- case ROM_PB520R: f = nvrfopen("pb520r.nvr", "rb"); nvrmask = 127; break;
- case ROM_XI8088: f = nvrfopen("xi8088.nvr", "rb"); nvrmask = 127; break;
- case ROM_IBMPS2_M70_TYPE3: f = nvrfopen("ibmps2_m70_type3.nvr","rb"); break;
- case ROM_IBMPS2_M70_TYPE4: f = nvrfopen("ibmps2_m70_type4.nvr","rb"); break;
- case ROM_TULIP_TC7: f = nvrfopen("tulip_tc7.nvr", "rb"); break;
- case ROM_PB410A: f = nvrfopen("pb410a.nvr", "rb"); nvrmask = 127; break;
- case ROM_BULL_MICRAL_45: f = nvrfopen("bull_micral_45.nvr", "rb"); break;
- case ROM_FIC_VA503P: f = nvrfopen("fic_va503p.nvr", "rb"); nvrmask = 127; break;
- case ROM_CBM_SL386SX25: f = nvrfopen("cbm_sl386sx25.nvr", "rb"); nvrmask = 127; break;
- case ROM_IBMPS1_2133_451: f = nvrfopen("ibmps1_2133.nvr", "rb"); nvrmask = 127; break;
- case ROM_ECS_386_32: f = nvrfopen("ecs_386_32.nvr", "rb"); nvrmask = 127; break;
- case ROM_VS440FX: f = nvrfopen("vs440fx.nvr", "rb"); nvrmask = 127; break;
- case ROM_GA686BX: f = nvrfopen("ga686bx.nvr", "rb"); nvrmask = 127; break;
-
+ case ROM_PC1512: f = romfopen("nvr/pc1512.nvr", "rb"); break;
+ case ROM_PC1640: f = romfopen("nvr/pc1640.nvr", "rb"); break;
+ case ROM_PC200: f = romfopen("nvr/pc200.nvr", "rb"); break;
+ case ROM_PC2086: f = romfopen("nvr/pc2086.nvr", "rb"); break;
+ case ROM_PC3086: f = romfopen("nvr/pc3086.nvr", "rb"); break;
+ case ROM_IBMAT: f = romfopen("nvr/at.nvr", "rb"); break;
+ case ROM_IBMPS1_2011: f = romfopen("nvr/ibmps1_2011.nvr", "rb"); /*nvrmask = 127; */break;
+ case ROM_IBMPS1_2121: f = romfopen("nvr/ibmps1_2121.nvr", "rb"); nvrmask = 127; break;
+ case ROM_IBMPS2_M30_286: f = romfopen("nvr/ibmps2_m30_286.nvr", "rb"); /*nvrmask = 127; */break;
+ case ROM_IBMPS2_M50: f = romfopen("nvr/ibmps2_m50.nvr", "rb"); break;
+ case ROM_IBMPS2_M55SX: f = romfopen("nvr/ibmps2_m55sx.nvr", "rb"); break;
+ case ROM_IBMPS2_M80: f = romfopen("nvr/ibmps2_m80.nvr", "rb"); break;
+ case ROM_CMDPC30: f = romfopen("nvr/cmdpc30.nvr", "rb"); nvrmask = 127; break;
+ case ROM_AMI286: f = romfopen("nvr/ami286.nvr", "rb"); nvrmask = 127; break;
+ case ROM_AWARD286: f = romfopen("nvr/award286.nvr", "rb"); nvrmask = 127; break;
+ case ROM_DELL200: f = romfopen("nvr/dell200.nvr", "rb"); nvrmask = 127; break;
+ case ROM_IBMAT386: f = romfopen("nvr/at386.nvr", "rb"); nvrmask = 127; break;
+ case ROM_DESKPRO_386: f = romfopen("nvr/deskpro386.nvr", "rb"); break;
+ case ROM_ACER386: f = romfopen("nvr/acer386.nvr", "rb"); nvrmask = 127; break;
+ case ROM_MEGAPC: f = romfopen("nvr/megapc.nvr", "rb"); nvrmask = 127; break;
+ case ROM_AMI386SX: f = romfopen("nvr/ami386.nvr", "rb"); nvrmask = 127; break;
+ case ROM_AMI486: f = romfopen("nvr/ami486.nvr", "rb"); nvrmask = 127; break;
+ case ROM_WIN486: f = romfopen("nvr/win486.nvr", "rb"); nvrmask = 127; break;
+ case ROM_PCI486: f = romfopen("nvr/hot-433.nvr", "rb"); nvrmask = 127; break;
+ case ROM_SIS496: f = romfopen("nvr/sis496.nvr", "rb"); nvrmask = 127; break;
+ case ROM_430VX: f = romfopen("nvr/430vx.nvr", "rb"); nvrmask = 127; break;
+ case ROM_REVENGE: f = romfopen("nvr/revenge.nvr", "rb"); nvrmask = 127; break;
+ case ROM_ENDEAVOR: f = romfopen("nvr/endeavor.nvr", "rb"); nvrmask = 127; break;
+ case ROM_PX386: f = romfopen("nvr/px386.nvr", "rb"); nvrmask = 127; break;
+ case ROM_DTK386: f = romfopen("nvr/dtk386.nvr", "rb"); nvrmask = 127; break;
+ case ROM_MR386DX_OPTI495: f = romfopen("nvr/mr386dx_opti495.nvr", "rb"); nvrmask = 127; break;
+ case ROM_AMI386DX_OPTI495: f = romfopen("nvr/ami386dx_opti495.nvr", "rb"); nvrmask = 127; break;
default: return;
}
if (!f)
@@ -379,128 +255,57 @@ void loadnvr()
fclose(f);
nvrram[RTC_REGA] = 6;
nvrram[RTC_REGB] = RTC_2412;
+ c = 1 << ((nvrram[RTC_REGA] & RTC_RS) - 1);
+ rtctime += (int)(RTCCONST * c * (1 << TIMER_SHIFT));
}
void savenvr()
{
FILE *f;
switch (oldromset)
{
- case ROM_PC1512: f = nvrfopen("pc1512.nvr", "wb"); break;
- case ROM_PC1640: f = nvrfopen("pc1640.nvr", "wb"); break;
- case ROM_PC200: f = nvrfopen("pc200.nvr", "wb"); break;
- case ROM_PC2086: f = nvrfopen("pc2086.nvr", "wb"); break;
- case ROM_PC3086: f = nvrfopen("pc3086.nvr", "wb"); break;
- case ROM_PC5086: f = nvrfopen("pc5086.nvr", "wb"); break;
- case ROM_PPC512: f = nvrfopen("ppc512.nvr", "wb"); break;
- case ROM_IBMAT: f = nvrfopen("at.nvr", "wb"); break;
- case ROM_IBMXT286: f = nvrfopen("ibmxt286.nvr", "wb"); break;
- case ROM_IBMPS1_2011: f = nvrfopen("ibmps1_2011.nvr", "wb"); break;
- case ROM_IBMPS1_2121: f = nvrfopen("ibmps1_2121.nvr", "wb"); break;
- case ROM_IBMPS2_M30_286: f = nvrfopen("ibmps2_m30_286.nvr", "wb"); break;
- case ROM_IBMPS2_M50: f = nvrfopen("ibmps2_m50.nvr", "wb"); break;
- case ROM_IBMPS2_M55SX: f = nvrfopen("ibmps2_m55sx.nvr", "wb"); break;
- case ROM_IBMPS2_M80: f = nvrfopen("ibmps2_m80.nvr", "wb"); break;
- case ROM_CMDPC30: f = nvrfopen("cmdpc30.nvr", "wb"); break;
- case ROM_AMI286: f = nvrfopen("ami286.nvr", "wb"); break;
- case ROM_TG286M: f = nvrfopen("tg286m.nvr", "wb"); break;
- case ROM_AWARD286: f = nvrfopen("award286.nvr", "wb"); break;
- case ROM_GDC212M: f = nvrfopen("gdc212m.nvr", "wb"); break;
- case ROM_HYUNDAI_SUPER286TR: f = nvrfopen("super286tr.nvr", "wb"); break;
- case ROM_GW286CT: f = nvrfopen("gw286ct.nvr", "wb"); break;
- case ROM_SPC4200P: f = nvrfopen("spc4200p.nvr", "wb"); break;
- case ROM_SPC4216P: f = nvrfopen("spc4216p.nvr", "wb"); break;
- case ROM_SPC4620P: f = nvrfopen("spc4620p.nvr", "wb"); break;
- case ROM_SPC6000A: f = nvrfopen("spc6000a.nvr", "wb"); break;
- case ROM_SPC6033P: f = nvrfopen("spc6033p.nvr", "wb"); break;
- case ROM_DELL200: f = nvrfopen("dell200.nvr", "wb"); break;
- case ROM_IBMAT386: f = nvrfopen("at386.nvr", "wb"); break;
- case ROM_DESKPRO_386: f = nvrfopen("deskpro386.nvr", "wb"); break;
- case ROM_ACER386: f = nvrfopen("acer386.nvr", "wb"); break;
- case ROM_KMXC02: f = nvrfopen("kmxc02.nvr", "wb"); break;
- case ROM_MEGAPC: f = nvrfopen("megapc.nvr", "wb"); break;
- case ROM_AMA932J: f = nvrfopen("ama932j.nvr", "wb"); break;
- case ROM_AMI386SX: f = nvrfopen("ami386.nvr", "wb"); break;
- case ROM_AMI486: f = nvrfopen("ami486.nvr", "wb"); break;
- case ROM_WIN486: f = nvrfopen("win486.nvr", "wb"); break;
- case ROM_PCI486: f = nvrfopen("hot-433.nvr", "wb"); break;
- case ROM_SIS496: f = nvrfopen("sis496.nvr", "wb"); break;
- case ROM_P55VA: f = nvrfopen("p55va.nvr", "wb"); break;
- case ROM_P55TVP4: f = nvrfopen("p55tvp4.nvr", "wb"); break;
- case ROM_430VX: f = nvrfopen("430vx.nvr", "wb"); break;
- case ROM_REVENGE: f = nvrfopen("revenge.nvr", "wb"); break;
- case ROM_ENDEAVOR: f = nvrfopen("endeavor.nvr", "wb"); break;
- case ROM_P55T2P4: f = nvrfopen("p55t2p4.nvr", "wb"); break;
- case ROM_PX386: f = nvrfopen("px386.nvr", "wb"); break;
- case ROM_DTK386: f = nvrfopen("dtk386.nvr", "wb"); break;
- case ROM_MR386DX_OPTI495: f = nvrfopen("mr386dx_opti495.nvr", "wb"); break;
- case ROM_AMI386DX_OPTI495: f = nvrfopen("ami386dx_opti495.nvr", "wb"); break;
- case ROM_EPSON_PCAX: f = nvrfopen("epson_pcax.nvr", "wb"); break;
- case ROM_EPSON_PCAX2E: f = nvrfopen("epson_pcax2e.nvr", "wb"); break;
- case ROM_EPSON_PCAX3: f = nvrfopen("epson_pcax3.nvr", "wb"); break;
- case ROM_COMPAQ_PII: f = nvrfopen("compaq_pii.nvr", "wb"); break;
- case ROM_PB_L300SX: f = nvrfopen("pb_l300sx.nvr", "wb"); break;
- case ROM_T3100E: f = nvrfopen("t3100e.nvr", "wb"); break;
- case ROM_T1000: tc8521_savenvr();
- t1000_configsys_savenvr();
- t1000_emsboard_savenvr();
- return;
- case ROM_T1200: tc8521_savenvr();
- t1200_state_savenvr();
- t1000_emsboard_savenvr();
- return;
- case ROM_ELX_PC425X: f = nvrfopen("elx_pc425.nvr", "wb"); break;
- case ROM_PB570: f = nvrfopen("pb570.nvr", "wb"); break;
- case ROM_ZAPPA: f = nvrfopen("zappa.nvr", "wb"); break;
- case ROM_ITAUTEC_INFOWAYM: f = nvrfopen("infowaym.nvr", "wb"); break;
- case ROM_PB520R: f = nvrfopen("pb520r.nvr", "wb"); break;
- case ROM_XI8088: f = nvrfopen("xi8088.nvr", "wb"); break;
- case ROM_IBMPS2_M70_TYPE3: f = nvrfopen("ibmps2_m70_type3.nvr","wb"); break;
- case ROM_IBMPS2_M70_TYPE4: f = nvrfopen("ibmps2_m70_type4.nvr","wb"); break;
- case ROM_TULIP_TC7: f = nvrfopen("tulip_tc7.nvr", "wb"); break;
- case ROM_PB410A: f = nvrfopen("pb410a.nvr", "wb"); break;
- case ROM_BULL_MICRAL_45: f = nvrfopen("bull_micral_45.nvr", "wb"); break;
- case ROM_FIC_VA503P: f = nvrfopen("fic_va503p.nvr", "wb"); break;
- case ROM_CBM_SL386SX25: f = nvrfopen("cbm_sl386sx25.nvr", "wb"); break;
- case ROM_IBMPS1_2133_451: f = nvrfopen("ibmps1_2133.nvr", "wb"); break;
- case ROM_ECS_386_32: f = nvrfopen("ecs_386_32.nvr", "wb"); break;
- case ROM_VS440FX: f = nvrfopen("vs440fx.nvr", "wb"); break;
- case ROM_GA686BX: f = nvrfopen("ga686bx.nvr", "wb"); break;
-
+ case ROM_PC1512: f = romfopen("nvr/pc1512.nvr", "wb"); break;
+ case ROM_PC1640: f = romfopen("nvr/pc1640.nvr", "wb"); break;
+ case ROM_PC200: f = romfopen("nvr/pc200.nvr", "wb"); break;
+ case ROM_PC2086: f = romfopen("nvr/pc2086.nvr", "wb"); break;
+ case ROM_PC3086: f = romfopen("nvr/pc3086.nvr", "wb"); break;
+ case ROM_IBMAT: f = romfopen("nvr/at.nvr", "wb"); break;
+ case ROM_IBMPS1_2011: f = romfopen("nvr/ibmps1_2011.nvr", "wb"); break;
+ case ROM_IBMPS1_2121: f = romfopen("nvr/ibmps1_2121.nvr", "wb"); break;
+ case ROM_IBMPS2_M30_286: f = romfopen("nvr/ibmps2_m30_286.nvr", "wb"); break;
+ case ROM_IBMPS2_M50: f = romfopen("nvr/ibmps2_m50.nvr", "wb"); break;
+ case ROM_IBMPS2_M55SX: f = romfopen("nvr/ibmps2_m55sx.nvr", "wb"); break;
+ case ROM_IBMPS2_M80: f = romfopen("nvr/ibmps2_m80.nvr", "wb"); break;
+ case ROM_CMDPC30: f = romfopen("nvr/cmdpc30.nvr", "wb"); break;
+ case ROM_AMI286: f = romfopen("nvr/ami286.nvr", "wb"); break;
+ case ROM_AWARD286: f = romfopen("nvr/award286.nvr", "wb"); break;
+ case ROM_DELL200: f = romfopen("nvr/dell200.nvr", "wb"); break;
+ case ROM_IBMAT386: f = romfopen("nvr/at386.nvr", "wb"); break;
+ case ROM_DESKPRO_386: f = romfopen("nvr/deskpro386.nvr", "wb"); break;
+ case ROM_ACER386: f = romfopen("nvr/acer386.nvr", "wb"); break;
+ case ROM_MEGAPC: f = romfopen("nvr/megapc.nvr", "wb"); break;
+ case ROM_AMI386SX: f = romfopen("nvr/ami386.nvr", "wb"); break;
+ case ROM_AMI486: f = romfopen("nvr/ami486.nvr", "wb"); break;
+ case ROM_WIN486: f = romfopen("nvr/win486.nvr", "wb"); break;
+ case ROM_PCI486: f = romfopen("nvr/hot-433.nvr", "wb"); break;
+ case ROM_SIS496: f = romfopen("nvr/sis496.nvr", "wb"); break;
+ case ROM_430VX: f = romfopen("nvr/430vx.nvr", "wb"); break;
+ case ROM_REVENGE: f = romfopen("nvr/revenge.nvr", "wb"); break;
+ case ROM_ENDEAVOR: f = romfopen("nvr/endeavor.nvr", "wb"); break;
+ case ROM_PX386: f = romfopen("nvr/px386.nvr", "wb"); break;
+ case ROM_DTK386: f = romfopen("nvr/dtk386.nvr", "wb"); break;
+ case ROM_MR386DX_OPTI495: f = romfopen("nvr/mr386dx_opti495.nvr", "wb"); break;
+ case ROM_AMI386DX_OPTI495: f = romfopen("nvr/ami386dx_opti495.nvr", "wb"); break;
default: return;
}
fwrite(nvrram,128,1,f);
fclose(f);
}
-static void *nvr_init()
+void nvr_init()
{
- nvr_t *nvr = (nvr_t *)malloc(sizeof(nvr_t));
- memset(nvr, 0, sizeof(nvr_t));
+ io_sethandler(0x0070, 0x0002, readnvr, NULL, NULL, writenvr, NULL, NULL, NULL);
+ timer_add(nvr_rtc, &rtctime, TIMER_ALWAYS_ENABLED, NULL);
+ timer_add(nvr_onesec, &nvr_onesec_time, TIMER_ALWAYS_ENABLED, NULL);
+ timer_add(nvr_update_end, &nvr_update_end_count, &nvr_update_end_count, NULL);
- io_sethandler(0x0070, 0x0002, readnvr, NULL, NULL, writenvr, NULL, NULL, nvr);
- timer_add(&nvr->rtc_timer, nvr_rtc, nvr, 1);
- timer_add(&nvr->onesec_timer, nvr_onesec, nvr, 1);
- timer_add(&nvr->update_end_timer, nvr_update_end, nvr, 0);
-
- return nvr;
}
-
-static void nvr_close(void *p)
-{
- nvr_t *nvr = (nvr_t *)p;
-
- free(nvr);
-}
-
-device_t nvr_device =
-{
- "Motorola MC146818 RTC",
- 0,
- nvr_init,
- nvr_close,
- NULL,
- nvr_speed_changed,
- NULL,
- NULL,
- NULL
-};
diff --git a/src/nvr.h b/src/nvr.h
index b01d7df..c04289f 100644
--- a/src/nvr.h
+++ b/src/nvr.h
@@ -1,6 +1,4 @@
-#include "device.h"
-
-extern device_t nvr_device;
+void nvr_init();
extern int enable_sync;
@@ -9,8 +7,4 @@ extern int nvr_dosave;
void loadnvr();
void savenvr();
-FILE *nvrfopen(char *fn, char *mode);
-
-extern uint8_t nvrram[128];
-extern int nvrmask;
-extern int oldromset;
+void nvr_recalc();
diff --git a/src/nvr_tc8521.c b/src/nvr_tc8521.c
deleted file mode 100644
index 6396d30..0000000
--- a/src/nvr_tc8521.c
+++ /dev/null
@@ -1,101 +0,0 @@
-#include
-#include "ibm.h"
-#include "io.h"
-#include "nvr.h"
-#include "nvr_tc8521.h"
-#include "rtc_tc8521.h"
-#include "pic.h"
-#include "timer.h"
-#include "rtc.h"
-#include "paths.h"
-#include "config.h"
-#include "nmi.h"
-
-static pc_timer_t nvr_onesec_timer;
-static int nvr_onesec_cnt = 0;
-
-static void tc8521_onesec(void *p)
-{
- nvr_onesec_cnt++;
- if (nvr_onesec_cnt >= 100)
- {
- tc8521_tick();
- nvr_onesec_cnt = 0;
- }
- timer_advance_u64(&nvr_onesec_timer, 10000 * TIMER_USEC);
-}
-
-void write_tc8521(uint16_t addr, uint8_t val, void *priv)
-{
- uint8_t page = nvrram[0x0D] & 3;
-
- addr &= 0x0F;
- if (addr < 0x0D) addr += 16 * page;
-
- if (addr >= 0x10 && nvrram[addr] != val)
- nvr_dosave = 1;
-
- nvrram[addr] = val;
-}
-
-
-uint8_t read_tc8521(uint16_t addr, void *priv)
-{
- uint8_t page = nvrram[0x0D] & 3;
-
- addr &= 0x0F;
- if (addr < 0x0D) addr += 16 * page;
-
- return nvrram[addr];
-}
-
-
-void tc8521_loadnvr()
-{
- FILE *f;
-
- nvrmask=63;
- oldromset=romset;
- switch (romset)
- {
- case ROM_T1000: f = nvrfopen("t1000.nvr", "rb"); break;
- case ROM_T1200: f = nvrfopen("t1200.nvr", "rb"); break;
- default: return;
- }
- if (!f)
- {
- memset(nvrram,0xFF,64);
- nvrram[0x0E] = 0; /* Test register */
- if (!enable_sync)
- {
- memset(nvrram, 0, 16);
- }
- return;
- }
- fread(nvrram,64,1,f);
- if (enable_sync)
- tc8521_internal_sync(nvrram);
- else
- tc8521_internal_set_nvrram(nvrram); /* Update the internal clock state based on the NVR registers. */
- fclose(f);
-}
-
-
-void tc8521_savenvr()
-{
- FILE *f;
- switch (oldromset)
- {
- case ROM_T1000: f = nvrfopen("t1000.nvr", "wb"); break;
- case ROM_T1200: f = nvrfopen("t1200.nvr", "wb"); break;
- default: return;
- }
- fwrite(nvrram,64,1,f);
- fclose(f);
-}
-
-void nvr_tc8521_init()
-{
- io_sethandler(0x2C0, 0x10, read_tc8521, NULL, NULL, write_tc8521, NULL, NULL, NULL);
- timer_add(&nvr_onesec_timer, tc8521_onesec, NULL, 1);
-}
diff --git a/src/nvr_tc8521.h b/src/nvr_tc8521.h
deleted file mode 100644
index c8edce6..0000000
--- a/src/nvr_tc8521.h
+++ /dev/null
@@ -1,12 +0,0 @@
-void nvr_tc8521_init();
-
-extern int enable_sync;
-
-extern int nvr_dosave;
-
-void tc8521_loadnvr();
-void tc8521_savenvr();
-
-void tc8521_nvr_recalc();
-
-FILE *nvrfopen(char *fn, char *mode);
diff --git a/src/opti495.c b/src/opti495.c
index ebf8e2b..1faef5a 100644
--- a/src/opti495.c
+++ b/src/opti495.c
@@ -27,10 +27,15 @@ static void opti495_write(uint16_t addr, uint8_t val, void *p)
}
if (optireg == 0x22)
{
- if (!(val & 0x80))
+ shadowbios = !(val & 0x80);
+ shadowbios_write = val & 0x80;
+ //pclog("shadowbios %i %02x\n", shadowbios, val);
+ if (shadowbios)
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED);
else
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
+// if (shadowbios)
+// fatal("Here\n");
}
}
break;
diff --git a/src/paths.c b/src/paths.c
deleted file mode 100644
index 15d9963..0000000
--- a/src/paths.c
+++ /dev/null
@@ -1,238 +0,0 @@
-#include "paths.h"
-#include "config.h"
-#include
-#include "ibm.h"
-
-#define safe_strncpy(a,b,n) do { strncpy((a),(b),(n)-1); (a)[(n)-1] = 0; } while (0)
-
-char default_roms_paths[4096];
-char default_nvr_path[512];
-char default_configs_path[512];
-char default_logs_path[512];
-char default_screenshots_path[512];
-
-/* the number of roms paths */
-int num_roms_paths;
-char roms_paths[4096];
-/* this is where pcem.cfg is */
-char pcem_path[512];
-/* this is where nvr-files as stored */
-char nvr_path[512];
-/* this is where configs as stored */
-char configs_path[512];
-/* this is where log-files as stored */
-char logs_path[512];
-/* this is where screenshots as stored */
-char screenshots_path[512];
-
-char nvr_default_path[512];
-
-char get_path_separator()
-{
-#ifdef _WIN32
- return ';';
-#else
- return ':';
-#endif
-}
-
-int get_roms_path(int pos, char *s, int size)
-{
- int j, i, z, len;
- char path_separator;
-
- path_separator = get_path_separator();
- len = strlen(roms_paths);
- j = 0;
- for (i = 0; i < len; i++)
- {
- if (roms_paths[i] == path_separator || i == len-1)
- {
- if ((pos--) == 0)
- {
- z = (i-j) + ((i == len-1) ? 1 : 0);
- safe_strncpy(s, roms_paths+j, size);
- s[(size-1 < z) ? size-1 : z] = 0;
- return 1;
- }
- j = i+1;
- }
- }
- return 0;
-}
-
-void set_roms_paths(char *path)
-{
- char s[512];
- int j, i, z, len;
- char path_separator[2];
-
- roms_paths[0] = 0;
- path_separator[0] = get_path_separator();
- path_separator[1] = 0;
- len = strlen(path);
- j = 0;
- num_roms_paths = 0;
- for (i = 0; i < len; i++)
- {
- if (path[i] == path_separator[0] || i == len-1)
- {
- z = (i-j) + ((i == len-1) ? 1 : 0) + 1;
- safe_strncpy(s, path+j, z);
- s[(511 < z) ? 511 : z] = 0;
- append_slash(s, 512);
- if (dir_exists(s))
- {
- if (num_roms_paths > 0)
- strcat(roms_paths, path_separator);
- strcat(roms_paths, s);
- num_roms_paths++;
- }
- j = i+1;
- }
- }
-}
-
-void set_nvr_path(char *s)
-{
- safe_strncpy(nvr_path, s, 512);
- append_slash(nvr_path, 512);
-}
-
-void set_logs_path(char *s)
-{
- safe_strncpy(logs_path, s, 512);
- append_slash(logs_path, 512);
-}
-
-void set_configs_path(char *s)
-{
- safe_strncpy(configs_path, s, 512);
- append_slash(configs_path, 512);
-}
-
-void set_screenshots_path(char *s)
-{
- safe_strncpy(screenshots_path, s, 512);
- append_slash(screenshots_path, 512);
-}
-
-/* set the default roms paths, this makes them permanent */
-void set_default_roms_paths(char *s)
-{
- safe_strncpy(default_roms_paths, s, 4096);
- set_roms_paths(s);
-}
-
-/* set the default nvr path, this makes it permanent */
-void set_default_nvr_path(char *s)
-{
- safe_strncpy(default_nvr_path, s, 512);
- set_nvr_path(s);
-}
-
-static void set_default_nvr_default_path(char *s)
-{
- safe_strncpy(nvr_default_path, s, 512);
-}
-
-/* set the default logs path, this makes it permanent */
-void set_default_logs_path(char *s)
-{
- safe_strncpy(default_logs_path, s, 512);
- set_logs_path(s);
-}
-
-/* set the default configs path, this makes it permanent */
-void set_default_configs_path(char *s)
-{
- safe_strncpy(default_configs_path, s, 512);
- set_configs_path(s);
-}
-
-/* set the default screenshots path, this makes it permanent */
-void set_default_screenshots_path(char *s)
-{
- safe_strncpy(default_screenshots_path, s, 512);
- set_screenshots_path(s);
-}
-
-void paths_loadconfig()
-{
- char *cfg_roms_paths = config_get_string(CFG_GLOBAL, "Paths", "roms_paths", 0);
- char *cfg_nvr_path = config_get_string(CFG_GLOBAL, "Paths", "nvr_path", 0);
- char *cfg_configs_path = config_get_string(CFG_GLOBAL, "Paths", "configs_path", 0);
- char *cfg_logs_path = config_get_string(CFG_GLOBAL, "Paths", "logs_path", 0);
- char *cfg_screenshots_path = config_get_string(CFG_GLOBAL, "Paths", "screenshots_path", 0);
-
- if (cfg_roms_paths)
- safe_strncpy(default_roms_paths, cfg_roms_paths, 4096);
- if (cfg_nvr_path)
- safe_strncpy(default_nvr_path, cfg_nvr_path, 512);
- if (cfg_configs_path)
- safe_strncpy(default_configs_path, cfg_configs_path, 512);
- if (cfg_logs_path)
- safe_strncpy(default_logs_path, cfg_logs_path, 512);
- if (cfg_screenshots_path)
- safe_strncpy(default_screenshots_path, cfg_screenshots_path, 512);
-}
-
-void paths_saveconfig()
-{
- config_set_string(CFG_GLOBAL, "Paths", "roms_paths", default_roms_paths);
- config_set_string(CFG_GLOBAL, "Paths", "nvr_path", default_nvr_path);
- config_set_string(CFG_GLOBAL, "Paths", "configs_path", default_configs_path);
- config_set_string(CFG_GLOBAL, "Paths", "logs_path", default_logs_path);
- config_set_string(CFG_GLOBAL, "Paths", "screenshots_path", default_screenshots_path);
-}
-
-void paths_onconfigloaded()
-{
- if (strlen(default_roms_paths) > 0)
- set_roms_paths(default_roms_paths);
-
- if (strlen(default_nvr_path) > 0)
- set_nvr_path(default_nvr_path);
-
- if (strlen(default_configs_path) > 0)
- set_configs_path(default_configs_path);
-
- if (strlen(default_logs_path) > 0)
- set_logs_path(default_logs_path);
-
- if (strlen(default_screenshots_path) > 0)
- set_screenshots_path(default_screenshots_path);
-
- pclog("path = %s\n", pcem_path);
-}
-
-/* initialize default paths */
-void paths_init()
-{
- char s[512];
- char base_path[512];
- char *p;
-
- get_pcem_path(pcem_path, 512);
- /* pcem_path may be path to executable */
- p=get_filename(pcem_path);
- *p=0;
-
- /* set up default paths for this session */
- append_filename(s, pcem_path, "roms/", 512);
- set_roms_paths(s);
- append_filename(s, pcem_path, "nvr/", 512);
- set_nvr_path(s);
- append_filename(s, pcem_path, "configs/", 512);
- set_configs_path(s);
- append_filename(s, pcem_path, "screenshots/", 512);
- set_screenshots_path(s);
- set_logs_path(pcem_path);
-
- get_pcem_base_path(base_path, 512);
- append_filename(s, base_path, "nvr/default/", 512);
- set_default_nvr_default_path(s);
-
- add_config_callback(paths_loadconfig, paths_saveconfig, paths_onconfigloaded);
-
-}
diff --git a/src/paths.h b/src/paths.h
deleted file mode 100644
index bf18630..0000000
--- a/src/paths.h
+++ /dev/null
@@ -1,29 +0,0 @@
-extern int num_roms_paths;
-extern char pcem_path[512];
-extern char configs_path[512];
-extern char nvr_path[512];
-extern char logs_path[512];
-extern char screenshots_path[512];
-extern char nvr_default_path[512];
-
-void get_pcem_path(char *s, int size);
-void get_pcem_base_path(char *s, int size);
-char get_path_separator();
-void paths_init();
-int dir_exists(char* path);
-
-int get_roms_path(int p, char* s, int size);
-
-/* set the default paths to make them permanent */
-void set_default_roms_paths(char *s);
-void set_default_nvr_path(char *s);
-void set_default_logs_path(char *s);
-void set_default_configs_path(char *s);
-void set_default_screenshots_path(char *s);
-
-/* set the paths temporarily for this session */
-void set_roms_paths(char* path);
-void set_nvr_path(char *s);
-void set_logs_path(char *s);
-void set_configs_path(char *s);
-void set_screenshots_path(char *s);
diff --git a/src/pc.c b/src/pc.c
index dbe1633..2c38c83 100644
--- a/src/pc.c
+++ b/src/pc.c
@@ -1,20 +1,12 @@
#include
#include
#include
-#ifdef __APPLE__
-#include