SarahW
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7e099c277e
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Added basic loop unrolling. Blocks that end in a JMP, LOOP or conditional branch to a previous instruction in the block will be unrolled up to 10 times.
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2019-03-25 19:07:51 +00:00 |
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SarahW
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3f2d9ecf87
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Optimise out redundant uOPs, where the output register is never read.
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2019-02-10 12:32:25 +00:00 |
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SarahW
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095cf53265
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Added segment limit checking to some instructions.
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2019-02-03 17:48:11 +00:00 |
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SarahW
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178c9d5c15
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Don't write back temporary registers if they won't be read again.
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2019-01-16 21:54:10 +00:00 |
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SarahW
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b26432caa8
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When allocating a read register, prioritise registers that will not be used again.
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2018-12-17 19:40:09 +00:00 |
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SarahW
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e8483acea5
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Search through all host integer and FP registers when allocating registers.
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2018-12-17 19:36:54 +00:00 |
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SarahW
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356f406b22
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Fix codegen pointer register reads.
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2018-11-28 18:41:53 +00:00 |
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SarahW
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335cea3ee1
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Added recompiled versions of PUSHF and PUSHFD.
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2018-11-28 15:19:21 +00:00 |
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SarahW
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e012420f90
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Added recompiled versions of CLC, CLD, CLI, CMC, STC, STD and STI.
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2018-11-28 09:58:50 +00:00 |
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SarahW
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c1565eb42f
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Fix partial register handling - removes pointless loads when writing to non-32-bit registers (eg FPU or MMX).
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2018-11-27 19:43:01 +00:00 |
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SarahW
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76115568f2
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Added recompiled versions of MOVD and MOVQ.
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2018-11-21 17:02:20 +00:00 |
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SarahW
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f545d9d57f
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Rename FPU stack-based integer mirror registers, to avoid confusion with non-stack-based MMX registers.
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2018-11-21 12:44:47 +00:00 |
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SarahW
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b814bcc80d
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Added recompiled versions of FSTCW and FSTSW.
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2018-10-25 21:43:32 +01:00 |
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SarahW
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bce9ad4f3d
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Added recompiled versions of FFREE, FLD, FST, FSTP and FXCH.
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2018-10-21 16:22:20 +01:00 |
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SarahW
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6d8af5df4a
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Added recompiled versions of memory variants of F[I]ADD, F[I]DIV, F[I]DIVR, F[I]MUL, F[I]SUB and F[I]SUBR.
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2018-10-20 20:03:28 +01:00 |
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SarahW
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829c74f2d5
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Don't write back unchanged registers on flush + invalidate.
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2018-10-09 14:07:49 +01:00 |
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SarahW
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78996b3e5c
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Added recompiled register versions of FADD, FDIV, FDIVR, FMUL, FSUB and FSUBR.
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2018-10-07 22:02:31 +01:00 |
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SarahW
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f1df9be8f6
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Added recompiled versions of JMP, CALL, RET, PUSH and POP.
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2018-08-05 16:24:15 +01:00 |
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SarahW
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e64271f5bb
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Added recompiled versions of mem->reg, reg->mem and imm->mem versions of ADD, AND, CMP, OR, SUB and XOR.
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2018-07-27 22:24:34 +01:00 |
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SarahW
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f27b7f757a
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Add recompiled versions of mem->reg, reg->mem and imm->mem versions of MOV.
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2018-07-25 20:16:58 +01:00 |
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SarahW
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648aa0e3e8
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Added recompiled versions of 8 and 16 bit immediate->reg and reg->reg versions of MOV, ADD, SUB, CMP, AND, OR and XOR.
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2018-07-17 22:08:25 +01:00 |
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SarahW
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fc27be592c
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Added recompiled versions of immediate->reg and reg->reg versions of MOV, ADD, SUB, CMP, AND, OR and XOR.
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2018-07-08 16:36:11 +01:00 |
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SarahW
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774f4201ee
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Recompiler now handles instruction and cycle counting.
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2018-07-06 17:51:22 +01:00 |
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SarahW
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94fea237b4
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Implemented effective address compilation.
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2018-06-28 22:06:42 +01:00 |
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SarahW
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ee3f9210dc
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Implemented basic register allocation.
Mainly handles 'virtual' registers at the moment (eg current and last PC values, segment override status, etc).
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2018-06-23 19:04:36 +01:00 |
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