SarahW
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c07a3b5311
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Free currently allocated memory blocks on CPU reset. Prevents memory leaks when resetting.
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2019-01-19 18:08:45 +00:00 |
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SarahW
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66fba50e06
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Add new codegen memory allocator. This allows the recompiler to allocate memory from a central pool as required. This central pool is by default 64 MB on x86, x86-64 and ARMv8, and 32 MB on ARMv7.
The current design does not allow for ARMv8 literal pools, therefore these have been removed.
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2019-01-12 15:15:43 +00:00 |
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SarahW
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43b5b83644
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Reduce codeblock_hash table to uint16_t.
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2018-11-30 13:18:56 +00:00 |
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SarahW
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9ff1c7f409
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Further reductions to codeblock_t size - replace link pointers with uint16_t block indicies, shrink ins to uint8_t, remove endpc. codeblock_t now fits in a 64-byte cacheline on 32-bit platforms.
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2018-11-29 20:05:12 +00:00 |
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SarahW
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2007c25177
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Start reducing size of codeblock_t structure.
Re-arrange all variables needed to run a block to fit in a single cache line.
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2018-11-28 20:29:48 +00:00 |
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SarahW
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d63176e472
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Move dynarec code memory out of codeblock structure.
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2018-11-28 18:43:40 +00:00 |
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SarahW
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2a19183d83
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Added debug code to log execution rate of non-recompiled instructions.
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2018-11-24 20:16:52 +00:00 |
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SarahW
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d9e38fe37c
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Fix masking of FPU top-of-stack in several places. Fixes DOS Quake.
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2018-10-09 13:51:05 +01:00 |
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SarahW
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91143d3c68
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Move CPU segment structures into cpu_state structure.
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2018-07-22 12:56:03 +01:00 |
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SarahW
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774f4201ee
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Recompiler now handles instruction and cycle counting.
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2018-07-06 17:51:22 +01:00 |
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SarahW
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ee3f9210dc
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Implemented basic register allocation.
Mainly handles 'virtual' registers at the moment (eg current and last PC values, segment override status, etc).
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2018-06-23 19:04:36 +01:00 |
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SarahW
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03fe25d818
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First stage of dynamic recompiler rewrite.
Basic IR generation calls C implementation of all instructions.
Backend generation implemented for x86, x86-64, ARM and ARM64.
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2018-06-17 20:26:15 +01:00 |
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