SarahW
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25fe224ea9
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Add dynarec optimisation for UOP_MOV_IMM, to avoid register allocation
if the destination register won't be immediately used again.
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2020-11-14 19:33:50 +00:00 |
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SarahW
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8998024225
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Move GPF and early exit routines out of individual code blocks and into the common helper block.
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2019-01-13 12:57:32 +00:00 |
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SarahW
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66fba50e06
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Add new codegen memory allocator. This allows the recompiler to allocate memory from a central pool as required. This central pool is by default 64 MB on x86, x86-64 and ARMv8, and 32 MB on ARMv7.
The current design does not allow for ARMv8 literal pools, therefore these have been removed.
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2019-01-12 15:15:43 +00:00 |
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SarahW
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d63176e472
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Move dynarec code memory out of codeblock structure.
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2018-11-28 18:43:40 +00:00 |
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SarahW
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78996b3e5c
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Added recompiled register versions of FADD, FDIV, FDIVR, FMUL, FSUB and FSUBR.
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2018-10-07 22:02:31 +01:00 |
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SarahW
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03fe25d818
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First stage of dynamic recompiler rewrite.
Basic IR generation calls C implementation of all instructions.
Backend generation implemented for x86, x86-64, ARM and ARM64.
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2018-06-17 20:26:15 +01:00 |
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