Rewrote recompiler implementation of NEG.
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34c0db9c10
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f75a24f539
3 changed files with 73 additions and 20 deletions
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@ -355,7 +355,7 @@ static uint32_t ropXOR_EAX_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32
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static uint32_t ropF6(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
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{
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x86seg *target_seg;
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int host_reg, imm_reg;
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int host_reg;
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uint8_t imm;
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switch (fetchdat & 0x38)
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@ -391,14 +391,13 @@ static uint32_t ropF6(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_
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case 0x18: /*NEG b*/
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if ((fetchdat & 0xc0) != 0xc0)
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return 0;
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imm_reg = LOAD_REG_IMM(0);
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STORE_IMM_ADDR_L((uintptr_t)&flags_op, FLAGS_SUB8);
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host_reg = LOAD_REG_B(fetchdat & 7);
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STORE_HOST_REG_ADDR_BL((uintptr_t)&flags_op1, imm_reg);
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SUB_HOST_REG_B(imm_reg, host_reg);
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STORE_HOST_REG_ADDR_BL((uintptr_t)&flags_op2, host_reg);
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STORE_REG_TARGET_B_RELEASE(imm_reg, fetchdat & 7);
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STORE_HOST_REG_ADDR_BL((uintptr_t)&flags_res, imm_reg);
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NEG_HOST_REG_B(host_reg);
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STORE_IMM_ADDR_L((uintptr_t)&flags_op1, 0);
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STORE_REG_B_RELEASE(host_reg);
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STORE_HOST_REG_ADDR_BL((uintptr_t)&flags_res, host_reg);
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return op_pc + 1;
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}
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@ -407,7 +406,7 @@ static uint32_t ropF6(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_
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static uint32_t ropF7_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
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{
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x86seg *target_seg;
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int host_reg, imm_reg;
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int host_reg;
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uint16_t imm;
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switch (fetchdat & 0x38)
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@ -443,14 +442,13 @@ static uint32_t ropF7_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint3
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case 0x18: /*NEG w*/
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if ((fetchdat & 0xc0) != 0xc0)
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return 0;
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imm_reg = LOAD_REG_IMM(0);
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STORE_IMM_ADDR_L((uintptr_t)&flags_op, FLAGS_SUB16);
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host_reg = LOAD_REG_W(fetchdat & 7);
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STORE_HOST_REG_ADDR_WL((uintptr_t)&flags_op1, imm_reg);
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SUB_HOST_REG_W(imm_reg, host_reg);
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STORE_HOST_REG_ADDR_WL((uintptr_t)&flags_op2, host_reg);
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STORE_REG_TARGET_W_RELEASE(imm_reg, fetchdat & 7);
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STORE_HOST_REG_ADDR_WL((uintptr_t)&flags_res, imm_reg);
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NEG_HOST_REG_W(host_reg);
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STORE_IMM_ADDR_L((uintptr_t)&flags_op1, 0);
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STORE_REG_W_RELEASE(host_reg);
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STORE_HOST_REG_ADDR_WL((uintptr_t)&flags_res, host_reg);
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return op_pc + 1;
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}
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@ -459,7 +457,7 @@ static uint32_t ropF7_w(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint3
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static uint32_t ropF7_l(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block)
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{
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x86seg *target_seg;
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int host_reg, imm_reg;
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int host_reg;
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uint32_t imm;
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switch (fetchdat & 0x38)
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@ -495,14 +493,13 @@ static uint32_t ropF7_l(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint3
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case 0x18: /*NEG l*/
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if ((fetchdat & 0xc0) != 0xc0)
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return 0;
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imm_reg = LOAD_REG_IMM(0);
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STORE_IMM_ADDR_L((uintptr_t)&flags_op, FLAGS_SUB32);
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host_reg = LOAD_REG_L(fetchdat & 7);
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STORE_HOST_REG_ADDR((uintptr_t)&flags_op1, imm_reg);
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SUB_HOST_REG_L(imm_reg, host_reg);
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STORE_HOST_REG_ADDR((uintptr_t)&flags_op2, host_reg);
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STORE_REG_TARGET_L_RELEASE(imm_reg, fetchdat & 7);
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STORE_HOST_REG_ADDR((uintptr_t)&flags_res, imm_reg);
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NEG_HOST_REG_L(host_reg);
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STORE_IMM_ADDR_L((uintptr_t)&flags_op1, 0);
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STORE_REG_L_RELEASE(host_reg);
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STORE_HOST_REG_ADDR((uintptr_t)&flags_res, host_reg);
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return op_pc + 1;
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}
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