Added code generation for :

- FCOM/FUCOM
- FSUBR/FSUBRP/FDIVR/FDIVRP
- FLDCW/FSTCW
- FILD/FIST/FISTP (16-bit, 32-bit and 64-bit variants)
- FLD/FST/FSTP double precision
- Integer and double precision variants of FADD/FSUB/FMUL/FDIV
Also added 64-bit readmemq/writememq functions.
This commit is contained in:
TomW 2015-06-13 16:14:35 +01:00
commit f3607c2308
11 changed files with 1398 additions and 241 deletions

View file

@ -94,12 +94,10 @@ static int opMOVQ_q_mm_a16(uint32_t fetchdat)
}
else
{
uint32_t dst[2];
uint64_t dst;
dst[0] = readmeml(easeg, eaaddr);
dst[1] = readmeml(easeg, eaaddr + 4); if (abrt) return 1;
MM[reg].l[0] = dst[0];
MM[reg].l[1] = dst[1];
dst = readmemq(easeg, eaaddr); if (abrt) return 1;
MM[reg].q = dst;
CLOCK_CYCLES(2);
}
return 0;
@ -116,12 +114,10 @@ static int opMOVQ_q_mm_a32(uint32_t fetchdat)
}
else
{
uint32_t dst[2];
uint64_t dst;
dst[0] = readmeml(easeg, eaaddr);
dst[1] = readmeml(easeg, eaaddr + 4); if (abrt) return 1;
MM[reg].l[0] = dst[0];
MM[reg].l[1] = dst[1];
dst = readmemq(easeg, eaaddr); if (abrt) return 1;
MM[reg].q = dst;
CLOCK_CYCLES(2);
}
return 0;
@ -140,9 +136,7 @@ static int opMOVQ_mm_q_a16(uint32_t fetchdat)
else
{
CHECK_WRITE(ea_seg, eaaddr, eaaddr + 7);
writememl(easeg, eaaddr, MM[reg].l[0]);
writememl(easeg, eaaddr + 4, MM[reg].l[1]); if (abrt) return 1;
CLOCK_CYCLES(2);
writememq(easeg, eaaddr, MM[reg].l[0]);
}
return 0;
}
@ -159,9 +153,7 @@ static int opMOVQ_mm_q_a32(uint32_t fetchdat)
else
{
CHECK_WRITE(ea_seg, eaaddr, eaaddr + 7);
writememl(easeg, eaaddr, MM[reg].l[0]);
writememl(easeg, eaaddr + 4, MM[reg].l[1]); if (abrt) return 1;
CLOCK_CYCLES(2);
writememq(easeg, eaaddr, MM[reg].q);
}
return 0;
}