Added code generation for :
- FCOM/FUCOM - FSUBR/FSUBRP/FDIVR/FDIVRP - FLDCW/FSTCW - FILD/FIST/FISTP (16-bit, 32-bit and 64-bit variants) - FLD/FST/FSTP double precision - Integer and double precision variants of FADD/FSUB/FMUL/FDIV Also added 64-bit readmemq/writememq functions.
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11 changed files with 1398 additions and 241 deletions
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@ -23,6 +23,7 @@
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int codegen_flags_changed = 0;
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int codegen_fpu_entered = 0;
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int codegen_fpu_loaded_iq[8];
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x86seg *op_ea_seg;
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int op_ssegs;
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uint32_t op_old_pc;
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@ -257,6 +258,9 @@ void codegen_block_init(uint32_t phys_addr)
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codegen_flags_changed = 0;
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codegen_fpu_entered = 0;
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codegen_fpu_loaded_iq[0] = codegen_fpu_loaded_iq[1] = codegen_fpu_loaded_iq[2] = codegen_fpu_loaded_iq[3] =
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codegen_fpu_loaded_iq[4] = codegen_fpu_loaded_iq[5] = codegen_fpu_loaded_iq[6] = codegen_fpu_loaded_iq[7] = 0;
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}
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void codegen_block_remove()
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@ -771,7 +775,7 @@ void codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t
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break;
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case 0xda:
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_da_a32 : x86_dynarec_opcodes_da_a16;
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recomp_op_table = NULL;
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recomp_op_table = recomp_opcodes_da;
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opcode_mask = 0xff;
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over = 1;
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pc_off = -1;
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