Added recompiled versions of JMP, CALL, RET, PUSH and POP.
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33 changed files with 1062 additions and 102 deletions
207
src/codegen_ops_stack.c
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207
src/codegen_ops_stack.c
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#include "ibm.h"
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#include "x86.h"
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#include "386_common.h"
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#include "codegen.h"
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#include "codegen_ir.h"
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#include "codegen_ops.h"
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#include "codegen_ops_helpers.h"
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#include "codegen_ops_misc.h"
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uint32_t ropPUSH_r16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int sp_reg;
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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sp_reg = LOAD_SP_WITH_OFFSET(ir, -2);
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uop_MEM_STORE_REG(ir, IREG_SS_base, sp_reg, IREG_16(opcode & 7));
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SUB_SP(ir, 2);
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return op_pc;
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}
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uint32_t ropPUSH_r32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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int sp_reg;
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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sp_reg = LOAD_SP_WITH_OFFSET(ir, -4);
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uop_MEM_STORE_REG(ir, IREG_SS_base, sp_reg, IREG_32(opcode & 7));
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SUB_SP(ir, 4);
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return op_pc;
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}
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uint32_t ropPOP_r16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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if (stack32)
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uop_MEM_LOAD_REG(ir, IREG_16(opcode & 7), IREG_SS_base, IREG_ESP);
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else
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{
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uop_MOVZX(ir, IREG_eaaddr, IREG_SP);
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uop_MEM_LOAD_REG(ir, IREG_16(opcode & 7), IREG_SS_base, IREG_eaaddr);
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}
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if ((opcode & 7) != REG_SP)
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ADD_SP(ir, 2);
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return op_pc;
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}
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uint32_t ropPOP_r32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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if (stack32)
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uop_MEM_LOAD_REG(ir, IREG_32(opcode & 7), IREG_SS_base, IREG_ESP);
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else
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{
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uop_MOVZX(ir, IREG_eaaddr, IREG_SP);
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uop_MEM_LOAD_REG(ir, IREG_32(opcode & 7), IREG_SS_base, IREG_eaaddr);
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}
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if ((opcode & 7) != REG_ESP)
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ADD_SP(ir, 4);
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return op_pc;
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}
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uint32_t ropPOP_W(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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if ((fetchdat & 0xc0) == 0xc0)
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{
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if (stack32)
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uop_MEM_LOAD_REG(ir, IREG_16(fetchdat & 7), IREG_SS_base, IREG_ESP);
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else
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{
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uop_MOVZX(ir, IREG_eaaddr, IREG_SP);
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uop_MEM_LOAD_REG(ir, IREG_16(fetchdat & 7), IREG_SS_base, IREG_eaaddr);
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}
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}
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else
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{
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x86seg *target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 2);
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codegen_check_seg_write(block, ir, target_seg);
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if (stack32)
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uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_ESP);
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else
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{
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uop_MOVZX(ir, IREG_temp0, IREG_SP);
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uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_temp0);
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}
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uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0_W);
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}
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if ((fetchdat & 0xc7) != (0xc0 | REG_SP))
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ADD_SP(ir, 2);
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return op_pc + 1;
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}
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uint32_t ropPOP_L(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc)
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{
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc);
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if ((fetchdat & 0xc0) == 0xc0)
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{
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if (stack32)
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uop_MEM_LOAD_REG(ir, IREG_32(fetchdat & 7), IREG_SS_base, IREG_ESP);
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else
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{
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uop_MOVZX(ir, IREG_eaaddr, IREG_SP);
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uop_MEM_LOAD_REG(ir, IREG_32(fetchdat & 7), IREG_SS_base, IREG_eaaddr);
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}
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}
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else
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{
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x86seg *target_seg = codegen_generate_ea(ir, op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32, 4);
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codegen_check_seg_write(block, ir, target_seg);
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if (stack32)
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uop_MEM_LOAD_REG(ir, IREG_temp0, IREG_SS_base, IREG_ESP);
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else
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{
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uop_MOVZX(ir, IREG_temp0, IREG_SP);
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uop_MEM_LOAD_REG(ir, IREG_temp0, IREG_SS_base, IREG_temp0);
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}
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uop_MEM_STORE_REG(ir, ireg_seg_base(target_seg), IREG_eaaddr, IREG_temp0);
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}
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if ((fetchdat & 0xc7) != (0xc0 | REG_ESP))
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ADD_SP(ir, 4);
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return op_pc + 1;
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}
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#define ROP_PUSH_SEG(seg) \
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uint32_t ropPUSH_ ## seg ## _16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
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{ \
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int sp_reg; \
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\
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
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sp_reg = LOAD_SP_WITH_OFFSET(ir, -2); \
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uop_MEM_STORE_REG(ir, IREG_SS_base, sp_reg, IREG_ ## seg ## _seg_W); \
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SUB_SP(ir, 2); \
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\
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return op_pc; \
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} \
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uint32_t ropPUSH_ ## seg ## _32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
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{ \
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int sp_reg; \
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\
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
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sp_reg = LOAD_SP_WITH_OFFSET(ir, -4); \
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uop_MOVZX(ir, IREG_temp0, IREG_ ## seg ## _seg_W); \
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uop_MEM_STORE_REG(ir, IREG_SS_base, sp_reg, IREG_temp0); \
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SUB_SP(ir, 4); \
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\
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return op_pc; \
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}
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#define ROP_POP_SEG(seg, rseg) \
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uint32_t ropPOP_ ## seg ## _16(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
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{ \
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
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\
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if (stack32) \
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uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_ESP); \
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else \
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{ \
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uop_MOVZX(ir, IREG_eaaddr, IREG_SP); \
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uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_eaaddr); \
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} \
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uop_LOAD_SEG(ir, &rseg, IREG_temp0_W); \
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ADD_SP(ir, 2); \
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\
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return op_pc; \
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} \
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uint32_t ropPOP_ ## seg ## _32(codeblock_t *block, ir_data_t *ir, uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc) \
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{ \
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uop_MOV_IMM(ir, IREG_oldpc, cpu_state.oldpc); \
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\
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if (stack32) \
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uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_ESP); \
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else \
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{ \
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uop_MOVZX(ir, IREG_eaaddr, IREG_SP); \
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uop_MEM_LOAD_REG(ir, IREG_temp0_W, IREG_SS_base, IREG_eaaddr); \
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} \
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uop_LOAD_SEG(ir, &rseg, IREG_temp0_W); \
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ADD_SP(ir, 4); \
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\
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return op_pc; \
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}
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ROP_PUSH_SEG(CS)
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ROP_PUSH_SEG(DS)
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ROP_PUSH_SEG(ES)
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ROP_PUSH_SEG(FS)
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ROP_PUSH_SEG(GS)
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ROP_PUSH_SEG(SS)
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ROP_POP_SEG(DS, cpu_state.seg_ds)
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ROP_POP_SEG(ES, cpu_state.seg_es)
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ROP_POP_SEG(FS, cpu_state.seg_fs)
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ROP_POP_SEG(GS, cpu_state.seg_gs)
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