From cb6422b32458b5effac3a3ee5aec7f8177fe3b01 Mon Sep 17 00:00:00 2001 From: SarahW Date: Sat, 18 May 2019 14:05:30 +0100 Subject: [PATCH] MMX fixes : - Initialise x87 tags correctly in recompiler - EMMS/FEMMS now respect cr0 TS bit - FRSTOR now doesn't force all non-uint64 tags to valid Fixes Heaven 7 with AudioPCI --- src/codegen_backend_arm64_uops.c | 5 +++-- src/codegen_backend_arm_uops.c | 3 ++- src/codegen_backend_x86-64_uops.c | 4 ++-- src/codegen_backend_x86_uops.c | 4 ++-- src/x86_ops_3dnow.h | 2 +- src/x86_ops_mmx.h | 2 +- src/x87_ops.h | 2 +- 7 files changed, 12 insertions(+), 10 deletions(-) diff --git a/src/codegen_backend_arm64_uops.c b/src/codegen_backend_arm64_uops.c index 0cad9bb..73623f0 100644 --- a/src/codegen_backend_arm64_uops.c +++ b/src/codegen_backend_arm64_uops.c @@ -839,8 +839,9 @@ static int codegen_MMX_ENTER(codeblock_t *block, uop_t *uop) host_arm64_branch_set_offset(branch_ptr, &block->data[block_pos]); - host_arm64_STR_IMM_W(block, REG_WZR, REG_CPUSTATE, (uintptr_t)&cpu_state.tag[0] - (uintptr_t)&cpu_state); - host_arm64_STR_IMM_W(block, REG_WZR, REG_CPUSTATE, (uintptr_t)&cpu_state.tag[4] - (uintptr_t)&cpu_state); + host_arm64_mov_imm(block, REG_TEMP, 0x01010101); + host_arm64_STR_IMM_W(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.tag[0] - (uintptr_t)&cpu_state); + host_arm64_STR_IMM_W(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.tag[4] - (uintptr_t)&cpu_state); host_arm64_STR_IMM_W(block, REG_WZR, REG_CPUSTATE, (uintptr_t)&cpu_state.TOP - (uintptr_t)&cpu_state); host_arm64_STRB_IMM(block, REG_WZR, REG_CPUSTATE, (uintptr_t)&cpu_state.ismmx - (uintptr_t)&cpu_state); diff --git a/src/codegen_backend_arm_uops.c b/src/codegen_backend_arm_uops.c index 12c2eb9..19706cd 100644 --- a/src/codegen_backend_arm_uops.c +++ b/src/codegen_backend_arm_uops.c @@ -910,9 +910,10 @@ static int codegen_MMX_ENTER(codeblock_t *block, uop_t *uop) *branch_ptr |= ((((uintptr_t)&block_write_data[block_pos] - (uintptr_t)branch_ptr) - 8) & 0x3fffffc) >> 2; - host_arm_MOV_IMM(block, REG_TEMP, 0); + host_arm_MOV_IMM(block, REG_TEMP, 0x01010101); host_arm_STR_IMM(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.tag[0] - (uintptr_t)&cpu_state); host_arm_STR_IMM(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.tag[4] - (uintptr_t)&cpu_state); + host_arm_MOV_IMM(block, REG_TEMP, 0); host_arm_STR_IMM(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.TOP - (uintptr_t)&cpu_state); host_arm_STRB_IMM(block, REG_TEMP, REG_CPUSTATE, (uintptr_t)&cpu_state.ismmx - (uintptr_t)&cpu_state); diff --git a/src/codegen_backend_x86-64_uops.c b/src/codegen_backend_x86-64_uops.c index 729e4fd..596f262 100644 --- a/src/codegen_backend_x86-64_uops.c +++ b/src/codegen_backend_x86-64_uops.c @@ -826,8 +826,8 @@ static int codegen_MMX_ENTER(codeblock_t *block, uop_t *uop) host_x86_CALL(block, x86_int); host_x86_JMP(block, codegen_exit_rout); *branch_offset = (uint32_t)((uintptr_t)&block_write_data[block_pos] - (uintptr_t)branch_offset) - 4; - host_x86_MOV32_ABS_IMM(block, &cpu_state.tag[0], 0); - host_x86_MOV32_ABS_IMM(block, &cpu_state.tag[4], 0); + host_x86_MOV32_ABS_IMM(block, &cpu_state.tag[0], 0x01010101); + host_x86_MOV32_ABS_IMM(block, &cpu_state.tag[4], 0x01010101); host_x86_MOV32_ABS_IMM(block, &cpu_state.TOP, 0); host_x86_MOV8_ABS_IMM(block, &cpu_state.ismmx, 1); diff --git a/src/codegen_backend_x86_uops.c b/src/codegen_backend_x86_uops.c index 8690266..0acf07c 100644 --- a/src/codegen_backend_x86_uops.c +++ b/src/codegen_backend_x86_uops.c @@ -827,8 +827,8 @@ static int codegen_MMX_ENTER(codeblock_t *block, uop_t *uop) host_x86_CALL(block, x86_int); host_x86_JMP(block, codegen_exit_rout); *branch_offset = (uint32_t)((uintptr_t)&block_write_data[block_pos] - (uintptr_t)branch_offset) - 4; - host_x86_MOV32_ABS_IMM(block, &cpu_state.tag[0], 0); - host_x86_MOV32_ABS_IMM(block, &cpu_state.tag[4], 0); + host_x86_MOV32_ABS_IMM(block, &cpu_state.tag[0], 0x01010101); + host_x86_MOV32_ABS_IMM(block, &cpu_state.tag[4], 0x01010101); host_x86_MOV32_ABS_IMM(block, &cpu_state.TOP, 0); host_x86_MOV8_ABS_IMM(block, &cpu_state.ismmx, 1); diff --git a/src/x86_ops_3dnow.h b/src/x86_ops_3dnow.h index 9f852d5..3ac36cb 100644 --- a/src/x86_ops_3dnow.h +++ b/src/x86_ops_3dnow.h @@ -20,7 +20,7 @@ static int opPREFETCH_a32(uint32_t fetchdat) static int opFEMMS(uint32_t fetchdat) { ILLEGAL_ON(!cpu_has_feature(CPU_FEATURE_MMX)); - if (cr0 & 4) + if (cr0 & 0xc) { x86_int(7); return 1; diff --git a/src/x86_ops_mmx.h b/src/x86_ops_mmx.h index 95ed658..712d185 100644 --- a/src/x86_ops_mmx.h +++ b/src/x86_ops_mmx.h @@ -38,7 +38,7 @@ static int opEMMS(uint32_t fetchdat) x86illegal(); return 1; } - if (cr0 & 4) + if (cr0 & 0xc) { x86_int(7); return 1; diff --git a/src/x87_ops.h b/src/x87_ops.h index 315c17d..2ccd7b8 100644 --- a/src/x87_ops.h +++ b/src/x87_ops.h @@ -187,7 +187,7 @@ static inline void x87_ld_frstor(int reg) } else { - cpu_state.tag[reg] = TAG_VALID; + cpu_state.tag[reg] &= ~TAG_UINT64; cpu_state.ST[reg] = x87_ld80(); } }