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Moved integer registers, PC and flags_* variables into new cpu_state structure. Reduces recompiled code size slightly, small speedup (1-3%).

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This commit is contained in:
SarahW 2016-04-20 21:39:41 +01:00
commit c81a91fd72
52 changed files with 1494 additions and 1408 deletions
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26
src/x86_ops_pmode.h
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@ -8,9 +8,9 @@ static int opARPL_a16(uint32_t fetchdat)
temp_seg = geteaw(); if (abrt) return 1;
flags_rebuild();
if ((temp_seg & 3) < (regs[reg].w & 3))
if ((temp_seg & 3) < (cpu_state.regs[reg].w & 3))
{
temp_seg = (temp_seg & 0xfffc) | (regs[reg].w & 3);
temp_seg = (temp_seg & 0xfffc) | (cpu_state.regs[reg].w & 3);
seteaw(temp_seg); if (abrt) return 1;
flags |= Z_FLAG;
}
@ -30,9 +30,9 @@ static int opARPL_a32(uint32_t fetchdat)
temp_seg = geteaw(); if (abrt) return 1;
flags_rebuild();
if ((temp_seg & 3) < (regs[reg].w & 3))
if ((temp_seg & 3) < (cpu_state.regs[reg].w & 3))
{
temp_seg = (temp_seg & 0xfffc) | (regs[reg].w & 3);
temp_seg = (temp_seg & 0xfffc) | (cpu_state.regs[reg].w & 3);
seteaw(temp_seg); if (abrt) return 1;
flags |= Z_FLAG;
}
@ -78,9 +78,9 @@ static int opARPL_a32(uint32_t fetchdat)
flags |= Z_FLAG; \
cpl_override = 1; \
if (is32) \
regs[reg].l = readmeml(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7) + 4) & 0xffff00; \
cpu_state.regs[reg].l = readmeml(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7) + 4) & 0xffff00; \
else \
regs[reg].w = readmemw(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7) + 4) & 0xff00; \
cpu_state.regs[reg].w = readmemw(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7) + 4) & 0xff00; \
cpl_override = 0; \
} \
CLOCK_CYCLES(11); \
@ -126,16 +126,16 @@ opLAR(l_a32, fetch_ea_32, 1)
cpl_override = 1; \
if (is32) \
{ \
regs[reg].l = readmemw(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7)); \
regs[reg].l |= (readmemb(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7) + 6) & 0xF) << 16; \
cpu_state.regs[reg].l = readmemw(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7)); \
cpu_state.regs[reg].l |= (readmemb(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7) + 6) & 0xF) << 16; \
if (readmemb(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7) + 6) & 0x80) \
{ \
regs[reg].l <<= 12; \
regs[reg].l |= 0xFFF; \
cpu_state.regs[reg].l <<= 12; \
cpu_state.regs[reg].l |= 0xFFF; \
} \
} \
else \
regs[reg].w = readmemw(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7)); \
cpu_state.regs[reg].w = readmemw(0, ((sel & 4) ? ldt.base : gdt.base) + (sel & ~7)); \
cpl_override = 0; \
} \
CLOCK_CYCLES(10); \
@ -255,7 +255,7 @@ static int op0F00_common(uint32_t fetchdat)
default:
pclog("Bad 0F 00 opcode %02X\n", rmdat & 0x38);
pc -= 3;
cpu_state.pc -= 3;
x86illegal();
break;
}
@ -368,7 +368,7 @@ static int op0F01_common(uint32_t fetchdat, int is32, int is286)
default:
pclog("Bad 0F 01 opcode %02X\n", rmdat & 0x38);
pc -= 3;
cpu_state.pc -= 3;
x86illegal();
break;
}