Moved integer registers, PC and flags_* variables into new cpu_state structure. Reduces recompiled code size slightly, small speedup (1-3%).
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1fe6233d4c
commit
c81a91fd72
52 changed files with 1494 additions and 1408 deletions
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@ -204,7 +204,7 @@ void codegen_block_init(uint32_t phys_addr)
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page_t *page = &pages[phys_addr >> 12];
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if (!page->block)
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mem_flush_write_page(phys_addr, cs+pc);
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mem_flush_write_page(phys_addr, cs+cpu_state.pc);
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block_current = (block_current + 1) & BLOCK_MASK;
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block = &codeblock[block_current];
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@ -220,7 +220,7 @@ void codegen_block_init(uint32_t phys_addr)
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block_num = HASH(phys_addr);
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codeblock_hash[block_num] = &codeblock[block_current];
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block->ins = 0;
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block->pc = cs + pc;
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block->pc = cs + cpu_state.pc;
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block->_cs = cs;
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block->pnt = block_current;
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block->phys = phys_addr;
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@ -531,7 +531,7 @@ void codegen_debug()
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{
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if (output)
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{
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pclog("At %04x(%08x):%04x %04x(%08x):%04x es=%08x EAX=%08x BX=%04x ECX=%08x BP=%04x EDX=%08x EDI=%08x\n", CS, cs, pc, SS, ss, ESP, es,EAX, BX,ECX,BP, EDX,EDI);
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pclog("At %04x(%08x):%04x %04x(%08x):%04x es=%08x EAX=%08x BX=%04x ECX=%08x BP=%04x EDX=%08x EDI=%08x\n", CS, cs, cpu_state.pc, SS, ss, ESP, es,EAX, BX,ECX,BP, EDX,EDI);
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}
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}
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@ -611,8 +611,9 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat,
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}
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else
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{
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addbyte(0xa1); /*MOVL regs[sib&7].l, %eax*/
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addlong((uint32_t)®s[sib & 7].l);
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addbyte(0x8b); /*MOVL regs[sib&7].l, %eax*/
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addbyte(0x45);
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addbyte((uintptr_t)&cpu_state.regs[sib & 7].l - (uintptr_t)&cpu_state);
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}
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break;
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case 1:
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@ -620,8 +621,8 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat,
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addbyte(0xb8); /*MOVL new_eaaddr, %eax*/
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addlong(new_eaaddr);
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addbyte(0x03); /*ADDL regs[sib&7].l, %eax*/
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addbyte(0x05);
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addlong((uint32_t)®s[sib & 7].l);
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addbyte(0x45);
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addbyte((uintptr_t)&cpu_state.regs[sib & 7].l - (uintptr_t)&cpu_state);
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(*op_pc)++;
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break;
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case 2:
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@ -629,8 +630,8 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat,
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addbyte(0xb8); /*MOVL new_eaaddr, %eax*/
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addlong(new_eaaddr);
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addbyte(0x03); /*ADDL regs[sib&7].l, %eax*/
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addbyte(0x05);
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addlong((uint32_t)®s[sib & 7].l);
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addbyte(0x45);
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addbyte((uintptr_t)&cpu_state.regs[sib & 7].l - (uintptr_t)&cpu_state);
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(*op_pc) += 4;
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break;
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}
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@ -647,21 +648,21 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat,
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{
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case 0:
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addbyte(0x03); /*ADDL regs[sib&7].l, %eax*/
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addbyte(0x05);
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addlong((uint32_t)®s[(sib >> 3) & 7].l);
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addbyte(0x45);
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addbyte((uintptr_t)&cpu_state.regs[(sib >> 3) & 7].l - (uintptr_t)&cpu_state);
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break;
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case 1:
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addbyte(0x8B); addbyte(0x1D); addlong((uint32_t)®s[(sib >> 3) & 7].l); /*MOVL armregs[RD],%ebx*/
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addbyte(0x8B); addbyte(0x5D); addbyte((uintptr_t)&cpu_state.regs[(sib >> 3) & 7].l - (uintptr_t)&cpu_state); /*MOVL armregs[RD],%ebx*/
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addbyte(0x01); addbyte(0xD8); /*ADDL %ebx,%eax*/
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addbyte(0x01); addbyte(0xD8); /*ADDL %ebx,%eax*/
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break;
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case 2:
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addbyte(0x8B); addbyte(0x1D); addlong((uint32_t)®s[(sib >> 3) & 7].l); /*MOVL armregs[RD],%ebx*/
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addbyte(0x8B); addbyte(0x5D); addbyte((uintptr_t)&cpu_state.regs[(sib >> 3) & 7].l - (uintptr_t)&cpu_state); /*MOVL armregs[RD],%ebx*/
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addbyte(0xC1); addbyte(0xE3); addbyte(2); /*SHL $2,%ebx*/
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addbyte(0x01); addbyte(0xD8); /*ADDL %ebx,%eax*/
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break;
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case 3:
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addbyte(0x8B); addbyte(0x1D); addlong((uint32_t)®s[(sib >> 3) & 7].l); /*MOVL armregs[RD],%ebx*/
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addbyte(0x8B); addbyte(0x5D); addbyte((uintptr_t)&cpu_state.regs[(sib >> 3) & 7].l - (uintptr_t)&cpu_state); /*MOVL armregs[RD],%ebx*/
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addbyte(0xC1); addbyte(0xE3); addbyte(3); /*SHL $2,%ebx*/
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addbyte(0x01); addbyte(0xD8); /*ADDL %ebx,%eax*/
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break;
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@ -682,9 +683,12 @@ static x86seg *codegen_generate_ea_32_long(x86seg *op_ea_seg, uint32_t fetchdat,
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(*op_pc) += 4;
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return op_ea_seg;
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}
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addbyte(0xa1); /*MOVL regs[rm].l, %eax*/
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addlong((uint32_t)®s[rm].l);
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eaaddr = regs[rm].l;
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addbyte(0x8b); /*MOVL regs[sib&7].l, %eax*/
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addbyte(0x45);
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addbyte((uintptr_t)&cpu_state.regs[rm].l - (uintptr_t)&cpu_state);
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// addbyte(0xa1); /*MOVL regs[rm].l, %eax*/
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// addlong((uint32_t)&cpu_state.regs[rm].l);
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eaaddr = cpu_state.regs[rm].l;
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if (mod)
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{
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if (rm == 5 && !op_ssegs)
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@ -905,12 +909,12 @@ generate_call:
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if (new_pc)
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{
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if (new_pc != -1)
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STORE_IMM_ADDR_L((uintptr_t)&pc, new_pc);
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STORE_IMM_ADDR_L((uintptr_t)&cpu_state.pc, new_pc);
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codegen_block_ins++;
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block->ins++;
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codegen_block_full_ins++;
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codegen_endpc = (cs + pc) + 8;
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codegen_endpc = (cs + cpu_state.pc) + 8;
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return;
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}
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@ -981,11 +985,11 @@ generate_call:
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addlong((uint32_t)op_ea_seg);
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// }
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addbyte(0xC7); /*MOVL $new_pc,(pc)*/
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addbyte(0x05);
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addlong((uint32_t)&pc);
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addbyte(0xC7); /*MOVL pc,new_pc*/
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addbyte(0x45);
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addbyte((uintptr_t)&cpu_state.pc - (uintptr_t)&cpu_state);
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addlong(op_pc + pc_off);
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addbyte(0xC7); /*MOVL $old_pc,(oldpc)*/
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addbyte(0x05);
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addlong((uint32_t)&oldpc);
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@ -1019,15 +1023,15 @@ generate_call:
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// addbyte(0xE8); /*CALL*/
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// addlong(((uint8_t *)codegen_debug - (uint8_t *)(&block->data[block_pos + 4])));
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codegen_endpc = (cs + pc) + 8;
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codegen_endpc = (cs + cpu_state.pc) + 8;
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}
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void codegen_check_abrt()
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{
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codeblock_t *block = &codeblock[block_current];
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// pclog("Generate check abrt at %08X\n", &codeblock[block_current][block_pos]);
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addbyte(0xf7); addbyte(0x05); /*TESTL $-1, (abrt)*/
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addlong((uint32_t)&abrt); addlong(0xffffffff);
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addbyte(0x83); addbyte(0x3d); /*CMP abrt, 0*/
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addlong((uint32_t)&abrt); addbyte(0);
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addbyte(0x0F); addbyte(0x85); /*JNZ 0*/
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addlong((uint32_t)&block->data[BLOCK_EXIT_OFFSET] - (uint32_t)(&block->data[block_pos + 4]));
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}
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