diff --git a/src/codegen_ops_logic.h b/src/codegen_ops_logic.h
index 6aaa15d..1f6ca8e 100644
--- a/src/codegen_ops_logic.h
+++ b/src/codegen_ops_logic.h
@@ -57,12 +57,20 @@
         {                                                                                                                               \
                 int src_reg, dst_reg;                                                                                                   \
                                                                                                                                         \
-                if ((fetchdat & 0xc0) != 0xc0)                                                                                          \
-                        return 0;                                                                                                       \
+                if ((fetchdat & 0xc0) == 0xc0)                                                                                          \
+                {                                                                                                                       \
+                        src_reg = LOAD_REG_B(fetchdat & 7);                                                                             \
+                }                                                                                                                       \
+                else                                                                                                                    \
+                {                                                                                                                       \
+                        x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);                                    \
+                        STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc);                                                                 \
+                        MEM_LOAD_ADDR_EA_B(target_seg);                                                                                 \
+                        src_reg = 0;                                                                                                    \
+                }                                                                                                                       \
                                                                                                                                         \
                 dst_reg = LOAD_REG_B((fetchdat >> 3) & 7);                                                                              \
                 STORE_IMM_ADDR_L((uint32_t)&flags_op, FLAGS_ZN8);                                                                       \
-                src_reg = LOAD_REG_B(fetchdat & 7);                                                                                     \
                 op ## _HOST_REG_B(dst_reg, src_reg);                                                                                    \
                 STORE_HOST_REG_ADDR((uint32_t)&flags_res, dst_reg);                                                                     \
                 if (writeback) STORE_REG_B_RELEASE(dst_reg);                                                                            \
@@ -75,12 +83,20 @@
         {                                                                                                                               \
                 int src_reg, dst_reg;                                                                                                   \
                                                                                                                                         \
-                if ((fetchdat & 0xc0) != 0xc0)                                                                                          \
-                        return 0;                                                                                                       \
+                if ((fetchdat & 0xc0) == 0xc0)                                                                                          \
+                {                                                                                                                       \
+                        src_reg = LOAD_REG_W(fetchdat & 7);                                                                             \
+                }                                                                                                                       \
+                else                                                                                                                    \
+                {                                                                                                                       \
+                        x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);                                    \
+                        STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc);                                                                 \
+                        MEM_LOAD_ADDR_EA_W(target_seg);                                                                                 \
+                        src_reg = 0;                                                                                                    \
+                }                                                                                                                       \
                                                                                                                                         \
                 dst_reg = LOAD_REG_W((fetchdat >> 3) & 7);                                                                              \
                 STORE_IMM_ADDR_L((uint32_t)&flags_op, FLAGS_ZN16);                                                                      \
-                src_reg = LOAD_REG_W(fetchdat & 7);                                                                                     \
                 op ## _HOST_REG_W(dst_reg, src_reg);                                                                                    \
                 STORE_HOST_REG_ADDR((uint32_t)&flags_res, dst_reg);                                                                     \
                 if (writeback) STORE_REG_W_RELEASE(dst_reg);                                                                            \
@@ -93,12 +109,20 @@
         {                                                                                                                               \
                 int src_reg, dst_reg;                                                                                                   \
                                                                                                                                         \
-                if ((fetchdat & 0xc0) != 0xc0)                                                                                          \
-                        return 0;                                                                                                       \
+                if ((fetchdat & 0xc0) == 0xc0)                                                                                          \
+                {                                                                                                                       \
+                        src_reg = LOAD_REG_L(fetchdat & 7);                                                                             \
+                }                                                                                                                       \
+                else                                                                                                                    \
+                {                                                                                                                       \
+                        x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32);                                    \
+                        STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc);                                                                 \
+                        MEM_LOAD_ADDR_EA_L(target_seg);                                                                                 \
+                        src_reg = 0;                                                                                                    \
+                }                                                                                                                       \
                                                                                                                                         \
                 dst_reg = LOAD_REG_L((fetchdat >> 3) & 7);                                                                              \
                 STORE_IMM_ADDR_L((uint32_t)&flags_op, FLAGS_ZN32);                                                                      \
-                src_reg = LOAD_REG_L(fetchdat & 7);                                                                                     \
                 op ## _HOST_REG_L(dst_reg, src_reg);                                                                                    \
                 STORE_HOST_REG_ADDR((uint32_t)&flags_res, dst_reg);                                                                     \
                 if (writeback) STORE_REG_L_RELEASE(dst_reg);                                                                            \