XT models can now have less than 640kB RAM.
This commit is contained in:
parent
e9bea8ab7e
commit
c47df21a82
9 changed files with 139 additions and 83 deletions
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@ -516,7 +516,7 @@ chdir(pcempath);
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for (c=0;c<0x8000000;c++) putc(readmemb(c+0x10000000),f);
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fclose(f);*/
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f=fopen("ram.dmp","wb");
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fwrite(ram,mem_size*1024*1024,1,f);
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fwrite(ram,mem_size*1024,1,f);
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fclose(f);
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/* pclog("Dumping rram5.dmp\n");
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f=fopen("rram5.dmp","wb");
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46
src/mem.c
46
src/mem.c
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@ -1749,22 +1749,22 @@ void mem_init()
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{
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int c;
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ram = malloc(mem_size * 1024 * 1024);
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ram = malloc(mem_size * 1024);
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rom = malloc(0x20000);
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vram = malloc(0x800000);
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readlookup2 = malloc(1024 * 1024 * sizeof(uintptr_t));
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writelookup2 = malloc(1024 * 1024 * sizeof(uintptr_t));
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cachelookup2 = malloc(1024 * 1024);
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biosmask = 0xffff;
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pages = malloc(((mem_size * 1024 * 1024) >> 12) * sizeof(page_t));
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pages = malloc(((mem_size * 1024) >> 12) * sizeof(page_t));
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page_lookup = malloc((1 << 20) * sizeof(page_t *));
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memset(ram, 0, mem_size * 1024 * 1024);
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memset(pages, 0, ((mem_size * 1024 * 1024) >> 12) * sizeof(page_t));
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memset(ram, 0, mem_size * 1024);
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memset(pages, 0, ((mem_size * 1024) >> 12) * sizeof(page_t));
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memset(page_lookup, 0, (1 << 20) * sizeof(page_t *));
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for (c = 0; c < ((mem_size * 1024 * 1024) >> 12); c++)
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for (c = 0; c < ((mem_size * 1024) >> 12); c++)
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{
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pages[c].mem = &ram[c << 12];
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pages[c].write_b = mem_write_ramb_page;
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@ -1773,7 +1773,7 @@ void mem_init()
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}
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memset(isram, 0, sizeof(isram));
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for (c = 0; c < (mem_size * 16); c++)
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for (c = 0; c < (mem_size / 256); c++)
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{
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isram[c] = 1;
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if (c >= 0xa && c <= 0xf)
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@ -1794,13 +1794,13 @@ void mem_init()
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memset(_mem_state, 0, sizeof(_mem_state));
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mem_set_mem_state(0x000000, 0xa0000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
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mem_set_mem_state(0x000000, (mem_size > 640) ? 0xa0000 : mem_size * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
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mem_set_mem_state(0x0c0000, 0x40000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
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mem_set_mem_state(0x100000, (mem_size - 1) * 1024 * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
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mem_set_mem_state(0x100000, (mem_size - 1024) * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
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mem_mapping_add(&ram_low_mapping, 0x00000, 0xa0000, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram, MEM_MAPPING_INTERNAL, NULL);
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if (mem_size > 1)
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mem_mapping_add(&ram_high_mapping, 0x100000, (mem_size - 1) * 1024 * 1024, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + 0x100000, MEM_MAPPING_INTERNAL, NULL);
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mem_mapping_add(&ram_low_mapping, 0x00000, (mem_size > 640) ? 0xa0000 : mem_size * 1024, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram, MEM_MAPPING_INTERNAL, NULL);
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if (mem_size > 1024)
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mem_mapping_add(&ram_high_mapping, 0x100000, ((mem_size - 1024) * 1024), mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + 0x100000, MEM_MAPPING_INTERNAL, NULL);
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mem_mapping_add(&ram_mid_mapping, 0xc0000, 0x40000, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + 0xc0000, MEM_MAPPING_INTERNAL, NULL);
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mem_mapping_add(&romext_mapping, 0xc8000, 0x08000, mem_read_romext, mem_read_romextw, mem_read_romextl, NULL, NULL, NULL, romext, 0, NULL);
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@ -1812,13 +1812,13 @@ void mem_resize()
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int c;
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free(ram);
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ram = malloc(mem_size * 1024 * 1024);
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memset(ram, 0, mem_size * 1024 * 1024);
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ram = malloc(mem_size * 1024);
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memset(ram, 0, mem_size * 1024);
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free(pages);
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pages = malloc(((mem_size * 1024 * 1024) >> 12) * sizeof(page_t));
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memset(pages, 0, ((mem_size * 1024 * 1024) >> 12) * sizeof(page_t));
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for (c = 0; c < ((mem_size * 1024 * 1024) >> 12); c++)
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pages = malloc(((mem_size * 1024) >> 12) * sizeof(page_t));
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memset(pages, 0, ((mem_size * 1024) >> 12) * sizeof(page_t));
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for (c = 0; c < ((mem_size * 1024) >> 12); c++)
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{
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pages[c].mem = &ram[c << 12];
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pages[c].write_b = mem_write_ramb_page;
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@ -1827,7 +1827,7 @@ void mem_resize()
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}
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memset(isram, 0, sizeof(isram));
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for (c = 0; c < (mem_size * 16); c++)
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for (c = 0; c < (mem_size / 256); c++)
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{
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isram[c] = 1;
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if (c >= 0xa && c <= 0xf)
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@ -1846,13 +1846,13 @@ void mem_resize()
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memset(_mem_state, 0, sizeof(_mem_state));
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mem_set_mem_state(0x000000, 0xa0000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
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mem_set_mem_state(0x000000, (mem_size > 640) ? 0xa0000 : mem_size * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
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mem_set_mem_state(0x0c0000, 0x40000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
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mem_set_mem_state(0x100000, (mem_size - 1) * 1024 * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
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mem_set_mem_state(0x100000, (mem_size - 1024) * 1024, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
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mem_mapping_add(&ram_low_mapping, 0x00000, 0xa0000, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram, MEM_MAPPING_INTERNAL, NULL);
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if (mem_size > 1)
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mem_mapping_add(&ram_high_mapping, 0x100000, (mem_size - 1) * 1024 * 1024, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + 0x100000, MEM_MAPPING_INTERNAL, NULL);
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mem_mapping_add(&ram_low_mapping, 0x00000, (mem_size > 640) ? 0xa0000 : mem_size * 1024, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram, MEM_MAPPING_INTERNAL, NULL);
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if (mem_size > 1024)
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mem_mapping_add(&ram_high_mapping, 0x100000, (mem_size - 1024) * 1024, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + 0x100000, MEM_MAPPING_INTERNAL, NULL);
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mem_mapping_add(&ram_mid_mapping, 0xc0000, 0x40000, mem_read_ram, mem_read_ramw, mem_read_raml, mem_write_ram, mem_write_ramw, mem_write_raml, ram + 0xc0000, MEM_MAPPING_INTERNAL, NULL);
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mem_add_bios();
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@ -1868,7 +1868,7 @@ void mem_reset_page_blocks()
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{
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int c;
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for (c = 0; c < ((mem_size * 1024 * 1024) >> 12); c++)
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for (c = 0; c < ((mem_size * 1024) >> 12); c++)
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{
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pages[c].write_b = mem_write_ramb_page;
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pages[c].write_w = mem_write_ramw_page;
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74
src/model.c
74
src/model.c
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@ -71,43 +71,43 @@ int AMSTRAD, AT, PCI, TANDY;
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MODEL models[] =
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{
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{"IBM PC", ROM_IBMPC, { "", cpus_8088, "", NULL, "", NULL}, 0, xt_init},
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{"IBM XT", ROM_IBMXT, { "", cpus_8088, "", NULL, "", NULL}, 0, xt_init},
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{"IBM PCjr", ROM_IBMPCJR, { "", cpus_pcjr, "", NULL, "", NULL}, 1, pcjr_init},
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{"Generic XT clone", ROM_GENXT, { "", cpus_8088, "", NULL, "", NULL}, 0, xt_init},
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{"AMI XT clone", ROM_AMIXT, { "", cpus_8088, "", NULL, "", NULL}, 0, xt_init},
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{"DTK XT clone", ROM_DTKXT, { "", cpus_8088, "", NULL, "", NULL}, 0, xt_init},
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{"VTech Laser Turbo XT",ROM_LTXT, { "", cpus_8088, "", NULL, "", NULL}, 0, xt_init},
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{"VTech Laser XT3", ROM_LXT3, { "", cpus_8088, "", NULL, "", NULL}, 0, xt_init},
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{"Phoenix XT clone", ROM_PXXT, { "", cpus_8088, "", NULL, "", NULL}, 0, xt_init},
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{"Juko XT clone", ROM_JUKOPC, { "", cpus_8088, "", NULL, "", NULL}, 0, xt_init},
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{"Tandy 1000", ROM_TANDY, { "", cpus_8088, "", NULL, "", NULL}, 1, tandy1k_init},
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{"Amstrad PC1512", ROM_PC1512, { "", cpus_pc1512, "", NULL, "", NULL}, 1, ams_init},
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{"Sinclair PC200", ROM_PC200, { "", cpus_8086, "", NULL, "", NULL}, 1, ams_init},
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{"Euro PC", ROM_EUROPC, { "", cpus_8086, "", NULL, "", NULL}, 0, europc_init},
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{"Olivetti M24", ROM_OLIM24, { "", cpus_8086, "", NULL, "", NULL}, 1, olim24_init},
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{"Amstrad PC1640", ROM_PC1640, { "", cpus_8086, "", NULL, "", NULL}, 1, ams_init},
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{"Amstrad PC2086", ROM_PC2086, { "", cpus_8086, "", NULL, "", NULL}, 1, ams_init},
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{"Amstrad PC3086", ROM_PC3086, { "", cpus_8086, "", NULL, "", NULL}, 1, ams_init},
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{"IBM AT", ROM_IBMAT, { "", cpus_ibmat, "", NULL, "", NULL}, 0, at_init},
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{"Commodore PC 30 III", ROM_CMDPC30, { "", cpus_286, "", NULL, "", NULL}, 0, at_init},
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{"AMI 286 clone", ROM_AMI286, { "", cpus_286, "", NULL, "", NULL}, 0, at_neat_init},
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{"DELL System 200", ROM_DELL200, { "", cpus_286, "", NULL, "", NULL}, 0, at_init},
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{"IBM PS/1 model 2011", ROM_IBMPS1_2011, { "", cpus_286, "", NULL, "", NULL}, 1, ps1_init},
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{"Compaq Deskpro 386", ROM_DESKPRO_386, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 0, deskpro386_init},
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{"Acer 386SX25/N", ROM_ACER386, { "Intel", cpus_acer, "", NULL, "", NULL}, 1, at_acer386sx_init},
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{"DTK 386SX clone", ROM_DTK386, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 0, at_neat_init},
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{"Phoenix 386 clone", ROM_PX386, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 0, at_init},
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{"Amstrad MegaPC", ROM_MEGAPC, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 1, at_wd76c10_init},
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{"AMI 386 clone", ROM_AMI386, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 0, at_headland_init},
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{"AMI 486 clone", ROM_AMI486, { "Intel", cpus_i486, "AMD", cpus_Am486, "Cyrix", cpus_Cx486}, 0, at_ali1429_init},
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{"AMI WinBIOS 486", ROM_WIN486, { "Intel", cpus_i486, "AMD", cpus_Am486, "Cyrix", cpus_Cx486}, 0, at_ali1429_init},
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/* {"AMI WinBIOS 486 PCI", ROM_PCI486, { "Intel", cpus_i486, "AMD", cpus_Am486, "Cyrix", cpus_Cx486}, 0, at_um8881f_init},*/
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{"Award SiS 496/497", ROM_SIS496, { "Intel", cpus_i486, "AMD", cpus_Am486, "Cyrix", cpus_Cx486}, 0, at_sis496_init},
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{"Intel Premiere/PCI", ROM_REVENGE, { "Intel", cpus_Pentium5V, "", NULL, "", NULL}, 0, at_batman_init},
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{"Intel Advanced/EV", ROM_ENDEAVOR, { "Intel", cpus_Pentium, "IDT", cpus_WinChip, "", NULL}, 0, at_endeavor_init},
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{"Award 430VX PCI", ROM_430VX, { "Intel", cpus_Pentium, "IDT", cpus_WinChip, "", NULL}, 0, at_i430vx_init},
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{"", -1, {"", 0, "", 0, "", 0}, 0}
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{"IBM PC", ROM_IBMPC, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 64, 640, xt_init},
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{"IBM XT", ROM_IBMXT, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, xt_init},
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{"IBM PCjr", ROM_IBMPCJR, { "", cpus_pcjr, "", NULL, "", NULL}, 1, 0, 128, 640, pcjr_init},
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{"Generic XT clone", ROM_GENXT, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, xt_init},
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{"AMI XT clone", ROM_AMIXT, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, xt_init},
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{"DTK XT clone", ROM_DTKXT, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, xt_init},
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{"VTech Laser Turbo XT",ROM_LTXT, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, xt_init},
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{"VTech Laser XT3", ROM_LXT3, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, xt_init},
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{"Phoenix XT clone", ROM_PXXT, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, xt_init},
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{"Juko XT clone", ROM_JUKOPC, { "", cpus_8088, "", NULL, "", NULL}, 0, 0, 128, 640, xt_init},
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{"Tandy 1000", ROM_TANDY, { "", cpus_8088, "", NULL, "", NULL}, 1, 0, 128, 640, tandy1k_init},
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{"Amstrad PC1512", ROM_PC1512, { "", cpus_pc1512, "", NULL, "", NULL}, 1, 0, 512, 640, ams_init},
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{"Sinclair PC200", ROM_PC200, { "", cpus_8086, "", NULL, "", NULL}, 1, 0, 512, 640, ams_init},
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{"Euro PC", ROM_EUROPC, { "", cpus_8086, "", NULL, "", NULL}, 0, 0, 512, 640, europc_init},
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{"Olivetti M24", ROM_OLIM24, { "", cpus_8086, "", NULL, "", NULL}, 1, 0, 128, 640, olim24_init},
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{"Amstrad PC1640", ROM_PC1640, { "", cpus_8086, "", NULL, "", NULL}, 1, 0, 640, 640, ams_init},
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{"Amstrad PC2086", ROM_PC2086, { "", cpus_8086, "", NULL, "", NULL}, 1, 0, 640, 640, ams_init},
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{"Amstrad PC3086", ROM_PC3086, { "", cpus_8086, "", NULL, "", NULL}, 1, 0, 640, 640, ams_init},
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{"IBM AT", ROM_IBMAT, { "", cpus_ibmat, "", NULL, "", NULL}, 0, 1, 1, 16, at_init},
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{"Commodore PC 30 III", ROM_CMDPC30, { "", cpus_286, "", NULL, "", NULL}, 0, 1, 1, 16, at_init},
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{"AMI 286 clone", ROM_AMI286, { "", cpus_286, "", NULL, "", NULL}, 0, 1, 1, 16, at_neat_init},
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{"DELL System 200", ROM_DELL200, { "", cpus_286, "", NULL, "", NULL}, 0, 1, 1, 16, at_init},
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{"IBM PS/1 model 2011", ROM_IBMPS1_2011, { "", cpus_286, "", NULL, "", NULL}, 1, 1, 1, 16, ps1_init},
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{"Compaq Deskpro 386", ROM_DESKPRO_386, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 0, 1, 1, 15, deskpro386_init},
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{"Acer 386SX25/N", ROM_ACER386, { "Intel", cpus_acer, "", NULL, "", NULL}, 1, 1, 1, 16, at_acer386sx_init},
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{"DTK 386SX clone", ROM_DTK386, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 0, 1, 1, 16, at_neat_init},
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{"Phoenix 386 clone", ROM_PX386, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 0, 1, 1, 16, at_init},
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{"Amstrad MegaPC", ROM_MEGAPC, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 1, 1, 1, 16, at_wd76c10_init},
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{"AMI 386 clone", ROM_AMI386, { "Intel", cpus_i386, "AMD", cpus_Am386, "Cyrix", cpus_486SDLC}, 0, 1, 1, 256, at_headland_init},
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{"AMI 486 clone", ROM_AMI486, { "Intel", cpus_i486, "AMD", cpus_Am486, "Cyrix", cpus_Cx486}, 0, 1, 1, 256, at_ali1429_init},
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{"AMI WinBIOS 486", ROM_WIN486, { "Intel", cpus_i486, "AMD", cpus_Am486, "Cyrix", cpus_Cx486}, 0, 1, 1, 256, at_ali1429_init},
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/* {"AMI WinBIOS 486 PCI", ROM_PCI486, { "Intel", cpus_i486, "AMD", cpus_Am486, "Cyrix", cpus_Cx486}, 0, 1, 1, 256, at_um8881f_init},*/
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{"Award SiS 496/497", ROM_SIS496, { "Intel", cpus_i486, "AMD", cpus_Am486, "Cyrix", cpus_Cx486}, 0, 1, 1, 256, at_sis496_init},
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{"Intel Premiere/PCI", ROM_REVENGE, { "Intel", cpus_Pentium5V, "", NULL, "", NULL}, 0, 1, 1, 128, at_batman_init},
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{"Intel Advanced/EV", ROM_ENDEAVOR, { "Intel", cpus_Pentium, "IDT", cpus_WinChip, "", NULL}, 0, 1, 1, 128, at_endeavor_init},
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{"Award 430VX PCI", ROM_430VX, { "Intel", cpus_Pentium, "IDT", cpus_WinChip, "", NULL}, 0, 1, 1, 256, at_i430vx_init},
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{"", -1, {"", 0, "", 0, "", 0}, 0,0,0, 0}
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};
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int model_count()
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@ -8,6 +8,8 @@ typedef struct
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CPU *cpus;
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} cpu[4];
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int fixed_gfxcard;
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int is_at;
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int min_ram, max_ram;
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void (*init)();
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} MODEL;
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2
src/pc.c
2
src/pc.c
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@ -552,7 +552,7 @@ void loadconfig(char *fn)
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if (p) strcpy(discfns[1], p);
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else strcpy(discfns[1], "");
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mem_size = config_get_int(NULL, "mem_size", 4);
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mem_size = config_get_int(NULL, "mem_size", 4096);
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cdrom_drive = config_get_int(NULL, "cdrom_drive", 0);
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cdrom_enabled = config_get_int(NULL, "cdrom_enabled", 0);
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@ -74,7 +74,7 @@ BEGIN
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PUSHBUTTON "Configure", IDC_CONFIGURESND, 224, 156, 40, 14, WS_TABSTOP
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EDITTEXT IDC_MEMTEXT, 62, 172, 36, 14, ES_AUTOHSCROLL | ES_NUMBER
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CONTROL "", IDC_MEMSPIN, UPDOWN_CLASS, UDS_ALIGNRIGHT | UDS_ARROWKEYS | UDS_NOTHOUSANDS | UDS_SETBUDDYINT, 98, 172, 12, 14
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LTEXT "MB", IDC_STATIC, 98, 172, 40, 10
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LTEXT "MB", IDC_TEXT_MB, 98, 172, 40, 10
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CONTROL "CMS / Game Blaster",IDC_CHECK3,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,232,118,10
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CONTROL "Gravis Ultrasound",IDC_CHECKGUS,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,248,118,10
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CONTROL "Innovation SSI-2001",IDC_CHECKSSI,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,264,118,10
|
||||
|
|
|
|||
24
src/piix.c
24
src/piix.c
|
|
@ -201,11 +201,11 @@ int piix_bus_master_sector_read(int channel, uint8_t *data)
|
|||
if (piix_busmaster[channel].count < (512 - transferred))
|
||||
{
|
||||
// pclog("Transferring smaller - %i bytes\n", piix_busmaster[channel].count);
|
||||
if (piix_busmaster[channel].addr < (mem_size * 1024 * 1024))
|
||||
if (piix_busmaster[channel].addr < (mem_size * 1024))
|
||||
{
|
||||
int count = piix_busmaster[channel].count;
|
||||
if ((piix_busmaster[channel].addr + count) > (mem_size * 1024 * 1024))
|
||||
count = (mem_size * 1024 * 1024) - piix_busmaster[channel].addr;
|
||||
if ((piix_busmaster[channel].addr + count) > (mem_size * 1024))
|
||||
count = (mem_size * 1024) - piix_busmaster[channel].addr;
|
||||
memcpy(&ram[piix_busmaster[channel].addr], data + transferred, count);
|
||||
}
|
||||
transferred += piix_busmaster[channel].count;
|
||||
|
|
@ -215,11 +215,11 @@ int piix_bus_master_sector_read(int channel, uint8_t *data)
|
|||
else
|
||||
{
|
||||
// pclog("Transferring larger - %i bytes\n", 512 - transferred);
|
||||
if (piix_busmaster[channel].addr < (mem_size * 1024 * 1024))
|
||||
if (piix_busmaster[channel].addr < (mem_size * 1024))
|
||||
{
|
||||
int count = 512 - transferred;
|
||||
if ((piix_busmaster[channel].addr + count) > (mem_size * 1024 * 1024))
|
||||
count = (mem_size * 1024 * 1024) - piix_busmaster[channel].addr;
|
||||
if ((piix_busmaster[channel].addr + count) > (mem_size * 1024))
|
||||
count = (mem_size * 1024) - piix_busmaster[channel].addr;
|
||||
memcpy(&ram[piix_busmaster[channel].addr], data + transferred, count);
|
||||
}
|
||||
piix_busmaster[channel].addr += (512 - transferred);
|
||||
|
|
@ -258,11 +258,11 @@ int piix_bus_master_sector_write(int channel, uint8_t *data)
|
|||
if (piix_busmaster[channel].count < (512 - transferred))
|
||||
{
|
||||
// pclog("Transferring smaller - %i bytes\n", piix_busmaster[channel].count);
|
||||
if (piix_busmaster[channel].addr < (mem_size * 1024 * 1024))
|
||||
if (piix_busmaster[channel].addr < (mem_size * 1024))
|
||||
{
|
||||
int count = piix_busmaster[channel].count;
|
||||
if ((piix_busmaster[channel].addr + count) > (mem_size * 1024 * 1024))
|
||||
count = (mem_size * 1024 * 1024) - piix_busmaster[channel].addr;
|
||||
if ((piix_busmaster[channel].addr + count) > (mem_size * 1024))
|
||||
count = (mem_size * 1024) - piix_busmaster[channel].addr;
|
||||
memcpy(data + transferred, &ram[piix_busmaster[channel].addr], count);
|
||||
}
|
||||
transferred += piix_busmaster[channel].count;
|
||||
|
|
@ -272,11 +272,11 @@ int piix_bus_master_sector_write(int channel, uint8_t *data)
|
|||
else
|
||||
{
|
||||
// pclog("Transferring larger - %i bytes\n", 512 - transferred);
|
||||
if (piix_busmaster[channel].addr < (mem_size * 1024 * 1024))
|
||||
if (piix_busmaster[channel].addr < (mem_size * 1024))
|
||||
{
|
||||
int count = 512 - transferred;
|
||||
if ((piix_busmaster[channel].addr + count) > (mem_size * 1024 * 1024))
|
||||
count = (mem_size * 1024 * 1024) - piix_busmaster[channel].addr;
|
||||
if ((piix_busmaster[channel].addr + count) > (mem_size * 1024))
|
||||
count = (mem_size * 1024) - piix_busmaster[channel].addr;
|
||||
memcpy(data + transferred, &ram[piix_busmaster[channel].addr], count);
|
||||
}
|
||||
piix_busmaster[channel].addr += (512 - transferred);
|
||||
|
|
|
|||
|
|
@ -80,6 +80,7 @@
|
|||
#define IDC_STEXT7 1106
|
||||
#define IDC_STEXT8 1107
|
||||
#define IDC_STEXT_DEVICE 1108
|
||||
#define IDC_TEXT_MB 1120
|
||||
|
||||
#define IDC_EDIT_C_SPT 1200
|
||||
#define IDC_EDIT_C_HPC 1201
|
||||
|
|
|
|||
|
|
@ -30,6 +30,7 @@ static BOOL CALLBACK config_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPAR
|
|||
int temp_GAMEBLASTER, temp_GUS, temp_SSI2001, temp_voodoo, temp_sound_card_current;
|
||||
int temp_dynarec;
|
||||
int cpu_flags;
|
||||
UDACCEL accel;
|
||||
// pclog("Dialog msg %i %08X\n",message,message);
|
||||
switch (message)
|
||||
{
|
||||
|
|
@ -167,8 +168,20 @@ static BOOL CALLBACK config_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPAR
|
|||
|
||||
h = GetDlgItem(hdlg, IDC_MEMSPIN);
|
||||
SendMessage(h, UDM_SETBUDDY, (WPARAM)GetDlgItem(hdlg, IDC_MEMTEXT), 0);
|
||||
SendMessage(h, UDM_SETRANGE, 0, (1 << 16) | 256);
|
||||
SendMessage(h, UDM_SETPOS, 0, mem_size);
|
||||
accel.nSec = 0;
|
||||
if (!models[model].is_at)
|
||||
{
|
||||
SendMessage(h, UDM_SETRANGE, 0, (64 << 16) | 640);
|
||||
SendMessage(h, UDM_SETPOS, 0, mem_size);
|
||||
accel.nInc = 64;
|
||||
}
|
||||
else
|
||||
{
|
||||
SendMessage(h, UDM_SETRANGE, 0, (1 << 16) | 256);
|
||||
SendMessage(h, UDM_SETPOS, 0, mem_size / 1024);
|
||||
accel.nInc = 1;
|
||||
}
|
||||
SendMessage(h, UDM_SETACCEL, 1, (LPARAM)&accel);
|
||||
|
||||
h = GetDlgItem(hdlg, IDC_CONFIGUREVID);
|
||||
if (video_card_has_config(video_old_to_new(gfxcard)))
|
||||
|
|
@ -191,25 +204,35 @@ static BOOL CALLBACK config_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPAR
|
|||
SendMessage(h, CB_ADDSTRING, 0, (LPARAM)(LPCSTR)"5.25\" 1.2M");
|
||||
SendMessage(h, CB_SETCURSEL, drive_type[1], 0);
|
||||
|
||||
h = GetDlgItem(hdlg, IDC_TEXT_MB);
|
||||
if (models[model].is_at)
|
||||
SendMessage(h, WM_SETTEXT, 0, (LPARAM)(LPCSTR)"MB");
|
||||
else
|
||||
SendMessage(h, WM_SETTEXT, 0, (LPARAM)(LPCSTR)"KB");
|
||||
return TRUE;
|
||||
|
||||
case WM_COMMAND:
|
||||
switch (LOWORD(wParam))
|
||||
{
|
||||
case IDOK:
|
||||
h = GetDlgItem(hdlg, IDC_MEMTEXT);
|
||||
SendMessage(h, WM_GETTEXT, 255, (LPARAM)temp_str);
|
||||
sscanf(temp_str, "%i", &mem);
|
||||
if (mem < 1 || mem > 256)
|
||||
{
|
||||
MessageBox(NULL, "Invalid memory size\nMemory must be between 1 and 256 MB", "PCem", MB_OK);
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
h = GetDlgItem(hdlg, IDC_COMBO1);
|
||||
temp_model = listtomodel[SendMessage(h, CB_GETCURSEL, 0, 0)];
|
||||
|
||||
h = GetDlgItem(hdlg, IDC_MEMTEXT);
|
||||
SendMessage(h, WM_GETTEXT, 255, (LPARAM)temp_str);
|
||||
sscanf(temp_str, "%i", &mem);
|
||||
if ((models[temp_model].is_at && (mem < 1 || mem > 256)) ||
|
||||
(!models[temp_model].is_at && (mem < 64 || mem > 640)))
|
||||
{
|
||||
if (models[temp_model].is_at)
|
||||
MessageBox(NULL, "Invalid memory size\nMemory must be between 1 and 256 MB", "PCem", MB_OK);
|
||||
else
|
||||
MessageBox(NULL, "Invalid memory size\nMemory must be between 64 and 640 kB", "PCem", MB_OK);
|
||||
break;
|
||||
}
|
||||
if (models[temp_model].is_at)
|
||||
mem *= 1024;
|
||||
|
||||
h = GetDlgItem(hdlg, IDC_COMBOVID);
|
||||
SendMessage(h, CB_GETLBTEXT, SendMessage(h, CB_GETCURSEL, 0, 0), (LPARAM)temp_str);
|
||||
gfx = video_new_to_old(video_card_getid(temp_str));
|
||||
|
|
@ -362,6 +385,36 @@ static BOOL CALLBACK config_dlgproc(HWND hdlg, UINT message, WPARAM wParam, LPAR
|
|||
else
|
||||
EnableWindow(h, TRUE);
|
||||
SendMessage(h, BM_SETCHECK, ((cpu_flags & CPU_SUPPORTS_DYNAREC) && temp_dynarec) || (cpu_flags & CPU_REQUIRES_DYNAREC), 0);
|
||||
|
||||
h = GetDlgItem(hdlg, IDC_TEXT_MB);
|
||||
if (models[temp_model].is_at)
|
||||
SendMessage(h, WM_SETTEXT, 0, (LPARAM)(LPCSTR)"MB");
|
||||
else
|
||||
SendMessage(h, WM_SETTEXT, 0, (LPARAM)(LPCSTR)"KB");
|
||||
|
||||
h = GetDlgItem(hdlg, IDC_MEMTEXT);
|
||||
SendMessage(h, WM_GETTEXT, 255, (LPARAM)temp_str);
|
||||
sscanf(temp_str, "%i", &mem);
|
||||
|
||||
h = GetDlgItem(hdlg, IDC_MEMSPIN);
|
||||
accel.nSec = 0;
|
||||
if (!models[temp_model].is_at)
|
||||
{
|
||||
SendMessage(h, UDM_SETRANGE, 0, (models[temp_model].min_ram << 16) | models[temp_model].max_ram);
|
||||
accel.nInc = 64;
|
||||
mem &= ~0x3f;
|
||||
}
|
||||
else
|
||||
{
|
||||
SendMessage(h, UDM_SETRANGE, 0, (models[temp_model].min_ram << 16) | models[temp_model].max_ram);
|
||||
accel.nInc = 1;
|
||||
}
|
||||
if (mem < models[temp_model].min_ram)
|
||||
mem = models[temp_model].min_ram;
|
||||
else if (mem > models[temp_model].max_ram)
|
||||
mem = models[temp_model].max_ram;
|
||||
SendMessage(h, UDM_SETPOS, 0, mem);
|
||||
SendMessage(h, UDM_SETACCEL, 1, (LPARAM)&accel);
|
||||
}
|
||||
break;
|
||||
case IDC_COMBOCPUM:
|
||||
|
|
|
|||
Loading…
Reference in a new issue