From bc5ce4351933292d6f28a9bca1038121f07995b8 Mon Sep 17 00:00:00 2001 From: TomW Date: Mon, 9 Feb 2015 12:17:54 +0000 Subject: [PATCH] Memory-source arithmetic instructions now have correct PC when aborting. Fixes Discworld 2. Removed some debug junk from last commit. --- src/codegen_ops_arith.h | 3 +++ src/codegen_ops_mov.h | 8 +------- 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/src/codegen_ops_arith.h b/src/codegen_ops_arith.h index b12be70..69fa4d8 100644 --- a/src/codegen_ops_arith.h +++ b/src/codegen_ops_arith.h @@ -141,6 +141,7 @@ static uint32_t ropDEC_rl(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uin else \ { \ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \ + STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); \ MEM_LOAD_ADDR_EA_B(target_seg); \ src_reg = 0; \ } \ @@ -168,6 +169,7 @@ static uint32_t ropDEC_rl(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uin else \ { \ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \ + STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); \ MEM_LOAD_ADDR_EA_W(target_seg); \ src_reg = 0; \ } \ @@ -195,6 +197,7 @@ static uint32_t ropDEC_rl(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uin else \ { \ x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); \ + STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); \ MEM_LOAD_ADDR_EA_L(target_seg); \ src_reg = 0; \ } \ diff --git a/src/codegen_ops_mov.h b/src/codegen_ops_mov.h index 1af0a1c..97e00b4 100644 --- a/src/codegen_ops_mov.h +++ b/src/codegen_ops_mov.h @@ -166,7 +166,6 @@ static uint32_t ropMOV_b_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, } else { -// return 0; x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); uint32_t imm = fastreadb(cs + op_pc + 1); int host_reg = LOAD_REG_IMM(imm); @@ -188,19 +187,15 @@ static uint32_t ropMOV_w_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, } else { -// if ((cs+pc) <= 0xbff70000 || (cs+pc) > 0xbff80000) -// return 0; -// { x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); uint32_t imm = fastreadw(cs + op_pc + 1); int host_reg = LOAD_REG_IMM(imm); -//pclog("MOV imm %04x(%08x):%08x %08x %04x\n", CS, cs, pc, op_pc, imm); + STORE_IMM_ADDR_L((uintptr_t)&oldpc, op_old_pc); CHECK_SEG_WRITE(target_seg); MEM_STORE_ADDR_EA_W(target_seg, host_reg); RELEASE_REG(host_reg); -// } } return op_pc + 3; @@ -215,7 +210,6 @@ static uint32_t ropMOV_l_imm(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, } else { -// return 0; x86seg *target_seg = FETCH_EA(op_ea_seg, fetchdat, op_ssegs, &op_pc, op_32); uint32_t imm = fastreadl(cs + op_pc + 1); int host_reg = LOAD_REG_IMM(imm);