Move flags and eflags variables into cpu_struct.
This commit is contained in:
SarahW
parent
c1565eb42f
commit
a4d3aa1912
25 changed files with 1013 additions and 958 deletions
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@ -14,8 +14,8 @@ static int opREP_INSB_ ## size(uint32_t fetchdat)
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temp = inb(DX); \
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writememb(es, DEST_REG, temp); if (cpu_state.abrt) return 1; \
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\
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if (flags & D_FLAG) DEST_REG--; \
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else DEST_REG++; \
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if (cpu_state.flags & D_FLAG) DEST_REG--; \
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else DEST_REG++; \
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CNT_REG--; \
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cycles -= 15; \
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reads++; writes++; total_cycles += 15; \
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@ -43,8 +43,8 @@ static int opREP_INSW_ ## size(uint32_t fetchdat)
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temp = inw(DX); \
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writememw(es, DEST_REG, temp); if (cpu_state.abrt) return 1; \
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\
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if (flags & D_FLAG) DEST_REG -= 2; \
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else DEST_REG += 2; \
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if (cpu_state.flags & D_FLAG) DEST_REG -= 2; \
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else DEST_REG += 2; \
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CNT_REG--; \
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cycles -= 15; \
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reads++; writes++; total_cycles += 15; \
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@ -74,8 +74,8 @@ static int opREP_INSL_ ## size(uint32_t fetchdat)
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temp = inl(DX); \
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writememl(es, DEST_REG, temp); if (cpu_state.abrt) return 1; \
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\
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if (flags & D_FLAG) DEST_REG -= 4; \
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else DEST_REG += 4; \
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if (cpu_state.flags & D_FLAG) DEST_REG -= 4; \
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else DEST_REG += 4; \
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CNT_REG--; \
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cycles -= 15; \
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reads++; writes++; total_cycles += 15; \
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@ -101,8 +101,8 @@ static int opREP_OUTSB_ ## size(uint32_t fetchdat)
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temp = readmemb(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \
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check_io_perm(DX); \
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outb(DX, temp); \
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if (flags & D_FLAG) SRC_REG--; \
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else SRC_REG++; \
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if (cpu_state.flags & D_FLAG) SRC_REG--; \
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else SRC_REG++; \
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CNT_REG--; \
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cycles -= 14; \
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reads++; writes++; total_cycles += 14; \
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@ -128,8 +128,8 @@ static int opREP_OUTSW_ ## size(uint32_t fetchdat)
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check_io_perm(DX); \
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check_io_perm(DX+1); \
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outw(DX, temp); \
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if (flags & D_FLAG) SRC_REG -= 2; \
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else SRC_REG += 2; \
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if (cpu_state.flags & D_FLAG) SRC_REG -= 2; \
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else SRC_REG += 2; \
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CNT_REG--; \
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cycles -= 14; \
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reads++; writes++; total_cycles += 14; \
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@ -157,8 +157,8 @@ static int opREP_OUTSL_ ## size(uint32_t fetchdat)
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check_io_perm(DX+2); \
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check_io_perm(DX+3); \
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outl(DX, temp); \
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if (flags & D_FLAG) SRC_REG -= 4; \
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else SRC_REG += 4; \
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if (cpu_state.flags & D_FLAG) SRC_REG -= 4; \
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else SRC_REG += 4; \
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CNT_REG--; \
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cycles -= 14; \
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reads++; writes++; total_cycles += 14; \
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@ -192,8 +192,8 @@ static int opREP_MOVSB_ ## size(uint32_t fetchdat)
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temp = readmemb(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \
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writememb(es, DEST_REG, temp); if (cpu_state.abrt) return 1; \
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\
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if (flags & D_FLAG) { DEST_REG--; SRC_REG--; } \
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else { DEST_REG++; SRC_REG++; } \
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if (cpu_state.flags & D_FLAG) { DEST_REG--; SRC_REG--; } \
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else { DEST_REG++; SRC_REG++; } \
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CNT_REG--; \
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cycles -= is486 ? 3 : 4; \
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ins++; \
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@ -230,8 +230,8 @@ static int opREP_MOVSW_ ## size(uint32_t fetchdat)
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temp = readmemw(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \
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writememw(es, DEST_REG, temp); if (cpu_state.abrt) return 1; \
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\
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if (flags & D_FLAG) { DEST_REG -= 2; SRC_REG -= 2; } \
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else { DEST_REG += 2; SRC_REG += 2; } \
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if (cpu_state.flags & D_FLAG) { DEST_REG -= 2; SRC_REG -= 2; } \
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else { DEST_REG += 2; SRC_REG += 2; } \
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CNT_REG--; \
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cycles -= is486 ? 3 : 4; \
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ins++; \
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@ -268,8 +268,8 @@ static int opREP_MOVSL_ ## size(uint32_t fetchdat)
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temp = readmeml(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \
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writememl(es, DEST_REG, temp); if (cpu_state.abrt) return 1; \
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\
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if (flags & D_FLAG) { DEST_REG -= 4; SRC_REG -= 4; } \
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else { DEST_REG += 4; SRC_REG += 4; } \
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if (cpu_state.flags & D_FLAG) { DEST_REG -= 4; SRC_REG -= 4; } \
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else { DEST_REG += 4; SRC_REG += 4; } \
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CNT_REG--; \
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cycles -= is486 ? 3 : 4; \
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ins++; \
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@ -301,8 +301,8 @@ static int opREP_STOSB_ ## size(uint32_t fetchdat)
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{ \
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CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG); \
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writememb(es, DEST_REG, AL); if (cpu_state.abrt) return 1; \
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if (flags & D_FLAG) DEST_REG--; \
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else DEST_REG++; \
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if (cpu_state.flags & D_FLAG) DEST_REG--; \
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else DEST_REG++; \
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CNT_REG--; \
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cycles -= is486 ? 4 : 5; \
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writes++; total_cycles += is486 ? 4 : 5; \
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@ -331,8 +331,8 @@ static int opREP_STOSW_ ## size(uint32_t fetchdat)
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{ \
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CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG+1); \
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writememw(es, DEST_REG, AX); if (cpu_state.abrt) return 1; \
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if (flags & D_FLAG) DEST_REG -= 2; \
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else DEST_REG += 2; \
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if (cpu_state.flags & D_FLAG) DEST_REG -= 2; \
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else DEST_REG += 2; \
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CNT_REG--; \
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cycles -= is486 ? 4 : 5; \
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writes++; total_cycles += is486 ? 4 : 5; \
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@ -361,8 +361,8 @@ static int opREP_STOSL_ ## size(uint32_t fetchdat)
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{ \
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CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG+3); \
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writememl(es, DEST_REG, EAX); if (cpu_state.abrt) return 1; \
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if (flags & D_FLAG) DEST_REG -= 4; \
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else DEST_REG += 4; \
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if (cpu_state.flags & D_FLAG) DEST_REG -= 4; \
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else DEST_REG += 4; \
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CNT_REG--; \
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cycles -= is486 ? 4 : 5; \
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writes++; total_cycles += is486 ? 4 : 5; \
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@ -391,8 +391,8 @@ static int opREP_LODSB_ ## size(uint32_t fetchdat)
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while (CNT_REG > 0) \
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{ \
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AL = readmemb(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \
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if (flags & D_FLAG) SRC_REG--; \
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else SRC_REG++; \
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if (cpu_state.flags & D_FLAG) SRC_REG--; \
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else SRC_REG++; \
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CNT_REG--; \
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cycles -= is486 ? 4 : 5; \
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reads++; total_cycles += is486 ? 4 : 5; \
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@ -420,8 +420,8 @@ static int opREP_LODSW_ ## size(uint32_t fetchdat)
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while (CNT_REG > 0) \
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{ \
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AX = readmemw(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \
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if (flags & D_FLAG) SRC_REG -= 2; \
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else SRC_REG += 2; \
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if (cpu_state.flags & D_FLAG) SRC_REG -= 2; \
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else SRC_REG += 2; \
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CNT_REG--; \
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cycles -= is486 ? 4 : 5; \
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reads++; total_cycles += is486 ? 4 : 5; \
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@ -449,8 +449,8 @@ static int opREP_LODSL_ ## size(uint32_t fetchdat)
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while (CNT_REG > 0) \
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{ \
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EAX = readmeml(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \
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if (flags & D_FLAG) SRC_REG -= 4; \
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else SRC_REG += 4; \
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if (cpu_state.flags & D_FLAG) SRC_REG -= 4; \
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else SRC_REG += 4; \
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CNT_REG--; \
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cycles -= is486 ? 4 : 5; \
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reads++; total_cycles += is486 ? 4 : 5; \
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@ -483,8 +483,8 @@ static int opREP_CMPSB_ ## size(uint32_t fetchdat)
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temp = readmemb(cpu_state.ea_seg->base, SRC_REG); \
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temp2 = readmemb(es, DEST_REG); if (cpu_state.abrt) return 1; \
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\
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if (flags & D_FLAG) { DEST_REG--; SRC_REG--; } \
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else { DEST_REG++; SRC_REG++; } \
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if (cpu_state.flags & D_FLAG) { DEST_REG--; SRC_REG--; } \
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else { DEST_REG++; SRC_REG++; } \
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CNT_REG--; \
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cycles -= is486 ? 7 : 9; \
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reads += 2; total_cycles += is486 ? 7 : 9; \
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@ -513,8 +513,8 @@ static int opREP_CMPSW_ ## size(uint32_t fetchdat)
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temp = readmemw(cpu_state.ea_seg->base, SRC_REG); \
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temp2 = readmemw(es, DEST_REG); if (cpu_state.abrt) return 1; \
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\
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if (flags & D_FLAG) { DEST_REG -= 2; SRC_REG -= 2; } \
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else { DEST_REG += 2; SRC_REG += 2; } \
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if (cpu_state.flags & D_FLAG) { DEST_REG -= 2; SRC_REG -= 2; } \
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else { DEST_REG += 2; SRC_REG += 2; } \
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CNT_REG--; \
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cycles -= is486 ? 7 : 9; \
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reads += 2; total_cycles += is486 ? 7 : 9; \
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@ -543,8 +543,8 @@ static int opREP_CMPSL_ ## size(uint32_t fetchdat)
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temp = readmeml(cpu_state.ea_seg->base, SRC_REG); \
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temp2 = readmeml(es, DEST_REG); if (cpu_state.abrt) return 1; \
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\
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if (flags & D_FLAG) { DEST_REG -= 4; SRC_REG -= 4; } \
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else { DEST_REG += 4; SRC_REG += 4; } \
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if (cpu_state.flags & D_FLAG) { DEST_REG -= 4; SRC_REG -= 4; } \
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else { DEST_REG += 4; SRC_REG += 4; } \
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CNT_REG--; \
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cycles -= is486 ? 7 : 9; \
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reads += 2; total_cycles += is486 ? 7 : 9; \
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@ -575,8 +575,8 @@ static int opREP_SCASB_ ## size(uint32_t fetchdat)
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uint8_t temp = readmemb(es, DEST_REG); if (cpu_state.abrt) break;\
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setsub8(AL, temp); \
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tempz = (ZF_SET()) ? 1 : 0; \
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if (flags & D_FLAG) DEST_REG--; \
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else DEST_REG++; \
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if (cpu_state.flags & D_FLAG) DEST_REG--; \
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else DEST_REG++; \
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CNT_REG--; \
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cycles -= is486 ? 5 : 8; \
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reads++; total_cycles += is486 ? 5 : 8; \
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@ -608,8 +608,8 @@ static int opREP_SCASW_ ## size(uint32_t fetchdat)
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uint16_t temp = readmemw(es, DEST_REG); if (cpu_state.abrt) break;\
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setsub16(AX, temp); \
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tempz = (ZF_SET()) ? 1 : 0; \
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if (flags & D_FLAG) DEST_REG -= 2; \
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else DEST_REG += 2; \
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if (cpu_state.flags & D_FLAG) DEST_REG -= 2; \
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else DEST_REG += 2; \
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CNT_REG--; \
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cycles -= is486 ? 5 : 8; \
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reads++; total_cycles += is486 ? 5 : 8; \
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@ -641,8 +641,8 @@ static int opREP_SCASL_ ## size(uint32_t fetchdat)
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uint32_t temp = readmeml(es, DEST_REG); if (cpu_state.abrt) break;\
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setsub32(EAX, temp); \
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tempz = (ZF_SET()) ? 1 : 0; \
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if (flags & D_FLAG) DEST_REG -= 4; \
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else DEST_REG += 4; \
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if (cpu_state.flags & D_FLAG) DEST_REG -= 4; \
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else DEST_REG += 4; \
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CNT_REG--; \
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cycles -= is486 ? 5 : 8; \
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reads++; total_cycles += is486 ? 5 : 8; \
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