From a4b8eba56bc3422b2cda2117364a3f6329c30332 Mon Sep 17 00:00:00 2001 From: SarahW Date: Wed, 28 Mar 2018 20:33:18 +0100 Subject: [PATCH] Add better rounded value for FLDLN2. Fixes rendering in Zone Raiders. --- src/codegen_ops_fpu.h | 9 ++++++++- src/x87_ops.h | 15 +++++++++++++++ src/x87_ops_misc.h | 2 +- 3 files changed, 24 insertions(+), 2 deletions(-) diff --git a/src/codegen_ops_fpu.h b/src/codegen_ops_fpu.h index de7cf4c..5065094 100644 --- a/src/codegen_ops_fpu.h +++ b/src/codegen_ops_fpu.h @@ -634,5 +634,12 @@ opFLDimm(L2T, 3.3219280948873623) opFLDimm(L2E, 1.4426950408889634); opFLDimm(PI, 3.141592653589793); opFLDimm(EG2, 0.3010299956639812); -opFLDimm(LN2, 0.693147180559945); opFLDimm(Z, 0.0) + +static uint32_t ropFLDLN2(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint32_t op_pc, codeblock_t *block) +{ + FP_ENTER(); + FP_LOAD_IMM_Q(0x3fe62e42fefa39f0ull); + + return op_pc; +} diff --git a/src/x87_ops.h b/src/x87_ops.h index 1bb5fd5..dc15866 100644 --- a/src/x87_ops.h +++ b/src/x87_ops.h @@ -43,6 +43,21 @@ static inline void x87_push(double i) cpu_state.tag[cpu_state.TOP&7] = (i == 0.0) ? 1 : 0; } +static inline void x87_push_u64(uint64_t i) +{ + union + { + double d; + uint64_t ll; + } td; + + td.ll = i; + + cpu_state.TOP=(cpu_state.TOP-1)&7; + cpu_state.ST[cpu_state.TOP] = td.d; + cpu_state.tag[cpu_state.TOP&7] = (td.d == 0.0) ? 1 : 0; +} + static inline double x87_pop() { double t = cpu_state.ST[cpu_state.TOP]; diff --git a/src/x87_ops_misc.h b/src/x87_ops_misc.h index 806c4a6..4305487 100644 --- a/src/x87_ops_misc.h +++ b/src/x87_ops_misc.h @@ -460,7 +460,7 @@ static int opFLDLN2(uint32_t fetchdat) FP_ENTER(); cpu_state.pc++; if (fplog) pclog("FLDLN2\n"); - x87_push(0.693147180559945); + x87_push_u64(0x3fe62e42fefa39f0ull); CLOCK_CYCLES(8); return 0; }