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Added Hyundai Super-286TR emulation. Patch from EluanCM.

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This commit is contained in:
SarahW 2020-03-12 18:14:07 +00:00
commit a113e4546f
12 changed files with 362 additions and 3 deletions
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2
src/Makefile.am
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@ -32,7 +32,7 @@ codegen_ops_mmx_logic.c codegen_ops_mmx_pack.c codegen_ops_mmx_shift.c codegen_o
codegen_ops_logic.c codegen_ops_shift.c codegen_ops_misc.c codegen_ops_mov.c codegen_ops_stack.c codegen_reg.c \
codegen_timing_486.c codegen_timing_686.c codegen_timing_common.c codegen_timing_k6.c codegen_timing_pentium.c \
codegen_timing_winchip.c codegen_timing_winchip2.c compaq.c config.c cpu.c cpu_tables.c cs8230.c dells200.c device.c disc.c \
disc_fdi.c disc_img.c disc_sector.c dma.c esdi_at.c fdc.c fdc37c665.c fdc37c93x.c fdd.c fdi2raw.c gameport.c hdd.c hdd_esdi.c \
disc_fdi.c disc_img.c disc_sector.c dma.c esdi_at.c f82c710_upc.c fdc.c fdc37c665.c fdc37c93x.c fdd.c fdi2raw.c gameport.c hdd.c hdd_esdi.c \
hdd_file.c headland.c i430lx.c i430fx.c i430hx.c i430vx.c ide.c ide_atapi.c ide_sff8038i.c intel.c intel_flash.c io.c \
jim.c joystick_ch_flightstick_pro.c joystick_standard.c joystick_sw_pad.c joystick_tm_fcs.c keyboard.c \
keyboard_amstrad.c keyboard_at.c keyboard_olim24.c keyboard_pcjr.c keyboard_xt.c laserxt.c lpt.c lpt_dac.c lpt_dss.c \

2
src/Makefile.mingw-wx-sdl2
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@ -17,7 +17,7 @@ OBJ = 386.o 386_common.o 386_dynarec.o 386_dynarec_ops.o 808x.o 82091aa.o acc203
codegen_ops_mov.o codegen_ops_shift.o codegen_ops_stack.o codegen_reg.o codegen_timing_486.o \
codegen_timing_686.o codegen_timing_common.o codegen_timing_k6.o codegen_timing_pentium.o \
codegen_timing_winchip.o codegen_timing_winchip2.o compaq.o config.o cpu.o cpu_tables.o cs8230.o device.o \
dells200.o disc.o disc_fdi.o disc_img.o disc_sector.o dma.o esdi_at.o fdc.o fdc37c665.o fdc37c93x.o fdd.o \
dells200.o disc.o disc_fdi.o disc_img.o disc_sector.o dma.o esdi_at.o f82c710_upc.o fdc.o fdc37c665.o fdc37c93x.o fdd.o \
fdi2raw.o gameport.o hdd.o hdd_esdi.o hdd_file.o headland.o i430hx.o i430lx.o i430fx.o i430vx.o ide.o \
ide_atapi.o ide_sff8038i.o intel.o intel_flash.o io.o jim.o joystick_ch_flightstick_pro.o \
joystick_standard.o joystick_sw_pad.o joystick_tm_fcs.o keyboard.o keyboard_amstrad.o keyboard_at.o \

2
src/Makefile.mingw-wx-sdl2-network
View file

@ -17,7 +17,7 @@ OBJ = 386.o 386_common.o 386_dynarec.o 386_dynarec_ops.o 808x.o 82091aa.o acc203
codegen_ops_mov.o codegen_ops_shift.o codegen_ops_stack.o codegen_reg.o codegen_timing_486.o \
codegen_timing_686.o codegen_timing_common.o codegen_timing_k6.o codegen_timing_pentium.o \
codegen_timing_winchip.o codegen_timing_winchip2.o compaq.o config.o cpu.o cpu_tables.o cs8230.o device.o \
dells200.o disc.o disc_fdi.o disc_img.o disc_sector.o dma.o esdi_at.o fdc.o fdc37c665.o fdc37c93x.o fdd.o \
dells200.o disc.o disc_fdi.o disc_img.o disc_sector.o dma.o esdi_at.o f82c710_upc.o fdc.o fdc37c665.o fdc37c93x.o fdd.o \
fdi2raw.o gameport.o hdd.o hdd_esdi.o hdd_file.o headland.o i430hx.o i430lx.o i430fx.o i430vx.o ide.o \
ide_atapi.o ide_sff8038i.o intel.o intel_flash.o io.o jim.o joystick_ch_flightstick_pro.o \
joystick_standard.o joystick_sw_pad.o joystick_tm_fcs.o keyboard.o keyboard_amstrad.o keyboard_at.o \

1
src/cpu.h
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@ -121,6 +121,7 @@ extern CPU cpus_K6_SS7[];
extern CPU cpus_pcjr[];
extern CPU cpus_europc[];
extern CPU cpus_pc1512[];
extern CPU cpus_super286tr[];
extern CPU cpus_ibmat[];
extern CPU cpus_ibmxt286[];
extern CPU cpus_ps1_m2011[];

7
src/cpu_tables.c
View file

@ -112,6 +112,13 @@ CPU cpus_286[] =
{"", -1, 0, 0, 0, 0}
};
CPU cpus_super286tr[] =
{
/*286*/
{"286/12", CPU_286, fpus_80286, 3, 12000000, 1, 0, 0, 0, 0, 0, 3,3,3,3, 2},
{"", -1, 0, 0, 0, 0}
};
CPU cpus_ibmat[] =
{
/*286*/

323
src/f82c710_upc.c Normal file
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@ -0,0 +1,323 @@
/*
* Chips & Technologies F82C710 Universal Peripheral Controller (UPC)
*
* Copyright (c) 2020 Eluan Costa Miranda <eluancm@gmail.com> All rights reserved.
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
* =============================================================================
*
* This SuperIO chip is commonly seem paired with the Single-chip AT (SCAT)
* chip. Only the functionality needed for the Hyundai Super-286TR BIOS is
* implented for now.
*
* One of the goals of this chip was getting rid of jumpers and have everything
* configured by software, but there is no configuration for serial and
* parallel IRQs. Because of that, motherboards still supply jumpers for these
* two signals.
*
*/
#include "ibm.h"
#include "fdc.h"
#include "ide.h"
#include "io.h"
#include "lpt.h"
#include "serial.h"
typedef struct upc_t
{
int configuration_state; // state of algorithm to enter configuration mode
int configuration_mode;
uint16_t cri_addr; // cri = configuration index register, addr is even
uint16_t cap_addr; // cap = configuration access port, addr is odd and is cri_addr + 1
uint8_t cri; // currently indexed register
// these regs are not affected by reset
uint8_t regs[15]; // there are 16 indexes, but there is no need to store the last one which is: R = cri_addr / 4, W = exit config mode
int serial_irq;
int parallel_irq; // TODO: currently not implemented in PCem
} upc_t;
static upc_t upc;
void upc_update_ports(upc_t *upc)
{
serial1_remove();
serial2_remove();
lpt1_remove();
lpt2_remove();
fdc_remove();
ide_pri_disable();
ide_sec_disable();
if (upc->regs[0] & 0x4)
{
serial1_init(upc->regs[4] * 4, upc->serial_irq, 0);
pclog("UPC: UART at %04X, irq %d\n", upc->regs[4] * 4, upc->serial_irq);
}
else
pclog("UPC: UART disabled\n");
if (upc->regs[0] & 0x8)
{
lpt1_init(upc->regs[6] * 4);
pclog("UPC: PARALLEL at %04X, irq %d\n", upc->regs[6] * 4, upc->parallel_irq);
}
else
pclog("UPC: PARALLEL disabled\n");
if (upc->regs[12] & 0x80)
{
ide_pri_enable();
pclog("UPC: IDE enabled\n");
}
else
pclog("UPC: IDE disabled\n");
if (upc->regs[12] & 0x20)
{
fdc_add();
pclog("UPC: FDC enabled\n");
}
else
pclog("UPC: FDC disabled\n");
if ((upc->regs[0] & 0x60) != 0)
pclog("UPC: Oscillator control not implemented!\n");
if ((upc->regs[1] & 0x80) != 0)
pclog("UPC: Restricted serial reset not implemented!\n");
if ((upc->regs[1] & 0x80) != 0)
pclog("UPC: Restricted serial reset not implemented!\n");
if ((upc->regs[1] & 0x40) != 0)
pclog("UPC: Bidirectional parallel port support not implemented!\n");
if ((upc->regs[1] & 0x38) != 0)
pclog("UPC: UART force CTS, DSR, DCD not implemented!\n");
if ((upc->regs[2] & 0x70) != 0)
pclog("UPC: UART clock control not implemented!\n");
if (upc->regs[9] == 0xb0)
pclog("UPC: GPCS not implemented! (at default address: %04X)\n", upc->regs[9] * 4);
else if (upc->regs[9] != 0)
pclog("UPC: GPCS not implemented! (at address: %04X)\n", upc->regs[9] * 4);
if ((upc->regs[12] & 0x40) != 0)
pclog("UPC: IDE XT mode not implemented!\n");
if ((upc->regs[12] & 0x10) != 0)
pclog("UPC: FDC power down mode not implemented!\n");
if ((upc->regs[12] & 0x0C) != 0)
pclog("UPC: RTCCS not implemented!\n");
if ((upc->regs[12] & 0x01) != 0)
pclog("UPC: PS/2 mouse port power down not implemented!\n");
if (upc->regs[13] != 0)
pclog("UPC: PS/2 mouse port not implemented!\n");
if (upc->regs[14] != 0)
pclog("UPC: Test mode not implemented!\n");
// regs 10 and 11 not looked at
}
uint8_t upc_config_read(uint16_t port, void *priv)
{
upc_t *upc = (upc_t *)priv;
uint8_t temp = 0xff;
if (upc->configuration_mode)
{
if (port == upc->cri_addr)
{
temp = upc->cri;
}
else if (port == upc->cap_addr)
{
if (upc->cri == 0xf)
temp = upc->cri_addr / 4;
else
temp = upc->regs[upc->cri];
}
}
// pclog("UPC READ : %04X, %02X\n", port, temp);
return temp;
}
void upc_config_write(uint16_t port, uint8_t val, void *priv)
{
upc_t *upc = (upc_t *)priv;
int configuration_state_event = 0;
// pclog("UPC WRITE: %04X, %02X\n", port, val);
switch(port)
{
case 0x2fa:
if (upc->configuration_state == 0 && val == 0x55)
configuration_state_event = 1;
else if (upc->configuration_state == 4)
{
uint8_t addr_verify = upc->cri_addr / 4;
addr_verify += val;
if (addr_verify == 0xff)
{
upc->configuration_mode = 1;
// TODO: is the value of cri reset here or when exiting configuration mode?
io_sethandler(upc->cri_addr, 0x0002, upc_config_read, NULL, NULL, upc_config_write, NULL, NULL, upc);
pclog("UPC: in configuration mode at %04X\n", upc->cri_addr);
}
else
{
upc->configuration_mode = 0;
pclog("UPC: configuration mode failed (sum = %02X)\n", addr_verify);
}
}
break;
case 0x3fa:
if (upc->configuration_state == 1 && val == 0xaa)
configuration_state_event = 1;
else if (upc->configuration_state == 2 && val == 0x36)
configuration_state_event = 1;
else if (upc->configuration_state == 3)
{
upc->cri_addr = val * 4;
upc->cap_addr = upc->cri_addr + 1;
configuration_state_event = 1;
}
break;
default:
break;
}
if (upc->configuration_mode)
{
if (port == upc->cri_addr)
{
upc->cri = val & 0xf;
}
else if (port == upc->cap_addr)
{
if (upc->cri == 0xf)
{
pclog("UPC: exiting configuration mode\n");
upc->configuration_mode = 0;
io_removehandler(upc->cri_addr, 0x0002, upc_config_read, NULL, NULL, upc_config_write, NULL, NULL, upc);
upc_update_ports(upc); // TODO: any benefit in updating at each register write instead of when exiting config mode?
}
else
{
upc->regs[upc->cri] = val;
}
}
}
// TODO: is the state only reset when accessing 0x2fa and 0x3fa wrongly?
if ((port == 0x2fa || port == 0x3fa) && configuration_state_event)
upc->configuration_state++;
else
upc->configuration_state = 0;
}
static void *upc_init()
{
pclog("UPC INIT\n");
memset(&upc, 0, sizeof(upc));
upc.serial_irq = device_get_config_int("serial_irq");
upc.parallel_irq = device_get_config_int("parallel_irq");
// because of these addresses, serial ports must be 16450 without fifos
io_sethandler(0x02fa, 0x0001, NULL, NULL, NULL, upc_config_write, NULL, NULL, &upc);
io_sethandler(0x03fa, 0x0001, NULL, NULL, NULL, upc_config_write, NULL, NULL, &upc);
upc.regs[0] = 0x0c;
upc.regs[1] = 0x00;
upc.regs[2] = 0x00;
upc.regs[3] = 0x00;
upc.regs[4] = 0xfe;
upc.regs[5] = 0x00;
upc.regs[6] = 0x9e;
upc.regs[7] = 0x00;
upc.regs[8] = 0x00;
upc.regs[9] = 0xb0;
upc.regs[10] = 0x00;
upc.regs[11] = 0x00;
upc.regs[12] = 0xa0;
upc.regs[13] = 0x00;
upc.regs[14] = 0x00;
upc_update_ports(&upc);
return &upc;
}
static device_config_t upc_config[] =
{
{
.name = "serial_irq",
.description = "Serial Port IRQ",
.type = CONFIG_SELECTION,
.selection =
{
{
.description = "IRQ 4 (for address 0x3F8/COM1)",
.value = 4
},
{
.description = "IRQ 3 (for address 0x2F8/COM2)",
.value = 3
},
{
.description = "Disabled",
.value = 0 // TODO: see if this breaks PCem's PIC
}
},
.default_int = 4
},
{
.name = "parallel_irq",
.description = "Parallel Port IRQ",
.type = CONFIG_SELECTION,
.selection =
{
{
.description = "IRQ 7 (for address 0x378/LPTB)",
.value = 7
},
{
.description = "IRQ 5 (for address 0x278/LPTC)",
.value = 5
},
{
.description = "Disabled",
.value = 0 // TODO: see if this breaks PCem's PIC
}
},
.default_int = 7
},
// For the Hyundai Super-286TR, the only other jumper is the Color/Mono one and it's handled by the at keyboard controller code.
{
.type = -1
}
};
device_t f82c710_upc_device =
{
"F82C710 UPC",
0,
upc_init,
NULL,
NULL,
NULL,
NULL,
NULL,
upc_config
};

4
src/f82c710_upc.h Normal file
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@ -0,0 +1,4 @@
#include "device.h"
extern device_t f82c710_upc_device;

1
src/ibm.h
View file

@ -258,6 +258,7 @@ enum
ROM_IBMPS1_2133_451,
ROM_ECS_386_32,
ROM_LEDGE_MODELM,
ROM_HYUNDAI_SUPER286TR,
ROM_MAX
};

12
src/keyboard_at.c
View file

@ -639,6 +639,18 @@ void keyboard_at_write(uint16_t port, uint8_t val, void *priv)
case 0xe0: /*Read test inputs*/
keyboard_at_adddata(0x00);
break;
case 0xe8: /* Super-286TR: turbo ON */
// TODO: 0xe8 is always followed by 0xba
// TODO: I don't know where to call cpu_set_turbo(1) to avoid slow POST after ctrl-alt-del when on low speed (if this is the real behavior!)
if (romset == ROM_HYUNDAI_SUPER286TR)
cpu_set_turbo(1); // 12 MHz
break;
case 0xe9: /* Super-286TR: turbo OFF */
if (romset == ROM_HYUNDAI_SUPER286TR)
cpu_set_turbo(0); // 8 MHz
break;
case 0xef: /*??? - sent by AMI486*/
break;

7
src/mem_bios.c
View file

@ -379,6 +379,13 @@ int loadbios()
fclose(f);
return 1;
case ROM_HYUNDAI_SUPER286TR:
f=romfopen("super286tr/award.bin","rb");
if (!f) break;
romfread(rom,65536,1,f);
fclose(f);
return 1;
case ROM_GW286CT:
f=romfopen("gw286ct/2ctc001.bin","rb");
if (!f) break;

2
src/model.c
View file

@ -19,6 +19,7 @@
#include "device.h"
#include "cassette.h"
#include "dma.h"
#include "f82c710_upc.h"
#include "fdc.h"
#include "fdc37c665.h"
#include "fdc37c93x.h"
@ -177,6 +178,7 @@ MODEL models[] =
{"[286] Epson PC AX2e", ROM_EPSON_PCAX2E, "epson_pcax2e", { {"", cpus_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PS2, 256,15872, 128, at_init, NULL},
{"[286] Goldstar GDC-212M", ROM_GDC212M, "gdc212m", { {"", cpus_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_PS2|MODEL_HAS_IDE, 512, 4096, 512, at_scat_init, NULL},
{"[286] GW-286CT GEAR", ROM_GW286CT, "gw286ct", { {"", cpus_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT, 512,16384, 128, at_scat_init, NULL},
{"[286] Hyundai Super-286TR", ROM_HYUNDAI_SUPER286TR, "super286tr", { {"AMD", cpus_super286tr}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT|MODEL_HAS_IDE, 1024, 4096, 128, at_scat_init, &f82c710_upc_device},
{"[286] IBM AT", ROM_IBMAT, "ibmat", { {"", cpus_ibmat}, {"", NULL}, {"", NULL}}, MODEL_GFX_NONE|MODEL_AT, 256,15872, 128, ibm_at_init, NULL},
{"[286] IBM PS/1 model 2011", ROM_IBMPS1_2011, "ibmps1es", { {"", cpus_ps1_m2011}, {"", NULL}, {"", NULL}}, MODEL_GFX_FIXED|MODEL_AT|MODEL_PS2, 512,16384, 512, ps1_m2011_init, NULL},
{"[286] IBM PS/2 Model 30-286", ROM_IBMPS2_M30_286, "ibmps2_m30_286", { {"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}}, MODEL_GFX_FIXED|MODEL_AT|MODEL_PS2, 1, 16, 1, ps2_m30_286_init, NULL},

2
src/nvr.c
View file

@ -298,6 +298,7 @@ void loadnvr()
case ROM_TG286M: f = nvrfopen("tg286m.nvr", "rb"); nvrmask = 127; break;
case ROM_AWARD286: f = nvrfopen("award286.nvr", "rb"); nvrmask = 127; break;
case ROM_GDC212M: f = nvrfopen("gdc212m.nvr", "rb"); nvrmask = 127; break;
case ROM_HYUNDAI_SUPER286TR: f = nvrfopen("super286tr.nvr", "rb"); nvrmask = 127; break;
case ROM_GW286CT: f = nvrfopen("gw286ct.nvr", "rb"); nvrmask = 127; break;
case ROM_SPC4200P: f = nvrfopen("spc4200p.nvr", "rb"); nvrmask = 127; break;
case ROM_SPC4216P: f = nvrfopen("spc4216p.nvr", "rb"); nvrmask = 127; break;
@ -401,6 +402,7 @@ void savenvr()
case ROM_TG286M: f = nvrfopen("tg286m.nvr", "wb"); break;
case ROM_AWARD286: f = nvrfopen("award286.nvr", "wb"); break;
case ROM_GDC212M: f = nvrfopen("gdc212m.nvr", "wb"); break;
case ROM_HYUNDAI_SUPER286TR: f = nvrfopen("super286tr.nvr", "wb"); break;
case ROM_GW286CT: f = nvrfopen("gw286ct.nvr", "wb"); break;
case ROM_SPC4200P: f = nvrfopen("spc4200p.nvr", "wb"); break;
case ROM_SPC4216P: f = nvrfopen("spc4216p.nvr", "wb"); break;