Add PS/2 Model 50 emulation.
This commit also adds basic MCA emulation. This commit also adds emulation of the PS/2 Type 1 DMA controller.
This commit is contained in:
SarahW
parent
2ad4ebc253
commit
9c1d8e5022
29 changed files with 911 additions and 95 deletions
299
src/dma.c
299
src/dma.c
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@ -7,9 +7,7 @@
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#include "video.h"
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static uint8_t dmaregs[16];
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static int dmaon[4];
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static uint8_t dma16regs[16];
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static int dma16on[4];
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static uint8_t dmapages[16];
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void dma_reset()
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@ -52,7 +50,7 @@ uint8_t dma_read(uint16_t addr, void *priv)
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dma.wp ^= 1;
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if (dma.wp)
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return dma.ac[(addr >> 1) & 3] & 0xff;
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return dma.ac[(addr >> 1) & 3] >> 8;
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return (dma.ac[(addr >> 1) & 3] >> 8) & 0xff;
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case 1: case 3: case 5: case 7: /*Count registers*/
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dma.wp ^= 1;
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@ -80,10 +78,10 @@ void dma_write(uint16_t addr, uint8_t val, void *priv)
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{
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case 0: case 2: case 4: case 6: /*Address registers*/
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dma.wp ^= 1;
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if (dma.wp) dma.ab[(addr >> 1) & 3] = (dma.ab[(addr >> 1) & 3] & 0xff00) | val;
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else dma.ab[(addr >> 1) & 3] = (dma.ab[(addr >> 1) & 3] & 0x00ff) | (val << 8);
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if (dma.wp) dma.ab[(addr >> 1) & 3] = (dma.ab[(addr >> 1) & 3] & 0xffff00) | val;
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else dma.ab[(addr >> 1) & 3] = (dma.ab[(addr >> 1) & 3] & 0xff00ff) | (val << 8);
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dma.ac[(addr >> 1) & 3] = dma.ab[(addr >> 1) & 3];
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dmaon[(addr >> 1) & 3] = 1;
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// pclog("Addr = %04x\n", dma.ab[(addr >> 1) & 3]);
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return;
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case 1: case 3: case 5: case 7: /*Count registers*/
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@ -91,7 +89,6 @@ void dma_write(uint16_t addr, uint8_t val, void *priv)
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if (dma.wp) dma.cb[(addr >> 1) & 3] = (dma.cb[(addr >> 1) & 3] & 0xff00) | val;
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else dma.cb[(addr >> 1) & 3] = (dma.cb[(addr >> 1) & 3] & 0x00ff) | (val << 8);
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dma.cc[(addr >> 1) & 3] = dma.cb[(addr >> 1) & 3];
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dmaon[(addr >> 1) & 3] = 1;
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return;
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case 8: /*Control register*/
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@ -122,6 +119,155 @@ void dma_write(uint16_t addr, uint8_t val, void *priv)
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}
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}
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static uint8_t dma_ps2_read(uint16_t addr, void *priv)
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{
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uint8_t temp;
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switch (addr)
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{
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case 0x1a:
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switch (dma.xfr_command)
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{
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case 2: /*Address*/
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switch (dma.byte_ptr)
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{
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case 0:
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temp = (dma.xfr_channel & 4) ? (dma16.ac[dma.xfr_channel & 3] & 0xff) : (dma.ac[dma.xfr_channel] & 0xff);
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dma.byte_ptr = 1;
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break;
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case 1:
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temp = (dma.xfr_channel & 4) ? (dma16.ac[dma.xfr_channel & 3] >> 8) : (dma.ac[dma.xfr_channel] >> 8);
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dma.byte_ptr = 2;
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break;
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case 2:
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temp = (dma.xfr_channel & 4) ? (dma16.ac[dma.xfr_channel & 3] >> 16) : (dma.ac[dma.xfr_channel] >> 16);
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dma.byte_ptr = 0;
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break;
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}
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break;
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case 4: /*Count*/
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if (dma.byte_ptr)
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temp = (dma.xfr_channel & 4) ? (dma16.cc[dma.xfr_channel & 3] >> 8) : (dma.cc[dma.xfr_channel] >> 8);
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else
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temp = (dma.xfr_channel & 4) ? (dma16.cc[dma.xfr_channel & 3] & 0xff) : (dma.cc[dma.xfr_channel] & 0xff);
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dma.byte_ptr = (dma.byte_ptr + 1) & 1;
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break;
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case 7: /*Mode*/
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temp = (dma.xfr_channel & 4) ? dma16.mode[dma.xfr_channel & 3] : dma.mode[dma.xfr_channel];
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break;
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default:
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fatal("Bad XFR Read command %i channel %i\n", dma.xfr_command, dma.xfr_channel);
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}
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break;
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}
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// pclog("Read DMA %04X %04X:%04X %02X\n",addr,CS,pc, temp);
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return temp;
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}
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static void dma_ps2_write(uint16_t addr, uint8_t val, void *priv)
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{
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uint8_t mode;
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// pclog("Write PS2 DMA %04X %02X %04X:%04X\n",addr,val,CS,cpu_state.pc);
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switch (addr)
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{
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case 0x18:
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dma.xfr_channel = val & 0x7;
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dma.xfr_command = val >> 4;
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dma.byte_ptr = 0;
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switch (dma.xfr_command)
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{
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case 9: /*Set DMA mask*/
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if (dma.xfr_channel & 4)
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dma16.m |= (1 << (dma.xfr_channel & 3));
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else
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dma.m |= (1 << dma.xfr_channel);
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break;
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case 0xa: /*Reset DMA mask*/
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if (dma.xfr_channel & 4)
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dma16.m &= ~(1 << (dma.xfr_channel & 3));
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else
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dma.m &= ~(1 << dma.xfr_channel);
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break;
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}
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break;
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case 0x1a:
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switch (dma.xfr_command)
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{
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case 2: /*Address*/
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switch (dma.byte_ptr)
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{
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case 0:
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if (dma.xfr_channel & 4)
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dma16.ac[dma.xfr_channel & 3] = (dma16.ac[dma.xfr_channel & 3] & 0xffff00) | val;
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else
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dma.ac[dma.xfr_channel] = (dma.ac[dma.xfr_channel] & 0xffff00) | val;
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dma.byte_ptr = 1;
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break;
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case 1:
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if (dma.xfr_channel & 4)
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dma16.ac[dma.xfr_channel & 3] = (dma16.ac[dma.xfr_channel & 3] & 0xff00ff) | (val << 8);
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else
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dma.ac[dma.xfr_channel] = (dma.ac[dma.xfr_channel] & 0xff00ff) | (val << 8);
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dma.byte_ptr = 2;
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break;
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case 2:
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if (dma.xfr_channel & 4)
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dma16.ac[dma.xfr_channel & 3] = (dma16.ac[dma.xfr_channel & 3] & 0x00ffff) | (val << 16);
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else
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dma.ac[dma.xfr_channel] = (dma.ac[dma.xfr_channel] & 0x00ffff) | (val << 16);
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dma.byte_ptr = 0;
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break;
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}
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break;
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case 4: /*Count*/
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if (dma.byte_ptr)
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{
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if (dma.xfr_channel & 4)
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dma16.cc[dma.xfr_channel & 3] = (dma16.cc[dma.xfr_channel & 3] & 0xff) | (val << 8);
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else
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dma.cc[dma.xfr_channel] = (dma.cc[dma.xfr_channel] & 0xff) | (val << 8);
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}
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else
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{
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if (dma.xfr_channel & 4)
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dma16.cc[dma.xfr_channel & 3] = (dma16.cc[dma.xfr_channel & 3] & 0xff00) | val;
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else
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dma.cc[dma.xfr_channel] = (dma.cc[dma.xfr_channel] & 0xff00) | val;
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}
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dma.byte_ptr = (dma.byte_ptr + 1) & 1;
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break;
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case 7: /*Mode register*/
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mode = 0;
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if (val & 0x10)
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mode |= 0x20;
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if ((val & 0xc) == 4)
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mode |= 8;
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else if ((val & 0xc) == 0xc)
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mode |= 4;
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if ((val & 0x40) && !(dma.xfr_channel & 4))
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fatal("16-bit DMA on 8-bit channel\n");
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if (!(val & 0x40) && (dma.xfr_channel & 4))
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fatal("8-bit DMA on 16-bit channel\n");
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if (dma.xfr_channel & 4)
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dma16.mode[dma.xfr_channel & 3] = mode;
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else
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dma.mode[dma.xfr_channel] = mode;
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break;
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default:
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fatal("Bad XFR command %i channel %i val %02x\n", dma.xfr_command, dma.xfr_channel, val);
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}
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break;
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}
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}
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uint8_t dma16_read(uint16_t addr, void *priv)
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{
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uint8_t temp;
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@ -131,9 +277,15 @@ uint8_t dma16_read(uint16_t addr, void *priv)
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{
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case 0: case 2: case 4: case 6: /*Address registers*/
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dma16.wp ^= 1;
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if (dma.is_ps2)
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{
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if (dma16.wp)
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return dma16.ac[(addr >> 1) & 3] & 0xff;
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return (dma16.ac[(addr >> 1) & 3] >> 8) & 0xff;
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}
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if (dma16.wp)
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return dma16.ac[(addr >> 1) & 3] & 0xff;
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return dma16.ac[(addr >> 1) & 3] >> 8;
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return (dma16.ac[(addr >> 1) & 3] >> 1) & 0xff;
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return (dma16.ac[(addr >> 1) & 3] >> 9) & 0xff;
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case 1: case 3: case 5: case 7: /*Count registers*/
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dma16.wp ^= 1;
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@ -158,10 +310,17 @@ void dma16_write(uint16_t addr, uint8_t val, void *priv)
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{
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case 0: case 2: case 4: case 6: /*Address registers*/
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dma16.wp ^= 1;
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if (dma16.wp) dma16.ab[(addr >> 1) & 3] = (dma16.ab[(addr >> 1) & 3] & 0xff00) | val;
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else dma16.ab[(addr >> 1) & 3] = (dma16.ab[(addr >> 1) & 3] & 0x00ff) | (val << 8);
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if (dma.is_ps2)
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{
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if (dma16.wp) dma16.ab[(addr >> 1) & 3] = (dma16.ab[(addr >> 1) & 3] & 0xffff00) | val;
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else dma16.ab[(addr >> 1) & 3] = (dma16.ab[(addr >> 1) & 3] & 0xff00ff) | (val << 8);
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}
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else
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{
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if (dma16.wp) dma16.ab[(addr >> 1) & 3] = (dma16.ab[(addr >> 1) & 3] & 0xfffe00) | (val << 1);
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else dma16.ab[(addr >> 1) & 3] = (dma16.ab[(addr >> 1) & 3] & 0xfe01ff) | (val << 9);
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}
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dma16.ac[(addr >> 1) & 3] = dma16.ab[(addr >> 1) & 3];
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dma16on[(addr >> 1) & 3] = 1;
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return;
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case 1: case 3: case 5: case 7: /*Count registers*/
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@ -169,7 +328,6 @@ void dma16_write(uint16_t addr, uint8_t val, void *priv)
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if (dma16.wp) dma16.cb[(addr >> 1) & 3] = (dma16.cb[(addr >> 1) & 3] & 0xff00) | val;
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else dma16.cb[(addr >> 1) & 3] = (dma16.cb[(addr >> 1) & 3] & 0x00ff) | (val << 8);
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dma16.cc[(addr >> 1) & 3] = dma16.cb[(addr >> 1) & 3];
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dma16on[(addr >> 1) & 3] = 1;
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return;
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case 8: /*Control register*/
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@ -207,15 +365,38 @@ void dma_page_write(uint16_t addr, uint8_t val, void *priv)
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{
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case 1:
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dma.page[2] = (AT) ? val : val & 0xf;
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dma.ab[2] = (dma.ab[2] & 0xffff) | (dma.page[2] << 16);
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dma.ac[2] = (dma.ac[2] & 0xffff) | (dma.page[2] << 16);
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break;
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case 2:
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dma.page[3] = (AT) ? val : val & 0xf;
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dma.ab[3] = (dma.ab[3] & 0xffff) | (dma.page[3] << 16);
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dma.ac[3] = (dma.ac[3] & 0xffff) | (dma.page[3] << 16);
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break;
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case 3:
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dma.page[1] = (AT) ? val : val & 0xf;
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dma.ab[1] = (dma.ab[1] & 0xffff) | (dma.page[1] << 16);
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dma.ac[1] = (dma.ac[1] & 0xffff) | (dma.page[1] << 16);
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break;
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case 7:
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dma.page[0] = (AT) ? val : val & 0xf;
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dma.ab[0] = (dma.ab[0] & 0xffff) | (dma.page[0] << 16);
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dma.ac[0] = (dma.ac[0] & 0xffff) | (dma.page[0] << 16);
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break;
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case 0x9:
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dma16.page[2] = val & 0xfe;
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dma16.ab[2] = (dma16.ab[2] & 0x1ffff) | (dma16.page[2] << 16);
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dma16.ac[2] = (dma16.ac[2] & 0x1ffff) | (dma16.page[2] << 16);
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break;
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case 0xa:
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dma16.page[3] = val & 0xfe;
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dma16.ab[3] = (dma16.ab[3] & 0x1ffff) | (dma16.page[3] << 16);
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dma16.ac[3] = (dma16.ac[3] & 0x1ffff) | (dma16.page[3] << 16);
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break;
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case 0xb:
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dma16.page[1] = val;
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dma16.page[1] = val & 0xfe;
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dma16.ab[1] = (dma16.ab[1] & 0x1ffff) | (dma16.page[1] << 16);
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dma16.ac[1] = (dma16.ac[1] & 0x1ffff) | (dma16.page[1] << 16);
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break;
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}
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}
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@ -229,6 +410,7 @@ void dma_init()
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{
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io_sethandler(0x0000, 0x0010, dma_read, NULL, NULL, dma_write, NULL, NULL, NULL);
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io_sethandler(0x0080, 0x0008, dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL);
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dma.is_ps2 = 0;
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}
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void dma16_init()
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@ -237,10 +419,18 @@ void dma16_init()
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io_sethandler(0x0088, 0x0008, dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL);
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}
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void ps2_dma_init()
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{
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io_sethandler(0x0018, 0x0001, dma_ps2_read, NULL, NULL, dma_ps2_write, NULL, NULL, NULL);
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io_sethandler(0x001a, 0x0001, dma_ps2_read, NULL, NULL, dma_ps2_write, NULL, NULL, NULL);
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dma.is_ps2 = 1;
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}
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uint8_t _dma_read(uint32_t addr)
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{
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return mem_readb_phys(addr);
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uint8_t temp = mem_readb_phys(addr);
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return temp;
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}
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void _dma_write(uint32_t addr, uint8_t val)
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@ -267,10 +457,22 @@ int dma_channel_read(int channel)
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if ((dma.mode[channel] & 0xC) != 8)
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return DMA_NODATA;
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temp = _dma_read(dma.ac[channel] + (dma.page[channel] << 16)); //ram[(dma.ac[2]+(dma.page[2]<<16))&rammask];
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temp = _dma_read(dma.ac[channel]);
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if (dma.mode[channel] & 0x20) dma.ac[channel]--;
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else dma.ac[channel]++;
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if (dma.mode[channel] & 0x20)
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{
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if (dma.is_ps2)
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dma.ac[channel]--;
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else
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dma.ac[channel] = (dma.ac[channel] & 0xff0000) | ((dma.ac[channel] - 1) & 0xffff);
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}
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else
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{
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if (dma.is_ps2)
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dma.ac[channel]++;
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else
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dma.ac[channel] = (dma.ac[channel] & 0xff0000) | ((dma.ac[channel] + 1) & 0xffff);
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}
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dma.cc[channel]--;
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if (dma.cc[channel] < 0)
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{
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@ -297,11 +499,24 @@ int dma_channel_read(int channel)
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if ((dma16.mode[channel] & 0xC) != 8)
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return DMA_NODATA;
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temp = _dma_read((dma16.ac[channel] << 1) + ((dma16.page[channel] & ~1) << 16)) |
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(_dma_read((dma16.ac[channel] << 1) + ((dma16.page[channel] & ~1) << 16) + 1) << 8);
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temp = _dma_read(dma16.ac[channel]) |
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(_dma_read(dma16.ac[channel] + 1) << 8);
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if (dma16.mode[channel] & 0x20)
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{
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if (dma.is_ps2)
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dma16.ac[channel] -= 2;
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else
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dma16.ac[channel] = (dma16.ac[channel] & 0xfe0000) | ((dma16.ac[channel] - 2) & 0x1ffff);
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}
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else
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{
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if (dma.is_ps2)
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dma16.ac[channel] += 2;
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else
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dma16.ac[channel] = (dma16.ac[channel] & 0xfe0000) | ((dma16.ac[channel] + 2) & 0x1ffff);
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}
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if (dma16.mode[channel] & 0x20) dma16.ac[channel]--;
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else dma16.ac[channel]++;
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dma16.cc[channel]--;
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if (dma16.cc[channel] < 0)
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{
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@ -337,10 +552,23 @@ int dma_channel_write(int channel, uint16_t val)
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if ((dma.mode[channel] & 0xC) != 4)
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return DMA_NODATA;
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_dma_write(dma.ac[channel] + (dma.page[channel] << 16), val);
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_dma_write(dma.ac[channel], val);
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if (dma.mode[channel] & 0x20)
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{
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if (dma.is_ps2)
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dma.ac[channel]--;
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else
|
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dma.ac[channel] = (dma.ac[channel] & 0xff0000) | ((dma.ac[channel] - 1) & 0xffff);
|
||||
}
|
||||
else
|
||||
{
|
||||
if (dma.is_ps2)
|
||||
dma.ac[channel]++;
|
||||
else
|
||||
dma.ac[channel] = (dma.ac[channel] & 0xff0000) | ((dma.ac[channel] + 1) & 0xffff);
|
||||
}
|
||||
|
||||
if (dma.mode[channel]&0x20) dma.ac[channel]--;
|
||||
else dma.ac[channel]++;
|
||||
dma.cc[channel]--;
|
||||
if (dma.cc[channel] < 0)
|
||||
{
|
||||
|
|
@ -365,11 +593,24 @@ int dma_channel_write(int channel, uint16_t val)
|
|||
if ((dma16.mode[channel] & 0xC) != 4)
|
||||
return DMA_NODATA;
|
||||
|
||||
_dma_write((dma16.ac[channel] << 1) + ((dma16.page[channel] & ~1) << 16), val);
|
||||
_dma_write((dma16.ac[channel] << 1) + ((dma16.page[channel] & ~1) << 16) + 1, val >> 8);
|
||||
_dma_write(dma16.ac[channel], val);
|
||||
_dma_write(dma16.ac[channel] + 1, val >> 8);
|
||||
|
||||
if (dma16.mode[channel] & 0x20)
|
||||
{
|
||||
if (dma.is_ps2)
|
||||
dma16.ac[channel] -= 2;
|
||||
else
|
||||
dma16.ac[channel] = (dma16.ac[channel] & 0xfe0000) | ((dma16.ac[channel] - 2) & 0x1ffff);
|
||||
}
|
||||
else
|
||||
{
|
||||
if (dma.is_ps2)
|
||||
dma16.ac[channel] += 2;
|
||||
else
|
||||
dma16.ac[channel] = (dma16.ac[channel] & 0xfe0000) | ((dma16.ac[channel] + 2) & 0x1ffff);
|
||||
}
|
||||
|
||||
if (dma16.mode[channel]&0x20) dma16.ac[channel]--;
|
||||
else dma16.ac[channel]++;
|
||||
dma16.cc[channel]--;
|
||||
if (dma16.cc[channel] < 0)
|
||||
{
|
||||
|
|
|
|||
Loading…
Reference in a new issue