Minor memory optimisations.
This commit is contained in:
parent
a66dddfb43
commit
9ba75bd910
5 changed files with 46 additions and 90 deletions
84
src/mem.c
84
src/mem.c
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@ -424,20 +424,8 @@ int loadbios()
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uint32_t mmucache[0x100000];
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int mmucaches[64];
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int mmunext=0;
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int abrt=0;
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void initmmucache()
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{
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int c;
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// if (output) pclog("initmmucache\n");
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memset(mmucache,0xFF,sizeof(mmucache));
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for (c=0;c<64;c++) mmucaches[c]=0xFFFFFFFF;
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mmunext=0;
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}
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void resetreadlookup()
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{
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int c;
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@ -488,15 +476,6 @@ void flushmmucache()
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// memset(writelookup,0xFF,sizeof(writelookup));
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// memset(writelookup2,0xFF,1024*1024*4);
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/* if (!(cr0>>31)) return;*/
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for (c=0;c<64;c++)
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{
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if (mmucaches[c]!=0xFFFFFFFF)
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{
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mmucache[mmucaches[c]]=0xFFFFFFFF;
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mmucaches[c]=0xFFFFFFFF;
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}
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}
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// pclog("Flush MMU cache\n");
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/* for (c = 0; c < 1024*1024; c++)
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{
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@ -531,15 +510,6 @@ void flushmmucache_nopc()
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writelookup[c]=0xFFFFFFFF;
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}
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}
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mmuflush++;
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for (c=0;c<64;c++)
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{
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if (mmucaches[c]!=0xFFFFFFFF)
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{
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mmucache[mmucaches[c]]=0xFFFFFFFF;
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mmucaches[c]=0xFFFFFFFF;
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}
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}
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}
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void flushmmucache_cr3()
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@ -559,15 +529,6 @@ void flushmmucache_cr3()
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writelookup[c]=0xFFFFFFFF;
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}
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}
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for (c=0;c<64;c++)
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{
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if (mmucaches[c]!=0xFFFFFFFF)
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{
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mmucache[mmucaches[c]]=0xFFFFFFFF;
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mmucaches[c]=0xFFFFFFFF;
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}
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}
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/* for (c = 0; c < 1024*1024; c++)
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{
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if (readlookup2[c] != 0xFFFFFFFF)
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@ -586,8 +547,10 @@ void flushmmucache_cr3()
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}
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extern int output;
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#define mmutranslate(addr,rw) mmutranslatereal(addr,rw)
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//#define mmutranslate(addr,rw) ((mmucache[addr>>12]!=0xFFFFFFFF)?(mmucache[addr>>12]+(addr&0xFFF)):mmutranslatereal(addr,rw))
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#define mmutranslate_read(addr) mmutranslatereal(addr,0)
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#define mmutranslate_write(addr) mmutranslatereal(addr,1)
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int pctrans=0;
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extern uint32_t testr[9];
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@ -596,6 +559,7 @@ uint32_t mmutranslatereal(uint32_t addr, int rw)
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{
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uint32_t addr2;
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uint32_t temp,temp2,temp3;
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if (abrt)
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{
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// pclog("Translate recursive abort\n");
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@ -707,7 +671,7 @@ void addreadlookup(uint32_t virt, uint32_t phys)
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readlookup2[readlookup[readlnext]]=0xFFFFFFFF;
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// readlnum--;
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}
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readlookup2[virt>>12]=phys&~0xFFF;
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readlookup2[virt>>12] = (uint32_t)&ram[(phys & ~0xFFF) - (virt & ~0xfff)];
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readlookupp[readlnext]=mmu_perm;
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readlookup[readlnext++]=virt>>12;
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readlnext&=(cachesize-1);
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@ -748,7 +712,7 @@ void addwritelookup(uint32_t virt, uint32_t phys)
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writelookup2[writelookup[writelnext]]=0xFFFFFFFF;
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// writelnum--;
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}
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writelookup2[virt>>12]=phys&~0xFFF;
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writelookup2[virt>>12] = (uint32_t)&ram[(phys & ~0xFFF) - (virt & ~0xfff)];
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writelookupp[writelnext]=mmu_perm;
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writelookup[writelnext++]=virt>>12;
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writelnext&=(cachesize-1);
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@ -764,7 +728,7 @@ uint8_t *getpccache(uint32_t a)
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{
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// if (output==3) pclog("Translate GetPCCache %08X\n",a);
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pctrans=1;
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a=mmutranslate(a,0);
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a = mmutranslate_read(a);
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pctrans=0;
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// if (output==3) pclog("GetPCCache output %08X\n",a);
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if (a==0xFFFFFFFF) return ram;
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@ -816,7 +780,7 @@ uint8_t readmembl(uint32_t addr)
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mem_logical_addr = addr;
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if (cr0 >> 31)
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{
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addr = mmutranslate(addr, 0);
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addr = mmutranslate_read(addr);
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if (addr == 0xFFFFFFFF) return 0xFF;
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}
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addr &= rammask;
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@ -832,7 +796,7 @@ void writemembl(uint32_t addr, uint8_t val)
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if (cr0 >> 31)
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{
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addr = mmutranslate(addr,1);
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addr = mmutranslate_write(addr);
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if (addr == 0xFFFFFFFF) return;
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}
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addr &= rammask;
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@ -857,7 +821,7 @@ uint8_t readmemb386l(uint32_t seg, uint32_t addr)
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if (cr0 >> 31)
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{
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addr = mmutranslate(addr, 0);
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addr = mmutranslate_read(addr);
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if (addr == 0xFFFFFFFF) return 0xFF;
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}
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@ -880,7 +844,7 @@ void writememb386l(uint32_t seg, uint32_t addr, uint8_t val)
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mem_logical_addr = addr = addr + seg;
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if (cr0 >> 31)
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{
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addr = mmutranslate(addr, 1);
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addr = mmutranslate_write(addr);
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if (addr == 0xFFFFFFFF) return;
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}
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@ -900,8 +864,8 @@ uint16_t readmemwl(uint32_t seg, uint32_t addr)
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{
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if (cr0>>31)
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{
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if (mmutranslate(addr2, 0) == 0xffffffff) return 0xffff;
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if (mmutranslate(addr2+1, 0) == 0xffffffff) return 0xffff;
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if (mmutranslate_read(addr2) == 0xffffffff) return 0xffff;
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if (mmutranslate_read(addr2+1) == 0xffffffff) return 0xffff;
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}
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if (is386) return readmemb386l(seg,addr)|(readmemb386l(seg,addr+1)<<8);
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else return readmembl(seg+addr)|(readmembl(seg+addr+1)<<8);
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@ -914,7 +878,7 @@ uint16_t readmemwl(uint32_t seg, uint32_t addr)
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}
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if (cr0>>31)
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{
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addr2=mmutranslate(addr2,0);
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addr2 = mmutranslate_read(addr2);
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if (addr2==0xFFFFFFFF) return 0xFFFF;
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}
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@ -938,8 +902,8 @@ void writememwl(uint32_t seg, uint32_t addr, uint16_t val)
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{
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if (cr0>>31)
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{
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if (mmutranslate(addr2, 1) == 0xffffffff) return;
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if (mmutranslate(addr2+1, 1) == 0xffffffff) return;
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if (mmutranslate_write(addr2) == 0xffffffff) return;
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if (mmutranslate_write(addr2+1) == 0xffffffff) return;
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}
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if (is386)
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{
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@ -962,7 +926,7 @@ void writememwl(uint32_t seg, uint32_t addr, uint16_t val)
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}
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if (cr0>>31)
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{
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addr2=mmutranslate(addr2,1);
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addr2 = mmutranslate_write(addr2);
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if (addr2==0xFFFFFFFF) return;
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}
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@ -993,8 +957,8 @@ uint32_t readmemll(uint32_t seg, uint32_t addr)
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{
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if (cr0>>31)
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{
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if (mmutranslate(addr2, 0) == 0xffffffff) return 0xffffffff;
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if (mmutranslate(addr2+3, 0) == 0xffffffff) return 0xffffffff;
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if (mmutranslate_read(addr2) == 0xffffffff) return 0xffffffff;
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if (mmutranslate_read(addr2+3) == 0xffffffff) return 0xffffffff;
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}
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return readmemwl(seg,addr)|(readmemwl(seg,addr+2)<<16);
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}
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@ -1008,7 +972,7 @@ uint32_t readmemll(uint32_t seg, uint32_t addr)
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if (cr0>>31)
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{
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addr2=mmutranslate(addr2,0);
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addr2 = mmutranslate_read(addr2);
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if (addr2==0xFFFFFFFF) return 0xFFFFFFFF;
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}
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@ -1032,8 +996,8 @@ void writememll(uint32_t seg, uint32_t addr, uint32_t val)
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{
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if (cr0>>31)
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{
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if (mmutranslate(addr2, 1) == 0xffffffff) return;
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if (mmutranslate(addr2+3, 1) == 0xffffffff) return;
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if (mmutranslate_write(addr2) == 0xffffffff) return;
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if (mmutranslate_write(addr2+3) == 0xffffffff) return;
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}
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writememwl(seg,addr,val);
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writememwl(seg,addr+2,val>>16);
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@ -1047,7 +1011,7 @@ void writememll(uint32_t seg, uint32_t addr, uint32_t val)
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}
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if (cr0>>31)
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{
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addr2=mmutranslate(addr2,1);
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addr2 = mmutranslate_write(addr2);
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if (addr2==0xFFFFFFFF) return;
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}
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