Added initial emulation of FIC VA-503+ (Super 7).
This includes preliminary emulation of the VIA MVP3 northbridge, VT82C586B 'PIPC' southbridge, and Winbond W83877TF SuperIO chip.
This commit is contained in:
SarahW
parent
d5f07a8594
commit
99ca11d148
10 changed files with 765 additions and 2 deletions
310
src/vt82c586b.c
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310
src/vt82c586b.c
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#include <string.h>
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#include "ibm.h"
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#include "io.h"
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#include "mem.h"
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#include "pci.h"
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#include "x86.h"
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#include "vt82c586b.h"
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static struct
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{
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uint8_t pci_isa_bridge_regs[256];
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uint8_t ide_regs[256];
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uint8_t usb_regs[256];
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uint8_t power_regs[256];
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uint8_t sysctrl;
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} vt82c586b;
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static uint8_t vt82c586b_read(int func, int addr, void *priv)
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{
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switch (func)
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{
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case 0:
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return vt82c586b.pci_isa_bridge_regs[addr];
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case 1:
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return vt82c586b.ide_regs[addr];
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case 2:
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return vt82c586b.usb_regs[addr];
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case 3:
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return vt82c586b.power_regs[addr];
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default:
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return 0xff;
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}
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}
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static void vt82c586b_pci_isa_bridge_write(int addr, uint8_t val)
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{
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/*Read-only addresses*/
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if ((addr < 4) || (addr == 5) || (addr == 6)
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|| (addr >= 8 && addr < 0x40)
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|| (addr == 0x49)
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|| (addr == 0x4b)
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|| (addr >= 0x51 && addr < 0x54)
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|| (addr >= 0x5d && addr < 0x60)
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|| (addr >= 0x68 && addr < 0x6a)
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|| (addr >= 0x71))
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return;
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switch (addr)
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{
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case 4:
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vt82c586b.pci_isa_bridge_regs[4] = (val & 8) | 7;
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break;
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case 6:
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vt82c586b.pci_isa_bridge_regs[6] &= ~(val & 0xb0);
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break;
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case 0x47:
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if ((val & 0x81) == 0x81)
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resetx86();
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vt82c586b.pci_isa_bridge_regs[0x47] = val & 0xfe;
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break;
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case 0x55:
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if (!(val & 0xf0))
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pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED);
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else
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pci_set_irq_routing(PCI_INTD, val >> 4);
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vt82c586b.pci_isa_bridge_regs[0x55] = val;
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break;
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case 0x56:
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if (!(val & 0xf0))
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pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED);
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else
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pci_set_irq_routing(PCI_INTA, val >> 4);
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if (!(val & 0x0f))
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pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED);
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else
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pci_set_irq_routing(PCI_INTB, val & 0xf);
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vt82c586b.pci_isa_bridge_regs[0x56] = val;
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break;
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case 0x57:
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if (!(val & 0xf0))
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pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED);
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else
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pci_set_irq_routing(PCI_INTC, val >> 4);
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vt82c586b.pci_isa_bridge_regs[0x57] = val;
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break;
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default:
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vt82c586b.pci_isa_bridge_regs[addr] = val;
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break;
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}
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}
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static void vt82c586b_ide_write(int addr, uint8_t val)
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{
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/*Read-only addresses*/
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if ((addr < 6) || (addr == 8)
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|| (addr >= 0xa && addr < 0x0d)
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|| (addr >= 0x0e && addr < 0x20)
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|| (addr >= 0x22 && addr < 0x3c)
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|| (addr >= 0x3d && addr < 0x40)
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|| (addr >= 0x54 && addr < 0x60)
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|| (addr >= 0x52 && addr < 0x68)
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|| (addr >= 0x62))
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return;
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switch (addr)
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{
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case 4:
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vt82c586b.ide_regs[4] = (val & 8) | 7;
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break;
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case 6:
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vt82c586b.ide_regs[6] &= ~(val & 0xb0);
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break;
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case 9:
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vt82c586b.ide_regs[9] = (vt82c586b.pci_isa_bridge_regs[9] & ~0x70) | 0x8a;
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break;
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case 0x20:
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vt82c586b.ide_regs[0x20] = (val & ~0xf) | 1;
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break;
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default:
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vt82c586b.ide_regs[addr] = val;
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break;
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}
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}
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static void vt82c586b_usb_write(int addr, uint8_t val)
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{
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/*Read-only addresses*/
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if ((addr < 7) || (addr >= 8 && addr < 0xd)
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|| (addr >= 0xe && addr < 0x20)
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|| (addr >= 0x22 && addr < 0x3c)
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|| (addr >= 0x3e && addr < 0x40)
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|| (addr >= 0x42 && addr < 0x44)
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|| (addr >= 0x46 && addr < 0xc0)
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|| (addr >= 0xc2))
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return;
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switch (addr)
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{
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case 7:
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vt82c586b.usb_regs[7] = val & 0x7f;
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break;
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case 0x20:
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vt82c586b.usb_regs[0x20] = (val & ~0x1f) | 1;
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break;
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default:
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vt82c586b.usb_regs[addr] = val;
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break;
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}
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}
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static void vt82c586b_power_write(int addr, uint8_t val)
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{
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/*Read-only addresses*/
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if ((addr < 0xd) || (addr >= 0xe && addr < 0x40)
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|| (addr == 0x43)
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|| (addr == 0x48)
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|| (addr >= 0x4a && addr < 0x50)
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|| (addr >= 0x54))
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return;
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switch (addr)
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{
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default:
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vt82c586b.power_regs[addr] = val;
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break;
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}
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}
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static void vt82c586b_write(int func, int addr, uint8_t val, void *priv)
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{
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switch (func)
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{
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case 0:
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vt82c586b_pci_isa_bridge_write(addr, val);
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break;
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case 1:
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vt82c586b_ide_write(addr, val);
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break;
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case 2:
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vt82c586b_usb_write(addr, val);
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break;
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case 3:
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vt82c586b_power_write(addr, val);
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break;
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}
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}
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uint8_t vt82c586b_read_sysctrl(uint16_t port, void *p)
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{
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return vt82c586b.sysctrl;
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}
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void vt82c586b_write_sysctrl(uint16_t port, uint8_t val, void *p)
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{
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if ((mem_a20_alt ^ val) & 2)
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{
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mem_a20_alt = val & 2;
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mem_a20_recalc();
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}
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if ((~vt82c586b.sysctrl & val) & 1)
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{
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softresetx86();
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cpu_set_edx();
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}
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vt82c586b.sysctrl = val;
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}
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void vt82c586b_init(int card, int pci_a, int pci_b, int pci_c, int pci_d)
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{
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pci_add_specific(card, vt82c586b_read, vt82c586b_write, NULL);
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io_sethandler(0x0092, 0x0001, vt82c586b_read_sysctrl, NULL, NULL, vt82c586b_write_sysctrl, NULL, NULL, NULL);
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memset(&vt82c586b, 0, sizeof(vt82c586b));
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vt82c586b.pci_isa_bridge_regs[0x00] = 0x06; vt82c586b.pci_isa_bridge_regs[0x01] = 0x11; /*VIA*/
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vt82c586b.pci_isa_bridge_regs[0x02] = 0x86; vt82c586b.pci_isa_bridge_regs[0x03] = 0x05; /*VT82C586B*/
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vt82c586b.pci_isa_bridge_regs[0x04] = 0x0f; vt82c586b.pci_isa_bridge_regs[0x05] = 0x00;
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vt82c586b.pci_isa_bridge_regs[0x06] = 0x00; vt82c586b.pci_isa_bridge_regs[0x07] = 0x02;
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vt82c586b.pci_isa_bridge_regs[0x0a] = 0x01;
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vt82c586b.pci_isa_bridge_regs[0x0b] = 0x06;
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vt82c586b.pci_isa_bridge_regs[0x0e] = 0x80;
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/*ISA bus control*/
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vt82c586b.pci_isa_bridge_regs[0x48] = 0x01;
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vt82c586b.pci_isa_bridge_regs[0x4a] = 0x04;
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vt82c586b.pci_isa_bridge_regs[0x4f] = 0x03;
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/*Plug and Play control*/
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vt82c586b.pci_isa_bridge_regs[0x50] = 0x24;
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vt82c586b.pci_isa_bridge_regs[0x59] = 0x04;
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vt82c586b.ide_regs[0x00] = 0x06; vt82c586b.ide_regs[0x01] = 0x11; /*VIA*/
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vt82c586b.ide_regs[0x02] = 0x71; vt82c586b.ide_regs[0x03] = 0x05;
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vt82c586b.ide_regs[0x04] = 0x80; vt82c586b.ide_regs[0x05] = 0x00;
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vt82c586b.ide_regs[0x06] = 0x80; vt82c586b.ide_regs[0x07] = 0x02;
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vt82c586b.ide_regs[0x09] = 0x85;
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vt82c586b.ide_regs[0x0a] = 0x01;
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vt82c586b.ide_regs[0x0b] = 0x01;
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vt82c586b.ide_regs[0x10] = 0xf1; vt82c586b.ide_regs[0x11] = 0x01;
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vt82c586b.ide_regs[0x14] = 0xf5; vt82c586b.ide_regs[0x15] = 0x03;
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vt82c586b.ide_regs[0x18] = 0x71; vt82c586b.ide_regs[0x19] = 0x01;
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vt82c586b.ide_regs[0x1c] = 0x75; vt82c586b.ide_regs[0x1d] = 0x03;
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vt82c586b.ide_regs[0x20] = 0x01; vt82c586b.ide_regs[0x21] = 0xcc;
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vt82c586b.ide_regs[0x3c] = 0x0e;
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vt82c586b.ide_regs[0x40] = 0x08;
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vt82c586b.ide_regs[0x41] = 0x02;
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vt82c586b.ide_regs[0x42] = 0x09;
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vt82c586b.ide_regs[0x43] = 0x3a;
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vt82c586b.ide_regs[0x44] = 0x68;
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vt82c586b.ide_regs[0x46] = 0xc0;
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vt82c586b.ide_regs[0x48] = 0xa8;
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vt82c586b.ide_regs[0x49] = 0xa8;
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vt82c586b.ide_regs[0x4a] = 0xa8;
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vt82c586b.ide_regs[0x4b] = 0xa8;
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vt82c586b.ide_regs[0x4c] = 0xff;
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vt82c586b.ide_regs[0x4e] = 0xff;
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vt82c586b.ide_regs[0x4f] = 0xff;
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vt82c586b.ide_regs[0x50] = 0x03;
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vt82c586b.ide_regs[0x51] = 0x03;
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vt82c586b.ide_regs[0x52] = 0x03;
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vt82c586b.ide_regs[0x53] = 0x03;
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vt82c586b.ide_regs[0x61] = 0x02;
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vt82c586b.ide_regs[0x68] = 0x02;
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vt82c586b.usb_regs[0x00] = 0x06; vt82c586b.usb_regs[0x01] = 0x11; /*VIA*/
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vt82c586b.usb_regs[0x02] = 0x38; vt82c586b.usb_regs[0x03] = 0x30;
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vt82c586b.usb_regs[0x04] = 0x00; vt82c586b.usb_regs[0x05] = 0x00;
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vt82c586b.usb_regs[0x06] = 0x00; vt82c586b.usb_regs[0x07] = 0x02;
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vt82c586b.usb_regs[0x0a] = 0x03;
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vt82c586b.usb_regs[0x0b] = 0x0c;
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vt82c586b.usb_regs[0x0d] = 0x16;
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vt82c586b.usb_regs[0x20] = 0x01;
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vt82c586b.usb_regs[0x21] = 0x03;
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vt82c586b.usb_regs[0x3d] = 0x04;
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vt82c586b.usb_regs[0x60] = 0x10;
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vt82c586b.usb_regs[0xc1] = 0x20;
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vt82c586b.power_regs[0x00] = 0x06; vt82c586b.power_regs[0x01] = 0x11; /*VIA*/
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vt82c586b.power_regs[0x02] = 0x40; vt82c586b.power_regs[0x03] = 0x30;
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vt82c586b.power_regs[0x04] = 0x00; vt82c586b.power_regs[0x05] = 0x00;
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vt82c586b.power_regs[0x06] = 0x80; vt82c586b.power_regs[0x07] = 0x02;
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vt82c586b.power_regs[0x08] = 0x10; /*Production version (3041)*/
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vt82c586b.power_regs[0x48] = 0x01;
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if (pci_a)
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pci_set_card_routing(pci_a, PCI_INTA);
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if (pci_b)
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pci_set_card_routing(pci_b, PCI_INTB);
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if (pci_c)
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pci_set_card_routing(pci_c, PCI_INTC);
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if (pci_d)
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pci_set_card_routing(pci_d, PCI_INTD);
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}
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