Now up to date with current dev version.
Changes since v0.7 : - Major CPU reorganisation. This has possibly broken some stuff, though I fixed all the regressions I could find - Lazy flags. This brought 10% speed improvement at one point, but that's probably been lost now - 430 VX chipset emulation - IDT Winchip emulation (currently sans MMX). Timing is probably wrong - Fixed a few FPU bugs - Timer reorganisation - Sound reorganisation - Other general reorganisation - AdLib Gold emulation - Windows Sound System emulation - Pro Audio Spectrum 16 emulation. This currently works with most DOS stuff, but not in Windows - Major improvements to GUS emulation. Has the downside that it now conflicts with SB emulation, so probably best to not enable both simultaneously - New graphics cards : - ATI-18800 (VGA Edge-16) - ATI-28800 (VGA Charger) - ATI Mach64GX (Graphics Pro Turbo). Quite a few features missing, but Windows doesn't seem to use half the features of this card - Cirrus Logic CL-GD5429. Blitter is a bit broken - Oak OTI-067 - S3 Trio64 (Number Nine 9FX) - S3 Virge. Only framebuffer stuff at the minute, Windows won't recognise the card - Trident TGUI-9440 - VGA. Doesn't work yet - Beginnings of 3DFX emulation, however this is in extremely early stages and doesn't do anything useful - Fixed DMA bug stopping floppy drives working in Windows 3.x - Fixed some other stuff probably - Broke some other stuff probably as well
This commit is contained in:
TomW
parent
3c253c2cf8
commit
9312de19ac
87 changed files with 4528 additions and 9373 deletions
239
src/x87.c
239
src/x87.c
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@ -8,8 +8,11 @@
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//SCR_CalcRefdef
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//Calls R_SetVrect and R_ViewChanged
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#define fplog 0
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#include <math.h>
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#include "ibm.h"
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#include "pic.h"
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#include "x86.h"
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#include "x87.h"
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@ -67,6 +70,30 @@ int TOP;
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#define C2 (1<<10)
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#define C3 (1<<14)
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#define STATUS_ZERODIVIDE 4
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#define x87_div(dst, src1, src2) do \
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{ \
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if (((double)src2) == 0.0) \
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{ \
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npxs |= STATUS_ZERODIVIDE; \
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if (npxc & STATUS_ZERODIVIDE) \
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dst = src1 / (double)src2; \
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else \
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{ \
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pclog("FPU : divide by zero\n"); \
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picint(1 << 13); \
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} \
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return; \
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} \
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else \
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dst = src1 / (double)src2; \
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} while (0)
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void x87_checkexceptions()
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{
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}
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void x87_reset()
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{
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}
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@ -80,8 +107,8 @@ void x87_dumpregs()
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void x87_print()
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{
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pclog("\tST(0)=%.20f\tST(1)=%.20f\tST(2)=%f\tST(3)=%f\t",ST[TOP],ST[(TOP+1)&7],ST[(TOP+2)&7],ST[(TOP+3)&7]);
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pclog("ST(4)=%f\tST(5)=%f\tST(6)=%f\tST(7)=%f\t\n\n",ST[(TOP+4)&7],ST[(TOP+5)&7],ST[(TOP+6)&7],ST[(TOP+7)&7]);
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pclog("\tST(0)=%.20f\tST(1)=%.20f\tST(2)=%f\tST(3)=%f\t",ST[TOP&7],ST[(TOP+1)&7],ST[(TOP+2)&7],ST[(TOP+3)&7]);
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pclog("ST(4)=%f\tST(5)=%f\tST(6)=%f\tST(7)=%f\t TOP=%i CR=%04X SR=%04X TAG=%04X\n",ST[(TOP+4)&7],ST[(TOP+5)&7],ST[(TOP+6)&7],ST[(TOP+7)&7], TOP, npxc, npxs, tag);
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}
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void x87_push(double i)
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@ -186,16 +213,19 @@ void x87_d8()
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{
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case 0xC0: case 0xC1: case 0xC2: case 0xC3: /*FADD*/
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case 0xC4: case 0xC5: case 0xC6: case 0xC7:
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if (fplog) pclog("FADD\n");
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ST(0)=ST(0)+ST(rmdat32&7);
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cycles-=8;
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return;
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case 0xC8: case 0xC9: case 0xCA: case 0xCB: /*FMUL*/
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case 0xCC: case 0xCD: case 0xCE: case 0xCF:
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if (fplog) pclog("FMUL\n");
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ST(0)=ST(0)*ST(rmdat32&7);
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cycles-=16;
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return;
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case 0xD0: case 0xD1: case 0xD2: case 0xD3: /*FCOM*/
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case 0xD4: case 0xD5: case 0xD6: case 0xD7:
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if (fplog) pclog("FCOM\n");
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npxs&=~(C0|C2|C3);
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if (ST(0)==ST(rmdat32&7)) npxs|=C3;
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else if (ST(0)<ST(rmdat32&7)) npxs|=C0;
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@ -203,6 +233,7 @@ void x87_d8()
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return;
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case 0xD8: case 0xD9: case 0xDA: case 0xDB: /*FCOMP*/
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case 0xDC: case 0xDD: case 0xDE: case 0xDF:
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if (fplog) pclog("FCOMP\n");
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npxs&=~(C0|C2|C3);
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if (ST(0)==ST(rmdat32&7)) npxs|=C3;
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else if (ST(0)<ST(rmdat32&7)) npxs|=C0;
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@ -211,22 +242,26 @@ void x87_d8()
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return;
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case 0xE0: case 0xE1: case 0xE2: case 0xE3: /*FSUB*/
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case 0xE4: case 0xE5: case 0xE6: case 0xE7:
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if (fplog) pclog("FSUB\n");
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ST(0)=ST(0)-ST(rmdat32&7);
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cycles-=8;
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return;
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case 0xE8: case 0xE9: case 0xEA: case 0xEB: /*FSUBR*/
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case 0xEC: case 0xED: case 0xEE: case 0xEF:
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if (fplog) pclog("FSUBR\n");
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ST(0)=ST(rmdat32&7)-ST(0);
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cycles-=8;
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return;
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case 0xF0: case 0xF1: case 0xF2: case 0xF3: /*FDIV*/
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case 0xF4: case 0xF5: case 0xF6: case 0xF7:
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ST(0)=ST(0)/ST(rmdat32&7);
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if (fplog) pclog("FDIV\n");
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x87_div(ST(0), ST(0), ST(rmdat32&7));
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cycles-=73;
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return;
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case 0xF8: case 0xF9: case 0xFA: case 0xFB: /*FDIVR*/
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case 0xFC: case 0xFD: case 0xFE: case 0xFF:
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ST(0)=ST(rmdat32&7)/ST(0);
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if (fplog) pclog("FDIVR\n");
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x87_div(ST(0), ST(rmdat32&7), ST(0));
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cycles-=73;
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return;
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}
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@ -237,20 +272,25 @@ void x87_d8()
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switch (reg)
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{
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case 0: /*FADD short*/
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if (fplog) pclog("FADDs %08X:%08X %f %f\n", easeg, eaaddr, ST(0), ts.s);
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ST(0)+=ts.s;
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cycles-=8;
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return;
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case 1: /*FMUL short*/
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if (fplog) pclog("FMULs %08X:%08X %f %f\n", easeg, eaaddr, ST(0), ts.s);
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ST(0)*=ts.s;
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cycles-=11;
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if (abrt) pclog("ABRT FMUL\n");
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return;
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case 2: /*FCOM short*/
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if (fplog) pclog("FCOMs %08X:%08X %f %f\n", easeg, eaaddr, ST(0), ts.s);
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npxs&=~(C0|C2|C3);
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if (ST(0)==ts.s) npxs|=C3;
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else if (ST(0)<ts.s) npxs|=C0;
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cycles-=4;
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return;
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case 3: /*FCOMP short*/
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if (fplog) pclog("FCOMPs %08X:%08X %f %f\n", easeg, eaaddr, ST(0), ts.s);
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npxs&=~(C0|C2|C3);
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if (ST(0)==ts.s) npxs|=C3;
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else if (ST(0)<ts.s) npxs|=C0;
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@ -258,19 +298,23 @@ void x87_d8()
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x87_pop();
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return;
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case 4: /*FSUB short*/
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if (fplog) pclog("FSUBs %08X:%08X %f %f\n", easeg, eaaddr, ST(0), ts.s);
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ST(0)-=ts.s;
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cycles-=8;
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return;
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case 5: /*FSUBR short*/
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if (fplog) pclog("FSUBRs %08X:%08X %f %f\n", easeg, eaaddr, ST(0), ts.s);
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ST(0)=ts.s-ST(0);
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cycles-=8;
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return;
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case 6: /*FDIV short*/
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ST(0)=ST(0)/ts.s;
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if (fplog) pclog("FDIVs %08X:%08X %f %f\n", easeg, eaaddr, ST(0), ts.s);
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x87_div(ST(0), ST(0), ts.s);
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cycles-=73;
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return;
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case 7: /*FDIVR short*/
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ST(0)=ts.s/ST(0);
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if (fplog) pclog("FDIVRs %08X:%08X %f %f\n", easeg, eaaddr, ST(0), ts.s);
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x87_div(ST(0), ts.s, ST(0));
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cycles-=73;
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return;
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}
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@ -285,7 +329,6 @@ void x87_d9()
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float s;
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uint32_t i;
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} ts;
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float t;
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double td;
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int64_t temp64;
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uint16_t tempw;
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@ -295,82 +338,99 @@ void x87_d9()
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{
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case 0xC0: case 0xC1: case 0xC2: case 0xC3: /*FLD*/
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case 0xC4: case 0xC5: case 0xC6: case 0xC7:
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if (fplog) pclog("FLD %f\n", ST(rmdat32 & 7));
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x87_push(ST(rmdat32&7));
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cycles-=4;
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return;
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case 0xC8: case 0xC9: case 0xCA: case 0xCB: /*FXCH*/
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case 0xCC: case 0xCD: case 0xCE: case 0xCF:
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if (fplog) pclog("FXCH\n");
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td=ST(0);
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ST(0)=ST(rmdat32&7);
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ST(rmdat32&7)=td;
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cycles-=4;
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return;
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case 0xD0: /*FNOP*/
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if (fplog) pclog("FNOP\n");
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cycles-=3;
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return;
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case 0xE0: /*FCHS*/
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if (fplog) pclog("FCHS\n");
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ST(0)=-ST(0);
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cycles-=6;
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return;
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case 0xE1: /*FABS*/
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if (fplog) pclog("FABS %f\n", ST(0));
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ST(0)=fabs(ST(0));
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cycles-=3;
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return;
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case 0xE4: /*FTST*/
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if (fplog) pclog("FTST\n");
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npxs&=~(C0|C2|C3);
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if (ST(0)==0.0) npxs|=C3;
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else if (ST(0)<0.0) npxs|=C0;
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cycles-=4;
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return;
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case 0xE5: /*FXAM*/
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// pclog("FXAM %f %i\n",ST(0),(tag>>((TOP&1)<<1))&3);
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if (fplog) pclog("FXAM %i %f\n", ((tag>>((TOP&7)<<1))&3), ST(0));
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// pclog("FXAM %f %i\n",ST(0),(tag>>((TOP&7)<<1))&3);
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npxs&=~(C0|C2|C3);
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if (((tag>>((TOP&1)<<1))&3)==3) npxs|=(C0|C3);
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if (((tag>>((TOP&7)<<1))&3)==3) npxs|=(C0|C3);
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else if (ST(0)==0.0) npxs|=C3;
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else npxs|=C2;
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if (ST(0)<0.0) npxs|=C1;
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cycles-=8;
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return;
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case 0xE8: /*FLD1*/
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if (fplog) pclog("FLD1\n");
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x87_push(1.0);
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cycles-=4;
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return;
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case 0xE9: /*FLDL2T*/
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if (fplog) pclog("FLDL2T\n");
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x87_push(3.3219280948873623);
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cycles-=8;
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return;
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case 0xEA: /*FLDL2E*/
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if (fplog) pclog("FLDL2E\n");
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x87_push(1.4426950408889634);
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cycles-=8;
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return;
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case 0xEB: /*FLDPI*/
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if (fplog) pclog("FLDPI\n");
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x87_push(3.141592653589793);
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cycles-=8;
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return;
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case 0xEC: /*FLDEG2*/
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if (fplog) pclog("FLDEG2\n");
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x87_push(0.3010299956639812);
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cycles-=8;
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return;
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case 0xED: /*FLDLN2*/
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if (fplog) pclog("FLDLN2\n");
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x87_push(0.693147180559945);
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cycles-=8;
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return;
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case 0xEE: /*FLDZ*/
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if (fplog) pclog("FLDZ\n");
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// pclog("FLDZ %04X:%08X\n",CS,pc);
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x87_push(0.0);
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tag|=(1<<((TOP&7)<<1));
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cycles-=4;
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return;
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case 0xF0: /*F2XM1*/
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if (fplog) pclog("F2XM1\n");
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ST(0)=pow(2.0,ST(0))-1.0;
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cycles-=200;
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return;
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case 0xF1: /*FYL2X*/
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if (fplog) pclog("FYL2X\n");
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ST(1)=ST(1)*(log(ST(0))/log(2.0));
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x87_pop();
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cycles-=250;
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return;
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case 0xF2: /*FPTAN*/
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if (fplog) pclog("FPTAN\n");
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// pclog("Tan of %f = ",ST(0));
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ST(0)=tan(ST(0));
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// pclog("%f\n",ST(0));
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@ -379,20 +439,31 @@ void x87_d9()
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cycles-=235;
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return;
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case 0xF3: /*FPATAN*/
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if (fplog) pclog("FPATAN\n");
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/* times++;
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if (times==50)
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{
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dumpregs();
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exit(-1);
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}*/
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// pclog("FPATAN %08X\n",pc);
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ST(1)=atan2(ST(1),ST(0));
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x87_pop();
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cycles-=250;
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return;
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case 0xF6: /*FDECSTP*/
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if (fplog) pclog("FDECSTP\n");
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TOP=(TOP-1)&7;
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return;
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case 0xF7: /*FINCSTP*/
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if (fplog) pclog("FINCSTP\n");
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TOP=(TOP+1)&7;
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return;
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case 0xF8: /*FPREM*/
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if (fplog) pclog("FPREM %f %f ", ST(0), ST(1));
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temp64=(int64_t)(ST(0)/ST(1));
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ST(0)=ST(0)-(ST(1)*(double)temp64);
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if (fplog) pclog("%f\n", ST(0));
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npxs&=~(C0|C1|C2|C3);
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if (temp64&4) npxs|=C0;
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if (temp64&2) npxs|=C3;
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@ -400,10 +471,12 @@ void x87_d9()
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cycles-=100;
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return;
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case 0xFA: /*FSQRT*/
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if (fplog) pclog("FSQRT\n");
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ST(0)=sqrt(ST(0));
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cycles-=83;
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return;
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case 0xFB: /*FSINCOS*/
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if (fplog) pclog("FSINCOS\n");
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td=ST(0);
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ST(0)=sin(td);
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x87_push(cos(td));
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@ -411,22 +484,26 @@ void x87_d9()
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cycles-=330;
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return;
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case 0xFC: /*FRNDINT*/
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if (fplog) pclog("FRNDINT\n");
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// pclog("FRNDINT %f %i ",ST(0),(npxc>>10)&3);
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ST(0)=(double)x87_fround(ST(0));
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// pclog("%f\n",ST(0));
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cycles-=21;
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return;
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case 0xFD: /*FSCALE*/
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if (fplog) pclog("FSCALE\n");
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temp64=(int64_t)ST(1);
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ST(0)=ST(0)*pow(2.0,(double)temp64);
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cycles-=30;
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return;
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case 0xFE: /*FSIN*/
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if (fplog) pclog("FSIN\n");
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ST(0)=sin(ST(0));
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npxs&=~C2;
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cycles-=300;
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return;
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case 0xFF: /*FCOS*/
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if (fplog) pclog("FCOS\n");
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ST(0)=cos(ST(0));
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npxs&=~C2;
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cycles-=300;
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@ -438,24 +515,30 @@ void x87_d9()
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switch (reg)
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{
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case 0: /*FLD single-precision*/
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if (fplog) pclog("FLDs %08X:%08X\n", easeg, eaaddr);
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// if ((rmdat32&0xFFFF)==0xD445) { pclog("FLDS\n"); output=3; dumpregs(); exit(-1); }
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ts.i=(float)geteal(); if (abrt) return;
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ts.i=geteal(); if (abrt) { pclog("FLD sp abort\n"); return; }
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if (fplog) pclog(" %f\n", ts.s);
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x87_push((double)ts.s);
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cycles-=3;
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return;
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case 2: /*FST single-precision*/
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if (fplog) pclog("FSTs %08X:%08X\n", easeg, eaaddr);
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ts.s=(float)ST(0);
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seteal(ts.i);
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if (abrt) { pclog("FST sp abort\n"); return; }
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cycles-=7;
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return;
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case 3: /*FSTP single-precision*/
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if (fplog) pclog("FSTPs %08X:%08X\n", easeg, eaaddr);
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ts.s=(float)ST(0);
|
||||
seteal(ts.i); if (abrt) return;
|
||||
seteal(ts.i); if (abrt) { pclog("FSTP sp abort\n"); return; }
|
||||
// if (pc==0x3f50c) pclog("FSTP %f %f %08X\n",ST(0),ts.s,ts.i);
|
||||
x87_pop();
|
||||
cycles-=7;
|
||||
return;
|
||||
case 4: /*FLDENV*/
|
||||
if (fplog) pclog("FLDENV %08X:%08X\n", easeg, eaaddr);
|
||||
switch ((cr0&1)|(op32&0x100))
|
||||
{
|
||||
case 0x000: /*16-bit real mode*/
|
||||
|
|
@ -474,14 +557,17 @@ void x87_d9()
|
|||
break;
|
||||
}
|
||||
cycles-=(cr0&1)?34:44;
|
||||
if (abrt) { pclog("FLDENV\n"); return; }
|
||||
return;
|
||||
case 5: /*FLDCW*/
|
||||
if (fplog) pclog("FLDCW %08X:%08X\n", easeg, eaaddr);
|
||||
tempw=geteaw();
|
||||
if (abrt) return;
|
||||
if (abrt) if (abrt) { pclog("FLDCW abort\n"); return; }
|
||||
npxc=tempw;
|
||||
cycles-=4;
|
||||
return;
|
||||
case 6: /*FSTENV*/
|
||||
if (fplog) pclog("FSTENV %08X:%08X\n", easeg, eaaddr);
|
||||
switch ((cr0&1)|(op32&0x100))
|
||||
{
|
||||
case 0x000: /*16-bit real mode*/
|
||||
|
|
@ -518,10 +604,13 @@ void x87_d9()
|
|||
writememl(easeg,eaaddr+24,x87_op_seg);
|
||||
break;
|
||||
}
|
||||
if (abrt) { pclog("FSTENV\n"); return; }
|
||||
cycles-=(cr0&1)?56:67;
|
||||
return;
|
||||
case 7: /*FSTCW*/
|
||||
if (fplog) pclog("FSTCW %08X:%08X\n", easeg, eaaddr);
|
||||
seteaw(npxc);
|
||||
if (abrt) { pclog("FSTCW\n"); return; }
|
||||
cycles-=3;
|
||||
return;
|
||||
}
|
||||
|
|
@ -537,6 +626,7 @@ void x87_da()
|
|||
switch (rmdat32&0xFF)
|
||||
{
|
||||
case 0xE9: /*FUCOMPP*/
|
||||
if (fplog) pclog("FUCOMPP\n", easeg, eaaddr);
|
||||
npxs&=~(C0|C2|C3);
|
||||
if (ST(0)==ST(1)) npxs|=C3;
|
||||
else if (ST(0)<ST(1)) npxs|=C0;
|
||||
|
|
@ -548,24 +638,28 @@ void x87_da()
|
|||
}
|
||||
else
|
||||
{
|
||||
templ=geteal(); if (abrt) return;
|
||||
templ=(int32_t)geteal(); if (abrt) return;
|
||||
switch (reg)
|
||||
{
|
||||
case 0: /*FIADD*/
|
||||
if (fplog) pclog("FIADDl %08X:%08X %f %f\n", easeg, eaaddr, ST(0), (double)templ);
|
||||
ST(0)=ST(0)+(double)templ;
|
||||
cycles-=20;
|
||||
return;
|
||||
case 1: /*FIMUL*/
|
||||
if (fplog) pclog("FIMULl %08X:%08X %f %f\n", easeg, eaaddr, ST(0), (double)templ);
|
||||
ST(0)=ST(0)*(double)templ;
|
||||
cycles-=22;
|
||||
return;
|
||||
case 2: /*FICOM*/
|
||||
if (fplog) pclog("FICOMl %08X:%08X %f %f\n", easeg, eaaddr, ST(0), (double)templ);
|
||||
npxs&=~(C0|C2|C3);
|
||||
if (ST(0)==(double)templ) npxs|=C3;
|
||||
else if (ST(0)<(double)templ) npxs|=C0;
|
||||
cycles-=15;
|
||||
return;
|
||||
case 3: /*FICOMP*/
|
||||
if (fplog) pclog("FICOMPl %08X:%08X %f %f\n", easeg, eaaddr, ST(0), (double)templ);
|
||||
npxs&=~(C0|C2|C3);
|
||||
if (ST(0)==(double)templ) npxs|=C3;
|
||||
else if (ST(0)<(double)templ) npxs|=C0;
|
||||
|
|
@ -573,19 +667,23 @@ void x87_da()
|
|||
cycles-=15;
|
||||
return;
|
||||
case 4: /*FISUB*/
|
||||
if (fplog) pclog("FISUBl %08X:%08X %f %f\n", easeg, eaaddr, ST(0), (double)templ);
|
||||
ST(0)=ST(0)-(double)templ;
|
||||
cycles-=20;
|
||||
return;
|
||||
case 5: /*FISUBR*/
|
||||
if (fplog) pclog("FISUBRl %08X:%08X %f %f\n", easeg, eaaddr, ST(0), (double)templ);
|
||||
ST(0)=(double)templ-ST(0);
|
||||
cycles-=19;
|
||||
return;
|
||||
case 6: /*FIDIV*/
|
||||
ST(0)=ST(0)/(double)templ;
|
||||
if (fplog) pclog("FIDIVl %08X:%08X %f %f\n", easeg, eaaddr, ST(0), (double)templ);
|
||||
x87_div(ST(0), ST(0), (double)templ);
|
||||
cycles-=84;
|
||||
return;
|
||||
case 7: /*FIDIVR*/
|
||||
ST(0)=(double)templ/ST(0);
|
||||
if (fplog) pclog("FIDIVRl %08X:%08X %f %f\n", easeg, eaaddr, ST(0), (double)templ);
|
||||
x87_div(ST(0), (double)templ, ST(0));
|
||||
cycles-=84;
|
||||
return;
|
||||
}
|
||||
|
|
@ -597,6 +695,7 @@ void x87_db()
|
|||
{
|
||||
double t;
|
||||
int32_t templ;
|
||||
int64_t temp64;
|
||||
if (mod==3)
|
||||
{
|
||||
switch (reg)
|
||||
|
|
@ -607,9 +706,11 @@ void x87_db()
|
|||
case 0xE1:
|
||||
return;
|
||||
case 0xE2: /*FCLEX*/
|
||||
if (fplog) pclog("FCLEX\n");
|
||||
npxs&=0xFF00;
|
||||
return;
|
||||
case 0xE3: /*FINIT*/
|
||||
if (fplog) pclog("FINIT\n");
|
||||
npxc=0x37F;
|
||||
npxs=0;
|
||||
tag=0xFFFF;
|
||||
|
|
@ -627,25 +728,38 @@ void x87_db()
|
|||
switch (reg)
|
||||
{
|
||||
case 0: /*FILD short*/
|
||||
if (fplog) pclog("FILDs %08X:%08X\n", easeg, eaaddr);
|
||||
templ=geteal(); if (abrt) return;
|
||||
if (fplog) pclog(" %f %08X %i\n", (double)templ, templ, templ);
|
||||
x87_push((double)templ);
|
||||
cycles-=9;
|
||||
return;
|
||||
case 2: /*FIST short*/
|
||||
seteal((int32_t)x87_fround(ST(0)));
|
||||
if (fplog) pclog("FISTs %08X:%08X\n", easeg, eaaddr);
|
||||
temp64 = x87_fround(ST(0));
|
||||
/* if (temp64 > 2147483647 || temp64 < -2147483647)
|
||||
fatal("FISTl out of range! %i\n", temp64);*/
|
||||
seteal((int32_t)temp64);
|
||||
cycles-=28;
|
||||
return;
|
||||
case 3: /*FISTP short*/
|
||||
seteal((int32_t)x87_fround(ST(0))); if (abrt) return;
|
||||
if (fplog) pclog("FISTPs %08X:%08X\n", easeg, eaaddr);
|
||||
temp64 = x87_fround(ST(0));
|
||||
/* if (temp64 > 2147483647 || temp64 < -2147483647)
|
||||
fatal("FISTPl out of range! %i\n", temp64);*/
|
||||
seteal((int32_t)temp64); if (abrt) return;
|
||||
x87_pop();
|
||||
cycles-=28;
|
||||
return;
|
||||
case 5: /*FLD extended*/
|
||||
if (fplog) pclog("FLDe %08X:%08X\n", easeg, eaaddr);
|
||||
t=x87_ld80(); if (abrt) return;
|
||||
if (fplog) pclog(" %f\n", t);
|
||||
x87_push(t);
|
||||
cycles-=6;
|
||||
return;
|
||||
case 7: /*FSTP extended*/
|
||||
if (fplog) pclog("FSTPe %08X:%08X\n", easeg, eaaddr);
|
||||
x87_st80(ST(0)); if (abrt) return;
|
||||
x87_pop();
|
||||
cycles-=6;
|
||||
|
|
@ -668,32 +782,38 @@ void x87_dc()
|
|||
{
|
||||
case 0xC0: case 0xC1: case 0xC2: case 0xC3: /*FADD*/
|
||||
case 0xC4: case 0xC5: case 0xC6: case 0xC7:
|
||||
if (fplog) pclog("FADD %f %f\n", ST(rmdat32 & 7), ST(0));
|
||||
ST(rmdat32&7)=ST(rmdat32&7)+ST(0);
|
||||
cycles-=8;
|
||||
return;
|
||||
case 0xC8: case 0xC9: case 0xCA: case 0xCB: /*FMUL*/
|
||||
case 0xCC: case 0xCD: case 0xCE: case 0xCF:
|
||||
if (fplog) pclog("FMUL %f %f\n", ST(rmdat32 & 7), ST(0));
|
||||
ST(rmdat32&7)=ST(rmdat32&7)*ST(0);
|
||||
cycles-=16;
|
||||
return;
|
||||
case 0xE0: case 0xE1: case 0xE2: case 0xE3: /*FSUBR*/
|
||||
case 0xE4: case 0xE5: case 0xE6: case 0xE7:
|
||||
if (fplog) pclog("FSUBR %f %f\n", ST(rmdat32 & 7), ST(0));
|
||||
ST(rmdat32&7)=ST(0)-ST(rmdat32&7);
|
||||
cycles-=8;
|
||||
return;
|
||||
case 0xE8: case 0xE9: case 0xEA: case 0xEB: /*FSUB*/
|
||||
case 0xEC: case 0xED: case 0xEE: case 0xEF:
|
||||
if (fplog) pclog("FSUB %f %f\n", ST(rmdat32 & 7), ST(0));
|
||||
ST(rmdat32&7)=ST(rmdat32&7)-ST(0);
|
||||
cycles-=8;
|
||||
return;
|
||||
case 0xF0: case 0xF1: case 0xF2: case 0xF3: /*FDIVR*/
|
||||
case 0xF4: case 0xF5: case 0xF6: case 0xF7:
|
||||
ST(rmdat32&7)=ST(0)/ST(rmdat32&7);
|
||||
if (fplog) pclog("FDIVR %f %f\n", ST(rmdat32 & 7), ST(0));
|
||||
x87_div(ST(rmdat32&7), ST(0), ST(rmdat32&7));
|
||||
cycles-=73;
|
||||
return;
|
||||
case 0xF8: case 0xF9: case 0xFA: case 0xFB: /*FDIV*/
|
||||
case 0xFC: case 0xFD: case 0xFE: case 0xFF:
|
||||
ST(rmdat32&7)=ST(rmdat32&7)/ST(0);
|
||||
if (fplog) pclog("FDIV %f %f\n", ST(rmdat32 & 7), ST(0));
|
||||
x87_div(ST(rmdat32&7), ST(rmdat32&7), ST(0));
|
||||
cycles-=73;
|
||||
return;
|
||||
}
|
||||
|
|
@ -706,20 +826,24 @@ void x87_dc()
|
|||
switch (reg)
|
||||
{
|
||||
case 0: /*FADD double*/
|
||||
if (fplog) pclog("FADDd %08X:%08X %f %f\n", easeg, eaaddr, ST(0), t.d);
|
||||
ST(0)+=t.d;
|
||||
cycles-=8;
|
||||
return;
|
||||
case 1: /*FMUL double*/
|
||||
if (fplog) pclog("FMULd %08X:%08X %f %f\n", easeg, eaaddr, ST(0), t.d);
|
||||
ST(0)*=t.d;
|
||||
cycles-=14;
|
||||
return;
|
||||
case 2: /*FCOM double*/
|
||||
if (fplog) pclog("FCOMd %08X:%08X %f %f\n", easeg, eaaddr, ST(0), t.d);
|
||||
npxs&=~(C0|C2|C3);
|
||||
if (ST(0)==t.d) npxs|=C3;
|
||||
else if (ST(0)<t.d) npxs|=C0;
|
||||
cycles-=4;
|
||||
return;
|
||||
case 3: /*FCOMP double*/
|
||||
if (fplog) pclog("FCOMPd %08X:%08X %f %f\n", easeg, eaaddr, ST(0), t.d);
|
||||
npxs&=~(C0|C2|C3);
|
||||
if (ST(0)==t.d) npxs|=C3;
|
||||
else if (ST(0)<t.d) npxs|=C0;
|
||||
|
|
@ -727,19 +851,23 @@ void x87_dc()
|
|||
x87_pop();
|
||||
return;
|
||||
case 4: /*FSUB double*/
|
||||
if (fplog) pclog("FSUBd %08X:%08X %f %f\n", easeg, eaaddr, ST(0), t.d);
|
||||
ST(0)-=t.d;
|
||||
cycles-=8;
|
||||
return;
|
||||
case 5: /*FSUBR double*/
|
||||
if (fplog) pclog("FSUBRd %08X:%08X %f %f\n", easeg, eaaddr, ST(0), t.d);
|
||||
ST(0)=t.d-ST(0);
|
||||
cycles-=8;
|
||||
return;
|
||||
case 6: /*FDIV double*/
|
||||
ST(0)=ST(0)/t.d;
|
||||
if (fplog) pclog("FDIVd %08X:%08X %f %f\n", easeg, eaaddr, ST(0), t.d);
|
||||
x87_div(ST(0), ST(0), t.d);
|
||||
cycles-=73;
|
||||
return;
|
||||
case 7: /*FDIVR double*/
|
||||
ST(0)=t.d/ST(0);
|
||||
if (fplog) pclog("FDIVRd %08X:%08X %f %f\n", easeg, eaaddr, ST(0), t.d);
|
||||
x87_div(ST(0), t.d, ST(0));
|
||||
cycles-=73;
|
||||
return;
|
||||
}
|
||||
|
|
@ -760,10 +888,12 @@ void x87_dd()
|
|||
switch (reg)
|
||||
{
|
||||
case 0: /*FFREE*/
|
||||
if (fplog) pclog("FFREE\n");
|
||||
tag|=(3<<((rmdat32&7)<<1));
|
||||
cycles-=3;
|
||||
return;
|
||||
case 2: /*FST*/
|
||||
if (fplog) pclog("FST\n");
|
||||
ST(rmdat32&7)=ST(0);
|
||||
temp=(tag>>((TOP&7)<<1))&3;
|
||||
tag&=~(3<<((rmdat32&7)<<1));
|
||||
|
|
@ -771,6 +901,7 @@ void x87_dd()
|
|||
cycles-=3;
|
||||
return;
|
||||
case 3: /*FSTP*/
|
||||
if (fplog) pclog("FSTP\n");
|
||||
ST(rmdat32&7)=ST(0);
|
||||
temp=(tag>>((TOP&7)<<1))&3;
|
||||
tag&=~(3<<((rmdat32&7)<<1));
|
||||
|
|
@ -779,12 +910,14 @@ void x87_dd()
|
|||
cycles-=3;
|
||||
return;
|
||||
case 4: /*FUCOM*/
|
||||
if (fplog) pclog("FUCOM\n");
|
||||
npxs&=~(C0|C2|C3);
|
||||
if (ST(0)==ST(rmdat32&7)) npxs|=C3;
|
||||
else if (ST(0)<ST(rmdat32&7)) npxs|=C0;
|
||||
cycles-=4;
|
||||
return;
|
||||
case 5: /*FUCOMP*/
|
||||
if (fplog) pclog("FUCOMP\n");
|
||||
npxs&=~(C0|C2|C3);
|
||||
if (ST(0)==ST(rmdat32&7)) npxs|=C3;
|
||||
else if (ST(0)<ST(rmdat32&7)) npxs|=C0;
|
||||
|
|
@ -798,18 +931,22 @@ void x87_dd()
|
|||
switch (reg)
|
||||
{
|
||||
case 0: /*FLD double-precision*/
|
||||
if (fplog) pclog("FLDd %08X:%08X\n", easeg, eaaddr);
|
||||
t.i=readmeml(easeg,eaaddr);
|
||||
t.i|=(uint64_t)readmeml(easeg,eaaddr+4)<<32; if (abrt) return;
|
||||
if (fplog) pclog(" %f\n", t.d);
|
||||
x87_push(t.d);
|
||||
cycles-=3;
|
||||
return;
|
||||
case 2: /*FST double-precision*/
|
||||
if (fplog) pclog("FSTd %08X:%08X\n", easeg, eaaddr);
|
||||
t.d=ST(0);
|
||||
writememl(easeg,eaaddr,t.i);
|
||||
writememl(easeg,eaaddr+4,(t.i>>32));
|
||||
cycles-=8;
|
||||
return;
|
||||
case 3: /*FSTP double-precision*/
|
||||
if (fplog) pclog("FSTPd %08X:%08X\n", easeg, eaaddr);
|
||||
t.d=ST(0);
|
||||
writememl(easeg,eaaddr,t.i);
|
||||
writememl(easeg,eaaddr+4,(t.i>>32)); if (abrt) return;
|
||||
|
|
@ -817,6 +954,7 @@ void x87_dd()
|
|||
cycles-=8;
|
||||
return;
|
||||
case 4: /*FRSTOR*/
|
||||
if (fplog) pclog("FRSTOR %08X:%08X\n", easeg, eaaddr);
|
||||
switch ((cr0&1)|(op32&0x100))
|
||||
{
|
||||
case 0x000: /*16-bit real mode*/
|
||||
|
|
@ -847,6 +985,7 @@ void x87_dd()
|
|||
cycles-=(cr0&1)?34:44;
|
||||
return;
|
||||
case 6: /*FSAVE*/
|
||||
if (fplog) pclog("FSAVE %08X:%08X\n", easeg, eaaddr);
|
||||
switch ((cr0&1)|(op32&0x100))
|
||||
{
|
||||
case 0x000: /*16-bit real mode*/
|
||||
|
|
@ -922,6 +1061,7 @@ void x87_dd()
|
|||
cycles-=(cr0&1)?56:67;
|
||||
return;
|
||||
case 7: /*FSTSW*/
|
||||
if (fplog) pclog("FSTSW %08X:%08X\n", easeg, eaaddr);
|
||||
seteaw((npxs&0xC7FF)|(TOP<<11));
|
||||
cycles-=3;
|
||||
return;
|
||||
|
|
@ -932,7 +1072,6 @@ void x87_dd()
|
|||
}
|
||||
void x87_de()
|
||||
{
|
||||
double t;
|
||||
int32_t templ;
|
||||
if (mod==3)
|
||||
{
|
||||
|
|
@ -940,17 +1079,20 @@ void x87_de()
|
|||
{
|
||||
case 0xC0: case 0xC1: case 0xC2: case 0xC3: /*FADDP*/
|
||||
case 0xC4: case 0xC5: case 0xC6: case 0xC7:
|
||||
ST(rmdat32&7)=ST(rmdat32&7)+ST[TOP];
|
||||
if (fplog) pclog("FADDP %f %f\n", ST(rmdat32 & 7), ST(0));
|
||||
ST(rmdat32&7)=ST(rmdat32&7)+ST(0);
|
||||
x87_pop();
|
||||
cycles-=8;
|
||||
return;
|
||||
case 0xC8: case 0xC9: case 0xCA: case 0xCB: /*FMULP*/
|
||||
case 0xCC: case 0xCD: case 0xCE: case 0xCF:
|
||||
ST(rmdat32&7)=ST(rmdat32&7)*ST[TOP];
|
||||
if (fplog) pclog("FMULP %f %f\n", ST(rmdat32 & 7), ST(0));
|
||||
ST(rmdat32&7)=ST(rmdat32&7)*ST(0);
|
||||
x87_pop();
|
||||
cycles-=16;
|
||||
return;
|
||||
case 0xD9: /*FCOMPP*/
|
||||
if (fplog) pclog("FCOMPP %f %f\n", ST(0), ST(1));
|
||||
npxs&=~(C0|C2|C3);
|
||||
if (ST(0)==ST(1)) npxs|=C3;
|
||||
else if (ST(0)<ST(1)) npxs|=C0;
|
||||
|
|
@ -960,25 +1102,29 @@ void x87_de()
|
|||
return;
|
||||
case 0xE0: case 0xE1: case 0xE2: case 0xE3: /*FSUBRP*/
|
||||
case 0xE4: case 0xE5: case 0xE6: case 0xE7:
|
||||
if (fplog) pclog("FSUBRP %f %f\n", ST(rmdat32 & 7), ST(0));
|
||||
ST(rmdat32&7)=ST(0)-ST(rmdat32&7);
|
||||
x87_pop();
|
||||
cycles-=8;
|
||||
return;
|
||||
case 0xE8: case 0xE9: case 0xEA: case 0xEB: /*FSUBP*/
|
||||
case 0xEC: case 0xED: case 0xEE: case 0xEF:
|
||||
ST(rmdat32&7)=ST(rmdat32&7)-ST[TOP];
|
||||
if (fplog) pclog("FSUBP %f %f\n", ST(rmdat32 & 7), ST(0));
|
||||
ST(rmdat32&7)=ST(rmdat32&7)-ST(0);
|
||||
x87_pop();
|
||||
cycles-=8;
|
||||
return;
|
||||
case 0xF0: case 0xF1: case 0xF2: case 0xF3: /*FDIVRP*/
|
||||
case 0xF4: case 0xF5: case 0xF6: case 0xF7:
|
||||
ST(rmdat32&7)=ST(0)/ST(rmdat32&7);
|
||||
if (fplog) pclog("FDIVRP %f %f\n", ST(rmdat32 & 7), ST(0));
|
||||
x87_div(ST(rmdat32&7), ST(0), ST(rmdat32&7));
|
||||
x87_pop();
|
||||
cycles-=73;
|
||||
return;
|
||||
case 0xF8: case 0xF9: case 0xFA: case 0xFB: /*FDIVP*/
|
||||
case 0xFC: case 0xFD: case 0xFE: case 0xFF:
|
||||
ST(rmdat32&7)=ST(rmdat32&7)/ST[TOP];
|
||||
if (fplog) pclog("FDIVP %f %f %i\n", ST(rmdat32 & 7), ST(0), rmdat32 & 7);
|
||||
x87_div(ST(rmdat32&7), ST(rmdat32&7), ST(0));
|
||||
x87_pop();
|
||||
cycles-=73;
|
||||
return;
|
||||
|
|
@ -986,24 +1132,28 @@ void x87_de()
|
|||
}
|
||||
else
|
||||
{
|
||||
templ=(int32_t)geteaw(); if (abrt) return;
|
||||
templ=(int32_t)(int16_t)geteaw(); if (abrt) return;
|
||||
switch (reg)
|
||||
{
|
||||
case 0: /*FIADD*/
|
||||
if (fplog) pclog("FIADDw %08X:%08X %f %f\n", easeg, eaaddr, ST(0), (double)templ);
|
||||
ST(0)=ST(0)+(double)templ;
|
||||
cycles-=20;
|
||||
return;
|
||||
case 1: /*FIMUL*/
|
||||
if (fplog) pclog("FIMULw %08X:%08X %f %f\n", easeg, eaaddr, ST(0), (double)templ);
|
||||
ST(0)=ST(0)*(double)templ;
|
||||
cycles-=22;
|
||||
return;
|
||||
case 2: /*FICOM*/
|
||||
if (fplog) pclog("FICOMw %08X:%08X %f %f\n", easeg, eaaddr, ST(0), (double)templ);
|
||||
npxs&=~(C0|C2|C3);
|
||||
if (ST(0)==(double)templ) npxs|=C3;
|
||||
else if (ST(0)<(double)templ) npxs|=C0;
|
||||
cycles-=15;
|
||||
return;
|
||||
case 3: /*FICOMP*/
|
||||
if (fplog) pclog("FICOMPw %08X:%08X %f %f\n", easeg, eaaddr, ST(0), (double)templ);
|
||||
npxs&=~(C0|C2|C3);
|
||||
if (ST(0)==(double)templ) npxs|=C3;
|
||||
else if (ST(0)<(double)templ) npxs|=C0;
|
||||
|
|
@ -1011,19 +1161,23 @@ void x87_de()
|
|||
cycles-=15;
|
||||
return;
|
||||
case 4: /*FISUB*/
|
||||
if (fplog) pclog("FISUBw %08X:%08X %f %f\n", easeg, eaaddr, ST(0), (double)templ);
|
||||
ST(0)=ST(0)-(double)templ;
|
||||
cycles-=20;
|
||||
return;
|
||||
case 5: /*FISUBR*/
|
||||
if (fplog) pclog("FISUBRw %08X:%08X %f %f\n", easeg, eaaddr, ST(0), (double)templ);
|
||||
ST(0)=(double)templ-ST(0);
|
||||
cycles-=19;
|
||||
return;
|
||||
case 6: /*FIDIV*/
|
||||
ST(0)=ST(0)/(double)templ;
|
||||
if (fplog) pclog("FIDIVw %08X:%08X %f %f\n", easeg, eaaddr, ST(0), (double)templ);
|
||||
x87_div(ST(0), ST(0), (double)templ);
|
||||
cycles-=84;
|
||||
return;
|
||||
case 7: /*FIDIVR*/
|
||||
ST(0)=(double)templ/ST(0);
|
||||
if (fplog) pclog("FIDIVRw %08X:%08X %f %f\n", easeg, eaaddr, ST(0), (double)templ);
|
||||
x87_div(ST(0), (double)templ, ST(0));
|
||||
cycles-=84;
|
||||
return;
|
||||
}
|
||||
|
|
@ -1046,6 +1200,7 @@ void x87_df()
|
|||
switch (rmdat32&0xFF)
|
||||
{
|
||||
case 0xE0: /*FSTSW AX*/
|
||||
if (fplog) pclog("FSTSW\n");
|
||||
AX=npxs;
|
||||
cycles-=3;
|
||||
return;
|
||||
|
|
@ -1058,29 +1213,42 @@ void x87_df()
|
|||
switch (reg)
|
||||
{
|
||||
case 0: /*FILD short*/
|
||||
if (fplog) pclog("FILDw %08X:%08X\n", easeg, eaaddr);
|
||||
temp16=geteaw(); if (abrt) return;
|
||||
if (fplog) pclog(" %f\n", (double)temp16);
|
||||
x87_push((double)temp16);
|
||||
cycles-=13;
|
||||
return;
|
||||
case 2: /*FIST word*/
|
||||
temp16=x87_fround(ST(0));
|
||||
seteaw(temp16);
|
||||
if (fplog) pclog("FISTw %08X:%08X\n", easeg, eaaddr);
|
||||
temp64 = x87_fround(ST(0));
|
||||
/* if (temp64 > 32767 || temp64 < -32768)
|
||||
fatal("FISTw overflow %i\n", temp64);*/
|
||||
seteaw((int16_t)temp64);
|
||||
cycles-=29;
|
||||
return;
|
||||
case 3: /*FISTP word*/
|
||||
temp16=x87_fround(ST(0));
|
||||
seteaw(temp16); if (abrt) return;
|
||||
if (fplog) pclog("FISTPw %08X:%08X\n", easeg, eaaddr);
|
||||
temp64 = x87_fround(ST(0));
|
||||
/* if (temp64 > 32767 || temp64 < -32768)
|
||||
fatal("FISTw overflow %i\n", temp64);*/
|
||||
seteaw((int16_t)temp64); if (abrt) return;
|
||||
x87_pop();
|
||||
cycles-=29;
|
||||
return;
|
||||
case 5: /*FILD long*/
|
||||
if (fplog) pclog("FILDl %08X:%08X\n", easeg, eaaddr);
|
||||
temp64=geteal(); if (abrt) return;
|
||||
temp64|=(uint64_t)readmeml(easeg,eaaddr+4)<<32;
|
||||
if (fplog) pclog(" %f %08X %08X\n", (double)temp64, readmeml(easeg,eaaddr), readmeml(easeg,eaaddr+4));
|
||||
x87_push((double)temp64);
|
||||
cycles-=10;
|
||||
return;
|
||||
case 6: /*FBSTP*/
|
||||
if (fplog) pclog("FBSTP %08X:%08X\n", easeg, eaaddr);
|
||||
tempd=ST(0);
|
||||
if (tempd < 0.0)
|
||||
tempd = -tempd;
|
||||
for (c=0;c<9;c++)
|
||||
{
|
||||
tempc=(uint8_t)floor(fmod(tempd,10.0)); tempd-=floor(fmod(tempd,10.0)); tempd/=10.0;
|
||||
|
|
@ -1088,11 +1256,12 @@ void x87_df()
|
|||
writememb(easeg,eaaddr+c,tempc);
|
||||
}
|
||||
tempc=(uint8_t)floor(fmod(tempd,10.0));
|
||||
if (tempd<0.0) tempc|=0x80;
|
||||
if (ST(0)<0.0) tempc|=0x80;
|
||||
writememb(easeg,eaaddr+9,tempc); if (abrt) return;
|
||||
x87_pop();
|
||||
return;
|
||||
case 7: /*FISTP long*/
|
||||
if (fplog) pclog("FISTPl %08X:%08X\n", easeg, eaaddr);
|
||||
temp64=x87_fround(ST(0));
|
||||
seteal(temp64);
|
||||
writememl(easeg,eaaddr+4,temp64>>32); if (abrt) return;
|
||||
|
|
|
|||
Loading…
Reference in a new issue