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Now up to date with current dev version.

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Changes since v0.7 :
- Major CPU reorganisation. This has possibly broken some stuff, though I fixed all the regressions I could find
- Lazy flags. This brought 10% speed improvement at one point, but that's probably been lost now
- 430 VX chipset emulation
- IDT Winchip emulation (currently sans MMX). Timing is probably wrong
- Fixed a few FPU bugs
- Timer reorganisation
- Sound reorganisation
- Other general reorganisation
- AdLib Gold emulation
- Windows Sound System emulation
- Pro Audio Spectrum 16 emulation. This currently works with most DOS stuff, but not in Windows
- Major improvements to GUS emulation. Has the downside that it now conflicts with SB emulation, so probably best to not enable both simultaneously
- New graphics cards :
  - ATI-18800 (VGA Edge-16)
  - ATI-28800 (VGA Charger)
  - ATI Mach64GX (Graphics Pro Turbo). Quite a few features missing, but Windows doesn't seem to use half the features of this card
  - Cirrus Logic CL-GD5429. Blitter is a bit broken
  - Oak OTI-067
  - S3 Trio64 (Number Nine 9FX)
  - S3 Virge. Only framebuffer stuff at the minute, Windows won't recognise the card
  - Trident TGUI-9440
  - VGA. Doesn't work yet
- Beginnings of 3DFX emulation, however this is in extremely early stages and doesn't do anything useful
- Fixed DMA bug stopping floppy drives working in Windows 3.x
- Fixed some other stuff probably
- Broke some other stuff probably as well
This commit is contained in:
TomW 2013-05-27 17:46:42 +01:00
commit 9312de19ac
87 changed files with 4528 additions and 9373 deletions
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38
src/vid_paradise.c
View file

@ -4,12 +4,14 @@
MegaPC uses W90C11A
*/
#include "ibm.h"
#include "mem.h"
#include "video.h"
#include "vid_svga.h"
#include "vid_unk_ramdac.h"
void paradise_write(uint32_t addr, uint8_t val);
uint8_t paradise_read(uint32_t addr);
void paradise_write(uint32_t addr, uint8_t val, void *priv);
uint8_t paradise_read(uint32_t addr, void *priv);
void paradise_remap();
enum
{
@ -21,7 +23,7 @@ static int paradise_type;
static uint32_t paradise_bank_r[4], paradise_bank_w[4];
void paradise_out(uint16_t addr, uint8_t val)
void paradise_out(uint16_t addr, uint8_t val, void *priv)
{
uint8_t old;
@ -52,21 +54,21 @@ void paradise_out(uint16_t addr, uint8_t val)
{
if ((gdcreg[6] & 0xc) != (val & 0xc))
{
mem_removehandler(0xa0000, 0x20000, paradise_read, NULL, NULL, svga_write, NULL, NULL);
mem_removehandler(0xa0000, 0x20000, paradise_read, NULL, NULL, paradise_write, NULL, NULL, NULL);
// pclog("Write mapping %02X\n", val);
switch (val&0xC)
{
case 0x0: /*128k at A0000*/
mem_sethandler(0xa0000, 0x20000, paradise_read, NULL, NULL, paradise_write, NULL, NULL);
mem_sethandler(0xa0000, 0x20000, paradise_read, NULL, NULL, paradise_write, NULL, NULL, NULL);
break;
case 0x4: /*64k at A0000*/
mem_sethandler(0xa0000, 0x10000, paradise_read, NULL, NULL, paradise_write, NULL, NULL);
mem_sethandler(0xa0000, 0x10000, paradise_read, NULL, NULL, paradise_write, NULL, NULL, NULL);
break;
case 0x8: /*32k at B0000*/
mem_sethandler(0xb0000, 0x08000, paradise_read, NULL, NULL, paradise_write, NULL, NULL);
mem_sethandler(0xb0000, 0x08000, paradise_read, NULL, NULL, paradise_write, NULL, NULL, NULL);
break;
case 0xC: /*32k at B8000*/
mem_sethandler(0xb8000, 0x08000, paradise_read, NULL, NULL, paradise_write, NULL, NULL);
mem_sethandler(0xb8000, 0x08000, paradise_read, NULL, NULL, paradise_write, NULL, NULL, NULL);
break;
}
}
@ -114,13 +116,11 @@ void paradise_out(uint16_t addr, uint8_t val)
}
break;
}
svga_out(addr,val);
svga_out(addr, val, NULL);
}
uint8_t paradise_in(uint16_t addr)
uint8_t paradise_in(uint16_t addr, void *priv)
{
uint8_t temp;
if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga_miscout&1)) addr ^= 0x60;
// if (addr != 0x3da) pclog("Paradise in %04X\n", addr);
@ -157,7 +157,7 @@ uint8_t paradise_in(uint16_t addr)
return 0xff;
return crtc[crtcreg];
}
return svga_in(addr);
return svga_in(addr, NULL);
}
void paradise_remap()
@ -185,8 +185,8 @@ void paradise_remap()
// pclog("Remap 3\n");
paradise_bank_r[0] = paradise_bank_w[0] = (gdcreg[0xa] & 0x7f) << 12;
paradise_bank_r[1] = paradise_bank_w[1] = ((gdcreg[0xa] & 0x7f) << 12) + ((gdcreg[6] & 0x08) ? 0 : 0x8000);
paradise_bank_w[2] = paradise_bank_w[2] = (gdcreg[0x9] & 0x7f) << 12;
paradise_bank_w[3] = paradise_bank_w[3] = ((gdcreg[0x9] & 0x7f) << 12) + ((gdcreg[6] & 0x08) ? 0 : 0x8000);
paradise_bank_r[2] = paradise_bank_w[2] = (gdcreg[0x9] & 0x7f) << 12;
paradise_bank_r[3] = paradise_bank_w[3] = ((gdcreg[0x9] & 0x7f) << 12) + ((gdcreg[6] & 0x08) ? 0 : 0x8000);
}
}
else
@ -207,20 +207,20 @@ void paradise_recalctimings()
#define egacycles 1
#define egacycles2 1
void paradise_write(uint32_t addr, uint8_t val)
void paradise_write(uint32_t addr, uint8_t val, void *priv)
{
// pclog("paradise_write : %05X %02X ", addr, val);
addr = (addr & 0x7fff) + paradise_bank_w[(addr >> 15) & 3];
// pclog("%08X\n", addr);
svga_write_linear(addr, val);
svga_write_linear(addr, val, priv);
}
uint8_t paradise_read(uint32_t addr)
uint8_t paradise_read(uint32_t addr, void *priv)
{
// pclog("paradise_read : %05X ", addr);
addr = (addr & 0x7fff) + paradise_bank_r[(addr >> 15) & 3];
// pclog("%08X\n", addr);
return svga_read_linear(addr);
return svga_read_linear(addr, priv);
}
int paradise_init()