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Move CPU segment structures into cpu_state structure.

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This commit is contained in:
SarahW 2018-07-22 12:56:03 +01:00
commit 91143d3c68
13 changed files with 280 additions and 277 deletions
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8
src/386.c
View file

@ -90,7 +90,7 @@ static inline void fetch_ea_32_long(uint32_t rmdat)
{ {
easeg = ss; easeg = ss;
ea_rseg = SS; ea_rseg = SS;
cpu_state.ea_seg = &_ss; cpu_state.ea_seg = &cpu_state.seg_ss;
} }
if (((sib >> 3) & 7) != 4) if (((sib >> 3) & 7) != 4)
cpu_state.eaaddr += cpu_state.regs[(sib >> 3) & 7].l << (sib >> 6); cpu_state.eaaddr += cpu_state.regs[(sib >> 3) & 7].l << (sib >> 6);
@ -104,7 +104,7 @@ static inline void fetch_ea_32_long(uint32_t rmdat)
{ {
easeg = ss; easeg = ss;
ea_rseg = SS; ea_rseg = SS;
cpu_state.ea_seg = &_ss; cpu_state.ea_seg = &cpu_state.seg_ss;
} }
if (cpu_mod == 1) if (cpu_mod == 1)
{ {
@ -159,7 +159,7 @@ static inline void fetch_ea_16_long(uint32_t rmdat)
{ {
easeg = ss; easeg = ss;
ea_rseg = SS; ea_rseg = SS;
cpu_state.ea_seg = &_ss; cpu_state.ea_seg = &cpu_state.seg_ss;
} }
cpu_state.eaaddr &= 0xFFFF; cpu_state.eaaddr &= 0xFFFF;
} }
@ -244,7 +244,7 @@ void exec386(int cycs)
dontprint=0; dontprint=0;
cpu_state.ea_seg = &_ds; cpu_state.ea_seg = &cpu_state.seg_ds;
cpu_state.ssegs = 0; cpu_state.ssegs = 0;
fetchdat = fastreadl(cs + cpu_state.pc); fetchdat = fastreadl(cs + cpu_state.pc);

12
src/386_dynarec.c
View file

@ -99,7 +99,7 @@ static inline void fetch_ea_32_long(uint32_t rmdat)
{ {
easeg = ss; easeg = ss;
ea_rseg = SS; ea_rseg = SS;
cpu_state.ea_seg = &_ss; cpu_state.ea_seg = &cpu_state.seg_ss;
} }
if (((sib >> 3) & 7) != 4) if (((sib >> 3) & 7) != 4)
cpu_state.eaaddr += cpu_state.regs[(sib >> 3) & 7].l << (sib >> 6); cpu_state.eaaddr += cpu_state.regs[(sib >> 3) & 7].l << (sib >> 6);
@ -113,7 +113,7 @@ static inline void fetch_ea_32_long(uint32_t rmdat)
{ {
easeg = ss; easeg = ss;
ea_rseg = SS; ea_rseg = SS;
cpu_state.ea_seg = &_ss; cpu_state.ea_seg = &cpu_state.seg_ss;
} }
if (cpu_mod == 1) if (cpu_mod == 1)
{ {
@ -168,7 +168,7 @@ static inline void fetch_ea_16_long(uint32_t rmdat)
{ {
easeg = ss; easeg = ss;
ea_rseg = SS; ea_rseg = SS;
cpu_state.ea_seg = &_ss; cpu_state.ea_seg = &cpu_state.seg_ss;
} }
cpu_state.eaaddr &= 0xFFFF; cpu_state.eaaddr &= 0xFFFF;
} }
@ -553,7 +553,7 @@ void exec386_dynarec(int cycs)
oldcpl=CPL; oldcpl=CPL;
cpu_state.op32 = use32; cpu_state.op32 = use32;
cpu_state.ea_seg = &_ds; cpu_state.ea_seg = &cpu_state.seg_ds;
cpu_state.ssegs = 0; cpu_state.ssegs = 0;
fetchdat = fastreadl(cs + cpu_state.pc); fetchdat = fastreadl(cs + cpu_state.pc);
@ -711,7 +711,7 @@ inrecomp=0;
oldcpl=CPL; oldcpl=CPL;
cpu_state.op32 = use32; cpu_state.op32 = use32;
cpu_state.ea_seg = &_ds; cpu_state.ea_seg = &cpu_state.seg_ds;
cpu_state.ssegs = 0; cpu_state.ssegs = 0;
fetchdat = fastreadl(cs + cpu_state.pc); fetchdat = fastreadl(cs + cpu_state.pc);
@ -793,7 +793,7 @@ inrecomp=0;
oldcpl=CPL; oldcpl=CPL;
cpu_state.op32 = use32; cpu_state.op32 = use32;
cpu_state.ea_seg = &_ds; cpu_state.ea_seg = &cpu_state.seg_ds;
cpu_state.ssegs = 0; cpu_state.ssegs = 0;
codegen_endpc = (cs + cpu_state.pc) + 8; codegen_endpc = (cs + cpu_state.pc) + 8;

32
src/808x.c
View file

@ -577,15 +577,15 @@ void dumpregs()
printf("In %s mode\n",(msw&1)?((eflags&VM_FLAG)?"V86":"protected"):"real"); printf("In %s mode\n",(msw&1)?((eflags&VM_FLAG)?"V86":"protected"):"real");
else else
printf("In %s mode\n",(msw&1)?"protected":"real"); printf("In %s mode\n",(msw&1)?"protected":"real");
printf("CS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",cs,_cs.limit,_cs.access, _cs.limit_low, _cs.limit_high); printf("CS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",cs,cpu_state.seg_cs.limit,cpu_state.seg_cs.access, cpu_state.seg_cs.limit_low, cpu_state.seg_cs.limit_high);
printf("DS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",ds,_ds.limit,_ds.access, _ds.limit_low, _ds.limit_high); printf("DS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",ds,cpu_state.seg_ds.limit,cpu_state.seg_ds.access, cpu_state.seg_ds.limit_low, cpu_state.seg_ds.limit_high);
printf("ES : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",es,_es.limit,_es.access, _es.limit_low, _es.limit_high); printf("ES : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",es,cpu_state.seg_es.limit,cpu_state.seg_es.access, cpu_state.seg_es.limit_low, cpu_state.seg_es.limit_high);
if (is386) if (is386)
{ {
printf("FS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",seg_fs,_fs.limit,_fs.access, _fs.limit_low, _fs.limit_high); printf("FS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",cpu_state.seg_fs.base,cpu_state.seg_fs.limit,cpu_state.seg_fs.access, cpu_state.seg_fs.limit_low, cpu_state.seg_fs.limit_high);
printf("GS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",gs,_gs.limit,_gs.access, _gs.limit_low, _gs.limit_high); printf("GS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",gs,cpu_state.seg_gs.limit,cpu_state.seg_gs.access, cpu_state.seg_gs.limit_low, cpu_state.seg_gs.limit_high);
} }
printf("SS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",ss,_ss.limit,_ss.access, _ss.limit_low, _ss.limit_high); printf("SS : base=%06X limit=%08X access=%02X limit_low=%08X limit_high=%08X\n",ss,cpu_state.seg_ss.limit,cpu_state.seg_ss.access, cpu_state.seg_ss.limit_low, cpu_state.seg_ss.limit_high);
printf("GDT : base=%06X limit=%04X\n",gdt.base,gdt.limit); printf("GDT : base=%06X limit=%04X\n",gdt.base,gdt.limit);
printf("LDT : base=%06X limit=%04X\n",ldt.base,ldt.limit); printf("LDT : base=%06X limit=%04X\n",ldt.base,ldt.limit);
printf("IDT : base=%06X limit=%04X\n",idt.base,idt.limit); printf("IDT : base=%06X limit=%04X\n",idt.base,idt.limit);
@ -1195,7 +1195,7 @@ void execx86(int cycs)
case 0x07: /*POP ES*/ case 0x07: /*POP ES*/
if (cpu_state.ssegs) ss=oldss; if (cpu_state.ssegs) ss=oldss;
tempw=readmemw(ss,SP); tempw=readmemw(ss,SP);
loadseg(tempw,&_es); loadseg(tempw,&cpu_state.seg_es);
SP+=2; SP+=2;
cycles-=12; cycles-=12;
break; break;
@ -1258,7 +1258,7 @@ void execx86(int cycs)
case 0x0F: /*POP CS - 8088/8086 only*/ case 0x0F: /*POP CS - 8088/8086 only*/
if (cpu_state.ssegs) ss=oldss; if (cpu_state.ssegs) ss=oldss;
tempw=readmemw(ss,SP); tempw=readmemw(ss,SP);
loadseg(tempw,&_cs); loadseg(tempw,&cpu_state.seg_cs);
SP+=2; SP+=2;
cycles-=12; cycles-=12;
break; break;
@ -1317,7 +1317,7 @@ void execx86(int cycs)
case 0x17: /*POP SS*/ case 0x17: /*POP SS*/
if (cpu_state.ssegs) ss=oldss; if (cpu_state.ssegs) ss=oldss;
tempw=readmemw(ss,SP); tempw=readmemw(ss,SP);
loadseg(tempw,&_ss); loadseg(tempw,&cpu_state.seg_ss);
SP+=2; SP+=2;
noint=1; noint=1;
cycles-=12; cycles-=12;
@ -1382,7 +1382,7 @@ void execx86(int cycs)
case 0x1F: /*POP DS*/ case 0x1F: /*POP DS*/
if (cpu_state.ssegs) ss=oldss; if (cpu_state.ssegs) ss=oldss;
tempw=readmemw(ss,SP); tempw=readmemw(ss,SP);
loadseg(tempw,&_ds); loadseg(tempw,&cpu_state.seg_ds);
if (cpu_state.ssegs) oldds=ds; if (cpu_state.ssegs) oldds=ds;
SP+=2; SP+=2;
cycles-=12; cycles-=12;
@ -2088,20 +2088,20 @@ void execx86(int cycs)
{ {
case 0x00: /*ES*/ case 0x00: /*ES*/
tempw=geteaw(); tempw=geteaw();
loadseg(tempw,&_es); loadseg(tempw,&cpu_state.seg_es);
break; break;
case 0x08: /*CS - 8088/8086 only*/ case 0x08: /*CS - 8088/8086 only*/
tempw=geteaw(); tempw=geteaw();
loadseg(tempw,&_cs); loadseg(tempw,&cpu_state.seg_cs);
break; break;
case 0x18: /*DS*/ case 0x18: /*DS*/
tempw=geteaw(); tempw=geteaw();
loadseg(tempw,&_ds); loadseg(tempw,&cpu_state.seg_ds);
if (cpu_state.ssegs) oldds=ds; if (cpu_state.ssegs) oldds=ds;
break; break;
case 0x10: /*SS*/ case 0x10: /*SS*/
tempw=geteaw(); tempw=geteaw();
loadseg(tempw,&_ss); loadseg(tempw,&cpu_state.seg_ss);
if (cpu_state.ssegs) oldss=ss; if (cpu_state.ssegs) oldss=ss;
// printf("LOAD SS %04X %04X\n",tempw,SS); // printf("LOAD SS %04X %04X\n",tempw,SS);
// printf("SS loaded with %04X %04X:%04X %04X %04X %04X\n",ss>>4,cs>>4,pc,CX,DX,es>>4); // printf("SS loaded with %04X %04X:%04X %04X %04X %04X\n",ss>>4,cs>>4,pc,CX,DX,es>>4);
@ -2350,14 +2350,14 @@ void execx86(int cycs)
fetchea(); fetchea();
cpu_state.regs[cpu_reg].w=readmemw(easeg,cpu_state.eaaddr); //geteaw(); cpu_state.regs[cpu_reg].w=readmemw(easeg,cpu_state.eaaddr); //geteaw();
tempw=readmemw(easeg,(cpu_state.eaaddr+2)&0xFFFF); //geteaw2(); tempw=readmemw(easeg,(cpu_state.eaaddr+2)&0xFFFF); //geteaw2();
loadseg(tempw,&_es); loadseg(tempw,&cpu_state.seg_es);
cycles-=24; cycles-=24;
break; break;
case 0xC5: /*LDS*/ case 0xC5: /*LDS*/
fetchea(); fetchea();
cpu_state.regs[cpu_reg].w=readmemw(easeg,cpu_state.eaaddr); cpu_state.regs[cpu_reg].w=readmemw(easeg,cpu_state.eaaddr);
tempw=readmemw(easeg,(cpu_state.eaaddr+2)&0xFFFF); tempw=readmemw(easeg,(cpu_state.eaaddr+2)&0xFFFF);
loadseg(tempw,&_ds); loadseg(tempw,&cpu_state.seg_ds);
if (cpu_state.ssegs) oldds=ds; if (cpu_state.ssegs) oldds=ds;
cycles-=24; cycles-=24;
break; break;

23
src/codegen.c
View file

@ -103,7 +103,7 @@ static x86seg *codegen_generate_ea_16_long(ir_data_t *ir, x86seg *op_ea_seg, uin
if (mod1seg[cpu_rm] == &ss && !op_ssegs) if (mod1seg[cpu_rm] == &ss && !op_ssegs)
{ {
op_ea_seg = &_ss; op_ea_seg = &cpu_state.seg_ss;
} }
} }
@ -153,7 +153,7 @@ static x86seg *codegen_generate_ea_32_long(ir_data_t *ir, x86seg *op_ea_seg, uin
// addlong(stack_offset); // addlong(stack_offset);
} }
if (((sib & 7) == 4 || (cpu_mod && (sib & 7) == 5)) && !op_ssegs) if (((sib & 7) == 4 || (cpu_mod && (sib & 7) == 5)) && !op_ssegs)
op_ea_seg = &_ss; op_ea_seg = &cpu_state.seg_ss;
if (((sib >> 3) & 7) != 4) if (((sib >> 3) & 7) != 4)
{ {
switch (sib >> 6) switch (sib >> 6)
@ -186,7 +186,7 @@ static x86seg *codegen_generate_ea_32_long(ir_data_t *ir, x86seg *op_ea_seg, uin
if (cpu_mod) if (cpu_mod)
{ {
if (cpu_rm == 5 && !op_ssegs) if (cpu_rm == 5 && !op_ssegs)
op_ea_seg = &_ss; op_ea_seg = &cpu_state.seg_ss;
if (cpu_mod == 1) if (cpu_mod == 1)
{ {
uop_ADD_IMM(ir, IREG_eaaddr, IREG_eaaddr, (uint32_t)(int8_t)(fetchdat >> 8)); uop_ADD_IMM(ir, IREG_eaaddr, IREG_eaaddr, (uint32_t)(int8_t)(fetchdat >> 8));
@ -258,13 +258,12 @@ void codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t
int opcode_shift = 0; int opcode_shift = 0;
int opcode_mask = 0x3ff; int opcode_mask = 0x3ff;
uint32_t op_32 = use32; uint32_t op_32 = use32;
x86seg *op_ea_seg = &_ds;
int op_ssegs = 0;
int over = 0; int over = 0;
int test_modrm = 1; int test_modrm = 1;
int pc_off = 0; int pc_off = 0;
op_ea_seg = &_ds; op_ea_seg = &cpu_state.seg_ds;
op_ssegs = 0;
codegen_timing_start(); codegen_timing_start();
@ -279,27 +278,27 @@ void codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t
break; break;
case 0x26: /*ES:*/ case 0x26: /*ES:*/
op_ea_seg = &_es; op_ea_seg = &cpu_state.seg_es;
op_ssegs = 1; op_ssegs = 1;
break; break;
case 0x2e: /*CS:*/ case 0x2e: /*CS:*/
op_ea_seg = &_cs; op_ea_seg = &cpu_state.seg_cs;
op_ssegs = 1; op_ssegs = 1;
break; break;
case 0x36: /*SS:*/ case 0x36: /*SS:*/
op_ea_seg = &_ss; op_ea_seg = &cpu_state.seg_ss;
op_ssegs = 1; op_ssegs = 1;
break; break;
case 0x3e: /*DS:*/ case 0x3e: /*DS:*/
op_ea_seg = &_ds; op_ea_seg = &cpu_state.seg_ds;
op_ssegs = 1; op_ssegs = 1;
break; break;
case 0x64: /*FS:*/ case 0x64: /*FS:*/
op_ea_seg = &_fs; op_ea_seg = &cpu_state.seg_fs;
op_ssegs = 1; op_ssegs = 1;
break; break;
case 0x65: /*GS:*/ case 0x65: /*GS:*/
op_ea_seg = &_gs; op_ea_seg = &cpu_state.seg_gs;
op_ssegs = 1; op_ssegs = 1;
break; break;

2
src/codegen_backend.c
View file

@ -301,7 +301,7 @@ void codegen_block_start_recompile(codeblock_t *block)
codegen_fpu_loaded_iq[0] = codegen_fpu_loaded_iq[1] = codegen_fpu_loaded_iq[2] = codegen_fpu_loaded_iq[3] = codegen_fpu_loaded_iq[0] = codegen_fpu_loaded_iq[1] = codegen_fpu_loaded_iq[2] = codegen_fpu_loaded_iq[3] =
codegen_fpu_loaded_iq[4] = codegen_fpu_loaded_iq[5] = codegen_fpu_loaded_iq[6] = codegen_fpu_loaded_iq[7] = 0; codegen_fpu_loaded_iq[4] = codegen_fpu_loaded_iq[5] = codegen_fpu_loaded_iq[6] = codegen_fpu_loaded_iq[7] = 0;
_ds.checked = _es.checked = _fs.checked = _gs.checked = (cr0 & 1) ? 0 : 1; cpu_state.seg_ds.checked = cpu_state.seg_es.checked = cpu_state.seg_fs.checked = cpu_state.seg_gs.checked = (cr0 & 1) ? 0 : 1;
block->TOP = cpu_state.TOP; block->TOP = cpu_state.TOP;
block->was_recompiled = 1; block->was_recompiled = 1;

29
src/ibm.h
View file

@ -176,6 +176,8 @@ struct
MMX_REG MM[8]; MMX_REG MM[8];
uint16_t old_npxc, new_npxc; uint16_t old_npxc, new_npxc;
x86seg seg_cs,seg_ds,seg_es,seg_ss,seg_fs,seg_gs;
} cpu_state; } cpu_state;
#define cycles cpu_state._cycles #define cycles cpu_state._cycles
@ -209,7 +211,6 @@ extern int ins,output;
extern int cycdiff; extern int cycdiff;
x86seg gdt,ldt,idt,tr; x86seg gdt,ldt,idt,tr;
x86seg _cs,_ds,_es,_ss,_fs,_gs;
x86seg _oldds; x86seg _oldds;
uint32_t pccache; uint32_t pccache;
@ -218,20 +219,20 @@ uint8_t *pccache2;
_cs,_ds,_es,_ss are the segment structures _cs,_ds,_es,_ss are the segment structures
CS,DS,ES,SS is the 16-bit data CS,DS,ES,SS is the 16-bit data
cs,ds,es,ss are defines to the bases*/ cs,ds,es,ss are defines to the bases*/
#define CS _cs.seg #define CS cpu_state.seg_cs.seg
#define DS _ds.seg #define DS cpu_state.seg_ds.seg
#define ES _es.seg #define ES cpu_state.seg_es.seg
#define SS _ss.seg #define SS cpu_state.seg_ss.seg
#define FS _fs.seg #define FS cpu_state.seg_fs.seg
#define GS _gs.seg #define GS cpu_state.seg_gs.seg
#define cs _cs.base #define cs cpu_state.seg_cs.base
#define ds _ds.base #define ds cpu_state.seg_ds.base
#define es _es.base #define es cpu_state.seg_es.base
#define ss _ss.base #define ss cpu_state.seg_ss.base
#define seg_fs _fs.base //#define seg_fs _fs.base
#define gs _gs.base #define gs cpu_state.seg_gs.base
#define CPL ((_cs.access>>5)&3) #define CPL ((cpu_state.seg_cs.access>>5)&3)
void loadseg(uint16_t seg, x86seg *s); void loadseg(uint16_t seg, x86seg *s);
void loadcs(uint16_t seg); void loadcs(uint16_t seg);

43
src/x86_ops_misc.h
View file

@ -800,22 +800,22 @@ static int opLOADALL(uint32_t fetchdat)
CX = readmemw(0, 0x832); CX = readmemw(0, 0x832);
AX = readmemw(0, 0x834); AX = readmemw(0, 0x834);
es = readmemw(0, 0x836) | (readmemb(0, 0x838) << 16); es = readmemw(0, 0x836) | (readmemb(0, 0x838) << 16);
_es.access = readmemb(0, 0x839); cpu_state.seg_es.access = readmemb(0, 0x839);
_es.limit = readmemw(0, 0x83A); cpu_state.seg_es.limit = readmemw(0, 0x83A);
cs = readmemw(0, 0x83C) | (readmemb(0, 0x83E) << 16); cs = readmemw(0, 0x83C) | (readmemb(0, 0x83E) << 16);
_cs.access = readmemb(0, 0x83F); cpu_state.seg_cs.access = readmemb(0, 0x83F);
_cs.limit = readmemw(0, 0x840); cpu_state.seg_cs.limit = readmemw(0, 0x840);
ss = readmemw(0, 0x842) | (readmemb(0, 0x844) << 16); ss = readmemw(0, 0x842) | (readmemb(0, 0x844) << 16);
_ss.access = readmemb(0, 0x845); cpu_state.seg_ss.access = readmemb(0, 0x845);
_ss.limit = readmemw(0, 0x846); cpu_state.seg_ss.limit = readmemw(0, 0x846);
if (_ss.base == 0 && _ss.limit_low == 0 && _ss.limit_high == 0xffffffff) if (cpu_state.seg_ss.base == 0 && cpu_state.seg_ss.limit_low == 0 && cpu_state.seg_ss.limit_high == 0xffffffff)
cpu_cur_status &= ~CPU_STATUS_NOTFLATSS; cpu_cur_status &= ~CPU_STATUS_NOTFLATSS;
else else
cpu_cur_status |= CPU_STATUS_NOTFLATSS; cpu_cur_status |= CPU_STATUS_NOTFLATSS;
ds = readmemw(0, 0x848) | (readmemb(0, 0x84A) << 16); ds = readmemw(0, 0x848) | (readmemb(0, 0x84A) << 16);
_ds.access = readmemb(0, 0x84B); cpu_state.seg_ds.access = readmemb(0, 0x84B);
_ds.limit = readmemw(0, 0x84C); cpu_state.seg_ds.limit = readmemw(0, 0x84C);
if (_ds.base == 0 && _ds.limit_low == 0 && _ds.limit_high == 0xffffffff) if (cpu_state.seg_ds.base == 0 && cpu_state.seg_ds.limit_low == 0 && cpu_state.seg_ds.limit_high == 0xffffffff)
cpu_cur_status &= ~CPU_STATUS_NOTFLATDS; cpu_cur_status &= ~CPU_STATUS_NOTFLATDS;
else else
cpu_cur_status |= CPU_STATUS_NOTFLATDS; cpu_cur_status |= CPU_STATUS_NOTFLATDS;
@ -856,8 +856,11 @@ static void loadall_load_segment(uint32_t addr, x86seg *s)
s->base = readmeml(0, addr + 4); s->base = readmeml(0, addr + 4);
s->limit = readmeml(0, addr + 8); s->limit = readmeml(0, addr + 8);
if (s == &_cs) use32 = (segdat3 & 0x40) ? 0x300 : 0; if (s == &cpu_state.seg_cs)
if (s == &_ss) stack32 = (segdat3 & 0x40) ? 1 : 0; use32 = (segdat3 & 0x40) ? 0x300 : 0;
if (s == &cpu_state.seg_ss)
stack32 = (segdat3 & 0x40) ? 1 : 0;
cpu_cur_status &= ~(CPU_STATUS_USE32 | CPU_STATUS_STACK32); cpu_cur_status &= ~(CPU_STATUS_USE32 | CPU_STATUS_STACK32);
if (use32) if (use32)
cpu_cur_status |= CPU_STATUS_USE32; cpu_cur_status |= CPU_STATUS_USE32;
@ -866,14 +869,14 @@ static void loadall_load_segment(uint32_t addr, x86seg *s)
set_segment_limit(s, segdat3); set_segment_limit(s, segdat3);
if (s == &_ds) if (s == &cpu_state.seg_ds)
{ {
if (s->base == 0 && s->limit_low == 0 && s->limit_high == 0xffffffff) if (s->base == 0 && s->limit_low == 0 && s->limit_high == 0xffffffff)
cpu_cur_status &= ~CPU_STATUS_NOTFLATDS; cpu_cur_status &= ~CPU_STATUS_NOTFLATDS;
else else
cpu_cur_status |= CPU_STATUS_NOTFLATDS; cpu_cur_status |= CPU_STATUS_NOTFLATDS;
} }
if (s == &_ss) if (s == &cpu_state.seg_ss)
{ {
if (s->base == 0 && s->limit_low == 0 && s->limit_high == 0xffffffff) if (s->base == 0 && s->limit_low == 0 && s->limit_high == 0xffffffff)
cpu_cur_status &= ~CPU_STATUS_NOTFLATSS; cpu_cur_status &= ~CPU_STATUS_NOTFLATSS;
@ -914,12 +917,12 @@ static int opLOADALL386(uint32_t fetchdat)
loadall_load_segment(la_addr + 0x60, &idt); loadall_load_segment(la_addr + 0x60, &idt);
loadall_load_segment(la_addr + 0x6c, &gdt); loadall_load_segment(la_addr + 0x6c, &gdt);
loadall_load_segment(la_addr + 0x78, &ldt); loadall_load_segment(la_addr + 0x78, &ldt);
loadall_load_segment(la_addr + 0x84, &_gs); loadall_load_segment(la_addr + 0x84, &cpu_state.seg_gs);
loadall_load_segment(la_addr + 0x90, &_fs); loadall_load_segment(la_addr + 0x90, &cpu_state.seg_fs);
loadall_load_segment(la_addr + 0x9c, &_ds); loadall_load_segment(la_addr + 0x9c, &cpu_state.seg_ds);
loadall_load_segment(la_addr + 0xa8, &_ss); loadall_load_segment(la_addr + 0xa8, &cpu_state.seg_ss);
loadall_load_segment(la_addr + 0xb4, &_cs); loadall_load_segment(la_addr + 0xb4, &cpu_state.seg_cs);
loadall_load_segment(la_addr + 0xc0, &_es); loadall_load_segment(la_addr + 0xc0, &cpu_state.seg_es);
if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); if (CPL==3 && oldcpl!=3) flushmmucache_cr3();

46
src/x86_ops_mov_seg.h
View file

@ -152,28 +152,28 @@ static int opMOV_seg_w_a16(uint32_t fetchdat)
switch (rmdat & 0x38) switch (rmdat & 0x38)
{ {
case 0x00: /*ES*/ case 0x00: /*ES*/
loadseg(new_seg, &_es); loadseg(new_seg, &cpu_state.seg_es);
break; break;
case 0x18: /*DS*/ case 0x18: /*DS*/
loadseg(new_seg, &_ds); loadseg(new_seg, &cpu_state.seg_ds);
break; break;
case 0x10: /*SS*/ case 0x10: /*SS*/
loadseg(new_seg, &_ss); loadseg(new_seg, &cpu_state.seg_ss);
if (cpu_state.abrt) return 1; if (cpu_state.abrt) return 1;
cpu_state.oldpc = cpu_state.pc; cpu_state.oldpc = cpu_state.pc;
cpu_state.op32 = use32; cpu_state.op32 = use32;
cpu_state.ssegs = 0; cpu_state.ssegs = 0;
cpu_state.ea_seg = &_ds; cpu_state.ea_seg = &cpu_state.seg_ds;
fetchdat = fastreadl(cs + cpu_state.pc); fetchdat = fastreadl(cs + cpu_state.pc);
cpu_state.pc++; cpu_state.pc++;
if (cpu_state.abrt) return 1; if (cpu_state.abrt) return 1;
x86_opcodes[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8); x86_opcodes[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8);
return 1; return 1;
case 0x20: /*FS*/ case 0x20: /*FS*/
loadseg(new_seg, &_fs); loadseg(new_seg, &cpu_state.seg_fs);
break; break;
case 0x28: /*GS*/ case 0x28: /*GS*/
loadseg(new_seg, &_gs); loadseg(new_seg, &cpu_state.seg_gs);
break; break;
} }
@ -193,28 +193,28 @@ static int opMOV_seg_w_a32(uint32_t fetchdat)
switch (rmdat & 0x38) switch (rmdat & 0x38)
{ {
case 0x00: /*ES*/ case 0x00: /*ES*/
loadseg(new_seg, &_es); loadseg(new_seg, &cpu_state.seg_es);
break; break;
case 0x18: /*DS*/ case 0x18: /*DS*/
loadseg(new_seg, &_ds); loadseg(new_seg, &cpu_state.seg_ds);
break; break;
case 0x10: /*SS*/ case 0x10: /*SS*/
loadseg(new_seg, &_ss); loadseg(new_seg, &cpu_state.seg_ss);
if (cpu_state.abrt) return 1; if (cpu_state.abrt) return 1;
cpu_state.oldpc = cpu_state.pc; cpu_state.oldpc = cpu_state.pc;
cpu_state.op32 = use32; cpu_state.op32 = use32;
cpu_state.ssegs = 0; cpu_state.ssegs = 0;
cpu_state.ea_seg = &_ds; cpu_state.ea_seg = &cpu_state.seg_ds;
fetchdat = fastreadl(cs + cpu_state.pc); fetchdat = fastreadl(cs + cpu_state.pc);
cpu_state.pc++; cpu_state.pc++;
if (cpu_state.abrt) return 1; if (cpu_state.abrt) return 1;
x86_opcodes[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8); x86_opcodes[(fetchdat & 0xff) | cpu_state.op32](fetchdat >> 8);
return 1; return 1;
case 0x20: /*FS*/ case 0x20: /*FS*/
loadseg(new_seg, &_fs); loadseg(new_seg, &cpu_state.seg_fs);
break; break;
case 0x28: /*GS*/ case 0x28: /*GS*/
loadseg(new_seg, &_gs); loadseg(new_seg, &cpu_state.seg_gs);
break; break;
} }
@ -233,7 +233,7 @@ static int opLDS_w_a16(uint32_t fetchdat)
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
addr = readmemw(easeg, cpu_state.eaaddr); addr = readmemw(easeg, cpu_state.eaaddr);
seg = readmemw(easeg, cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1; seg = readmemw(easeg, cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1;
loadseg(seg, &_ds); if (cpu_state.abrt) return 1; loadseg(seg, &cpu_state.seg_ds); if (cpu_state.abrt) return 1;
cpu_state.regs[cpu_reg].w = addr; cpu_state.regs[cpu_reg].w = addr;
CLOCK_CYCLES(7); CLOCK_CYCLES(7);
@ -249,7 +249,7 @@ static int opLDS_w_a32(uint32_t fetchdat)
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
addr = readmemw(easeg, cpu_state.eaaddr); addr = readmemw(easeg, cpu_state.eaaddr);
seg = readmemw(easeg, cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1; seg = readmemw(easeg, cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1;
loadseg(seg, &_ds); if (cpu_state.abrt) return 1; loadseg(seg, &cpu_state.seg_ds); if (cpu_state.abrt) return 1;
cpu_state.regs[cpu_reg].w = addr; cpu_state.regs[cpu_reg].w = addr;
CLOCK_CYCLES(7); CLOCK_CYCLES(7);
@ -266,7 +266,7 @@ static int opLDS_l_a16(uint32_t fetchdat)
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
addr = readmeml(easeg, cpu_state.eaaddr); addr = readmeml(easeg, cpu_state.eaaddr);
seg = readmemw(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 1; seg = readmemw(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 1;
loadseg(seg, &_ds); if (cpu_state.abrt) return 1; loadseg(seg, &cpu_state.seg_ds); if (cpu_state.abrt) return 1;
cpu_state.regs[cpu_reg].l = addr; cpu_state.regs[cpu_reg].l = addr;
CLOCK_CYCLES(7); CLOCK_CYCLES(7);
@ -283,7 +283,7 @@ static int opLDS_l_a32(uint32_t fetchdat)
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
addr = readmeml(easeg, cpu_state.eaaddr); addr = readmeml(easeg, cpu_state.eaaddr);
seg = readmemw(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 1; seg = readmemw(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 1;
loadseg(seg, &_ds); if (cpu_state.abrt) return 1; loadseg(seg, &cpu_state.seg_ds); if (cpu_state.abrt) return 1;
cpu_state.regs[cpu_reg].l = addr; cpu_state.regs[cpu_reg].l = addr;
CLOCK_CYCLES(7); CLOCK_CYCLES(7);
@ -300,7 +300,7 @@ static int opLSS_w_a16(uint32_t fetchdat)
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
addr = readmemw(easeg, cpu_state.eaaddr); addr = readmemw(easeg, cpu_state.eaaddr);
seg = readmemw(easeg, cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1; seg = readmemw(easeg, cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1;
loadseg(seg, &_ss); if (cpu_state.abrt) return 1; loadseg(seg, &cpu_state.seg_ss); if (cpu_state.abrt) return 1;
cpu_state.regs[cpu_reg].w = addr; cpu_state.regs[cpu_reg].w = addr;
CLOCK_CYCLES(7); CLOCK_CYCLES(7);
@ -316,7 +316,7 @@ static int opLSS_w_a32(uint32_t fetchdat)
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
addr = readmemw(easeg, cpu_state.eaaddr); addr = readmemw(easeg, cpu_state.eaaddr);
seg = readmemw(easeg, cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1; seg = readmemw(easeg, cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1;
loadseg(seg, &_ss); if (cpu_state.abrt) return 1; loadseg(seg, &cpu_state.seg_ss); if (cpu_state.abrt) return 1;
cpu_state.regs[cpu_reg].w = addr; cpu_state.regs[cpu_reg].w = addr;
CLOCK_CYCLES(7); CLOCK_CYCLES(7);
@ -333,7 +333,7 @@ static int opLSS_l_a16(uint32_t fetchdat)
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
addr = readmeml(easeg, cpu_state.eaaddr); addr = readmeml(easeg, cpu_state.eaaddr);
seg = readmemw(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 1; seg = readmemw(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 1;
loadseg(seg, &_ss); if (cpu_state.abrt) return 1; loadseg(seg, &cpu_state.seg_ss); if (cpu_state.abrt) return 1;
cpu_state.regs[cpu_reg].l = addr; cpu_state.regs[cpu_reg].l = addr;
CLOCK_CYCLES(7); CLOCK_CYCLES(7);
@ -350,7 +350,7 @@ static int opLSS_l_a32(uint32_t fetchdat)
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
addr = readmeml(easeg, cpu_state.eaaddr); addr = readmeml(easeg, cpu_state.eaaddr);
seg = readmemw(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 1; seg = readmemw(easeg, cpu_state.eaaddr + 4); if (cpu_state.abrt) return 1;
loadseg(seg, &_ss); if (cpu_state.abrt) return 1; loadseg(seg, &cpu_state.seg_ss); if (cpu_state.abrt) return 1;
cpu_state.regs[cpu_reg].l = addr; cpu_state.regs[cpu_reg].l = addr;
CLOCK_CYCLES(7); CLOCK_CYCLES(7);
@ -429,6 +429,6 @@ static int opLSS_l_a32(uint32_t fetchdat)
return 0; \ return 0; \
} }
opLsel(ES, _es) opLsel(ES, cpu_state.seg_es)
opLsel(FS, _fs) opLsel(FS, cpu_state.seg_fs)
opLsel(GS, _gs) opLsel(GS, cpu_state.seg_gs)

36
src/x86_ops_prefix.h
View file

@ -63,26 +63,26 @@ static int op ## name ## _l_a32(uint32_t fetchdat) \
return normal_opcode_table[(fetchdat & 0xff) | 0x300](fetchdat >> 8); \ return normal_opcode_table[(fetchdat & 0xff) | 0x300](fetchdat >> 8); \
} }
op_seg(CS, _cs, x86_opcodes, x86_opcodes) op_seg(CS, cpu_state.seg_cs, x86_opcodes, x86_opcodes)
op_seg(DS, _ds, x86_opcodes, x86_opcodes) op_seg(DS, cpu_state.seg_ds, x86_opcodes, x86_opcodes)
op_seg(ES, _es, x86_opcodes, x86_opcodes) op_seg(ES, cpu_state.seg_es, x86_opcodes, x86_opcodes)
op_seg(FS, _fs, x86_opcodes, x86_opcodes) op_seg(FS, cpu_state.seg_fs, x86_opcodes, x86_opcodes)
op_seg(GS, _gs, x86_opcodes, x86_opcodes) op_seg(GS, cpu_state.seg_gs, x86_opcodes, x86_opcodes)
op_seg(SS, _ss, x86_opcodes, x86_opcodes) op_seg(SS, cpu_state.seg_ss, x86_opcodes, x86_opcodes)
op_seg(CS_REPE, _cs, x86_opcodes_REPE, x86_opcodes) op_seg(CS_REPE, cpu_state.seg_cs, x86_opcodes_REPE, x86_opcodes)
op_seg(DS_REPE, _ds, x86_opcodes_REPE, x86_opcodes) op_seg(DS_REPE, cpu_state.seg_ds, x86_opcodes_REPE, x86_opcodes)
op_seg(ES_REPE, _es, x86_opcodes_REPE, x86_opcodes) op_seg(ES_REPE, cpu_state.seg_es, x86_opcodes_REPE, x86_opcodes)
op_seg(FS_REPE, _fs, x86_opcodes_REPE, x86_opcodes) op_seg(FS_REPE, cpu_state.seg_fs, x86_opcodes_REPE, x86_opcodes)
op_seg(GS_REPE, _gs, x86_opcodes_REPE, x86_opcodes) op_seg(GS_REPE, cpu_state.seg_gs, x86_opcodes_REPE, x86_opcodes)
op_seg(SS_REPE, _ss, x86_opcodes_REPE, x86_opcodes) op_seg(SS_REPE, cpu_state.seg_ss, x86_opcodes_REPE, x86_opcodes)
op_seg(CS_REPNE, _cs, x86_opcodes_REPNE, x86_opcodes) op_seg(CS_REPNE, cpu_state.seg_cs, x86_opcodes_REPNE, x86_opcodes)
op_seg(DS_REPNE, _ds, x86_opcodes_REPNE, x86_opcodes) op_seg(DS_REPNE, cpu_state.seg_ds, x86_opcodes_REPNE, x86_opcodes)
op_seg(ES_REPNE, _es, x86_opcodes_REPNE, x86_opcodes) op_seg(ES_REPNE, cpu_state.seg_es, x86_opcodes_REPNE, x86_opcodes)
op_seg(FS_REPNE, _fs, x86_opcodes_REPNE, x86_opcodes) op_seg(FS_REPNE, cpu_state.seg_fs, x86_opcodes_REPNE, x86_opcodes)
op_seg(GS_REPNE, _gs, x86_opcodes_REPNE, x86_opcodes) op_seg(GS_REPNE, cpu_state.seg_gs, x86_opcodes_REPNE, x86_opcodes)
op_seg(SS_REPNE, _ss, x86_opcodes_REPNE, x86_opcodes) op_seg(SS_REPNE, cpu_state.seg_ss, x86_opcodes_REPNE, x86_opcodes)
static int op_66(uint32_t fetchdat) /*Data size select*/ static int op_66(uint32_t fetchdat) /*Data size select*/
{ {

42
src/x86_ops_rep.h
View file

@ -9,7 +9,7 @@ static int opREP_INSB_ ## size(uint32_t fetchdat)
{ \ { \
uint8_t temp; \ uint8_t temp; \
\ \
SEG_CHECK_WRITE(&_es); \ SEG_CHECK_WRITE(&cpu_state.seg_es); \
check_io_perm(DX); \ check_io_perm(DX); \
temp = inb(DX); \ temp = inb(DX); \
writememb(es, DEST_REG, temp); if (cpu_state.abrt) return 1; \ writememb(es, DEST_REG, temp); if (cpu_state.abrt) return 1; \
@ -37,7 +37,7 @@ static int opREP_INSW_ ## size(uint32_t fetchdat)
{ \ { \
uint16_t temp; \ uint16_t temp; \
\ \
SEG_CHECK_WRITE(&_es); \ SEG_CHECK_WRITE(&cpu_state.seg_es); \
check_io_perm(DX); \ check_io_perm(DX); \
check_io_perm(DX+1); \ check_io_perm(DX+1); \
temp = inw(DX); \ temp = inw(DX); \
@ -66,7 +66,7 @@ static int opREP_INSL_ ## size(uint32_t fetchdat)
{ \ { \
uint32_t temp; \ uint32_t temp; \
\ \
SEG_CHECK_WRITE(&_es); \ SEG_CHECK_WRITE(&cpu_state.seg_es); \
check_io_perm(DX); \ check_io_perm(DX); \
check_io_perm(DX+1); \ check_io_perm(DX+1); \
check_io_perm(DX+2); \ check_io_perm(DX+2); \
@ -182,13 +182,13 @@ static int opREP_MOVSB_ ## size(uint32_t fetchdat)
if (CNT_REG > 0) \ if (CNT_REG > 0) \
{ \ { \
SEG_CHECK_READ(cpu_state.ea_seg); \ SEG_CHECK_READ(cpu_state.ea_seg); \
SEG_CHECK_WRITE(&_es); \ SEG_CHECK_WRITE(&cpu_state.seg_es); \
} \ } \
while (CNT_REG > 0) \ while (CNT_REG > 0) \
{ \ { \
uint8_t temp; \ uint8_t temp; \
\ \
CHECK_WRITE_REP(&_es, DEST_REG, DEST_REG); \ CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG); \
temp = readmemb(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \ temp = readmemb(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \
writememb(es, DEST_REG, temp); if (cpu_state.abrt) return 1; \ writememb(es, DEST_REG, temp); if (cpu_state.abrt) return 1; \
\ \
@ -220,13 +220,13 @@ static int opREP_MOVSW_ ## size(uint32_t fetchdat)
if (CNT_REG > 0) \ if (CNT_REG > 0) \
{ \ { \
SEG_CHECK_READ(cpu_state.ea_seg); \ SEG_CHECK_READ(cpu_state.ea_seg); \
SEG_CHECK_WRITE(&_es); \ SEG_CHECK_WRITE(&cpu_state.seg_es); \
} \ } \
while (CNT_REG > 0) \ while (CNT_REG > 0) \
{ \ { \
uint16_t temp; \ uint16_t temp; \
\ \
CHECK_WRITE_REP(&_es, DEST_REG, DEST_REG); \ CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG); \
temp = readmemw(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \ temp = readmemw(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \
writememw(es, DEST_REG, temp); if (cpu_state.abrt) return 1; \ writememw(es, DEST_REG, temp); if (cpu_state.abrt) return 1; \
\ \
@ -258,13 +258,13 @@ static int opREP_MOVSL_ ## size(uint32_t fetchdat)
if (CNT_REG > 0) \ if (CNT_REG > 0) \
{ \ { \
SEG_CHECK_READ(cpu_state.ea_seg); \ SEG_CHECK_READ(cpu_state.ea_seg); \
SEG_CHECK_WRITE(&_es); \ SEG_CHECK_WRITE(&cpu_state.seg_es); \
} \ } \
while (CNT_REG > 0) \ while (CNT_REG > 0) \
{ \ { \
uint32_t temp; \ uint32_t temp; \
\ \
CHECK_WRITE_REP(&_es, DEST_REG, DEST_REG); \ CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG); \
temp = readmeml(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \ temp = readmeml(cpu_state.ea_seg->base, SRC_REG); if (cpu_state.abrt) return 1; \
writememl(es, DEST_REG, temp); if (cpu_state.abrt) return 1; \ writememl(es, DEST_REG, temp); if (cpu_state.abrt) return 1; \
\ \
@ -296,10 +296,10 @@ static int opREP_STOSB_ ## size(uint32_t fetchdat)
if (trap) \ if (trap) \
cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \ cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \
if (CNT_REG > 0) \ if (CNT_REG > 0) \
SEG_CHECK_WRITE(&_es); \ SEG_CHECK_WRITE(&cpu_state.seg_es); \
while (CNT_REG > 0) \ while (CNT_REG > 0) \
{ \ { \
CHECK_WRITE_REP(&_es, DEST_REG, DEST_REG); \ CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG); \
writememb(es, DEST_REG, AL); if (cpu_state.abrt) return 1; \ writememb(es, DEST_REG, AL); if (cpu_state.abrt) return 1; \
if (flags & D_FLAG) DEST_REG--; \ if (flags & D_FLAG) DEST_REG--; \
else DEST_REG++; \ else DEST_REG++; \
@ -326,10 +326,10 @@ static int opREP_STOSW_ ## size(uint32_t fetchdat)
if (trap) \ if (trap) \
cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \ cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \
if (CNT_REG > 0) \ if (CNT_REG > 0) \
SEG_CHECK_WRITE(&_es); \ SEG_CHECK_WRITE(&cpu_state.seg_es); \
while (CNT_REG > 0) \ while (CNT_REG > 0) \
{ \ { \
CHECK_WRITE_REP(&_es, DEST_REG, DEST_REG+1); \ CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG+1); \
writememw(es, DEST_REG, AX); if (cpu_state.abrt) return 1; \ writememw(es, DEST_REG, AX); if (cpu_state.abrt) return 1; \
if (flags & D_FLAG) DEST_REG -= 2; \ if (flags & D_FLAG) DEST_REG -= 2; \
else DEST_REG += 2; \ else DEST_REG += 2; \
@ -356,10 +356,10 @@ static int opREP_STOSL_ ## size(uint32_t fetchdat)
if (trap) \ if (trap) \
cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \ cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \
if (CNT_REG > 0) \ if (CNT_REG > 0) \
SEG_CHECK_WRITE(&_es); \ SEG_CHECK_WRITE(&cpu_state.seg_es); \
while (CNT_REG > 0) \ while (CNT_REG > 0) \
{ \ { \
CHECK_WRITE_REP(&_es, DEST_REG, DEST_REG+3); \ CHECK_WRITE_REP(&cpu_state.seg_es, DEST_REG, DEST_REG+3); \
writememl(es, DEST_REG, EAX); if (cpu_state.abrt) return 1; \ writememl(es, DEST_REG, EAX); if (cpu_state.abrt) return 1; \
if (flags & D_FLAG) DEST_REG -= 4; \ if (flags & D_FLAG) DEST_REG -= 4; \
else DEST_REG += 4; \ else DEST_REG += 4; \
@ -479,7 +479,7 @@ static int opREP_CMPSB_ ## size(uint32_t fetchdat)
{ \ { \
uint8_t temp, temp2; \ uint8_t temp, temp2; \
SEG_CHECK_READ(cpu_state.ea_seg); \ SEG_CHECK_READ(cpu_state.ea_seg); \
SEG_CHECK_READ(&_es); \ SEG_CHECK_READ(&cpu_state.seg_es); \
temp = readmemb(cpu_state.ea_seg->base, SRC_REG); \ temp = readmemb(cpu_state.ea_seg->base, SRC_REG); \
temp2 = readmemb(es, DEST_REG); if (cpu_state.abrt) return 1; \ temp2 = readmemb(es, DEST_REG); if (cpu_state.abrt) return 1; \
\ \
@ -509,7 +509,7 @@ static int opREP_CMPSW_ ## size(uint32_t fetchdat)
{ \ { \
uint16_t temp, temp2; \ uint16_t temp, temp2; \
SEG_CHECK_READ(cpu_state.ea_seg); \ SEG_CHECK_READ(cpu_state.ea_seg); \
SEG_CHECK_READ(&_es); \ SEG_CHECK_READ(&cpu_state.seg_es); \
temp = readmemw(cpu_state.ea_seg->base, SRC_REG); \ temp = readmemw(cpu_state.ea_seg->base, SRC_REG); \
temp2 = readmemw(es, DEST_REG); if (cpu_state.abrt) return 1; \ temp2 = readmemw(es, DEST_REG); if (cpu_state.abrt) return 1; \
\ \
@ -539,7 +539,7 @@ static int opREP_CMPSL_ ## size(uint32_t fetchdat)
{ \ { \
uint32_t temp, temp2; \ uint32_t temp, temp2; \
SEG_CHECK_READ(cpu_state.ea_seg); \ SEG_CHECK_READ(cpu_state.ea_seg); \
SEG_CHECK_READ(&_es); \ SEG_CHECK_READ(&cpu_state.seg_es); \
temp = readmeml(cpu_state.ea_seg->base, SRC_REG); \ temp = readmeml(cpu_state.ea_seg->base, SRC_REG); \
temp2 = readmeml(es, DEST_REG); if (cpu_state.abrt) return 1; \ temp2 = readmeml(es, DEST_REG); if (cpu_state.abrt) return 1; \
\ \
@ -569,7 +569,7 @@ static int opREP_SCASB_ ## size(uint32_t fetchdat)
cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \ cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \
tempz = FV; \ tempz = FV; \
if ((CNT_REG > 0) && (FV == tempz)) \ if ((CNT_REG > 0) && (FV == tempz)) \
SEG_CHECK_READ(&_es); \ SEG_CHECK_READ(&cpu_state.seg_es); \
while ((CNT_REG > 0) && (FV == tempz)) \ while ((CNT_REG > 0) && (FV == tempz)) \
{ \ { \
uint8_t temp = readmemb(es, DEST_REG); if (cpu_state.abrt) break;\ uint8_t temp = readmemb(es, DEST_REG); if (cpu_state.abrt) break;\
@ -602,7 +602,7 @@ static int opREP_SCASW_ ## size(uint32_t fetchdat)
cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \ cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \
tempz = FV; \ tempz = FV; \
if ((CNT_REG > 0) && (FV == tempz)) \ if ((CNT_REG > 0) && (FV == tempz)) \
SEG_CHECK_READ(&_es); \ SEG_CHECK_READ(&cpu_state.seg_es); \
while ((CNT_REG > 0) && (FV == tempz)) \ while ((CNT_REG > 0) && (FV == tempz)) \
{ \ { \
uint16_t temp = readmemw(es, DEST_REG); if (cpu_state.abrt) break;\ uint16_t temp = readmemw(es, DEST_REG); if (cpu_state.abrt) break;\
@ -635,7 +635,7 @@ static int opREP_SCASL_ ## size(uint32_t fetchdat)
cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \ cycles_end = cycles+1; /*Force the instruction to end after only one iteration when trap flag set*/ \
tempz = FV; \ tempz = FV; \
if ((CNT_REG > 0) && (FV == tempz)) \ if ((CNT_REG > 0) && (FV == tempz)) \
SEG_CHECK_READ(&_es); \ SEG_CHECK_READ(&cpu_state.seg_es); \
while ((CNT_REG > 0) && (FV == tempz)) \ while ((CNT_REG > 0) && (FV == tempz)) \
{ \ { \
uint32_t temp = readmeml(es, DEST_REG); if (cpu_state.abrt) break;\ uint32_t temp = readmeml(es, DEST_REG); if (cpu_state.abrt) break;\

16
src/x86_ops_stack.h
View file

@ -470,10 +470,10 @@ PUSH_SEG_OPS(FS);
PUSH_SEG_OPS(GS); PUSH_SEG_OPS(GS);
PUSH_SEG_OPS(SS); PUSH_SEG_OPS(SS);
POP_SEG_OPS(DS, &_ds); POP_SEG_OPS(DS, &cpu_state.seg_ds);
POP_SEG_OPS(ES, &_es); POP_SEG_OPS(ES, &cpu_state.seg_es);
POP_SEG_OPS(FS, &_fs); POP_SEG_OPS(FS, &cpu_state.seg_fs);
POP_SEG_OPS(GS, &_gs); POP_SEG_OPS(GS, &cpu_state.seg_gs);
static int opPOP_SS_w(uint32_t fetchdat) static int opPOP_SS_w(uint32_t fetchdat)
@ -481,14 +481,14 @@ static int opPOP_SS_w(uint32_t fetchdat)
uint16_t temp_seg; uint16_t temp_seg;
uint32_t temp_esp = ESP; uint32_t temp_esp = ESP;
temp_seg = POP_W(); if (cpu_state.abrt) return 1; temp_seg = POP_W(); if (cpu_state.abrt) return 1;
loadseg(temp_seg, &_ss); if (cpu_state.abrt) { ESP = temp_esp; return 1; } loadseg(temp_seg, &cpu_state.seg_ss); if (cpu_state.abrt) { ESP = temp_esp; return 1; }
CLOCK_CYCLES(is486 ? 3 : 7); CLOCK_CYCLES(is486 ? 3 : 7);
PREFETCH_RUN(is486 ? 3 : 7, 1, -1, 0,0,1,0, 0); PREFETCH_RUN(is486 ? 3 : 7, 1, -1, 0,0,1,0, 0);
cpu_state.oldpc = cpu_state.pc; cpu_state.oldpc = cpu_state.pc;
cpu_state.op32 = use32; cpu_state.op32 = use32;
cpu_state.ssegs = 0; cpu_state.ssegs = 0;
cpu_state.ea_seg = &_ds; cpu_state.ea_seg = &cpu_state.seg_ds;
fetchdat = fastreadl(cs + cpu_state.pc); fetchdat = fastreadl(cs + cpu_state.pc);
cpu_state.pc++; cpu_state.pc++;
if (cpu_state.abrt) return 1; if (cpu_state.abrt) return 1;
@ -501,14 +501,14 @@ static int opPOP_SS_l(uint32_t fetchdat)
uint32_t temp_seg; uint32_t temp_seg;
uint32_t temp_esp = ESP; uint32_t temp_esp = ESP;
temp_seg = POP_L(); if (cpu_state.abrt) return 1; temp_seg = POP_L(); if (cpu_state.abrt) return 1;
loadseg(temp_seg & 0xffff, &_ss); if (cpu_state.abrt) { ESP = temp_esp; return 1; } loadseg(temp_seg & 0xffff, &cpu_state.seg_ss); if (cpu_state.abrt) { ESP = temp_esp; return 1; }
CLOCK_CYCLES(is486 ? 3 : 7); CLOCK_CYCLES(is486 ? 3 : 7);
PREFETCH_RUN(is486 ? 3 : 7, 1, -1, 0,0,1,0, 0); PREFETCH_RUN(is486 ? 3 : 7, 1, -1, 0,0,1,0, 0);
cpu_state.oldpc = cpu_state.pc; cpu_state.oldpc = cpu_state.pc;
cpu_state.op32 = use32; cpu_state.op32 = use32;
cpu_state.ssegs = 0; cpu_state.ssegs = 0;
cpu_state.ea_seg = &_ds; cpu_state.ea_seg = &cpu_state.seg_ds;
fetchdat = fastreadl(cs + cpu_state.pc); fetchdat = fastreadl(cs + cpu_state.pc);
cpu_state.pc++; cpu_state.pc++;
if (cpu_state.abrt) return 1; if (cpu_state.abrt) return 1;

60
src/x86_ops_string.h
View file

@ -3,7 +3,7 @@ static int opMOVSB_a16(uint32_t fetchdat)
uint8_t temp; uint8_t temp;
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
SEG_CHECK_WRITE(&_es); SEG_CHECK_WRITE(&cpu_state.seg_es);
temp = readmemb(cpu_state.ea_seg->base, SI); if (cpu_state.abrt) return 1; temp = readmemb(cpu_state.ea_seg->base, SI); if (cpu_state.abrt) return 1;
writememb(es, DI, temp); if (cpu_state.abrt) return 1; writememb(es, DI, temp); if (cpu_state.abrt) return 1;
if (flags & D_FLAG) { DI--; SI--; } if (flags & D_FLAG) { DI--; SI--; }
@ -17,7 +17,7 @@ static int opMOVSB_a32(uint32_t fetchdat)
uint8_t temp; uint8_t temp;
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
SEG_CHECK_WRITE(&_es); SEG_CHECK_WRITE(&cpu_state.seg_es);
temp = readmemb(cpu_state.ea_seg->base, ESI); if (cpu_state.abrt) return 1; temp = readmemb(cpu_state.ea_seg->base, ESI); if (cpu_state.abrt) return 1;
writememb(es, EDI, temp); if (cpu_state.abrt) return 1; writememb(es, EDI, temp); if (cpu_state.abrt) return 1;
if (flags & D_FLAG) { EDI--; ESI--; } if (flags & D_FLAG) { EDI--; ESI--; }
@ -32,7 +32,7 @@ static int opMOVSW_a16(uint32_t fetchdat)
uint16_t temp; uint16_t temp;
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
SEG_CHECK_WRITE(&_es); SEG_CHECK_WRITE(&cpu_state.seg_es);
temp = readmemw(cpu_state.ea_seg->base, SI); if (cpu_state.abrt) return 1; temp = readmemw(cpu_state.ea_seg->base, SI); if (cpu_state.abrt) return 1;
writememw(es, DI, temp); if (cpu_state.abrt) return 1; writememw(es, DI, temp); if (cpu_state.abrt) return 1;
if (flags & D_FLAG) { DI -= 2; SI -= 2; } if (flags & D_FLAG) { DI -= 2; SI -= 2; }
@ -46,7 +46,7 @@ static int opMOVSW_a32(uint32_t fetchdat)
uint16_t temp; uint16_t temp;
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
SEG_CHECK_WRITE(&_es); SEG_CHECK_WRITE(&cpu_state.seg_es);
temp = readmemw(cpu_state.ea_seg->base, ESI); if (cpu_state.abrt) return 1; temp = readmemw(cpu_state.ea_seg->base, ESI); if (cpu_state.abrt) return 1;
writememw(es, EDI, temp); if (cpu_state.abrt) return 1; writememw(es, EDI, temp); if (cpu_state.abrt) return 1;
if (flags & D_FLAG) { EDI -= 2; ESI -= 2; } if (flags & D_FLAG) { EDI -= 2; ESI -= 2; }
@ -61,7 +61,7 @@ static int opMOVSL_a16(uint32_t fetchdat)
uint32_t temp; uint32_t temp;
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
SEG_CHECK_WRITE(&_es); SEG_CHECK_WRITE(&cpu_state.seg_es);
temp = readmeml(cpu_state.ea_seg->base, SI); if (cpu_state.abrt) return 1; temp = readmeml(cpu_state.ea_seg->base, SI); if (cpu_state.abrt) return 1;
writememl(es, DI, temp); if (cpu_state.abrt) return 1; writememl(es, DI, temp); if (cpu_state.abrt) return 1;
if (flags & D_FLAG) { DI -= 4; SI -= 4; } if (flags & D_FLAG) { DI -= 4; SI -= 4; }
@ -75,7 +75,7 @@ static int opMOVSL_a32(uint32_t fetchdat)
uint32_t temp; uint32_t temp;
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
SEG_CHECK_WRITE(&_es); SEG_CHECK_WRITE(&cpu_state.seg_es);
temp = readmeml(cpu_state.ea_seg->base, ESI); if (cpu_state.abrt) return 1; temp = readmeml(cpu_state.ea_seg->base, ESI); if (cpu_state.abrt) return 1;
writememl(es, EDI, temp); if (cpu_state.abrt) return 1; writememl(es, EDI, temp); if (cpu_state.abrt) return 1;
if (flags & D_FLAG) { EDI -= 4; ESI -= 4; } if (flags & D_FLAG) { EDI -= 4; ESI -= 4; }
@ -91,7 +91,7 @@ static int opCMPSB_a16(uint32_t fetchdat)
uint8_t src, dst; uint8_t src, dst;
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
SEG_CHECK_READ(&_es); SEG_CHECK_READ(&cpu_state.seg_es);
src = readmemb(cpu_state.ea_seg->base, SI); src = readmemb(cpu_state.ea_seg->base, SI);
dst = readmemb(es, DI); if (cpu_state.abrt) return 1; dst = readmemb(es, DI); if (cpu_state.abrt) return 1;
setsub8(src, dst); setsub8(src, dst);
@ -106,7 +106,7 @@ static int opCMPSB_a32(uint32_t fetchdat)
uint8_t src, dst; uint8_t src, dst;
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
SEG_CHECK_READ(&_es); SEG_CHECK_READ(&cpu_state.seg_es);
src = readmemb(cpu_state.ea_seg->base, ESI); src = readmemb(cpu_state.ea_seg->base, ESI);
dst = readmemb(es, EDI); if (cpu_state.abrt) return 1; dst = readmemb(es, EDI); if (cpu_state.abrt) return 1;
setsub8(src, dst); setsub8(src, dst);
@ -122,7 +122,7 @@ static int opCMPSW_a16(uint32_t fetchdat)
uint16_t src, dst; uint16_t src, dst;
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
SEG_CHECK_READ(&_es); SEG_CHECK_READ(&cpu_state.seg_es);
src = readmemw(cpu_state.ea_seg->base, SI); src = readmemw(cpu_state.ea_seg->base, SI);
dst = readmemw(es, DI); if (cpu_state.abrt) return 1; dst = readmemw(es, DI); if (cpu_state.abrt) return 1;
setsub16(src, dst); setsub16(src, dst);
@ -137,7 +137,7 @@ static int opCMPSW_a32(uint32_t fetchdat)
uint16_t src, dst; uint16_t src, dst;
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
SEG_CHECK_READ(&_es); SEG_CHECK_READ(&cpu_state.seg_es);
src = readmemw(cpu_state.ea_seg->base, ESI); src = readmemw(cpu_state.ea_seg->base, ESI);
dst = readmemw(es, EDI); if (cpu_state.abrt) return 1; dst = readmemw(es, EDI); if (cpu_state.abrt) return 1;
setsub16(src, dst); setsub16(src, dst);
@ -153,7 +153,7 @@ static int opCMPSL_a16(uint32_t fetchdat)
uint32_t src, dst; uint32_t src, dst;
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
SEG_CHECK_READ(&_es); SEG_CHECK_READ(&cpu_state.seg_es);
src = readmeml(cpu_state.ea_seg->base, SI); src = readmeml(cpu_state.ea_seg->base, SI);
dst = readmeml(es, DI); if (cpu_state.abrt) return 1; dst = readmeml(es, DI); if (cpu_state.abrt) return 1;
setsub32(src, dst); setsub32(src, dst);
@ -168,7 +168,7 @@ static int opCMPSL_a32(uint32_t fetchdat)
uint32_t src, dst; uint32_t src, dst;
SEG_CHECK_READ(cpu_state.ea_seg); SEG_CHECK_READ(cpu_state.ea_seg);
SEG_CHECK_READ(&_es); SEG_CHECK_READ(&cpu_state.seg_es);
src = readmeml(cpu_state.ea_seg->base, ESI); src = readmeml(cpu_state.ea_seg->base, ESI);
dst = readmeml(es, EDI); if (cpu_state.abrt) return 1; dst = readmeml(es, EDI); if (cpu_state.abrt) return 1;
setsub32(src, dst); setsub32(src, dst);
@ -181,7 +181,7 @@ static int opCMPSL_a32(uint32_t fetchdat)
static int opSTOSB_a16(uint32_t fetchdat) static int opSTOSB_a16(uint32_t fetchdat)
{ {
SEG_CHECK_WRITE(&_es); SEG_CHECK_WRITE(&cpu_state.seg_es);
writememb(es, DI, AL); if (cpu_state.abrt) return 1; writememb(es, DI, AL); if (cpu_state.abrt) return 1;
if (flags & D_FLAG) DI--; if (flags & D_FLAG) DI--;
else DI++; else DI++;
@ -191,7 +191,7 @@ static int opSTOSB_a16(uint32_t fetchdat)
} }
static int opSTOSB_a32(uint32_t fetchdat) static int opSTOSB_a32(uint32_t fetchdat)
{ {
SEG_CHECK_WRITE(&_es); SEG_CHECK_WRITE(&cpu_state.seg_es);
writememb(es, EDI, AL); if (cpu_state.abrt) return 1; writememb(es, EDI, AL); if (cpu_state.abrt) return 1;
if (flags & D_FLAG) EDI--; if (flags & D_FLAG) EDI--;
else EDI++; else EDI++;
@ -202,7 +202,7 @@ static int opSTOSB_a32(uint32_t fetchdat)
static int opSTOSW_a16(uint32_t fetchdat) static int opSTOSW_a16(uint32_t fetchdat)
{ {
SEG_CHECK_WRITE(&_es); SEG_CHECK_WRITE(&cpu_state.seg_es);
writememw(es, DI, AX); if (cpu_state.abrt) return 1; writememw(es, DI, AX); if (cpu_state.abrt) return 1;
if (flags & D_FLAG) DI -= 2; if (flags & D_FLAG) DI -= 2;
else DI += 2; else DI += 2;
@ -212,7 +212,7 @@ static int opSTOSW_a16(uint32_t fetchdat)
} }
static int opSTOSW_a32(uint32_t fetchdat) static int opSTOSW_a32(uint32_t fetchdat)
{ {
SEG_CHECK_WRITE(&_es); SEG_CHECK_WRITE(&cpu_state.seg_es);
writememw(es, EDI, AX); if (cpu_state.abrt) return 1; writememw(es, EDI, AX); if (cpu_state.abrt) return 1;
if (flags & D_FLAG) EDI -= 2; if (flags & D_FLAG) EDI -= 2;
else EDI += 2; else EDI += 2;
@ -223,7 +223,7 @@ static int opSTOSW_a32(uint32_t fetchdat)
static int opSTOSL_a16(uint32_t fetchdat) static int opSTOSL_a16(uint32_t fetchdat)
{ {
SEG_CHECK_WRITE(&_es); SEG_CHECK_WRITE(&cpu_state.seg_es);
writememl(es, DI, EAX); if (cpu_state.abrt) return 1; writememl(es, DI, EAX); if (cpu_state.abrt) return 1;
if (flags & D_FLAG) DI -= 4; if (flags & D_FLAG) DI -= 4;
else DI += 4; else DI += 4;
@ -233,7 +233,7 @@ static int opSTOSL_a16(uint32_t fetchdat)
} }
static int opSTOSL_a32(uint32_t fetchdat) static int opSTOSL_a32(uint32_t fetchdat)
{ {
SEG_CHECK_WRITE(&_es); SEG_CHECK_WRITE(&cpu_state.seg_es);
writememl(es, EDI, EAX); if (cpu_state.abrt) return 1; writememl(es, EDI, EAX); if (cpu_state.abrt) return 1;
if (flags & D_FLAG) EDI -= 4; if (flags & D_FLAG) EDI -= 4;
else EDI += 4; else EDI += 4;
@ -329,7 +329,7 @@ static int opSCASB_a16(uint32_t fetchdat)
{ {
uint8_t temp; uint8_t temp;
SEG_CHECK_READ(&_es); SEG_CHECK_READ(&cpu_state.seg_es);
temp = readmemb(es, DI); if (cpu_state.abrt) return 1; temp = readmemb(es, DI); if (cpu_state.abrt) return 1;
setsub8(AL, temp); setsub8(AL, temp);
if (flags & D_FLAG) DI--; if (flags & D_FLAG) DI--;
@ -342,7 +342,7 @@ static int opSCASB_a32(uint32_t fetchdat)
{ {
uint8_t temp; uint8_t temp;
SEG_CHECK_READ(&_es); SEG_CHECK_READ(&cpu_state.seg_es);
temp = readmemb(es, EDI); if (cpu_state.abrt) return 1; temp = readmemb(es, EDI); if (cpu_state.abrt) return 1;
setsub8(AL, temp); setsub8(AL, temp);
if (flags & D_FLAG) EDI--; if (flags & D_FLAG) EDI--;
@ -356,7 +356,7 @@ static int opSCASW_a16(uint32_t fetchdat)
{ {
uint16_t temp; uint16_t temp;
SEG_CHECK_READ(&_es); SEG_CHECK_READ(&cpu_state.seg_es);
temp = readmemw(es, DI); if (cpu_state.abrt) return 1; temp = readmemw(es, DI); if (cpu_state.abrt) return 1;
setsub16(AX, temp); setsub16(AX, temp);
if (flags & D_FLAG) DI -= 2; if (flags & D_FLAG) DI -= 2;
@ -369,7 +369,7 @@ static int opSCASW_a32(uint32_t fetchdat)
{ {
uint16_t temp; uint16_t temp;
SEG_CHECK_READ(&_es); SEG_CHECK_READ(&cpu_state.seg_es);
temp = readmemw(es, EDI); if (cpu_state.abrt) return 1; temp = readmemw(es, EDI); if (cpu_state.abrt) return 1;
setsub16(AX, temp); setsub16(AX, temp);
if (flags & D_FLAG) EDI -= 2; if (flags & D_FLAG) EDI -= 2;
@ -383,7 +383,7 @@ static int opSCASL_a16(uint32_t fetchdat)
{ {
uint32_t temp; uint32_t temp;
SEG_CHECK_READ(&_es); SEG_CHECK_READ(&cpu_state.seg_es);
temp = readmeml(es, DI); if (cpu_state.abrt) return 1; temp = readmeml(es, DI); if (cpu_state.abrt) return 1;
setsub32(EAX, temp); setsub32(EAX, temp);
if (flags & D_FLAG) DI -= 4; if (flags & D_FLAG) DI -= 4;
@ -396,7 +396,7 @@ static int opSCASL_a32(uint32_t fetchdat)
{ {
uint32_t temp; uint32_t temp;
SEG_CHECK_READ(&_es); SEG_CHECK_READ(&cpu_state.seg_es);
temp = readmeml(es, EDI); if (cpu_state.abrt) return 1; temp = readmeml(es, EDI); if (cpu_state.abrt) return 1;
setsub32(EAX, temp); setsub32(EAX, temp);
if (flags & D_FLAG) EDI -= 4; if (flags & D_FLAG) EDI -= 4;
@ -410,7 +410,7 @@ static int opINSB_a16(uint32_t fetchdat)
{ {
uint8_t temp; uint8_t temp;
SEG_CHECK_WRITE(&_es); SEG_CHECK_WRITE(&cpu_state.seg_es);
check_io_perm(DX); check_io_perm(DX);
temp = inb(DX); temp = inb(DX);
writememb(es, DI, temp); if (cpu_state.abrt) return 1; writememb(es, DI, temp); if (cpu_state.abrt) return 1;
@ -424,7 +424,7 @@ static int opINSB_a32(uint32_t fetchdat)
{ {
uint8_t temp; uint8_t temp;
SEG_CHECK_WRITE(&_es); SEG_CHECK_WRITE(&cpu_state.seg_es);
check_io_perm(DX); check_io_perm(DX);
temp = inb(DX); temp = inb(DX);
writememb(es, EDI, temp); if (cpu_state.abrt) return 1; writememb(es, EDI, temp); if (cpu_state.abrt) return 1;
@ -439,7 +439,7 @@ static int opINSW_a16(uint32_t fetchdat)
{ {
uint16_t temp; uint16_t temp;
SEG_CHECK_WRITE(&_es); SEG_CHECK_WRITE(&cpu_state.seg_es);
check_io_perm(DX); check_io_perm(DX);
check_io_perm(DX + 1); check_io_perm(DX + 1);
temp = inw(DX); temp = inw(DX);
@ -454,7 +454,7 @@ static int opINSW_a32(uint32_t fetchdat)
{ {
uint16_t temp; uint16_t temp;
SEG_CHECK_WRITE(&_es); SEG_CHECK_WRITE(&cpu_state.seg_es);
check_io_perm(DX); check_io_perm(DX);
check_io_perm(DX + 1); check_io_perm(DX + 1);
temp = inw(DX); temp = inw(DX);
@ -470,7 +470,7 @@ static int opINSL_a16(uint32_t fetchdat)
{ {
uint32_t temp; uint32_t temp;
SEG_CHECK_WRITE(&_es); SEG_CHECK_WRITE(&cpu_state.seg_es);
check_io_perm(DX); check_io_perm(DX);
check_io_perm(DX + 1); check_io_perm(DX + 1);
check_io_perm(DX + 2); check_io_perm(DX + 2);
@ -487,7 +487,7 @@ static int opINSL_a32(uint32_t fetchdat)
{ {
uint32_t temp; uint32_t temp;
SEG_CHECK_WRITE(&_es); SEG_CHECK_WRITE(&cpu_state.seg_es);
check_io_perm(DX); check_io_perm(DX);
check_io_perm(DX + 1); check_io_perm(DX + 1);
check_io_perm(DX + 2); check_io_perm(DX + 2);

206
src/x86seg.c
View file

@ -68,7 +68,7 @@ static void seg_reset(x86seg *s)
s->limit = 0xFFFF; s->limit = 0xFFFF;
s->limit_low = 0; s->limit_low = 0;
s->limit_high = 0xffff; s->limit_high = 0xffff;
if (s == &_cs) if (s == &cpu_state.seg_cs)
{ {
// TODO - When the PC is reset, initialization of the CS descriptor must be like the annotated line below. // TODO - When the PC is reset, initialization of the CS descriptor must be like the annotated line below.
//s->base = AT ? (cpu_16bitbus ? 0xFF0000 : 0xFFFF0000) : 0xFFFF0; //s->base = AT ? (cpu_16bitbus ? 0xFF0000 : 0xFFFF0000) : 0xFFFF0;
@ -84,12 +84,12 @@ static void seg_reset(x86seg *s)
void x86seg_reset() void x86seg_reset()
{ {
seg_reset(&_cs); seg_reset(&cpu_state.seg_cs);
seg_reset(&_ds); seg_reset(&cpu_state.seg_ds);
seg_reset(&_es); seg_reset(&cpu_state.seg_es);
seg_reset(&_fs); seg_reset(&cpu_state.seg_fs);
seg_reset(&_gs); seg_reset(&cpu_state.seg_gs);
seg_reset(&_ss); seg_reset(&cpu_state.seg_ss);
} }
void x86_doabrt(int x86_abrt) void x86_doabrt(int x86_abrt)
@ -97,7 +97,7 @@ void x86_doabrt(int x86_abrt)
// ingpf = 1; // ingpf = 1;
CS = oldcs; CS = oldcs;
cpu_state.pc = cpu_state.oldpc; cpu_state.pc = cpu_state.oldpc;
_cs.access = oldcpl << 5; cpu_state.seg_cs.access = oldcpl << 5;
// pclog("x86_doabrt - %02X %08X %04X:%08X %i\n", x86_abrt, abrt_error, CS, pc, ins); // pclog("x86_doabrt - %02X %08X %04X:%08X %i\n", x86_abrt, abrt_error, CS, pc, ins);
/* if (CS == 0x3433 && pc == 0x000006B0) /* if (CS == 0x3433 && pc == 0x000006B0)
@ -238,14 +238,14 @@ static void do_seg_load(x86seg *s, uint16_t *segdat)
} }
// if (output) pclog("SEG : base=%08x limit=%08x low=%08x high=%08x\n", s->base, s->limit, s->limit_low, s->limit_high); // if (output) pclog("SEG : base=%08x limit=%08x low=%08x high=%08x\n", s->base, s->limit, s->limit_low, s->limit_high);
if (s == &_ds) if (s == &cpu_state.seg_ds)
{ {
if (s->base == 0 && s->limit_low == 0 && s->limit_high == 0xffffffff) if (s->base == 0 && s->limit_low == 0 && s->limit_high == 0xffffffff)
cpu_cur_status &= ~CPU_STATUS_NOTFLATDS; cpu_cur_status &= ~CPU_STATUS_NOTFLATDS;
else else
cpu_cur_status |= CPU_STATUS_NOTFLATDS; cpu_cur_status |= CPU_STATUS_NOTFLATDS;
} }
if (s == &_ss) if (s == &cpu_state.seg_ss)
{ {
if (s->base == 0 && s->limit_low == 0 && s->limit_high == 0xffffffff) if (s->base == 0 && s->limit_low == 0 && s->limit_high == 0xffffffff)
cpu_cur_status &= ~CPU_STATUS_NOTFLATSS; cpu_cur_status &= ~CPU_STATUS_NOTFLATSS;
@ -320,7 +320,7 @@ void loadseg(uint16_t seg, x86seg *s)
// intcount++; // intcount++;
if (!(seg&~3)) if (!(seg&~3))
{ {
if (s==&_ss) if (s==&cpu_state.seg_ss)
{ {
pclog("SS selector = NULL!\n"); pclog("SS selector = NULL!\n");
x86ss(NULL,0); x86ss(NULL,0);
@ -332,7 +332,7 @@ void loadseg(uint16_t seg, x86seg *s)
s->seg=0; s->seg=0;
s->access = 0; s->access = 0;
s->base=-1; s->base=-1;
if (s == &_ds) if (s == &cpu_state.seg_ds)
cpu_cur_status |= CPU_STATUS_NOTFLATDS; cpu_cur_status |= CPU_STATUS_NOTFLATDS;
// pclog("NULL selector %s%s%s%s %04X(%06X):%06X\n",(s==&_ds)?"DS":"",(s==&_es)?"ES":"",(s==&_fs)?"FS":"",(s==&_gs)?"GS":"",CS,cs,pc); // pclog("NULL selector %s%s%s%s %04X(%06X):%06X\n",(s==&_ds)?"DS":"",(s==&_es)?"ES":"",(s==&_fs)?"FS":"",(s==&_gs)?"GS":"",CS,cs,pc);
return; return;
@ -371,7 +371,7 @@ void loadseg(uint16_t seg, x86seg *s)
segdat[2]=readmemw(0,addr+4); segdat[2]=readmemw(0,addr+4);
segdat[3]=readmemw(0,addr+6); cpl_override=0; if (cpu_state.abrt) return; segdat[3]=readmemw(0,addr+6); cpl_override=0; if (cpu_state.abrt) return;
dpl=(segdat[2]>>13)&3; dpl=(segdat[2]>>13)&3;
if (s==&_ss) if (s==&cpu_state.seg_ss)
{ {
if (!(seg&~3)) if (!(seg&~3))
{ {
@ -405,7 +405,7 @@ void loadseg(uint16_t seg, x86seg *s)
set_stack32((segdat[3] & 0x40) ? 1 : 0); set_stack32((segdat[3] & 0x40) ? 1 : 0);
// pclog("Load SS %04x %04x %04x %04x\n", segdat[0], segdat[1], segdat[2], segdat[3]); // pclog("Load SS %04x %04x %04x %04x\n", segdat[0], segdat[1], segdat[2], segdat[3]);
} }
else if (s!=&_cs) else if (s!=&cpu_state.seg_cs)
{ {
if (output) pclog("Seg data %04X %04X %04X %04X\n", segdat[0], segdat[1], segdat[2], segdat[3]); if (output) pclog("Seg data %04X %04X %04X %04X\n", segdat[0], segdat[1], segdat[2], segdat[3]);
if (output) pclog("Seg type %03X\n",segdat[2]&0x1F00); if (output) pclog("Seg type %03X\n",segdat[2]&0x1F00);
@ -453,9 +453,9 @@ void loadseg(uint16_t seg, x86seg *s)
} }
#endif #endif
s->checked = 0; s->checked = 0;
if (s == &_ds) if (s == &cpu_state.seg_ds)
codegen_flat_ds = 0; codegen_flat_ds = 0;
if (s == &_ss) if (s == &cpu_state.seg_ss)
codegen_flat_ss = 0; codegen_flat_ss = 0;
} }
else else
@ -463,23 +463,23 @@ void loadseg(uint16_t seg, x86seg *s)
s->access = (3 << 5) | 2; s->access = (3 << 5) | 2;
s->base = seg << 4; s->base = seg << 4;
s->seg = seg; s->seg = seg;
if (s == &_ss) if (s == &cpu_state.seg_ss)
set_stack32(0); set_stack32(0);
s->checked = 1; s->checked = 1;
if (s == &_ds) if (s == &cpu_state.seg_ds)
codegen_flat_ds = 0; codegen_flat_ds = 0;
if (s == &_ss) if (s == &cpu_state.seg_ss)
codegen_flat_ss = 0; codegen_flat_ss = 0;
} }
if (s == &_ds) if (s == &cpu_state.seg_ds)
{ {
if (s->base == 0 && s->limit_low == 0 && s->limit_high == 0xffffffff) if (s->base == 0 && s->limit_low == 0 && s->limit_high == 0xffffffff)
cpu_cur_status &= ~CPU_STATUS_NOTFLATDS; cpu_cur_status &= ~CPU_STATUS_NOTFLATDS;
else else
cpu_cur_status |= CPU_STATUS_NOTFLATDS; cpu_cur_status |= CPU_STATUS_NOTFLATDS;
} }
if (s == &_ss) if (s == &cpu_state.seg_ss)
{ {
if (s->base == 0 && s->limit_low == 0 && s->limit_high == 0xffffffff) if (s->base == 0 && s->limit_low == 0 && s->limit_high == 0xffffffff)
cpu_cur_status &= ~CPU_STATUS_NOTFLATSS; cpu_cur_status &= ~CPU_STATUS_NOTFLATSS;
@ -568,7 +568,7 @@ void loadcs(uint16_t seg)
} }
set_use32(segdat[3] & 0x40); set_use32(segdat[3] & 0x40);
CS=(seg&~3)|CPL; CS=(seg&~3)|CPL;
do_seg_load(&_cs, segdat); do_seg_load(&cpu_state.seg_cs, segdat);
use32=(segdat[3]&0x40)?0x300:0; use32=(segdat[3]&0x40)?0x300:0;
if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); if (CPL==3 && oldcpl!=3) flushmmucache_cr3();
@ -601,13 +601,13 @@ void loadcs(uint16_t seg)
} }
else else
{ {
_cs.base=seg<<4; cpu_state.seg_cs.base=seg<<4;
_cs.limit=0xFFFF; cpu_state.seg_cs.limit=0xFFFF;
_cs.limit_low = 0; cpu_state.seg_cs.limit_low = 0;
_cs.limit_high = 0xffff; cpu_state.seg_cs.limit_high = 0xffff;
CS=seg; CS=seg;
if (eflags&VM_FLAG) _cs.access=(3<<5) | 2; if (eflags&VM_FLAG) cpu_state.seg_cs.access=(3<<5) | 2;
else _cs.access=(0<<5) | 2; else cpu_state.seg_cs.access=(0<<5) | 2;
if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); if (CPL==3 && oldcpl!=3) flushmmucache_cr3();
} }
} }
@ -693,7 +693,7 @@ void loadcsjmp(uint16_t seg, uint32_t oxpc)
CS = (seg & ~3) | CPL; CS = (seg & ~3) | CPL;
segdat[2] = (segdat[2] & ~(3 << (5+8))) | (CPL << (5+8)); segdat[2] = (segdat[2] & ~(3 << (5+8))) | (CPL << (5+8));
do_seg_load(&_cs, segdat); do_seg_load(&cpu_state.seg_cs, segdat);
if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); if (CPL==3 && oldcpl!=3) flushmmucache_cr3();
/* if (segdat[3]&0x40) /* if (segdat[3]&0x40)
{ {
@ -797,7 +797,7 @@ void loadcsjmp(uint16_t seg, uint32_t oxpc)
} }
case 0x1C00: case 0x1D00: case 0x1E00: case 0x1F00: /*Conforming*/ case 0x1C00: case 0x1D00: case 0x1E00: case 0x1F00: /*Conforming*/
CS=seg2; CS=seg2;
do_seg_load(&_cs, segdat); do_seg_load(&cpu_state.seg_cs, segdat);
if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); if (CPL==3 && oldcpl!=3) flushmmucache_cr3();
set_use32(segdat[3]&0x40); set_use32(segdat[3]&0x40);
cpu_state.pc=newpc; cpu_state.pc=newpc;
@ -846,13 +846,13 @@ void loadcsjmp(uint16_t seg, uint32_t oxpc)
} }
else else
{ {
_cs.base=seg<<4; cpu_state.seg_cs.base=seg<<4;
_cs.limit=0xFFFF; cpu_state.seg_cs.limit=0xFFFF;
_cs.limit_low = 0; cpu_state.seg_cs.limit_low = 0;
_cs.limit_high = 0xffff; cpu_state.seg_cs.limit_high = 0xffff;
CS=seg; CS=seg;
if (eflags&VM_FLAG) _cs.access=(3<<5) | 2; if (eflags&VM_FLAG) cpu_state.seg_cs.access=(3<<5) | 2;
else _cs.access=(0<<5) | 2; else cpu_state.seg_cs.access=(0<<5) | 2;
if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); if (CPL==3 && oldcpl!=3) flushmmucache_cr3();
cycles -= timing_jmp_rm; cycles -= timing_jmp_rm;
} }
@ -1028,7 +1028,7 @@ void loadcscall(uint16_t seg)
else /*On non-conforming segments, set RPL = CPL*/ else /*On non-conforming segments, set RPL = CPL*/
seg = (seg & ~3) | CPL; seg = (seg & ~3) | CPL;
CS=seg; CS=seg;
do_seg_load(&_cs, segdat); do_seg_load(&cpu_state.seg_cs, segdat);
if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); if (CPL==3 && oldcpl!=3) flushmmucache_cr3();
/* if (segdat[3]&0x40) /* if (segdat[3]&0x40)
{ {
@ -1205,7 +1205,7 @@ void loadcscall(uint16_t seg)
if (stack32) ESP=newsp; if (stack32) ESP=newsp;
else SP=newsp; else SP=newsp;
do_seg_load(&_ss, segdat2); do_seg_load(&cpu_state.seg_ss, segdat2);
if (output) pclog("Set access 1\n"); if (output) pclog("Set access 1\n");
@ -1216,7 +1216,7 @@ void loadcscall(uint16_t seg)
#endif #endif
CS=seg2; CS=seg2;
do_seg_load(&_cs, segdat); do_seg_load(&cpu_state.seg_cs, segdat);
if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); if (CPL==3 && oldcpl!=3) flushmmucache_cr3();
set_use32(segdat[3]&0x40); set_use32(segdat[3]&0x40);
cpu_state.pc=newpc; cpu_state.pc=newpc;
@ -1320,7 +1320,7 @@ void loadcscall(uint16_t seg)
PUSHW(oldpc); if (cpu_state.abrt) return; PUSHW(oldpc); if (cpu_state.abrt) return;
}*/ }*/
CS=seg2; CS=seg2;
do_seg_load(&_cs, segdat); do_seg_load(&cpu_state.seg_cs, segdat);
if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); if (CPL==3 && oldcpl!=3) flushmmucache_cr3();
set_use32(segdat[3]&0x40); set_use32(segdat[3]&0x40);
cpu_state.pc=newpc; cpu_state.pc=newpc;
@ -1363,13 +1363,13 @@ void loadcscall(uint16_t seg)
} }
else else
{ {
_cs.base=seg<<4; cpu_state.seg_cs.base=seg<<4;
_cs.limit=0xFFFF; cpu_state.seg_cs.limit=0xFFFF;
_cs.limit_low = 0; cpu_state.seg_cs.limit_low = 0;
_cs.limit_high = 0xffff; cpu_state.seg_cs.limit_high = 0xffff;
CS=seg; CS=seg;
if (eflags&VM_FLAG) _cs.access=(3<<5) | 2; if (eflags&VM_FLAG) cpu_state.seg_cs.access=(3<<5) | 2;
else _cs.access=(0<<5) | 2; else cpu_state.seg_cs.access=(0<<5) | 2;
if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); if (CPL==3 && oldcpl!=3) flushmmucache_cr3();
} }
} }
@ -1495,8 +1495,8 @@ void pmoderetf(int is32, uint16_t off)
if (segdat[2] & 0x400) if (segdat[2] & 0x400)
segdat[2] = (segdat[2] & ~(3 << (5+8))) | ((seg & 3) << (5+8)); segdat[2] = (segdat[2] & ~(3 << (5+8))) | ((seg & 3) << (5+8));
CS = seg; CS = seg;
do_seg_load(&_cs, segdat); do_seg_load(&cpu_state.seg_cs, segdat);
_cs.access = (_cs.access & ~(3 << 5)) | ((CS & 3) << 5); cpu_state.seg_cs.access = (cpu_state.seg_cs.access & ~(3 << 5)) | ((CS & 3) << 5);
if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); if (CPL==3 && oldcpl!=3) flushmmucache_cr3();
set_use32(segdat[3] & 0x40); set_use32(segdat[3] & 0x40);
@ -1630,7 +1630,7 @@ void pmoderetf(int is32, uint16_t off)
set_stack32((segdat2[3] & 0x40) ? 1 : 0); set_stack32((segdat2[3] & 0x40) ? 1 : 0);
if (stack32) ESP=newsp; if (stack32) ESP=newsp;
else SP=newsp; else SP=newsp;
do_seg_load(&_ss, segdat2); do_seg_load(&cpu_state.seg_ss, segdat2);
#ifdef SEL_ACCESSED #ifdef SEL_ACCESSED
cpl_override = 1; cpl_override = 1;
@ -1647,17 +1647,17 @@ void pmoderetf(int is32, uint16_t off)
cpu_state.pc=newpc; cpu_state.pc=newpc;
CS=seg; CS=seg;
do_seg_load(&_cs, segdat); do_seg_load(&cpu_state.seg_cs, segdat);
if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); if (CPL==3 && oldcpl!=3) flushmmucache_cr3();
set_use32(segdat[3] & 0x40); set_use32(segdat[3] & 0x40);
if (stack32) ESP+=off; if (stack32) ESP+=off;
else SP+=off; else SP+=off;
check_seg_valid(&_ds); check_seg_valid(&cpu_state.seg_ds);
check_seg_valid(&_es); check_seg_valid(&cpu_state.seg_es);
check_seg_valid(&_fs); check_seg_valid(&cpu_state.seg_fs);
check_seg_valid(&_gs); check_seg_valid(&cpu_state.seg_gs);
// pclog("CPL<RPL return to %04X:%08X %04X:%08X\n",CS,pc,SS,ESP); // pclog("CPL<RPL return to %04X:%08X %04X:%08X\n",CS,pc,SS,ESP);
cycles -= timing_retf_pm_outer; cycles -= timing_retf_pm_outer;
} }
@ -1665,7 +1665,7 @@ void pmoderetf(int is32, uint16_t off)
void restore_stack() void restore_stack()
{ {
ss=oldss; _ss.limit=oldsslimit; ss=oldss; cpu_state.seg_ss.limit=oldsslimit;
} }
void pmodeint(int num, int soft) void pmodeint(int num, int soft)
@ -1881,7 +1881,7 @@ void pmodeint(int num, int soft)
set_stack32((segdat3[3] & 0x40) ? 1 : 0); set_stack32((segdat3[3] & 0x40) ? 1 : 0);
if (stack32) ESP=newsp; if (stack32) ESP=newsp;
else SP=newsp; else SP=newsp;
do_seg_load(&_ss, segdat3); do_seg_load(&cpu_state.seg_ss, segdat3);
#ifdef CS_ACCESSED #ifdef CS_ACCESSED
cpl_override = 1; cpl_override = 1;
@ -1900,10 +1900,10 @@ void pmodeint(int num, int soft)
PUSHL(FS); PUSHL(FS);
PUSHL(DS); PUSHL(DS);
PUSHL(ES); if (cpu_state.abrt) return; PUSHL(ES); if (cpu_state.abrt) return;
loadseg(0,&_ds); loadseg(0,&cpu_state.seg_ds);
loadseg(0,&_es); loadseg(0,&cpu_state.seg_es);
loadseg(0,&_fs); loadseg(0,&cpu_state.seg_fs);
loadseg(0,&_gs); loadseg(0,&cpu_state.seg_gs);
} }
PUSHL(oldss); PUSHL(oldss);
PUSHL(oldsp); PUSHL(oldsp);
@ -1927,7 +1927,7 @@ void pmodeint(int num, int soft)
// if (output) pclog("16Stack %04X:%08X\n",SS,ESP); // if (output) pclog("16Stack %04X:%08X\n",SS,ESP);
} }
cpl_override=0; cpl_override=0;
_cs.access=0; cpu_state.seg_cs.access=0;
cycles -= timing_int_pm_outer - timing_int_pm; cycles -= timing_int_pm_outer - timing_int_pm;
// pclog("Non-confirming int gate, CS = %04X\n"); // pclog("Non-confirming int gate, CS = %04X\n");
break; break;
@ -1975,9 +1975,9 @@ void pmodeint(int num, int soft)
x86gpf(NULL,seg&~3); x86gpf(NULL,seg&~3);
return; return;
} }
do_seg_load(&_cs, segdat2); do_seg_load(&cpu_state.seg_cs, segdat2);
CS = (seg & ~3) | new_cpl; CS = (seg & ~3) | new_cpl;
_cs.access = (_cs.access & ~(3 << 5)) | (new_cpl << 5); cpu_state.seg_cs.access = (cpu_state.seg_cs.access & ~(3 << 5)) | (new_cpl << 5);
// pclog("New CS = %04X\n",CS); // pclog("New CS = %04X\n",CS);
if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); if (CPL==3 && oldcpl!=3) flushmmucache_cr3();
if (type>0x800) cpu_state.pc=segdat[0]|(segdat[3]<<16); if (type>0x800) cpu_state.pc=segdat[0]|(segdat[3]<<16);
@ -2086,10 +2086,10 @@ void pmodeiret(int is32)
tempflags=POPW(); if (cpu_state.abrt) return; tempflags=POPW(); if (cpu_state.abrt) return;
} }
cpu_state.pc=newpc; cpu_state.pc=newpc;
_cs.base=seg<<4; cpu_state.seg_cs.base=seg<<4;
_cs.limit=0xFFFF; cpu_state.seg_cs.limit=0xFFFF;
_cs.limit_low = 0; cpu_state.seg_cs.limit_low = 0;
_cs.limit_high = 0xffff; cpu_state.seg_cs.limit_high = 0xffff;
CS=seg; CS=seg;
flags=(flags&0x3000)|(tempflags&0xCFD5)|2; flags=(flags&0x3000)|(tempflags&0xCFD5)|2;
cycles -= timing_iret_rm; cycles -= timing_iret_rm;
@ -2155,31 +2155,31 @@ void pmodeiret(int is32)
// pclog("Pop stack %04X:%04X\n",newss,newsp); // pclog("Pop stack %04X:%04X\n",newss,newsp);
eflags=tempflags>>16; eflags=tempflags>>16;
cpu_cur_status |= CPU_STATUS_V86; cpu_cur_status |= CPU_STATUS_V86;
loadseg(segs[0],&_es); loadseg(segs[0],&cpu_state.seg_es);
do_seg_v86_init(&_es); do_seg_v86_init(&cpu_state.seg_es);
loadseg(segs[1],&_ds); loadseg(segs[1],&cpu_state.seg_ds);
do_seg_v86_init(&_ds); do_seg_v86_init(&cpu_state.seg_ds);
cpu_cur_status |= CPU_STATUS_NOTFLATDS; cpu_cur_status |= CPU_STATUS_NOTFLATDS;
loadseg(segs[2],&_fs); loadseg(segs[2],&cpu_state.seg_fs);
do_seg_v86_init(&_fs); do_seg_v86_init(&cpu_state.seg_fs);
loadseg(segs[3],&_gs); loadseg(segs[3],&cpu_state.seg_gs);
do_seg_v86_init(&_gs); do_seg_v86_init(&cpu_state.seg_gs);
// pclog("V86 IRET %04X:%08X\n",SS,ESP); // pclog("V86 IRET %04X:%08X\n",SS,ESP);
// output=3; // output=3;
cpu_state.pc=newpc; cpu_state.pc=newpc;
_cs.base=seg<<4; cpu_state.seg_cs.base=seg<<4;
_cs.limit=0xFFFF; cpu_state.seg_cs.limit=0xFFFF;
_cs.limit_low = 0; cpu_state.seg_cs.limit_low = 0;
_cs.limit_high = 0xffff; cpu_state.seg_cs.limit_high = 0xffff;
CS=seg; CS=seg;
_cs.access=(3<<5) | 2; cpu_state.seg_cs.access=(3<<5) | 2;
if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); if (CPL==3 && oldcpl!=3) flushmmucache_cr3();
ESP=newsp; ESP=newsp;
loadseg(newss,&_ss); loadseg(newss,&cpu_state.seg_ss);
do_seg_v86_init(&_ss); do_seg_v86_init(&cpu_state.seg_ss);
cpu_cur_status |= CPU_STATUS_NOTFLATSS; cpu_cur_status |= CPU_STATUS_NOTFLATSS;
use32=0; use32=0;
cpu_cur_status &= ~CPU_STATUS_USE32; cpu_cur_status &= ~CPU_STATUS_USE32;
@ -2292,8 +2292,8 @@ void pmodeiret(int is32)
{ {
// pclog("Same level\n"); // pclog("Same level\n");
CS=seg; CS=seg;
do_seg_load(&_cs, segdat); do_seg_load(&cpu_state.seg_cs, segdat);
_cs.access = (_cs.access & ~(3 << 5)) | ((CS & 3) << 5); cpu_state.seg_cs.access = (cpu_state.seg_cs.access & ~(3 << 5)) | ((CS & 3) << 5);
if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); if (CPL==3 && oldcpl!=3) flushmmucache_cr3();
set_use32(segdat[3]&0x40); set_use32(segdat[3]&0x40);
@ -2392,7 +2392,7 @@ void pmodeiret(int is32)
set_stack32((segdat2[3] & 0x40) ? 1 : 0); set_stack32((segdat2[3] & 0x40) ? 1 : 0);
if (stack32) ESP=newsp; if (stack32) ESP=newsp;
else SP=newsp; else SP=newsp;
do_seg_load(&_ss, segdat2); do_seg_load(&cpu_state.seg_ss, segdat2);
#ifdef SEL_ACCESSED #ifdef SEL_ACCESSED
cpl_override = 1; cpl_override = 1;
@ -2408,15 +2408,15 @@ void pmodeiret(int is32)
segdat[2] = (segdat[2] & ~(3 << (5+8))) | ((seg & 3) << (5+8)); segdat[2] = (segdat[2] & ~(3 << (5+8))) | ((seg & 3) << (5+8));
CS=seg; CS=seg;
do_seg_load(&_cs, segdat); do_seg_load(&cpu_state.seg_cs, segdat);
_cs.access = (_cs.access & ~(3 << 5)) | ((CS & 3) << 5); cpu_state.seg_cs.access = (cpu_state.seg_cs.access & ~(3 << 5)) | ((CS & 3) << 5);
if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); if (CPL==3 && oldcpl!=3) flushmmucache_cr3();
set_use32(segdat[3] & 0x40); set_use32(segdat[3] & 0x40);
check_seg_valid(&_ds); check_seg_valid(&cpu_state.seg_ds);
check_seg_valid(&_es); check_seg_valid(&cpu_state.seg_es);
check_seg_valid(&_fs); check_seg_valid(&cpu_state.seg_fs);
check_seg_valid(&_gs); check_seg_valid(&cpu_state.seg_gs);
cycles -= timing_iret_pm_outer; cycles -= timing_iret_pm_outer;
} }
cpu_state.pc=newpc; cpu_state.pc=newpc;
@ -2643,7 +2643,7 @@ void taskswitch286(uint16_t seg, uint16_t *segdat, int is32)
// if (output) pclog("new_cs %04X\n",new_cs); // if (output) pclog("new_cs %04X\n",new_cs);
CS=new_cs; CS=new_cs;
do_seg_load(&_cs, segdat2); do_seg_load(&cpu_state.seg_cs, segdat2);
if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); if (CPL==3 && oldcpl!=3) flushmmucache_cr3();
set_use32(segdat2[3] & 0x40); set_use32(segdat2[3] & 0x40);
cpu_cur_status &= ~CPU_STATUS_V86; cpu_cur_status &= ~CPU_STATUS_V86;
@ -2659,15 +2659,15 @@ void taskswitch286(uint16_t seg, uint16_t *segdat, int is32)
EDI=new_edi; EDI=new_edi;
if (output) pclog("Load ES %04X\n",new_es); if (output) pclog("Load ES %04X\n",new_es);
loadseg(new_es,&_es); loadseg(new_es,&cpu_state.seg_es);
if (output) pclog("Load SS %04X\n",new_ss); if (output) pclog("Load SS %04X\n",new_ss);
loadseg(new_ss,&_ss); loadseg(new_ss,&cpu_state.seg_ss);
if (output) pclog("Load DS %04X\n",new_ds); if (output) pclog("Load DS %04X\n",new_ds);
loadseg(new_ds,&_ds); loadseg(new_ds,&cpu_state.seg_ds);
if (output) pclog("Load FS %04X\n",new_fs); if (output) pclog("Load FS %04X\n",new_fs);
loadseg(new_fs,&_fs); loadseg(new_fs,&cpu_state.seg_fs);
if (output) pclog("Load GS %04X\n",new_gs); if (output) pclog("Load GS %04X\n",new_gs);
loadseg(new_gs,&_gs); loadseg(new_gs,&cpu_state.seg_gs);
if (output) pclog("Resuming at %04X:%08X\n",CS,cpu_state.pc); if (output) pclog("Resuming at %04X:%08X\n",CS,cpu_state.pc);
} }
@ -2842,7 +2842,7 @@ void taskswitch286(uint16_t seg, uint16_t *segdat, int is32)
// if (output) pclog("new_cs %04X\n",new_cs); // if (output) pclog("new_cs %04X\n",new_cs);
CS=new_cs; CS=new_cs;
do_seg_load(&_cs, segdat2); do_seg_load(&cpu_state.seg_cs, segdat2);
if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); if (CPL==3 && oldcpl!=3) flushmmucache_cr3();
set_use32(0); set_use32(0);
@ -2856,15 +2856,15 @@ void taskswitch286(uint16_t seg, uint16_t *segdat, int is32)
EDI=new_edi | 0xFFFF0000; EDI=new_edi | 0xFFFF0000;
if (output) pclog("Load ES %04X\n",new_es); if (output) pclog("Load ES %04X\n",new_es);
loadseg(new_es,&_es); loadseg(new_es,&cpu_state.seg_es);
if (output) pclog("Load SS %04X\n",new_ss); if (output) pclog("Load SS %04X\n",new_ss);
loadseg(new_ss,&_ss); loadseg(new_ss,&cpu_state.seg_ss);
if (output) pclog("Load DS %04X\n",new_ds); if (output) pclog("Load DS %04X\n",new_ds);
loadseg(new_ds,&_ds); loadseg(new_ds,&cpu_state.seg_ds);
if (is386) if (is386)
{ {
loadseg(0,&_fs); loadseg(0,&cpu_state.seg_fs);
loadseg(0,&_gs); loadseg(0,&cpu_state.seg_gs);
} }
if (output) pclog("Resuming at %04X:%08X\n",CS,cpu_state.pc); if (output) pclog("Resuming at %04X:%08X\n",CS,cpu_state.pc);