Added code generation for :

- TEST immediate
- register versions of NOT and NEG
- fixed shift versions of SHL, SHR and SAR
- MOVZX and MOVSX
- LEA
- CMP with memory destination
- JL, JNL, JLE, JNLE, JBE, JNBE
This commit is contained in:
TomW 2015-05-30 17:08:54 +01:00
commit 9061c5d2fc
8 changed files with 683 additions and 36 deletions

View file

@ -238,6 +238,8 @@ void codegen_block_init(uint32_t phys_addr)
addbyte(0x83); /*SUBL $16,%esp*/
addbyte(0xEC);
addbyte(0x10);
addbyte(0xBD); /*MOVL EBP, &EAX*/
addlong((uint32_t)&EAX);
// pclog("New block %i for %08X %03x\n", block_current, cs+pc, block_num);
@ -872,8 +874,6 @@ generate_call:
#endif
}
addbyte(0xBD); /*MOVL EBP, &EAX*/
addlong((uint32_t)&EAX);
if (recomp_op_table && recomp_op_table[(opcode | op_32) & 0x1ff])
{
uint32_t new_pc = recomp_op_table[(opcode | op_32) & 0x1ff](opcode, fetchdat, op_32, op_pc, block);