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Disabled more debug.

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This commit is contained in:
TomW 2013-12-18 21:40:58 +00:00
commit 8ccd4544ec
11 changed files with 26 additions and 26 deletions
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4
src/vid_ati18800.c
View file

@ -24,7 +24,7 @@ void ati18800_out(uint16_t addr, uint8_t val, void *p)
svga_t *svga = &ati18800->svga;
uint8_t old;
pclog("ati18800_out : %04X %02X %04X:%04X\n", addr, val, CS,pc);
// pclog("ati18800_out : %04X %02X %04X:%04X\n", addr, val, CS,pc);
if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout&1)) addr ^= 0x60;
@ -79,7 +79,7 @@ uint8_t ati18800_in(uint16_t addr, void *p)
svga_t *svga = &ati18800->svga;
uint8_t temp;
if (addr != 0x3da) pclog("ati18800_in : %04X ", addr);
// if (addr != 0x3da) pclog("ati18800_in : %04X ", addr);
if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout&1)) addr ^= 0x60;

4
src/vid_ati28800.c
View file

@ -25,7 +25,7 @@ void ati28800_out(uint16_t addr, uint8_t val, void *p)
svga_t *svga = &ati28800->svga;
uint8_t old;
pclog("ati28800_out : %04X %02X %04X:%04X\n", addr, val, CS,pc);
// pclog("ati28800_out : %04X %02X %04X:%04X\n", addr, val, CS,pc);
if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout&1))
addr ^= 0x60;
@ -81,7 +81,7 @@ uint8_t ati28800_in(uint16_t addr, void *p)
svga_t *svga = &ati28800->svga;
uint8_t temp;
if (addr != 0x3da) pclog("ati28800_in : %04X ", addr);
// if (addr != 0x3da) pclog("ati28800_in : %04X ", addr);
if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout&1)) addr ^= 0x60;

6
src/vid_cl5429.c
View file

@ -55,7 +55,7 @@ void gd5429_out(uint16_t addr, uint8_t val, void *p)
if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
addr ^= 0x60;
pclog("gd5429 out %04X %02X\n", addr, val);
// pclog("gd5429 out %04X %02X\n", addr, val);
switch (addr)
{
@ -104,7 +104,7 @@ void gd5429_out(uint16_t addr, uint8_t val, void *p)
else
svga->writemode = svga->gdcreg[5] & 3;
svga->readmode = val & 8;
pclog("writemode = %i\n", svga->writemode);
// pclog("writemode = %i\n", svga->writemode);
return;
}
if (svga->gdcaddr == 6)
@ -163,7 +163,7 @@ uint8_t gd5429_in(uint16_t addr, void *p)
if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3d0) && !(svga->miscout & 1))
addr ^= 0x60;
if (addr != 0x3da) pclog("IN gd5429 %04X\n", addr);
// if (addr != 0x3da) pclog("IN gd5429 %04X\n", addr);
switch (addr)
{

6
src/vid_et4000.c
View file

@ -28,7 +28,7 @@ void et4000_out(uint16_t addr, uint8_t val, void *p)
if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout & 1))
addr ^= 0x60;
pclog("ET4000 out %04X %02X\n", addr, val);
// pclog("ET4000 out %04X %02X\n", addr, val);
switch (addr)
{
@ -40,7 +40,7 @@ void et4000_out(uint16_t addr, uint8_t val, void *p)
svga->write_bank = (val & 0xf) * 0x10000;
svga->read_bank = ((val >> 4) & 0xf) * 0x10000;
et4000->banking = val;
pclog("Banking write %08X %08X %02X\n", svga->write_bank, svga->read_bank, val);
// pclog("Banking write %08X %08X %02X\n", svga->write_bank, svga->read_bank, val);
return;
case 0x3D4:
svga->crtcreg = val & 0x3f;
@ -70,7 +70,7 @@ uint8_t et4000_in(uint16_t addr, void *p)
if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout & 1))
addr ^= 0x60;
if (addr != 0x3da) pclog("IN ET4000 %04X\n", addr);
// if (addr != 0x3da) pclog("IN ET4000 %04X\n", addr);
switch (addr)
{

8
src/vid_et4000w32.c
View file

@ -74,7 +74,7 @@ void et4000w32p_out(uint16_t addr, uint8_t val, void *p)
svga_t *svga = &et4000->svga;
uint8_t old;
pclog("et4000w32p_out: addr %04X val %02X %04X:%04X %02X %02X\n", addr, val, CS, pc, ram[0x487], ram[0x488]);
// pclog("et4000w32p_out: addr %04X val %02X %04X:%04X %02X %02X\n", addr, val, CS, pc, ram[0x487], ram[0x488]);
/* if (ram[0x487] == 0x62)
fatal("mono\n");*/
@ -171,8 +171,8 @@ uint8_t et4000w32p_in(uint16_t addr, void *p)
// pclog("ET4000W32p in %04X %04X:%04X ",addr,CS,pc);
if (addr != 0x3da && addr != 0x3ba)
pclog("et4000w32p_in: addr %04X %04X:%04X %02X %02X\n", addr, CS, pc, ram[0x487], ram[0x488]);
// if (addr != 0x3da && addr != 0x3ba)
// pclog("et4000w32p_in: addr %04X %04X:%04X %02X %02X\n", addr, CS, pc, ram[0x487], ram[0x488]);
if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
addr ^= 0x60;
@ -892,7 +892,7 @@ uint8_t et4000w32p_pci_read(int func, int addr, void *p)
et4000w32p_t *et4000 = (et4000w32p_t *)p;
svga_t *svga = &et4000->svga;
pclog("ET4000 PCI read %08X\n", addr);
// pclog("ET4000 PCI read %08X\n", addr);
switch (addr)
{

2
src/vid_olivetti_m24.c
View file

@ -51,7 +51,7 @@ void m24_out(uint16_t addr, uint8_t val, void *p)
{
m24_t *m24 = (m24_t *)p;
uint8_t old;
pclog("m24_out %04X %02X\n", addr, val);
// pclog("m24_out %04X %02X\n", addr, val);
switch (addr)
{
case 0x3d4:

4
src/vid_paradise.c
View file

@ -40,7 +40,7 @@ void paradise_out(uint16_t addr, uint8_t val, void *p)
if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
addr ^= 0x60;
// output = 3;
pclog("Paradise out %04X %02X %04X:%04X\n", addr, val, CS, pc);
// pclog("Paradise out %04X %02X %04X:%04X\n", addr, val, CS, pc);
switch (addr)
{
case 0x3c5:
@ -141,7 +141,7 @@ uint8_t paradise_in(uint16_t addr, void *p)
if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
addr ^= 0x60;
if (addr != 0x3da) pclog("Paradise in %04X\n", addr);
// if (addr != 0x3da) pclog("Paradise in %04X\n", addr);
switch (addr)
{
case 0x3c2:

2
src/vid_pc1512.c
View file

@ -53,7 +53,7 @@ static void pc1512_out(uint16_t addr, uint8_t val, void *p)
{
pc1512_t *pc1512 = (pc1512_t *)p;
uint8_t old;
pclog("PC1512 out %04X %02X %04X:%04X\n",addr,val,CS,pc);
// pclog("PC1512 out %04X %02X %04X:%04X\n",addr,val,CS,pc);
switch (addr)
{
case 0x3d4:

4
src/vid_s3_virge.c
View file

@ -50,7 +50,7 @@ void s3_virge_out(uint16_t addr, uint8_t val, void *p)
if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
addr ^= 0x60;
pclog("S3 out %04X %02X %04X:%08X %04X %04X %i\n", addr, val, CS, pc, ES, BX, ins);
// pclog("S3 out %04X %02X %04X:%08X %04X %04X %i\n", addr, val, CS, pc, ES, BX, ins);
switch (addr)
{
@ -180,7 +180,7 @@ uint8_t s3_virge_in(uint16_t addr, void *p)
if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
addr ^= 0x60;
if (addr != 0x3da) pclog("S3 in %04X %04X:%08X\n", addr, CS, pc);
// if (addr != 0x3da) pclog("S3 in %04X %04X:%08X\n", addr, CS, pc);
switch (addr)
{
//case 0x3C6: case 0x3C7: case 0x3C8: case 0x3C9:

6
src/vid_svga.c
View file

@ -55,15 +55,15 @@ void svga_out(uint16_t addr, uint8_t val, void *p)
break;
case 0x3C2:
svga->miscout = val;
svga->vidclock = val & 4; printf("3C2 write %02X\n",val);
svga->vidclock = val & 4;// printf("3C2 write %02X\n",val);
if (val & 1)
{
pclog("Remove mono handler\n");
// pclog("Remove mono handler\n");
io_removehandler(0x03a0, 0x0020, svga->video_in, NULL, NULL, svga->video_out, NULL, NULL, svga->p);
}
else
{
pclog("Set mono handler\n");
// pclog("Set mono handler\n");
io_sethandler(0x03a0, 0x0020, svga->video_in, NULL, NULL, svga->video_out, NULL, NULL, svga->p);
}
break;

6
src/vid_vga.c
View file

@ -19,7 +19,7 @@ void vga_out(uint16_t addr, uint8_t val, void *p)
svga_t *svga = &vga->svga;
uint8_t old;
pclog("vga_out : %04X %02X %04X:%04X %02X %i\n", addr, val, CS,pc, ram[0x489], ins);
// pclog("vga_out : %04X %02X %04X:%04X %02X %i\n", addr, val, CS,pc, ram[0x489], ins);
if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
addr ^= 0x60;
@ -52,7 +52,7 @@ uint8_t vga_in(uint16_t addr, void *p)
svga_t *svga = &vga->svga;
uint8_t temp;
if (addr != 0x3da) pclog("vga_in : %04X ", addr);
// if (addr != 0x3da) pclog("vga_in : %04X ", addr);
if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
addr ^= 0x60;
@ -69,7 +69,7 @@ uint8_t vga_in(uint16_t addr, void *p)
temp = svga_in(addr, svga);
break;
}
if (addr != 0x3da) pclog("%02X %04X:%04X\n", temp, CS,pc);
// if (addr != 0x3da) pclog("%02X %04X:%04X\n", temp, CS,pc);
return temp;
}